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Merge branch 'release/v3.2.x' of https://github.com/espressif/arduino-esp32 into release/v3.3.x
2 parents fc689a6 + a09b5d6 commit 459b5c8

38 files changed

+1840
-51
lines changed

Diff for: ‎CMakeLists.txt

+3
Original file line numberDiff line numberDiff line change
@@ -291,6 +291,9 @@ set(ARDUINO_LIBRARY_Zigbee_SRCS
291291
libraries/Zigbee/src/ep/ZigbeePressureSensor.cpp
292292
libraries/Zigbee/src/ep/ZigbeeOccupancySensor.cpp
293293
libraries/Zigbee/src/ep/ZigbeeCarbonDioxideSensor.cpp
294+
libraries/Zigbee/src/ep/ZigbeeContactSwitch.cpp
295+
libraries/Zigbee/src/ep/ZigbeeDoorWindowHandle.cpp
296+
libraries/Zigbee/src/ep/ZigbeeWindowCovering.cpp
294297
)
295298

296299
set(ARDUINO_LIBRARY_BLE_SRCS

Diff for: ‎boards.txt

+178
Original file line numberDiff line numberDiff line change
@@ -35428,6 +35428,184 @@ XIAO_ESP32S3.menu.EraseFlash.all.upload.erase_cmd=-e
3542835428

3542935429
##############################################################
3543035430

35431+
XIAO_ESP32S3_Plus.name=XIAO_ESP32S3_PLUS
35432+
XIAO_ESP32S3_Plus.vid.0=0x2886
35433+
XIAO_ESP32S3_Plus.pid.0=0x0063
35434+
XIAO_ESP32S3_Plus.vid.1=0x2886
35435+
XIAO_ESP32S3_Plus.pid.1=0x8063
35436+
35437+
XIAO_ESP32S3_Plus.bootloader.tool=esptool_py
35438+
XIAO_ESP32S3_Plus.bootloader.tool.default=esptool_py
35439+
35440+
XIAO_ESP32S3_Plus.upload.tool=esptool_py
35441+
XIAO_ESP32S3_Plus.upload.tool.default=esptool_py
35442+
XIAO_ESP32S3_Plus.upload.tool.network=esp_ota
35443+
35444+
XIAO_ESP32S3_Plus.upload.maximum_size=1310720
35445+
XIAO_ESP32S3_Plus.upload.maximum_data_size=327680
35446+
XIAO_ESP32S3_Plus.upload.flags=
35447+
XIAO_ESP32S3_Plus.upload.extra_flags=
35448+
XIAO_ESP32S3_Plus.upload.use_1200bps_touch=false
35449+
XIAO_ESP32S3_Plus.upload.wait_for_upload_port=false
35450+
35451+
XIAO_ESP32S3_Plus.serial.disableDTR=false
35452+
XIAO_ESP32S3_Plus.serial.disableRTS=false
35453+
35454+
XIAO_ESP32S3_Plus.build.tarch=xtensa
35455+
XIAO_ESP32S3_Plus.build.bootloader_addr=0x0
35456+
XIAO_ESP32S3_Plus.build.target=esp32s3
35457+
XIAO_ESP32S3_Plus.build.mcu=esp32s3
35458+
XIAO_ESP32S3_Plus.build.core=esp32
35459+
XIAO_ESP32S3_Plus.build.variant=XIAO_ESP32S3_Plus
35460+
XIAO_ESP32S3_Plus.build.board=XIAO_ESP32S3_PLUS
35461+
35462+
XIAO_ESP32S3_Plus.build.usb_mode=0
35463+
XIAO_ESP32S3_Plus.build.cdc_on_boot=1
35464+
XIAO_ESP32S3_Plus.build.msc_on_boot=0
35465+
XIAO_ESP32S3_Plus.build.dfu_on_boot=0
35466+
XIAO_ESP32S3_Plus.build.f_cpu=240000000L
35467+
XIAO_ESP32S3_Plus.build.flash_size=8MB
35468+
XIAO_ESP32S3_Plus.build.flash_freq=80m
35469+
XIAO_ESP32S3_Plus.build.flash_mode=dio
35470+
XIAO_ESP32S3_Plus.build.boot=qio
35471+
XIAO_ESP32S3_Plus.build.boot_freq=80m
35472+
XIAO_ESP32S3_Plus.build.partitions=default_8MB
35473+
XIAO_ESP32S3_Plus.build.defines=
35474+
XIAO_ESP32S3_Plus.build.loop_core=
35475+
XIAO_ESP32S3_Plus.build.event_core=
35476+
XIAO_ESP32S3_Plus.build.psram_type=qspi
35477+
XIAO_ESP32S3_Plus.build.memory_type={build.boot}_{build.psram_type}
35478+
35479+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.default=Disabled
35480+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.default.build.copy_jtag_files=0
35481+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.builtin=Integrated USB JTAG
35482+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.builtin.build.openocdscript=esp32s3-builtin.cfg
35483+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.builtin.build.copy_jtag_files=1
35484+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.external=FTDI Adapter
35485+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.external.build.openocdscript=esp32s3-ftdi.cfg
35486+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.external.build.copy_jtag_files=1
35487+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.bridge=ESP USB Bridge
35488+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.bridge.build.openocdscript=esp32s3-bridge.cfg
35489+
XIAO_ESP32S3_Plus.menu.JTAGAdapter.bridge.build.copy_jtag_files=1
35490+
35491+
XIAO_ESP32S3_Plus.menu.PSRAM.disabled=Disabled
35492+
XIAO_ESP32S3_Plus.menu.PSRAM.disabled.build.defines=
35493+
XIAO_ESP32S3_Plus.menu.PSRAM.disabled.build.psram_type=qspi
35494+
XIAO_ESP32S3_Plus.menu.PSRAM.opi=OPI PSRAM
35495+
XIAO_ESP32S3_Plus.menu.PSRAM.opi.build.defines=-DBOARD_HAS_PSRAM
35496+
XIAO_ESP32S3_Plus.menu.PSRAM.opi.build.psram_type=opi
35497+
35498+
XIAO_ESP32S3_Plus.menu.FlashMode.qio=QIO 80MHz
35499+
XIAO_ESP32S3_Plus.menu.FlashMode.qio.build.flash_mode=dio
35500+
XIAO_ESP32S3_Plus.menu.FlashMode.qio.build.boot=qio
35501+
XIAO_ESP32S3_Plus.menu.FlashMode.qio.build.boot_freq=80m
35502+
XIAO_ESP32S3_Plus.menu.FlashMode.qio.build.flash_freq=80m
35503+
XIAO_ESP32S3_Plus.menu.FlashMode.dio=DIO 80MHz
35504+
XIAO_ESP32S3_Plus.menu.FlashMode.dio.build.flash_mode=dio
35505+
XIAO_ESP32S3_Plus.menu.FlashMode.dio.build.boot=dio
35506+
XIAO_ESP32S3_Plus.menu.FlashMode.dio.build.boot_freq=80m
35507+
XIAO_ESP32S3_Plus.menu.FlashMode.dio.build.flash_freq=80m
35508+
35509+
XIAO_ESP32S3_Plus.menu.FlashSize.8M=8MB (64Mb)
35510+
XIAO_ESP32S3_Plus.menu.FlashSize.8M.build.flash_size=8MB
35511+
35512+
XIAO_ESP32S3_Plus.menu.LoopCore.1=Core 1
35513+
XIAO_ESP32S3_Plus.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
35514+
XIAO_ESP32S3_Plus.menu.LoopCore.0=Core 0
35515+
XIAO_ESP32S3_Plus.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
35516+
35517+
XIAO_ESP32S3_Plus.menu.EventsCore.1=Core 1
35518+
XIAO_ESP32S3_Plus.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
35519+
XIAO_ESP32S3_Plus.menu.EventsCore.0=Core 0
35520+
XIAO_ESP32S3_Plus.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
35521+
35522+
XIAO_ESP32S3_Plus.menu.USBMode.hwcdc=Hardware CDC and JTAG
35523+
XIAO_ESP32S3_Plus.menu.USBMode.hwcdc.build.usb_mode=1
35524+
XIAO_ESP32S3_Plus.menu.USBMode.default=USB-OTG (TinyUSB)
35525+
XIAO_ESP32S3_Plus.menu.USBMode.default.build.usb_mode=0
35526+
35527+
XIAO_ESP32S3_Plus.menu.CDCOnBoot.default=Enabled
35528+
XIAO_ESP32S3_Plus.menu.CDCOnBoot.default.build.cdc_on_boot=1
35529+
XIAO_ESP32S3_Plus.menu.CDCOnBoot.cdc=Disabled
35530+
XIAO_ESP32S3_Plus.menu.CDCOnBoot.cdc.build.cdc_on_boot=0
35531+
35532+
XIAO_ESP32S3_Plus.menu.MSCOnBoot.default=Disabled
35533+
XIAO_ESP32S3_Plus.menu.MSCOnBoot.default.build.msc_on_boot=0
35534+
XIAO_ESP32S3_Plus.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
35535+
XIAO_ESP32S3_Plus.menu.MSCOnBoot.msc.build.msc_on_boot=1
35536+
35537+
XIAO_ESP32S3_Plus.menu.DFUOnBoot.default=Disabled
35538+
XIAO_ESP32S3_Plus.menu.DFUOnBoot.default.build.dfu_on_boot=0
35539+
XIAO_ESP32S3_Plus.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
35540+
XIAO_ESP32S3_Plus.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
35541+
35542+
XIAO_ESP32S3_Plus.menu.UploadMode.default=UART0 / Hardware CDC
35543+
XIAO_ESP32S3_Plus.menu.UploadMode.default.upload.use_1200bps_touch=false
35544+
XIAO_ESP32S3_Plus.menu.UploadMode.default.upload.wait_for_upload_port=false
35545+
XIAO_ESP32S3_Plus.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
35546+
XIAO_ESP32S3_Plus.menu.UploadMode.cdc.upload.use_1200bps_touch=true
35547+
XIAO_ESP32S3_Plus.menu.UploadMode.cdc.upload.wait_for_upload_port=true
35548+
35549+
XIAO_ESP32S3_Plus.menu.PartitionScheme.default_8MB=Default with spiffs (3MB APP/1.5MB SPIFFS)
35550+
XIAO_ESP32S3_Plus.menu.PartitionScheme.default_8MB.build.partitions=default_8MB
35551+
XIAO_ESP32S3_Plus.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336
35552+
XIAO_ESP32S3_Plus.menu.PartitionScheme.max_app_8MB=Maximum APP (7.9MB APP No OTA/No FS)
35553+
XIAO_ESP32S3_Plus.menu.PartitionScheme.max_app_8MB.build.partitions=max_app_8MB
35554+
XIAO_ESP32S3_Plus.menu.PartitionScheme.max_app_8MB.upload.maximum_size=8257536
35555+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2=TinyUF2 8MB (2MB APP/3.7MB FFAT)
35556+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2.build.custom_bootloader=bootloader-tinyuf2
35557+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2.build.custom_partitions=partitions-8MB
35558+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2.upload.maximum_size=2097152
35559+
XIAO_ESP32S3_Plus.menu.PartitionScheme.tinyuf2.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
35560+
35561+
XIAO_ESP32S3_Plus.menu.CPUFreq.240=240MHz (WiFi)
35562+
XIAO_ESP32S3_Plus.menu.CPUFreq.240.build.f_cpu=240000000L
35563+
XIAO_ESP32S3_Plus.menu.CPUFreq.160=160MHz (WiFi)
35564+
XIAO_ESP32S3_Plus.menu.CPUFreq.160.build.f_cpu=160000000L
35565+
XIAO_ESP32S3_Plus.menu.CPUFreq.80=80MHz (WiFi)
35566+
XIAO_ESP32S3_Plus.menu.CPUFreq.80.build.f_cpu=80000000L
35567+
XIAO_ESP32S3_Plus.menu.CPUFreq.40=40MHz
35568+
XIAO_ESP32S3_Plus.menu.CPUFreq.40.build.f_cpu=40000000L
35569+
XIAO_ESP32S3_Plus.menu.CPUFreq.20=20MHz
35570+
XIAO_ESP32S3_Plus.menu.CPUFreq.20.build.f_cpu=20000000L
35571+
XIAO_ESP32S3_Plus.menu.CPUFreq.10=10MHz
35572+
XIAO_ESP32S3_Plus.menu.CPUFreq.10.build.f_cpu=10000000L
35573+
35574+
XIAO_ESP32S3_Plus.menu.UploadSpeed.921600=921600
35575+
XIAO_ESP32S3_Plus.menu.UploadSpeed.921600.upload.speed=921600
35576+
XIAO_ESP32S3_Plus.menu.UploadSpeed.115200=115200
35577+
XIAO_ESP32S3_Plus.menu.UploadSpeed.115200.upload.speed=115200
35578+
XIAO_ESP32S3_Plus.menu.UploadSpeed.256000.windows=256000
35579+
XIAO_ESP32S3_Plus.menu.UploadSpeed.256000.upload.speed=256000
35580+
XIAO_ESP32S3_Plus.menu.UploadSpeed.230400.windows.upload.speed=256000
35581+
XIAO_ESP32S3_Plus.menu.UploadSpeed.230400=230400
35582+
XIAO_ESP32S3_Plus.menu.UploadSpeed.230400.upload.speed=230400
35583+
XIAO_ESP32S3_Plus.menu.UploadSpeed.460800.linux=460800
35584+
XIAO_ESP32S3_Plus.menu.UploadSpeed.460800.macosx=460800
35585+
XIAO_ESP32S3_Plus.menu.UploadSpeed.460800.upload.speed=460800
35586+
XIAO_ESP32S3_Plus.menu.UploadSpeed.512000.windows=512000
35587+
XIAO_ESP32S3_Plus.menu.UploadSpeed.512000.upload.speed=512000
35588+
35589+
XIAO_ESP32S3_Plus.menu.DebugLevel.none=None
35590+
XIAO_ESP32S3_Plus.menu.DebugLevel.none.build.code_debug=0
35591+
XIAO_ESP32S3_Plus.menu.DebugLevel.error=Error
35592+
XIAO_ESP32S3_Plus.menu.DebugLevel.error.build.code_debug=1
35593+
XIAO_ESP32S3_Plus.menu.DebugLevel.warn=Warn
35594+
XIAO_ESP32S3_Plus.menu.DebugLevel.warn.build.code_debug=2
35595+
XIAO_ESP32S3_Plus.menu.DebugLevel.info=Info
35596+
XIAO_ESP32S3_Plus.menu.DebugLevel.info.build.code_debug=3
35597+
XIAO_ESP32S3_Plus.menu.DebugLevel.debug=Debug
35598+
XIAO_ESP32S3_Plus.menu.DebugLevel.debug.build.code_debug=4
35599+
XIAO_ESP32S3_Plus.menu.DebugLevel.verbose=Verbose
35600+
XIAO_ESP32S3_Plus.menu.DebugLevel.verbose.build.code_debug=5
35601+
35602+
XIAO_ESP32S3_Plus.menu.EraseFlash.none=Disabled
35603+
XIAO_ESP32S3_Plus.menu.EraseFlash.none.upload.erase_cmd=
35604+
XIAO_ESP32S3_Plus.menu.EraseFlash.all=Enabled
35605+
XIAO_ESP32S3_Plus.menu.EraseFlash.all.upload.erase_cmd=-e
35606+
35607+
##############################################################
35608+
3543135609
connaxio_espoir.name=Connaxio's Espoir
3543235610
connaxio_espoir.vid.0=0x10C4
3543335611
connaxio_espoir.pid.0=0x8D9A

Diff for: ‎cores/esp32/esp32-hal-misc.c

+8-4
Original file line numberDiff line numberDiff line change
@@ -158,11 +158,13 @@ void enableCore0WDT() {
158158
}
159159
}
160160

161-
void disableCore0WDT() {
161+
bool disableCore0WDT() {
162162
TaskHandle_t idle_0 = xTaskGetIdleTaskHandleForCore(0);
163-
if (idle_0 == NULL || esp_task_wdt_delete(idle_0) != ESP_OK) {
163+
if (idle_0 == NULL || esp_task_wdt_status(idle_0) || esp_task_wdt_delete(idle_0) != ESP_OK) {
164164
log_e("Failed to remove Core 0 IDLE task from WDT");
165+
return false;
165166
}
167+
return true;
166168
}
167169

168170
#ifndef CONFIG_FREERTOS_UNICORE
@@ -173,11 +175,13 @@ void enableCore1WDT() {
173175
}
174176
}
175177

176-
void disableCore1WDT() {
178+
bool disableCore1WDT() {
177179
TaskHandle_t idle_1 = xTaskGetIdleTaskHandleForCore(1);
178-
if (idle_1 == NULL || esp_task_wdt_delete(idle_1) != ESP_OK) {
180+
if (idle_1 == NULL || esp_task_wdt_status(idle_1) || esp_task_wdt_delete(idle_1) != ESP_OK) {
179181
log_e("Failed to remove Core 1 IDLE task from WDT");
182+
return false;
180183
}
184+
return true;
181185
}
182186
#endif
183187

Diff for: ‎cores/esp32/esp32-hal.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -121,11 +121,11 @@ void feedLoopWDT();
121121

122122
//enable/disable WDT for the IDLE task on Core 0 (SYSTEM)
123123
void enableCore0WDT();
124-
void disableCore0WDT();
124+
bool disableCore0WDT();
125125
#ifndef CONFIG_FREERTOS_UNICORE
126126
//enable/disable WDT for the IDLE task on Core 1 (Arduino)
127127
void enableCore1WDT();
128-
void disableCore1WDT();
128+
bool disableCore1WDT();
129129
#endif
130130

131131
//if xCoreID < 0 or CPU is unicore, it will use xTaskCreate, else xTaskCreatePinnedToCore

Diff for: ‎libraries/ArduinoOTA/src/ArduinoOTA.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ ArduinoOTAClass::ArduinoOTAClass()
2929
_start_callback(NULL), _end_callback(NULL), _error_callback(NULL), _progress_callback(NULL) {}
3030

3131
ArduinoOTAClass::~ArduinoOTAClass() {
32-
_udp_ota.stop();
32+
end();
3333
}
3434

3535
ArduinoOTAClass &ArduinoOTAClass::onStart(THandlerFunction fn) {

Diff for: ‎libraries/ESP32/examples/Camera/CameraWebServer/app_httpd.cpp

+2
Original file line numberDiff line numberDiff line change
@@ -281,6 +281,8 @@ static esp_err_t stream_handler(httpd_req_t *req) {
281281
int64_t fr_end = esp_timer_get_time();
282282

283283
int64_t frame_time = fr_end - last_frame;
284+
last_frame = fr_end;
285+
284286
frame_time /= 1000;
285287
#if ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_INFO
286288
uint32_t avg_frame_time = ra_filter_run(&ra_filter, frame_time);

Diff for: ‎libraries/HTTPClient/examples/BasicHttpsClient/BasicHttpsClient.ino

+25-23
Original file line numberDiff line numberDiff line change
@@ -14,30 +14,32 @@
1414

1515
#include <NetworkClientSecure.h>
1616

17-
// This is a Baltimore CyberTrust cert, the root Certificate Authority that
17+
// This is a Google Trust Services cert, the root Certificate Authority that
1818
// signed the server certificate for the demo server https://jigsaw.w3.org in this
19-
// example. This certificate is valid until Mon, 12 May 2025 23:59:00 GMT
20-
const char *rootCACertificate = "-----BEGIN CERTIFICATE-----\n"
21-
"MIIDdzCCAl+gAwIBAgIEAgAAuTANBgkqhkiG9w0BAQUFADBaMQswCQYDVQQGEwJJ\n"
22-
"RTESMBAGA1UEChMJQmFsdGltb3JlMRMwEQYDVQQLEwpDeWJlclRydXN0MSIwIAYD\n"
23-
"VQQDExlCYWx0aW1vcmUgQ3liZXJUcnVzdCBSb290MB4XDTAwMDUxMjE4NDYwMFoX\n"
24-
"DTI1MDUxMjIzNTkwMFowWjELMAkGA1UEBhMCSUUxEjAQBgNVBAoTCUJhbHRpbW9y\n"
25-
"ZTETMBEGA1UECxMKQ3liZXJUcnVzdDEiMCAGA1UEAxMZQmFsdGltb3JlIEN5YmVy\n"
26-
"VHJ1c3QgUm9vdDCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAKMEuyKr\n"
27-
"mD1X6CZymrV51Cni4eiVgLGw41uOKymaZN+hXe2wCQVt2yguzmKiYv60iNoS6zjr\n"
28-
"IZ3AQSsBUnuId9Mcj8e6uYi1agnnc+gRQKfRzMpijS3ljwumUNKoUMMo6vWrJYeK\n"
29-
"mpYcqWe4PwzV9/lSEy/CG9VwcPCPwBLKBsua4dnKM3p31vjsufFoREJIE9LAwqSu\n"
30-
"XmD+tqYF/LTdB1kC1FkYmGP1pWPgkAx9XbIGevOF6uvUA65ehD5f/xXtabz5OTZy\n"
31-
"dc93Uk3zyZAsuT3lySNTPx8kmCFcB5kpvcY67Oduhjprl3RjM71oGDHweI12v/ye\n"
32-
"jl0qhqdNkNwnGjkCAwEAAaNFMEMwHQYDVR0OBBYEFOWdWTCCR1jMrPoIVDaGezq1\n"
33-
"BE3wMBIGA1UdEwEB/wQIMAYBAf8CAQMwDgYDVR0PAQH/BAQDAgEGMA0GCSqGSIb3\n"
34-
"DQEBBQUAA4IBAQCFDF2O5G9RaEIFoN27TyclhAO992T9Ldcw46QQF+vaKSm2eT92\n"
35-
"9hkTI7gQCvlYpNRhcL0EYWoSihfVCr3FvDB81ukMJY2GQE/szKN+OMY3EU/t3Wgx\n"
36-
"jkzSswF07r51XgdIGn9w/xZchMB5hbgF/X++ZRGjD8ACtPhSNzkE1akxehi/oCr0\n"
37-
"Epn3o0WC4zxe9Z2etciefC7IpJ5OCBRLbf1wbWsaY71k5h+3zvDyny67G7fyUIhz\n"
38-
"ksLi4xaNmjICq44Y3ekQEe5+NauQrz4wlHrQMz2nZQ/1/I6eYs9HRCwBXbsdtTLS\n"
39-
"R9I4LtD+gdwyah617jzV/OeBHRnDJELqYzmp\n"
40-
"-----END CERTIFICATE-----\n";
19+
// example. This certificate is valid until Jan 28 00:00:42 2028 GMT
20+
const char *rootCACertificate = R"string_literal(
21+
-----BEGIN CERTIFICATE-----
22+
MIIDejCCAmKgAwIBAgIQf+UwvzMTQ77dghYQST2KGzANBgkqhkiG9w0BAQsFADBX
23+
MQswCQYDVQQGEwJCRTEZMBcGA1UEChMQR2xvYmFsU2lnbiBudi1zYTEQMA4GA1UE
24+
CxMHUm9vdCBDQTEbMBkGA1UEAxMSR2xvYmFsU2lnbiBSb290IENBMB4XDTIzMTEx
25+
NTAzNDMyMVoXDTI4MDEyODAwMDA0MlowRzELMAkGA1UEBhMCVVMxIjAgBgNVBAoT
26+
GUdvb2dsZSBUcnVzdCBTZXJ2aWNlcyBMTEMxFDASBgNVBAMTC0dUUyBSb290IFI0
27+
MHYwEAYHKoZIzj0CAQYFK4EEACIDYgAE83Rzp2iLYK5DuDXFgTB7S0md+8Fhzube
28+
Rr1r1WEYNa5A3XP3iZEwWus87oV8okB2O6nGuEfYKueSkWpz6bFyOZ8pn6KY019e
29+
WIZlD6GEZQbR3IvJx3PIjGov5cSr0R2Ko4H/MIH8MA4GA1UdDwEB/wQEAwIBhjAd
30+
BgNVHSUEFjAUBggrBgEFBQcDAQYIKwYBBQUHAwIwDwYDVR0TAQH/BAUwAwEB/zAd
31+
BgNVHQ4EFgQUgEzW63T/STaj1dj8tT7FavCUHYwwHwYDVR0jBBgwFoAUYHtmGkUN
32+
l8qJUC99BM00qP/8/UswNgYIKwYBBQUHAQEEKjAoMCYGCCsGAQUFBzAChhpodHRw
33+
Oi8vaS5wa2kuZ29vZy9nc3IxLmNydDAtBgNVHR8EJjAkMCKgIKAehhxodHRwOi8v
34+
Yy5wa2kuZ29vZy9yL2dzcjEuY3JsMBMGA1UdIAQMMAowCAYGZ4EMAQIBMA0GCSqG
35+
SIb3DQEBCwUAA4IBAQAYQrsPBtYDh5bjP2OBDwmkoWhIDDkic574y04tfzHpn+cJ
36+
odI2D4SseesQ6bDrarZ7C30ddLibZatoKiws3UL9xnELz4ct92vID24FfVbiI1hY
37+
+SW6FoVHkNeWIP0GCbaM4C6uVdF5dTUsMVs/ZbzNnIdCp5Gxmx5ejvEau8otR/Cs
38+
kGN+hr/W5GvT1tMBjgWKZ1i4//emhA1JG1BbPzoLJQvyEotc03lXjTaCzv8mEbep
39+
8RqZ7a2CPsgRbuvTPBwcOMBBmuFeU88+FSBX6+7iP0il8b4Z0QFqIwwMHfs/L6K1
40+
vepuoxtGzi4CZ68zJpiq1UvSqTbFJjtbD4seiMHl
41+
-----END CERTIFICATE-----
42+
)string_literal";
4143

4244
// Not sure if NetworkClientSecure checks the validity date of the certificate.
4345
// Setting clock just to be sure...

Diff for: ‎libraries/LittleFS/src/LittleFS.cpp

+4-2
Original file line numberDiff line numberDiff line change
@@ -95,9 +95,11 @@ void LittleFSFS::end() {
9595
}
9696

9797
bool LittleFSFS::format() {
98-
disableCore0WDT();
98+
bool wdt_active = disableCore0WDT();
9999
esp_err_t err = esp_littlefs_format(partitionLabel_);
100-
enableCore0WDT();
100+
if (wdt_active) {
101+
enableCore0WDT();
102+
}
101103
if (err) {
102104
log_e("Formatting LittleFS failed! Error: %d", err);
103105
return false;

Diff for: ‎libraries/Network/src/NetworkEvents.cpp

+6-2
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,10 @@
88
#include "esp_task.h"
99
#include "esp32-hal.h"
1010

11+
#ifndef ARDUINO_NETWORK_EVENT_TASK_STACK_SIZE
12+
#define ARDUINO_NETWORK_EVENT_TASK_STACK_SIZE 4096
13+
#endif
14+
1115
NetworkEvents::NetworkEvents() : _arduino_event_group(NULL), _arduino_event_queue(NULL), _arduino_event_task_handle(NULL) {}
1216

1317
NetworkEvents::~NetworkEvents() {
@@ -61,8 +65,8 @@ bool NetworkEvents::initNetworkEvents() {
6165
[](void *self) {
6266
static_cast<NetworkEvents *>(self)->_checkForEvent();
6367
},
64-
"arduino_events", // label
65-
4096, // event task's stack size
68+
"arduino_events", // label
69+
ARDUINO_NETWORK_EVENT_TASK_STACK_SIZE, // event task's stack size
6670
this, ESP_TASKD_EVENT_PRIO - 1, &_arduino_event_task_handle, ARDUINO_EVENT_RUNNING_CORE
6771
);
6872
if (!_arduino_event_task_handle) {

Diff for: ‎libraries/README.md

+3
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,9 @@ arduino-esp32 includes libraries for Arduino compatibility along with some objec
8888
### SPIFFS
8989
SPI Flash Filesystem (see [spiffs-plugin](https://github.com/me-no-dev/arduino-esp32fs-plugin) to upload to device)
9090

91+
### SR
92+
ESP-SR helps users build AI speech solutions based on ESP32-S3 or ESP32-P4 chips
93+
9194
### Ticker
9295
A timer to call functions on an interval
9396

Diff for: ‎libraries/SPIFFS/src/SPIFFS.cpp

+4-2
Original file line numberDiff line numberDiff line change
@@ -91,9 +91,11 @@ void SPIFFSFS::end() {
9191
}
9292

9393
bool SPIFFSFS::format() {
94-
disableCore0WDT();
94+
bool wdt_active = disableCore0WDT();
9595
esp_err_t err = esp_spiffs_format(partitionLabel_);
96-
enableCore0WDT();
96+
if (wdt_active) {
97+
enableCore0WDT();
98+
}
9799
if (err) {
98100
log_e("Formatting SPIFFS failed! Error: %d", err);
99101
return false;

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