Fix for #723, SPI communication problem described in "Improve SPI interface (GIT8266O-397)" (GIT8266O-706) #1128
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If the data is aligned but the miso transmission byte length cannot be divided by 4 the following line caused memory corruption for last incomplete 4 byte chunk of trans->mosi array:
trans->miso[y] = SPI[host]->data_buf[y];
Operator precedence problem with the trans->bits.mosi / 8 + (trans->bits.mosi % 8) ? 1 : 0 fixed to trans->bits.mosi / 8 + ((trans->bits.mosi % 8) ? 1 : 0) also fixed.