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add regular scheduled functions, now also callable on yield() #6039

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Merged
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May 23, 2019
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1674c72
add regular scheduled functions, now also callable on `yield()`
d-a-v May 2, 2019
4f09a64
protect critical sections
d-a-v May 3, 2019
b6564c2
Merge branch 'master' into recurrentscheduledfunctions
d-a-v May 3, 2019
545dd35
fix emulation on host, use alternate interruopt locking method
d-a-v May 3, 2019
aa4f87e
fix emulation on host
d-a-v May 3, 2019
896b686
critical code protection (wip)
d-a-v May 3, 2019
fac39ed
add IRAM attrs where relevant
d-a-v May 3, 2019
6e48831
add host emulation fake defines
d-a-v May 3, 2019
b9bf95b
fix per https://github.com/esp8266/Arduino/pull/6039#commitcomment-33…
d-a-v May 4, 2019
37128a2
Merge branch 'master' into recurrentscheduledfunctions
earlephilhower May 5, 2019
36ac7dd
wonderful idea with a class and its destructor for interrupt locking
d-a-v May 5, 2019
499d2ea
remove duplicate interrupt lock class
d-a-v May 6, 2019
19955d8
Merge commit '625c3a62c4991347e8298fb5e4021bc6f6df7099' into recurren…
d-a-v May 13, 2019
fc9ff2a
Merge branch 'master' into recurrentscheduledfunctions
d-a-v May 14, 2019
97fde51
Merge branch 'master' into recurrentscheduledfunctions
d-a-v May 15, 2019
cce44be
Merge branch 'recurrentscheduledfunctions' of github.com:d-a-v/Arduin…
d-a-v May 16, 2019
83ab383
remove ScheduledFunctions per https://github.com/esp8266/Arduino/pull…
d-a-v May 16, 2019
8f1953e
Merge branch 'master' into recurrentscheduledfunctions
d-a-v May 16, 2019
d2e5fbc
Merge branch 'master' into recurrentscheduledfunctions
d-a-v May 18, 2019
58cfb7b
Merge branch 'master' into recurrentscheduledfunctions
d-a-v May 20, 2019
c042640
restore FIFO
d-a-v May 20, 2019
9854ad0
fix comments per review
d-a-v May 21, 2019
e42d104
Merge branch 'recurrentscheduledfunctions' of github.com:d-a-v/Arduin…
d-a-v May 22, 2019
c064a58
uodates per review
d-a-v May 22, 2019
8f022c6
fixes per review
d-a-v May 22, 2019
e2ad457
fixes per review
d-a-v May 22, 2019
16c7e62
fix inverted logic missed from review
d-a-v May 22, 2019
7982a7f
fix per review https://github.com/d-a-v/Arduino/pull/6 (1/2)
d-a-v May 23, 2019
65603a3
fix dangling pointer per https://github.com/d-a-v/Arduino/pull/6 last…
d-a-v May 23, 2019
24474c8
pass lambdas with const refs
d-a-v May 23, 2019
d9c2270
Proposed changes from review
dok-net May 22, 2019
df839c2
Initial count not applied anymore
dok-net May 23, 2019
40dbcc1
Merge pull request #6 from dok-net/d-a-v/recurrentscheduledfunctions
d-a-v May 23, 2019
8e06c30
cosmetics
d-a-v May 23, 2019
a98cf9d
Merge branch 'master' into recurrentscheduledfunctions
earlephilhower May 23, 2019
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9 changes: 9 additions & 0 deletions cores/esp8266/Arduino.h
Original file line number Diff line number Diff line change
Expand Up @@ -165,6 +165,15 @@ void ets_intr_unlock();
#define interrupts() xt_rsil(0)
#define noInterrupts() xt_rsil(15)

#define lockEnterVar(varSave, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) : "=a" (varSave))
#define lockLeaveVar(varSave) __asm__ __volatile__("wsr %0,ps; isync" :: "a" (varSave) : "memory")

#define lockDeclM() uint32_t intrState
#define lockEnterM() lockEnterVar(intrState, 15)
#define lockLeaveM() lockLeaveVar(intrState)

#define lockEnter() lockDeclM(); lockEnterM()
#define lockLeave() lockLeaveM()

#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
#define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() )
Expand Down
2 changes: 2 additions & 0 deletions cores/esp8266/FunctionalInterrupt.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,8 @@
#include "Arduino.h"
#include <ScheduledFunctions.h>

static ScheduledFunctions* scheduledInterrupts;

// Duplicate typedefs from core_esp8266_wiring_digital_c
typedef void (*voidFuncPtr)(void);
typedef void (*voidFuncPtrArg)(void*);
Expand Down
1 change: 0 additions & 1 deletion cores/esp8266/FunctionalInterrupt.h
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,6 @@ struct ArgStructure {
FunctionInfo* functionInfo = nullptr;
};

static ScheduledFunctions* scheduledInterrupts;
void attachInterrupt(uint8_t pin, std::function<void(void)> intRoutine, int mode);
void attachScheduledInterrupt(uint8_t pin, std::function<void(InterruptInfo)> scheduledIntRoutine, int mode);

Expand Down
12 changes: 7 additions & 5 deletions cores/esp8266/PolledTimeout.h
Original file line number Diff line number Diff line change
Expand Up @@ -153,7 +153,7 @@ class timeoutTemplate
reset(userTimeout);
}

ICACHE_RAM_ATTR
IRAM_ATTR // fast
bool expired()
{
YieldPolicyT::execute(); //in case of DoNothing: gets optimized away
Expand All @@ -162,7 +162,7 @@ class timeoutTemplate
return expiredOneShot();
}

ICACHE_RAM_ATTR
IRAM_ATTR // fast
operator bool()
{
return expired();
Expand All @@ -178,13 +178,15 @@ class timeoutTemplate
return _timeout != alwaysExpired;
}

IRAM_ATTR // called from ISR
void reset(const timeType newUserTimeout)
{
reset();
_timeout = TimePolicyT::toTimeTypeUnit(newUserTimeout);
_neverExpires = (newUserTimeout < 0) || (newUserTimeout > timeMax());
}

IRAM_ATTR // called from ISR
void reset()
{
_start = TimePolicyT::time();
Expand All @@ -208,7 +210,7 @@ class timeoutTemplate

private:

ICACHE_RAM_ATTR
IRAM_ATTR // fast
bool checkExpired(const timeType internalUnit) const
{
// canWait() is not checked here
Expand All @@ -218,7 +220,7 @@ class timeoutTemplate

protected:

ICACHE_RAM_ATTR
IRAM_ATTR // fast
bool expiredRetrigger()
{
if (!canWait())
Expand All @@ -234,7 +236,7 @@ class timeoutTemplate
return false;
}

ICACHE_RAM_ATTR
IRAM_ATTR // fast
bool expiredOneShot() const
{
// returns "always expired" or "has expired"
Expand Down
76 changes: 43 additions & 33 deletions cores/esp8266/Schedule.cpp
Original file line number Diff line number Diff line change
@@ -1,28 +1,29 @@
#include "Schedule.h"
#include "PolledTimeout.h"

typedef std::function<bool(void)> mFuncT;

struct scheduled_fn_t
{
scheduled_fn_t* mNext;
std::function<void(void)> mFunc;
mFuncT mFunc;
esp8266::polledTimeout::periodicFastUs callNow;

scheduled_fn_t(): callNow(esp8266::polledTimeout::periodicFastUs::alwaysExpired) { }
};

static scheduled_fn_t* sFirst = 0;
static scheduled_fn_t* sLast = 0;

static scheduled_fn_t* sFirstUnused = 0;
static scheduled_fn_t* sLastUnused = 0;

static int sCount = 0;

IRAM_ATTR // called from ISR
static scheduled_fn_t* get_fn() {
scheduled_fn_t* result = NULL;
// try to get an item from unused items list
if (sFirstUnused) {
result = sFirstUnused;
sFirstUnused = result->mNext;
if (sFirstUnused == NULL) {
sLastUnused = NULL;
}
}
// if no unused items, and count not too high, allocate a new one
else if (sCount != SCHEDULED_FN_MAX_COUNT) {
Expand All @@ -35,44 +36,53 @@ static scheduled_fn_t* get_fn() {

static void recycle_fn(scheduled_fn_t* fn)
{
if (!sLastUnused) {
sFirstUnused = fn;
}
else {
sLastUnused->mNext = fn;
}
fn->mNext = NULL;
sLastUnused = fn;
fn->mNext = sFirstUnused;
sFirstUnused = fn;
}

bool schedule_function(std::function<void(void)> fn)
IRAM_ATTR // called from ISR
bool schedule_function_us(mFuncT fn, uint32_t repeat_us)
{
lockEnter();

scheduled_fn_t* item = get_fn();
if (!item) {
lockLeave();
return false;
}
item->mFunc = fn;
item->mNext = NULL;
if (!sFirst) {
sFirst = item;
}
else {
sLast->mNext = item;
}
sLast = item;
item->mNext = sFirst;
sFirst = item;

lockLeave();

if (repeat_us)
item->callNow.reset(repeat_us);

return true;
}

IRAM_ATTR // called from ISR
bool schedule_function(std::function<void(void)> fn)
{
return schedule_function_us([&fn](){ fn(); return false; }, 0);
}

void run_scheduled_functions()
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IMHO: This linked-list implementation is not - probably never was - preemption safe, generally a compiler will keep the values of all the pointers in registers, even on the single-core ESP8266 an IRQ will not flush the registers but just push them to the stack and restore them, therefore any IRQ that's scheduling functions fails during an ongoing run_scheduled_functions(). Blocking IRQs during the complete execution of run_scheduled_functions makes it thread/IRQ safe, but I don't think this is permissible from an IRQ performance POV.

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Good point.
We don't want to lock while executing the scheduled function themselvses.
One solution is to tag variables with volatile.
Another one is to build a local copy of the list while being locked, then unlock and run that list.

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@d-a-v d-a-v May 23, 2019

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I think I must step back on this.
Locking IRQ is the right thing to do when the value of a variable can be modified in a TAS block.
Even if there are registers holding some variables, they will not be changed while in a locked block because an IRQ won't occur in that block, regardless whether the variable is cached in a register.

I think the compiler will not / must not optimize a variable into registers when is it not declared locally.

{
scheduled_fn_t* rFirst = sFirst;
sFirst = NULL;
sLast = NULL;
while (rFirst) {
scheduled_fn_t* item = rFirst;
rFirst = item->mNext;
item->mFunc();
item->mFunc = std::function<void(void)>();
recycle_fn(item);
scheduled_fn_t* toCall = sFirst;
while (toCall) {
scheduled_fn_t* item = toCall;
toCall = item->mNext;
if (item->callNow && !item->mFunc())
{
lockEnter();
if (sFirst == item)
sFirst = item->mNext;
lockLeave();

item->mFunc = mFuncT();
recycle_fn(item);
}
}
}
12 changes: 8 additions & 4 deletions cores/esp8266/Schedule.h
Original file line number Diff line number Diff line change
Expand Up @@ -6,20 +6,24 @@
#define SCHEDULED_FN_MAX_COUNT 32
#define SCHEDULED_FN_INITIAL_COUNT 4

// Warning
// This API is not considered stable.
// Warning
// This API is not considered stable.
// Function signatures will change.
// You have been warned.

// Run given function next time `loop` function returns,
// Run given function ONCE next time `loop` function returns,
// or `yield` is called,
// or `run_scheduled_functions` is called.
// Use std::bind to pass arguments to a function, or call a class member function.
// Note: there is no mechanism for cancelling scheduled functions.
// Keep that in mind when binding functions to objects which may have short lifetime.
// Returns false if the number of scheduled functions exceeds SCHEDULED_FN_MAX_COUNT.
bool schedule_function(std::function<void(void)> fn);

// Run all scheduled functions.
// run given function every at least <repeat_us> microseconds until it returns false
bool schedule_function_us(std::function<bool(void)> fn, uint32_t repeat_us);

// Run all scheduled functions.
// Use this function if your are not using `loop`, or `loop` does not return
// on a regular basis.
void run_scheduled_functions();
Expand Down
5 changes: 3 additions & 2 deletions cores/esp8266/core_esp8266_main.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -91,13 +91,15 @@ extern "C" void esp_yield() {
}

extern "C" void esp_schedule() {
// always on CONT stack here
run_scheduled_functions();
ets_post(LOOP_TASK_PRIORITY, 0, 0);
}

extern "C" void __yield() {
if (cont_can_yield(g_pcont)) {
esp_schedule();
esp_yield();
cont_yield(g_pcont); //esp_yield();
}
else {
panic();
Expand All @@ -122,7 +124,6 @@ static void loop_wrapper() {
setup_done = true;
}
loop();
run_scheduled_functions();
esp_schedule();
}

Expand Down
30 changes: 12 additions & 18 deletions tests/host/common/Arduino.h
Original file line number Diff line number Diff line change
Expand Up @@ -143,26 +143,20 @@ extern "C" {
#define __STRINGIFY(a) #a
#endif

// these low level routines provide a replacement for SREG interrupt save that AVR uses
// but are esp8266 specific. A normal use pattern is like
//
//{
// uint32_t savedPS = xt_rsil(1); // this routine will allow level 2 and above
// // do work here
// xt_wsr_ps(savedPS); // restore the state
//}
//
// level (0-15), interrupts of the given level and above will be active
// level 15 will disable ALL interrupts,
// level 0 will enable ALL interrupts,
//
#define xt_rsil(level) (__extension__({uint32_t state; __asm__ __volatile__("rsil %0," __STRINGIFY(level) : "=a" (state)); state;}))
#define xt_wsr_ps(state) __asm__ __volatile__("wsr %0,ps; isync" :: "a" (state) : "memory")

#define xt_rsil(level) (level)
#define xt_wsr_ps(state) do { (void)(state); } while (0)

#define interrupts() xt_rsil(0)
#define noInterrupts() xt_rsil(15)



#define lockEnterVar(varSave, level) do { (void)(varSave); (void)(level); } while (0)
#define lockLeaveVar(varSave) do { (void)0; } while (0)
#define lockDeclM() do { (void)0; } while (0)
#define lockEnterM() do { (void)0; } while (0)
#define lockLeaveM() do { (void)0; } while (0)
#define lockEnter() do { (void)0; } while (0)
#define lockLeave() do { (void)0; } while (0)

#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
#define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() )
#define microsecondsToClockCycles(a) ( (a) * clockCyclesPerMicrosecond() )
Expand Down
3 changes: 3 additions & 0 deletions tests/host/common/c_types.h
Original file line number Diff line number Diff line change
Expand Up @@ -102,6 +102,9 @@ typedef enum {
#define ICACHE_RODATA_ATTR
#endif /* ICACHE_FLASH */

// counterpart https://github.com/espressif/arduino-esp32/blob/master/cores/esp32/esp8266-compat.h
#define IRAM_ATTR ICACHE_RAM_ATTR

#define STORE_ATTR __attribute__((aligned(4)))

#ifndef __cplusplus
Expand Down
3 changes: 3 additions & 0 deletions tools/sdk/include/c_types.h
Original file line number Diff line number Diff line change
Expand Up @@ -93,6 +93,9 @@ typedef enum {
#define ICACHE_RAM_ATTR
#endif /* ICACHE_FLASH */

// counterpart https://github.com/espressif/arduino-esp32/blob/master/cores/esp32/esp8266-compat.h
#define IRAM_ATTR ICACHE_RAM_ATTR

#define STORE_ATTR __attribute__((aligned(4)))

#ifndef __cplusplus
Expand Down