allow proper content length handling

.gitignore

@@ -72,4 +72,3 @@ nbproject
 build/macosx/esptool-*-osx.zip
 
 build/macosx/dist/osx-xtensa-lx106-elf.tgz
-/hardware/esp8266com/esp8266/tools

hardware/esp8266com/esp8266/libraries/ESP8266WebServer/src/ESP8266WebServer.cpp

@@ -140,11 +140,10 @@ void ESP8266WebServer::send(int code, const char* content_type, String content)
     content_type = "text/html";
 
   sendHeader("Content-Type", content_type, true);
-  if (_contentLength != CONTENT_LENGTH_UNKNOWN) {
-    size_t length = (_contentLength == CONTENT_LENGTH_NOT_SET) ? 
-                    content.length() : _contentLength;
-    String lengthStr(length);
-    sendHeader("Content-Length", lengthStr.c_str());
+  if (_contentLength != CONTENT_LENGTH_UNKNOWN && _contentLength != CONTENT_LENGTH_NOT_SET) {
+    sendHeader("Content-Length", String(_contentLength).c_str());
+  } else if(content.length() > 0){
+    sendHeader("Content-Length", String(content.length()).c_str());
   }
   sendHeader("Connection", "close");
   sendHeader("Access-Control-Allow-Origin", "*");

hardware/esp8266com/esp8266/tools/sdk/include/ets_sys.h

@@ -39,6 +39,7 @@ typedef struct _ETSTIMER_ {
 
 typedef void (*int_handler_t)(void*);
 
+#define ETS_SLC_INUM        1
 #define ETS_SPI_INUM        2
 #define ETS_GPIO_INUM       4
 #define ETS_UART_INUM       5
@@ -54,6 +55,12 @@ typedef void (*int_handler_t)(void*);
 #define ETS_INTR_UNLOCK() \
     ets_intr_unlock()
 
+#define ETS_INTR_ENABLE(inum) \
+    ets_isr_unmask((1<<inum))
+
+#define ETS_INTR_DISABLE(inum) \
+    ets_isr_mask((1<<inum))
+
 inline uint32_t ETS_INTR_ENABLED(void)
 {
     uint32_t enabled;
@@ -71,53 +78,64 @@ inline uint32_t ETS_INTR_PENDING(void)
 #define ETS_CCOMPARE0_INTR_ATTACH(func, arg) \
     ets_isr_attach(ETS_CCOMPARE0_INUM, (int_handler_t)(func), (void *)(arg))
 
+#define ETS_CCOMPARE0_ENABLE() \
+    ETS_INTR_ENABLE(ETS_CCOMPARE0_INUM)
+
+#define ETS_CCOMPARE0_DISABLE() \
+    ETS_INTR_DISABLE(ETS_CCOMPARE0_INUM)
+
+
 #define ETS_FRC_TIMER1_INTR_ATTACH(func, arg) \
     ets_isr_attach(ETS_FRC_TIMER1_INUM, (int_handler_t)(func), (void *)(arg))
 
 #define ETS_FRC_TIMER1_NMI_INTR_ATTACH(func) \
-	NmiTimSetFunc(func)
-
+    NmiTimSetFunc(func)
+
+#define ETS_FRC1_INTR_ENABLE() \
+    ETS_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
+
+#define ETS_FRC1_INTR_DISABLE() \
+    ETS_INTR_DISABLE(ETS_FRC_TIMER1_INUM)
+
+
 #define ETS_GPIO_INTR_ATTACH(func, arg) \
     ets_isr_attach(ETS_GPIO_INUM, (int_handler_t)(func), (void *)(arg))
 
-#define ETS_UART_INTR_ATTACH(func, arg) \
-    ets_isr_attach(ETS_UART_INUM, (int_handler_t)(func), (void *)(arg))
-
-#define ETS_SPI_INTR_ATTACH(func, arg) \
-    ets_isr_attach(ETS_SPI_INUM, (int_handler_t)(func), (void *)(arg))
+#define ETS_GPIO_INTR_ENABLE() \
+    ETS_INTR_ENABLE(ETS_GPIO_INUM)
 
-#define ETS_INTR_ENABLE(inum) \
-    ets_isr_unmask((1<<inum))
+#define ETS_GPIO_INTR_DISABLE() \
+    ETS_INTR_DISABLE(ETS_GPIO_INUM)
 
-#define ETS_INTR_DISABLE(inum) \
-    ets_isr_mask((1<<inum))
 
-#define ETS_SPI_INTR_ENABLE() \
-    ETS_INTR_ENABLE(ETS_SPI_INUM)
+#define ETS_UART_INTR_ATTACH(func, arg) \
+    ets_isr_attach(ETS_UART_INUM, (int_handler_t)(func), (void *)(arg))
 
 #define ETS_UART_INTR_ENABLE() \
     ETS_INTR_ENABLE(ETS_UART_INUM)
 
 #define ETS_UART_INTR_DISABLE() \
     ETS_INTR_DISABLE(ETS_UART_INUM)
 
-#define ETS_CCOMPARE0_ENABLE() \
-	ETS_INTR_ENABLE(ETS_CCOMPARE0_INUM)
 
-#define ETS_CCOMPARE0_DISABLE() \
-	ETS_INTR_DISABLE(ETS_CCOMPARE0_INUM)
+#define ETS_SPI_INTR_ATTACH(func, arg) \
+    ets_isr_attach(ETS_SPI_INUM, (int_handler_t)(func), (void *)(arg))
 
-#define ETS_FRC1_INTR_ENABLE() \
-	ETS_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
+#define ETS_SPI_INTR_ENABLE() \
+    ETS_INTR_ENABLE(ETS_SPI_INUM)
 
-#define ETS_FRC1_INTR_DISABLE() \
-	ETS_INTR_DISABLE(ETS_FRC_TIMER1_INUM)
+#define ETS_SPI_INTR_DISABLE() \
+    ETS_INTR_DISABLE(ETS_SPI_INUM)
 
-#define ETS_GPIO_INTR_ENABLE() \
-    ETS_INTR_ENABLE(ETS_GPIO_INUM)
 
-#define ETS_GPIO_INTR_DISABLE() \
-    ETS_INTR_DISABLE(ETS_GPIO_INUM)
+#define ETS_SLC_INTR_ATTACH(func, arg) \
+    ets_isr_attach(ETS_SLC_INUM, (int_handler_t)(func), (void *)(arg))
+
+#define ETS_SLC_INTR_ENABLE() \
+    ETS_INTR_ENABLE(ETS_SLC_INUM)
+
+#define ETS_SLC_INTR_DISABLE() \
+    ETS_INTR_DISABLE(ETS_SLC_INUM)
 
 
 void *pvPortMalloc(size_t xWantedSize) __attribute__((malloc, alloc_size(1)));

hardware/esp8266com/esp8266/tools/sdk/include/i2s_reg.h

@@ -0,0 +1,118 @@
+/*
+ *  Copyright (c) 2010 - 2011 Espressif System
+ *
+ */
+
+#ifndef I2S_REGISTER_H_
+#define I2S_REGISTER_H_
+
+#define DR_REG_I2S_BASE (0x60000e00)
+
+#define I2STXFIFO  (DR_REG_I2S_BASE + 0x0000)
+#define I2SRXFIFO  (DR_REG_I2S_BASE + 0x0004)
+#define I2SCONF  (DR_REG_I2S_BASE + 0x0008)
+#define I2S_BCK_DIV_NUM 0x0000003F
+#define I2S_BCK_DIV_NUM_S 22
+#define I2S_CLKM_DIV_NUM 0x0000003F
+#define I2S_CLKM_DIV_NUM_S 16
+#define I2S_BITS_MOD 0x0000000F
+#define I2S_BITS_MOD_S 12
+#define I2S_RECE_MSB_SHIFT (BIT(11))
+#define I2S_TRANS_MSB_SHIFT (BIT(10))
+#define I2S_I2S_RX_START (BIT(9))
+#define I2S_I2S_TX_START (BIT(8))
+#define I2S_MSB_RIGHT (BIT(7))
+#define I2S_RIGHT_FIRST (BIT(6))
+#define I2S_RECE_SLAVE_MOD (BIT(5))
+#define I2S_TRANS_SLAVE_MOD (BIT(4))
+#define I2S_I2S_RX_FIFO_RESET (BIT(3))
+#define I2S_I2S_TX_FIFO_RESET (BIT(2))
+#define I2S_I2S_RX_RESET (BIT(1))
+#define I2S_I2S_TX_RESET (BIT(0))
+#define I2S_I2S_RESET_MASK 0xf
+
+#define I2SINT_RAW (DR_REG_I2S_BASE + 0x000c)
+#define I2S_I2S_TX_REMPTY_INT_RAW (BIT(5))
+#define I2S_I2S_TX_WFULL_INT_RAW (BIT(4))
+#define I2S_I2S_RX_REMPTY_INT_RAW (BIT(3))
+#define I2S_I2S_RX_WFULL_INT_RAW (BIT(2))
+#define I2S_I2S_TX_PUT_DATA_INT_RAW (BIT(1))
+#define I2S_I2S_RX_TAKE_DATA_INT_RAW (BIT(0))
+
+
+#define I2SINT_ST (DR_REG_I2S_BASE + 0x0010)
+#define I2S_I2S_TX_REMPTY_INT_ST (BIT(5))
+#define I2S_I2S_TX_WFULL_INT_ST (BIT(4))
+#define I2S_I2S_RX_REMPTY_INT_ST (BIT(3))
+#define I2S_I2S_RX_WFULL_INT_ST (BIT(2))
+#define I2S_I2S_TX_PUT_DATA_INT_ST (BIT(1))
+#define I2S_I2S_RX_TAKE_DATA_INT_ST (BIT(0))
+
+#define I2SINT_ENA (DR_REG_I2S_BASE + 0x0014)
+#define I2S_I2S_TX_REMPTY_INT_ENA (BIT(5))
+#define I2S_I2S_TX_WFULL_INT_ENA (BIT(4))
+#define I2S_I2S_RX_REMPTY_INT_ENA (BIT(3))
+#define I2S_I2S_RX_WFULL_INT_ENA (BIT(2))
+#define I2S_I2S_TX_PUT_DATA_INT_ENA (BIT(1))
+#define I2S_I2S_RX_TAKE_DATA_INT_ENA (BIT(0))
+
+#define I2SINT_CLR (DR_REG_I2S_BASE + 0x0018)
+#define I2S_I2S_TX_REMPTY_INT_CLR (BIT(5))
+#define I2S_I2S_TX_WFULL_INT_CLR (BIT(4))
+#define I2S_I2S_RX_REMPTY_INT_CLR (BIT(3))
+#define I2S_I2S_RX_WFULL_INT_CLR (BIT(2))
+#define I2S_I2S_PUT_DATA_INT_CLR (BIT(1))
+#define I2S_I2S_TAKE_DATA_INT_CLR (BIT(0))
+
+#define I2STIMING (DR_REG_I2S_BASE + 0x001c)
+#define I2S_TRANS_BCK_IN_INV (BIT(22))
+#define I2S_RECE_DSYNC_SW (BIT(21))
+#define I2S_TRANS_DSYNC_SW (BIT(20))
+#define I2S_RECE_BCK_OUT_DELAY 0x00000003
+#define I2S_RECE_BCK_OUT_DELAY_S 18
+#define I2S_RECE_WS_OUT_DELAY 0x00000003
+#define I2S_RECE_WS_OUT_DELAY_S 16
+#define I2S_TRANS_SD_OUT_DELAY 0x00000003
+#define I2S_TRANS_SD_OUT_DELAY_S 14
+#define I2S_TRANS_WS_OUT_DELAY 0x00000003
+#define I2S_TRANS_WS_OUT_DELAY_S 12
+#define I2S_TRANS_BCK_OUT_DELAY 0x00000003
+#define I2S_TRANS_BCK_OUT_DELAY_S 10
+#define I2S_RECE_SD_IN_DELAY 0x00000003
+#define I2S_RECE_SD_IN_DELAY_S 8
+#define I2S_RECE_WS_IN_DELAY 0x00000003
+#define I2S_RECE_WS_IN_DELAY_S 6
+#define I2S_RECE_BCK_IN_DELAY 0x00000003
+#define I2S_RECE_BCK_IN_DELAY_S 4
+#define I2S_TRANS_WS_IN_DELAY 0x00000003
+#define I2S_TRANS_WS_IN_DELAY_S 2
+#define I2S_TRANS_BCK_IN_DELAY 0x00000003
+#define I2S_TRANS_BCK_IN_DELAY_S 0
+
+#define I2S_FIFO_CONF (DR_REG_I2S_BASE + 0x0020)
+#define I2S_I2S_RX_FIFO_MOD 0x00000007
+#define I2S_I2S_RX_FIFO_MOD_S 16
+#define I2S_I2S_TX_FIFO_MOD 0x00000007
+#define I2S_I2S_TX_FIFO_MOD_S 13
+#define I2S_I2S_DSCR_EN (BIT(12))
+#define I2S_I2S_TX_DATA_NUM 0x0000003F
+#define I2S_I2S_TX_DATA_NUM_S 6
+#define I2S_I2S_RX_DATA_NUM 0x0000003F
+#define I2S_I2S_RX_DATA_NUM_S 0
+
+
+#define I2SRXEOF_NUM (DR_REG_I2S_BASE + 0x0024)
+#define I2S_I2S_RX_EOF_NUM 0xFFFFFFFF
+#define I2S_I2S_RX_EOF_NUM_S 0
+
+#define I2SCONF_SIGLE_DATA (DR_REG_I2S_BASE + 0x0028)
+#define I2S_I2S_SIGLE_DATA 0xFFFFFFFF
+#define I2S_I2S_SIGLE_DATA_S 0
+
+#define I2SCONF_CHAN (DR_REG_I2S_BASE + 0x002c)
+#define I2S_RX_CHAN_MOD 0x00000003
+#define I2S_RX_CHAN_MOD_S 3
+#define I2S_TX_CHAN_MOD 0x00000007
+#define I2S_TX_CHAN_MOD_S 0
+
+#endif