add support for "serial1" (TX only)

[Links2004]

TX is working RX is disabled (only posible on GPIO 8 but we have no access to it)

in HardwareSerial.cpp in uart0_interrupt_handler add:

    status = READ_PERI_REG(UART_INT_ST(1));
    if (status & UART_TXFIFO_EMPTY_INT_ST)
    {
        WRITE_PERI_REG(UART_INT_CLR(1), UART_TXFIFO_EMPTY_INT_CLR);
        Serial1._tx_empty_irq();
    }

HardwareSerial1.cpp

/* 
  HardwareSerial1.cpp - esp8266 UART support

  Copyright (c) 2014 Ivan Grokhotkov. All rights reserved.
  This file is part of the esp8266 core for Arduino environment.

  This library is free software; you can redistribute it and/or
  modify it under the terms of the GNU Lesser General Public
  License as published by the Free Software Foundation; either
  version 2.1 of the License, or (at your option) any later version.

  This library is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  Lesser General Public License for more details.

  You should have received a copy of the GNU Lesser General Public
  License along with this library; if not, write to the Free Software
  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

  Modified 30 March 2015 by Markus Sattler (esp8266 platform support for UART1)
*/


#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <inttypes.h>
#include "Arduino.h"
#include "cbuf.h"

extern "C" {
#include "osapi.h"
#include "ets_sys.h"
#include "mem.h"
#include "uart_register.h"
#include "user_interface.h"
}

#include "HardwareSerial1.h"

HardwareSerial1 Serial1;

uart_t* uart1_init(int baud_rate);
void uart1_set_baudrate(uart_t* uart, int baud_rate);
int  uart1_get_baudrate(uart_t* uart);
void uart1_uninit(uart_t* uart);
void uart1_transmit(uart_t* uart, const char* buf, size_t size);    // may block on TX fifo
void uart1_wait_for_transmit(uart_t* uart);
void uart1_transmit_char(uart_t* uart, char c);  // does not block, but character will be lost if FIFO is full

void uart1_set_debug(bool enabled);
bool uart1_get_debug();

struct uart_
{
    int  baud_rate;
};

#define UART_TX_FIFO_SIZE 0x80
/*
void ICACHE_FLASH_ATTR uart1_interrupt_handler(uart_t* uart)
{
    uint32_t status = READ_PERI_REG(UART_INT_ST(1));
    if (status & UART_RXFIFO_FULL_INT_ST)
    {
        while(true)
        {
            int rx_count = (READ_PERI_REG(UART_STATUS(1)) >> UART_RXFIFO_CNT_S) & UART_RXFIFO_CNT;
            if (!rx_count)
                break;

            while(rx_count--)
            {
                char c = READ_PERI_REG(UART_FIFO(1)) & 0xFF;
                Serial1._rx_complete_irq(c);
            }
        }
        WRITE_PERI_REG(UART_INT_CLR(1), UART_RXFIFO_FULL_INT_CLR);
    }

    if (status & UART_TXFIFO_EMPTY_INT_ST)
    {
        WRITE_PERI_REG(UART_INT_CLR(1), UART_TXFIFO_EMPTY_INT_CLR);
        Serial1._tx_empty_irq();
    }
}
*/
void ICACHE_FLASH_ATTR uart1_wait_for_tx_fifo(size_t size_needed)
{
    while (true)
    {
        size_t tx_count = (READ_PERI_REG(UART_STATUS(1)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT;
        if (tx_count <= (UART_TX_FIFO_SIZE - size_needed))
            break;
    }
}

size_t ICACHE_FLASH_ATTR uart1_get_tx_fifo_room()
{
    return UART_TX_FIFO_SIZE - ((READ_PERI_REG(UART_STATUS(1)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT);
}

void ICACHE_FLASH_ATTR uart1_wait_for_transmit(uart_t* uart)
{
    uart1_wait_for_tx_fifo(UART_TX_FIFO_SIZE);
}

void ICACHE_FLASH_ATTR uart1_transmit_char(uart_t* uart, char c)
{
    WRITE_PERI_REG(UART_FIFO(1), c);
}

void ICACHE_FLASH_ATTR uart1_transmit(uart_t* uart, const char* buf, size_t size)
{
    while (size)
    {
        size_t part_size = (size > UART_TX_FIFO_SIZE) ? UART_TX_FIFO_SIZE : size;
        size -= part_size;

        uart1_wait_for_tx_fifo(part_size);
        for(;part_size;--part_size, ++buf)
            WRITE_PERI_REG(UART_FIFO(1), *buf);
    }
}

void ICACHE_FLASH_ATTR uart1_flush(uart_t* uart)
{
    SET_PERI_REG_MASK(UART_CONF0(1),  UART_TXFIFO_RST);  // UART_RXFIFO_RST |
    CLEAR_PERI_REG_MASK(UART_CONF0(1), UART_TXFIFO_RST); // UART_RXFIFO_RST |
}

void ICACHE_FLASH_ATTR uart1_interrupt_enable(uart_t* uart)
{
//    WRITE_PERI_REG(UART_INT_CLR(0), 0x1ff);
//    ETS_UART_INTR_ATTACH(&uart1_interrupt_handler, uart);
//    SET_PERI_REG_MASK(UART_INT_ENA(0), UART_RXFIFO_FULL_INT_ENA);
//    ETS_UART_INTR_ENABLE();
}

void ICACHE_FLASH_ATTR uart1_interrupt_disable(uart_t* uart)
{
    CLEAR_PERI_REG_MASK(UART_INT_ENA(1), UART_RXFIFO_FULL_INT_ENA);
    ETS_UART_INTR_DISABLE();
}

void ICACHE_FLASH_ATTR uart1_arm_tx_interrupt()
{
    SET_PERI_REG_MASK(UART_INT_ENA(1), UART_TXFIFO_EMPTY_INT_ENA);
}

void ICACHE_FLASH_ATTR uart1_disarm_tx_interrupt()
{
    CLEAR_PERI_REG_MASK(UART_INT_ENA(1), UART_TXFIFO_EMPTY_INT_ENA);
}

void ICACHE_FLASH_ATTR uart1_set_baudrate(uart_t* uart, int baud_rate)
{
    uart->baud_rate = baud_rate;
    uart_div_modify(1, UART_CLK_FREQ / (uart->baud_rate));
}

int ICACHE_FLASH_ATTR uart1_get_baudrate(uart_t* uart)
{
    return uart->baud_rate;
}

uart_t* ICACHE_FLASH_ATTR uart1_init(int baudrate)
{
    uart_t* uart = (uart_t*) os_malloc(sizeof(uart_t));

    PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
    PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);

    // NO RX PIN only possible GPIO8 but no access to it
    // PIN_PULLUP_EN(PERIPHS_IO_MUX_U0RXD_U);
    // PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);

    uart1_set_baudrate(uart, baudrate);
    WRITE_PERI_REG(UART_CONF0(1), 0x3 << UART_BIT_NUM_S);   // 8n1

    uart1_flush(uart);
    uart1_interrupt_enable(uart);

    WRITE_PERI_REG(UART_CONF1(1), ((0x20 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S));
    //((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |

    return uart;
}

void ICACHE_FLASH_ATTR uart1_uninit(uart_t* uart)
{
    uart1_interrupt_disable(uart);
    // TODO: revert pin functions
    os_free(uart);
}

void ICACHE_FLASH_ATTR uart1_swap(uart_t* uart)
{

}

void ICACHE_FLASH_ATTR
uart1_ignore_char(char c)
{    
}

void ICACHE_FLASH_ATTR
uart1_write_char(char c)
{
    if (c == '\n')
        WRITE_PERI_REG(UART_FIFO(1), '\r');

    WRITE_PERI_REG(UART_FIFO(1), c);
}

static bool s_uart_debug_enabled = true;
void ICACHE_FLASH_ATTR uart1_set_debug(bool enabled)
{
    s_uart_debug_enabled = enabled;
    if (enabled)
    {
        system_set_os_print(1);
        ets_install_putc1((void *)&uart1_write_char);
    }
    else
        ets_install_putc1((void *)&uart1_ignore_char);
}

bool ICACHE_FLASH_ATTR uart1_get_debug()
{
    return s_uart_debug_enabled;
}

ICACHE_FLASH_ATTR HardwareSerial1::HardwareSerial1() :
    _uart(0), _tx_buffer(0)
//_rx_buffer(0),
{
}

void ICACHE_FLASH_ATTR HardwareSerial1::begin(unsigned long baud, byte config)
{
 //   _rx_buffer = new cbuf(SERIAL1_RX_BUFFER_SIZE);
    _tx_buffer = new cbuf(SERIAL1_TX_BUFFER_SIZE);
    uart1_set_debug(false);
    _uart = uart1_init(baud);
    _written = false;
    delay(1);
}

void ICACHE_FLASH_ATTR HardwareSerial1::end()
{
    uart1_uninit(_uart);
 //   delete _rx_buffer;
    delete _tx_buffer;
    _uart = 0;
  //  _rx_buffer = 0;
    _tx_buffer = 0;
}

void ICACHE_FLASH_ATTR HardwareSerial1::swap()
{
}

void ICACHE_FLASH_ATTR HardwareSerial1::setDebugOutput(bool en)
{
    uart1_set_debug(en);
}

int ICACHE_FLASH_ATTR HardwareSerial1::available(void)
{
   // return static_cast<int>(_rx_buffer->getSize());
    return 0;
}

int ICACHE_FLASH_ATTR HardwareSerial1::peek(void)
{
    return -1;
   // return _rx_buffer->peek();
}

int ICACHE_FLASH_ATTR HardwareSerial1::read(void)
{
    return -1;
   // return _rx_buffer->read();
}

int ICACHE_FLASH_ATTR HardwareSerial1::availableForWrite(void)
{
    return static_cast<int>(_tx_buffer->room());
}

void ICACHE_FLASH_ATTR HardwareSerial1::flush()
{
    if (!_written)
        return;

    while (_tx_buffer->getSize() || uart1_get_tx_fifo_room() < UART_TX_FIFO_SIZE)
        yield();

    _written = false;
}

size_t ICACHE_FLASH_ATTR HardwareSerial1::write(uint8_t c)
{
    _written = true;
    size_t room = uart1_get_tx_fifo_room();
    if (room > 0 && _tx_buffer->empty())
    {
        uart1_transmit_char(_uart, c);
        if (room < 10)
        {
            uart1_arm_tx_interrupt();
        }
        return 1;
    }

    while (_tx_buffer->room() == 0)
    {
        yield();
    }

    _tx_buffer->write(c);
    return 1;
}

ICACHE_FLASH_ATTR HardwareSerial1::operator bool() const
{
    return _uart != 0;
}

void ICACHE_FLASH_ATTR HardwareSerial1::_rx_complete_irq(char c)
{
    //_rx_buffer->write(c);
}

void ICACHE_FLASH_ATTR HardwareSerial1::_tx_empty_irq(void)
{
    size_t queued = _tx_buffer->getSize();
    if (!queued)
    {
        uart1_disarm_tx_interrupt();
        return;
    }

    size_t room = uart1_get_tx_fifo_room();
    int n = static_cast<int>((queued < room) ? queued : room);
    while (n--)
    {
        uart1_transmit_char(_uart, _tx_buffer->read());
    }
}

HardwareSerial1.h

/*
  HardwareSerial.h - Hardware serial library for Wiring
  Copyright (c) 2006 Nicholas Zambetti.  All right reserved.

  This library is free software; you can redistribute it and/or
  modify it under the terms of the GNU Lesser General Public
  License as published by the Free Software Foundation; either
  version 2.1 of the License, or (at your option) any later version.

  This library is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  Lesser General Public License for more details.

  You should have received a copy of the GNU Lesser General Public
  License along with this library; if not, write to the Free Software
  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

  Modified 28 September 2010 by Mark Sproul
  Modified 14 August 2012 by Alarus
  Modified 3 December 2013 by Matthijs Kooijman
  Modified 18 December 2014 by Ivan Grokhotkov (esp8266 platform support)
  Modified 30 March 2015 by Markus Sattler (esp8266 platform support for UART1)
*/

#ifndef HardwareSerial1_h
#define HardwareSerial1_h

#include <inttypes.h>

#include "Stream.h"

#define SERIAL1_TX_BUFFER_SIZE 256
//#define SERIAL1_RX_BUFFER_SIZE 256

// // Define config for Serial.begin(baud, config);
// #define SERIAL_5N1 0x00
// #define SERIAL_6N1 0x02
// #define SERIAL_7N1 0x04
// #define SERIAL_8N1 0x06
// #define SERIAL_5N2 0x08
// #define SERIAL_6N2 0x0A
// #define SERIAL_7N2 0x0C
// #define SERIAL_8N2 0x0E
// #define SERIAL_5E1 0x20
// #define SERIAL_6E1 0x22
// #define SERIAL_7E1 0x24
// #define SERIAL_8E1 0x26
// #define SERIAL_5E2 0x28
// #define SERIAL_6E2 0x2A
// #define SERIAL_7E2 0x2C
// #define SERIAL_8E2 0x2E
// #define SERIAL_5O1 0x30
// #define SERIAL_6O1 0x32
// #define SERIAL_7O1 0x34
// #define SERIAL_8O1 0x36
// #define SERIAL_5O2 0x38
// #define SERIAL_6O2 0x3A
// #define SERIAL_7O2 0x3C
// #define SERIAL_8O2 0x3E

class cbuf;
typedef struct uart_ uart_t;

class HardwareSerial1 : public Stream
{
public:
    HardwareSerial1();

    void begin(unsigned long baud) { begin(baud, 0); }
    void begin(unsigned long, uint8_t);
    void end();
    void swap();  //use GPIO13 and GPIO15 as RX and TX
    int available(void) override;
    int peek(void) override;
    int read(void) override;
    int availableForWrite(void);
    void flush(void) override;
    size_t write(uint8_t) override;
    inline size_t write(unsigned long n) { return write((uint8_t)n); }
    inline size_t write(long n) { return write((uint8_t)n); }
    inline size_t write(unsigned int n) { return write((uint8_t)n); }
    inline size_t write(int n) { return write((uint8_t)n); }
    using Print::write; // pull in write(str) and write(buf, size) from Print
    operator bool() const;

    void setDebugOutput(bool);

    void _tx_empty_irq(void);

protected:
    friend void uart1_interrupt_handler(uart_t* uart);
    void _rx_complete_irq(char c);


protected:
    uart_t* _uart;
    cbuf*   _tx_buffer;
   // cbuf*   _rx_buffer;
    bool    _written;
};

extern HardwareSerial1 Serial1;

#endif

[igrr]

Thanks!
I'm sure this can be done better than duplicating all that code? Maybe
passing an argument to the HardwareSerial constructor (UART0/UART1) will do
the trick?
On Mar 30, 2015 9:16 PM, "Markus" [email protected] wrote:

TX is working RX is disabled (only posible on GPIO 8 but we have no access
to it)

in HardwareSerial.cpp in uart0_interrupt_handler add:

status = READ_PERI_REG(UART_INT_ST(1));
if (status & UART_TXFIFO_EMPTY_INT_ST)
{
    WRITE_PERI_REG(UART_INT_CLR(1), UART_TXFIFO_EMPTY_INT_CLR);
    Serial1._tx_empty_irq();
}

HardwareSerial1.cpp

/* HardwareSerial1.cpp - esp8266 UART support Copyright (c) 2014 Ivan Grokhotkov. All rights reserved. This file is part of the esp8266 core for Arduino environment. This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) any later version. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details. You should have received a copy of the GNU Lesser General Public License along with this library; if not, write to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA Modified 30 March 2015 by Markus Sattler (esp8266 platform support for UART1)*/

#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <inttypes.h>
#include "Arduino.h"
#include "cbuf.h"
extern "C" {
#include "osapi.h"
#include "ets_sys.h"
#include "mem.h"
#include "uart_register.h"
#include "user_interface.h"
}

#include "HardwareSerial1.h"

HardwareSerial1 Serial1;
uart_t* uart1_init(int baud_rate);void uart1_set_baudrate(uart_t* uart, int baud_rate);int uart1_get_baudrate(uart_t* uart);void uart1_uninit(uart_t* uart);void uart1_transmit(uart_t* uart, const char* buf, size_t size); // may block on TX fifovoid uart1_wait_for_transmit(uart_t* uart);void uart1_transmit_char(uart_t* uart, char c); // does not block, but character will be lost if FIFO is full
void uart1_set_debug(bool enabled);bool uart1_get_debug();
struct uart_
{
int baud_rate;
};

#define UART_TX_FIFO_SIZE 0x80/void ICACHE_FLASH_ATTR uart1_interrupt_handler(uart_t uart){ uint32_t status = READ_PERI_REG(UART_INT_ST(1)); if (status & UART_RXFIFO_FULL_INT_ST) { while(true) { int rx_count = (READ_PERI_REG(UART_STATUS(1)) >> UART_RXFIFO_CNT_S) & UART_RXFIFO_CNT; if (!rx_count) break; while(rx_count--) { char c = READ_PERI_REG(UART_FIFO(1)) & 0xFF; Serial1.rx_complete_irq(c); } } WRITE_PERI_REG(UART_INT_CLR(1), UART_RXFIFO_FULL_INT_CLR); } if (status & UART_TXFIFO_EMPTY_INT_ST) { WRITE_PERI_REG(UART_INT_CLR(1), UART_TXFIFO_EMPTY_INT_CLR); Serial1.tx_empty_irq(); }}/void ICACHE_FLASH_ATTR uart1_wait_for_tx_fifo(size_t size_needed)
{
while (true)
{
size_t tx_count = (READ_PERI_REG(UART_STATUS(1)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT;
if (tx_count <= (UART_TX_FIFO_SIZE - size_needed))
break;
}
}
size_t ICACHE_FLASH_ATTR uart1_get_tx_fifo_room()
{
return UART_TX_FIFO_SIZE - ((READ_PERI_REG(UART_STATUS(1)) >> UART_TXFIFO_CNT_S) & UART_TXFIFO_CNT);
}
void ICACHE_FLASH_ATTR uart1_wait_for_transmit(uart_t uart)
{
uart1_wait_for_tx_fifo(UART_TX_FIFO_SIZE);
}
void ICACHE_FLASH_ATTR uart1_transmit_char(uart_t* uart, char c)
{
WRITE_PERI_REG(UART_FIFO(1), c);
}
void ICACHE_FLASH_ATTR uart1_transmit(uart_t* uart, const char* buf, size_t size)
{
while (size)
{
size_t part_size = (size > UART_TX_FIFO_SIZE) ? UART_TX_FIFO_SIZE : size;
size -= part_size;

    uart1_wait_for_tx_fifo(part_size);
    for(;part_size;--part_size, ++buf)
        WRITE_PERI_REG(UART_FIFO(1), *buf);
}

}
void ICACHE_FLASH_ATTR uart1_flush(uart_t* uart)
{
SET_PERI_REG_MASK(UART_CONF0(1), UART_TXFIFO_RST); // UART_RXFIFO_RST |
CLEAR_PERI_REG_MASK(UART_CONF0(1), UART_TXFIFO_RST); // UART_RXFIFO_RST |
}
void ICACHE_FLASH_ATTR uart1_interrupt_enable(uart_t* uart)
{// WRITE_PERI_REG(UART_INT_CLR(0), 0x1ff);// ETS_UART_INTR_ATTACH(&uart1_interrupt_handler, uart);// SET_PERI_REG_MASK(UART_INT_ENA(0), UART_RXFIFO_FULL_INT_ENA);// ETS_UART_INTR_ENABLE();
}
void ICACHE_FLASH_ATTR uart1_interrupt_disable(uart_t* uart)
{
CLEAR_PERI_REG_MASK(UART_INT_ENA(1), UART_RXFIFO_FULL_INT_ENA);
ETS_UART_INTR_DISABLE();
}
void ICACHE_FLASH_ATTR uart1_arm_tx_interrupt()
{
SET_PERI_REG_MASK(UART_INT_ENA(1), UART_TXFIFO_EMPTY_INT_ENA);
}
void ICACHE_FLASH_ATTR uart1_disarm_tx_interrupt()
{
CLEAR_PERI_REG_MASK(UART_INT_ENA(1), UART_TXFIFO_EMPTY_INT_ENA);
}
void ICACHE_FLASH_ATTR uart1_set_baudrate(uart_t* uart, int baud_rate)
{
uart->baud_rate = baud_rate;
uart_div_modify(1, UART_CLK_FREQ / (uart->baud_rate));
}
int ICACHE_FLASH_ATTR uart1_get_baudrate(uart_t* uart)
{
return uart->baud_rate;
}
uart_t* ICACHE_FLASH_ATTR uart1_init(int baudrate)
{
uart_t* uart = (uart_t*) os_malloc(sizeof(uart_t));

PIN_PULLUP_DIS(PERIPHS_IO_MUX_GPIO2_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);

// NO RX PIN only possible GPIO8 but no access to it
// PIN_PULLUP_EN(PERIPHS_IO_MUX_U0RXD_U);
// PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);

uart1_set_baudrate(uart, baudrate);
WRITE_PERI_REG(UART_CONF0(1), 0x3 << UART_BIT_NUM_S);   // 8n1

uart1_flush(uart);
uart1_interrupt_enable(uart);

WRITE_PERI_REG(UART_CONF1(1), ((0x20 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S));
//((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |

return uart;

}
void ICACHE_FLASH_ATTR uart1_uninit(uart_t* uart)
{
uart1_interrupt_disable(uart);
// TODO: revert pin functions
os_free(uart);
}
void ICACHE_FLASH_ATTR uart1_swap(uart_t* uart)
{

}
void ICACHE_FLASH_ATTRuart1_ignore_char(char c)
{
}
void ICACHE_FLASH_ATTRuart1_write_char(char c)
{
if (c == '\n')
WRITE_PERI_REG(UART_FIFO(1), '\r');

WRITE_PERI_REG(UART_FIFO(1), c);

}
static bool s_uart_debug_enabled = true;void ICACHE_FLASH_ATTR uart1_set_debug(bool enabled)
{
s_uart_debug_enabled = enabled;
if (enabled)
{
system_set_os_print(1);
ets_install_putc1((void *)&uart1_write_char);
}
else
ets_install_putc1((void *)&uart1_ignore_char);
}
bool ICACHE_FLASH_ATTR uart1_get_debug()
{
return s_uart_debug_enabled;
}

ICACHE_FLASH_ATTR HardwareSerial1::HardwareSerial1() :
_uart(0), _tx_buffer(0)//_rx_buffer(0),
{
}
void ICACHE_FLASH_ATTR HardwareSerial1::begin(unsigned long baud, byte config)
{
// _rx_buffer = new cbuf(SERIAL1_RX_BUFFER_SIZE);
_tx_buffer = new cbuf(SERIAL1_TX_BUFFER_SIZE);
uart1_set_debug(false);
_uart = uart1_init(baud);
_written = false;
delay(1);
}
void ICACHE_FLASH_ATTR HardwareSerial1::end()
{
uart1_uninit(_uart);
// delete _rx_buffer;
delete _tx_buffer;
_uart = 0;
// _rx_buffer = 0;
_tx_buffer = 0;
}
void ICACHE_FLASH_ATTR HardwareSerial1::swap()
{
}
void ICACHE_FLASH_ATTR HardwareSerial1::setDebugOutput(bool en)
{
uart1_set_debug(en);
}
int ICACHE_FLASH_ATTR HardwareSerial1::available(void)
{
// return static_cast(_rx_buffer->getSize());
return 0;
}
int ICACHE_FLASH_ATTR HardwareSerial1::peek(void)
{
return -1;
// return _rx_buffer->peek();
}
int ICACHE_FLASH_ATTR HardwareSerial1::read(void)
{
return -1;
// return _rx_buffer->read();
}
int ICACHE_FLASH_ATTR HardwareSerial1::availableForWrite(void)
{
return static_cast(_tx_buffer->room());
}
void ICACHE_FLASH_ATTR HardwareSerial1::flush()
{
if (!_written)
return;

while (_tx_buffer->getSize() || uart1_get_tx_fifo_room() < UART_TX_FIFO_SIZE)
    yield();

_written = false;

}
size_t ICACHE_FLASH_ATTR HardwareSerial1::write(uint8_t c)
{
_written = true;
size_t room = uart1_get_tx_fifo_room();
if (room > 0 && _tx_buffer->empty())
{
uart1_transmit_char(_uart, c);
if (room < 10)
{
uart1_arm_tx_interrupt();
}
return 1;
}

while (_tx_buffer->room() == 0)
{
    yield();
}

_tx_buffer->write(c);
return 1;

}

ICACHE_FLASH_ATTR HardwareSerial1::operator bool() const
{
return _uart != 0;
}
void ICACHE_FLASH_ATTR HardwareSerial1::_rx_complete_irq(char c)
{
//_rx_buffer->write(c);
}
void ICACHE_FLASH_ATTR HardwareSerial1::_tx_empty_irq(void)
{
size_t queued = _tx_buffer->getSize();
if (!queued)
{
uart1_disarm_tx_interrupt();
return;
}

size_t room = uart1_get_tx_fifo_room();
int n = static_cast<int>((queued < room) ? queued : room);
while (n--)
{
    uart1_transmit_char(_uart, _tx_buffer->read());
}

}

HardwareSerial1.h

/* HardwareSerial.h - Hardware serial library for Wiring Copyright (c) 2006 Nicholas Zambetti. All right reserved. This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation; either version 2.1 of the License, or (at your option) any later version. This library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details. You should have received a copy of the GNU Lesser General Public License along with this library; if not, write to the Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA Modified 28 September 2010 by Mark Sproul Modified 14 August 2012 by Alarus Modified 3 December 2013 by Matthijs Kooijman Modified 18 December 2014 by Ivan Grokhotkov (esp8266 platform support) Modified 30 March 2015 by Markus Sattler (esp8266 platform support for UART1)*/

#ifndef HardwareSerial1_h
#define HardwareSerial1_h

#include <inttypes.h>

#include "Stream.h"

#define SERIAL1_TX_BUFFER_SIZE 256//#define SERIAL1_RX_BUFFER_SIZE 256
// // Define config for Serial.begin(baud, config);// #define SERIAL_5N1 0x00// #define SERIAL_6N1 0x02// #define SERIAL_7N1 0x04// #define SERIAL_8N1 0x06// #define SERIAL_5N2 0x08// #define SERIAL_6N2 0x0A// #define SERIAL_7N2 0x0C// #define SERIAL_8N2 0x0E// #define SERIAL_5E1 0x20// #define SERIAL_6E1 0x22// #define SERIAL_7E1 0x24// #define SERIAL_8E1 0x26// #define SERIAL_5E2 0x28// #define SERIAL_6E2 0x2A// #define SERIAL_7E2 0x2C// #define SERIAL_8E2 0x2E// #define SERIAL_5O1 0x30// #define SERIAL_6O1 0x32// #define SERIAL_7O1 0x34// #define SERIAL_8O1 0x36// #define SERIAL_5O2 0x38// #define SERIAL_6O2 0x3A// #define SERIAL_7O2 0x3C// #define SERIAL_8O2 0x3E
class cbuf;typedef struct uart_ uart_t;
class HardwareSerial1 : public Stream
{public:
HardwareSerial1();

void begin(unsigned long baud) { begin(baud, 0); }
void begin(unsigned long, uint8_t);
void end();
void swap();  //use GPIO13 and GPIO15 as RX and TX
int available(void) override;
int peek(void) override;
int read(void) override;
int availableForWrite(void);
void flush(void) override;
size_t write(uint8_t) override;
inline size_t write(unsigned long n) { return write((uint8_t)n); }
inline size_t write(long n) { return write((uint8_t)n); }
inline size_t write(unsigned int n) { return write((uint8_t)n); }
inline size_t write(int n) { return write((uint8_t)n); }
using Print::write; // pull in write(str) and write(buf, size) from Print
operator bool() const;

void setDebugOutput(bool);

void _tx_empty_irq(void);

protected:
friend void uart1_interrupt_handler(uart_t* uart);
void _rx_complete_irq(char c);

protected:
uart_t* _uart;
cbuf* _tx_buffer;
// cbuf* _rx_buffer;
bool _written;
};
extern HardwareSerial1 Serial1;

#endif

Reply to this email directly or view it on GitHub
#16.

[Links2004]

yes i think this is possible,
may i do this at weekend, today I simple do a fast implementation to test if it possible.

[reaper7]

a good source of examples with multi uart/spi/i2c
(of course for different platforms like msp430, lm4f, cc3200)
https://github.com/energia/Energia/tree/master/hardware

[igrr]

Fixed in #31