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GT-3228: Removed unneeded temporary variables and token field.
1 parent 3236686 commit 8f526ee

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3 files changed

+14
-22
lines changed

3 files changed

+14
-22
lines changed

Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -555,7 +555,6 @@ define token instr(32)
555555
BFA=(0,2)
556556
BFA2=(18,20)
557557
BF2=(23,25)
558-
BF_CR=(23,25)
559558
BH=(11,12)
560559
BH_BITS=(11,12)
561560
BH_RBE=(11,20)
@@ -1067,7 +1066,7 @@ attach variables [ D A B C S TH RA RB RS RT regp]
10671066
[ r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
10681067
r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 ];
10691068

1070-
attach variables [ BFA BI_CR CRFD CRFS CR_A CR_B CR_D CR_X BF_CR ]
1069+
attach variables [ BFA BI_CR CRFD CRFS CR_A CR_B CR_D CR_X ]
10711070
[cr0 cr1 cr2 cr3 cr4 cr5 cr6 cr7] ;
10721071

10731072
attach variables [ BI_CR_VLE BF_VLE ]

Ghidra/Processors/PowerPC/data/languages/ppc_isa.sinc

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2573,24 +2573,21 @@ define pcodeop InstructionCacheBlockLockSetX;
25732573
D = inst_next + sext(OFF16SH);
25742574
}
25752575

2576-
:cmpeqb BF_CR,A,B is $(NOTVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=224 & A & B & BF_CR {
2576+
:cmpeqb CRFD,A,B is $(NOTVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=224 & A & B & CRFD {
25772577
tmpa:1 = A:1;
2578-
tmps:1 = (tmpa == B[0,8]) | (tmpa == B[8,8]) | (tmpa == B[16,8]) | (tmpa == B[24,8]);
2578+
CRFD = (tmpa == B[0,8]) | (tmpa == B[8,8]) | (tmpa == B[16,8]) | (tmpa == B[24,8]);
25792579
@if REGISTER_SIZE == "8"
2580-
tmps = tmps | (tmpa == B[32,8]) | (tmpa == B[40,8]) | (tmpa == B[48,8]) | (tmpa == B[56,8]);
2580+
CRFD = CRFD | (tmpa == B[32,8]) | (tmpa == B[40,8]) | (tmpa == B[48,8]) | (tmpa == B[56,8]);
25812581
@endif
2582-
2583-
BF_CR = tmps;
25842582
}
25852583

2586-
:cmprb BF_CR,L2,A,B is $(NOTVLE) & OP=31 & BIT_22=0 & BIT_0=0 & XOP_1_10=192 & A & B & BF_CR & L2 {
2584+
:cmprb CRFD,L2,A,B is $(NOTVLE) & OP=31 & BIT_22=0 & BIT_0=0 & XOP_1_10=192 & A & B & CRFD & L2 {
25872585
tmpin:1 = A:1;
25882586
tmp1lo:1 = B[16,8];
25892587
tmp1hi:1 = B[24,8];
25902588
tmp2lo:1 = B[0,8];
25912589
tmp2hi:1 = B[8,8];
2592-
tmps:1 = ((tmpin >= tmp2lo) & (tmpin <= tmp2hi)) | (((tmpin >= tmp1lo) & (tmpin <= tmp1hi)) * L2:1);
2593-
BF_CR = tmps;
2590+
CRFD = ((tmpin >= tmp2lo) & (tmpin <= tmp2hi)) | (((tmpin >= tmp1lo) & (tmpin <= tmp1hi)) * L2:1);
25942591
}
25952592

25962593
:cnttzw A,S is OP=31 & S & A & BITS_11_15=0 & XOP_1_10=538 & Rc=0 {
@@ -2686,9 +2683,8 @@ define pcodeop InstructionCacheBlockLockSetX;
26862683
D = tmpp:8;
26872684
}
26882685

2689-
:mcrxrx BF_CR is $(NOTVLE) & OP=31 & BITS_11_22=0 & BIT_0=0 & XOP_1_10=576 & BF_CR {
2690-
tmp:1 = (xer_ov << 3) | (xer_ov32 << 2) | (xer_ca << 1) | (xer_ca32);
2691-
BF_CR = tmp;
2686+
:mcrxrx CRFD is $(NOTVLE) & OP=31 & BITS_11_22=0 & BIT_0=0 & XOP_1_10=576 & CRFD {
2687+
CRFD = (xer_ov << 3) | (xer_ov32 << 2) | (xer_ca << 1) | (xer_ca32);
26922688
}
26932689

26942690
:modsd D,A,B is $(NOTVLE) & OP=31 & D & A & B & XOP_1_10=777 & BIT_0=0 {

Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -555,8 +555,7 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) |
555555
:e_cmpi BF_VLE,A,SCALE is $(ISVLE) & OP=6 & XOP_11_VLE=21 & BITS_23_25=0 & A & BF_VLE & SCALE {
556556
tmpA:4 = A:4;
557557
tmpB:4 = SCALE:4;
558-
tmpC:1 = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
559-
BF_VLE = tmpC;
558+
BF_VLE = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
560559
}
561560

562561
:se_cmp RX_VLE,RY_VLE is $(ISVLE) & OP6_VLE=3 & BITS_8_9=0 & RX_VLE & RY_VLE {
@@ -580,8 +579,7 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) |
580579
:e_cmpli BF_VLE,A,SCALE is $(ISVLE) & OP=6 & XOP_11_VLE=21 & BITS_23_25=1 & A & BF_VLE & SCALE {
581580
tmpA:4 = A:4;
582581
tmpB:4 = SCALE:4;
583-
tmpC:1 = ((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
584-
BF_VLE = tmpC;
582+
BF_VLE = ((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
585583
}
586584

587585
:se_cmpl RX_VLE,RY_VLE is $(ISVLE) & OP6_VLE=3 & BITS_8_9=1 & RX_VLE & RY_VLE {
@@ -596,11 +594,10 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) |
596594
cr0 = ((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
597595
}
598596

599-
:e_cmph BF_CR,A,B is $(ISVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=14 & A & B & BF_CR {
597+
:e_cmph CRFD,A,B is $(ISVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=14 & A & B & CRFD {
600598
tmpA:2 = A:2;
601599
tmpB:2 = B:2;
602-
tmpC:1 = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
603-
BF_CR = tmpC;
600+
CRFD = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
604601
}
605602

606603
:se_cmph RX_VLE,RY_VLE is $(ISVLE) & OP6_VLE=3 & BITS_8_9=2 & RX_VLE & RY_VLE {
@@ -615,11 +612,11 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) |
615612
cr0 = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
616613
}
617614

618-
:e_cmphl BF_CR,A,B is $(ISVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=46 & A & B & BF_CR {
615+
:e_cmphl CRFD,A,B is $(ISVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=46 & A & B & CRFD {
619616
tmpA:2 = A:2;
620617
tmpB:2 = B:2;
621618
tmpC:1 = ((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
622-
BF_CR = tmpC;
619+
CRFD = tmpC;
623620
}
624621

625622
:se_cmphl RX_VLE,RY_VLE is $(ISVLE) & OP6_VLE=3 & BITS_8_9=3 & RX_VLE & RY_VLE {

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