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GhidorahRexGhidorahRex
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GT-3228: Corrected crall implementation for PowerPC comparisons
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3 files changed

+21
-19
lines changed

3 files changed

+21
-19
lines changed

‎Ghidra/Processors/PowerPC/data/languages/ppc_common.sinc

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -555,6 +555,7 @@ define token instr(32)
555555
BFA=(0,2)
556556
BFA2=(18,20)
557557
BF2=(23,25)
558+
BF_CR=(23,25)
558559
BH=(11,12)
559560
BH_BITS=(11,12)
560561
BH_RBE=(11,20)
@@ -1066,10 +1067,10 @@ attach variables [ D A B C S TH RA RB RS RT regp]
10661067
[ r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
10671068
r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 ];
10681069

1069-
attach variables [ BFA BI_CR CRFD CRFS CR_A CR_B CR_D CR_X ]
1070+
attach variables [ BFA BI_CR CRFD CRFS CR_A CR_B CR_D CR_X BF_CR ]
10701071
[cr0 cr1 cr2 cr3 cr4 cr5 cr6 cr7] ;
10711072

1072-
attach variables [ BI_CR_VLE ]
1073+
attach variables [ BI_CR_VLE BF_VLE ]
10731074
[cr0 cr1 cr2 cr3 ] ;
10741075

10751076
attach variables [ fD fB fA fC fS fT ]

‎Ghidra/Processors/PowerPC/data/languages/ppc_isa.sinc

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2573,23 +2573,24 @@ define pcodeop InstructionCacheBlockLockSetX;
25732573
D = inst_next + sext(OFF16SH);
25742574
}
25752575

2576-
:cmpeqb BF2,A,B is $(NOTVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=224 & A & B & BF2 {
2576+
:cmpeqb BF_CR,A,B is $(NOTVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=224 & A & B & BF_CR {
25772577
tmpa:1 = A:1;
25782578
tmps:1 = (tmpa == B[0,8]) | (tmpa == B[8,8]) | (tmpa == B[16,8]) | (tmpa == B[24,8]);
25792579
@if REGISTER_SIZE == "8"
25802580
tmps = tmps | (tmpa == B[32,8]) | (tmpa == B[40,8]) | (tmpa == B[48,8]) | (tmpa == B[56,8]);
25812581
@endif
2582-
tmpc:8 = zext(tmps);
2583-
crall = crall | (tmpc << ((BF2*8) + 2));
2582+
2583+
BF_CR = tmps;
25842584
}
25852585

2586-
:cmprb BF2,L2,A,B is $(NOTVLE) & OP=31 & BIT_22=0 & BIT_0=0 & XOP_1_10=192 & A & B & BF2 & L2 {
2586+
:cmprb BF_CR,L2,A,B is $(NOTVLE) & OP=31 & BIT_22=0 & BIT_0=0 & XOP_1_10=192 & A & B & BF_CR & L2 {
25872587
tmpin:1 = A:1;
25882588
tmp1lo:1 = B[16,8];
25892589
tmp1hi:1 = B[24,8];
25902590
tmp2lo:1 = B[0,8];
25912591
tmp2hi:1 = B[8,8];
25922592
tmps:1 = ((tmpin >= tmp2lo) & (tmpin <= tmp2hi)) | (((tmpin >= tmp1lo) & (tmpin <= tmp1hi)) * L2:1);
2593+
BF_CR = tmps;
25932594
}
25942595

25952596
:cnttzw A,S is OP=31 & S & A & BITS_11_15=0 & XOP_1_10=538 & Rc=0 {
@@ -2685,10 +2686,9 @@ define pcodeop InstructionCacheBlockLockSetX;
26852686
D = tmpp:8;
26862687
}
26872688

2688-
:mcrxrx BF2 is $(NOTVLE) & OP=31 & BITS_11_22=0 & BIT_0=0 & XOP_1_10=576 & BF2 {
2689+
:mcrxrx BF_CR is $(NOTVLE) & OP=31 & BITS_11_22=0 & BIT_0=0 & XOP_1_10=576 & BF_CR {
26892690
tmp:1 = (xer_ov << 3) | (xer_ov32 << 2) | (xer_ca << 1) | (xer_ca32);
2690-
tmp2:8 = zext(tmp);
2691-
crall = crall | (tmp2 << (8*BF2:1));
2691+
BF_CR = tmp;
26922692
}
26932693

26942694
:modsd D,A,B is $(NOTVLE) & OP=31 & D & A & B & XOP_1_10=777 & BIT_0=0 {

‎Ghidra/Processors/PowerPC/data/languages/ppc_vle.sinc

Lines changed: 11 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -551,11 +551,12 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) |
551551
cr0 = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
552552
}
553553

554+
554555
:e_cmpi BF_VLE,A,SCALE is $(ISVLE) & OP=6 & XOP_11_VLE=21 & BITS_23_25=0 & A & BF_VLE & SCALE {
555556
tmpA:4 = A:4;
556557
tmpB:4 = SCALE:4;
557-
tmpC:8 = zext(((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1));
558-
crall = crall | (tmpC << (BF_VLE*8));
558+
tmpC:1 = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
559+
BF_VLE = tmpC;
559560
}
560561

561562
:se_cmp RX_VLE,RY_VLE is $(ISVLE) & OP6_VLE=3 & BITS_8_9=0 & RX_VLE & RY_VLE {
@@ -579,8 +580,8 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) |
579580
:e_cmpli BF_VLE,A,SCALE is $(ISVLE) & OP=6 & XOP_11_VLE=21 & BITS_23_25=1 & A & BF_VLE & SCALE {
580581
tmpA:4 = A:4;
581582
tmpB:4 = SCALE:4;
582-
tmpC:8 = zext(((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1));
583-
crall = crall | (tmpC << (BF_VLE*8));
583+
tmpC:1 = ((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
584+
BF_VLE = tmpC;
584585
}
585586

586587
:se_cmpl RX_VLE,RY_VLE is $(ISVLE) & OP6_VLE=3 & BITS_8_9=1 & RX_VLE & RY_VLE {
@@ -595,11 +596,11 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) |
595596
cr0 = ((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
596597
}
597598

598-
:e_cmph BF2,A,B is $(ISVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=14 & A & B & BF2 {
599+
:e_cmph BF_CR,A,B is $(ISVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=14 & A & B & BF_CR {
599600
tmpA:2 = A:2;
600601
tmpB:2 = B:2;
601-
tmpC:8 = zext(((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1));
602-
crall = crall | (tmpC << (BF2*8));
602+
tmpC:1 = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
603+
BF_CR = tmpC;
603604
}
604605

605606
:se_cmph RX_VLE,RY_VLE is $(ISVLE) & OP6_VLE=3 & BITS_8_9=2 & RX_VLE & RY_VLE {
@@ -614,11 +615,11 @@ IMM16B: val is IMM_0_10_VLE & IMM_16_20_VLE [ val = (IMM_16_20_VLE << 11) |
614615
cr0 = ((tmpA s< tmpB) << 3) | ((tmpA s> tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
615616
}
616617

617-
:e_cmphl BF2,A,B is $(ISVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=46 & A & B & BF2 {
618+
:e_cmphl BF_CR,A,B is $(ISVLE) & OP=31 & BITS_21_22=0 & BIT_0=0 & XOP_1_10=46 & A & B & BF_CR {
618619
tmpA:2 = A:2;
619620
tmpB:2 = B:2;
620-
tmpC:8 = zext(((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1));
621-
crall = crall | (tmpC << (BF2*8));
621+
tmpC:1 = ((tmpA < tmpB) << 3) | ((tmpA > tmpB) << 2) | ((tmpA == tmpB) << 1) | (xer_so & 1);
622+
BF_CR = tmpC;
622623
}
623624

624625
:se_cmphl RX_VLE,RY_VLE is $(ISVLE) & OP6_VLE=3 & BITS_8_9=3 & RX_VLE & RY_VLE {

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