Suggestion: HardwareSerial interrupt optimization [imported]

[cmaglie]

This is Issue 391 moved from a Google Code project.
Added by 2010-11-05T10:19:48.000Z by [email protected].
Please review that bug for more context and additional comments, but update this bug.
Closed (Fixed).

Original labels: Type-Enhancement, Priority-Medium, Milestone-0022, Component-Core

Original description

What change would like to see?

HardwareSerial interrupt optimization.

Why?

More higher baud rate (over 115.2k) to use.
and, four serials(Mega1280/2560) to simultaneously use.

Would this cause any incompatibilities with previous versions? If so, how
can these be mitigated?

No.

Similarity) http://code.google.com/p/arduino/issues/detail?id=56

---

HardwareSerial.cpp(0021) store_char() line 53

int i = (rx_buffer->head + 1) % RX_BUFFER_SIZE;

disassemble

LDS R30,0x0192 ; R31:30 <- rx_buffer->head
LDS R31,0x0193
MOVW R24,R30 ; R25:24 <- R31:30
ADIW R24,0x01 ; R25:24 <- R25:24 + 1
LDI R22,0x80 ; R23:22 <- 128
LDI R23,0x00
CALL 0x00000213 ; call modulus subroutine(about 200clk)

Signed a power of two modulus is not optimized (bitwise AND).

Cast to unsigned, to be optimized.

modified

int i = (unsigned int)(rx_buffer->head + 1) % RX_BUFFER_SIZE;

disassemble

LDS R30,0x0192 ; R31:30 <- rx_buffer->head
LDS R31,0x0193
ADIW R30,0x01 ; R31:30 <- R31:30 + 1
MOVW R18,R30 ; R19:18 <- R31:30
ANDI R18,0x7F ; R19:18 <- R19:18 AND 0x007f
ANDI R19,0x00

SIGNAL(SIG_UART_RECV) processing time is about 330clk(20us) -> 80clk(5us).

available() and read() is also.