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acomodiacomodi
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interchange: address review comments
Signed-off-by: Alessandro Comodi <[email protected]>
1 parent f439cd4 commit 77f2ea9

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8 files changed

+77
-60
lines changed

8 files changed

+77
-60
lines changed

‎libs/libarchfpga/src/arch_util.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -569,6 +569,7 @@ t_physical_tile_type get_empty_physical_type(std::string name) {
569569
type.switchblock_switch_overrides = vtr::Matrix<int>({{size_t(type.width), size_t(type.height)}}, DEFAULT_SWITCH);
570570
type.is_input_type = false;
571571
type.is_output_type = false;
572+
type.is_empty = true;
572573

573574
return type;
574575
}
@@ -577,6 +578,7 @@ t_logical_block_type get_empty_logical_type(std::string name) {
577578
t_logical_block_type type;
578579
type.name = vtr::strdup(name.c_str());
579580
type.pb_type = nullptr;
581+
type.is_empty = true;
580582

581583
return type;
582584
}

‎libs/libarchfpga/src/arch_util.h

Lines changed: 20 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,8 @@ void set_arch_file_name(const char* arch);
1515
*/
1616
const char* get_arch_file_name();
1717

18+
const std::string EMPTY_BLOCK_NAME("EMPTY");
19+
1820
class InstPort {
1921
public:
2022
static constexpr int UNSPECIFIED = -1;
@@ -60,8 +62,15 @@ void free_type_descriptors(std::vector<t_physical_tile_type>& type_descriptors);
6062

6163
t_port* findPortByName(const char* name, t_pb_type* pb_type, int* high_index, int* low_index);
6264

63-
t_physical_tile_type get_empty_physical_type(std::string name);
64-
t_logical_block_type get_empty_logical_type(std::string name);
65+
/** @brief Returns and empty physical tile type, assigned with the given name argument.
66+
* The default empty string is assigned if no name is provided
67+
*/
68+
t_physical_tile_type get_empty_physical_type(std::string name = EMPTY_BLOCK_NAME);
69+
70+
/** @brief Returns and empty logical block type, assigned with the given name argument.
71+
* The default empty string is assigned if no name is provided
72+
*/
73+
t_logical_block_type get_empty_logical_type(std::string name = EMPTY_BLOCK_NAME);
6574

6675
std::unordered_set<t_logical_block_type_ptr> get_equivalent_sites_set(t_physical_tile_type_ptr type);
6776

@@ -100,6 +109,15 @@ bool pb_type_contains_blif_model(const t_pb_type* pb_type, const std::string& bl
100109
const t_pin_to_pin_annotation* find_sequential_annotation(const t_pb_type* pb_type, const t_model_ports* port, enum e_pin_to_pin_delay_annotations annot_type);
101110
const t_pin_to_pin_annotation* find_combinational_annotation(const t_pb_type* pb_type, std::string in_port, std::string out_port);
102111

112+
/**
113+
* @brief Updates the physical and logical types based on the equivalence between one and the other.
114+
*
115+
* This function is required to check and synchronize all the information to be able to use the logical block
116+
* equivalence, and link all the logical block pins to the physical tile ones, given that multiple logical blocks (i.e. pb_types)
117+
* can be placed at the same physical location if this is allowed in the architecture description.
118+
*
119+
* See https://docs.verilogtorouting.org/en/latest/tutorials/arch/equivalent_sites/ for reference
120+
*/
103121
void link_physical_logical_types(std::vector<t_physical_tile_type>& PhysicalTileTypes,
104122
std::vector<t_logical_block_type>& LogicalBlockTypes);
105123

‎libs/libarchfpga/src/physical_types.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -653,6 +653,9 @@ struct t_physical_tile_type {
653653

654654
// Does this t_physical_tile_type contain an outpad?
655655
bool is_output_type = false;
656+
657+
// Is this t_physical_tile_type an empty type?
658+
bool is_empty = false;
656659
};
657660

658661
/* Holds the capacity range of a certain sub_tile block within the parent physical tile type.
@@ -828,6 +831,9 @@ struct t_logical_block_type {
828831

829832
std::vector<t_physical_tile_type_ptr> equivalent_tiles; ///>List of physical tiles at which one could
830833
///>place this type of netlist block.
834+
835+
// Is this t_logical_block_type empty?
836+
bool is_empty = false;
831837
};
832838

833839
/*************************************************************************************************

‎libs/libarchfpga/src/read_fpga_interchange_arch.cpp

Lines changed: 41 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1065,7 +1065,8 @@ struct ArchReader {
10651065
const auto& lut_element = lut_elements[i];
10661066

10671067
auto mid_pb_type = &mode->pb_type_children[count++];
1068-
mid_pb_type->name = vtr::stringf("LUT%d", i);
1068+
std::string lut_name = "LUT" + std::to_string(i);
1069+
mid_pb_type->name = vtr::strdup(lut_name.c_str());
10691070
mid_pb_type->num_pb = 1;
10701071
mid_pb_type->parent_mode = mode;
10711072
mid_pb_type->blif_model = nullptr;
@@ -1122,6 +1123,8 @@ struct ArchReader {
11221123
mode->num_interconnect = lut_bel.input_pins.size() + 1;
11231124
mode->interconnect = new t_interconnect[mode->num_interconnect];
11241125

1126+
std::string istr, ostr, name;
1127+
11251128
// Inputs
11261129
for (size_t j = 0; j < lut_bel.input_pins.size(); ++j) {
11271130
auto* ic = &mode->interconnect[j];
@@ -1130,11 +1133,13 @@ struct ArchReader {
11301133
ic->parent_mode = mode;
11311134
ic->parent_mode_index = mode->index;
11321135

1133-
ic->input_string = vtr::stringf("%s.%s", parent->name, lut_bel.input_pins[j].c_str());
1134-
ic->output_string = vtr::stringf("%s.in[%d]", pb_type->name, j);
1135-
ic->name = vtr::stringf("%s_to_%s",
1136-
ic->input_string,
1137-
ic->output_string);
1136+
istr = std::string(parent->name) + "." + lut_bel.input_pins[j];
1137+
ostr = std::string(pb_type->name) + ".in[" + std::to_string(j) + "]";
1138+
name = istr + "_to_" + ostr;
1139+
1140+
ic->input_string = vtr::strdup(istr.c_str());
1141+
ic->output_string = vtr::strdup(ostr.c_str());
1142+
ic->name = vtr::strdup(name.c_str());
11381143
}
11391144

11401145
// Output
@@ -1143,11 +1148,13 @@ struct ArchReader {
11431148
ic->parent_mode = mode;
11441149
ic->parent_mode_index = mode->index;
11451150

1146-
ic->input_string = vtr::stringf("%s.out", pb_type->name);
1147-
ic->output_string = vtr::stringf("%s.%s", parent->name, lut_bel.output_pin.c_str());
1148-
ic->name = vtr::stringf("%s_to_%s",
1149-
ic->input_string,
1150-
ic->output_string);
1151+
istr = std::string(pb_type->name) + ".out";
1152+
ostr = std::string(parent->name) + "." + lut_bel.output_pin;
1153+
name = istr + "_to_" + ostr;
1154+
1155+
ic->input_string = vtr::strdup(istr.c_str());
1156+
ic->output_string = vtr::strdup(ostr.c_str());
1157+
ic->name = vtr::strdup(name.c_str());
11511158
}
11521159
}
11531160

@@ -1181,9 +1188,15 @@ struct ArchReader {
11811188
mode->interconnect = new t_interconnect[mode->num_interconnect];
11821189
t_interconnect* ic = &mode->interconnect[0];
11831190

1184-
ic->input_string = vtr::stringf("%s.in", pb_type->name);
1185-
ic->output_string = vtr::stringf("%s.out", pb_type->name);
1186-
ic->name = vtr::strdup("passthrough");
1191+
std::string istr, ostr, name;
1192+
1193+
istr = std::string(pb_type->name) + ".in";
1194+
ostr = std::string(pb_type->name) + ".out";
1195+
name = "passthrough";
1196+
1197+
ic->input_string = vtr::strdup(istr.c_str());
1198+
ic->output_string = vtr::strdup(ostr.c_str());
1199+
ic->name = vtr::strdup(name.c_str());
11871200

11881201
ic->type = COMPLETE_INTERC;
11891202
ic->parent_mode = mode;
@@ -1233,23 +1246,27 @@ struct ArchReader {
12331246
ic->parent_mode = mode;
12341247
ic->parent_mode_index = mode->index;
12351248

1236-
ic->input_string = vtr::stringf("%s.in", pb_type->name);
1237-
ic->output_string = vtr::stringf("%s.in", lut->name);
1238-
ic->name = vtr::stringf("%s_to_%s",
1239-
ic->input_string,
1240-
ic->output_string);
1249+
istr = std::string(pb_type->name) + ".in";
1250+
ostr = std::string(lut->name) + ".in";
1251+
name = istr + "_to_" + ostr;
1252+
1253+
ic->input_string = vtr::strdup(istr.c_str());
1254+
ic->output_string = vtr::strdup(ostr.c_str());
1255+
ic->name = vtr::strdup(name.c_str());
12411256

12421257
// Output
12431258
ic = &mode->interconnect[1];
12441259
ic->type = DIRECT_INTERC;
12451260
ic->parent_mode = mode;
12461261
ic->parent_mode_index = mode->index;
12471262

1248-
ic->input_string = vtr::stringf("%s.out", lut->name);
1249-
ic->output_string = vtr::stringf("%s.out", pb_type->name);
1250-
ic->name = vtr::stringf("%s_to_%s",
1251-
ic->input_string,
1252-
ic->output_string);
1263+
istr = std::string(lut->name) + ".out";
1264+
ostr = std::string(pb_type->name) + ".out";
1265+
name = istr + "_to_" + ostr;
1266+
1267+
ic->input_string = vtr::strdup(istr.c_str());
1268+
ic->output_string = vtr::strdup(ostr.c_str());
1269+
ic->name = vtr::strdup(name.c_str());
12531270
}
12541271

12551272
/** @brief Generates the leaf pb types for the PAD type */

‎libs/libvtrutil/src/vtr_util.cpp

Lines changed: 0 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -501,34 +501,4 @@ int get_pid() {
501501
#endif
502502
}
503503

504-
char* stringf(const char* format, ...) {
505-
// Initial buffer
506-
const int initial_size = 80 + 1;
507-
char* str = (char*)vtr::malloc(initial_size);
508-
509-
// Init and copy args list
510-
va_list va1, va2;
511-
va_start(va1, format);
512-
va_copy(va2, va1);
513-
514-
// First attempt
515-
int len = vsnprintf(str, initial_size, format, va1);
516-
VTR_ASSERT(len >= 0);
517-
518-
// The buffer was too small
519-
if (len >= initial_size) {
520-
str = (char*)vtr::realloc((void*)str, len + 1);
521-
VTR_ASSERT(str != nullptr);
522-
len = vsnprintf(str, len + 1, format, va2);
523-
VTR_ASSERT(len >= 0);
524-
VTR_ASSERT(len <= len);
525-
}
526-
527-
// Cleanup
528-
va_end(va1);
529-
va_end(va2);
530-
531-
return str;
532-
}
533-
534504
} // namespace vtr

‎libs/libvtrutil/src/vtr_util.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -118,8 +118,6 @@ void uniquify(Container container) {
118118

119119
int get_pid();
120120

121-
char* stringf(const char* format, ...);
122-
123121
} // namespace vtr
124122

125123
#endif

‎vpr/src/base/SetupVPR.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@ void SetupVPR(const t_options* Options,
139139
int num_inputs = 0;
140140
int num_outputs = 0;
141141
for (auto& type : device_ctx.physical_tile_types) {
142-
if (type.index == 0) {
142+
if (type.is_empty) {
143143
VTR_ASSERT(device_ctx.EMPTY_PHYSICAL_TILE_TYPE == nullptr);
144144
VTR_ASSERT(type.num_pins == 0);
145145
device_ctx.EMPTY_PHYSICAL_TILE_TYPE = &type;
@@ -157,7 +157,7 @@ void SetupVPR(const t_options* Options,
157157
device_ctx.EMPTY_LOGICAL_BLOCK_TYPE = nullptr;
158158
int max_equivalent_tiles = 0;
159159
for (const auto& type : device_ctx.logical_block_types) {
160-
if (type.index == 0) {
160+
if (type.is_empty) {
161161
VTR_ASSERT(device_ctx.EMPTY_LOGICAL_BLOCK_TYPE == nullptr);
162162
VTR_ASSERT(type.pb_type == nullptr);
163163
device_ctx.EMPTY_LOGICAL_BLOCK_TYPE = &type;

‎vpr/src/pack/pb_type_graph.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1099,6 +1099,12 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num,
10991099
}
11001100
(*token_index)++;
11011101

1102+
bool is_string = !checkTokenType(tokens[*token_index], TOKEN_STRING);
1103+
bool is_int = !checkTokenType(tokens[*token_index], TOKEN_INT);
1104+
1105+
if (!is_string && !is_int)
1106+
return false;
1107+
11021108
/* parse ports and port pins of pb */
11031109
port_name = tokens[*token_index].data;
11041110
(*token_index)++;

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