Support CH32X035 and CH32L103

src/arduino/ports/ch32/Adafruit_TinyUSB_ch32.cpp

@@ -25,7 +25,8 @@
 #include "tusb_option.h"
 
 #if CFG_TUD_ENABLED &&                                                         \
-    (defined(ARDUINO_ARCH_CH32) || defined(CH32V20x) || defined(CH32V30x))
+    (defined(ARDUINO_ARCH_CH32) || defined(CH32V20x) || defined(CH32V30x) ||   \
+     defined(CH32X035) || defined(CH32L10x))
 
 #include "Arduino.h"
 #include "arduino/Adafruit_USBD_Device.h"
@@ -60,24 +61,18 @@ USBWakeUp_IRQHandler(void) {
 // USBFS
 #if CFG_TUD_WCH_USBIP_USBFS
 
-#if defined(CH32V10x) || defined(CH32V20x)
+#if defined(CH32V10x) || defined(CH32V20x) || defined(CH32X035) || \ 
+    defined(CH32L10x)
 
 #if defined(CH32V10x)
-#define USBHDWakeUp_IRQHandler USBWakeUp_IRQHandler
+#define USBFSWakeUp_IRQHandler USBWakeUp_IRQHandler
 #endif
-
-__attribute__((interrupt("WCH-Interrupt-fast"))) void USBHD_IRQHandler(void) {
+__attribute__((interrupt("WCH-Interrupt-fast"))) void USBFS_IRQHandler(void) {
   tud_int_handler(0);
 }
 
 __attribute__((interrupt("WCH-Interrupt-fast"))) void
-USBHDWakeUp_IRQHandler(void) {
-  tud_int_handler(0);
-}
-#endif
-
-#ifdef CH32V30x
-__attribute__((interrupt("WCH-Interrupt-fast"))) void OTG_FS_IRQHandler(void) {
+USBFSWakeUp_IRQHandler(void) {
   tud_int_handler(0);
 }
 #endif
@@ -108,13 +103,14 @@ void TinyUSB_Port_InitDevice(uint8_t rhport) {
   // Full speed OTG or FSDev
 
 #if defined(CH32V10x)
-  EXTEN->EXTEN_CTR |= EXTEN_USBHD_IO_EN;
+  EXTEN->EXTEN_CTR |= EXTEN_USBFS_IO_EN;
   EXTEN->EXTEN_CTR &= ~EXTEN_USB_5V_SEL;
-
-#define RCC_AHBPeriph_OTG_FS RCC_AHBPeriph_USBHD
+#elif defined(CH32L10x)
+#define RCC_AHBPeriph_USBFS RCC_HBPeriph_USBFS
+#define RCC_AHBPeriphClockCmd RCC_HBPeriphClockCmd
 #endif
 
-  uint8_t usb_div;
+  uint32_t usb_div;
   switch (SystemCoreClock) {
 #if defined(CH32V20x) || defined(CH32V30x)
   case 48000000:
@@ -133,14 +129,27 @@ void TinyUSB_Port_InitDevice(uint8_t rhport) {
   case 72000000:
     usb_div = RCC_USBCLKSource_PLLCLK_1Div5;
     break;
+#elif defined(CH32X035)
+  case 48000000:
+    break;
+#elif defined(CH32L10x)
+  case 48000000:
+    usb_div = RCC_USBCLKSource_PLLCLK_Div1;
+    break;
+  case 72000000:
+    usb_div = RCC_USBCLKSource_PLLCLK_Div1_5;
+    break;
+  case 96000000:
+    usb_div = RCC_USBCLKSource_PLLCLK_Div2;
+    break;
 #endif
   default:
     return; // unsupported
   }
 
 #if defined(CH32V30x)
-  RCC_OTGFSCLKConfig(usb_div);
-#else
+  RCC_USBFSCLKConfig(usb_div);
+#elif !defined(CH32X035)
   RCC_USBCLKConfig(usb_div);
 #endif
 
@@ -149,7 +158,7 @@ void TinyUSB_Port_InitDevice(uint8_t rhport) {
 #endif
 
 #if CFG_TUD_WCH_USBIP_USBFS
-  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE);
+  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_USBFS, ENABLE);
 #endif
 #endif
 

src/arduino/ports/ch32/tusb_config_ch32.h

@@ -34,11 +34,17 @@ extern "C" {
 //--------------------------------------------------------------------
 #if defined(CH32V10x)
 #define CFG_TUSB_MCU OPT_MCU_CH32V103
-#warnning "CH32v103 is not working yet"
+#warning "CH32V103 is not working yet"
 #elif defined(CH32V20x)
 #define CFG_TUSB_MCU OPT_MCU_CH32V20X
 #elif defined(CH32V30x)
 #define CFG_TUSB_MCU OPT_MCU_CH32V307
+#elif defined(CH32X035)
+#define CFG_TUSB_MCU OPT_MCU_CH32X035
+#warning "CH32X035 is not working yet"
+#elif defined(CH32L10x)
+#define CFG_TUSB_MCU OPT_MCU_CH32L10X
+#warning "CH32L103 is not working yet"
 #endif
 
 #define CFG_TUSB_OS OPT_OS_NONE

src/common/tusb_mcu.h

@@ -527,6 +527,16 @@
   #define TUP_RHPORT_HIGHSPEED    CFG_TUD_WCH_USBIP_USBHS
   #define TUP_DCD_ENDPOINT_MAX    (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
 
+#elif TU_CHECK_MCU(OPT_MCU_CH32X035) || TU_CHECK_MCU(OPT_MCU_CH32L10X)
+  // x035 and l103 support USBFS only
+  #define TUP_USBIP_WCH_USBFS
+
+  #if !defined(CFG_TUD_WCH_USBIP_USBFS)
+  #define CFG_TUD_WCH_USBIP_USBFS 1
+  #endif
+
+  #define TUP_DCD_ENDPOINT_MAX    8
+
 //--------------------------------------------------------------------+
 // Analog Devices
 //--------------------------------------------------------------------+

src/portable/wch/ch32_usbfs_reg.h

@@ -89,14 +89,17 @@
     __IO uint32_t Reserve1;
     __IO uint32_t OTG_CR;
     __IO uint32_t OTG_SR;
-  } USBOTG_FS_TypeDef;
+  } USBFSD_TypeDef;
 
-  #define USBOTG_FS ((USBOTG_FS_TypeDef *) 0x40023400)
+  #define USBFSD ((USBFSD_TypeDef *) 0x40023400)
 #elif CFG_TUSB_MCU == OPT_MCU_CH32V20X
   #include <ch32v20x.h>
 #elif CFG_TUSB_MCU == OPT_MCU_CH32V307
   #include <ch32v30x.h>
-  #define USBHD_IRQn OTG_FS_IRQn
+#elif CFG_TUSB_MCU == OPT_MCU_CH32X035
+  #include <ch32x035.h>
+#elif CFG_TUSB_MCU == OPT_MCU_CH32L10X
+  #include <ch32l103.h>
 #endif
 
 #ifdef __GNUC__
@@ -146,6 +149,27 @@
 #define USBFS_UDEV_CTRL_DP_PIN    (1 << 5)
 #define USBFS_UDEV_CTRL_PD_DIS    (1 << 7)
 
+#if defined(CH32X035)
+// TX_CTRL
+#define USBFS_EP_T_RES_MASK (3 << 0)
+#define USBFS_EP_T_TOG      (1 << 6)
+#define USBFS_EP_T_AUTO_TOG (1 << 4)
+
+#define USBFS_EP_T_RES_ACK   (0 << 0)
+#define USBFS_EP_T_RES_NYET  (1 << 0)
+#define USBFS_EP_T_RES_NAK   (2 << 0)
+#define USBFS_EP_T_RES_STALL (3 << 0)
+
+// RX_CTRL
+#define USBFS_EP_R_RES_MASK (3 << 2)
+#define USBFS_EP_R_TOG      (1 << 7)
+#define USBFS_EP_R_AUTO_TOG (1 << 4)
+
+#define USBFS_EP_R_RES_ACK   (0 << 0)
+#define USBFS_EP_R_RES_NYET  (1 << 0)
+#define USBFS_EP_R_RES_NAK   (2 << 0)
+#define USBFS_EP_R_RES_STALL (3 << 0)
+#else
 // TX_CTRL
 #define USBFS_EP_T_RES_MASK (3 << 0)
 #define USBFS_EP_T_TOG      (1 << 2)
@@ -165,6 +189,7 @@
 #define USBFS_EP_R_RES_NYET  (1 << 0)
 #define USBFS_EP_R_RES_NAK   (2 << 0)
 #define USBFS_EP_R_RES_STALL (3 << 0)
+#endif
 
 // token PID
 #define PID_OUT   0

src/portable/wch/dcd_ch32_usbfs.c

@@ -35,10 +35,17 @@
 /* private defines */
 #define EP_MAX (8)
 
-#define EP_DMA(ep)     ((&USBOTG_FS->UEP0_DMA)[ep])
-#define EP_TX_LEN(ep)  ((&USBOTG_FS->UEP0_TX_LEN)[2 * ep])
-#define EP_TX_CTRL(ep) ((&USBOTG_FS->UEP0_TX_CTRL)[4 * ep])
-#define EP_RX_CTRL(ep) ((&USBOTG_FS->UEP0_RX_CTRL)[4 * ep])
+#if defined(CH32X035)
+#define EP_DMA(ep)     ((&USBFSD->UEP0_DMA)[ep + (ep > 4 ? 12 : 0)])
+#define EP_TX_LEN(ep)  ((&USBFSD->UEP0_TX_LEN)[2 * ep + (ep > 4 ? 24 : 0)])
+#define EP_TX_CTRL(ep) ((&USBFSD->UEP0_CTRL_H)[2 * ep + (ep > 4 ? 24 : 0)])
+#define EP_RX_CTRL(ep) ((&USBFSD->UEP0_CTRL_H)[2 * ep + (ep > 4 ? 24 : 0)])
+#else
+#define EP_DMA(ep)     ((&USBFSD->UEP0_DMA)[ep])
+#define EP_TX_LEN(ep)  ((&USBFSD->UEP0_TX_LEN)[2 * ep])
+#define EP_TX_CTRL(ep) ((&USBFSD->UEP0_TX_CTRL)[4 * ep])
+#define EP_RX_CTRL(ep) ((&USBFSD->UEP0_RX_CTRL)[4 * ep])
+#endif
 
 /* private data */
 struct usb_xfer {
@@ -126,12 +133,12 @@ static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len) {
 bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   (void) rh_init;
   // init registers
-  USBOTG_FS->BASE_CTRL = USBFS_CTRL_SYS_CTRL | USBFS_CTRL_INT_BUSY | USBFS_CTRL_DMA_EN;
-  USBOTG_FS->UDEV_CTRL = USBFS_UDEV_CTRL_PD_DIS | USBFS_UDEV_CTRL_PORT_EN;
-  USBOTG_FS->DEV_ADDR = 0x00;
+  USBFSD->BASE_CTRL = USBFS_CTRL_SYS_CTRL | USBFS_CTRL_INT_BUSY | USBFS_CTRL_DMA_EN;
+  USBFSD->UDEV_CTRL = USBFS_UDEV_CTRL_PD_DIS | USBFS_UDEV_CTRL_PORT_EN;
+  USBFSD->DEV_ADDR = 0x00;
 
-  USBOTG_FS->INT_FG = 0xFF;
-  USBOTG_FS->INT_EN = USBFS_INT_EN_BUS_RST | USBFS_INT_EN_TRANSFER | USBFS_INT_EN_SUSPEND;
+  USBFSD->INT_FG = 0xFF;
+  USBFSD->INT_EN = USBFS_INT_EN_BUS_RST | USBFS_INT_EN_TRANSFER | USBFS_INT_EN_SUSPEND;
 
   // setup endpoint 0
   EP_DMA(0) = (uint32_t) &data.buffer[0][0];
@@ -140,13 +147,23 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   EP_RX_CTRL(0) = USBFS_EP_R_RES_ACK;
 
   // enable other endpoints but NAK everything
-  USBOTG_FS->UEP4_1_MOD = 0xCC;
-  USBOTG_FS->UEP2_3_MOD = 0xCC;
-  USBOTG_FS->UEP5_6_MOD = 0xCC;
-  USBOTG_FS->UEP7_MOD = 0x0C;
+  USBFSD->UEP4_1_MOD = 0xCC;
+  USBFSD->UEP2_3_MOD = 0xCC;
+#if defined(CH32X035)
+  USBFSD->UEP567_MOD = 0x3C;
+#else
+  USBFSD->UEP5_6_MOD = 0xCC;
+  USBFSD->UEP7_MOD = 0x0C;
+#endif
 
   for (uint8_t ep = 1; ep < EP_MAX; ep++) {
+#if defined(CH32X035)
+    if (ep != 4) {
+      EP_DMA(ep) = (uint32_t) &data.buffer[ep][0];
+    }
+#else
     EP_DMA(ep) = (uint32_t) &data.buffer[ep][0];
+#endif
     EP_TX_LEN(ep) = 0;
     EP_TX_CTRL(ep) = USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK;
     EP_RX_CTRL(ep) = USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NAK;
@@ -160,14 +177,14 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
 
 void dcd_int_handler(uint8_t rhport) {
   (void) rhport;
-  uint8_t status = USBOTG_FS->INT_FG;
+  uint8_t status = USBFSD->INT_FG;
   if (status & USBFS_INT_FG_TRANSFER) {
-    uint8_t ep = USBFS_INT_ST_MASK_UIS_ENDP(USBOTG_FS->INT_ST);
-    uint8_t token = USBFS_INT_ST_MASK_UIS_TOKEN(USBOTG_FS->INT_ST);
+    uint8_t ep = USBFS_INT_ST_MASK_UIS_ENDP(USBFSD->INT_ST);
+    uint8_t token = USBFS_INT_ST_MASK_UIS_TOKEN(USBFSD->INT_ST);
 
     switch (token) {
       case PID_OUT: {
-        uint16_t rx_len = USBOTG_FS->RX_LEN;
+        uint16_t rx_len = USBFSD->RX_LEN;
         update_out(rhport, ep, rx_len);
         break;
       }
@@ -186,7 +203,7 @@ void dcd_int_handler(uint8_t rhport) {
         break;
     }
 
-    USBOTG_FS->INT_FG = USBFS_INT_FG_TRANSFER;
+    USBFSD->INT_FG = USBFS_INT_FG_TRANSFER;
   } else if (status & USBFS_INT_FG_BUS_RST) {
     data.ep0_tog = true;
     data.xfer[0][TUSB_DIR_OUT].max_size = 64;
@@ -195,25 +212,25 @@ void dcd_int_handler(uint8_t rhport) {
     //dcd_event_bus_reset(rhport, (USBOTG_FS->BASE_CTRL & USBFS_CTRL_LOW_SPEED) ? TUSB_SPEED_LOW : TUSB_SPEED_FULL, true);
     dcd_event_bus_reset(rhport, (USBOTG_FS->UDEV_CTRL & USBFS_UDEV_CTRL_LOW_SPEED) ? TUSB_SPEED_LOW : TUSB_SPEED_FULL, true);
 
-    USBOTG_FS->DEV_ADDR = 0x00;
+    USBFSD->DEV_ADDR = 0x00;
     EP_RX_CTRL(0) = USBFS_EP_R_RES_ACK;
 
-    USBOTG_FS->INT_FG = USBFS_INT_FG_BUS_RST;
+    USBFSD->INT_FG = USBFS_INT_FG_BUS_RST;
   } else if (status & USBFS_INT_FG_SUSPEND) {
     dcd_event_t event = {.rhport = rhport, .event_id = DCD_EVENT_SUSPEND};
     dcd_event_handler(&event, true);
-    USBOTG_FS->INT_FG = USBFS_INT_FG_SUSPEND;
+    USBFSD->INT_FG = USBFS_INT_FG_SUSPEND;
   }
 }
 
 void dcd_int_enable(uint8_t rhport) {
   (void) rhport;
-  NVIC_EnableIRQ(USBHD_IRQn);
+  NVIC_EnableIRQ(USBFS_IRQn);
 }
 
 void dcd_int_disable(uint8_t rhport) {
   (void) rhport;
-  NVIC_DisableIRQ(USBHD_IRQn);
+  NVIC_DisableIRQ(USBFS_IRQn);
 }
 
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
@@ -228,12 +245,12 @@ void dcd_remote_wakeup(uint8_t rhport) {
 
 void dcd_connect(uint8_t rhport) {
   (void) rhport;
-  USBOTG_FS->BASE_CTRL |= USBFS_CTRL_DEV_PUEN;
+  USBFSD->BASE_CTRL |= USBFS_CTRL_DEV_PUEN;
 }
 
 void dcd_disconnect(uint8_t rhport) {
   (void) rhport;
-  USBOTG_FS->BASE_CTRL &= ~USBFS_CTRL_DEV_PUEN;
+  USBFSD->BASE_CTRL &= ~USBFS_CTRL_DEV_PUEN;
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en) {
@@ -248,7 +265,7 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* req
   if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
       request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
       request->bRequest == TUSB_REQ_SET_ADDRESS) {
-    USBOTG_FS->DEV_ADDR = (uint8_t) request->wValue;
+    USBFSD->DEV_ADDR = (uint8_t) request->wValue;
   }
   EP_TX_CTRL(0) = USBFS_EP_T_RES_NAK;
   EP_RX_CTRL(0) = USBFS_EP_R_RES_ACK;

src/tusb_config.h

@@ -41,7 +41,7 @@
 #elif defined(ARDUINO_ARCH_ESP32)
   // do nothing since we force include "arduino/ports/esp32/tusb_config_esp32.h" in tusb_option.h
 
-#elif defined(ARDUINO_ARCH_CH32) || defined(CH32V20x) || defined(CH32V30x)
+#elif defined(ARDUINO_ARCH_CH32) || defined(CH32V20x) || defined(CH32V30x) || defined(CH32X035) || defined(CH32L10x)
   #include "arduino/ports/ch32/tusb_config_ch32.h"
 #else
   #error TinyUSB Arduino Library does not support your core yet

src/tusb_option.h

@@ -186,8 +186,10 @@
 // WCH
 #define OPT_MCU_CH32V307         2200 ///< WCH CH32V307
 #define OPT_MCU_CH32F20X         2210 ///< WCH CH32F20x
-#define OPT_MCU_CH32V20X         2220 ///< WCH CH32V20X
+#define OPT_MCU_CH32V20X         2220 ///< WCH CH32V20x
 #define OPT_MCU_CH32V103         2230 ///< WCH CH32V103
+#define OPT_MCU_CH32X035         2240 ///< WCH CH32X035
+#define OPT_MCU_CH32L10X         2250 ///< WCH CH32L10x
 
 // NXP LPC MCX
 #define OPT_MCU_MCXN9            2300  ///< NXP MCX N9 Series