|
27 | 27 |
|
28 | 28 | * Author(s): Tony DiCola
|
29 | 29 | """
|
30 |
| -import digitalio |
31 |
| - |
32 |
| -import adafruit_bus_device.i2c_device as i2c_device |
33 | 30 |
|
| 31 | +from adafruit_bus_device import i2c_device |
| 32 | +import digitalio |
34 | 33 | from micropython import const
|
35 | 34 |
|
36 | 35 |
|
|
60 | 59 | _MCP23017_IPOLB = const(0x03)
|
61 | 60 | _MCP23017_GPINTENA = const(0x04)
|
62 | 61 | _MCP23017_GPINTENB = const(0x05)
|
63 |
| -_MCP23008_DEFVALA = const(0x06) |
64 |
| -_MCP23008_DEFVALB = const(0x07) |
65 |
| -_MCP23008_INTCONA = const(0x08) |
66 |
| -_MCP23008_INTCONB = const(0x09) |
67 |
| -_MCP23008_IOCONA = const(0x0A) |
68 |
| -_MCP23008_IOCONB = const(0x0B) |
| 62 | +_MCP23017_DEFVALA = const(0x06) |
| 63 | +_MCP23017_DEFVALB = const(0x07) |
| 64 | +_MCP23017_INTCONA = const(0x08) |
| 65 | +_MCP23017_INTCONB = const(0x09) |
| 66 | +_MCP23017_IOCON = const(0x0A) |
69 | 67 | _MCP23017_GPPUA = const(0x0C)
|
70 | 68 | _MCP23017_GPPUB = const(0x0D)
|
71 | 69 | _MCP23008_INTFA = const(0x0E)
|
@@ -267,6 +265,7 @@ def __init__(self, i2c, address=_MCP23017_ADDRESS):
|
267 | 265 | # Reset to all inputs with no pull-ups and no inverted polarity.
|
268 | 266 | self.iodir = 0xFFFF
|
269 | 267 | self.gppu = 0x0000
|
| 268 | + self.iocon = 0x4 # turn on IRQ Pins as open drain |
270 | 269 | self._write_u16le(_MCP23017_IPOLA, 0x0000)
|
271 | 270 |
|
272 | 271 | def _read_u16le(self, register):
|
@@ -413,3 +412,62 @@ def get_pin(self, pin):
|
413 | 412 | """
|
414 | 413 | assert 0 <= pin <= 15
|
415 | 414 | return DigitalInOut(pin, self)
|
| 415 | + |
| 416 | + @property |
| 417 | + def interrupt_configuration(self): |
| 418 | + """The raw INTCON interrupt control register. The INTCON register |
| 419 | + controls how the associated pin value is compared for the |
| 420 | + interrupt-on-change feature. If a bit is set, the corresponding |
| 421 | + I/O pin is compared against the associated bit in the DEFVAL |
| 422 | + register. If a bit value is clear, the corresponding I/O pin is |
| 423 | + compared against the previous value. |
| 424 | + """ |
| 425 | + return self._read_u16le(_MCP23017_INTCONA) |
| 426 | + |
| 427 | + @interrupt_configuration.setter |
| 428 | + def interrupt_configuration(self, val): |
| 429 | + self._write_u16le(_MCP23017_INTCONA, val) |
| 430 | + |
| 431 | + @property |
| 432 | + def interrupt_enable(self): |
| 433 | + """The raw GPINTEN interrupt control register. The GPINTEN register |
| 434 | + controls the interrupt-on-change feature for each pin. If a bit is |
| 435 | + set, the corresponding pin is enabled for interrupt-on-change. |
| 436 | + The DEFVAL and INTCON registers must also be configured if any pins |
| 437 | + are enabled for interrupt-on-change. |
| 438 | + """ |
| 439 | + return self._read_u16le(_MCP23017_GPINTENA) |
| 440 | + |
| 441 | + @interrupt_enable.setter |
| 442 | + def interrupt_enable(self, val): |
| 443 | + self._write_u16le(_MCP23017_GPINTENA, val) |
| 444 | + |
| 445 | + @property |
| 446 | + def default_value(self): |
| 447 | + """The raw DEFVAL interrupt control register. The default comparison |
| 448 | + value is configured in the DEFVAL register. If enabled (via GPINTEN |
| 449 | + and INTCON) to compare against the DEFVAL register, an opposite value |
| 450 | + on the associated pin will cause an interrupt to occur. |
| 451 | + """ |
| 452 | + return self._read_u16le(_MCP23017_DEFVALA) |
| 453 | + |
| 454 | + @default_value.setter |
| 455 | + def default_value(self, val): |
| 456 | + self._write_u16le(_MCP23017_DEFVALA, val) |
| 457 | + |
| 458 | + |
| 459 | + @property |
| 460 | + def io_control(self): |
| 461 | + """The raw IOCON configuration register. Bit 1 controls interrupt |
| 462 | + polarity (1 = active-high, 0 = active-low). Bit 2 is whether irq pin |
| 463 | + is open drain (1 = open drain, 0 = push-pull). Bit 3 is unused. |
| 464 | + Bit 4 is whether SDA slew rate is enabled (1 = yes). Bit 5 is if I2C |
| 465 | + address pointer auto-increments (1 = no). Bit 6 is whether interrupt |
| 466 | + pins are internally connected (1 = yes). Bit 7 is whether registers |
| 467 | + are all in one bank (1 = no). |
| 468 | + """ |
| 469 | + return self._read_u8(_MCP23017_IOCON) |
| 470 | + |
| 471 | + @io_control.setter |
| 472 | + def io_control(self, val): |
| 473 | + self._write_u8(_MCP23017_IOCON, val) |
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