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UT2UHUT2UH
committed
Variant files cleanup for K52
1 parent d5e2a5c commit d2bb5fc

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16 files changed

+130
-136
lines changed

16 files changed

+130
-136
lines changed

‎variants/K33-L072Z/variant.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,7 +103,9 @@ static const uint8_t SCL = PIN_WIRE_SCL;
103103

104104
#define SPI_INTERFACES_COUNT 0
105105

106-
#define PWM_INSTANCE_COUNT 0
106+
#define PWM_INSTANCE_COUNT 0
107+
108+
#define POUT_MAX (23ul)
107109

108110
#ifdef __cplusplus
109111
}

‎variants/K33-L082Z-DFU/variant.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,8 @@ static const uint8_t SCK = PIN_SPI_SCK;
133133

134134
#define PWM_INSTANCE_COUNT 2
135135

136+
#define POUT_MAX (23ul)
137+
136138
#ifdef __cplusplus
137139
}
138140
#endif

‎variants/K33-L082Z-STL/variant.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -114,9 +114,10 @@ static const uint8_t MOSI = PIN_SPI_MOSI;
114114
static const uint8_t MISO = PIN_SPI_MISO;
115115
static const uint8_t SCK = PIN_SPI_SCK;
116116

117-
118117
#define PWM_INSTANCE_COUNT 2
119118

119+
#define POUT_MAX (23ul)
120+
120121
#ifdef __cplusplus
121122
}
122123
#endif

‎variants/K48-S76G-I2C/variant.cpp

Lines changed: 23 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -41,13 +41,13 @@ extern const PinDescription g_APinDescription[PINS_COUNT] =
4141
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA7), STM32L0_GPIO_PIN_PA7, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //LED_GREEN
4242
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA10), STM32L0_GPIO_PIN_PA10, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //LOAD_TEST
4343
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA9), STM32L0_GPIO_PIN_PA9, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //VBAT_TEST
44-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
44+
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB2), STM32L0_GPIO_PIN_PB2, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_RST
4545
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA4), STM32L0_GPIO_PIN_PA4, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GEN_POWER
4646
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA5), STM32L0_GPIO_PIN_PA5, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GEN_ENABLE
47-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
48-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
49-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
50-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
47+
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB5), STM32L0_GPIO_PIN_PB5, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_PPS
48+
{ GPIOC, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PC6), STM32L0_GPIO_PIN_PC6, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_LEVEL_SHIFTER_EN
49+
{ GPIOC, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PC11), STM32L0_GPIO_PIN_PC11, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_RX
50+
{ GPIOC, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PC10), STM32L0_GPIO_PIN_PC10, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_TX
5151
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA13), STM32L0_GPIO_PIN_PA13, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //T_VCP_TX
5252
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA14), STM32L0_GPIO_PIN_PA14, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //T_VCP_RX
5353
// 14..15 - I2C pins (SDA,SCL)
@@ -63,11 +63,28 @@ extern const PinDescription g_APinDescription[PINS_COUNT] =
6363
{ NULL, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA12), STM32L0_GPIO_PIN_PA12, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //DP
6464
};
6565

66+
// Disable after debug!
67+
static uint8_t stm32l0_usart4_rx_fifo[32];
68+
69+
extern const stm32l0_uart_params_t g_Serial1Params = {
70+
STM32L0_UART_INSTANCE_USART4,
71+
STM32L0_UART_IRQ_PRIORITY,
72+
STM32L0_DMA_CHANNEL_DMA1_CH6_USART4_RX,
73+
STM32L0_DMA_CHANNEL_DMA1_CH7_USART4_TX,
74+
&stm32l0_usart4_rx_fifo[0],
75+
sizeof(stm32l0_usart4_rx_fifo),
76+
{
77+
STM32L0_GPIO_PIN_PC11_USART4_RX,
78+
STM32L0_GPIO_PIN_PC10_USART4_TX,
79+
STM32L0_GPIO_PIN_NONE,
80+
STM32L0_GPIO_PIN_NONE,
81+
},
82+
};
6683

6784
// Disable after debug!
6885
static uint8_t stm32l0_lpuart1_rx_fifo[32];
6986

70-
extern const stm32l0_uart_params_t g_SerialParams = {
87+
extern const stm32l0_uart_params_t g_Serial2Params = {
7188
STM32L0_UART_INSTANCE_LPUART1,
7289
STM32L0_UART_IRQ_PRIORITY,
7390
STM32L0_DMA_CHANNEL_DMA1_CH3_LPUART1_RX,
@@ -82,21 +99,6 @@ extern const stm32l0_uart_params_t g_SerialParams = {
8299
},
83100
};
84101

85-
86-
// Disable if not in use!
87-
extern const stm32l0_i2c_params_t g_WireParams = {
88-
STM32L0_I2C_INSTANCE_I2C1,
89-
STM32L0_I2C_IRQ_PRIORITY,
90-
STM32L0_DMA_CHANNEL_DMA1_CH7_I2C1_RX,
91-
STM32L0_DMA_CHANNEL_NONE,
92-
{
93-
STM32L0_GPIO_PIN_PB6_I2C1_SCL,
94-
STM32L0_GPIO_PIN_PB7_I2C1_SDA,
95-
},
96-
};
97-
98-
extern stm32l0_i2c_t g_Wire;
99-
100102
void RadioInit( const RadioEvents_t *events, uint32_t freq )
101103
{
102104
SX1276Init(events, freq);

‎variants/K48-S76G-I2C/variant.h

Lines changed: 15 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -102,7 +102,6 @@ static const uint8_t SENSOR = PIN_SENSOR_INT;
102102
* ADC open-drain enablers Control pins
103103
*/
104104
#define PIN_VBAT_TEST (4ul)
105-
#define PIN_TEMP_TEST (5ul)
106105

107106
/*
108107
* Genarator control pins
@@ -111,24 +110,22 @@ static const uint8_t SENSOR = PIN_SENSOR_INT;
111110
#define PIN_GEN_ENABLE (7ul)
112111

113112
/*
114-
* Serial interface
113+
* GPS receiver pins
115114
*/
116-
117-
#define SERIAL_INTERFACES_COUNT 1
118-
119-
#define PIN_SERIAL_RX (12ul)
120-
#define PIN_SERIAL_TX (13ul)
115+
#define GPS_RST (5ul)
116+
#define GPS_1PPS (8ul)
117+
#define GPS_LEVEL_SHIFTER_EN (9ul)
121118

122119
/*
123-
* Wire Interfaces
120+
* Serial interface
124121
*/
125-
#define WIRE_INTERFACES_COUNT 1
122+
#define SERIAL_INTERFACES_COUNT 3
126123

127-
#define PIN_WIRE_SDA (14u)
128-
#define PIN_WIRE_SCL (15u)
124+
#define PIN_SERIAL1_RX (10ul)
125+
#define PIN_SERIAL1_TX (11ul)
129126

130-
static const uint8_t SDA = PIN_WIRE_SDA;
131-
static const uint8_t SCL = PIN_WIRE_SCL;
127+
#define PIN_SERIAL2_RX (12ul)
128+
#define PIN_SERIAL2_TX (13ul)
132129

133130
/*
134131
* Analog pins
@@ -143,10 +140,7 @@ static const uint8_t A2 = PIN_TEMP_ADC;
143140

144141
#define ADC_RESOLUTION 12
145142

146-
/*
147-
* RadioHead Driver
148-
*/
149-
#define RH s76g
143+
#define POUT_MAX (23ul)
150144

151145
/*
152146
* USB Interface
@@ -167,6 +161,7 @@ static const uint8_t A2 = PIN_TEMP_ADC;
167161
#ifdef __cplusplus
168162
extern CDC SerialUSB;
169163
extern Uart Serial1;
164+
extern Uart Serial2;
170165
#endif
171166

172167
// These serial port names are intended to allow libraries and architecture-neutral
@@ -185,12 +180,13 @@ extern Uart Serial1;
185180
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
186181
// pins are NOT connected to anything by default.
187182
#define SERIAL_PORT_USBVIRTUAL SerialUSB
188-
#define SERIAL_PORT_MONITOR SerialUSB
183+
#define SERIAL_PORT_MONITOR Serial2
189184
#define SERIAL_PORT_GNSS Serial1
190185
#define SERIAL_PORT_HARDWARE1 Serial1
186+
#define SERIAL_PORT_HARDWARE2 Serial2
191187

192188
// Alias Serial to SerialUSB
193-
#define Serial SerialUSB
189+
#define Serial Serial2
194190

195191
#endif /*_VARIANT_K48_S76G_I2C */
196192

‎variants/K48-S76G-SWD/variant.cpp

Lines changed: 19 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -41,36 +41,36 @@ extern const PinDescription g_APinDescription[PINS_COUNT] =
4141
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA7), STM32L0_GPIO_PIN_PA7, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //LED_GREEN
4242
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA10), STM32L0_GPIO_PIN_PA10, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //LOAD_TEST
4343
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA9), STM32L0_GPIO_PIN_PA9, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //VBAT_TEST
44-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
44+
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB2), STM32L0_GPIO_PIN_PB2, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_RST
4545
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA4), STM32L0_GPIO_PIN_PA4, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GEN_POWER
4646
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA5), STM32L0_GPIO_PIN_PA5, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GEN_ENABLE
47-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
48-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
49-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
50-
{ NULL, 0, STM32L0_GPIO_PIN_NONE, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, // NA
51-
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA13), STM32L0_GPIO_PIN_PA13, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //T_VCP_TX
47+
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB5), STM32L0_GPIO_PIN_PB5, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_PPS
48+
{ GPIOC, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PC6), STM32L0_GPIO_PIN_PC6, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_LEVEL_SHIFTER_EN
49+
{ GPIOC, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PC11), STM32L0_GPIO_PIN_PC11, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_RX
50+
{ GPIOC, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PC10), STM32L0_GPIO_PIN_PC10, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //GPS_TX
5251
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA14), STM32L0_GPIO_PIN_PA14, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //T_VCP_RX
52+
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA13), STM32L0_GPIO_PIN_PA13, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //T_VCP_TX
5353
// 14..15 - I2C pins (SDA,SCL)
5454
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB7), STM32L0_GPIO_PIN_PB7, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //SDA
5555
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB6), STM32L0_GPIO_PIN_PB6, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //SCL
5656
// 16 - Analog pin
57-
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA3), STM32L0_GPIO_PIN_PA3, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_3 }, //LOAD_ADC
58-
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA2), STM32L0_GPIO_PIN_PA2, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_2 }, //VBAT_ADC
59-
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB1), STM32L0_GPIO_PIN_PB1, 0, PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_1 }, //TEMP_ADC
57+
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA3), STM32L0_GPIO_PIN_PA3, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_3 }, //LOAD_ADC
58+
{ GPIOA, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA2), STM32L0_GPIO_PIN_PA2, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_2 }, //VBAT_ADC
59+
{ GPIOB, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PB1), STM32L0_GPIO_PIN_PB1, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_1 }, //TEMP_ADC
6060
// 19..21 - Special pins (VBUS, USB_DM, USB_DP)
6161
{ NULL, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA8), STM32L0_GPIO_PIN_PA8, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //VBUS
6262
{ NULL, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA11), STM32L0_GPIO_PIN_PA11, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //DM
6363
{ NULL, STM32L0_GPIO_PIN_MASK(STM32L0_GPIO_PIN_PA12), STM32L0_GPIO_PIN_PA12, (PIN_ATTR_EXTI), PWM_INSTANCE_NONE, PWM_CHANNEL_NONE, ADC_CHANNEL_NONE }, //DP
6464
};
6565

66-
// Disable after debug!
66+
6767
static uint8_t stm32l0_usart4_rx_fifo[32];
6868

6969
extern const stm32l0_uart_params_t g_Serial1Params = {
7070
STM32L0_UART_INSTANCE_USART4,
7171
STM32L0_UART_IRQ_PRIORITY,
72-
STM32L0_DMA_CHANNEL_DMA1_CH2_USART4_RX,
73-
STM32L0_DMA_CHANNEL_DMA1_CH3_USART4_TX,
72+
STM32L0_DMA_CHANNEL_DMA1_CH6_USART4_RX,
73+
STM32L0_DMA_CHANNEL_NONE,
7474
&stm32l0_usart4_rx_fifo[0],
7575
sizeof(stm32l0_usart4_rx_fifo),
7676
{
@@ -88,8 +88,8 @@ static uint8_t stm32l0_lpuart1_rx_fifo[32];
8888
extern const stm32l0_uart_params_t g_Serial2Params = {
8989
STM32L0_UART_INSTANCE_LPUART1,
9090
STM32L0_UART_IRQ_PRIORITY,
91-
STM32L0_DMA_CHANNEL_DMA1_CH6_LPUART1_RX,
92-
STM32L0_DMA_CHANNEL_NONE,
91+
STM32L0_DMA_CHANNEL_DMA1_CH3_LPUART1_RX,
92+
STM32L0_DMA_CHANNEL_DMA1_CH2_LPUART1_TX,
9393
&stm32l0_lpuart1_rx_fifo[0],
9494
sizeof(stm32l0_lpuart1_rx_fifo),
9595
{
@@ -128,18 +128,19 @@ void initVariant()
128128
// Disable LOAD_TEST and VBAT_TEST
129129
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA10, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
130130
stm32l0_gpio_pin_write(STM32L0_GPIO_PIN_PA10, 1);
131-
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA9, (STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_MEDIUM | STM32L0_GPIO_OTYPE_OPENDRAIN | STM32L0_GPIO_MODE_OUTPUT));
131+
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA9, (STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_MEDIUM | STM32L0_GPIO_OTYPE_OPENDRAIN | STM32L0_GPIO_MODE_OUTPUT));
132132
stm32l0_gpio_pin_write(STM32L0_GPIO_PIN_PA9, 1);
133133
// Set LOAD_ADC, VBAT_ADC
134134
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA3, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_MODE_ANALOG));
135135
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA2, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_MODE_ANALOG));
136+
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PB1, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_MODE_ANALOG));
136137
// Turn off LEDs
137-
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA6, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
138+
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA6, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
138139
stm32l0_gpio_pin_write(STM32L0_GPIO_PIN_PA6, 0);
139-
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA7, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
140+
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA7, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
140141
stm32l0_gpio_pin_write(STM32L0_GPIO_PIN_PA7, 0);
141142
// Set IMU_INT
142-
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA0, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_PULLDOWN | STM32L0_GPIO_OSPEED_HIGH | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_INPUT));
143+
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PA0, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_PULLDOWN | STM32L0_GPIO_OSPEED_HIGH | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_INPUT));
143144
// Set RESET pin to 0
144145
stm32l0_gpio_pin_configure(STM32L0_GPIO_PIN_PB2, (STM32L0_GPIO_PARK_NONE | STM32L0_GPIO_PUPD_NONE | STM32L0_GPIO_OSPEED_LOW | STM32L0_GPIO_OTYPE_PUSHPULL | STM32L0_GPIO_MODE_OUTPUT));
145146
stm32l0_gpio_pin_write(STM32L0_GPIO_PIN_PB2, 0);

‎variants/K48-S76G-SWD/variant.h

Lines changed: 18 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -39,15 +39,15 @@
3939

4040
#define STM32L0_CONFIG_PIN_VBUS STM32L0_GPIO_PIN_PA8
4141

42-
#define STM32L0_CONFIG_PIN_VBAT STM32L0_GPIO_PIN_PA2
43-
#define STM32L0_CONFIG_CHANNEL_VBAT STM32L0_ADC_CHANNEL_2
44-
#define STM32L0_CONFIG_VBAT_PERIOD 40
45-
#define STM32L0_CONFIG_VBAT_SCALE ((float)2.08)
42+
// #define STM32L0_CONFIG_PIN_VBAT STM32L0_GPIO_PIN_PA2
43+
// #define STM32L0_CONFIG_CHANNEL_VBAT STM32L0_ADC_CHANNEL_2
44+
// #define STM32L0_CONFIG_VBAT_PERIOD 40
45+
// #define STM32L0_CONFIG_VBAT_SCALE ((float)2.08)
4646

47-
#define STM32L0_CONFIG_PIN_GNSS_ENABLE STM32L0_GPIO_PIN_NONE
48-
#define STM32L0_CONFIG_PIN_GNSS_RX STM32L0_GPIO_PIN_PC11_USART4_RX
49-
#define STM32L0_CONFIG_PIN_GNSS_TX STM32L0_GPIO_PIN_PC10_USART4_TX
50-
#define GPS_BAUD_RATE 115200
47+
// #define STM32L0_CONFIG_PIN_GNSS_ENABLE STM32L0_GPIO_PIN_NONE
48+
// #define STM32L0_CONFIG_PIN_GNSS_RX STM32L0_GPIO_PIN_PC11_USART4_RX
49+
// #define STM32L0_CONFIG_PIN_GNSS_TX STM32L0_GPIO_PIN_PC10_USART4_TX
50+
// #define GPS_BAUD_RATE 115200
5151

5252
#define USBCON
5353

@@ -102,7 +102,6 @@ static const uint8_t SENSOR = PIN_SENSOR_INT;
102102
* ADC open-drain enablers Control pins
103103
*/
104104
#define PIN_VBAT_TEST (4ul)
105-
#define PIN_TEMP_TEST (5ul)
106105

107106
/*
108107
* Genarator control pins
@@ -111,13 +110,19 @@ static const uint8_t SENSOR = PIN_SENSOR_INT;
111110
#define PIN_GEN_ENABLE (7ul)
112111

113112
/*
114-
* Serial interface
113+
* GPS receiver pins
115114
*/
115+
#define GPS_RST (5ul)
116+
#define GPS_1PPS (8ul)
117+
#define GPS_LEVEL_SHIFTER_EN (9ul)
116118

119+
/*
120+
* Serial interface
121+
*/
117122
#define SERIAL_INTERFACES_COUNT 3
118123

119-
#define PIN_SERIAL1_RX (12ul)
120-
#define PIN_SERIAL1_TX (13ul)
124+
#define PIN_SERIAL1_RX (10ul)
125+
#define PIN_SERIAL1_TX (11ul)
121126

122127
#define PIN_SERIAL2_RX (12ul)
123128
#define PIN_SERIAL2_TX (13ul)
@@ -146,10 +151,7 @@ static const uint8_t A2 = PIN_TEMP_ADC;
146151

147152
#define ADC_RESOLUTION 12
148153

149-
/*
150-
* RadioHead Driver
151-
*/
152-
#define RH s76g
154+
#define POUT_MAX (23ul)
153155

154156
/*
155157
* USB Interface

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