Skip to content

Commit 2d0766e

Browse files
acomodiacomodi
committed
Merge branches 'wip/add-issue-template', 'wip/connection_box_lookahead_map', 'wip/symbiflow-badger' and 'wip/update_golden' into sync_with_upstream
5 parents 16b96c4 + 77de9be + d188649 + 52b4f16 + 3064291 commit 2d0766e

39 files changed

+2748
-83
lines changed

‎.github/ISSUE_TEMPLATE/bug_report.md

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,9 @@
11
---
22
name: Bug report
33
about: Create a report to help us improve
4+
title: ''
5+
labels: ''
6+
assignees: ''
47

58
---
69

‎.github/ISSUE_TEMPLATE/feature_request.md

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,9 @@
11
---
22
name: Feature request
33
about: Suggest an idea for this project
4+
title: ''
5+
labels: ''
6+
assignees: ''
47

58
---
69

‎.github/ISSUE_TEMPLATE/vtr-change.md

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
---
2+
name: VTR change
3+
about: Describe purpose and lifecycle of a local change we made to VTR
4+
title: ''
5+
labels: ''
6+
assignees: ''
7+
8+
---
9+
10+
### Why did we need this? (what does this change enable us to do)
11+
<!--- i.e. what does this change enable us to do? -->
12+
13+
### What did it change?
14+
<!--- i.e. technical description what the change does -->
15+
16+
### Should it be merged upstream - if not, when can we delete it?
17+
18+
### What is needed to get this merged / deleted?
19+
20+
* [ ] is the implementation work to make suitable for merging / deletion completed?
21+
* [ ] Is there an associated test? <!--- i.e. how will we prevent it from regressing? -->
22+
* [ ] is this currently part of the Conda package?
23+
* [ ] is this properly cleaned up in our local repositories? <!--- add subtasks here if needed) -->
24+
25+
### Tracker / branch / PR & other useful links

‎README.md

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,14 @@
1+
2+
SymbiFlow WIP changes for Verilog to Routing (VTR)
3+
==================================================
4+
5+
This branch contains work in progress changes for using Verilog to Routing
6+
(VTR) as part of SymbiFlow.
7+
8+
---
9+
110
# Verilog to Routing (VTR)
2-
[![Build Status](https://travis-ci.com/verilog-to-routing/vtr-verilog-to-routing.svg?branch=master)](https://travis-ci.com/verilog-to-routing/vtr-verilog-to-routing) [![Documentation Status](https://readthedocs.org/projects/vtr/badge/?version=latest)](http://docs.verilogtorouting.org/en/latest/)
11+
[![Build Status](https://travis-ci.com/SymbiFlow/vtr-verilog-to-routing.svg?branch=master)](https://travis-ci.com/SymbiFlow/vtr-verilog-to-routing) [![Documentation Status](https://readthedocs.org/projects/vtr/badge/?version=latest)](http://docs.verilogtorouting.org/en/latest/?badge=latest)
312

413
## Introduction
514
The Verilog-to-Routing (VTR) project is a world-wide collaborative effort to provide a open-source framework for conducting FPGA architecture and CAD research and development.

‎libs/libarchfpga/src/physical_types.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1457,6 +1457,7 @@ struct t_arch_switch_inf {
14571457
float Cin = 0.;
14581458
float Cout = 0.;
14591459
float Cinternal = 0.;
1460+
float penalty_cost = 0.;
14601461
float mux_trans_size = 1.;
14611462
BufferSize buf_size_type = BufferSize::AUTO;
14621463
float buf_size = 0.;
@@ -1521,6 +1522,7 @@ struct t_rr_switch_inf {
15211522
float Cout = 0.;
15221523
float Cinternal = 0.;
15231524
float Tdel = 0.;
1525+
float penalty_cost = 0.;
15241526
float mux_trans_size = 0.;
15251527
float buf_size = 0.;
15261528
const char* name = nullptr;

‎libs/libarchfpga/src/read_xml_arch_file.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -3987,23 +3987,23 @@ static void ProcessSwitches(pugi::xml_node Parent,
39873987
SwitchType type = SwitchType::MUX;
39883988
if (0 == strcmp(type_name, "mux")) {
39893989
type = SwitchType::MUX;
3990-
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Cinternal", "Tdel", "buf_size", "power_buf_size", "mux_trans_size"}, " with type '"s + type_name + "'"s, loc_data);
3990+
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Cinternal", "Tdel", "penalty_cost", "buf_size", "power_buf_size", "mux_trans_size"}, " with type '"s + type_name + "'"s, loc_data);
39913991

39923992
} else if (0 == strcmp(type_name, "tristate")) {
39933993
type = SwitchType::TRISTATE;
3994-
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Cinternal", "Tdel", "buf_size", "power_buf_size"}, " with type '"s + type_name + "'"s, loc_data);
3994+
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Cinternal", "Tdel", "penalty_cost", "buf_size", "power_buf_size"}, " with type '"s + type_name + "'"s, loc_data);
39953995

39963996
} else if (0 == strcmp(type_name, "buffer")) {
39973997
type = SwitchType::BUFFER;
3998-
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel", "buf_size", "power_buf_size"}, " with type '"s + type_name + "'"s, loc_data);
3998+
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel", "penalty_cost", "buf_size", "power_buf_size"}, " with type '"s + type_name + "'"s, loc_data);
39993999

40004000
} else if (0 == strcmp(type_name, "pass_gate")) {
40014001
type = SwitchType::PASS_GATE;
4002-
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel"}, " with type '"s + type_name + "'"s, loc_data);
4002+
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel", "penalty_cost"}, " with type '"s + type_name + "'"s, loc_data);
40034003

40044004
} else if (0 == strcmp(type_name, "short")) {
40054005
type = SwitchType::SHORT;
4006-
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel"}, " with type "s + type_name + "'"s, loc_data);
4006+
expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel", "penalty_cost"}, " with type "s + type_name + "'"s, loc_data);
40074007
} else {
40084008
archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node),
40094009
"Invalid switch type '%s'.\n", type_name);
@@ -4026,6 +4026,7 @@ static void ProcessSwitches(pugi::xml_node Parent,
40264026
arch_switch.Cin = get_attribute(Node, "Cin", loc_data, CIN_REQD).as_float(0);
40274027
arch_switch.Cout = get_attribute(Node, "Cout", loc_data, COUT_REQD).as_float(0);
40284028
arch_switch.Cinternal = get_attribute(Node, "Cinternal", loc_data, CINTERNAL_REQD).as_float(0);
4029+
arch_switch.penalty_cost = get_attribute(Node, "penalty_cost", loc_data, ReqOpt::OPTIONAL).as_float(0);
40294030

40304031
if (arch_switch.type() == SwitchType::MUX) {
40314032
//Only muxes have mux transistors

‎libs/libvtrcapnproto/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ endif()
1919
# Each schema used should appear here.
2020
set(CAPNP_DEFS
2121
place_delay_model.capnp
22+
connection_map.capnp
2223
matrix.capnp
2324
gen/rr_graph_uxsdcxx.capnp
2425
map_lookahead.capnp

‎libs/libvtrcapnproto/connection_map.capnp

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
@0x876ec83c2fea5a18;
2+
3+
using Matrix = import "matrix.capnp";
4+
5+
struct VprCostEntry {
6+
delay @0 :Float32;
7+
congestion @1 :Float32;
8+
fill @2 :Bool;
9+
}
10+
11+
struct VprVector2D {
12+
x @0 :Int64;
13+
y @1 :Int64;
14+
}
15+
16+
struct VprFloatEntry {
17+
value @0 :Float32;
18+
}
19+
20+
struct VprCostMap {
21+
costMap @0 :Matrix.Matrix((Matrix.Matrix(VprCostEntry)));
22+
offset @1 :Matrix.Matrix(VprVector2D);
23+
depField @2 :List(Int64);
24+
penalty @3 :Matrix.Matrix(VprFloatEntry);
25+
}

‎libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp

Lines changed: 32 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,11 +2,11 @@
22
# https://github.com/duck2/uxsdcxx
33
# Modify only if your build process doesn't involve regenerating this file.
44
#
5-
# Cmdline: uxsdcxx/uxsdcap.py /home/kmurray/trees/vtr/vpr/src/route/rr_graph.xsd
6-
# Input file: /home/kmurray/trees/vtr/vpr/src/route/rr_graph.xsd
7-
# md5sum of input file: 40e83d2ea6556761d4e29f21324b1871
5+
# Cmdline: uxsdcxx/uxsdcap.py rr_graph.xsd
6+
# Input file: rr_graph.xsd
7+
# md5sum of input file: bea3923ac9822e94db96d5d9d15e18c6
88

9-
@0xb803100e76d3342d;
9+
@0xf281a101eeb2a247;
1010
using Cxx = import "/capnp/c++.capnp";
1111
$Cxx.namespace("ucap");
1212

@@ -81,6 +81,7 @@ struct Timing {
8181
cout @2 :Float32;
8282
r @3 :Float32;
8383
tdel @4 :Float32;
84+
penaltyCost @5 :Float32;
8485
}
8586

8687
struct Sizing {
@@ -176,6 +177,18 @@ struct Metadata {
176177
metas @0 :List(Meta);
177178
}
178179

180+
struct CanonicalLoc {
181+
x @0 :UInt32;
182+
y @1 :UInt32;
183+
}
184+
185+
struct ConnectionBoxAnnotation {
186+
id @0 :UInt32;
187+
sitePinDelay @1 :Float32;
188+
x @2 :UInt32;
189+
y @3 :UInt32;
190+
}
191+
179192
struct Node {
180193
capacity @0 :UInt32;
181194
direction @1 :NodeDirection;
@@ -185,6 +198,8 @@ struct Node {
185198
timing @5 :NodeTiming;
186199
segment @6 :NodeSegment;
187200
metadata @7 :Metadata;
201+
canonicalLoc @8 :CanonicalLoc;
202+
connectionBox @9 :ConnectionBoxAnnotation;
188203
}
189204

190205
struct RrNodes {
@@ -202,6 +217,18 @@ struct RrEdges {
202217
edges @0 :List(Edge);
203218
}
204219

220+
struct ConnectionBoxDeclaration {
221+
id @0 :UInt32;
222+
name @1 :Text;
223+
}
224+
225+
struct ConnectionBoxes {
226+
numBoxes @0 :UInt32;
227+
xDim @1 :UInt32;
228+
yDim @2 :UInt32;
229+
connectionBoxes @3 :List(ConnectionBoxDeclaration);
230+
}
231+
205232
struct RrGraph {
206233
toolComment @0 :Text;
207234
toolName @1 :Text;
@@ -213,4 +240,5 @@ struct RrGraph {
213240
grid @7 :GridLocs;
214241
rrNodes @8 :RrNodes;
215242
rrEdges @9 :RrEdges;
243+
connectionBoxes @10 :ConnectionBoxes;
216244
}

‎vpr/src/base/SetupVPR.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -287,6 +287,7 @@ static void SetupSwitches(const t_arch& Arch,
287287
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].R = 0.;
288288
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].Cin = 0.;
289289
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].Cout = 0.;
290+
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].penalty_cost = 0.;
290291
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].set_Tdel(t_arch_switch_inf::UNDEFINED_FANIN, 0.);
291292
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].power_buffer_type = POWER_BUFFER_TYPE_NONE;
292293
device_ctx.arch_switch_inf[RoutingArch->delayless_switch].mux_trans_size = 0.;

‎vpr/src/base/ShowSetup.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -313,6 +313,9 @@ static void ShowRouterOpts(const t_router_opts& RouterOpts) {
313313
case e_router_lookahead::NO_OP:
314314
VTR_LOG("NO_OP\n");
315315
break;
316+
case e_router_lookahead::CONNECTION_BOX_MAP:
317+
VTR_LOG("CONNECTION_BOX_MAP\n");
318+
break;
316319
default:
317320
VPR_FATAL_ERROR(VPR_ERROR_UNKNOWN, "Unknown lookahead_type\n");
318321
}

‎vpr/src/base/read_options.cpp

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -775,6 +775,8 @@ struct ParseRouterLookahead {
775775
conv_value.set_value(e_router_lookahead::MAP);
776776
else if (str == "extended_map")
777777
conv_value.set_value(e_router_lookahead::EXTENDED_MAP);
778+
else if (str == "connection_box_map")
779+
conv_value.set_value(e_router_lookahead::CONNECTION_BOX_MAP);
778780
else {
779781
std::stringstream msg;
780782
msg << "Invalid conversion from '"
@@ -788,10 +790,12 @@ struct ParseRouterLookahead {
788790

789791
ConvertedValue<std::string> to_str(e_router_lookahead val) {
790792
ConvertedValue<std::string> conv_value;
791-
if (val == e_router_lookahead::CLASSIC)
793+
if (val == e_router_lookahead::CLASSIC) {
792794
conv_value.set_value("classic");
793-
else if (val == e_router_lookahead::MAP) {
795+
} else if (val == e_router_lookahead::MAP) {
794796
conv_value.set_value("map");
797+
} else if (val == e_router_lookahead::CONNECTION_BOX_MAP) {
798+
conv_value.set_value("connection_box_map");
795799
} else {
796800
VTR_ASSERT(val == e_router_lookahead::EXTENDED_MAP);
797801
conv_value.set_value("extended_map");
@@ -800,7 +804,7 @@ struct ParseRouterLookahead {
800804
}
801805

802806
std::vector<std::string> default_choices() {
803-
return {"classic", "map", "extended_map"};
807+
return {"classic", "map", "extended_map", "connection_box_map"};
804808
}
805809
};
806810

‎vpr/src/base/vpr_context.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@
2424
#include "place_macro.h"
2525
#include "compressed_grid.h"
2626
#include "metadata_storage.h"
27+
#include "connection_box.h"
2728

2829
/**
2930
* @brief A Context is collection of state relating to a particular part of VPR
@@ -231,6 +232,8 @@ struct DeviceContext : public Context {
231232
* Used to determine when reading rrgraph if file is already loaded.
232233
*/
233234
std::string read_rr_graph_filename;
235+
236+
ConnectionBoxes connection_boxes;
234237
};
235238

236239
/**

‎vpr/src/base/vpr_types.h

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -110,10 +110,11 @@ constexpr const char* EMPTY_BLOCK_NAME = "EMPTY";
110110
#endif
111111

112112
enum class e_router_lookahead {
113-
CLASSIC, ///<VPR's classic lookahead (assumes uniform wire types)
114-
MAP, ///<Lookahead considering different wire types (see Oleg Petelin's MASc Thesis)
115-
EXTENDED_MAP, ///<Lookahead with a more extensive node sampling method
116-
NO_OP ///<A no-operation lookahead which always returns zero
113+
CLASSIC, ///<VPR's classic lookahead (assumes uniform wire types)
114+
MAP, ///<Lookahead considering different wire types (see Oleg Petelin's MASc Thesis)
115+
EXTENDED_MAP, ///<Lookahead with a more extensive node sampling method
116+
NO_OP, ///<A no-operation lookahead which always returns zero
117+
CONNECTION_BOX_MAP ///<Lookahead considering different wire types and IPIN connection box.
117118
};
118119

119120
enum class e_route_bb_update {

0 commit comments

Comments
 (0)