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vtr_flow/tasks/regression_tests
vtr_reg_basic/basic_timing/config
strong_blocks_with_no_inputs/config
strong_cin_tie_off/config
strong_place_delay_calc_method/config
strong_place_delay_model/config
strong_soft_multipliers/config Expand file tree Collapse file tree 8 files changed +40
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- arch circuit script_params vtr_flow_elapsed_time error odin_synth_time max_odin_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_time placed_wirelength_est place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length
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- k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_4x4.v common 1.03 0.01 5816 1 0.02 -1 -1 29900 -1 -1 3 9 0 -1 success v8.0.0-1877-g77d3b9ae4 release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-60-generic x86_64 2020-06-02T18:06:14 betzgrp-wintermute.eecg.utoronto.ca /home/kmurray/trees/vtr/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/run015/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml/mult_4x4.v/common 26016 9 8 71 66 1 37 20 5 5 25 clb auto 0.47 85 0.06 0.00 2.22275 -22.7102 -2.22275 2.22275 0.000143941 0.000119207 0.019139 0.0157608 26 199 19 151211 75605.7 37105.9 1484.24 0.04 0.0304893 0.0250386 166 14 147 195 5055 2690 3.84065 3.84065 -36.0874 -3.84065 0 0 45067.1 1802.68 0.01 0.00348874 0.00302937 14 16 16 6 0 0
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- k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_9x9.v common 2.92 0.02 5952 1 0.02 -1 -1 30440 -1 -1 8 19 0 -1 success v8.0.0-1877-g77d3b9ae4 release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-60-generic x86_64 2020-06-02T18:06:14 betzgrp-wintermute.eecg.utoronto.ca /home/kmurray/trees/vtr/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/run015/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml/mult_9x9.v/common 28404 19 18 299 240 1 150 45 6 6 36 clb auto 1.94 498 0.11 0.00 3.67246 -67.9518 -3.67246 3.67246 0.00027031 0.000219413 0.0391563 0.03287 52 1244 30 403230 201615 110337. 3064.92 0.27 0.118437 0.100608 980 19 973 1386 60799 23055 5.39047 5.39047 -120.052 -5.39047 0 0 143382. 3982.83 0.03 0.0163773 0.0147932 62 81 85 13 0 0
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+ arch circuit script_params vtr_flow_elapsed_time error odin_synth_time max_odin_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_time placed_wirelength_est place_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile crit_path_route_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length
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+ k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_4x4.v common 1.32 0.01 5904 1 0.02 -1 -1 33020 -1 -1 3 9 0 -1 success v8.0.0-3766-g758cef2ab release IPO VTR_ASSERT_LEVEL=3 GNU 9.2.1 on Linux-4.15.0-88-generic x86_64 2020-04-15T10:35:35 acomodi /data/vtr-symbiflow/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/run002/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml/mult_4x4.v/common 27192 9 8 71 66 1 37 20 5 5 25 clb auto 0.76 85 0.08 2.22275 -22.7102 -2.22275 26 303 29 151211 75605.7 37105.9 1484.24 0.09 213 15 172 232 8312 4404 3.17075 3.17075 -40.2482 -3.17075 0 0 45067.1 1802.68 0.02 14 16 16 6 0 0
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+ k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_9x9.v common 4.03 0.01 6260 1 0.02 -1 -1 33008 -1 -1 8 19 0 -1 success v8.0.0-3766-g758cef2ab release IPO VTR_ASSERT_LEVEL=3 GNU 9.2.1 on Linux-4.15.0-88-generic x86_64 2020-04-15T10:35:35 acomodi /data/vtr-symbiflow/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/run002/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml/mult_9x9.v/common 30008 19 18 299 240 1 150 45 6 6 36 clb auto 2.74 498 0.24 3.67246 -67.9518 -3.67246 52 1339 29 403230 201615 110337. 3064.92 0.45 1036 22 1111 1712 64617 24432 5.93928 5.93928 -126.891 -5.93928 0 0 143382. 3982.83 0.04 62 81 85 13 0 0
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arch circuit script_params crit_path_delay_mcw clk_to_clk_cpd clk_to_clk2_cpd clk_to_input_cpd clk_to_output_cpd clk2_to_clk2_cpd clk2_to_clk_cpd clk2_to_input_cpd clk2_to_output_cpd input_to_input_cpd input_to_clk_cpd input_to_clk2_cpd input_to_output_cpd output_to_output_cpd output_to_clk_cpd output_to_clk2_cpd output_to_input_cpd clk_to_clk_setup_slack clk_to_clk2_setup_slack clk_to_input_setup_slack clk_to_output_setup_slack clk2_to_clk2_setup_slack clk2_to_clk_setup_slack clk2_to_input_setup_slack clk2_to_output_setup_slack input_to_input_setup_slack input_to_clk_setup_slack input_to_clk2_setup_slack input_to_output_setup_slack output_to_output_setup_slack output_to_clk_setup_slack output_to_clk2_setup_slack output_to_input_setup_slack clk_to_clk_hold_slack clk_to_clk2_hold_slack clk_to_input_hold_slack clk_to_output_hold_slack clk2_to_clk2_hold_slack clk2_to_clk_hold_slack clk2_to_input_hold_slack clk2_to_output_hold_slack input_to_input_hold_slack input_to_clk_hold_slack input_to_clk2_hold_slack input_to_output_hold_slack output_to_output_hold_slack output_to_clk_hold_slack output_to_clk2_hold_slack output_to_input_hold_slack
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- k6_frac_N10_mem32K_40nm_clk_buf.xml multiclock_buf.blif common 1.66564 0.545 -1 -1 -1 0.545 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.293 -1 -1 -1 0.293 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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+ k6_frac_N10_mem32K_40nm_clk_buf.xml multiclock_buf.blif common 2.06622 0.545 -1 -1 -1 0.545 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.293 -1 -1 -1 0.293 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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