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Fix S3 Boot hang #95

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Merged
merged 15 commits into from
May 1, 2024
13 changes: 11 additions & 2 deletions configs/builds.json
Original file line number Diff line number Diff line change
Expand Up @@ -131,17 +131,26 @@
{
"target": "esp32s3",
"features":[],
"idf_libs":["qio","120m","opi_ram"],
"idf_libs":["qio","80m","opi_ram"],
"bootloaders":[
["qio","120m","qio_ram"],
["qio","120m","opi_ram"],
["qio","80m","qio_ram"],
["qio","80m","opi_ram"],
["opi","120m","qio_ram"],
["opi","120m","opi_ram"],
["opi","80m","qio_ram"],
["opi","80m","opi_ram"]
],
"mem_variants":[
["qio","120m","qio_ram"],
["qio","120m","opi_ram"],
["qio","80m","qio_ram"],
["qio","80m","opi_ram"],
["opi","120m","qio_ram"],
["opi","120m","opi_ram"],
["opi","120m","qio_ram"]
["opi","80m","qio_ram"],
["opi","80m","opi_ram"]
]
}
]
Expand Down
9 changes: 0 additions & 9 deletions configs/defconfig.opi_ram
Original file line number Diff line number Diff line change
@@ -1,12 +1,3 @@
CONFIG_SPIRAM_MODE_OCT=y
CONFIG_SPIRAM_IGNORE_NOTFOUND=y
# CONFIG_SPIRAM_MEMTEST is not set
CONFIG_LCD_RGB_ISR_IRAM_SAFE=y
CONFIG_GDMA_CTRL_FUNC_IN_IRAM=y
# bounce buffer mode relies on GDMA EOF interrupt to be service-able
CONFIG_GDMA_ISR_IRAM_SAFE=y
# place non-ISR FreeRTOS functions in Flash
CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
# Enable the XIP-PSRAM feature, so the ext-mem cache won't be disabled when SPI1 is operating the main flash
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
CONFIG_SPIRAM_RODATA=y