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fpistm
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Merge pull request stm32duino#1494 from zfields/swan_r5
Configure Swan R5 initial behaviors
2 parents 5d64997 + e506d85 commit 6ad1f5a

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3 files changed

+49
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Diff for: ‎variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/PeripheralPins_SWAN_R5.c

+26-26
Original file line numberDiff line numberDiff line change
@@ -68,38 +68,38 @@ WEAK const PinMap PinMap_DAC[] = {
6868

6969
#ifdef HAL_I2C_MODULE_ENABLED
7070
WEAK const PinMap PinMap_I2C_SDA[] = {
71-
{PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
72-
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
73-
{PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)},
74-
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
75-
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
76-
{PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)},
77-
{PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
78-
{PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
79-
{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C3)},
80-
// {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, // NC
81-
{PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
82-
{PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
83-
{PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
84-
// {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // NC
71+
{PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C3)},
72+
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C1)},
73+
{PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF5_I2C4)},
74+
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C1)},
75+
{PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C2)},
76+
{PB_11_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF3_I2C4)},
77+
{PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C2)},
78+
{PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C3)},
79+
{PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF6_I2C3)},
80+
// {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C4)}, // NC
81+
{PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C2)},
82+
{PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C4)},
83+
{PG_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C3)},
84+
// {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C1)}, // NC
8585
{NC, NP, 0}
8686
};
8787
#endif
8888

8989
#ifdef HAL_I2C_MODULE_ENABLED
9090
WEAK const PinMap PinMap_I2C_SCL[] = {
91-
{PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
92-
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
93-
{PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C4)},
94-
// {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // NC
95-
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
96-
{PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)},
97-
{PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
98-
{PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
99-
// {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, // NC
100-
{PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
101-
// {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, // NC
102-
{PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
91+
{PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C3)},
92+
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C1)},
93+
{PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF5_I2C4)},
94+
// {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C1)}, // NC
95+
{PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C2)},
96+
{PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF3_I2C4)},
97+
{PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C2)},
98+
{PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C3)},
99+
// {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C4)}, // NC
100+
{PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C2)},
101+
// {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C4)}, // NC
102+
{PG_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF4_I2C3)},
103103
{NC, NP, 0}
104104
};
105105
#endif

Diff for: ‎variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp

+17
Original file line numberDiff line numberDiff line change
@@ -118,6 +118,23 @@ const uint32_t analogInputPin[] = {
118118
extern "C" {
119119
#endif
120120

121+
WEAK void initVariant(void)
122+
{
123+
/* Initialize the 3V3 discharge to be OFF and the output power to be ON */
124+
__HAL_RCC_GPIOE_CLK_ENABLE();
125+
GPIO_InitTypeDef GPIO_InitStruct;
126+
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
127+
GPIO_InitStruct.Pull = GPIO_NOPULL;
128+
GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
129+
GPIO_InitStruct.Pin = GPIO_PIN_6;
130+
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
131+
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_6, GPIO_PIN_SET);
132+
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
133+
GPIO_InitStruct.Pin = GPIO_PIN_4;
134+
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
135+
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_4, GPIO_PIN_SET);
136+
}
137+
121138
/**
122139
* @brief System Clock Configuration
123140
* @param None

Diff for: ‎variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.h

+6-1
Original file line numberDiff line numberDiff line change
@@ -181,10 +181,15 @@
181181
#define USER_BTN PC13
182182
#endif
183183

184-
// Power switch EN pin
184+
// Power switch ENABLE and DISCHARGE pins
185185
#ifndef ENABLE_3V3
186186
#define ENABLE_3V3 PE4
187187
#endif
188+
#ifndef DISCHARGE_3V3
189+
#define DISCHARGE_3V3 PE6
190+
#define DISABLE_DISCHARGING HIGH
191+
#define ENABLE_DISCHARGING LOW
192+
#endif
188193

189194
// SPI definitions
190195
#ifndef PIN_SPI_SS

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