From 34d1b6073aa2b69855a0372eba2850ff4a5d0160 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Sat, 16 Feb 2019 17:22:52 -0400
Subject: [PATCH 01/15] Add part-select keyword as a language coverage

---
 ODIN_II/SRC/ast_util.cpp                      | 70 +++++++++++++++++++
 ODIN_II/SRC/include/ast_util.h                |  1 +
 ODIN_II/SRC/include/odin_types.h              |  1 +
 ODIN_II/SRC/include/parse_making_ast.h        |  1 +
 ODIN_II/SRC/netlist_create_from_ast.cpp       |  1 +
 ODIN_II/SRC/parse_making_ast.cpp              | 20 ++++++
 ODIN_II/SRC/verilog_bison.y                   |  5 +-
 ODIN_II/SRC/verilog_flex.l                    |  5 +-
 .../benchmark/operators/minuscolon_6_bit.v    | 11 +++
 .../operators/minuscolon_6_bit_input          | 11 +++
 .../operators/minuscolon_6_bit_output         | 11 +++
 11 files changed, 134 insertions(+), 3 deletions(-)
 create mode 100644 ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit.v
 create mode 100644 ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_input
 create mode 100644 ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_output

diff --git a/ODIN_II/SRC/ast_util.cpp b/ODIN_II/SRC/ast_util.cpp
index 6bcdcf3f981..a9e1585d194 100644
--- a/ODIN_II/SRC/ast_util.cpp
+++ b/ODIN_II/SRC/ast_util.cpp
@@ -398,6 +398,31 @@ int get_range(ast_node_t* first_node)
 	return -1; // indicates no range
 }
 
+/*---------------------------------------------------------------------------------------------
+ * (function: get_range_part_select)
+ * 	Check the node range is legal. Will return the range if it's legal.
+ *  Node should have three children. Second and Third children's type should be NUMBERS.
+ *  Direction parameter differentiates between ascending/descending part selector (1 for
+ *  ascending and -1 for descending selection).
+ *-------------------------------------------------------------------------------------------*/
+int get_range_part_select(ast_node_t *first_node, char direction)
+{
+	/* look at the first item to see if it has a range */
+	if (first_node->children[1] != NULL && first_node->children[1]->type == NUMBERS && first_node->children[2] != NULL && first_node->children[2]->type == NUMBERS)
+	{
+		/* TODO: added range checks according to standard:
+		 * Part-selects that are partially out of range shall,
+		 * when read, return x for the bits that are out of range and shall,
+		 * when written, only affect the bits that are in range.
+		 */
+		long long int *pwidth = &first_node->children[2]->types.number.value;
+		*pwidth = *pwidth * direction;
+
+		return abs(*pwidth);
+	}
+	return -1; // indicates no range
+}
+
 /*---------------------------------------------------------------------------------------------
  * (function: make_concat_into_list_of_strings)
  * 	0th idx will be the MSbit
@@ -488,6 +513,21 @@ void make_concat_into_list_of_strings(ast_node_t *concat_top, char *instance_nam
 					get_name_of_pin_at_bit(concat_top->children[i], ((rnode[1]->types.number.value - rnode[2]->types.number.value))-j, instance_name_prefix);
 			}
 		}
+		else if (concat_top->children[i]->type == RANGE_PART_REF)
+		{
+			rnode[1] = resolve_node(NULL, FALSE, instance_name_prefix, concat_top->children[i]->children[1]);
+			rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, concat_top->children[i]->children[2]);
+			oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS);
+			int width = abs(rnode[2]->types.number.value);
+			int msb = rnode[2]->types.number.value < 0 ? rnode[1]->types.number.value : rnode[1]->types.number.value + width;
+			for (j = 0; j < width; j++)
+			{
+				concat_top->types.concat.num_bit_strings ++;
+				concat_top->types.concat.bit_strings = (char**)vtr::realloc(concat_top->types.concat.bit_strings, sizeof(char*)*(concat_top->types.concat.num_bit_strings));
+				concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings-1] =
+					get_name_of_pin_at_bit(concat_top->children[i], msb - j, instance_name_prefix);
+			}
+		}
 		else if (concat_top->children[i]->type == NUMBERS)
 		{
 			if(concat_top->children[i]->types.number.base == DEC)
@@ -602,6 +642,16 @@ char *get_name_of_pin_at_bit(ast_node_t *var_node, int bit, char *instance_name_
 
 		return_string = make_full_ref_name(NULL, NULL, NULL, var_node->children[0]->types.identifier, rnode[2]->types.number.value+bit);
 	}
+	else if (var_node->type == RANGE_PART_REF)
+	{
+		rnode[1] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[1]);
+		rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[2]);
+		oassert(var_node->children[0]->type == IDENTIFIERS);
+		oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS);
+		oassert((rnode[1]->types.number.value >= rnode[2]->types.number.value+bit) && bit >= 0);
+
+		return_string = make_full_ref_name(NULL, NULL, NULL, var_node->children[0]->types.identifier, rnode[1]->types.number.value+bit);
+	}
 	else if ((var_node->type == IDENTIFIERS) && (bit == -1))
 	{
 		return_string = make_full_ref_name(NULL, NULL, NULL, var_node->types.identifier, -1);
@@ -756,6 +806,26 @@ char_list_t *get_name_of_pins(ast_node_t *var_node, char *instance_name_prefix)
 			return_string = get_name_of_pins_number(rnode[0], rnode[2]->types.number.value, width);
 		}
 	}
+	else if (var_node->type == RANGE_PART_REF)
+	{
+		rnode[0] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[0]);
+		rnode[1] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[1]);
+		rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[2]);
+		oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS);
+		width = abs(rnode[2]->types.number.value);
+		int lsb = rnode[2]->types.number.value < 0 ? rnode[1]->types.number.value - width + 1 : rnode[1]->types.number.value;
+		if (rnode[0]->type == IDENTIFIERS)
+		{
+			return_string = (char**)vtr::malloc(sizeof(char*)*width);
+			for (i = 0; i < width; i++)
+				return_string[i] = make_full_ref_name(NULL, NULL, NULL, rnode[0]->types.identifier, lsb + i);
+		}
+		else
+		{
+			oassert(rnode[0]->type == NUMBERS);
+			return_string = get_name_of_pins_number(rnode[0], lsb + width, width);
+		}
+	}
 	else if (var_node->type == IDENTIFIERS)
 	{
 		/* need to look in the symbol table for details about this identifier (i.e. is it a port) */
diff --git a/ODIN_II/SRC/include/ast_util.h b/ODIN_II/SRC/include/ast_util.h
index 458f6215c1a..1677cbc2cbe 100644
--- a/ODIN_II/SRC/include/ast_util.h
+++ b/ODIN_II/SRC/include/ast_util.h
@@ -24,6 +24,7 @@ void make_concat_into_list_of_strings(ast_node_t *concat_top, char *instance_nam
 void change_to_number_node(ast_node_t *node, long number);
 
 int get_range(ast_node_t* first_node);
+int get_range_part_select(ast_node_t *first_node, char direction);
 char *get_name_of_pin_at_bit(ast_node_t *var_node, int bit, char *instance_name_prefix);
 char *get_name_of_var_declare_at_bit(ast_node_t *var_declare, int bit);
 char_list_t *get_name_of_pins(ast_node_t *var_node, char *instance_name_prefix);
diff --git a/ODIN_II/SRC/include/odin_types.h b/ODIN_II/SRC/include/odin_types.h
index 6d48270c056..70e3305cc01 100644
--- a/ODIN_II/SRC/include/odin_types.h
+++ b/ODIN_II/SRC/include/odin_types.h
@@ -332,6 +332,7 @@ typedef enum
 	/* basic primitives */
 	ARRAY_REF,
 	RANGE_REF,
+	RANGE_PART_REF,
 	CONCATENATE,
 	/* basic identifiers */
 	IDENTIFIERS,
diff --git a/ODIN_II/SRC/include/parse_making_ast.h b/ODIN_II/SRC/include/parse_making_ast.h
index 7ff8d14f5ef..d94504c9237 100644
--- a/ODIN_II/SRC/include/parse_making_ast.h
+++ b/ODIN_II/SRC/include/parse_making_ast.h
@@ -21,6 +21,7 @@ ast_node_t *markAndProcessSymbolListWith(ids top_type, ids id, ast_node_t *symbo
 ast_node_t *newArrayRef(char *id, ast_node_t *expression, int line_number);
 ast_node_t *newArrayRef2D(char *id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
 ast_node_t *newRangeRef(char *id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
+ast_node_t *newRangePartSelect(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction, int line_number);
 ast_node_t *newRangeRef2D(char *id, ast_node_t *expression1, ast_node_t *expression2, ast_node_t *expression3, ast_node_t *expression4, int line_number);
 ast_node_t *newBinaryOperation(operation_list op_id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
 ast_node_t *newExpandPower(operation_list op_id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
diff --git a/ODIN_II/SRC/netlist_create_from_ast.cpp b/ODIN_II/SRC/netlist_create_from_ast.cpp
index b76f71eb972..3304729abb3 100644
--- a/ODIN_II/SRC/netlist_create_from_ast.cpp
+++ b/ODIN_II/SRC/netlist_create_from_ast.cpp
@@ -782,6 +782,7 @@ signal_list_t *netlist_expand_ast_of_module(ast_node_t* node, char *instance_nam
 				break;
 			}
 			case RANGE_REF:
+			case RANGE_PART_REF:
 			case NUMBERS:
 			{
 				return_sig_list = create_pins(node, NULL, instance_name_prefix);
diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index 2e75cd1b116..a036ed6197c 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -835,6 +835,26 @@ ast_node_t *newRangeRef(char *id, ast_node_t *expression1, ast_node_t *expressio
 	return new_node;
 }
 
+
+/*---------------------------------------------------------------------------------------------
+ * (function: newRangePartSelect)
+ *-------------------------------------------------------------------------------------------*/
+ast_node_t *newRangePartSelect(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction, int line_number)
+{
+	/* allocate or check if there's a node for this */
+	ast_node_t *symbol_node = newSymbolNode(id, line_number);
+
+	/* create a node for this array reference */
+	ast_node_t* new_node = create_node_w_type(RANGE_PART_REF, line_number, current_parse_file);
+
+	/* allocate child nodes to this node */
+	allocate_children_to_node(new_node, 3, symbol_node, expression1, expression2);
+
+	get_range_part_select(new_node, direction);
+
+	return new_node;
+}
+
 /*---------------------------------------------------------------------------------------------
  * (function: newBinaryOperation)
  *-------------------------------------------------------------------------------------------*/
diff --git a/ODIN_II/SRC/verilog_bison.y b/ODIN_II/SRC/verilog_bison.y
index 37aca290805..ac0f74726b0 100644
--- a/ODIN_II/SRC/verilog_bison.y
+++ b/ODIN_II/SRC/verilog_bison.y
@@ -65,7 +65,8 @@ int yylex(void);
 %token vOUTPUT vPARAMETER vPOSEDGE vREG vWIRE vXNOR vXOR vDEFPARAM voANDAND
 %token voOROR voLTE voGTE voPAL voSLEFT voSRIGHT vo ASRIGHT voEQUAL voNOTEQUAL voCASEEQUAL
 %token voCASENOTEQUAL voXNOR voNAND voNOR vWHILE vINTEGER
-%token vNOT_SUPPORT
+%token vNOT_SUPPORT 
+%token vPLUS_COLON vMINUS_COLON
 %token '?' ':' '|' '^' '&' '<' '>' '+' '-' '*' '/' '%' '(' ')' '{' '}' '[' ']'
 
 %right '?' ':'
@@ -510,6 +511,8 @@ primary:
 	| vSYMBOL_ID											{$$ = newSymbolNode($1, yylineno);}
 	| vSYMBOL_ID '[' expression ']'							{$$ = newArrayRef($1, $3, yylineno);}
 	| vSYMBOL_ID '[' expression ']' '[' expression ']'		{$$ = newArrayRef2D($1, $3, $6, yylineno);}
+	| vSYMBOL_ID '[' expression vPLUS_COLON expression ']'   	{$$ = newRangePartSelect($1, $3, $5, 1, yylineno);}
+	| vSYMBOL_ID '[' expression vMINUS_COLON expression ']'   	{$$ = newRangePartSelect($1, $3, $5, -1, yylineno);}
 	| vSYMBOL_ID '[' expression ':' expression ']'			{$$ = newRangeRef($1, $3, $5, yylineno);}
 	| vSYMBOL_ID '[' expression ':' expression ']' '[' expression ':' expression ']'	{$$ = newRangeRef2D($1, $3, $5, $8, $10, yylineno);}
 	| '{' probable_expression_list '}' 						{$$ = $2; ($2)->types.concat.num_bit_strings = -1;}
diff --git a/ODIN_II/SRC/verilog_flex.l b/ODIN_II/SRC/verilog_flex.l
index b1979a38d9c..74215b64c21 100644
--- a/ODIN_II/SRC/verilog_flex.l
+++ b/ODIN_II/SRC/verilog_flex.l
@@ -175,11 +175,12 @@ char* standardize_number(const char* input);
 <INITIAL>"~^"				{ MP; return voXNOR;}
 <INITIAL>"~&"				{ MP; return voNAND;}
 <INITIAL>"~|"				{ MP; return voNOR;}
+<INITIAL>"+:"				{ MP; return vPLUS_COLON;}
+<INITIAL>"-:"				{ MP; return vMINUS_COLON;}
 
 	/*	unsupported Operators	*/
 <INITIAL>"&&&"				{ MP; return vNOT_SUPPORT;}
-<INITIAL>"+:"				{ MP; return vNOT_SUPPORT;}
-<INITIAL>"-:"				{ MP; return vNOT_SUPPORT;}
+
 
 
 	/*	operands	*/
diff --git a/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit.v b/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit.v
new file mode 100644
index 00000000000..d6a3196eee9
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit.v
@@ -0,0 +1,11 @@
+module OR2in (A,B,C1,C2);
+ 
+input [5:0] A  ;
+input  [5:0] B ;
+output [2:0] C1 ;
+output [2:0] C2 ;
+
+assign  C1=A[2-:3] | B[2-:3] ;
+assign C2=A[5-:3] | B[5-:3] ;
+
+endmodule
diff --git a/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_input b/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_input
new file mode 100644
index 00000000000..2488114e6a4
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_input
@@ -0,0 +1,11 @@
+GLOBAL_SIM_BASE_CLK A B
+0 0X20 0X26
+0 0X2C 0X16
+0 0X3C 0X36
+0 0X22 0X06
+0 0X24 0X20
+0 0X01 0X06
+0 0X0C 0X07
+0 0X01 0X26
+0 0X21 0X06
+0 0X0C 0X26
\ No newline at end of file
diff --git a/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_output b/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_output
new file mode 100644
index 00000000000..e9d2c31982b
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_output
@@ -0,0 +1,11 @@
+C1 C2
+0X06 0X04
+0X06 0X07
+0X06 0X07
+0X06 0X04
+0x04 0x04
+0x07 0x00
+0x07 0x01
+0x07 0x04
+0x07 0x04 
+0x06 0x05

From 348b2b8a9ebfd1bd8633b651934dfc8b7a659273 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Sun, 17 Feb 2019 12:52:49 -0400
Subject: [PATCH 02/15] new line at the end of the file

---
 .../regression_test/benchmark/operators/minuscolon_6_bit_input | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_input b/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_input
index 2488114e6a4..4f386527d78 100644
--- a/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_input
+++ b/ODIN_II/regression_test/benchmark/operators/minuscolon_6_bit_input
@@ -8,4 +8,5 @@ GLOBAL_SIM_BASE_CLK A B
 0 0X0C 0X07
 0 0X01 0X26
 0 0X21 0X06
-0 0X0C 0X26
\ No newline at end of file
+0 0X0C 0X26
+

From fbdf94fe936015d7ddb66a7e7131d0a5a2a6a6a9 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Tue, 19 Feb 2019 09:15:00 -0400
Subject: [PATCH 03/15] Update Documentation according to index part-select

---
 ODIN_II/README.rst     | 6 ++++--
 doc/src/odin/index.rst | 5 +++++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/ODIN_II/README.rst b/ODIN_II/README.rst
index dcd7fd33749..a9804850904 100644
--- a/ODIN_II/README.rst
+++ b/ODIN_II/README.rst
@@ -309,8 +309,10 @@ Verilog Synthesizable Keyword Support:
 +-------------------+------------------+---------------------+--------------------+
 | macromodule       |                  |                     |                    |
 +-------------------+------------------+---------------------+--------------------+
-
-
+| +:                |                  |                     |                    |
++-------------------+------------------+---------------------+--------------------+
+| -:                |                  |                     |                    |
++-------------------+------------------+---------------------+--------------------+
 
 Verilog NON-Synthesizable Keyword Support:
 *********************************
diff --git a/doc/src/odin/index.rst b/doc/src/odin/index.rst
index 22b4f83c5a1..a34ace03420 100644
--- a/doc/src/odin/index.rst
+++ b/doc/src/odin/index.rst
@@ -309,6 +309,11 @@ Verilog Synthesizable Keyword Support:
 +-------------------+------------------+---------------------+--------------------+
 | macromodule       |                  |                     |                    |
 +-------------------+------------------+---------------------+--------------------+
+| +:                |                  |                     |                    |
++-------------------+------------------+---------------------+--------------------+
+| -:                |                  |                     |                    |
++-------------------+------------------+---------------------+--------------------+
+
 
 
 Verilog NON-Synthesizable Keyword Support:

From ac9fe71be943e7f6b9f0891b35ef89e048c709c3 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi <nasrin.eshraghi@unb.ca>
Date: Thu, 28 Feb 2019 23:27:57 +0330
Subject: [PATCH 04/15] added range checking to part-selct operator

---
 ODIN_II/SRC/ast_util.cpp               | 10 +++++---
 ODIN_II/SRC/include/parse_making_ast.h |  2 +-
 ODIN_II/SRC/parse_making_ast.cpp       | 35 ++++++++++++++++++++++++--
 ODIN_II/SRC/verilog_bison.y            |  4 +--
 4 files changed, 42 insertions(+), 9 deletions(-)

diff --git a/ODIN_II/SRC/ast_util.cpp b/ODIN_II/SRC/ast_util.cpp
index a9e1585d194..fc5e97d12c8 100644
--- a/ODIN_II/SRC/ast_util.cpp
+++ b/ODIN_II/SRC/ast_util.cpp
@@ -519,7 +519,7 @@ void make_concat_into_list_of_strings(ast_node_t *concat_top, char *instance_nam
 			rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, concat_top->children[i]->children[2]);
 			oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS);
 			int width = abs(rnode[2]->types.number.value);
-			int msb = rnode[2]->types.number.value < 0 ? rnode[1]->types.number.value : rnode[1]->types.number.value + width;
+			long long msb = rnode[2]->types.number.value < 0 ? rnode[1]->types.number.value : rnode[1]->types.number.value + width;
 			for (j = 0; j < width; j++)
 			{
 				concat_top->types.concat.num_bit_strings ++;
@@ -647,8 +647,9 @@ char *get_name_of_pin_at_bit(ast_node_t *var_node, int bit, char *instance_name_
 		rnode[1] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[1]);
 		rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[2]);
 		oassert(var_node->children[0]->type == IDENTIFIERS);
-		oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS);
-		oassert((rnode[1]->types.number.value >= rnode[2]->types.number.value+bit) && bit >= 0);
+		oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS)
+		/* In the case of big_vect[msb_base_expr -: width_expr], width should not be bigger that the msb */
+		oassert(rnode[2]->types.number.value < 0 && (rnode[1]->types.number.value >= -(rnode[2]->types.number.value)+bit) && bit >= 0);
 
 		return_string = make_full_ref_name(NULL, NULL, NULL, var_node->children[0]->types.identifier, rnode[1]->types.number.value+bit);
 	}
@@ -811,9 +812,10 @@ char_list_t *get_name_of_pins(ast_node_t *var_node, char *instance_name_prefix)
 		rnode[0] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[0]);
 		rnode[1] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[1]);
 		rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[2]);
+
 		oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS);
 		width = abs(rnode[2]->types.number.value);
-		int lsb = rnode[2]->types.number.value < 0 ? rnode[1]->types.number.value - width + 1 : rnode[1]->types.number.value;
+		long long lsb = rnode[2]->types.number.value < 0 ? rnode[1]->types.number.value - width + 1 : rnode[1]->types.number.value;
 		if (rnode[0]->type == IDENTIFIERS)
 		{
 			return_string = (char**)vtr::malloc(sizeof(char*)*width);
diff --git a/ODIN_II/SRC/include/parse_making_ast.h b/ODIN_II/SRC/include/parse_making_ast.h
index d94504c9237..35334fdf24d 100644
--- a/ODIN_II/SRC/include/parse_making_ast.h
+++ b/ODIN_II/SRC/include/parse_making_ast.h
@@ -21,7 +21,7 @@ ast_node_t *markAndProcessSymbolListWith(ids top_type, ids id, ast_node_t *symbo
 ast_node_t *newArrayRef(char *id, ast_node_t *expression, int line_number);
 ast_node_t *newArrayRef2D(char *id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
 ast_node_t *newRangeRef(char *id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
-ast_node_t *newRangePartSelect(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction, int line_number);
+ast_node_t *newPartSelectRange(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction, int line_number);
 ast_node_t *newRangeRef2D(char *id, ast_node_t *expression1, ast_node_t *expression2, ast_node_t *expression3, ast_node_t *expression4, int line_number);
 ast_node_t *newBinaryOperation(operation_list op_id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
 ast_node_t *newExpandPower(operation_list op_id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index a036ed6197c..cf2144b0cb8 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -837,10 +837,41 @@ ast_node_t *newRangeRef(char *id, ast_node_t *expression1, ast_node_t *expressio
 
 
 /*---------------------------------------------------------------------------------------------
- * (function: newRangePartSelect)
+ * (function: newPartSelectRange)
  *-------------------------------------------------------------------------------------------*/
-ast_node_t *newRangePartSelect(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction, int line_number)
+ast_node_t *newPartSelectRange(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction, int line_number)
 {
+
+	long sc_spot;
+
+	/* Try to find the original array to check low/high indices */
+	if ((sc_spot = sc_lookup_string(modules_inputs_sc, id)) == -1 &&
+		(sc_spot = sc_lookup_string(modules_outputs_sc, id)) == -1){
+		error_message(PARSE_ERROR, line_number, current_parse_file, "Could not find variable %s", id);
+		return nullptr;
+	}
+
+	ast_node_t *original_range = (ast_node_t *) modules_inputs_sc->data[sc_spot];;
+	long long upper_limit = original_range->children[1]->types.number.value;
+	long long bottom_limit = original_range->children[2]->types.number.value;
+	long long width = expression2->types.number.value;
+	long long low_index = expression1->types.number.value;
+	long long high_index = expression1->types.number.value;
+
+	if (direction == 1)
+		high_index = low_index + width - 1;
+	else
+		low_index = high_index - width + 1;
+
+	if (low_index < bottom_limit || low_index > upper_limit ||
+		high_index < bottom_limit|| high_index > upper_limit) {
+		/* Out of range */
+		error_message(PARSE_ERROR, line_number, current_parse_file,
+					  "The given indices (%s[%d%s%d]) are out of range. It should be within the range: [%d:%d].",
+					  id, expression1->types.number.value, direction == 1 ? "+:" : "-:", expression2->types.number.value,
+					  upper_limit, bottom_limit);
+	}
+
 	/* allocate or check if there's a node for this */
 	ast_node_t *symbol_node = newSymbolNode(id, line_number);
 
diff --git a/ODIN_II/SRC/verilog_bison.y b/ODIN_II/SRC/verilog_bison.y
index ac0f74726b0..d0d7660bcf9 100644
--- a/ODIN_II/SRC/verilog_bison.y
+++ b/ODIN_II/SRC/verilog_bison.y
@@ -511,8 +511,8 @@ primary:
 	| vSYMBOL_ID											{$$ = newSymbolNode($1, yylineno);}
 	| vSYMBOL_ID '[' expression ']'							{$$ = newArrayRef($1, $3, yylineno);}
 	| vSYMBOL_ID '[' expression ']' '[' expression ']'		{$$ = newArrayRef2D($1, $3, $6, yylineno);}
-	| vSYMBOL_ID '[' expression vPLUS_COLON expression ']'   	{$$ = newRangePartSelect($1, $3, $5, 1, yylineno);}
-	| vSYMBOL_ID '[' expression vMINUS_COLON expression ']'   	{$$ = newRangePartSelect($1, $3, $5, -1, yylineno);}
+	| vSYMBOL_ID '[' expression vPLUS_COLON expression ']'   	{$$ = newPartSelectRange($1, $3, $5, 1, yylineno);}
+	| vSYMBOL_ID '[' expression vMINUS_COLON expression ']'   	{$$ = newPartSelectRange($1, $3, $5, -1, yylineno);}
 	| vSYMBOL_ID '[' expression ':' expression ']'			{$$ = newRangeRef($1, $3, $5, yylineno);}
 	| vSYMBOL_ID '[' expression ':' expression ']' '[' expression ':' expression ']'	{$$ = newRangeRef2D($1, $3, $5, $8, $10, yylineno);}
 	| '{' probable_expression_list '}' 						{$$ = $2; ($2)->types.concat.num_bit_strings = -1;}

From 029e21fa9e05a2a6c780e720ab5a760be579a5b3 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Thu, 7 Mar 2019 00:25:24 +0330
Subject: [PATCH 05/15] refactored newPartSelectRangeRef into newRangeRef

---
 ODIN_II/SRC/ast_util.cpp                | 72 -------------------------
 ODIN_II/SRC/include/ast_util.h          |  2 +-
 ODIN_II/SRC/include/odin_types.h        |  1 -
 ODIN_II/SRC/include/parse_making_ast.h  |  3 +-
 ODIN_II/SRC/netlist_create_from_ast.cpp |  1 -
 ODIN_II/SRC/parse_making_ast.cpp        | 44 ++++-----------
 ODIN_II/SRC/verilog_bison.y             |  4 +-
 7 files changed, 16 insertions(+), 111 deletions(-)

diff --git a/ODIN_II/SRC/ast_util.cpp b/ODIN_II/SRC/ast_util.cpp
index fc5e97d12c8..6bcdcf3f981 100644
--- a/ODIN_II/SRC/ast_util.cpp
+++ b/ODIN_II/SRC/ast_util.cpp
@@ -398,31 +398,6 @@ int get_range(ast_node_t* first_node)
 	return -1; // indicates no range
 }
 
-/*---------------------------------------------------------------------------------------------
- * (function: get_range_part_select)
- * 	Check the node range is legal. Will return the range if it's legal.
- *  Node should have three children. Second and Third children's type should be NUMBERS.
- *  Direction parameter differentiates between ascending/descending part selector (1 for
- *  ascending and -1 for descending selection).
- *-------------------------------------------------------------------------------------------*/
-int get_range_part_select(ast_node_t *first_node, char direction)
-{
-	/* look at the first item to see if it has a range */
-	if (first_node->children[1] != NULL && first_node->children[1]->type == NUMBERS && first_node->children[2] != NULL && first_node->children[2]->type == NUMBERS)
-	{
-		/* TODO: added range checks according to standard:
-		 * Part-selects that are partially out of range shall,
-		 * when read, return x for the bits that are out of range and shall,
-		 * when written, only affect the bits that are in range.
-		 */
-		long long int *pwidth = &first_node->children[2]->types.number.value;
-		*pwidth = *pwidth * direction;
-
-		return abs(*pwidth);
-	}
-	return -1; // indicates no range
-}
-
 /*---------------------------------------------------------------------------------------------
  * (function: make_concat_into_list_of_strings)
  * 	0th idx will be the MSbit
@@ -513,21 +488,6 @@ void make_concat_into_list_of_strings(ast_node_t *concat_top, char *instance_nam
 					get_name_of_pin_at_bit(concat_top->children[i], ((rnode[1]->types.number.value - rnode[2]->types.number.value))-j, instance_name_prefix);
 			}
 		}
-		else if (concat_top->children[i]->type == RANGE_PART_REF)
-		{
-			rnode[1] = resolve_node(NULL, FALSE, instance_name_prefix, concat_top->children[i]->children[1]);
-			rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, concat_top->children[i]->children[2]);
-			oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS);
-			int width = abs(rnode[2]->types.number.value);
-			long long msb = rnode[2]->types.number.value < 0 ? rnode[1]->types.number.value : rnode[1]->types.number.value + width;
-			for (j = 0; j < width; j++)
-			{
-				concat_top->types.concat.num_bit_strings ++;
-				concat_top->types.concat.bit_strings = (char**)vtr::realloc(concat_top->types.concat.bit_strings, sizeof(char*)*(concat_top->types.concat.num_bit_strings));
-				concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings-1] =
-					get_name_of_pin_at_bit(concat_top->children[i], msb - j, instance_name_prefix);
-			}
-		}
 		else if (concat_top->children[i]->type == NUMBERS)
 		{
 			if(concat_top->children[i]->types.number.base == DEC)
@@ -642,17 +602,6 @@ char *get_name_of_pin_at_bit(ast_node_t *var_node, int bit, char *instance_name_
 
 		return_string = make_full_ref_name(NULL, NULL, NULL, var_node->children[0]->types.identifier, rnode[2]->types.number.value+bit);
 	}
-	else if (var_node->type == RANGE_PART_REF)
-	{
-		rnode[1] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[1]);
-		rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[2]);
-		oassert(var_node->children[0]->type == IDENTIFIERS);
-		oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS)
-		/* In the case of big_vect[msb_base_expr -: width_expr], width should not be bigger that the msb */
-		oassert(rnode[2]->types.number.value < 0 && (rnode[1]->types.number.value >= -(rnode[2]->types.number.value)+bit) && bit >= 0);
-
-		return_string = make_full_ref_name(NULL, NULL, NULL, var_node->children[0]->types.identifier, rnode[1]->types.number.value+bit);
-	}
 	else if ((var_node->type == IDENTIFIERS) && (bit == -1))
 	{
 		return_string = make_full_ref_name(NULL, NULL, NULL, var_node->types.identifier, -1);
@@ -807,27 +756,6 @@ char_list_t *get_name_of_pins(ast_node_t *var_node, char *instance_name_prefix)
 			return_string = get_name_of_pins_number(rnode[0], rnode[2]->types.number.value, width);
 		}
 	}
-	else if (var_node->type == RANGE_PART_REF)
-	{
-		rnode[0] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[0]);
-		rnode[1] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[1]);
-		rnode[2] = resolve_node(NULL, FALSE, instance_name_prefix, var_node->children[2]);
-
-		oassert(rnode[1]->type == NUMBERS && rnode[2]->type == NUMBERS);
-		width = abs(rnode[2]->types.number.value);
-		long long lsb = rnode[2]->types.number.value < 0 ? rnode[1]->types.number.value - width + 1 : rnode[1]->types.number.value;
-		if (rnode[0]->type == IDENTIFIERS)
-		{
-			return_string = (char**)vtr::malloc(sizeof(char*)*width);
-			for (i = 0; i < width; i++)
-				return_string[i] = make_full_ref_name(NULL, NULL, NULL, rnode[0]->types.identifier, lsb + i);
-		}
-		else
-		{
-			oassert(rnode[0]->type == NUMBERS);
-			return_string = get_name_of_pins_number(rnode[0], lsb + width, width);
-		}
-	}
 	else if (var_node->type == IDENTIFIERS)
 	{
 		/* need to look in the symbol table for details about this identifier (i.e. is it a port) */
diff --git a/ODIN_II/SRC/include/ast_util.h b/ODIN_II/SRC/include/ast_util.h
index 1677cbc2cbe..0e773c2498a 100644
--- a/ODIN_II/SRC/include/ast_util.h
+++ b/ODIN_II/SRC/include/ast_util.h
@@ -24,7 +24,7 @@ void make_concat_into_list_of_strings(ast_node_t *concat_top, char *instance_nam
 void change_to_number_node(ast_node_t *node, long number);
 
 int get_range(ast_node_t* first_node);
-int get_range_part_select(ast_node_t *first_node, char direction);
+
 char *get_name_of_pin_at_bit(ast_node_t *var_node, int bit, char *instance_name_prefix);
 char *get_name_of_var_declare_at_bit(ast_node_t *var_declare, int bit);
 char_list_t *get_name_of_pins(ast_node_t *var_node, char *instance_name_prefix);
diff --git a/ODIN_II/SRC/include/odin_types.h b/ODIN_II/SRC/include/odin_types.h
index 70e3305cc01..6d48270c056 100644
--- a/ODIN_II/SRC/include/odin_types.h
+++ b/ODIN_II/SRC/include/odin_types.h
@@ -332,7 +332,6 @@ typedef enum
 	/* basic primitives */
 	ARRAY_REF,
 	RANGE_REF,
-	RANGE_PART_REF,
 	CONCATENATE,
 	/* basic identifiers */
 	IDENTIFIERS,
diff --git a/ODIN_II/SRC/include/parse_making_ast.h b/ODIN_II/SRC/include/parse_making_ast.h
index 35334fdf24d..53c458b3732 100644
--- a/ODIN_II/SRC/include/parse_making_ast.h
+++ b/ODIN_II/SRC/include/parse_making_ast.h
@@ -21,7 +21,8 @@ ast_node_t *markAndProcessSymbolListWith(ids top_type, ids id, ast_node_t *symbo
 ast_node_t *newArrayRef(char *id, ast_node_t *expression, int line_number);
 ast_node_t *newArrayRef2D(char *id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
 ast_node_t *newRangeRef(char *id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
-ast_node_t *newPartSelectRange(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction, int line_number);
+ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction,
+								  int line_number);
 ast_node_t *newRangeRef2D(char *id, ast_node_t *expression1, ast_node_t *expression2, ast_node_t *expression3, ast_node_t *expression4, int line_number);
 ast_node_t *newBinaryOperation(operation_list op_id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
 ast_node_t *newExpandPower(operation_list op_id, ast_node_t *expression1, ast_node_t *expression2, int line_number);
diff --git a/ODIN_II/SRC/netlist_create_from_ast.cpp b/ODIN_II/SRC/netlist_create_from_ast.cpp
index 3304729abb3..b76f71eb972 100644
--- a/ODIN_II/SRC/netlist_create_from_ast.cpp
+++ b/ODIN_II/SRC/netlist_create_from_ast.cpp
@@ -782,7 +782,6 @@ signal_list_t *netlist_expand_ast_of_module(ast_node_t* node, char *instance_nam
 				break;
 			}
 			case RANGE_REF:
-			case RANGE_PART_REF:
 			case NUMBERS:
 			{
 				return_sig_list = create_pins(node, NULL, instance_name_prefix);
diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index cf2144b0cb8..afaaa02fe2f 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -837,13 +837,16 @@ ast_node_t *newRangeRef(char *id, ast_node_t *expression1, ast_node_t *expressio
 
 
 /*---------------------------------------------------------------------------------------------
- * (function: newPartSelectRange)
+ * (function: newPartSelectRangeRef)
  *-------------------------------------------------------------------------------------------*/
-ast_node_t *newPartSelectRange(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction, int line_number)
+ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t *expression2, char direction,
+								  int line_number)
 {
 
 	long sc_spot;
 
+	oassert(expression1 != NULL && expression1->type == NUMBERS && expression2 != NULL && expression2->type == NUMBERS);
+
 	/* Try to find the original array to check low/high indices */
 	if ((sc_spot = sc_lookup_string(modules_inputs_sc, id)) == -1 &&
 		(sc_spot = sc_lookup_string(modules_outputs_sc, id)) == -1){
@@ -851,39 +854,14 @@ ast_node_t *newPartSelectRange(char *id, ast_node_t *expression1, ast_node_t *ex
 		return nullptr;
 	}
 
-	ast_node_t *original_range = (ast_node_t *) modules_inputs_sc->data[sc_spot];;
-	long long upper_limit = original_range->children[1]->types.number.value;
-	long long bottom_limit = original_range->children[2]->types.number.value;
-	long long width = expression2->types.number.value;
-	long long low_index = expression1->types.number.value;
-	long long high_index = expression1->types.number.value;
-
-	if (direction == 1)
-		high_index = low_index + width - 1;
-	else
-		low_index = high_index - width + 1;
-
-	if (low_index < bottom_limit || low_index > upper_limit ||
-		high_index < bottom_limit|| high_index > upper_limit) {
-		/* Out of range */
-		error_message(PARSE_ERROR, line_number, current_parse_file,
-					  "The given indices (%s[%d%s%d]) are out of range. It should be within the range: [%d:%d].",
-					  id, expression1->types.number.value, direction == 1 ? "+:" : "-:", expression2->types.number.value,
-					  upper_limit, bottom_limit);
+	if (direction == 1){
+		expression1->types.number.value = expression1->types.number.value + expression2->types.number.value - 1;
+	}
+	else{
+		expression2->types.number.value = expression1->types.number.value - expression2->types.number.value + 1;
 	}
 
-	/* allocate or check if there's a node for this */
-	ast_node_t *symbol_node = newSymbolNode(id, line_number);
-
-	/* create a node for this array reference */
-	ast_node_t* new_node = create_node_w_type(RANGE_PART_REF, line_number, current_parse_file);
-
-	/* allocate child nodes to this node */
-	allocate_children_to_node(new_node, 3, symbol_node, expression1, expression2);
-
-	get_range_part_select(new_node, direction);
-
-	return new_node;
+	return newRangeRef(id, expression1, expression2, line_number);
 }
 
 /*---------------------------------------------------------------------------------------------
diff --git a/ODIN_II/SRC/verilog_bison.y b/ODIN_II/SRC/verilog_bison.y
index d0d7660bcf9..4ae437febf9 100644
--- a/ODIN_II/SRC/verilog_bison.y
+++ b/ODIN_II/SRC/verilog_bison.y
@@ -511,8 +511,8 @@ primary:
 	| vSYMBOL_ID											{$$ = newSymbolNode($1, yylineno);}
 	| vSYMBOL_ID '[' expression ']'							{$$ = newArrayRef($1, $3, yylineno);}
 	| vSYMBOL_ID '[' expression ']' '[' expression ']'		{$$ = newArrayRef2D($1, $3, $6, yylineno);}
-	| vSYMBOL_ID '[' expression vPLUS_COLON expression ']'   	{$$ = newPartSelectRange($1, $3, $5, 1, yylineno);}
-	| vSYMBOL_ID '[' expression vMINUS_COLON expression ']'   	{$$ = newPartSelectRange($1, $3, $5, -1, yylineno);}
+	| vSYMBOL_ID '[' expression vPLUS_COLON expression ']'   	{$$ = newPartSelectRangeRef($1, $3, $5, 1, yylineno);}
+	| vSYMBOL_ID '[' expression vMINUS_COLON expression ']'   	{$$ = newPartSelectRangeRef($1, $3, $5, -1, yylineno);}
 	| vSYMBOL_ID '[' expression ':' expression ']'			{$$ = newRangeRef($1, $3, $5, yylineno);}
 	| vSYMBOL_ID '[' expression ':' expression ']' '[' expression ':' expression ']'	{$$ = newRangeRef2D($1, $3, $5, $8, $10, yylineno);}
 	| '{' probable_expression_list '}' 						{$$ = $2; ($2)->types.concat.num_bit_strings = -1;}

From 72aca254a7d7be45bc02b5cbf4540f33919ebc99 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Thu, 7 Mar 2019 00:46:52 +0330
Subject: [PATCH 06/15] added limits calculations

---
 ODIN_II/SRC/parse_making_ast.cpp | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index afaaa02fe2f..daf4da654ee 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -853,6 +853,9 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 		error_message(PARSE_ERROR, line_number, current_parse_file, "Could not find variable %s", id);
 		return nullptr;
 	}
+	ast_node_t *original_range = (ast_node_t *) modules_inputs_sc->data[sc_spot];;
+	long upper_limit = original_range->children[1]->types.number.value;
+	long bottom_limit = original_range->children[2]->types.number.value;
 
 	if (direction == 1){
 		expression1->types.number.value = expression1->types.number.value + expression2->types.number.value - 1;

From 3bd825ddc03915424eafb4f18f60476a4641dbee Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Sun, 10 Mar 2019 12:09:44 -0300
Subject: [PATCH 07/15] Add test bench for part-select

---
 .../benchmark/operators/pluscolon_6_bit.v            | 11 +++++++++++
 .../benchmark/operators/pluscolon_6_bit_input        |  5 +++++
 .../benchmark/operators/pluscolon_6_bit_output       | 12 ++++++++++++
 .../benchmark/operators/pluscolon_8_bit.v            | 11 +++++++++++
 .../benchmark/operators/pluscolon_8_bit_input        |  5 +++++
 .../benchmark/operators/pluscolon_8_bit_output       | 12 ++++++++++++
 6 files changed, 56 insertions(+)
 create mode 100644 ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit.v
 create mode 100644 ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_input
 create mode 100644 ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_output
 create mode 100644 ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit.v
 create mode 100644 ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_input
 create mode 100644 ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_output

diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit.v b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit.v
new file mode 100644
index 00000000000..6c385c01dc0
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit.v
@@ -0,0 +1,11 @@
+module And2in (A,B,C1,C2);
+
+input   [5:0] A  ;
+input   [5:0] B ;
+output  [2:0] C1 ;
+output  [2:0] C2 ;
+
+assign  C1 = A[0+:3] & B[0+:3] ;
+assign  C2 = A[3+:3] & B[3+:3] ;
+
+endmodule
diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_input b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_input
new file mode 100644
index 00000000000..2ed46340d53
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_input
@@ -0,0 +1,5 @@
+GLOBAL_SIM_BASE_CLK A B
+0 0X27 0X1A
+0 0X28 0X32
+0 0X10 0X3F
+0 0X1D 0X3F
diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_output b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_output
new file mode 100644
index 00000000000..ca8835cd67b
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_output
@@ -0,0 +1,12 @@
+C1 C2
+0X6 OX4
+0X6 0X7
+0X6 0X7
+0X6 0X4
+0X4 0X4
+0X7 0X0
+0X7 0X1
+0X7 0X4
+0X7 0X4
+0X6 0X5
+
diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit.v b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit.v
new file mode 100644
index 00000000000..da2869ff99c
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit.v
@@ -0,0 +1,11 @@
+module And2in (A,B,C1,C2);
+ 
+input [7:0] A  ;
+input  [7:0] B ;
+output [3:0] C1 ;
+output [3:0] C2 ;
+
+assign  C1=A[0+:4] & B[0+:4] ;
+assign C2=A[3+:5] & B[3+:5] ;
+
+endmodule
diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_input b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_input
new file mode 100644
index 00000000000..2ed46340d53
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_input
@@ -0,0 +1,5 @@
+GLOBAL_SIM_BASE_CLK A B
+0 0X27 0X1A
+0 0X28 0X32
+0 0X10 0X3F
+0 0X1D 0X3F
diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_output b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_output
new file mode 100644
index 00000000000..ca8835cd67b
--- /dev/null
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_output
@@ -0,0 +1,12 @@
+C1 C2
+0X6 OX4
+0X6 0X7
+0X6 0X7
+0X6 0X4
+0X4 0X4
+0X7 0X0
+0X7 0X1
+0X7 0X4
+0X7 0X4
+0X6 0X5
+

From 2e840dd1f5681a87c229dac9796fb3bcf7cb2b0d Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Sun, 10 Mar 2019 21:08:52 +0330
Subject: [PATCH 08/15] hotfix for part-select range

---
 ODIN_II/SRC/parse_making_ast.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index daf4da654ee..bab08ac9c9b 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -859,9 +859,11 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 
 	if (direction == 1){
 		expression1->types.number.value = expression1->types.number.value + expression2->types.number.value - 1;
+		expression2->types.number.value = expression1->types.number.value - expression2->types.number.value + 1;
 	}
 	else{
 		expression2->types.number.value = expression1->types.number.value - expression2->types.number.value + 1;
+		expression1->types.number.value = expression1->types.number.value + expression2->types.number.value - 1;
 	}
 
 	return newRangeRef(id, expression1, expression2, line_number);

From b6bb2c80297ecf598376c345b4175b2a13f54303 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Tue, 12 Mar 2019 15:22:48 -0300
Subject: [PATCH 09/15]  Add test

---
 .../operators/pluscolon_6_bit_output          | 15 +++++---------
 .../benchmark/operators/pluscolon_8_bit_input | 14 +++++++++----
 .../operators/pluscolon_8_bit_output          | 20 +++++++++----------
 3 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_output b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_output
index ca8835cd67b..e9d674d9e37 100644
--- a/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_output
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit_output
@@ -1,12 +1,7 @@
 C1 C2
-0X6 OX4
-0X6 0X7
-0X6 0X7
-0X6 0X4
-0X4 0X4
-0X7 0X0
-0X7 0X1
-0X7 0X4
-0X7 0X4
-0X6 0X5
+0X2 0X0
+0X0 0X4
+0X0 0X2
+0X5 0X3
+
 
diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_input b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_input
index 2ed46340d53..296b68a0660 100644
--- a/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_input
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_input
@@ -1,5 +1,11 @@
 GLOBAL_SIM_BASE_CLK A B
-0 0X27 0X1A
-0 0X28 0X32
-0 0X10 0X3F
-0 0X1D 0X3F
+0 0X60 0XA6
+0 0XEC 0X16
+0 0XBC 0XB6
+0 0X62 0X46
+0 0XE4 0X20
+0 0X01 0X86
+0 0XCC 0X47
+0 0X41 0XE6
+0 0XE1 0X06
+0 0XCC 0XE6
\ No newline at end of file
diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_output b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_output
index ca8835cd67b..7b24334b3fc 100644
--- a/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_output
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_8_bit_output
@@ -1,12 +1,12 @@
 C1 C2
-0X6 OX4
-0X6 0X7
-0X6 0X7
-0X6 0X4
-0X4 0X4
-0X7 0X0
-0X7 0X1
-0X7 0X4
-0X7 0X4
-0X6 0X5
+0X0 0X4
+0X4 0X0
+0X4 0X6
+0X2 0X8
+0X0 0X4
+0X0 0X0
+0X4 0X8
+0X0 0X8
+0X0 0X0
+0X4 0X8
 

From 742c66e4115014b431042b72a1d63be6e82ca128 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Tue, 12 Mar 2019 22:13:21 +0330
Subject: [PATCH 10/15] fixed -: index calculation

---
 ODIN_II/SRC/parse_making_ast.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index bab08ac9c9b..25b53660371 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -863,7 +863,6 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 	}
 	else{
 		expression2->types.number.value = expression1->types.number.value - expression2->types.number.value + 1;
-		expression1->types.number.value = expression1->types.number.value + expression2->types.number.value - 1;
 	}
 
 	return newRangeRef(id, expression1, expression2, line_number);

From 4db50f57ad7ca7fb8a959e532a2b0fcf57768453 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Wed, 13 Mar 2019 10:52:27 -0300
Subject: [PATCH 11/15] add error message

---
 ODIN_II/SRC/parse_making_ast.cpp | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index 25b53660371..8fc5d60a1f8 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -863,7 +863,29 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 	}
 	else{
 		expression2->types.number.value = expression1->types.number.value - expression2->types.number.value + 1;
+		expression1->types.number.value = expression1->types.number.value + expression2->types.number.value - 1;
+	}
+
+	if (expression1->types.number.value < 0 || expression2->types.number.value < 0){
+
+		/* Negetive numbers are not supported */
+		error_message(PARSE_ERROR, line_number, current_parse_file, "Odin doesn't support negative number in index.", id);
+
 	}
+	else if(expression1->types.number.value < expression2->types.number.value){
+
+		/*ODIN doesn't support m<n */
+	 	error_message(PARSE_ERROR, line_number, current_parse_file, "%s", "Odin doesn't support arrays declared [m:n] where m is less than n.");
+
+	}
+	else if (expression1->types.number.value > upper_limit || expression2->types.number.value > bottom_limit) {
+		/* out of original range */
+		error_message(PARSE_ERROR, line_number,current_parse_file, 
+								"This part select range (%s [%d%s%d]) is out of range. It should be within the [%d:%d] range.",
+								id,expression1->types.number.value, direction ==1 ? "+:" : "-:",expression2->types.number.value,
+								 upper_limit,bottom_limit );
+	}
+	
 
 	return newRangeRef(id, expression1, expression2, line_number);
 }

From 692d55bcc072b07f3c0b47397be89ba8d2614760 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Wed, 13 Mar 2019 11:12:09 -0300
Subject: [PATCH 12/15] change in error message

---
 ODIN_II/SRC/parse_making_ast.cpp | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index 8fc5d60a1f8..73407365480 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -869,7 +869,10 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 	if (expression1->types.number.value < 0 || expression2->types.number.value < 0){
 
 		/* Negetive numbers are not supported */
-		error_message(PARSE_ERROR, line_number, current_parse_file, "Odin doesn't support negative number in index.", id);
+		error_message(PARSE_ERROR, line_number, current_parse_file, 
+								"Odin doesn't support negative number in index : [%d%s%d].", 
+								expression1->types.number.value, direction == 1 ? "+:" : "-:",
+								expression2->types.number.value);
 
 	}
 	else if(expression1->types.number.value < expression2->types.number.value){
@@ -881,7 +884,7 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 	else if (expression1->types.number.value > upper_limit || expression2->types.number.value > bottom_limit) {
 		/* out of original range */
 		error_message(PARSE_ERROR, line_number,current_parse_file, 
-								"This part select range (%s [%d%s%d]) is out of range. It should be within the [%d:%d] range.",
+								"This part select range (%s [%d%s%d]) is out of range. It should be in the [%d:%d] range.",
 								id,expression1->types.number.value, direction ==1 ? "+:" : "-:",expression2->types.number.value,
 								 upper_limit,bottom_limit );
 	}

From 3a6e1cb6e14ab227c6f53d0f3e4b941a634321bf Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Wed, 13 Mar 2019 16:34:55 -0300
Subject: [PATCH 13/15] change the error messages

---
 ODIN_II/SRC/parse_making_ast.cpp | 12 ++----------
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index 73407365480..da90571c416 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -863,7 +863,6 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 	}
 	else{
 		expression2->types.number.value = expression1->types.number.value - expression2->types.number.value + 1;
-		expression1->types.number.value = expression1->types.number.value + expression2->types.number.value - 1;
 	}
 
 	if (expression1->types.number.value < 0 || expression2->types.number.value < 0){
@@ -873,18 +872,11 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 								"Odin doesn't support negative number in index : [%d%s%d].", 
 								expression1->types.number.value, direction == 1 ? "+:" : "-:",
 								expression2->types.number.value);
-
-	}
-	else if(expression1->types.number.value < expression2->types.number.value){
-
-		/*ODIN doesn't support m<n */
-	 	error_message(PARSE_ERROR, line_number, current_parse_file, "%s", "Odin doesn't support arrays declared [m:n] where m is less than n.");
-
 	}
-	else if (expression1->types.number.value > upper_limit || expression2->types.number.value > bottom_limit) {
+	else if (expression1->types.number.value < upper_limit || expression2->types.number.value < bottom_limit) {
 		/* out of original range */
 		error_message(PARSE_ERROR, line_number,current_parse_file, 
-								"This part select range (%s [%d%s%d]) is out of range. It should be in the [%d:%d] range.",
+								"This part-select range (%s [%d%s%d]) is out of range. It should be in the [%d:%d] range.",
 								id,expression1->types.number.value, direction ==1 ? "+:" : "-:",expression2->types.number.value,
 								 upper_limit,bottom_limit );
 	}

From 2ebad60b97534b54a716be258d91bfa8626b5084 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Wed, 13 Mar 2019 16:39:16 -0300
Subject: [PATCH 14/15] Fix the messages

---
 ODIN_II/SRC/parse_making_ast.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index da90571c416..843914e8483 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -873,7 +873,7 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 								expression1->types.number.value, direction == 1 ? "+:" : "-:",
 								expression2->types.number.value);
 	}
-	else if (expression1->types.number.value < upper_limit || expression2->types.number.value < bottom_limit) {
+	else if (expression1->types.number.value  > upper_limit || expression2->types.number.value < bottom_limit) {
 		/* out of original range */
 		error_message(PARSE_ERROR, line_number,current_parse_file, 
 								"This part-select range (%s [%d%s%d]) is out of range. It should be in the [%d:%d] range.",

From cc534a00ff82cb5fddbd0eb5a752a95e3fca64e9 Mon Sep 17 00:00:00 2001
From: Nasrin Eshraghi Ivari <nasrin.eshraghi@unb.ca>
Date: Wed, 13 Mar 2019 17:31:09 -0300
Subject: [PATCH 15/15] latest change

---
 ODIN_II/SRC/parse_making_ast.cpp              | 24 +++++++++----------
 .../benchmark/operators/pluscolon_6_bit.v     |  2 +-
 2 files changed, 12 insertions(+), 14 deletions(-)

diff --git a/ODIN_II/SRC/parse_making_ast.cpp b/ODIN_II/SRC/parse_making_ast.cpp
index 843914e8483..67074ca648c 100644
--- a/ODIN_II/SRC/parse_making_ast.cpp
+++ b/ODIN_II/SRC/parse_making_ast.cpp
@@ -856,7 +856,15 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 	ast_node_t *original_range = (ast_node_t *) modules_inputs_sc->data[sc_spot];;
 	long upper_limit = original_range->children[1]->types.number.value;
 	long bottom_limit = original_range->children[2]->types.number.value;
+	if (expression1->types.number.value < 0 || expression2->types.number.value < 0){
 
+		/* Negetive numbers are not supported */
+		error_message(PARSE_ERROR, line_number, current_parse_file, 
+								"Odin doesn't support negative number in index : %s[%d%s%d].", id,
+								expression1->types.number.value, direction == 1 ? "+:" : "-:",
+								expression2->types.number.value);
+	}
+	
 	if (direction == 1){
 		expression1->types.number.value = expression1->types.number.value + expression2->types.number.value - 1;
 		expression2->types.number.value = expression1->types.number.value - expression2->types.number.value + 1;
@@ -864,24 +872,14 @@ ast_node_t *newPartSelectRangeRef(char *id, ast_node_t *expression1, ast_node_t
 	else{
 		expression2->types.number.value = expression1->types.number.value - expression2->types.number.value + 1;
 	}
-
-	if (expression1->types.number.value < 0 || expression2->types.number.value < 0){
-
-		/* Negetive numbers are not supported */
-		error_message(PARSE_ERROR, line_number, current_parse_file, 
-								"Odin doesn't support negative number in index : [%d%s%d].", 
-								expression1->types.number.value, direction == 1 ? "+:" : "-:",
-								expression2->types.number.value);
-	}
-	else if (expression1->types.number.value  > upper_limit || expression2->types.number.value < bottom_limit) {
+	if (expression1->types.number.value  > upper_limit || expression2->types.number.value < bottom_limit) {
 		/* out of original range */
 		error_message(PARSE_ERROR, line_number,current_parse_file, 
-								"This part-select range (%s [%d%s%d]) is out of range. It should be in the [%d:%d] range.",
+								"This part-select range %s:[%d%s%d] is out of range. It should be in the %s:[%d:%d] range.",
 								id,expression1->types.number.value, direction ==1 ? "+:" : "-:",expression2->types.number.value,
-								 upper_limit,bottom_limit );
+								 id,upper_limit,bottom_limit );
 	}
 	
-
 	return newRangeRef(id, expression1, expression2, line_number);
 }
 
diff --git a/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit.v b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit.v
index 6c385c01dc0..c994efec261 100644
--- a/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit.v
+++ b/ODIN_II/regression_test/benchmark/operators/pluscolon_6_bit.v
@@ -6,6 +6,6 @@ output  [2:0] C1 ;
 output  [2:0] C2 ;
 
 assign  C1 = A[0+:3] & B[0+:3] ;
-assign  C2 = A[3+:3] & B[3+:3] ;
+assign  C2 = A[-3+:3] & B[3+:3] ;
 
 endmodule