From ddd81e6c3d6bb561bf61252d8d80e5904828718a Mon Sep 17 00:00:00 2001 From: AlexandreSinger Date: Sat, 22 Mar 2025 19:47:17 -0400 Subject: [PATCH] [AP] Tuned the AP Flow The AP flow has many tunable knobs which trade-off quality and run time. Went through each of the knobs to find a good combination. Updates to the partial legalizer: - Reversed the order that unplaced large blocks are inserted into partitions. - Increased the bin cluster gap from 1 to 2 On the largest VTR benchmarks, this decreased the number of overfilled bins after legalization by 15% and the average overfill of each of those bins by 40%. On Titan, the number of overfilled bins decreased by 32% and the average overfill decreased by 2.5%. Updates to the analytical solver and global placer: - Allowed the B2B solver to stop early if it seems to be converging. - Changed the anchor weights from a linearized term to a quadratic term. - Decreased the distance epsilon from 0.5 to 0.01. - Increased the max number of B2B solver iterations from 6 to 24 - Decreased the CG iteration cap from 200 to 150. - The global placer saves the best legalized placement it has seen and returns it as its final result. On the largest VTR benchmarks, this decreased the post GP HPWL by 22% and decreased the GP run time by 17%. On Titan, the post GP HPWL decreased by 25%, and the GP run time decreased by 19%. Updates to APPack: - Decreased the max candidate distance from 0.5 (W + H) to 0.1 (W + H) for logical blocks. - Decreased the max candidate distance for all other blocks to 0.35 (W + H) - Lowered the attenuation distance threshold from 2.0 to 1.75. - Decreased the attenuation value at the distance threshold to 0.35. - Increased the max unrelated clustering distance from 1 to 5. - Increased the max number of unrelated clustering attempts from 2 to 10. - Turned off all APPack optimization for RAM blocks. On the largest VTR benchmarks, this decreased the wirelength by 2% over the un-tuned AP flow, with a 2.8% decreased pack time. On Titan, the post FL wirelength decreased by 6% and the post routing wirelength decreased by 2.6%, with a 0.7% decrease in pack time. Updates to initial placement: - Fixed oversight with how the centroid was being calculated. - Increased the range limit when searching for nearby locations when the location a cluster wants is take from 15 to 60. This further improved the post routing wirelength of Titan to 4.4% better than the un-tuned AP flow. I found that there are a lot of issues with the initial placement which may be blocking a large amount of gains. Will be investigating the initial placement code soon. --- doc/src/vpr/command_line_usage.rst | 2 +- .../analytical_place/analytical_solver.cpp | 80 ++++++++++++------- vpr/src/analytical_place/analytical_solver.h | 35 ++++++-- vpr/src/analytical_place/global_placer.cpp | 17 +++- .../analytical_place/partial_legalizer.cpp | 7 +- vpr/src/analytical_place/partial_legalizer.h | 2 +- vpr/src/base/read_options.cpp | 2 +- vpr/src/pack/appack_context.h | 39 +++++++-- vpr/src/pack/greedy_candidate_selector.cpp | 48 +++++++++-- vpr/src/pack/greedy_candidate_selector.h | 5 ++ vpr/src/place/initial_placement.cpp | 30 +++++-- .../qor_config/qor_ap_fixed_chan_width.txt | 1 + .../config/golden_results.txt | 8 +- .../config/golden_results.txt | 8 +- .../config/golden_results.txt | 8 +- .../config/golden_results.txt | 8 +- .../config/golden_results.txt | 8 +- .../strong_ap/mcnc/config/golden_results.txt | 8 +- .../config/golden_results.txt | 8 +- .../no_fixed_blocks/config/golden_results.txt | 10 +-- .../config/golden_results.txt | 6 +- .../config/golden_results.txt | 8 +- .../config/golden_results.txt | 8 +- .../vtr_chain/config/golden_results.txt | 8 +- 24 files changed, 253 insertions(+), 111 deletions(-) diff --git a/doc/src/vpr/command_line_usage.rst b/doc/src/vpr/command_line_usage.rst index 7ca650a39c3..c370562fd58 100644 --- a/doc/src/vpr/command_line_usage.rst +++ b/doc/src/vpr/command_line_usage.rst @@ -1214,7 +1214,7 @@ Analytical Placement is generally split into three stages: Uses the legalized solution as anchor-points to pull the solution to a more legal solution (similar to the approach from SimPL :cite:`Kim2013_SimPL`). - **Default:** ``qp-hybrid`` + **Default:** ``lp-b2b`` .. option:: --ap_partial_legalizer {bipartitioning | flow-based} diff --git a/vpr/src/analytical_place/analytical_solver.cpp b/vpr/src/analytical_place/analytical_solver.cpp index 030ecae0a4e..2aae5099608 100644 --- a/vpr/src/analytical_place/analytical_solver.cpp +++ b/vpr/src/analytical_place/analytical_solver.cpp @@ -335,8 +335,8 @@ void QPHybridSolver::solve(unsigned iteration, PartialPlacement& p_placement) { p_placement, iteration); } // Verify that the constant vectors are valid. - VTR_ASSERT_DEBUG(!b_x_diff.hasNaN() && "b_x has NaN!"); - VTR_ASSERT_DEBUG(!b_y_diff.hasNaN() && "b_y has NaN!"); + VTR_ASSERT_SAFE_MSG(!b_x_diff.hasNaN(), "b_x has NaN!"); + VTR_ASSERT_SAFE_MSG(!b_y_diff.hasNaN(), "b_y has NaN!"); // Set up the ConjugateGradient Solver using the coefficient matrix. // TODO: can change cg.tolerance to increase performance when needed @@ -479,8 +479,11 @@ void B2BSolver::b2b_solve_loop(unsigned iteration, PartialPlacement& p_placement // p_placement. // 3) Repeat. Note: We need to repeat step 1 and 2 iteratively since // the bounds are likely to have changed after step 2. - // TODO: As well as having a maximum number of bound updates, should also - // investigate stopping when the HPWL converges. + // We stop when it looks like the placement is converging (the change in + // HPWL is sufficiently small for a few iterations). + double prev_hpwl = std::numeric_limits::max(); + double curr_hpwl = prev_hpwl; + unsigned num_convergence = 0; for (unsigned counter = 0; counter < max_num_bound_updates_; counter++) { VTR_LOGV(log_verbosity_ >= 10, "\tPlacement HPWL in b2b loop: %f\n", @@ -490,7 +493,7 @@ void B2BSolver::b2b_solve_loop(unsigned iteration, PartialPlacement& p_placement float build_linear_system_start_time = runtime_timer.elapsed_sec(); init_linear_system(p_placement); if (iteration != 0) - update_linear_system_with_anchors(p_placement, iteration); + update_linear_system_with_anchors(iteration); total_time_spent_building_linear_system_ += runtime_timer.elapsed_sec() - build_linear_system_start_time; VTR_ASSERT_SAFE_MSG(!b_x.hasNaN(), "b_x has NaN!"); VTR_ASSERT_SAFE_MSG(!b_y.hasNaN(), "b_y has NaN!"); @@ -524,22 +527,24 @@ void B2BSolver::b2b_solve_loop(unsigned iteration, PartialPlacement& p_placement total_time_spent_solving_linear_system_ += runtime_timer.elapsed_sec() - solve_linear_system_start_time; // Save the result into the partial placement object. - for (size_t row_id_idx = 0; row_id_idx < num_moveable_blocks_; row_id_idx++) { - // Since we are capping the number of iterations, the solver may not - // have enough time to converge on a solution that is on the device. - // We just clamp the solution to zero for now. - // TODO: Should handle this better. If the solution is very negative - // it may indicate a bug. - if (x[row_id_idx] < 0.0) - x[row_id_idx] = 0.0; - if (y[row_id_idx] < 0.0) - y[row_id_idx] = 0.0; - - APRowId row_id = APRowId(row_id_idx); - APBlockId blk_id = row_id_to_blk_id_[row_id]; - p_placement.block_x_locs[blk_id] = x[row_id_idx]; - p_placement.block_y_locs[blk_id] = y[row_id_idx]; - } + store_solution_into_placement(x, y, p_placement); + + // If the current HPWL is larger than the previous HPWL (i.e. the HPWL + // got worst since last B2B iter) or the gap between the two solutions + // is small. Increment a counter. + // TODO: Since, in theory, the HPWL could get worst due to numerical + // reasons, should we save the best result? May not be worth it... + curr_hpwl = p_placement.get_hpwl(netlist_); + double target_gap = b2b_convergence_gap_fac_ * curr_hpwl; + if (curr_hpwl > prev_hpwl || std::abs(curr_hpwl - prev_hpwl) < target_gap) + num_convergence++; + + // If the HPWL got close enough times, stop. This is to allow the HPWL + // to "bounce", which can happen as it converges. + // This trades-off quality for run time. + if (num_convergence >= target_num_b2b_convergences_) + break; + prev_hpwl = curr_hpwl; // Update the guesses with the most recent answer x_guess = x; @@ -723,8 +728,7 @@ void B2BSolver::init_linear_system(PartialPlacement& p_placement) { // This function adds anchors for legalized solution. Anchors are treated as fixed node, // each connecting to a movable node. Number of nodes in a anchor net is always 2. -void B2BSolver::update_linear_system_with_anchors(PartialPlacement& p_placement, - unsigned iteration) { +void B2BSolver::update_linear_system_with_anchors(unsigned iteration) { VTR_ASSERT_SAFE_MSG(iteration != 0, "no fixed solution to anchor to in the first iteration"); // Get the anchor weight based on the iteration number. We want the anchor @@ -733,16 +737,11 @@ void B2BSolver::update_linear_system_with_anchors(PartialPlacement& p_placement, double coeff_pseudo_anchor = anchor_weight_mult_ * std::exp((double)iteration / anchor_weight_exp_fac_); // Add an anchor for each moveable block to its solved position. - // Note: We treat anchors as being a 2-pin net between a moveable block - // and a fixed block where both are the bounds of the net. for (size_t row_id_idx = 0; row_id_idx < num_moveable_blocks_; row_id_idx++) { APRowId row_id = APRowId(row_id_idx); APBlockId blk_id = row_id_to_blk_id_[row_id]; - double dx = std::abs(p_placement.block_x_locs[blk_id] - block_x_locs_legalized[blk_id]); - double dy = std::abs(p_placement.block_y_locs[blk_id] - block_y_locs_legalized[blk_id]); - // Anchor node are always 2 pins. - double pseudo_w_x = coeff_pseudo_anchor * 2.0 / std::max(dx, distance_epsilon_); - double pseudo_w_y = coeff_pseudo_anchor * 2.0 / std::max(dy, distance_epsilon_); + double pseudo_w_x = coeff_pseudo_anchor * 2.0; + double pseudo_w_y = coeff_pseudo_anchor * 2.0; A_sparse_x.coeffRef(row_id_idx, row_id_idx) += pseudo_w_x; A_sparse_y.coeffRef(row_id_idx, row_id_idx) += pseudo_w_y; b_x(row_id_idx) += pseudo_w_x * block_x_locs_legalized[blk_id]; @@ -750,6 +749,27 @@ void B2BSolver::update_linear_system_with_anchors(PartialPlacement& p_placement, } } +void B2BSolver::store_solution_into_placement(Eigen::VectorXd& x_soln, + Eigen::VectorXd& y_soln, + PartialPlacement& p_placement) { + for (size_t row_id_idx = 0; row_id_idx < num_moveable_blocks_; row_id_idx++) { + // Since we are capping the number of iterations, the solver may not + // have enough time to converge on a solution that is on the device. + // We just clamp the solution to zero for now. + // TODO: Should handle this better. If the solution is very negative + // it may indicate a bug. + if (x_soln[row_id_idx] < 0.0) + x_soln[row_id_idx] = 0.0; + if (y_soln[row_id_idx] < 0.0) + y_soln[row_id_idx] = 0.0; + + APRowId row_id = APRowId(row_id_idx); + APBlockId blk_id = row_id_to_blk_id_[row_id]; + p_placement.block_x_locs[blk_id] = x_soln[row_id_idx]; + p_placement.block_y_locs[blk_id] = y_soln[row_id_idx]; + } +} + void B2BSolver::print_statistics() { VTR_LOG("B2B Solver Statistics:\n"); VTR_LOG("\tTotal number of CG iterations: %u\n", total_num_cg_iters_); diff --git a/vpr/src/analytical_place/analytical_solver.h b/vpr/src/analytical_place/analytical_solver.h index a5f48e892c2..1c00fc055a4 100644 --- a/vpr/src/analytical_place/analytical_solver.h +++ b/vpr/src/analytical_place/analytical_solver.h @@ -359,11 +359,26 @@ class B2BSolver : public AnalyticalSolver { /// than some epsilon. /// Decreasing this number may lead to more instability, but can yield /// a higher quality solution. - static constexpr double distance_epsilon_ = 0.5; + static constexpr double distance_epsilon_ = 0.01; + + /// @brief The gap between the HPWL of the current solved solution in the + /// B2B loop and the previous solved solution that is considered to + /// be close-enough to be converged (as a fraction of the current + /// solved solution HPWL). + /// Decreasing this number toward zero would cause the B2B solver to run + /// more iterations to try and reduce the HPWL further. + static constexpr double b2b_convergence_gap_fac_ = 0.001; + + /// @brief The number of times the B2B loop should "converge" before stopping + /// the loop. Due to numerical inaccuracies, it is possible for the + /// HPWL to bounce up and down as it converges. Increasing this number + /// will allow more bounces which may get better quality; however + /// more iterations will need to be run. + static constexpr unsigned target_num_b2b_convergences_ = 2; /// @brief Max number of bound update / solve iterations. Increasing this /// number will yield better quality at the expense of runtime. - static constexpr unsigned max_num_bound_updates_ = 6; + static constexpr unsigned max_num_bound_updates_ = 24; /// @brief Max number of iterations the Conjugate Gradient solver can perform. /// Due to the weights getting very large in the early iterations of @@ -376,7 +391,7 @@ class B2BSolver : public AnalyticalSolver { /// to prevent this behaviour and get good runtime. // TODO: Need to investigate this more to find a good number for this. // TODO: Should this be a proportion of the design size? - static constexpr unsigned max_cg_iterations_ = 200; + static constexpr unsigned max_cg_iterations_ = 150; // The following constants are used to configure the anchor weighting. // The weights of anchors grow exponentially each iteration by the following @@ -509,8 +524,18 @@ class B2BSolver : public AnalyticalSolver { * @brief Updates the linear system with anchor-blocks from the legalized * solution. */ - void update_linear_system_with_anchors(PartialPlacement& p_placement, - unsigned iteration); + void update_linear_system_with_anchors(unsigned iteration); + + /** + * @brief Store the x and y solutions in Eigen's vectors into the partial + * placement object. + * + * Note: The x_soln and y_soln may be modified if it is found that the + * solution is imposible (i.e. has negative positions). + */ + void store_solution_into_placement(Eigen::VectorXd& x_soln, + Eigen::VectorXd& y_soln, + PartialPlacement& p_placement); // The following are variables used to store the system of equations to be // solved in the x and y dimensions. The equations are of the form: diff --git a/vpr/src/analytical_place/global_placer.cpp b/vpr/src/analytical_place/global_placer.cpp index 5707f6d4708..3e716b7ea16 100644 --- a/vpr/src/analytical_place/global_placer.cpp +++ b/vpr/src/analytical_place/global_placer.cpp @@ -8,6 +8,7 @@ #include "global_placer.h" #include +#include #include #include #include "analytical_solver.h" @@ -207,6 +208,12 @@ PartialPlacement SimPLGlobalPlacer::place() { float total_time_spent_in_solver = 0.0f; float total_time_spent_in_legalizer = 0.0f; + // Create a partial placement object to store the best placement found during + // global placement. It is possible for the global placement to hit a minimum + // in the middle of its iterations, this lets us keep that solution. + PartialPlacement best_p_placement(ap_netlist_); + double best_ub_hpwl = std::numeric_limits::max(); + // Run the global placer. for (size_t i = 0; i < max_num_iterations_; i++) { float iter_start_time = runtime_timer.elapsed_sec(); @@ -235,6 +242,12 @@ PartialPlacement SimPLGlobalPlacer::place() { iter_end_time - iter_start_time); } + // If this placement is better than the best we have seen, save it. + if (ub_hpwl < best_ub_hpwl) { + best_ub_hpwl = ub_hpwl; + best_p_placement = p_placement; + } + // Exit condition: If the upper-bound and lower-bound HPWLs are // sufficiently close together then stop. double hpwl_relative_gap = (ub_hpwl - lb_hpwl) / ub_hpwl; @@ -254,12 +267,12 @@ PartialPlacement SimPLGlobalPlacer::place() { // Print some statistics on the final placement. VTR_LOG("Placement after Global Placement:\n"); - print_placement_stats(p_placement, + print_placement_stats(best_p_placement, ap_netlist_, *density_manager_); // Return the placement from the final iteration. // TODO: investigate saving the best solution found so far. It should be // cheap to save a copy of the PartialPlacement object. - return p_placement; + return best_p_placement; } diff --git a/vpr/src/analytical_place/partial_legalizer.cpp b/vpr/src/analytical_place/partial_legalizer.cpp index 5cadbf8683e..7021734f8d5 100644 --- a/vpr/src/analytical_place/partial_legalizer.cpp +++ b/vpr/src/analytical_place/partial_legalizer.cpp @@ -1490,12 +1490,17 @@ void BiPartitioningPartialLegalizer::partition_blocks_in_window( // windows. To do this we sort the unplaced blocks by largest mass to // smallest mass. Then we place each block in the bin with the highest // underfill. + // FIXME: Above was the intuition; however, after experimentation, found that + // sorting by smallest mass to largest mass worked better... + // FIXME: I think large blocks (like carry chains) need to be handled special + // early on. If they are put into a partition too late, they may have + // to create overfill! Perhaps the partitions can hold two lists. std::sort(unplaced_blocks.begin(), unplaced_blocks.end(), [&](APBlockId a, APBlockId b) { const auto& blk_a_mass = density_manager_->mass_calculator().get_block_mass(a); const auto& blk_b_mass = density_manager_->mass_calculator().get_block_mass(b); - return blk_a_mass.manhattan_norm() > blk_b_mass.manhattan_norm(); + return blk_a_mass.manhattan_norm() < blk_b_mass.manhattan_norm(); }); for (APBlockId blk_id : unplaced_blocks) { // Project the underfill from each window onto the mass. This gives us diff --git a/vpr/src/analytical_place/partial_legalizer.h b/vpr/src/analytical_place/partial_legalizer.h index b49ee687daa..2eb4e5771da 100644 --- a/vpr/src/analytical_place/partial_legalizer.h +++ b/vpr/src/analytical_place/partial_legalizer.h @@ -367,7 +367,7 @@ class BiPartitioningPartialLegalizer : public PartialLegalizer { /// create large windows; decreasing this number will put more pressure on /// the window generation code, which can increase window size and runtime. /// TODO: Should this be distance instead of number of bins? - static constexpr int max_bin_cluster_gap_ = 1; + static constexpr int max_bin_cluster_gap_ = 2; public: /** diff --git a/vpr/src/base/read_options.cpp b/vpr/src/base/read_options.cpp index 23f3ba833bd..b3891336861 100644 --- a/vpr/src/base/read_options.cpp +++ b/vpr/src/base/read_options.cpp @@ -1903,7 +1903,7 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio "Controls which Analytical Solver the Global Placer will use in the AP Flow.\n" " * qp-hybrid: olves for a placement that minimizes the quadratic HPWL of the flat placement using a hybrid clique/star net model.\n" " * lp-b2b: Solves for a placement that minimizes the linear HPWL of theflat placement using the Bound2Bound net model.") - .default_value("qp-hybrid") + .default_value("lp-b2b") .show_in(argparse::ShowIn::HELP_ONLY); ap_grp.add_argument(args.ap_partial_legalizer, "--ap_partial_legalizer") diff --git a/vpr/src/pack/appack_context.h b/vpr/src/pack/appack_context.h index 571219da5c4..0461f26b320 100644 --- a/vpr/src/pack/appack_context.h +++ b/vpr/src/pack/appack_context.h @@ -12,7 +12,9 @@ #include #include "device_grid.h" #include "flat_placement_types.h" +#include "physical_types.h" #include "vpr_context.h" +#include "vpr_utils.h" /** * @brief Configuration options for APPack. @@ -33,12 +35,19 @@ struct t_appack_options { // distance on the device (from the bottom corner to the top corner). // We also use an offset for the minimum this distance can be to prevent // small devices from finding candidates. - float max_candidate_distance_scale = 0.5f; - float max_candidate_distance_offset = 20.f; + float max_candidate_distance_scale = 0.1f; + float max_candidate_distance_offset = 15.0f; // Longest L1 distance on the device. float longest_distance = device_grid.width() + device_grid.height(); max_candidate_distance = std::max(max_candidate_distance_scale * longest_distance, max_candidate_distance_offset); + + // Infer the logical block type in the architecture. This will be used + // for the max candidate distance optimization to use a more aggressive + // distance. + t_logical_block_type_ptr logic_block_type = infer_logic_block_type(device_grid); + if (logic_block_type != nullptr) + logic_block_type_index = logic_block_type->index; } // Whether to use APPack or not. @@ -67,11 +76,17 @@ struct t_appack_options { // Distance threshold which decides when to use quadratic decay or inverted // sqrt decay. If the distance is less than this threshold, quadratic decay // is used. Inverted sqrt is used otherwise. - static constexpr float dist_th = 2.0f; + static constexpr float dist_th = 1.75f; + // Attenuation value at the threshold. + static constexpr float attenuation_th = 0.35f; + + // Using the distance threshold and the attenuation value at that point, we + // can compute the other two terms. This is to keep the attenuation function + // smooth. // Horizontal offset to the inverted sqrt decay. - static constexpr float sqrt_offset = -6.1f; - // Scaling factor for the quadratic decay term. - static constexpr float quad_fac = 0.4f; + static constexpr float sqrt_offset = dist_th - ((1.0f / attenuation_th) * (1.0f / attenuation_th)); + // Squared scaling factor for the quadratic decay term. + static constexpr float quad_fac_sqr = (1.0f - attenuation_th) / (dist_th * dist_th); // =========== Candidate selection distance ============================ // // When selecting candidates, what distance from the cluster will we @@ -81,6 +96,14 @@ struct t_appack_options { // types of molecules / clusters. For example, CLBs vs DSPs float max_candidate_distance = std::numeric_limits::max(); + // A scaling applied to the max candidate distance of all clusters that are + // not logic blocks. + static constexpr float max_candidate_distance_non_lb_scale = 3.5f; + + // TODO: This should be an option similar to the target pin utilization + // so we can specify the max distance per block type! + int logic_block_type_index = -1; + // =========== Unrelated clustering ==================================== // // After searching for candidates by connectivity and timing, the user may // turn on unrelated clustering, which will allow molecules which are @@ -95,7 +118,7 @@ struct t_appack_options { // search within the cluster's tile. Setting this to a higher number would // allow APPack to search farther away; but may bring in molecules which // do not "want" to be in the cluster. - static constexpr float max_unrelated_tile_distance = 1.0f; + static constexpr float max_unrelated_tile_distance = 5.0f; // Unrelated clustering occurs after all other candidate selection methods // have failed. This parameter sets how many time we will attempt unrelated @@ -106,7 +129,7 @@ struct t_appack_options { // NOTE: A similar option exists in the candidate selector class. This was // duplicated since it is very likely that APPack would need a // different value for this option than the non-APPack flow. - static constexpr int max_unrelated_clustering_attempts = 2; + static constexpr int max_unrelated_clustering_attempts = 10; // TODO: Investigate adding flat placement info to seed selection. }; diff --git a/vpr/src/pack/greedy_candidate_selector.cpp b/vpr/src/pack/greedy_candidate_selector.cpp index 0e95167a843..26a0f7f2ec3 100644 --- a/vpr/src/pack/greedy_candidate_selector.cpp +++ b/vpr/src/pack/greedy_candidate_selector.cpp @@ -60,6 +60,7 @@ static void remove_molecule_from_pb_stats_candidates( static void add_molecule_to_pb_stats_candidates( PackMoleculeId molecule_id, ClusterGainStats& cluster_gain_stats, + t_logical_block_type_ptr cluster_type, int max_queue_size, AttractionInfo& attraction_groups, const Prepacker& prepacker, @@ -244,6 +245,15 @@ ClusterGainStats GreedyCandidateSelector::create_cluster_gain_stats( cluster_gain_stats.mol_pos_sum = seed_mol_pos; } + // Mark if this cluster is a memory block. We detect this by checking if the + // class type of the seed primitive pb is a memory class. + // This is used by APPack to turn off certain optimizations which interfere + // with RAM packing. + const auto& seed_mol = prepacker_.get_molecule(cluster_seed_mol_id); + AtomBlockId seed_atom = seed_mol.atom_block_ids[seed_mol.root]; + const auto seed_pb = cluster_legalizer.atom_pb_lookup().atom_pb(seed_atom); + cluster_gain_stats.is_memory = seed_pb->pb_graph_node->pb_type->class_type == MEMORY_CLASS; + // Return the cluster gain stats. return cluster_gain_stats; } @@ -771,6 +781,7 @@ void GreedyCandidateSelector::add_cluster_molecule_candidates_by_connectivity_an if (!cluster_legalizer.is_mol_clustered(molecule_id) && cluster_legalizer.is_molecule_compatible(molecule_id, legalization_cluster_id)) { add_molecule_to_pb_stats_candidates(molecule_id, cluster_gain_stats, + cluster_legalizer.get_cluster_type(legalization_cluster_id), packer_opts_.feasible_block_array_size, attraction_groups, prepacker_, @@ -799,6 +810,7 @@ void GreedyCandidateSelector::add_cluster_molecule_candidates_by_transitive_conn if (!cluster_legalizer.is_mol_clustered(molecule_id) && cluster_legalizer.is_molecule_compatible(molecule_id, legalization_cluster_id)) { add_molecule_to_pb_stats_candidates(molecule_id, cluster_gain_stats, + cluster_legalizer.get_cluster_type(legalization_cluster_id), std::min(packer_opts_.feasible_block_array_size, AAPACK_MAX_TRANSITIVE_EXPLORE), attraction_groups, @@ -832,6 +844,7 @@ void GreedyCandidateSelector::add_cluster_molecule_candidates_by_highfanout_conn if (!cluster_legalizer.is_mol_clustered(molecule_id) && cluster_legalizer.is_molecule_compatible(molecule_id, legalization_cluster_id)) { add_molecule_to_pb_stats_candidates(molecule_id, cluster_gain_stats, + cluster_legalizer.get_cluster_type(legalization_cluster_id), std::min(packer_opts_.feasible_block_array_size, AAPACK_MAX_HIGH_FANOUT_EXPLORE), attraction_groups, @@ -892,6 +905,7 @@ void GreedyCandidateSelector::add_cluster_molecule_candidates_by_attraction_grou if (!cluster_legalizer.is_mol_clustered(molecule_id) && cluster_legalizer.is_molecule_compatible(molecule_id, legalization_cluster_id)) { add_molecule_to_pb_stats_candidates(molecule_id, cluster_gain_stats, + cluster_legalizer.get_cluster_type(legalization_cluster_id), packer_opts_.feasible_block_array_size, attraction_groups, prepacker_, @@ -913,6 +927,7 @@ void GreedyCandidateSelector::add_cluster_molecule_candidates_by_attraction_grou if (!cluster_legalizer.is_mol_clustered(molecule_id) && cluster_legalizer.is_molecule_compatible(molecule_id, legalization_cluster_id)) { add_molecule_to_pb_stats_candidates(molecule_id, cluster_gain_stats, + cluster_legalizer.get_cluster_type(legalization_cluster_id), packer_opts_.feasible_block_array_size, attraction_groups, prepacker_, @@ -927,6 +942,7 @@ void GreedyCandidateSelector::add_cluster_molecule_candidates_by_attraction_grou */ static void add_molecule_to_pb_stats_candidates(PackMoleculeId molecule_id, ClusterGainStats& cluster_gain_stats, + t_logical_block_type_ptr cluster_type, int max_queue_size, AttractionInfo& attraction_groups, const Prepacker& prepacker, @@ -937,12 +953,25 @@ static void add_molecule_to_pb_stats_candidates(PackMoleculeId molecule_id, // see if the molecule is too far away from the position of the cluster. // If so, do not add it to the list of candidates. if (appack_ctx.appack_options.use_appack) { - const t_flat_pl_loc mol_loc = get_molecule_pos(molecule_id, - prepacker, - appack_ctx); - float dist = get_manhattan_distance(mol_loc, cluster_gain_stats.flat_cluster_position); - if (dist > appack_ctx.appack_options.max_candidate_distance) - return; + // If this cluster is a memory block, do not drop candidates based on + // distance. Was found to create too many RAM blocks. + if (!cluster_gain_stats.is_memory) { + // Get the max dist for this block type. + float max_dist = appack_ctx.appack_options.max_candidate_distance; + // If this cluster is anything but a logic block type, then scale + // up the max distance. + if (cluster_type->index != appack_ctx.appack_options.logic_block_type_index) + max_dist *= appack_ctx.appack_options.max_candidate_distance_non_lb_scale; + + // If the distance from the cluster to the candidate is too large, + // do not add this molecule to the list of candidates. + const t_flat_pl_loc mol_loc = get_molecule_pos(molecule_id, + prepacker, + appack_ctx); + float dist = get_manhattan_distance(mol_loc, cluster_gain_stats.flat_cluster_position); + if (dist > max_dist) + return; + } } int num_molecule_failures = 0; @@ -1108,11 +1137,13 @@ static float get_molecule_gain(PackMoleculeId molecule_id, } // If using APPack, attenuate the gain. + // NOTE: We do not perform gain attenuation if the current cluster is a memory. + // It was found that attenuation caused RAMs to have issues packing. // FIXME: What to do when the gain is negative? Should we divide by the attenuation? // Also what happens when we try to merge in atoms from the flat placement // which are not connected to anything inside the cluster? const t_appack_options& appack_options = appack_ctx.appack_options; - if (appack_options.use_appack && gain > 0.f) { + if (appack_options.use_appack && gain > 0.f && !cluster_gain_stats.is_memory) { // Get the position of the molecule t_flat_pl_loc target_loc = get_molecule_pos(molecule_id, prepacker, appack_ctx); @@ -1120,10 +1151,11 @@ static float get_molecule_gain(PackMoleculeId molecule_id, float dist = get_manhattan_distance(cluster_gain_stats.flat_cluster_position, target_loc); float gain_mult = 1.0f; if (dist < appack_options.dist_th) { - gain_mult = 1.0f - ((appack_options.quad_fac * dist) * (appack_options.quad_fac * dist)); + gain_mult = 1.0f - (appack_options.quad_fac_sqr * dist * dist); } else { gain_mult = 1.0f / std::sqrt(dist - appack_options.sqrt_offset); } + VTR_ASSERT_SAFE(gain_mult >= 0.0f && gain_mult <= 1.0f); // Update the gain. gain *= gain_mult; diff --git a/vpr/src/pack/greedy_candidate_selector.h b/vpr/src/pack/greedy_candidate_selector.h index 86258b6fdbf..89931662a54 100644 --- a/vpr/src/pack/greedy_candidate_selector.h +++ b/vpr/src/pack/greedy_candidate_selector.h @@ -120,6 +120,11 @@ struct ClusterGainStats { /// /// This is only set and used when APPack is used. t_flat_pl_loc mol_pos_sum; + + /// @brief Flag to indicate if this cluster is a memory or not. This is + /// set when the stats are created based on the primitive pb type + /// of the seed. + bool is_memory = false; }; /** diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index 8cb089ce876..b41564ba715 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -34,6 +34,15 @@ static constexpr int SORT_WEIGHT_PER_FAILED_BLOCK = 10; // The amount of weight that will be added to each tile which is outside the floorplanning constraints static constexpr int SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR = 100; +// The range limit to be used when searching for a neighbor in the centroid placement. +// The neighbor location should be within the defined range to the calculated centroid location. +static constexpr int CENTROID_NEIGHBOR_SEARCH_RLIM = 15; + +// The range limit to be used when searcing for a neighbor in the centroid placement when AP is used. +// Since AP is assumed to have a better idea of where clusters should be placed, we want to search more +// places to place a cluster near its solved position before giving up. +static constexpr int CENTROID_NEIGHBOR_SEARCH_RLIM_AP = 60; + /** * @brief Control routine for placing a macro. * First iteration of place_marco performs the following steps to place a macro: @@ -193,6 +202,7 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, static bool find_centroid_neighbor(t_pl_loc& centroid_loc, t_logical_block_type_ptr block_type, bool search_for_empty, + int r_lim, const BlkLocRegistry& blk_loc_registry, vtr::RngContainer& rng); @@ -389,6 +399,7 @@ bool find_subtile_in_location(t_pl_loc& centroid, static bool find_centroid_neighbor(t_pl_loc& centroid_loc, t_logical_block_type_ptr block_type, bool search_for_empty, + int rlim, const BlkLocRegistry& blk_loc_registry, vtr::RngContainer& rng) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; @@ -402,7 +413,7 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, //range limit (rlim) set a limit for the neighbor search in the centroid placement //the neighbor location should be within the defined range to calculated centroid location - int first_rlim = 15; + int first_rlim = rlim; auto search_range = get_compressed_grid_target_search_range(compressed_block_grid, compressed_centroid_loc[centroid_loc_layer_num], @@ -571,10 +582,10 @@ static void find_centroid_loc_from_flat_placement(const t_pl_macro& pl_macro, // NOTE: We add an offset of 0.5 to prevent us from moving to the tile // below / to the left due to tiny numerical changes (this // pretends that each atom is in the center of the tile). - centroid.x = std::floor((acc_x / acc_weight) + 0.5f); - centroid.y = std::floor((acc_y / acc_weight) + 0.5f); - centroid.layer = std::floor((acc_layer / acc_weight) + 0.5f); - centroid.sub_tile = std::floor((acc_sub_tile / acc_weight) + 0.5f); + centroid.x = std::floor(acc_x / acc_weight); + centroid.y = std::floor(acc_y / acc_weight); + centroid.layer = std::floor(acc_layer / acc_weight); + centroid.sub_tile = std::floor(acc_sub_tile / acc_weight); // TODO: Make this a debug print. // VTR_LOG("\n\t(%d, %d, %d, %d)\n", centroid.x, centroid.y, centroid.layer, centroid.sub_tile); @@ -596,12 +607,15 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, bool found_legal_subtile = false; + int rlim = CENTROID_NEIGHBOR_SEARCH_RLIM; if (!flat_placement_info.valid) { // If a flat placement is not provided, use the centroid of connected // blocks which have already been placed. unplaced_blocks_to_update_their_score = find_centroid_loc(pl_macro, centroid_loc, blk_loc_registry); found_legal_subtile = find_subtile_in_location(centroid_loc, block_type, blk_loc_registry, pr, rng); } else { + // Note: AP uses a different rlim than non-AP + rlim = CENTROID_NEIGHBOR_SEARCH_RLIM_AP; // If a flat placement is provided, use the flat placement to get the // centroid. find_centroid_loc_from_flat_placement(pl_macro, centroid_loc, flat_placement_info); @@ -611,11 +625,15 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, bool neighbor_legal_loc = find_centroid_neighbor(centroid_loc, block_type, false, + rlim, blk_loc_registry, rng); if (!neighbor_legal_loc) { // If we cannot find a neighboring block, fall back on the // original find_centroid_loc function. + // FIXME: We should really just skip this block and come back + // to it later. We do not want it taking space from + // someone else! unplaced_blocks_to_update_their_score = find_centroid_loc(pl_macro, centroid_loc, blk_loc_registry); found_legal_subtile = find_subtile_in_location(centroid_loc, block_type, blk_loc_registry, pr, rng); } else { @@ -647,7 +665,7 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, //centroid suggestion was either occupied or does not match block type //try to find a near location that meet these requirements if (!found_legal_subtile) { - bool neighbor_legal_loc = find_centroid_neighbor(centroid_loc, block_type, false, blk_loc_registry, rng); + bool neighbor_legal_loc = find_centroid_neighbor(centroid_loc, block_type, false, rlim, blk_loc_registry, rng); if (!neighbor_legal_loc) { //no neighbor candidate found return false; } diff --git a/vtr_flow/parse/qor_config/qor_ap_fixed_chan_width.txt b/vtr_flow/parse/qor_config/qor_ap_fixed_chan_width.txt index 86b9b48c086..4b14300b2d3 100644 --- a/vtr_flow/parse/qor_config/qor_ap_fixed_chan_width.txt +++ b/vtr_flow/parse/qor_config/qor_ap_fixed_chan_width.txt @@ -21,4 +21,5 @@ ap_dp_runtime;vpr.out;AP Detailed Placer took (.*) seconds route_runtime;vpr.out;Routing took (.*) seconds total_runtime;vpr.out;The entire flow of VPR took (.*) seconds num_clb;vpr.out;Netlist clb blocks:\s*(\d+) +num_lab;vpr.out;Netlist LAB blocks:\s*(\d+) diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/annealer_detailed_placer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/annealer_detailed_placer/config/golden_results.txt index b04ccbfb07b..651ce660172 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/annealer_detailed_placer/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/annealer_detailed_placer/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.77 vpr 74.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 81 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 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9 19 897 28 0 553 108 16 16 256 -1 mcnc_medium -1 -1 9403 6159 8332 1169 4944 2219 74.6 MiB 2.06 0.01 6.38627 5.03307 -82.5272 -5.03307 nan 0.05 0.00184828 0.00145901 0.0761667 0.0633817 74.6 MiB 2.06 74.6 MiB 1.36 10201 18.4801 2604 4.71739 4077 19753 686869 111324 1.05632e+07 4.31152e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.47355 nan -88.2759 -5.47355 0 0 0.19 -1 -1 74.6 MiB 0.25 0.188153 0.163341 74.6 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.38 vpr 75.29 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 60 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77100 256 245 954 501 0 598 561 22 22 484 -1 mcnc_large -1 -1 8563 7535 44489 711 9803 33975 75.3 MiB 0.67 0.01 6.75273 4.22233 -808.963 -4.22233 nan 0.07 0.00206921 0.00182545 0.0513366 0.0463847 75.3 MiB 0.67 75.3 MiB 0.37 10334 17.2809 2851 4.76756 2724 5860 351757 83165 2.15576e+07 3.23364e+06 1.49107e+06 3080.73 18 47664 245996 -1 4.44165 nan -865.851 -4.44165 0 0 0.21 -1 -1 75.3 MiB 0.18 0.157515 0.145045 75.3 MiB -1 0.07 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.38 vpr 103.08 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 294 10 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105556 10 10 2659 20 0 1271 314 22 22 484 -1 mcnc_large -1 -1 35357 24411 60010 16230 38382 5398 103.1 MiB 8.28 0.02 9.43184 6.46379 -62.5671 -6.46379 nan 0.16 0.00656395 0.00519987 0.417008 0.342569 103.1 MiB 8.28 103.1 MiB 4.38 37499 29.5035 9497 7.47207 8209 52283 2194356 288045 2.15576e+07 1.58448e+07 3.51389e+06 7260.09 18 64568 594370 -1 6.75089 nan -64.5268 -6.75089 0 0 0.64 -1 -1 103.1 MiB 0.89 0.797133 0.683077 103.1 MiB -1 0.16 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.23 vpr 75.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 85 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77600 41 35 1006 76 0 568 161 16 16 256 -1 mcnc_medium -1 -1 10195 6390 9775 797 4761 4217 75.8 MiB 1.99 0.01 6.7004 4.74782 -144.082 -4.74782 nan 0.06 0.00226831 0.00182788 0.0691298 0.0583805 75.8 MiB 1.99 75.8 MiB 1.23 10367 18.2518 2719 4.78697 4167 22236 721470 123170 1.05632e+07 4.58099e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.02595 nan -149.084 -5.02595 0 0 0.19 -1 -1 75.8 MiB 0.29 0.198778 0.17414 75.8 MiB -1 0.06 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/appack_full_legalizer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/appack_full_legalizer/config/golden_results.txt index 8ffc6a4a5ef..b81de13a2b0 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/appack_full_legalizer/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/appack_full_legalizer/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.72 vpr 74.57 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 81 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76360 9 19 897 28 0 597 109 16 16 256 -1 mcnc_medium -1 -1 9839 6247 7389 972 4547 1870 74.6 MiB 2.18 0.01 6.7004 4.99315 -83.7713 -4.99315 nan 0.05 0.0018762 0.00147138 0.0720998 0.0603721 74.6 MiB 2.18 74.6 MiB 1.44 10351 17.3674 2658 4.45973 4983 24549 876704 142398 1.05632e+07 4.36541e+06 1.26944e+06 4958.75 21 28900 206586 -1 5.24195 nan -86.4657 -5.24195 0 0 0.20 -1 -1 74.6 MiB 0.32 0.20208 0.17579 74.6 MiB -1 0.05 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.35 vpr 75.37 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 53 256 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77180 256 245 954 501 0 593 554 22 22 484 -1 mcnc_large -1 -1 8861 7710 48308 501 10956 36851 75.4 MiB 0.67 0.01 5.66617 3.99454 -786.077 -3.99454 nan 0.07 0.00210079 0.00187399 0.05383 0.0485745 75.4 MiB 0.67 75.4 MiB 0.38 10509 17.7218 2866 4.83305 2497 5294 323267 70757 2.15576e+07 2.85638e+06 1.49107e+06 3080.73 14 47664 245996 -1 4.32952 nan -840.706 -4.32952 0 0 0.21 -1 -1 75.4 MiB 0.16 0.145073 0.133469 75.4 MiB -1 0.07 - k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.23 vpr 102.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 288 10 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105404 10 10 2659 20 0 1307 308 22 22 484 -1 mcnc_large -1 -1 35312 24799 56414 14526 36721 5167 102.9 MiB 8.02 0.02 8.69664 6.54963 -63.5707 -6.54963 nan 0.16 0.00680001 0.00542795 0.412826 0.338791 102.9 MiB 8.02 102.9 MiB 4.35 38222 29.2441 9668 7.39709 8731 55064 2361022 305508 2.15576e+07 1.55215e+07 3.51389e+06 7260.09 17 64568 594370 -1 6.82732 nan -65.5299 -6.82732 0 0 0.66 -1 -1 102.9 MiB 0.95 0.799071 0.685614 102.9 MiB -1 0.16 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.66 vpr 75.70 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 87 41 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77520 41 35 1006 76 0 608 163 16 16 256 -1 mcnc_medium -1 -1 10722 6547 9953 802 4830 4321 75.7 MiB 2.22 0.01 6.80812 4.95652 -141.202 -4.95652 nan 0.06 0.00252936 0.00207931 0.0740057 0.062639 75.7 MiB 2.22 75.7 MiB 1.44 10473 17.2253 2735 4.49836 4191 21028 669477 115260 1.05632e+07 4.68878e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.15955 nan -146.607 -5.15955 0 0 0.19 -1 -1 75.7 MiB 0.28 0.201998 0.177319 75.7 MiB -1 0.06 + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.30 vpr 74.56 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 9 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76348 9 19 897 28 0 553 108 16 16 256 -1 mcnc_medium -1 -1 9403 6159 8332 1169 4944 2219 74.6 MiB 2.07 0.01 6.38627 5.03307 -82.5272 -5.03307 nan 0.05 0.00163075 0.00127541 0.0698617 0.0579099 74.6 MiB 2.07 74.6 MiB 1.38 10201 18.4801 2604 4.71739 4077 19753 686869 111324 1.05632e+07 4.31152e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.47355 nan -88.2759 -5.47355 0 0 0.19 -1 -1 74.6 MiB 0.23 0.174176 0.150615 74.6 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.46 vpr 75.66 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 60 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77480 256 245 954 501 0 598 561 22 22 484 -1 mcnc_large -1 -1 8563 7535 44489 711 9803 33975 75.7 MiB 0.69 0.01 6.75273 4.22233 -808.963 -4.22233 nan 0.07 0.00230416 0.00205573 0.0543722 0.0491359 75.7 MiB 0.69 75.7 MiB 0.38 10334 17.2809 2851 4.76756 2724 5860 351757 83165 2.15576e+07 3.23364e+06 1.49107e+06 3080.73 18 47664 245996 -1 4.44165 nan -865.851 -4.44165 0 0 0.22 -1 -1 75.7 MiB 0.20 0.166801 0.153732 75.7 MiB -1 0.07 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.34 vpr 103.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 294 10 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105984 10 10 2659 20 0 1271 314 22 22 484 -1 mcnc_large -1 -1 35357 24411 60010 16230 38382 5398 103.5 MiB 8.19 0.02 9.43184 6.46379 -62.5671 -6.46379 nan 0.16 0.00653141 0.00517397 0.420809 0.346396 103.5 MiB 8.19 103.5 MiB 4.27 37499 29.5035 9497 7.47207 8209 52283 2194356 288045 2.15576e+07 1.58448e+07 3.51389e+06 7260.09 18 64568 594370 -1 6.75089 nan -64.5268 -6.75089 0 0 0.64 -1 -1 103.5 MiB 0.90 0.816903 0.702518 103.5 MiB -1 0.16 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.26 vpr 75.71 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 85 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77524 41 35 1006 76 0 568 161 16 16 256 -1 mcnc_medium -1 -1 10195 6390 9775 797 4761 4217 75.7 MiB 1.97 0.01 6.7004 4.74782 -144.082 -4.74782 nan 0.05 0.00190585 0.00149849 0.0653002 0.0549159 75.7 MiB 1.97 75.7 MiB 1.23 10367 18.2518 2719 4.78697 4167 22236 721470 123170 1.05632e+07 4.58099e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.02595 nan -149.084 -5.02595 0 0 0.19 -1 -1 75.7 MiB 0.27 0.189214 0.165171 75.7 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/bipartitioning_partial_legalizer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/bipartitioning_partial_legalizer/config/golden_results.txt index 76ac8eda722..7f6c398f2d7 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/bipartitioning_partial_legalizer/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/bipartitioning_partial_legalizer/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.68 vpr 74.94 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 81 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76740 9 19 897 28 0 597 109 16 16 256 -1 mcnc_medium -1 -1 9839 6247 7389 972 4547 1870 74.9 MiB 2.16 0.01 6.7004 4.99315 -83.7713 -4.99315 nan 0.06 0.00214464 0.00172131 0.0732342 0.0613589 74.9 MiB 2.16 74.9 MiB 1.42 10351 17.3674 2658 4.45973 4983 24549 876704 142398 1.05632e+07 4.36541e+06 1.26944e+06 4958.75 21 28900 206586 -1 5.24195 nan -86.4657 -5.24195 0 0 0.19 -1 -1 74.9 MiB 0.31 0.201417 0.17499 74.9 MiB -1 0.06 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.33 vpr 75.48 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 53 256 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77296 256 245 954 501 0 593 554 22 22 484 -1 mcnc_large -1 -1 8861 7710 48308 501 10956 36851 75.5 MiB 0.67 0.01 5.66617 3.99454 -786.077 -3.99454 nan 0.07 0.00199472 0.00176773 0.0526584 0.0474492 75.5 MiB 0.67 75.5 MiB 0.37 10509 17.7218 2866 4.83305 2497 5294 323267 70757 2.15576e+07 2.85638e+06 1.49107e+06 3080.73 14 47664 245996 -1 4.32952 nan -840.706 -4.32952 0 0 0.22 -1 -1 75.5 MiB 0.15 0.142754 0.131235 75.5 MiB -1 0.07 - k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.32 vpr 103.19 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 288 10 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105664 10 10 2659 20 0 1307 308 22 22 484 -1 mcnc_large -1 -1 35312 24799 56414 14526 36721 5167 103.2 MiB 8.00 0.03 8.69664 6.54963 -63.5707 -6.54963 nan 0.16 0.00648813 0.00512928 0.419681 0.344675 103.2 MiB 8.00 103.2 MiB 4.33 38222 29.2441 9668 7.39709 8731 55064 2361022 305508 2.15576e+07 1.55215e+07 3.51389e+06 7260.09 17 64568 594370 -1 6.82732 nan -65.5299 -6.82732 0 0 0.63 -1 -1 103.2 MiB 0.89 0.786213 0.672787 103.2 MiB -1 0.16 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.60 vpr 75.71 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 87 41 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77524 41 35 1006 76 0 608 163 16 16 256 -1 mcnc_medium -1 -1 10722 6547 9953 802 4830 4321 75.7 MiB 2.15 0.01 6.80812 4.95652 -141.202 -4.95652 nan 0.05 0.00198848 0.00157732 0.0678735 0.057204 75.7 MiB 2.15 75.7 MiB 1.32 10473 17.2253 2735 4.49836 4191 21028 669477 115260 1.05632e+07 4.68878e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.15955 nan -146.607 -5.15955 0 0 0.21 -1 -1 75.7 MiB 0.27 0.191818 0.168051 75.7 MiB -1 0.05 + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.33 vpr 74.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 9 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76408 9 19 897 28 0 553 108 16 16 256 -1 mcnc_medium -1 -1 9403 6159 8332 1169 4944 2219 74.6 MiB 2.07 0.01 6.38627 5.03307 -82.5272 -5.03307 nan 0.05 0.00174681 0.00136501 0.0775146 0.0645634 74.6 MiB 2.07 74.6 MiB 1.37 10201 18.4801 2604 4.71739 4077 19753 686869 111324 1.05632e+07 4.31152e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.47355 nan -88.2759 -5.47355 0 0 0.19 -1 -1 74.6 MiB 0.24 0.187199 0.162157 74.6 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.42 vpr 75.41 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 60 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77220 256 245 954 501 0 598 561 22 22 484 -1 mcnc_large -1 -1 8563 7535 44489 711 9803 33975 75.4 MiB 0.67 0.01 6.75273 4.22233 -808.963 -4.22233 nan 0.07 0.00206925 0.0018412 0.0508939 0.0460358 75.4 MiB 0.67 75.4 MiB 0.37 10334 17.2809 2851 4.76756 2724 5860 351757 83165 2.15576e+07 3.23364e+06 1.49107e+06 3080.73 18 47664 245996 -1 4.44165 nan -865.851 -4.44165 0 0 0.21 -1 -1 75.4 MiB 0.19 0.160523 0.14791 75.4 MiB -1 0.07 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.53 vpr 103.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 294 10 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105740 10 10 2659 20 0 1271 314 22 22 484 -1 mcnc_large -1 -1 35357 24411 60010 16230 38382 5398 103.3 MiB 8.21 0.02 9.43184 6.46379 -62.5671 -6.46379 nan 0.16 0.00644882 0.00510584 0.417293 0.342947 103.3 MiB 8.21 103.3 MiB 4.32 37499 29.5035 9497 7.47207 8209 52283 2194356 288045 2.15576e+07 1.58448e+07 3.51389e+06 7260.09 18 64568 594370 -1 6.75089 nan -64.5268 -6.75089 0 0 0.63 -1 -1 103.3 MiB 0.86 0.791005 0.677375 103.3 MiB -1 0.16 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.21 vpr 75.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 85 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77656 41 35 1006 76 0 568 161 16 16 256 -1 mcnc_medium -1 -1 10195 6390 9775 797 4761 4217 75.8 MiB 1.98 0.01 6.7004 4.74782 -144.082 -4.74782 nan 0.06 0.00192868 0.00151668 0.0664797 0.0560886 75.8 MiB 1.98 75.8 MiB 1.23 10367 18.2518 2719 4.78697 4167 22236 721470 123170 1.05632e+07 4.58099e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.02595 nan -149.084 -5.02595 0 0 0.19 -1 -1 75.8 MiB 0.28 0.192055 0.167866 75.8 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/flowbased_partial_legalizer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/flowbased_partial_legalizer/config/golden_results.txt index d0b6abf9c30..6d4d19ae438 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/flowbased_partial_legalizer/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/flowbased_partial_legalizer/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 12.58 vpr 74.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 81 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76572 9 19 897 28 0 586 109 16 16 256 -1 mcnc_medium -1 -1 9900 6360 7909 1107 4684 2118 74.8 MiB 5.64 0.01 6.03601 5.03307 -83.5288 -5.03307 nan 0.06 0.00203466 0.00167958 0.0818482 0.0685737 74.8 MiB 5.64 74.8 MiB 1.47 10594 18.1094 2702 4.61880 4742 22493 795427 129384 1.05632e+07 4.36541e+06 1.26944e+06 4958.75 19 28900 206586 -1 5.43777 nan -90.0079 -5.43777 0 0 0.22 -1 -1 74.8 MiB 0.30 0.213641 0.187016 74.8 MiB -1 0.05 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.28 vpr 75.49 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 52 256 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77304 256 245 954 501 0 592 553 22 22 484 -1 mcnc_large -1 -1 8675 7625 18705 208 2044 16453 75.5 MiB 0.54 0.01 5.29347 4.17001 -789.106 -4.17001 nan 0.07 0.00210785 0.00187171 0.0283921 0.0260381 75.5 MiB 0.54 75.5 MiB 0.37 10188 17.2095 2783 4.70101 2438 5152 286148 62961 2.15576e+07 2.80249e+06 1.49107e+06 3080.73 26 47664 245996 -1 4.27306 nan -834.262 -4.27306 0 0 0.24 -1 -1 75.5 MiB 0.21 0.164997 0.152139 75.5 MiB -1 0.07 - k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 56.71 vpr 103.44 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 285 10 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105924 10 10 2659 20 0 1252 305 22 22 484 -1 mcnc_large -1 -1 34943 24219 57761 15196 37297 5268 103.4 MiB 26.54 0.02 10.2208 6.43021 -61.984 -6.43021 nan 0.18 0.00650587 0.0051602 0.428973 0.354156 103.4 MiB 26.54 103.4 MiB 4.46 38021 30.3682 9597 7.66534 9409 61511 2810186 334080 2.15576e+07 1.53598e+07 3.51389e+06 7260.09 21 64568 594370 -1 6.57906 nan -64.2422 -6.57906 0 0 0.63 -1 -1 103.4 MiB 1.08 0.852224 0.731336 103.4 MiB -1 0.17 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 12.80 vpr 75.64 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 83 41 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77460 41 35 1006 76 0 603 159 16 16 256 -1 mcnc_medium -1 -1 10923 6527 10479 906 5084 4489 75.6 MiB 5.79 0.01 6.34107 4.93251 -140.282 -4.93251 nan 0.05 0.00182476 0.00143138 0.0648361 0.0543319 75.6 MiB 5.79 75.6 MiB 1.33 10310 17.0978 2713 4.49917 3971 19813 634767 109350 1.05632e+07 4.4732e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.2466 nan -147.136 -5.2466 0 0 0.19 -1 -1 75.6 MiB 0.25 0.189748 0.165607 75.6 MiB -1 0.05 + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 12.62 vpr 74.31 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 9 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76096 9 19 897 28 0 584 108 16 16 256 -1 mcnc_medium -1 -1 9926 6388 9360 1577 5386 2397 74.3 MiB 5.70 0.01 6.43571 5.02313 -83.9819 -5.02313 nan 0.06 0.00185978 0.00147058 0.0799794 0.0660381 74.3 MiB 5.70 74.3 MiB 1.43 10240 17.5643 2650 4.54545 4343 20498 701095 117730 1.05632e+07 4.31152e+06 1.26944e+06 4958.75 19 28900 206586 -1 5.38542 nan -87.7064 -5.38542 0 0 0.19 -1 -1 74.3 MiB 0.26 0.197396 0.17025 74.3 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.32 vpr 75.27 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 57 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77076 256 245 954 501 0 594 558 22 22 484 -1 mcnc_large -1 -1 8638 7318 44182 518 9501 34163 75.3 MiB 0.67 0.01 5.66617 4.14214 -792.809 -4.14214 nan 0.07 0.00208712 0.00185181 0.0537576 0.048756 75.3 MiB 0.67 75.3 MiB 0.37 10133 17.0589 2794 4.70370 2430 5324 301583 66661 2.15576e+07 3.07196e+06 1.49107e+06 3080.73 12 47664 245996 -1 4.75649 nan -895.431 -4.75649 0 0 0.21 -1 -1 75.3 MiB 0.15 0.141255 0.130583 75.3 MiB -1 0.07 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 51.54 vpr 102.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 291 10 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105452 10 10 2659 20 0 1408 311 22 22 484 -1 mcnc_large -1 -1 37550 26161 58226 15798 37153 5275 103.0 MiB 23.78 0.03 9.68078 6.57123 -63.8025 -6.57123 nan 0.16 0.0065839 0.00526862 0.429236 0.356006 103.0 MiB 23.78 103.0 MiB 4.32 39984 28.3977 10109 7.17969 10202 60703 2773126 353665 2.15576e+07 1.56832e+07 3.51389e+06 7260.09 18 64568 594370 -1 6.79723 nan -65.6391 -6.79723 0 0 0.63 -1 -1 103.0 MiB 1.05 0.82393 0.707849 103.0 MiB -1 0.16 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 12.93 vpr 75.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 87 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77440 41 35 1006 76 0 593 163 16 16 256 -1 mcnc_medium -1 -1 10931 6699 10398 846 4997 4555 75.6 MiB 5.83 0.01 6.29407 4.89173 -140.548 -4.89173 nan 0.05 0.00178239 0.00141272 0.0611088 0.0513396 75.6 MiB 5.83 75.6 MiB 1.26 10678 18.0067 2822 4.75885 4682 24845 807602 138478 1.05632e+07 4.68878e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.05377 nan -146.422 -5.05377 0 0 0.19 -1 -1 75.6 MiB 0.27 0.180074 0.157058 75.6 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/lp_b2b_analytical_solver/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/lp_b2b_analytical_solver/config/golden_results.txt index df573c79e04..6f5f90a4c3c 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/lp_b2b_analytical_solver/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/lp_b2b_analytical_solver/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.71 vpr 74.75 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 81 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76544 9 19 897 28 0 597 109 16 16 256 -1 mcnc_medium -1 -1 9839 6247 7389 972 4547 1870 74.8 MiB 2.21 0.01 6.7004 4.99315 -83.7713 -4.99315 nan 0.06 0.00213564 0.00171905 0.0809811 0.0682891 74.8 MiB 2.21 74.8 MiB 1.44 10351 17.3674 2658 4.45973 4983 24549 876704 142398 1.05632e+07 4.36541e+06 1.26944e+06 4958.75 21 28900 206586 -1 5.24195 nan -86.4657 -5.24195 0 0 0.20 -1 -1 74.8 MiB 0.32 0.211188 0.183562 74.8 MiB -1 0.06 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.44 vpr 75.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 53 256 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76924 256 245 954 501 0 593 554 22 22 484 -1 mcnc_large -1 -1 8861 7710 48308 501 10956 36851 75.1 MiB 0.70 0.01 5.66617 3.99454 -786.077 -3.99454 nan 0.08 0.00215311 0.00192204 0.0567913 0.0510815 75.1 MiB 0.70 75.1 MiB 0.39 10509 17.7218 2866 4.83305 2497 5294 323267 70757 2.15576e+07 2.85638e+06 1.49107e+06 3080.73 14 47664 245996 -1 4.32952 nan -840.706 -4.32952 0 0 0.23 -1 -1 75.1 MiB 0.16 0.148757 0.136485 75.1 MiB -1 0.08 - k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 19.59 vpr 103.21 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 288 10 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105688 10 10 2659 20 0 1307 308 22 22 484 -1 mcnc_large -1 -1 35312 24799 56414 14526 36721 5167 103.2 MiB 7.81 0.02 8.69664 6.54963 -63.5707 -6.54963 nan 0.15 0.00541808 0.00416684 0.353796 0.285792 103.2 MiB 7.81 103.2 MiB 4.26 38222 29.2441 9668 7.39709 8731 55064 2361022 305508 2.15576e+07 1.55215e+07 3.51389e+06 7260.09 17 64568 594370 -1 6.82732 nan -65.5299 -6.82732 0 0 0.65 -1 -1 103.2 MiB 0.85 0.705686 0.600054 103.2 MiB -1 0.15 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.61 vpr 75.86 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 87 41 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77676 41 35 1006 76 0 608 163 16 16 256 -1 mcnc_medium -1 -1 10722 6547 9953 802 4830 4321 75.9 MiB 2.16 0.01 6.80812 4.95652 -141.202 -4.95652 nan 0.06 0.00238669 0.00192567 0.0737126 0.0623663 75.9 MiB 2.16 75.9 MiB 1.39 10473 17.2253 2735 4.49836 4191 21028 669477 115260 1.05632e+07 4.68878e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.15955 nan -146.607 -5.15955 0 0 0.20 -1 -1 75.9 MiB 0.30 0.208025 0.182647 75.9 MiB -1 0.06 + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.30 vpr 74.49 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 9 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76280 9 19 897 28 0 553 108 16 16 256 -1 mcnc_medium -1 -1 9403 6159 8332 1169 4944 2219 74.5 MiB 2.02 0.01 6.38627 5.03307 -82.5272 -5.03307 nan 0.05 0.00186748 0.00147374 0.075299 0.0626077 74.5 MiB 2.02 74.5 MiB 1.33 10201 18.4801 2604 4.71739 4077 19753 686869 111324 1.05632e+07 4.31152e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.47355 nan -88.2759 -5.47355 0 0 0.19 -1 -1 74.5 MiB 0.25 0.187127 0.162486 74.5 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.40 vpr 75.29 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 60 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77092 256 245 954 501 0 598 561 22 22 484 -1 mcnc_large -1 -1 8563 7535 44489 711 9803 33975 75.3 MiB 0.67 0.01 6.75273 4.22233 -808.963 -4.22233 nan 0.07 0.00223446 0.00199382 0.0522672 0.0472954 75.3 MiB 0.67 75.3 MiB 0.37 10334 17.2809 2851 4.76756 2724 5860 351757 83165 2.15576e+07 3.23364e+06 1.49107e+06 3080.73 18 47664 245996 -1 4.44165 nan -865.851 -4.44165 0 0 0.21 -1 -1 75.3 MiB 0.18 0.157983 0.145454 75.3 MiB -1 0.07 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.43 vpr 103.27 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 294 10 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105744 10 10 2659 20 0 1271 314 22 22 484 -1 mcnc_large -1 -1 35357 24411 60010 16230 38382 5398 103.3 MiB 8.26 0.02 9.43184 6.46379 -62.5671 -6.46379 nan 0.17 0.00657205 0.00518572 0.421775 0.347051 103.3 MiB 8.26 103.3 MiB 4.34 37499 29.5035 9497 7.47207 8209 52283 2194356 288045 2.15576e+07 1.58448e+07 3.51389e+06 7260.09 18 64568 594370 -1 6.75089 nan -64.5268 -6.75089 0 0 0.63 -1 -1 103.3 MiB 0.89 0.808608 0.694348 103.3 MiB -1 0.16 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.22 vpr 75.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 85 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77184 41 35 1006 76 0 568 161 16 16 256 -1 mcnc_medium -1 -1 10195 6390 9775 797 4761 4217 75.4 MiB 1.98 0.01 6.7004 4.74782 -144.082 -4.74782 nan 0.05 0.00198299 0.00156918 0.0659499 0.0554529 75.4 MiB 1.98 75.4 MiB 1.23 10367 18.2518 2719 4.78697 4167 22236 721470 123170 1.05632e+07 4.58099e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.02595 nan -149.084 -5.02595 0 0 0.19 -1 -1 75.4 MiB 0.26 0.19016 0.165955 75.4 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/golden_results.txt index 7a545550ccd..26f3273119e 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.82 vpr 74.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 81 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76728 9 19 897 28 0 597 109 16 16 256 -1 mcnc_medium -1 -1 9839 6247 7389 972 4547 1870 74.9 MiB 2.18 0.01 6.7004 4.99315 -83.7713 -4.99315 nan 0.06 0.00210781 0.0016687 0.0768908 0.0646007 74.9 MiB 2.18 74.9 MiB 1.43 10351 17.3674 2658 4.45973 4983 24549 876704 142398 1.05632e+07 4.36541e+06 1.26944e+06 4958.75 21 28900 206586 -1 5.24195 nan -86.4657 -5.24195 0 0 0.20 -1 -1 74.9 MiB 0.33 0.209556 0.182397 74.9 MiB -1 0.05 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.41 vpr 75.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 53 256 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77432 256 245 954 501 0 593 554 22 22 484 -1 mcnc_large -1 -1 8861 7710 48308 501 10956 36851 75.6 MiB 0.68 0.01 5.66617 3.99454 -786.077 -3.99454 nan 0.07 0.00218714 0.00195673 0.057178 0.0517705 75.6 MiB 0.68 75.6 MiB 0.38 10509 17.7218 2866 4.83305 2497 5294 323267 70757 2.15576e+07 2.85638e+06 1.49107e+06 3080.73 14 47664 245996 -1 4.32952 nan -840.706 -4.32952 0 0 0.23 -1 -1 75.6 MiB 0.16 0.150727 0.138982 75.6 MiB -1 0.07 - k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.54 vpr 103.28 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 288 10 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105756 10 10 2659 20 0 1307 308 22 22 484 -1 mcnc_large -1 -1 35312 24799 56414 14526 36721 5167 103.3 MiB 8.22 0.03 8.69664 6.54963 -63.5707 -6.54963 nan 0.18 0.00695297 0.00560648 0.444013 0.367195 103.3 MiB 8.22 103.3 MiB 4.42 38222 29.2441 9668 7.39709 8731 55064 2361022 305508 2.15576e+07 1.55215e+07 3.51389e+06 7260.09 17 64568 594370 -1 6.82732 nan -65.5299 -6.82732 0 0 0.67 -1 -1 103.3 MiB 1.04 0.868938 0.749348 103.3 MiB -1 0.18 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.65 vpr 75.66 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 87 41 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77472 41 35 1006 76 0 608 163 16 16 256 -1 mcnc_medium -1 -1 10722 6547 9953 802 4830 4321 75.7 MiB 2.18 0.01 6.80812 4.95652 -141.202 -4.95652 nan 0.06 0.0024294 0.00197246 0.0735715 0.0622781 75.7 MiB 2.18 75.7 MiB 1.39 10473 17.2253 2735 4.49836 4191 21028 669477 115260 1.05632e+07 4.68878e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.15955 nan -146.607 -5.15955 0 0 0.20 -1 -1 75.7 MiB 0.28 0.201805 0.177346 75.7 MiB -1 0.06 + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.42 vpr 74.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 9 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76412 9 19 897 28 0 553 108 16 16 256 -1 mcnc_medium -1 -1 9403 6159 8332 1169 4944 2219 74.6 MiB 2.07 0.01 6.38627 5.03307 -82.5272 -5.03307 nan 0.05 0.00163693 0.00127812 0.0763521 0.063641 74.6 MiB 2.07 74.6 MiB 1.37 10201 18.4801 2604 4.71739 4077 19753 686869 111324 1.05632e+07 4.31152e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.47355 nan -88.2759 -5.47355 0 0 0.19 -1 -1 74.6 MiB 0.25 0.188399 0.163633 74.6 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.42 vpr 75.53 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 60 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77344 256 245 954 501 0 598 561 22 22 484 -1 mcnc_large -1 -1 8563 7535 44489 711 9803 33975 75.5 MiB 0.67 0.01 6.75273 4.22233 -808.963 -4.22233 nan 0.07 0.00198854 0.00175913 0.0485999 0.0437247 75.5 MiB 0.67 75.5 MiB 0.37 10334 17.2809 2851 4.76756 2724 5860 351757 83165 2.15576e+07 3.23364e+06 1.49107e+06 3080.73 18 47664 245996 -1 4.44165 nan -865.851 -4.44165 0 0 0.21 -1 -1 75.5 MiB 0.18 0.153989 0.141495 75.5 MiB -1 0.07 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.42 vpr 103.30 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 294 10 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105784 10 10 2659 20 0 1271 314 22 22 484 -1 mcnc_large -1 -1 35357 24411 60010 16230 38382 5398 103.3 MiB 8.23 0.02 9.43184 6.46379 -62.5671 -6.46379 nan 0.16 0.0063497 0.0050375 0.425885 0.351879 103.3 MiB 8.23 103.3 MiB 4.31 37499 29.5035 9497 7.47207 8209 52283 2194356 288045 2.15576e+07 1.58448e+07 3.51389e+06 7260.09 18 64568 594370 -1 6.75089 nan -64.5268 -6.75089 0 0 0.64 -1 -1 103.3 MiB 0.84 0.793649 0.680537 103.3 MiB -1 0.16 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.29 vpr 75.68 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 85 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77496 41 35 1006 76 0 568 161 16 16 256 -1 mcnc_medium -1 -1 10195 6390 9775 797 4761 4217 75.7 MiB 1.99 0.01 6.7004 4.74782 -144.082 -4.74782 nan 0.05 0.00234249 0.00188299 0.0692247 0.0585205 75.7 MiB 1.99 75.7 MiB 1.24 10367 18.2518 2719 4.78697 4167 22236 721470 123170 1.05632e+07 4.58099e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.02595 nan -149.084 -5.02595 0 0 0.19 -1 -1 75.7 MiB 0.29 0.197995 0.173511 75.7 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/naive_full_legalizer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/naive_full_legalizer/config/golden_results.txt index 9536e9d1509..3ad8c6f807c 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/naive_full_legalizer/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/naive_full_legalizer/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 6.15 vpr 74.47 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 118 9 -1 -1 success v8.0.0-12319-g3c3593acf-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T15:52:41 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76260 9 19 897 28 0 845 146 16 16 256 -1 mcnc_medium -1 -1 12365 8270 9746 863 6880 2003 74.5 MiB 2.23 0.01 7.18456 5.4961 -93.6165 -5.4961 nan 0.07 0.00254639 0.00222259 0.086132 0.0740221 74.5 MiB 2.23 74.5 MiB 1.72 13345 15.8116 3487 4.13152 6463 26620 919798 160217 1.05632e+07 6.35949e+06 1.26944e+06 4958.75 18 28900 206586 -1 6.05887 nan -98.9369 -6.05887 0 0 0.19 -1 -1 74.5 MiB 0.39 0.222236 0.195695 74.5 MiB -1 0.07 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 3.65 vpr 75.46 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 168 256 -1 -1 success v8.0.0-12319-g3c3593acf-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T15:52:41 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77272 256 245 954 501 0 936 669 22 22 484 -1 mcnc_large -1 -1 10542 8747 59149 2154 19729 37266 75.5 MiB 1.24 0.02 5.38138 4.38501 -874.556 -4.38501 nan 0.07 0.00209694 0.00188497 0.0563663 0.0509566 75.5 MiB 1.24 75.5 MiB 0.87 12756 13.6282 3483 3.72115 4006 10114 404499 85551 2.15576e+07 9.05419e+06 1.49107e+06 3080.73 18 47664 245996 -1 4.63091 nan -907.495 -4.63091 0 0 0.22 -1 -1 75.5 MiB 0.21 0.162322 0.149228 75.5 MiB -1 0.07 - k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 21.09 vpr 102.94 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 377 10 -1 -1 success v8.0.0-12319-g3c3593acf-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T15:52:41 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105412 10 10 2659 20 0 2571 397 22 22 484 -1 mcnc_large -1 -1 44776 36231 76213 17980 52338 5895 102.9 MiB 7.51 0.03 9.34127 7.28862 -69.7369 -7.28862 nan 0.16 0.00642442 0.0053304 0.412862 0.342414 102.9 MiB 7.51 102.9 MiB 4.84 52320 20.3501 13584 5.28355 17236 73425 3531835 478455 2.15576e+07 2.0318e+07 3.51389e+06 7260.09 18 64568 594370 -1 7.60969 nan -72.5685 -7.60969 0 0 0.71 -1 -1 102.9 MiB 1.19 0.795821 0.685077 102.9 MiB -1 0.16 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 6.66 vpr 75.43 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 128 41 -1 -1 success v8.0.0-12319-g3c3593acf-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T15:52:41 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77240 41 35 1006 76 0 955 204 16 16 256 -1 mcnc_medium -1 -1 12185 8976 13404 939 7582 4883 75.4 MiB 2.59 0.01 7.09065 5.41162 -159.473 -5.41162 nan 0.06 0.0020802 0.00165481 0.0756766 0.0645647 75.4 MiB 2.59 75.4 MiB 1.96 14222 14.8921 3712 3.88691 6941 30823 1007954 175223 1.05632e+07 6.89843e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.78622 nan -170.237 -5.78622 0 0 0.33 -1 -1 75.4 MiB 0.35 0.203674 0.178783 75.4 MiB -1 0.06 + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.69 vpr 74.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 115 9 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76288 9 19 897 28 0 625 143 16 16 256 -1 mcnc_medium -1 -1 6992 7002 889 24 707 158 74.5 MiB 2.23 0.01 6.13867 6.20142 -92.8983 -6.20142 nan 0.05 0.00184963 0.00146703 0.0215325 0.020109 74.5 MiB 2.23 74.5 MiB 1.71 10686 17.1250 2867 4.59455 3963 19221 604164 101962 1.05632e+07 6.19781e+06 1.26944e+06 4958.75 18 28900 206586 -1 6.1539 nan -95.8095 -6.1539 0 0 0.19 -1 -1 74.5 MiB 0.25 0.13457 0.120906 74.5 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 3.69 vpr 75.73 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 185 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77544 256 245 954 501 0 734 686 22 22 484 -1 mcnc_large -1 -1 9207 7848 61166 2485 20802 37879 75.7 MiB 1.31 0.01 5.67226 4.51297 -851.423 -4.51297 nan 0.07 0.0021372 0.00191331 0.0557081 0.0503795 75.7 MiB 1.31 75.7 MiB 0.93 11170 15.2180 3089 4.20845 2751 7995 332142 75196 2.15576e+07 9.97039e+06 1.49107e+06 3080.73 18 47664 245996 -1 4.65299 nan -879.156 -4.65299 0 0 0.21 -1 -1 75.7 MiB 0.18 0.15988 0.14711 75.7 MiB -1 0.07 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.29 vpr 102.36 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 359 10 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 104816 10 10 2659 20 0 1425 379 22 22 484 -1 mcnc_large -1 -1 30397 26717 37396 4935 29068 3393 102.4 MiB 8.00 0.03 9.198 6.91182 -66.484 -6.91182 nan 0.16 0.00639975 0.00510351 0.233175 0.196302 102.4 MiB 8.00 102.4 MiB 4.74 41052 28.8084 10538 7.39509 8821 60607 2626808 334508 2.15576e+07 1.93479e+07 3.51389e+06 7260.09 17 64568 594370 -1 7.39449 nan -70.2262 -7.39449 0 0 0.64 -1 -1 102.4 MiB 1.00 0.609161 0.533892 102.4 MiB -1 0.16 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 6.43 vpr 75.60 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 130 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77412 41 35 1006 76 0 677 206 16 16 256 -1 mcnc_medium -1 -1 8944 7755 9326 447 5503 3376 75.6 MiB 2.51 0.01 6.51137 5.32473 -151.971 -5.32473 nan 0.05 0.0023814 0.00192808 0.0582225 0.0502958 75.6 MiB 2.51 75.6 MiB 1.78 12758 18.8449 3345 4.94092 4671 25130 849904 141761 1.05632e+07 7.00622e+06 1.26944e+06 4958.75 19 28900 206586 -1 5.69529 nan -161.815 -5.69529 0 0 0.19 -1 -1 75.6 MiB 0.33 0.188837 0.166976 75.6 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/no_fixed_blocks/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/no_fixed_blocks/config/golden_results.txt index af96344e4d4..2d46961d25a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/no_fixed_blocks/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/no_fixed_blocks/config/golden_results.txt @@ -1,6 +1,6 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_frac_chain_mem32K_40nm.xml boundtop.v common 16.33 vpr 82.46 MiB -1 -1 10.16 48020 3 0.64 -1 -1 38552 -1 -1 46 196 1 0 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 84436 196 193 800 0 1 606 436 20 20 400 -1 vtr_extra_small -1 -1 9829 3239 157376 44151 98003 15222 82.5 MiB 2.10 0.01 3.87827 2.52163 -1133.67 -2.52163 2.52163 0.06 0.002017 0.00173055 0.210521 0.182408 82.5 MiB 2.10 82.5 MiB 0.87 5218 8.74037 1504 2.51926 1515 2128 128299 36993 2.07112e+07 3.02712e+06 1.26946e+06 3173.65 11 38988 203232 -1 2.90309 2.90309 -1205.75 -2.90309 0 0 0.18 -1 -1 82.5 MiB 0.10 0.294107 0.259915 82.5 MiB -1 0.06 - k6_frac_N10_frac_chain_mem32K_40nm.xml ch_intrinsics.v common 2.48 vpr 77.02 MiB -1 -1 0.24 22420 3 0.07 -1 -1 36672 -1 -1 68 99 1 0 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 78868 99 130 264 0 1 224 298 20 20 400 -1 vtr_extra_small -1 -1 3051 762 77908 26433 37944 13531 77.0 MiB 0.69 0.00 3.13126 2.14271 -127.438 -2.14271 2.14271 0.06 0.000599581 0.000526946 0.0505604 0.0445917 77.0 MiB 0.69 77.0 MiB 0.29 1373 8.32121 408 2.47273 425 676 35940 10433 2.07112e+07 4.21279e+06 1.31074e+06 3276.84 9 39388 210115 -1 2.05745 2.05745 -145.265 -2.05745 0 0 0.19 -1 -1 77.0 MiB 0.03 0.0708635 0.0633859 77.0 MiB -1 0.06 - k6_frac_N10_frac_chain_mem32K_40nm.xml or1200.v common 47.81 vpr 129.08 MiB -1 -1 3.74 64920 8 3.05 -1 -1 44504 -1 -1 247 385 2 1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 132176 385 362 3324 0 1 2387 997 30 30 900 -1 vtr_small -1 -1 68874 30723 563511 215274 323610 24627 129.1 MiB 17.32 0.08 15.1664 9.11387 -10195.4 -9.11387 9.11387 0.30 0.0106976 0.00955175 1.31381 1.15591 129.1 MiB 17.32 129.1 MiB 8.18 42014 17.7125 10760 4.53626 10048 33532 1783063 328457 4.8774e+07 1.48038e+07 6.56785e+06 7297.61 18 120772 1084977 -1 9.65738 9.65738 -10521.1 -9.65738 0 0 1.28 -1 -1 129.1 MiB 0.96 1.90612 1.70334 129.1 MiB -1 0.29 - k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 12.76 vpr 85.32 MiB -1 -1 2.10 35728 16 0.41 -1 -1 38820 -1 -1 61 45 3 1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 87364 45 32 936 0 1 779 142 20 20 400 -1 vtr_extra_small -1 -1 14169 6524 30112 8711 19109 2292 85.3 MiB 4.17 0.01 14.9863 11.2623 -7220.41 -11.2623 11.2623 0.09 0.00257114 0.0021362 0.231372 0.192892 85.3 MiB 4.17 85.3 MiB 2.66 11118 14.3273 2853 3.67655 3314 8781 707817 174136 2.07112e+07 5.32753e+06 1.91495e+06 4787.38 12 44576 305072 -1 11.748 11.748 -7583.52 -11.748 0 0 0.36 -1 -1 85.3 MiB 0.24 0.355928 0.306193 85.3 MiB -1 0.09 - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.34 vpr 76.38 MiB -1 -1 0.52 26528 4 0.11 -1 -1 36476 -1 -1 15 11 0 0 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 78208 11 2 140 0 2 80 28 20 20 400 -1 vtr_extra_small -1 -1 1035 345 1582 426 934 222 76.4 MiB 0.45 0.00 2.87093 2.12187 -178.898 -2.12187 1.95781 0.06 0.000430111 0.000354656 0.0199202 0.0167969 76.4 MiB 0.45 76.4 MiB 0.27 532 7.18919 137 1.85135 148 243 5764 1450 2.07112e+07 808410 1.12964e+06 2824.09 7 37792 180905 -1 2.26141 1.98907 -189.802 -2.26141 0 0 0.16 -1 -1 76.4 MiB 0.02 0.0369341 0.0324268 76.4 MiB -1 0.06 + k6_frac_N10_frac_chain_mem32K_40nm.xml boundtop.v common 16.05 vpr 81.89 MiB -1 -1 9.85 47916 3 0.64 -1 -1 38724 -1 -1 49 196 1 0 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 83860 196 193 800 0 1 604 439 20 20 400 -1 vtr_extra_small -1 -1 10093 3077 163805 47163 101234 15408 81.9 MiB 2.17 0.01 3.77247 2.52274 -1147.74 -2.52274 2.52274 0.06 0.00196642 0.00169503 0.211716 0.183254 81.9 MiB 2.17 81.9 MiB 0.91 4991 8.38824 1457 2.44874 1466 2076 118441 34928 2.07112e+07 3.18881e+06 1.26946e+06 3173.65 11 38988 203232 -1 2.92237 2.92237 -1223.08 -2.92237 0 0 0.18 -1 -1 81.9 MiB 0.10 0.293888 0.259253 81.9 MiB -1 0.06 + k6_frac_N10_frac_chain_mem32K_40nm.xml ch_intrinsics.v common 2.52 vpr 77.02 MiB -1 -1 0.23 22192 3 0.07 -1 -1 36924 -1 -1 68 99 1 0 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 78868 99 130 264 0 1 225 298 20 20 400 -1 vtr_extra_small -1 -1 2849 742 80893 25565 39657 15671 77.0 MiB 0.72 0.00 2.69645 1.91463 -131.03 -1.91463 1.91463 0.06 0.00061311 0.000539815 0.0522956 0.0461293 77.0 MiB 0.72 77.0 MiB 0.30 1353 8.15060 436 2.62651 392 659 28979 8639 2.07112e+07 4.21279e+06 1.31074e+06 3276.84 11 39388 210115 -1 1.9348 1.9348 -148.444 -1.9348 0 0 0.19 -1 -1 77.0 MiB 0.03 0.0744741 0.0665954 77.0 MiB -1 0.06 + k6_frac_N10_frac_chain_mem32K_40nm.xml or1200.v common 46.11 vpr 128.92 MiB -1 -1 3.56 65444 8 3.03 -1 -1 44832 -1 -1 244 385 2 1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 132012 385 362 3324 0 1 2376 994 30 30 900 -1 vtr_small -1 -1 69736 30282 586038 225550 334252 26236 128.9 MiB 16.71 0.07 13.325 9.27568 -9839.79 -9.27568 9.27568 0.29 0.0114598 0.0100068 1.39228 1.22079 128.9 MiB 16.71 128.9 MiB 7.82 41183 17.4430 10522 4.45659 9533 31343 1664287 305798 4.8774e+07 1.46421e+07 6.56785e+06 7297.61 15 120772 1084977 -1 9.37975 9.37975 -10177.2 -9.37975 0 0 1.26 -1 -1 128.9 MiB 0.87 1.92037 1.71045 128.9 MiB -1 0.29 + k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 12.43 vpr 85.28 MiB -1 -1 2.05 35232 16 0.41 -1 -1 38816 -1 -1 60 45 3 1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 87328 45 32 936 0 1 769 141 20 20 400 -1 vtr_extra_small -1 -1 15469 6745 22467 6247 15063 1157 85.3 MiB 4.07 0.01 15.7888 11.0431 -6847.48 -11.0431 11.0431 0.09 0.00231814 0.00189861 0.173349 0.143749 85.3 MiB 4.07 85.3 MiB 2.71 11393 14.8734 2918 3.80940 3365 9605 739135 176293 2.07112e+07 5.27364e+06 1.91495e+06 4787.38 16 44576 305072 -1 11.6428 11.6428 -7437.92 -11.6428 0 0 0.31 -1 -1 85.3 MiB 0.28 0.320691 0.276954 85.3 MiB -1 0.08 + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.26 vpr 76.48 MiB -1 -1 0.46 26544 4 0.11 -1 -1 36856 -1 -1 15 11 0 0 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 78320 11 2 140 0 2 79 28 20 20 400 -1 vtr_extra_small -1 -1 1310 261 1624 429 1055 140 76.5 MiB 0.43 0.00 3.12927 2.10685 -169.756 -2.10685 1.95087 0.05 0.00043178 0.00035591 0.0204188 0.0171776 76.5 MiB 0.43 76.5 MiB 0.25 405 5.54795 119 1.63014 169 297 5541 1641 2.07112e+07 808410 1.12964e+06 2824.09 13 37792 180905 -1 2.21425 2.04843 -176.222 -2.21425 0 0 0.16 -1 -1 76.5 MiB 0.02 0.0414951 0.0361465 76.5 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_detailed_placer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_detailed_placer/config/golden_results.txt index e59d01b3795..9bc3116c877 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_detailed_placer/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/none_detailed_placer/config/golden_results.txt @@ -1,4 +1,4 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.23 vpr 74.45 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 81 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76232 9 19 897 28 0 597 109 16 16 256 -1 mcnc_medium -1 -1 -1 -1 -1 -1 -1 -1 74.4 MiB 1.93 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 74.4 MiB 1.93 74.4 MiB 1.44 13980 23.4564 3661 6.14262 3967 18277 723411 109638 1.05632e+07 4.36541e+06 1.26944e+06 4958.75 16 28900 206586 -1 6.68067 nan -103.979 -6.68067 0 0 0.19 -1 -1 74.4 MiB 0.26 0.111246 0.0995686 74.4 MiB -1 0.05 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.00 vpr 75.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 53 256 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77440 256 245 954 501 0 593 554 22 22 484 -1 mcnc_large -1 -1 -1 -1 -1 -1 -1 -1 75.6 MiB 0.40 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 75.6 MiB 0.40 75.6 MiB 0.38 11588 19.5413 3140 5.29511 2222 4779 316744 66420 2.15576e+07 2.85638e+06 1.49107e+06 3080.73 12 47664 245996 -1 5.87415 nan -919.091 -5.87415 0 0 0.27 -1 -1 75.6 MiB 0.15 0.0834843 0.0777053 75.6 MiB -1 0.07 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.17 vpr 75.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 87 41 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77188 41 35 1006 76 0 608 163 16 16 256 -1 mcnc_medium -1 -1 -1 -1 -1 -1 -1 -1 75.4 MiB 1.86 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 75.4 MiB 1.86 75.4 MiB 1.35 14800 24.3421 3955 6.50493 3799 17906 688546 108664 1.05632e+07 4.68878e+06 1.26944e+06 4958.75 17 28900 206586 -1 6.8204 nan -173.521 -6.8204 0 0 0.22 -1 -1 75.4 MiB 0.28 0.12506 0.111964 75.4 MiB -1 0.05 + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 4.91 vpr 74.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 9 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76164 9 19 897 28 0 553 108 16 16 256 -1 mcnc_medium -1 -1 -1 -1 -1 -1 -1 -1 74.4 MiB 1.81 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 74.4 MiB 1.81 74.4 MiB 1.37 13272 24.0435 3469 6.28442 3878 18598 715986 106519 1.05632e+07 4.31152e+06 1.26944e+06 4958.75 17 28900 206586 -1 6.45087 nan -103.767 -6.45087 0 0 0.19 -1 -1 74.4 MiB 0.26 0.112595 0.100491 74.4 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 1.97 vpr 75.29 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 60 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77096 256 245 954 501 0 598 561 22 22 484 -1 mcnc_large -1 -1 -1 -1 -1 -1 -1 -1 75.3 MiB 0.42 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 75.3 MiB 0.42 75.3 MiB 0.38 11212 18.7492 3056 5.11037 2113 4530 278846 60151 2.15576e+07 3.23364e+06 1.49107e+06 3080.73 12 47664 245996 -1 6.64463 nan -975.374 -6.64463 0 0 0.21 -1 -1 75.3 MiB 0.14 0.084613 0.0790408 75.3 MiB -1 0.07 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 4.85 vpr 75.37 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 85 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77176 41 35 1006 76 0 568 161 16 16 256 -1 mcnc_medium -1 -1 -1 -1 -1 -1 -1 -1 75.4 MiB 1.71 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 75.4 MiB 1.71 75.4 MiB 1.21 14272 25.1268 3820 6.72535 3679 18279 692666 109920 1.05632e+07 4.58099e+06 1.26944e+06 4958.75 17 28900 206586 -1 6.47993 nan -177.198 -6.47993 0 0 0.19 -1 -1 75.4 MiB 0.27 0.123284 0.110324 75.4 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/qp_hybrid_analytical_solver/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/qp_hybrid_analytical_solver/config/golden_results.txt index d2a0a509bc2..30011e0b715 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/qp_hybrid_analytical_solver/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/qp_hybrid_analytical_solver/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.03 vpr 74.23 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 82 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76012 9 19 897 28 0 622 110 16 16 256 -1 mcnc_medium -1 -1 10056 6578 8526 1277 4985 2264 74.2 MiB 1.85 0.01 6.41619 5.08637 -85.7733 -5.08637 nan 0.06 0.00194816 0.00154879 0.0785561 0.0654131 74.2 MiB 1.85 74.2 MiB 1.41 10963 17.6538 2801 4.51047 5304 23611 889251 144425 1.05632e+07 4.41931e+06 1.26944e+06 4958.75 22 28900 206586 -1 5.39096 nan -90.1072 -5.39096 0 0 0.20 -1 -1 74.2 MiB 0.37 0.221337 0.1915 74.2 MiB -1 0.05 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.46 vpr 75.64 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 56 256 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77460 256 245 954 501 0 593 557 22 22 484 -1 mcnc_large -1 -1 10436 8112 48647 751 10833 37063 75.6 MiB 0.70 0.01 5.73832 4.11614 -780.807 -4.11614 nan 0.08 0.00198971 0.00178092 0.0536461 0.0483129 75.6 MiB 0.70 75.6 MiB 0.40 10776 18.1720 2929 4.93929 2595 5686 344570 75131 2.15576e+07 3.01806e+06 1.49107e+06 3080.73 16 47664 245996 -1 4.53523 nan -842.42 -4.53523 0 0 0.23 -1 -1 75.6 MiB 0.17 0.153232 0.140665 75.6 MiB -1 0.08 - k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 16.99 vpr 102.32 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 291 10 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 104772 10 10 2659 20 0 1529 311 22 22 484 -1 mcnc_large -1 -1 38077 26865 59279 15488 38368 5423 102.3 MiB 6.54 0.02 9.34272 6.39935 -62.3114 -6.39935 nan 0.15 0.00543975 0.00423229 0.366486 0.296543 102.3 MiB 6.54 102.3 MiB 4.39 39907 26.1001 10095 6.60235 10028 54590 2425227 322477 2.15576e+07 1.56832e+07 3.51389e+06 7260.09 17 64568 594370 -1 6.88776 nan -64.9619 -6.88776 0 0 0.64 -1 -1 102.3 MiB 0.86 0.722489 0.612978 102.3 MiB -1 0.15 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 4.70 vpr 75.43 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 85 41 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77236 41 35 1006 76 0 667 161 16 16 256 -1 mcnc_medium -1 -1 11200 7059 10649 866 4653 5130 75.4 MiB 1.74 0.01 6.46459 5.0838 -144.876 -5.0838 nan 0.06 0.00215192 0.00170983 0.0745187 0.062897 75.4 MiB 1.74 75.4 MiB 1.30 10747 16.1124 2823 4.23238 4502 20055 655745 115195 1.05632e+07 4.58099e+06 1.26944e+06 4958.75 17 28900 206586 -1 5.53806 nan -153.338 -5.53806 0 0 0.20 -1 -1 75.4 MiB 0.26 0.198685 0.17393 75.4 MiB -1 0.05 + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 4.86 vpr 74.66 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 81 9 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76452 9 19 897 28 0 625 109 16 16 256 -1 mcnc_medium -1 -1 10323 6649 8689 1316 5113 2260 74.7 MiB 1.76 0.01 6.54619 5.17635 -85.9934 -5.17635 nan 0.05 0.00164315 0.00128057 0.0733612 0.0605987 74.7 MiB 1.76 74.7 MiB 1.32 10840 17.3718 2768 4.43590 5407 24284 870241 141685 1.05632e+07 4.36541e+06 1.26944e+06 4958.75 20 28900 206586 -1 5.42577 nan -88.8116 -5.42577 0 0 0.19 -1 -1 74.7 MiB 0.29 0.19409 0.166936 74.7 MiB -1 0.05 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.43 vpr 75.52 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 256 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77328 256 245 954 501 0 600 560 22 22 484 -1 mcnc_large -1 -1 10402 8307 53621 1204 10298 42119 75.5 MiB 0.68 0.01 6.38809 4.16523 -791.785 -4.16523 nan 0.07 0.00208179 0.00185463 0.0618928 0.0557901 75.5 MiB 0.68 75.5 MiB 0.38 11135 18.5583 3005 5.00833 2530 5567 337524 73209 2.15576e+07 3.17975e+06 1.49107e+06 3080.73 21 47664 245996 -1 4.4894 nan -841.028 -4.4894 0 0 0.21 -1 -1 75.5 MiB 0.19 0.179241 0.164601 75.5 MiB -1 0.07 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 17.75 vpr 102.67 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 288 10 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105136 10 10 2659 20 0 1538 308 22 22 484 -1 mcnc_large -1 -1 38253 26944 58492 15799 37362 5331 102.7 MiB 6.73 0.02 9.41303 6.40421 -62.5348 -6.40421 nan 0.17 0.00666069 0.00532918 0.430291 0.355679 102.7 MiB 6.73 102.7 MiB 4.45 40258 26.1756 10190 6.62549 10650 57950 2684197 344292 2.15576e+07 1.55215e+07 3.51389e+06 7260.09 18 64568 594370 -1 6.57818 nan -63.8839 -6.57818 0 0 0.64 -1 -1 102.7 MiB 1.04 0.843305 0.725958 102.7 MiB -1 0.17 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 4.78 vpr 75.54 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 84 41 -1 -1 success v8.0.0-12360-gc452b7d62-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-31T20:05:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77348 41 35 1006 76 0 665 160 16 16 256 -1 mcnc_medium -1 -1 11168 6794 11444 944 5497 5003 75.5 MiB 1.73 0.01 6.69562 4.81085 -140.774 -4.81085 nan 0.06 0.00183692 0.00145063 0.0754977 0.0634854 75.5 MiB 1.73 75.5 MiB 1.27 10731 16.1368 2840 4.27068 5065 23288 779371 134867 1.05632e+07 4.5271e+06 1.26944e+06 4958.75 20 28900 206586 -1 5.06219 nan -147.938 -5.06219 0 0 0.19 -1 -1 75.5 MiB 0.30 0.209884 0.182524 75.5 MiB -1 0.06 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/unrelated_clustering/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/unrelated_clustering/config/golden_results.txt index d625ba88e73..21279f9641b 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/unrelated_clustering/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/unrelated_clustering/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 5.77 vpr 74.67 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 9 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 76464 9 19 897 28 0 597 108 16 16 256 -1 mcnc_medium -1 -1 10024 6243 10131 1651 5757 2723 74.7 MiB 2.28 0.01 6.8229 5.32682 -83.6615 -5.32682 nan 0.05 0.00206038 0.0017022 0.093723 0.0780954 74.7 MiB 2.28 74.7 MiB 1.46 10181 17.0822 2628 4.40940 4073 18938 640743 107003 1.05632e+07 4.31152e+06 1.26944e+06 4958.75 18 28900 206586 -1 5.59905 nan -87.7508 -5.59905 0 0 0.19 -1 -1 74.7 MiB 0.25 0.211734 0.183658 74.7 MiB -1 0.05 - k6_frac_N10_40nm.xml des.pre-vpr.blif common 2.37 vpr 75.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 53 256 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77312 256 245 954 501 0 593 554 22 22 484 -1 mcnc_large -1 -1 8941 7709 48308 545 10829 36934 75.5 MiB 0.68 0.01 5.66617 3.99454 -785.516 -3.99454 nan 0.07 0.00214511 0.00191149 0.0563332 0.0508773 75.5 MiB 0.68 75.5 MiB 0.38 10388 17.5177 2832 4.77572 2536 5560 327505 71090 2.15576e+07 2.85638e+06 1.49107e+06 3080.73 13 47664 245996 -1 4.33616 nan -833.917 -4.33616 0 0 0.22 -1 -1 75.5 MiB 0.16 0.145988 0.134526 75.5 MiB -1 0.07 - k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 20.89 vpr 103.10 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 270 10 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 105576 10 10 2659 20 0 1302 290 22 22 484 -1 mcnc_large -1 -1 34981 24734 53035 14175 34471 4389 103.1 MiB 8.38 0.03 9.51463 6.78204 -63.5715 -6.78204 nan 0.17 0.00699229 0.0056263 0.426271 0.351528 103.1 MiB 8.38 103.1 MiB 4.63 37980 29.1705 9624 7.39171 9046 58238 2480633 325086 2.15576e+07 1.45514e+07 3.51389e+06 7260.09 18 64568 594370 -1 6.90493 nan -65.9192 -6.90493 0 0 0.66 -1 -1 103.1 MiB 0.97 0.81562 0.700145 103.1 MiB -1 0.16 - k6_frac_N10_40nm.xml seq.pre-vpr.blif common 5.71 vpr 75.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 87 41 -1 -1 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 77664 41 35 1006 76 0 608 163 16 16 256 -1 mcnc_medium -1 -1 10722 6733 9953 785 4940 4228 75.8 MiB 2.14 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num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time initial_placed_wirelength_est placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time initial_placed_CPD_est placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time - k6_frac_N10_frac_chain_mem32K_40nm.xml boundtop.v common 15.02 vpr 82.50 MiB -1 -1 10.13 48012 3 0.64 -1 -1 38596 -1 -1 47 196 1 0 success v8.0.0-12327-g1464a722e-dirty release VTR_ASSERT_LEVEL=3 GNU 13.2.0 on Linux-6.8.0-49-generic x86_64 2025-03-22T16:35:43 srivatsan-Precision-Tower-5810 /home/alex/vtr-verilog-to-routing 84484 196 193 800 389 1 590 437 20 20 400 -1 vtr_extra_small -1 -1 7934 4257 45176 1066 12361 31749 82.5 MiB 1.47 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