diff --git a/.clang-format b/.clang-format index fa6b26413d0..9dc66c3ec19 100644 --- a/.clang-format +++ b/.clang-format @@ -11,7 +11,7 @@ AllowAllParametersOfDeclarationOnNextLine: false AllowShortBlocksOnASingleLine: true AllowShortCaseLabelsOnASingleLine: false AllowShortFunctionsOnASingleLine: true -AllowShortIfStatementsOnASingleLine: true +AllowShortIfStatementsOnASingleLine: false AllowShortLoopsOnASingleLine: false AlwaysBreakAfterDefinitionReturnType: None AlwaysBreakAfterReturnType: None @@ -42,7 +42,7 @@ BreakConstructorInitializersBeforeComma: false BreakConstructorInitializers: BeforeComma BreakAfterJavaFieldAnnotations: false BreakStringLiterals: true -ColumnLimit: 0 +ColumnLimit: 120 CommentPragmas: '^ IWYU pragma:' CompactNamespaces: false ConstructorInitializerAllOnOneLineOrOnePerLine: false @@ -68,7 +68,7 @@ IncludeIsMainRegex: '([-_](test|unittest))?$' IndentCaseLabels: true IndentWidth: 4 IndentWrappedFunctionNames: false -IndentPPDirectives: AfterHash +IndentPPDirectives: None JavaScriptQuotes: Leave JavaScriptWrapImports: true KeepEmptyLinesAtTheStartOfBlocks: false diff --git a/.github/workflows/test.yml b/.github/workflows/test.yml index 51f60a84925..95a6e7237b8 100644 --- a/.github/workflows/test.yml +++ b/.github/workflows/test.yml @@ -87,6 +87,8 @@ jobs: with: python-version: 3.10.10 - uses: actions/checkout@v4 + with: + submodules: 'true' - name: Install dependencies run: ./.github/scripts/install_dependencies.sh diff --git a/libs/libarchfpga/src/arch_check.cpp b/libs/libarchfpga/src/arch_check.cpp index 022e2d57ded..3176ace441b 100644 --- a/libs/libarchfpga/src/arch_check.cpp +++ b/libs/libarchfpga/src/arch_check.cpp @@ -20,8 +20,7 @@ bool check_model_clocks(t_model* model, const char* file, uint32_t line) { for (t_model_ports* ports : {model->inputs, model->outputs}) { for (t_model_ports* port = ports; port != nullptr; port = port->next) { if (!port->clock.empty() && !clocks.count(port->clock)) { - archfpga_throw(file, line, - "No matching clock port '%s' on model '%s', required for port '%s'", + archfpga_throw(file, line, "No matching clock port '%s' on model '%s', required for port '%s'", port->clock.c_str(), model->name, port->name); } } @@ -33,9 +32,8 @@ bool check_model_combinational_sinks(const t_model* model, const char* file, uin //Outputs should have no combinational sinks for (t_model_ports* port = model->outputs; port != nullptr; port = port->next) { if (port->combinational_sink_ports.size() != 0) { - archfpga_throw(file, line, - "Model '%s' output port '%s' can not have combinational sink ports", - model->name, port->name); + archfpga_throw(file, line, "Model '%s' output port '%s' can not have combinational sink ports", model->name, + port->name); } } @@ -50,7 +48,8 @@ bool check_model_combinational_sinks(const t_model* model, const char* file, uin //Check that the input port combinational sinks are all outputs if (!output_ports.count(sink_port_name)) { archfpga_throw(file, line, - "Model '%s' input port '%s' can not be combinationally connected to '%s' (not an output port of the model)", + "Model '%s' input port '%s' can not be combinationally connected to '%s' (not an output " + "port of the model)", model->name, port->name, sink_port_name.c_str()); } @@ -78,7 +77,9 @@ void warn_model_missing_timing(const t_model* model, const char* file, uint32_t && !port->is_clock //Not an input clock ) { VTR_LOGF_WARN(file, line, - "Model '%s' input port '%s' has no timing specification (no clock specified to create a sequential input port, not combinationally connected to any outputs, not a clock input)\n", model->name, port->name); + "Model '%s' input port '%s' has no timing specification (no clock specified to create a " + "sequential input port, not combinationally connected to any outputs, not a clock input)\n", + model->name, port->name); } comb_connected_outputs.insert(port->combinational_sink_ports.begin(), port->combinational_sink_ports.end()); @@ -90,17 +91,20 @@ void warn_model_missing_timing(const t_model* model, const char* file, uint32_t && !port->is_clock //Not an output clock ) { VTR_LOGF_WARN(file, line, - "Model '%s' output port '%s' has no timing specification (no clock specified to create a sequential output port, not combinationally connected to any inputs, not a clock output)\n", model->name, port->name); + "Model '%s' output port '%s' has no timing specification (no clock specified to create a " + "sequential output port, not combinationally connected to any inputs, not a clock output)\n", + model->name, port->name); } } } -void check_port_direct_mappings(t_physical_tile_type_ptr physical_tile, t_sub_tile* sub_tile, t_logical_block_type_ptr logical_block) { +void check_port_direct_mappings(t_physical_tile_type_ptr physical_tile, + t_sub_tile* sub_tile, + t_logical_block_type_ptr logical_block) { auto pb_type = logical_block->pb_type; if (pb_type->num_pins > (sub_tile->num_phy_pins / sub_tile->capacity.total())) { - archfpga_throw(__FILE__, __LINE__, - "Logical Block (%s) has more pins than the Sub Tile (%s).\n", + archfpga_throw(__FILE__, __LINE__, "Logical Block (%s) has more pins than the Sub Tile (%s).\n", logical_block->name, sub_tile->name); } @@ -108,8 +112,7 @@ void check_port_direct_mappings(t_physical_tile_type_ptr physical_tile, t_sub_ti auto pin_direct_map = pin_direct_maps.at(sub_tile->index); if (pb_type->num_pins != (int)pin_direct_map.size()) { - archfpga_throw(__FILE__, __LINE__, - "Logical block (%s) and Sub tile (%s) have a different number of ports.\n", + archfpga_throw(__FILE__, __LINE__, "Logical block (%s) and Sub tile (%s) have a different number of ports.\n", logical_block->name, physical_tile->name); } @@ -121,11 +124,11 @@ void check_port_direct_mappings(t_physical_tile_type_ptr physical_tile, t_sub_ti VTR_ASSERT(block_port != nullptr); VTR_ASSERT(sub_tile_port != nullptr); - if (sub_tile_port->type != block_port->type - || sub_tile_port->num_pins != block_port->num_pins + if (sub_tile_port->type != block_port->type || sub_tile_port->num_pins != block_port->num_pins || sub_tile_port->equivalent != block_port->equivalent) { archfpga_throw(__FILE__, __LINE__, - "Logical block (%s) and Physical tile (%s) do not have equivalent port specifications. Sub tile port %s, logical block port %s\n", + "Logical block (%s) and Physical tile (%s) do not have equivalent port specifications. Sub " + "tile port %s, logical block port %s\n", logical_block->name, sub_tile->name, sub_tile_port->name, block_port->name); } } @@ -157,8 +160,7 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar } } if (model == nullptr) { - archfpga_throw(get_arch_file_name(), -1, - "Unable to find model for blif_model '%s' found on pb_type '%s'", + archfpga_throw(get_arch_file_name(), -1, "Unable to find model for blif_model '%s' found on pb_type '%s'", blif_model.c_str(), pb_type->name); } @@ -192,7 +194,8 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar break; } } - if (model_port != nullptr) break; + if (model_port != nullptr) + break; } if (model_port == nullptr) { archfpga_throw(get_arch_file_name(), annot->line_num, @@ -204,15 +207,19 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar std::string model_clock = model_port->clock; if (model_clock.empty()) { archfpga_throw(get_arch_file_name(), annot->line_num, - " timing-annotation/ mismatch on port '%s' of model '%s', model specifies" + " timing-annotation/ mismatch on port '%s' of model '%s', " + "model specifies" " no clock but timing annotation specifies '%s'", - annot_port.port_name().c_str(), model->name, annot_clock.port_name().c_str()); + annot_port.port_name().c_str(), model->name, + annot_clock.port_name().c_str()); } if (model_port->clock != annot_clock.port_name()) { archfpga_throw(get_arch_file_name(), annot->line_num, - " timing-annotation/ mismatch on port '%s' of model '%s', model specifies" + " timing-annotation/ mismatch on port '%s' of model '%s', " + "model specifies" " clock as '%s' but timing annotation specifies '%s'", - annot_port.port_name().c_str(), model->name, model_clock.c_str(), annot_clock.port_name().c_str()); + annot_port.port_name().c_str(), model->name, model_clock.c_str(), + annot_clock.port_name().c_str()); } } } @@ -246,8 +253,10 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar auto iter = std::find(b, e, annot_out.port_name()); if (iter == e) { archfpga_throw(get_arch_file_name(), annot->line_num, - " timing-annotation/ mismatch on port '%s' of model '%s', timing annotation" - " specifies combinational connection to port '%s' but the connection does not exist in the model", + " timing-annotation/ mismatch on port '%s' of model '%s', " + "timing annotation" + " specifies combinational connection to port '%s' but the connection does " + "not exist in the model", model_port->name, model->name, annot_out.port_name().c_str()); } } @@ -262,7 +271,8 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar std::set comb_connected_outputs; for (t_model_ports* model_ports : {model->inputs, model->outputs}) { for (t_model_ports* model_port = model_ports; model_port != nullptr; model_port = model_port->next) { - comb_connected_outputs.insert(model_port->combinational_sink_ports.begin(), model_port->combinational_sink_ports.end()); + comb_connected_outputs.insert(model_port->combinational_sink_ports.begin(), + model_port->combinational_sink_ports.end()); } } @@ -273,8 +283,7 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar for (t_model_ports* model_ports : {model->inputs, model->outputs}) { for (t_model_ports* model_port = model_ports; model_port != nullptr; model_port = model_port->next) { //If the model port has no timing specification don't check anything (e.g. architectures with no timing info) - if (model_port->clock.empty() - && model_port->combinational_sink_ports.empty() + if (model_port->clock.empty() && model_port->combinational_sink_ports.empty() && !comb_connected_outputs.count(model_port->name)) { continue; } @@ -301,8 +310,10 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar if (!model_port->combinational_sink_ports.empty()) { //Sequential input with internal combinational connectsion it must also have T_clock_to_Q - if (find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MAX) == nullptr - && find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN) == nullptr) { + if (find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MAX) + == nullptr + && find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN) + == nullptr) { std::stringstream msg; msg << " '" << pb_type->name << "' timing-annotation/ mismatch on"; msg << " port '" << model_port->name << "' of model '" << model->name << "',"; @@ -321,8 +332,10 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar } else { VTR_ASSERT(model_port->dir == OUT_PORT); //Sequential outputs must have T_clock_to_Q - if (find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MAX) == nullptr - && find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN) == nullptr) { + if (find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MAX) + == nullptr + && find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN) + == nullptr) { std::stringstream msg; msg << " '" << pb_type->name << "' timing-annotation/ mismatch on"; msg << " port '" << model_port->name << "' of model '" << model->name << "',"; @@ -339,7 +352,8 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar if (comb_connected_outputs.count(model_port->name)) { //Sequential output with internal combinational connectison must have T_setup/T_hold if (find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_TSETUP) == nullptr - && find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_THOLD) == nullptr) { + && find_sequential_annotation(pb_type, model_port, E_ANNOT_PIN_TO_PIN_DELAY_THOLD) + == nullptr) { std::stringstream msg; msg << " '" << pb_type->name << "' timing-annotation/ mismatch on"; msg << " port '" << model_port->name << "' of model '" << model->name << "',"; @@ -365,7 +379,8 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar msg << " '" << pb_type->name << "' timing-annotation/ mismatch on"; msg << " port '" << model_port->name << "' of model '" << model->name << "',"; msg << " input port '" << model_port->name << "' has combinational connections to"; - msg << " port '" << sink_port.c_str() << "'; specified in model, but no combinational delays found on pb_type"; + msg << " port '" << sink_port.c_str() + << "'; specified in model, but no combinational delays found on pb_type"; if (is_library_model(model)) { //Only warn if timing info is missing from a library model (e.g. .names/.latch on a non-timing architecture) @@ -385,8 +400,7 @@ bool check_leaf_pb_model_timing_consistency(const t_pb_type* pb_type, const t_ar void check_models(t_arch* arch) { for (t_model* model = arch->models; model != nullptr; model = model->next) { if (model->pb_types == nullptr) { - archfpga_throw(get_arch_file_name(), 0, - "No pb_type found for model %s\n", model->name); + archfpga_throw(get_arch_file_name(), 0, "No pb_type found for model %s\n", model->name); } int clk_count, input_count, output_count; @@ -402,8 +416,8 @@ void check_models(t_arch* arch) { index = output_count++; break; default: - archfpga_throw(get_arch_file_name(), 0, - "Port %s of model %s, has an unrecognized type %s\n", port->name, model->name); + archfpga_throw(get_arch_file_name(), 0, "Port %s of model %s, has an unrecognized type %s\n", + port->name, model->name); } port->index = index; diff --git a/libs/libarchfpga/src/arch_check.h b/libs/libarchfpga/src/arch_check.h index 20b3ad30d4b..eb57e64256b 100644 --- a/libs/libarchfpga/src/arch_check.h +++ b/libs/libarchfpga/src/arch_check.h @@ -56,7 +56,9 @@ void warn_model_missing_timing(const t_model* model, const char* file, uint32_t * @param sub_tile sub tile to check * @param logical_block logical block type */ -void check_port_direct_mappings(t_physical_tile_type_ptr physical_tile, t_sub_tile* sub_tile, t_logical_block_type_ptr logical_block); +void check_port_direct_mappings(t_physical_tile_type_ptr physical_tile, + t_sub_tile* sub_tile, + t_logical_block_type_ptr logical_block); /** * @brief Checks the timing consistency between tha pb_type and the corresponding model. diff --git a/libs/libarchfpga/src/arch_util.cpp b/libs/libarchfpga/src/arch_util.cpp index e77c70f5ed6..77b7a64b749 100644 --- a/libs/libarchfpga/src/arch_util.cpp +++ b/libs/libarchfpga/src/arch_util.cpp @@ -24,9 +24,7 @@ static void free_pb_type(t_pb_type* pb_type); * all architecture-parser functions */ static const char* arch_file_name = nullptr; -void set_arch_file_name(const char* arch) { - arch_file_name = arch; -} +void set_arch_file_name(const char* arch) { arch_file_name = arch; } /* Used by functions outside read_xml_util.c to gain access to arch filename */ const char* get_arch_file_name() { @@ -46,8 +44,7 @@ InstPort::InstPort(const std::string& str) { instance_ = parse_name_index(inst_port[0]); port_ = parse_name_index(inst_port[1]); } else { - std::string msg = vtr::string_fmt("Failed to parse instance port specification '%s'", - str.c_str()); + std::string msg = vtr::string_fmt("Failed to parse instance port specification '%s'", str.c_str()); throw ArchFpgaError(msg); } } @@ -91,7 +88,8 @@ InstPort::name_index InstPort::parse_name_index(const std::string& str) { std::string first_idx_str; std::string second_idx_str; - if (colon_pos == std::string::npos && open_bracket_pos == std::string::npos && close_bracket_pos == std::string::npos) { + if (colon_pos == std::string::npos && open_bracket_pos == std::string::npos + && close_bracket_pos == std::string::npos) { } else if (colon_pos == std::string::npos) { //No colon, implies a single element first_idx_str = str.substr(open_bracket_pos + 1, close_bracket_pos); @@ -213,7 +211,8 @@ void free_arch_models(t_model* models) { //Frees the specified model, and returns the next model (if any) in the linked list t_model* free_arch_model(t_model* model) { - if (!model) return nullptr; + if (!model) + return nullptr; t_model* next_model = model->next; @@ -245,7 +244,8 @@ void free_arch_model_ports(t_model_ports* model_ports) { //Frees the specified model_port, and returns the next model_port (if any) in the linked list t_model_ports* free_arch_model_port(t_model_ports* model_port) { - if (!model_port) return nullptr; + if (!model_port) + return nullptr; t_model_ports* next_port = model_port->next; @@ -354,7 +354,8 @@ static void free_pb_graph(t_pb_graph_node* pb_graph_node) { if (pb_graph_node->interconnect_pins) { for (i = 0; i < pb_graph_node->pb_type->num_modes; i++) { - if (pb_graph_node->interconnect_pins[i] == nullptr) continue; + if (pb_graph_node->interconnect_pins[i] == nullptr) + continue; t_mode* mode = &pb_graph_node->pb_type->modes[i]; @@ -486,8 +487,7 @@ t_port* findPortByName(const char* name, t_pb_type* pb_type, int* high_index, in for (i = 0; i < pb_type->num_ports; i++) { char* compare_to = pb_type->ports[i].name; - if (strlen(compare_to) == bracket_pos - && strncmp(name, compare_to, bracket_pos) == 0) { + if (strlen(compare_to) == bracket_pos && strncmp(name, compare_to, bracket_pos) == 0) { port = &pb_type->ports[i]; break; } @@ -558,9 +558,7 @@ std::unordered_set get_equivalent_sites_set(t_physical return equivalent_sites; } -void alloc_and_load_default_child_for_pb_type(t_pb_type* pb_type, - char* new_name, - t_pb_type* copy) { +void alloc_and_load_default_child_for_pb_type(t_pb_type* pb_type, char* new_name, t_pb_type* copy) { int i, j; char* dot; @@ -580,8 +578,7 @@ void alloc_and_load_default_child_for_pb_type(t_pb_type* pb_type, copy->num_pb = 1; /* Power */ - copy->pb_type_power = (t_pb_type_power*)vtr::calloc(1, - sizeof(t_pb_type_power)); + copy->pb_type_power = (t_pb_type_power*)vtr::calloc(1, sizeof(t_pb_type_power)); copy->pb_type_power->estimation_method = power_method_inherited(pb_type->pb_type_power->estimation_method); /* Ports */ @@ -599,20 +596,19 @@ void alloc_and_load_default_child_for_pb_type(t_pb_type* pb_type, copy->ports[i].index = pb_type->ports[i].index; copy->ports[i].absolute_first_pin_index = pb_type->ports[i].absolute_first_pin_index; - copy->ports[i].port_power = (t_port_power*)vtr::calloc(1, - sizeof(t_port_power)); + copy->ports[i].port_power = (t_port_power*)vtr::calloc(1, sizeof(t_port_power)); //Defaults if (copy->pb_type_power->estimation_method == POWER_METHOD_AUTO_SIZES) { copy->ports[i].port_power->wire_type = POWER_WIRE_TYPE_AUTO; copy->ports[i].port_power->buffer_type = POWER_BUFFER_TYPE_AUTO; - } else if (copy->pb_type_power->estimation_method - == POWER_METHOD_SPECIFY_SIZES) { + } else if (copy->pb_type_power->estimation_method == POWER_METHOD_SPECIFY_SIZES) { copy->ports[i].port_power->wire_type = POWER_WIRE_TYPE_IGNORED; copy->ports[i].port_power->buffer_type = POWER_BUFFER_TYPE_NONE; } } - copy->annotations = (t_pin_to_pin_annotation*)vtr::calloc(pb_type->num_annotations, sizeof(t_pin_to_pin_annotation)); + copy->annotations + = (t_pin_to_pin_annotation*)vtr::calloc(pb_type->num_annotations, sizeof(t_pin_to_pin_annotation)); copy->num_annotations = pb_type->num_annotations; for (i = 0; i < copy->num_annotations; i++) { copy->annotations[i].clock = vtr::strdup(pb_type->annotations[i].clock); @@ -665,8 +661,7 @@ void ProcessLutClass(t_pb_type* lut_pb_type) { lut_pb_type->modes[0].parent_pb_type = lut_pb_type; lut_pb_type->modes[0].index = 0; lut_pb_type->modes[0].num_pb_type_children = 0; - lut_pb_type->modes[0].mode_power = (t_mode_power*)vtr::calloc(1, - sizeof(t_mode_power)); + lut_pb_type->modes[0].mode_power = (t_mode_power*)vtr::calloc(1, sizeof(t_mode_power)); /* Process interconnect */ /* TODO: add timing annotations to route-through */ @@ -684,41 +679,42 @@ void ProcessLutClass(t_pb_type* lut_pb_type) { lut_pb_type->modes[0].num_interconnect = 1; lut_pb_type->modes[0].interconnect = new t_interconnect[1]; lut_pb_type->modes[0].interconnect[0].name = (char*)vtr::calloc(strlen(lut_pb_type->name) + 10, sizeof(char)); - sprintf(lut_pb_type->modes[0].interconnect[0].name, "complete:%s", - lut_pb_type->name); + sprintf(lut_pb_type->modes[0].interconnect[0].name, "complete:%s", lut_pb_type->name); lut_pb_type->modes[0].interconnect[0].type = COMPLETE_INTERC; - lut_pb_type->modes[0].interconnect[0].input_string = (char*)vtr::calloc(strlen(lut_pb_type->name) + strlen(in_port->name) + 2, - sizeof(char)); - sprintf(lut_pb_type->modes[0].interconnect[0].input_string, "%s.%s", - lut_pb_type->name, in_port->name); - lut_pb_type->modes[0].interconnect[0].output_string = (char*)vtr::calloc(strlen(lut_pb_type->name) + strlen(out_port->name) + 2, - sizeof(char)); - sprintf(lut_pb_type->modes[0].interconnect[0].output_string, "%s.%s", - lut_pb_type->name, out_port->name); + lut_pb_type->modes[0].interconnect[0].input_string + = (char*)vtr::calloc(strlen(lut_pb_type->name) + strlen(in_port->name) + 2, sizeof(char)); + sprintf(lut_pb_type->modes[0].interconnect[0].input_string, "%s.%s", lut_pb_type->name, in_port->name); + lut_pb_type->modes[0].interconnect[0].output_string + = (char*)vtr::calloc(strlen(lut_pb_type->name) + strlen(out_port->name) + 2, sizeof(char)); + sprintf(lut_pb_type->modes[0].interconnect[0].output_string, "%s.%s", lut_pb_type->name, out_port->name); lut_pb_type->modes[0].interconnect[0].parent_mode_index = 0; lut_pb_type->modes[0].interconnect[0].parent_mode = &lut_pb_type->modes[0]; - lut_pb_type->modes[0].interconnect[0].interconnect_power = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); + lut_pb_type->modes[0].interconnect[0].interconnect_power + = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); - lut_pb_type->modes[0].interconnect[0].annotations = (t_pin_to_pin_annotation*)vtr::calloc(lut_pb_type->num_annotations, - sizeof(t_pin_to_pin_annotation)); + lut_pb_type->modes[0].interconnect[0].annotations + = (t_pin_to_pin_annotation*)vtr::calloc(lut_pb_type->num_annotations, sizeof(t_pin_to_pin_annotation)); lut_pb_type->modes[0].interconnect[0].num_annotations = lut_pb_type->num_annotations; - for (i = 0; i < lut_pb_type->modes[0].interconnect[0].num_annotations; - i++) { + for (i = 0; i < lut_pb_type->modes[0].interconnect[0].num_annotations; i++) { lut_pb_type->modes[0].interconnect[0].annotations[i].clock = vtr::strdup(lut_pb_type->annotations[i].clock); - lut_pb_type->modes[0].interconnect[0].annotations[i].input_pins = vtr::strdup(lut_pb_type->annotations[i].input_pins); - lut_pb_type->modes[0].interconnect[0].annotations[i].output_pins = vtr::strdup(lut_pb_type->annotations[i].output_pins); + lut_pb_type->modes[0].interconnect[0].annotations[i].input_pins + = vtr::strdup(lut_pb_type->annotations[i].input_pins); + lut_pb_type->modes[0].interconnect[0].annotations[i].output_pins + = vtr::strdup(lut_pb_type->annotations[i].output_pins); lut_pb_type->modes[0].interconnect[0].annotations[i].line_num = lut_pb_type->annotations[i].line_num; lut_pb_type->modes[0].interconnect[0].annotations[i].format = lut_pb_type->annotations[i].format; lut_pb_type->modes[0].interconnect[0].annotations[i].type = lut_pb_type->annotations[i].type; - lut_pb_type->modes[0].interconnect[0].annotations[i].num_value_prop_pairs = lut_pb_type->annotations[i].num_value_prop_pairs; - lut_pb_type->modes[0].interconnect[0].annotations[i].prop = (int*)vtr::malloc(sizeof(int) - * lut_pb_type->annotations[i].num_value_prop_pairs); - lut_pb_type->modes[0].interconnect[0].annotations[i].value = (char**)vtr::malloc(sizeof(char*) - * lut_pb_type->annotations[i].num_value_prop_pairs); + lut_pb_type->modes[0].interconnect[0].annotations[i].num_value_prop_pairs + = lut_pb_type->annotations[i].num_value_prop_pairs; + lut_pb_type->modes[0].interconnect[0].annotations[i].prop + = (int*)vtr::malloc(sizeof(int) * lut_pb_type->annotations[i].num_value_prop_pairs); + lut_pb_type->modes[0].interconnect[0].annotations[i].value + = (char**)vtr::malloc(sizeof(char*) * lut_pb_type->annotations[i].num_value_prop_pairs); for (j = 0; j < lut_pb_type->annotations[i].num_value_prop_pairs; j++) { lut_pb_type->modes[0].interconnect[0].annotations[i].prop[j] = lut_pb_type->annotations[i].prop[j]; - lut_pb_type->modes[0].interconnect[0].annotations[i].value[j] = vtr::strdup(lut_pb_type->annotations[i].value[j]); + lut_pb_type->modes[0].interconnect[0].annotations[i].value[j] + = vtr::strdup(lut_pb_type->annotations[i].value[j]); } } @@ -728,11 +724,9 @@ void ProcessLutClass(t_pb_type* lut_pb_type) { lut_pb_type->modes[1].parent_pb_type = lut_pb_type; lut_pb_type->modes[1].index = 1; lut_pb_type->modes[1].num_pb_type_children = 1; - lut_pb_type->modes[1].mode_power = (t_mode_power*)vtr::calloc(1, - sizeof(t_mode_power)); + lut_pb_type->modes[1].mode_power = (t_mode_power*)vtr::calloc(1, sizeof(t_mode_power)); lut_pb_type->modes[1].pb_type_children = new t_pb_type[1]; - alloc_and_load_default_child_for_pb_type(lut_pb_type, default_name, - lut_pb_type->modes[1].pb_type_children); + alloc_and_load_default_child_for_pb_type(lut_pb_type, default_name, lut_pb_type->modes[1].pb_type_children); /* moved annotations to child so delete old annotations */ for (i = 0; i < lut_pb_type->num_annotations; i++) { for (j = 0; j < lut_pb_type->annotations[i].num_value_prop_pairs; j++) { @@ -765,40 +759,37 @@ void ProcessLutClass(t_pb_type* lut_pb_type) { lut_pb_type->modes[1].num_interconnect = 2; lut_pb_type->modes[1].interconnect = new t_interconnect[lut_pb_type->modes[1].num_interconnect]; lut_pb_type->modes[1].interconnect[0].name = (char*)vtr::calloc(strlen(lut_pb_type->name) + 10, sizeof(char)); - sprintf(lut_pb_type->modes[1].interconnect[0].name, "direct:%s", - lut_pb_type->name); + sprintf(lut_pb_type->modes[1].interconnect[0].name, "direct:%s", lut_pb_type->name); lut_pb_type->modes[1].interconnect[0].type = DIRECT_INTERC; - lut_pb_type->modes[1].interconnect[0].input_string = (char*)vtr::calloc(strlen(lut_pb_type->name) + strlen(in_port->name) + 2, - sizeof(char)); - sprintf(lut_pb_type->modes[1].interconnect[0].input_string, "%s.%s", - lut_pb_type->name, in_port->name); - lut_pb_type->modes[1].interconnect[0].output_string = (char*)vtr::calloc(strlen(default_name) + strlen(in_port->name) + 2, sizeof(char)); - sprintf(lut_pb_type->modes[1].interconnect[0].output_string, "%s.%s", - default_name, in_port->name); + lut_pb_type->modes[1].interconnect[0].input_string + = (char*)vtr::calloc(strlen(lut_pb_type->name) + strlen(in_port->name) + 2, sizeof(char)); + sprintf(lut_pb_type->modes[1].interconnect[0].input_string, "%s.%s", lut_pb_type->name, in_port->name); + lut_pb_type->modes[1].interconnect[0].output_string + = (char*)vtr::calloc(strlen(default_name) + strlen(in_port->name) + 2, sizeof(char)); + sprintf(lut_pb_type->modes[1].interconnect[0].output_string, "%s.%s", default_name, in_port->name); lut_pb_type->modes[1].interconnect[0].infer_annotations = true; lut_pb_type->modes[1].interconnect[0].parent_mode_index = 1; lut_pb_type->modes[1].interconnect[0].parent_mode = &lut_pb_type->modes[1]; - lut_pb_type->modes[1].interconnect[0].interconnect_power = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); + lut_pb_type->modes[1].interconnect[0].interconnect_power + = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); lut_pb_type->modes[1].interconnect[1].name = (char*)vtr::calloc(strlen(lut_pb_type->name) + 11, sizeof(char)); - sprintf(lut_pb_type->modes[1].interconnect[1].name, "direct:%s", - lut_pb_type->name); + sprintf(lut_pb_type->modes[1].interconnect[1].name, "direct:%s", lut_pb_type->name); lut_pb_type->modes[1].interconnect[1].type = DIRECT_INTERC; - lut_pb_type->modes[1].interconnect[1].input_string = (char*)vtr::calloc(strlen(default_name) + strlen(out_port->name) + 4, sizeof(char)); - sprintf(lut_pb_type->modes[1].interconnect[1].input_string, "%s.%s", - default_name, out_port->name); - lut_pb_type->modes[1].interconnect[1].output_string = (char*)vtr::calloc(strlen(lut_pb_type->name) + strlen(out_port->name) - + strlen(in_port->name) + 2, - sizeof(char)); - sprintf(lut_pb_type->modes[1].interconnect[1].output_string, "%s.%s", - lut_pb_type->name, out_port->name); + lut_pb_type->modes[1].interconnect[1].input_string + = (char*)vtr::calloc(strlen(default_name) + strlen(out_port->name) + 4, sizeof(char)); + sprintf(lut_pb_type->modes[1].interconnect[1].input_string, "%s.%s", default_name, out_port->name); + lut_pb_type->modes[1].interconnect[1].output_string = (char*)vtr::calloc( + strlen(lut_pb_type->name) + strlen(out_port->name) + strlen(in_port->name) + 2, sizeof(char)); + sprintf(lut_pb_type->modes[1].interconnect[1].output_string, "%s.%s", lut_pb_type->name, out_port->name); lut_pb_type->modes[1].interconnect[1].infer_annotations = true; lut_pb_type->modes[1].interconnect[1].parent_mode_index = 1; lut_pb_type->modes[1].interconnect[1].parent_mode = &lut_pb_type->modes[1]; - lut_pb_type->modes[1].interconnect[1].interconnect_power = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); + lut_pb_type->modes[1].interconnect[1].interconnect_power + = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); free(default_name); @@ -823,28 +814,23 @@ void ProcessMemoryClass(t_pb_type* mem_pb_type) { mem_pb_type->modes[0].name = vtr::strdup(default_name); mem_pb_type->modes[0].parent_pb_type = mem_pb_type; mem_pb_type->modes[0].index = 0; - mem_pb_type->modes[0].mode_power = (t_mode_power*)vtr::calloc(1, - sizeof(t_mode_power)); + mem_pb_type->modes[0].mode_power = (t_mode_power*)vtr::calloc(1, sizeof(t_mode_power)); num_pb = OPEN; for (i = 0; i < mem_pb_type->num_ports; i++) { if (mem_pb_type->ports[i].port_class != nullptr - && strstr(mem_pb_type->ports[i].port_class, "data") - == mem_pb_type->ports[i].port_class) { + && strstr(mem_pb_type->ports[i].port_class, "data") == mem_pb_type->ports[i].port_class) { if (num_pb == OPEN) { num_pb = mem_pb_type->ports[i].num_pins; } else if (num_pb != mem_pb_type->ports[i].num_pins) { - archfpga_throw(get_arch_file_name(), 0, - "memory %s has inconsistent number of data bits %d and %d\n", - mem_pb_type->name, num_pb, - mem_pb_type->ports[i].num_pins); + archfpga_throw(get_arch_file_name(), 0, "memory %s has inconsistent number of data bits %d and %d\n", + mem_pb_type->name, num_pb, mem_pb_type->ports[i].num_pins); } } } mem_pb_type->modes[0].num_pb_type_children = 1; mem_pb_type->modes[0].pb_type_children = new t_pb_type[1]; - alloc_and_load_default_child_for_pb_type(mem_pb_type, default_name, - &mem_pb_type->modes[0].pb_type_children[0]); + alloc_and_load_default_child_for_pb_type(mem_pb_type, default_name, &mem_pb_type->modes[0].pb_type_children[0]); mem_pb_type->modes[0].pb_type_children[0].depth = mem_pb_type->depth + 1; mem_pb_type->modes[0].pb_type_children[0].parent_mode = &mem_pb_type->modes[0]; mem_pb_type->modes[0].pb_type_children[0].num_pb = num_pb; @@ -879,11 +865,9 @@ void ProcessMemoryClass(t_pb_type* mem_pb_type) { } if (mem_pb_type->ports[i].port_class != nullptr - && strstr(mem_pb_type->ports[i].port_class, "data") - == mem_pb_type->ports[i].port_class) { + && strstr(mem_pb_type->ports[i].port_class, "data") == mem_pb_type->ports[i].port_class) { mem_pb_type->modes[0].interconnect[i_inter].name = (char*)vtr::calloc(i_inter / 10 + 8, sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].name, - "direct%d", i_inter); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].name, "direct%d", i_inter); mem_pb_type->modes[0].interconnect[i_inter].infer_annotations = true; if (mem_pb_type->ports[i].type == IN_PORT) { @@ -891,78 +875,65 @@ void ProcessMemoryClass(t_pb_type* mem_pb_type) { mem_pb_type->modes[0].pb_type_children[0].ports[i].num_pins = 1; mem_pb_type->modes[0].pb_type_children[0].num_input_pins -= (mem_pb_type->ports[i].num_pins - 1); - mem_pb_type->modes[0].interconnect[i_inter].input_string = (char*)vtr::calloc(strlen(input_name) + strlen(input_port_name) - + 2, - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].input_string, - "%s.%s", input_name, input_port_name); - mem_pb_type->modes[0].interconnect[i_inter].output_string = (char*)vtr::calloc(strlen(output_name) + strlen(output_port_name) - + 2 * (6 + num_pb / 10), - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].output_string, - "%s[%d:0].%s", output_name, num_pb - 1, - output_port_name); + mem_pb_type->modes[0].interconnect[i_inter].input_string + = (char*)vtr::calloc(strlen(input_name) + strlen(input_port_name) + 2, sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].input_string, "%s.%s", input_name, input_port_name); + mem_pb_type->modes[0].interconnect[i_inter].output_string = (char*)vtr::calloc( + strlen(output_name) + strlen(output_port_name) + 2 * (6 + num_pb / 10), sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].output_string, "%s[%d:0].%s", output_name, + num_pb - 1, output_port_name); } else { /* force data pins to be one bit wide and update stats */ mem_pb_type->modes[0].pb_type_children[0].ports[i].num_pins = 1; mem_pb_type->modes[0].pb_type_children[0].num_output_pins -= (mem_pb_type->ports[i].num_pins - 1); - mem_pb_type->modes[0].interconnect[i_inter].input_string = (char*)vtr::calloc(strlen(input_name) + strlen(input_port_name) - + 2 * (6 + num_pb / 10), - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].input_string, - "%s[%d:0].%s", input_name, num_pb - 1, input_port_name); - mem_pb_type->modes[0].interconnect[i_inter].output_string = (char*)vtr::calloc(strlen(output_name) + strlen(output_port_name) - + 2, - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].output_string, - "%s.%s", output_name, output_port_name); + mem_pb_type->modes[0].interconnect[i_inter].input_string = (char*)vtr::calloc( + strlen(input_name) + strlen(input_port_name) + 2 * (6 + num_pb / 10), sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].input_string, "%s[%d:0].%s", input_name, num_pb - 1, + input_port_name); + mem_pb_type->modes[0].interconnect[i_inter].output_string + = (char*)vtr::calloc(strlen(output_name) + strlen(output_port_name) + 2, sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].output_string, "%s.%s", output_name, + output_port_name); } /* Allocate interconnect power structures */ - mem_pb_type->modes[0].interconnect[i_inter].interconnect_power = (t_interconnect_power*)vtr::calloc(1, - sizeof(t_interconnect_power)); + mem_pb_type->modes[0].interconnect[i_inter].interconnect_power + = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); i_inter++; } else { for (j = 0; j < num_pb; j++) { /* Anything that is not data must be an input */ - mem_pb_type->modes[0].interconnect[i_inter].name = (char*)vtr::calloc(i_inter / 10 + j / 10 + 10, - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].name, - "direct%d_%d", i_inter, j); + mem_pb_type->modes[0].interconnect[i_inter].name + = (char*)vtr::calloc(i_inter / 10 + j / 10 + 10, sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].name, "direct%d_%d", i_inter, j); mem_pb_type->modes[0].interconnect[i_inter].infer_annotations = true; if (mem_pb_type->ports[i].type == IN_PORT) { mem_pb_type->modes[0].interconnect[i_inter].type = DIRECT_INTERC; - mem_pb_type->modes[0].interconnect[i_inter].input_string = (char*)vtr::calloc(strlen(input_name) + strlen(input_port_name) - + 2, - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].input_string, - "%s.%s", input_name, input_port_name); - mem_pb_type->modes[0].interconnect[i_inter].output_string = (char*)vtr::calloc(strlen(output_name) - + strlen(output_port_name) - + 2 * (6 + num_pb / 10), - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].output_string, - "%s[%d:%d].%s", output_name, j, j, - output_port_name); + mem_pb_type->modes[0].interconnect[i_inter].input_string + = (char*)vtr::calloc(strlen(input_name) + strlen(input_port_name) + 2, sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].input_string, "%s.%s", input_name, + input_port_name); + mem_pb_type->modes[0].interconnect[i_inter].output_string = (char*)vtr::calloc( + strlen(output_name) + strlen(output_port_name) + 2 * (6 + num_pb / 10), sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].output_string, "%s[%d:%d].%s", output_name, j, + j, output_port_name); } else { mem_pb_type->modes[0].interconnect[i_inter].type = DIRECT_INTERC; - mem_pb_type->modes[0].interconnect[i_inter].input_string = (char*)vtr::calloc(strlen(input_name) + strlen(input_port_name) - + 2 * (6 + num_pb / 10), - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].input_string, - "%s[%d:%d].%s", input_name, j, j, input_port_name); - mem_pb_type->modes[0].interconnect[i_inter].output_string = (char*)vtr::calloc(strlen(output_name) - + strlen(output_port_name) + 2, - sizeof(char)); - sprintf(mem_pb_type->modes[0].interconnect[i_inter].output_string, - "%s.%s", output_name, output_port_name); + mem_pb_type->modes[0].interconnect[i_inter].input_string = (char*)vtr::calloc( + strlen(input_name) + strlen(input_port_name) + 2 * (6 + num_pb / 10), sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].input_string, "%s[%d:%d].%s", input_name, j, j, + input_port_name); + mem_pb_type->modes[0].interconnect[i_inter].output_string + = (char*)vtr::calloc(strlen(output_name) + strlen(output_port_name) + 2, sizeof(char)); + sprintf(mem_pb_type->modes[0].interconnect[i_inter].output_string, "%s.%s", output_name, + output_port_name); } /* Allocate interconnect power structures */ - mem_pb_type->modes[0].interconnect[i_inter].interconnect_power = (t_interconnect_power*)vtr::calloc(1, - sizeof(t_interconnect_power)); + mem_pb_type->modes[0].interconnect[i_inter].interconnect_power + = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); i_inter++; } } @@ -1093,8 +1064,7 @@ void CreateModelLibrary(t_arch* arch) { arch->model_library = model_library; } -void SyncModelsPbTypes(t_arch* arch, - const std::vector& Types) { +void SyncModelsPbTypes(t_arch* arch, const std::vector& Types) { for (auto& Type : Types) { if (Type.pb_type != nullptr) { SyncModelsPbTypes_rec(arch, Type.pb_type); @@ -1102,8 +1072,7 @@ void SyncModelsPbTypes(t_arch* arch, } } -void SyncModelsPbTypes_rec(t_arch* arch, - t_pb_type* pb_type) { +void SyncModelsPbTypes_rec(t_arch* arch, t_pb_type* pb_type) { int i, j, p; t_model *model_match_prim, *cur_model; t_model_ports* model_port; @@ -1120,9 +1089,8 @@ void SyncModelsPbTypes_rec(t_arch* arch, ++blif_model_name; //Advance past space } if (!blif_model_name) { - archfpga_throw(get_arch_file_name(), 0, - "Unknown blif model %s in pb_type %s\n", - pb_type->blif_model, pb_type->name); + archfpga_throw(get_arch_file_name(), 0, "Unknown blif model %s in pb_type %s\n", pb_type->blif_model, + pb_type->name); } /* There are two sets of models to consider, the standard library of models and the user defined models */ @@ -1144,8 +1112,7 @@ void SyncModelsPbTypes_rec(t_arch* arch, cur_model = cur_model->next; } if (found != true) { - archfpga_throw(get_arch_file_name(), 0, - "No matching model for pb_type %s\n", pb_type->blif_model); + archfpga_throw(get_arch_file_name(), 0, "No matching model for pb_type %s\n", pb_type->blif_model); } pb_type->model = model_match_prim; @@ -1163,15 +1130,15 @@ void SyncModelsPbTypes_rec(t_arch* arch, if (model_port->size < pb_type->ports[p].num_pins) { model_port->size = pb_type->ports[p].num_pins; } - if (model_port->min_size > pb_type->ports[p].num_pins - || model_port->min_size == -1) { + if (model_port->min_size > pb_type->ports[p].num_pins || model_port->min_size == -1) { model_port->min_size = pb_type->ports[p].num_pins; } pb_type->ports[p].model_port = model_port; if (pb_type->ports[p].type != model_port->dir) { - archfpga_throw(get_arch_file_name(), 0, - "Direction for port '%s' on model does not match port direction in pb_type '%s'\n", - pb_type->ports[p].name, pb_type->name); + archfpga_throw( + get_arch_file_name(), 0, + "Direction for port '%s' on model does not match port direction in pb_type '%s'\n", + pb_type->ports[p].name, pb_type->name); } if (pb_type->ports[p].is_clock != model_port->is_clock) { archfpga_throw(get_arch_file_name(), 0, @@ -1188,32 +1155,30 @@ void SyncModelsPbTypes_rec(t_arch* arch, if (model_port->size < pb_type->ports[p].num_pins) { model_port->size = pb_type->ports[p].num_pins; } - if (model_port->min_size > pb_type->ports[p].num_pins - || model_port->min_size == -1) { + if (model_port->min_size > pb_type->ports[p].num_pins || model_port->min_size == -1) { model_port->min_size = pb_type->ports[p].num_pins; } pb_type->ports[p].model_port = model_port; if (pb_type->ports[p].type != model_port->dir) { - archfpga_throw(get_arch_file_name(), 0, - "Direction for port '%s' on model does not match port direction in pb_type '%s'\n", - pb_type->ports[p].name, pb_type->name); + archfpga_throw( + get_arch_file_name(), 0, + "Direction for port '%s' on model does not match port direction in pb_type '%s'\n", + pb_type->ports[p].name, pb_type->name); } found = true; } model_port = model_port->next; } if (found != true) { - archfpga_throw(get_arch_file_name(), 0, - "No matching model port for port %s in pb_type %s\n", + archfpga_throw(get_arch_file_name(), 0, "No matching model port for port %s in pb_type %s\n", pb_type->ports[p].name, pb_type->name); } } } else { for (i = 0; i < pb_type->num_modes; i++) { for (j = 0; j < pb_type->modes[i].num_pb_type_children; j++) { - SyncModelsPbTypes_rec(arch, - &(pb_type->modes[i].pb_type_children[j])); + SyncModelsPbTypes_rec(arch, &(pb_type->modes[i].pb_type_children[j])); } } } @@ -1226,20 +1191,17 @@ void SyncModelsPbTypes_rec(t_arch* arch, * clock_name specified in the primitive. Applies * to flipflop/memory right now. */ -void primitives_annotation_clock_match(t_pin_to_pin_annotation* annotation, - t_pb_type* parent_pb_type) { +void primitives_annotation_clock_match(t_pin_to_pin_annotation* annotation, t_pb_type* parent_pb_type) { int i_port; bool clock_valid = false; //Determine if annotation's clock is same as primtive's clock if (!parent_pb_type || !annotation) { - archfpga_throw(__FILE__, __LINE__, - "Annotation_clock check encouters invalid annotation or primitive.\n"); + archfpga_throw(__FILE__, __LINE__, "Annotation_clock check encouters invalid annotation or primitive.\n"); } for (i_port = 0; i_port < parent_pb_type->num_ports; i_port++) { if (parent_pb_type->ports[i_port].is_clock) { - if (strcmp(parent_pb_type->ports[i_port].name, annotation->clock) - == 0) { + if (strcmp(parent_pb_type->ports[i_port].name, annotation->clock) == 0) { clock_valid = true; break; } @@ -1248,8 +1210,8 @@ void primitives_annotation_clock_match(t_pin_to_pin_annotation* annotation, if (!clock_valid) { archfpga_throw(get_arch_file_name(), annotation->line_num, - "Clock '%s' does not match any clock defined in pb_type '%s'.\n", - annotation->clock, parent_pb_type->name); + "Clock '%s' does not match any clock defined in pb_type '%s'.\n", annotation->clock, + parent_pb_type->name); } } @@ -1264,23 +1226,17 @@ const t_segment_inf* find_segment(const t_arch* arch, std::string name) { return nullptr; } -bool segment_exists(const t_arch* arch, std::string name) { - return find_segment(arch, name) != nullptr; -} +bool segment_exists(const t_arch* arch, std::string name) { return find_segment(arch, name) != nullptr; } bool is_library_model(const char* model_name) { - if (model_name == std::string(MODEL_NAMES) - || model_name == std::string(MODEL_LATCH) - || model_name == std::string(MODEL_INPUT) - || model_name == std::string(MODEL_OUTPUT)) { + if (model_name == std::string(MODEL_NAMES) || model_name == std::string(MODEL_LATCH) + || model_name == std::string(MODEL_INPUT) || model_name == std::string(MODEL_OUTPUT)) { return true; } return false; } -bool is_library_model(const t_model* model) { - return is_library_model(model->name); -} +bool is_library_model(const t_model* model) { return is_library_model(model->name); } //Returns true if the specified block type contains the specified blif model name // @@ -1300,8 +1256,7 @@ bool pb_type_contains_blif_model(const t_pb_type* pb_type, const std::string& bl if (pb_type->blif_model != nullptr) { //Leaf pb_type VTR_ASSERT(pb_type->num_modes == 0); - if (blif_model_name == pb_type->blif_model - || ".subckt " + blif_model_name == pb_type->blif_model) { + if (blif_model_name == pb_type->blif_model || ".subckt " + blif_model_name == pb_type->blif_model) { return true; } else { return false; @@ -1321,9 +1276,10 @@ bool pb_type_contains_blif_model(const t_pb_type* pb_type, const std::string& bl return false; } -const t_pin_to_pin_annotation* find_sequential_annotation(const t_pb_type* pb_type, const t_model_ports* port, enum e_pin_to_pin_delay_annotations annot_type) { - VTR_ASSERT(annot_type == E_ANNOT_PIN_TO_PIN_DELAY_TSETUP - || annot_type == E_ANNOT_PIN_TO_PIN_DELAY_THOLD +const t_pin_to_pin_annotation* find_sequential_annotation(const t_pb_type* pb_type, + const t_model_ports* port, + enum e_pin_to_pin_delay_annotations annot_type) { + VTR_ASSERT(annot_type == E_ANNOT_PIN_TO_PIN_DELAY_TSETUP || annot_type == E_ANNOT_PIN_TO_PIN_DELAY_THOLD || annot_type == E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MAX || annot_type == E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN); @@ -1342,7 +1298,9 @@ const t_pin_to_pin_annotation* find_sequential_annotation(const t_pb_type* pb_ty return nullptr; } -const t_pin_to_pin_annotation* find_combinational_annotation(const t_pb_type* pb_type, std::string in_port, std::string out_port) { +const t_pin_to_pin_annotation* find_combinational_annotation(const t_pb_type* pb_type, + std::string in_port, + std::string out_port) { for (int iannot = 0; iannot < pb_type->num_annotations; ++iannot) { const t_pin_to_pin_annotation* annot = &pb_type->annotations[iannot]; for (const auto& annot_in_str : vtr::split(annot->input_pins)) { @@ -1367,7 +1325,8 @@ const t_pin_to_pin_annotation* find_combinational_annotation(const t_pb_type* pb void link_physical_logical_types(std::vector& PhysicalTileTypes, std::vector& LogicalBlockTypes) { for (auto& physical_tile : PhysicalTileTypes) { - if (physical_tile.index == EMPTY_TYPE_INDEX) continue; + if (physical_tile.index == EMPTY_TYPE_INDEX) + continue; auto eq_sites_set = get_equivalent_sites_set(&physical_tile); auto equivalent_sites = std::vector(eq_sites_set.begin(), eq_sites_set.end()); @@ -1397,13 +1356,14 @@ void link_physical_logical_types(std::vector& PhysicalTile } for (auto& logical_block : LogicalBlockTypes) { - if (logical_block.index == EMPTY_TYPE_INDEX) continue; + if (logical_block.index == EMPTY_TYPE_INDEX) + continue; auto& equivalent_tiles = logical_block.equivalent_tiles; if ((int)equivalent_tiles.size() <= 0) { - archfpga_throw(__FILE__, __LINE__, - "Logical Block %s does not have any equivalent tiles.\n", logical_block.name); + archfpga_throw(__FILE__, __LINE__, "Logical Block %s does not have any equivalent tiles.\n", + logical_block.name); } std::unordered_map ignored_pins_check_map; @@ -1438,8 +1398,8 @@ void link_physical_logical_types(std::vector& PhysicalTile auto result = direct_map.find(t_logical_pin(pin)); if (result == direct_map.end()) { archfpga_throw(__FILE__, __LINE__, - "Logical pin %d not present in pin mapping between Tile %s and Block %s.\n", - pin, tile->name, logical_block.name); + "Logical pin %d not present in pin mapping between Tile %s and Block %s.\n", pin, + tile->name, logical_block.name); } int sub_tile_pin_index = result->second.pin; @@ -1451,7 +1411,8 @@ void link_physical_logical_types(std::vector& PhysicalTile auto ignored_result = ignored_pins_check_map.insert(std::pair(pin, is_ignored)); if (!ignored_result.second && ignored_result.first->second != is_ignored) { archfpga_throw(__FILE__, __LINE__, - "Physical Tile %s has a different value for the ignored pin (physical pin: %d, logical pin: %d) " + "Physical Tile %s has a different value for the ignored pin (physical pin: %d, " + "logical pin: %d) " "different from the corresponding pins of the other equivalent site %s\n.", tile->name, phy_index, pin, logical_block.name); } @@ -1459,7 +1420,8 @@ void link_physical_logical_types(std::vector& PhysicalTile auto global_result = global_pins_check_map.insert(std::pair(pin, is_global)); if (!global_result.second && global_result.first->second != is_global) { archfpga_throw(__FILE__, __LINE__, - "Physical Tile %s has a different value for the global pin (physical pin: %d, logical pin: %d) " + "Physical Tile %s has a different value for the global pin (physical pin: %d, " + "logical pin: %d) " "different from the corresponding pins of the other equivalent sites\n.", tile->name, phy_index, pin); } diff --git a/libs/libarchfpga/src/arch_util.h b/libs/libarchfpga/src/arch_util.h index f502d6c783a..2741507305b 100644 --- a/libs/libarchfpga/src/arch_util.h +++ b/libs/libarchfpga/src/arch_util.h @@ -74,9 +74,7 @@ t_logical_block_type get_empty_logical_type(const char* name = EMPTY_BLOCK_NAME) std::unordered_set get_equivalent_sites_set(t_physical_tile_type_ptr type); -void alloc_and_load_default_child_for_pb_type(t_pb_type* pb_type, - char* new_name, - t_pb_type* copy); +void alloc_and_load_default_child_for_pb_type(t_pb_type* pb_type, char* new_name, t_pb_type* copy); void ProcessLutClass(t_pb_type* lut_pb_type); @@ -86,14 +84,11 @@ e_power_estimation_method power_method_inherited(e_power_estimation_method paren void CreateModelLibrary(t_arch* arch); -void SyncModelsPbTypes(t_arch* arch, - const std::vector& Types); +void SyncModelsPbTypes(t_arch* arch, const std::vector& Types); -void SyncModelsPbTypes_rec(t_arch* arch, - t_pb_type* pb_type); +void SyncModelsPbTypes_rec(t_arch* arch, t_pb_type* pb_type); -void primitives_annotation_clock_match(t_pin_to_pin_annotation* annotation, - t_pb_type* parent_pb_type); +void primitives_annotation_clock_match(t_pin_to_pin_annotation* annotation, t_pb_type* parent_pb_type); bool segment_exists(const t_arch* arch, std::string name); const t_segment_inf* find_segment(const t_arch* arch, std::string name); @@ -106,8 +101,12 @@ bool block_type_contains_blif_model(t_logical_block_type_ptr type, const std::st //Returns true of a pb_type (or it's children) contain the specified blif model name bool pb_type_contains_blif_model(const t_pb_type* pb_type, const std::string& blif_model_name); -const t_pin_to_pin_annotation* find_sequential_annotation(const t_pb_type* pb_type, const t_model_ports* port, enum e_pin_to_pin_delay_annotations annot_type); -const t_pin_to_pin_annotation* find_combinational_annotation(const t_pb_type* pb_type, std::string in_port, std::string out_port); +const t_pin_to_pin_annotation* find_sequential_annotation(const t_pb_type* pb_type, + const t_model_ports* port, + enum e_pin_to_pin_delay_annotations annot_type); +const t_pin_to_pin_annotation* find_combinational_annotation(const t_pb_type* pb_type, + std::string in_port, + std::string out_port); /** * @brief Updates the physical and logical types based on the equivalence between one and the other. diff --git a/libs/libarchfpga/src/cad_types.h b/libs/libarchfpga/src/cad_types.h index 5ab46816b99..bb39c216687 100644 --- a/libs/libarchfpga/src/cad_types.h +++ b/libs/libarchfpga/src/cad_types.h @@ -120,9 +120,7 @@ struct t_pack_patterns { * Linked list for easy insertion/deletion */ struct t_cluster_placement_primitive { - t_cluster_placement_primitive() { - pb_graph_node = nullptr; - } + t_cluster_placement_primitive() { pb_graph_node = nullptr; } t_pb_graph_node* pb_graph_node; bool valid; float base_cost; /* cost independent of current status of packing */ diff --git a/libs/libarchfpga/src/clock_types.h b/libs/libarchfpga/src/clock_types.h index ac622d29a95..334d0987d5c 100644 --- a/libs/libarchfpga/src/clock_types.h +++ b/libs/libarchfpga/src/clock_types.h @@ -4,11 +4,7 @@ #include #include -enum class e_clock_type { - SPINE, - RIB, - H_TREE -}; +enum class e_clock_type { SPINE, RIB, H_TREE }; struct t_metal_layer { float r_metal; diff --git a/libs/libarchfpga/src/device_grid.h b/libs/libarchfpga/src/device_grid.h index a82dd043da5..8f962f6af1c 100644 --- a/libs/libarchfpga/src/device_grid.h +++ b/libs/libarchfpga/src/device_grid.h @@ -25,14 +25,14 @@ class DeviceGrid { public: DeviceGrid() = default; DeviceGrid(std::string grid_name, vtr::NdMatrix grid); - DeviceGrid(std::string grid_name, vtr::NdMatrix grid, std::vector limiting_res); + DeviceGrid(std::string grid_name, + vtr::NdMatrix grid, + std::vector limiting_res); const std::string& name() const { return name_; } ///@brief Return the number of layers(number of dies) - inline int get_num_layers() const { - return (int)grid_.dim_size(0); - } + inline int get_num_layers() const { return (int)grid_.dim_size(0); } ///@brief Return the width of the grid at the specified layer size_t width() const { return grid_.dim_size(1); } @@ -40,9 +40,7 @@ class DeviceGrid { size_t height() const { return grid_.dim_size(2); } ///@brief Return the size of the flattened grid on the given layer - inline size_t grid_size() const { - return grid_.size(); - } + inline size_t grid_size() const { return grid_.size(); } ///@brief deallocate members of DeviceGrid void clear(); @@ -114,9 +112,7 @@ class DeviceGrid { } ///@brief Return the nth t_grid_tile on the given layer of the flattened grid - Used by serializer functions - inline const t_grid_tile* get_grid_locs_grid_loc(int n) const { - return &grid_.get(n); - } + inline const t_grid_tile* get_grid_locs_grid_loc(int n) const { return &grid_.get(n); } private: ///@brief count_instances() counts the number of each tile type on each layer and store it in instance_counts_. It is called in the constructor. @@ -131,7 +127,8 @@ class DeviceGrid { * @note which can be used for indexing in the second dimension, allowing * @note traditional 2-d indexing to be used */ - vtr::NdMatrix grid_; //This stores the grid of complex blocks. It is a 3D matrix: [0..num_layers-1][0..grid.width()-1][0..grid_height()-1] + vtr::NdMatrix + grid_; //This stores the grid of complex blocks. It is a 3D matrix: [0..num_layers-1][0..grid.width()-1][0..grid_height()-1] ///@brief instance_counts_ stores the number of each tile type on each layer. It is initialized in count_instances(). std::vector> instance_counts_; /* [layer_num][physical_tile_type_ptr] */ diff --git a/libs/libarchfpga/src/echo_arch.cpp b/libs/libarchfpga/src/echo_arch.cpp index 777d655c3e6..719134644ae 100644 --- a/libs/libarchfpga/src/echo_arch.cpp +++ b/libs/libarchfpga/src/echo_arch.cpp @@ -19,9 +19,7 @@ constexpr int ipin_cblock_switch_index_between_dice = 1; void PrintArchInfo(FILE* Echo, const t_arch* arch); static void PrintPb_types_rec(FILE* Echo, const t_pb_type* pb_type, int level); -static void PrintPb_types_recPower(FILE* Echo, - const t_pb_type* pb_type, - const char* tabs); +static void PrintPb_types_recPower(FILE* Echo, const t_pb_type* pb_type, const char* tabs); /* Output the data from architecture data so user can verify it * was interpretted correctly. */ @@ -55,23 +53,20 @@ void EchoArch(const char* EchoFile, fprintf(Echo, "Model: \"%s\"\n", cur_model->name); model_port = cur_model->inputs; while (model_port) { - fprintf(Echo, "\tInput Ports: \"%s\" \"%d\" min_size=\"%d\"\n", - model_port->name, model_port->size, + fprintf(Echo, "\tInput Ports: \"%s\" \"%d\" min_size=\"%d\"\n", model_port->name, model_port->size, model_port->min_size); model_port = model_port->next; } model_port = cur_model->outputs; while (model_port) { - fprintf(Echo, "\tOutput Ports: \"%s\" \"%d\" min_size=\"%d\"\n", - model_port->name, model_port->size, + fprintf(Echo, "\tOutput Ports: \"%s\" \"%d\" min_size=\"%d\"\n", model_port->name, model_port->size, model_port->min_size); model_port = model_port->next; } cur_vptr = cur_model->pb_types; i = 0; while (cur_vptr != nullptr) { - fprintf(Echo, "\tpb_type %d: \"%s\"\n", i, - ((t_pb_type*)cur_vptr->data_vptr)->name); + fprintf(Echo, "\tpb_type %d: \"%s\"\n", i, ((t_pb_type*)cur_vptr->data_vptr)->name); cur_vptr = cur_vptr->next; i++; } @@ -139,10 +134,12 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { fprintf(Echo, "*************************************************\n"); for (const auto& grid_layout : arch->grid_layouts) { if (grid_layout.grid_type == GridDefType::AUTO) { - fprintf(Echo, "Layout: '%s' Type: auto Aspect_Ratio: %f\n", grid_layout.name.c_str(), grid_layout.aspect_ratio); + fprintf(Echo, "Layout: '%s' Type: auto Aspect_Ratio: %f\n", grid_layout.name.c_str(), + grid_layout.aspect_ratio); } else { VTR_ASSERT(grid_layout.grid_type == GridDefType::FIXED); - fprintf(Echo, "Layout: '%s' Type: fixed Width: %d Height %d\n", grid_layout.name.c_str(), grid_layout.width, grid_layout.height); + fprintf(Echo, "Layout: '%s' Type: fixed Width: %d Height %d\n", grid_layout.name.c_str(), grid_layout.width, + grid_layout.height); } } fprintf(Echo, "*************************************************\n\n"); @@ -150,40 +147,35 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { fprintf(Echo, "*************************************************\n"); fprintf(Echo, "Device Info:\n"); - fprintf(Echo, - "\tSizing: R_minW_nmos %e R_minW_pmos %e\n", - arch->R_minW_nmos, arch->R_minW_pmos); + fprintf(Echo, "\tSizing: R_minW_nmos %e R_minW_pmos %e\n", arch->R_minW_nmos, arch->R_minW_pmos); - fprintf(Echo, "\tArea: grid_logic_tile_area %e\n", - arch->grid_logic_tile_area); + fprintf(Echo, "\tArea: grid_logic_tile_area %e\n", arch->grid_logic_tile_area); fprintf(Echo, "\tChannel Width Distribution:\n"); switch (arch->Chans.chan_x_dist.type) { case (UNIFORM): - fprintf(Echo, "\t\tx: type uniform peak %e\n", - arch->Chans.chan_x_dist.peak); + fprintf(Echo, "\t\tx: type uniform peak %e\n", arch->Chans.chan_x_dist.peak); break; case (GAUSSIAN): fprintf(Echo, "\t\tx: type gaussian peak %e \ width %e Xpeak %e dc %e\n", - arch->Chans.chan_x_dist.peak, arch->Chans.chan_x_dist.width, - arch->Chans.chan_x_dist.xpeak, arch->Chans.chan_x_dist.dc); + arch->Chans.chan_x_dist.peak, arch->Chans.chan_x_dist.width, arch->Chans.chan_x_dist.xpeak, + arch->Chans.chan_x_dist.dc); break; case (PULSE): fprintf(Echo, "\t\tx: type pulse peak %e \ width %e Xpeak %e dc %e\n", - arch->Chans.chan_x_dist.peak, arch->Chans.chan_x_dist.width, - arch->Chans.chan_x_dist.xpeak, arch->Chans.chan_x_dist.dc); + arch->Chans.chan_x_dist.peak, arch->Chans.chan_x_dist.width, arch->Chans.chan_x_dist.xpeak, + arch->Chans.chan_x_dist.dc); break; case (DELTA): fprintf(Echo, "\t\tx: distr dleta peak %e \ Xpeak %e dc %e\n", - arch->Chans.chan_x_dist.peak, arch->Chans.chan_x_dist.xpeak, - arch->Chans.chan_x_dist.dc); + arch->Chans.chan_x_dist.peak, arch->Chans.chan_x_dist.xpeak, arch->Chans.chan_x_dist.dc); break; default: fprintf(Echo, "\t\tInvalid Distribution!\n"); @@ -192,29 +184,27 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { switch (arch->Chans.chan_y_dist.type) { case (UNIFORM): - fprintf(Echo, "\t\ty: type uniform peak %e\n", - arch->Chans.chan_y_dist.peak); + fprintf(Echo, "\t\ty: type uniform peak %e\n", arch->Chans.chan_y_dist.peak); break; case (GAUSSIAN): fprintf(Echo, "\t\ty: type gaussian peak %e \ width %e Xpeak %e dc %e\n", - arch->Chans.chan_y_dist.peak, arch->Chans.chan_y_dist.width, - arch->Chans.chan_y_dist.xpeak, arch->Chans.chan_y_dist.dc); + arch->Chans.chan_y_dist.peak, arch->Chans.chan_y_dist.width, arch->Chans.chan_y_dist.xpeak, + arch->Chans.chan_y_dist.dc); break; case (PULSE): fprintf(Echo, "\t\ty: type pulse peak %e \ width %e Xpeak %e dc %e\n", - arch->Chans.chan_y_dist.peak, arch->Chans.chan_y_dist.width, - arch->Chans.chan_y_dist.xpeak, arch->Chans.chan_y_dist.dc); + arch->Chans.chan_y_dist.peak, arch->Chans.chan_y_dist.width, arch->Chans.chan_y_dist.xpeak, + arch->Chans.chan_y_dist.dc); break; case (DELTA): fprintf(Echo, "\t\ty: distr dleta peak %e \ Xpeak %e dc %e\n", - arch->Chans.chan_y_dist.peak, arch->Chans.chan_y_dist.xpeak, - arch->Chans.chan_y_dist.dc); + arch->Chans.chan_y_dist.peak, arch->Chans.chan_y_dist.xpeak, arch->Chans.chan_y_dist.dc); break; default: fprintf(Echo, "\t\tInvalid Distribution!\n"); @@ -235,13 +225,15 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { break; } - fprintf(Echo, "\tInput Connect Block Switch Name Within a Same Die: %s\n", arch->ipin_cblock_switch_name[ipin_cblock_switch_index_within_die].c_str()); + fprintf(Echo, "\tInput Connect Block Switch Name Within a Same Die: %s\n", + arch->ipin_cblock_switch_name[ipin_cblock_switch_index_within_die].c_str()); //if there is more than one layer available, print the connection block switch name that is used for connection between two dice for (const auto& layout : arch->grid_layouts) { int num_layers = (int)layout.layers.size(); if (num_layers > 1) { - fprintf(Echo, "\tInput Connect Block Switch Name Between Two Dice: %s\n", arch->ipin_cblock_switch_name[ipin_cblock_switch_index_between_dice].c_str()); + fprintf(Echo, "\tInput Connect Block Switch Name Between Two Dice: %s\n", + arch->ipin_cblock_switch_name[ipin_cblock_switch_index_between_dice].c_str()); } } @@ -266,16 +258,14 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { VTR_ASSERT(arch->Switches[i].type() == SwitchType::PASS_GATE); fprintf(Echo, "\tSwitch[%d]: name %s type pass_gate\n", i + 1, arch->Switches[i].name.c_str()); } - fprintf(Echo, "\t\t\t\tR %e Cin %e Cout %e\n", arch->Switches[i].R, - arch->Switches[i].Cin, arch->Switches[i].Cout); + fprintf(Echo, "\t\t\t\tR %e Cin %e Cout %e\n", arch->Switches[i].R, arch->Switches[i].Cin, + arch->Switches[i].Cout); fprintf(Echo, "\t\t\t\t#Tdel values %d buf_size %e mux_trans_size %e\n", - (int)arch->Switches[i].Tdel_map_.size(), arch->Switches[i].buf_size, - arch->Switches[i].mux_trans_size); + (int)arch->Switches[i].Tdel_map_.size(), arch->Switches[i].buf_size, arch->Switches[i].mux_trans_size); if (arch->Switches[i].power_buffer_type == POWER_BUFFER_TYPE_AUTO) { fprintf(Echo, "\t\t\t\tpower_buffer_size auto\n"); } else { - fprintf(Echo, "\t\t\t\tpower_buffer_size %e\n", - arch->Switches[i].power_buffer_size); + fprintf(Echo, "\t\t\t\tpower_buffer_size %e\n", arch->Switches[i].power_buffer_size); } } @@ -285,9 +275,7 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { fprintf(Echo, "Segment List:\n"); for (i = 0; i < (int)(arch->Segments).size(); i++) { const struct t_segment_inf& seg = arch->Segments[i]; - fprintf(Echo, - "\tSegment[%d]: frequency %d length %d R_metal %e C_metal %e\n", - i + 1, seg.frequency, seg.length, + fprintf(Echo, "\tSegment[%d]: frequency %d length %d R_metal %e C_metal %e\n", i + 1, seg.frequency, seg.length, seg.Rmetal, seg.Cmetal); if (seg.directionality == UNI_DIRECTIONAL) { @@ -333,12 +321,10 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { fprintf(Echo, "*************************************************\n"); fprintf(Echo, "Direct List:\n"); for (i = 0; i < arch->num_directs; i++) { - fprintf(Echo, "\tDirect[%d]: name %s from_pin %s to_pin %s\n", i + 1, - arch->Directs[i].name, arch->Directs[i].from_pin, - arch->Directs[i].to_pin); - fprintf(Echo, "\t\t\t\t x_offset %d y_offset %d z_offset %d\n", - arch->Directs[i].x_offset, arch->Directs[i].y_offset, - arch->Directs[i].sub_tile_offset); + fprintf(Echo, "\tDirect[%d]: name %s from_pin %s to_pin %s\n", i + 1, arch->Directs[i].name, + arch->Directs[i].from_pin, arch->Directs[i].to_pin); + fprintf(Echo, "\t\t\t\t x_offset %d y_offset %d z_offset %d\n", arch->Directs[i].x_offset, + arch->Directs[i].y_offset, arch->Directs[i].sub_tile_offset); } fprintf(Echo, "*************************************************\n\n"); @@ -361,10 +347,9 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { fprintf(Echo, "*************************************************\n"); fprintf(Echo, "Power:\n"); if (arch->power) { - fprintf(Echo, "\tlocal_interconnect C_wire %e factor %f\n", - arch->power->C_wire_local, arch->power->local_interc_factor); - fprintf(Echo, "\tlogical_effort_factor %f trans_per_sram_bit %f\n", - arch->power->logical_effort_factor, + fprintf(Echo, "\tlocal_interconnect C_wire %e factor %f\n", arch->power->C_wire_local, + arch->power->local_interc_factor); + fprintf(Echo, "\tlogical_effort_factor %f trans_per_sram_bit %f\n", arch->power->logical_effort_factor, arch->power->transistors_per_SRAM_bit); } @@ -375,17 +360,13 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) { if (arch->clocks) { for (i = 0; i < arch->clocks->num_global_clocks; i++) { if (arch->clocks->clock_inf[i].autosize_buffer) { - fprintf(Echo, "\tClock[%d]: buffer_size auto C_wire %e", i + 1, - arch->clocks->clock_inf->C_wire); + fprintf(Echo, "\tClock[%d]: buffer_size auto C_wire %e", i + 1, arch->clocks->clock_inf->C_wire); } else { - fprintf(Echo, "\tClock[%d]: buffer_size %e C_wire %e", i + 1, - arch->clocks->clock_inf[i].buffer_size, + fprintf(Echo, "\tClock[%d]: buffer_size %e C_wire %e", i + 1, arch->clocks->clock_inf[i].buffer_size, arch->clocks->clock_inf[i].C_wire); } - fprintf(Echo, "\t\t\t\tstat_prob %f switch_density %f period %e", - arch->clocks->clock_inf[i].prob, - arch->clocks->clock_inf[i].dens, - arch->clocks->clock_inf[i].period); + fprintf(Echo, "\t\t\t\tstat_prob %f switch_density %f period %e", arch->clocks->clock_inf[i].prob, + arch->clocks->clock_inf[i].dens, arch->clocks->clock_inf[i].period); } } @@ -408,8 +389,7 @@ static void PrintPb_types_rec(FILE* Echo, const t_pb_type* pb_type, int level) { fprintf(Echo, "%s\tnum_modes: %d\n", tabs, pb_type->num_modes); fprintf(Echo, "%s\tnum_ports: %d\n", tabs, pb_type->num_ports); for (i = 0; i < pb_type->num_ports; i++) { - fprintf(Echo, "%s\tport %s type %d num_pins %d\n", tabs, - pb_type->ports[i].name, pb_type->ports[i].type, + fprintf(Echo, "%s\tport %s type %d num_pins %d\n", tabs, pb_type->ports[i].name, pb_type->ports[i].type, pb_type->ports[i].num_pins); } @@ -417,17 +397,13 @@ static void PrintPb_types_rec(FILE* Echo, const t_pb_type* pb_type, int level) { for (i = 0; i < pb_type->num_modes; i++) { fprintf(Echo, "%s\tmode %s:\n", tabs, pb_type->modes[i].name); for (j = 0; j < pb_type->modes[i].num_pb_type_children; j++) { - PrintPb_types_rec(Echo, &pb_type->modes[i].pb_type_children[j], - level + 2); + PrintPb_types_rec(Echo, &pb_type->modes[i].pb_type_children[j], level + 2); } for (j = 0; j < pb_type->modes[i].num_interconnect; j++) { - fprintf(Echo, "%s\t\tinterconnect %d %s %s\n", tabs, - pb_type->modes[i].interconnect[j].type, + fprintf(Echo, "%s\t\tinterconnect %d %s %s\n", tabs, pb_type->modes[i].interconnect[j].type, pb_type->modes[i].interconnect[j].input_string, pb_type->modes[i].interconnect[j].output_string); - for (k = 0; - k < pb_type->modes[i].interconnect[j].num_annotations; - k++) { + for (k = 0; k < pb_type->modes[i].interconnect[j].num_annotations; k++) { fprintf(Echo, "%s\t\t\tannotation %s %s %d: %s\n", tabs, pb_type->modes[i].interconnect[j].annotations[k].input_pins, pb_type->modes[i].interconnect[j].annotations[k].output_pins, @@ -450,16 +426,12 @@ static void PrintPb_types_rec(FILE* Echo, const t_pb_type* pb_type, int level) { * I/O has no annotations to be displayed * All other library or user models may have delays specificied, e.g. Tsetup and Tcq * Display the additional information*/ - if (strcmp(pb_type->model->name, MODEL_NAMES) - && strcmp(pb_type->model->name, MODEL_INPUT) + if (strcmp(pb_type->model->name, MODEL_NAMES) && strcmp(pb_type->model->name, MODEL_INPUT) && strcmp(pb_type->model->name, MODEL_OUTPUT)) { for (k = 0; k < pb_type->num_annotations; k++) { - fprintf(Echo, "%s\t\t\tannotation %s %s %s %d: %s\n", tabs, - pb_type->annotations[k].clock, - pb_type->annotations[k].input_pins, - pb_type->annotations[k].output_pins, - pb_type->annotations[k].format, - pb_type->annotations[k].value[0]); + fprintf(Echo, "%s\t\t\tannotation %s %s %s %d: %s\n", tabs, pb_type->annotations[k].clock, + pb_type->annotations[k].input_pins, pb_type->annotations[k].output_pins, + pb_type->annotations[k].format, pb_type->annotations[k].value[0]); } } } @@ -471,9 +443,7 @@ static void PrintPb_types_rec(FILE* Echo, const t_pb_type* pb_type, int level) { } //Added May 2013 Daniel Chen, help dump arch info after loading from XML -static void PrintPb_types_recPower(FILE* Echo, - const t_pb_type* pb_type, - const char* tabs) { +static void PrintPb_types_recPower(FILE* Echo, const t_pb_type* pb_type, const char* tabs) { int i = 0; /*Print power information for each pb if available*/ switch (pb_type->pb_type_power->estimation_method) { @@ -484,8 +454,7 @@ static void PrintPb_types_recPower(FILE* Echo, if (pb_type->parent_mode) { /*if NOT top-level pb (all top-level pb has NULL parent_mode, check parent's power method * This is because of the inheritance property of auto-size*/ - if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method - == POWER_METHOD_IGNORE) + if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method == POWER_METHOD_IGNORE) break; } fprintf(Echo, "%s\tpower method: ignore\n", tabs); @@ -497,8 +466,7 @@ static void PrintPb_types_recPower(FILE* Echo, if (pb_type->parent_mode) { /*if NOT top-level pb (all top-level pb has NULL parent_mode, check parent's power method * This is because of the inheritance property of auto-size*/ - if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method - == POWER_METHOD_AUTO_SIZES) + if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method == POWER_METHOD_AUTO_SIZES) break; } fprintf(Echo, "%s\tpower method: auto-size\n", tabs); @@ -516,13 +484,11 @@ static void PrintPb_types_recPower(FILE* Echo, for (i = 0; i < pb_type->num_ports; i++) { //Print all the power information on each port, only if available, //will not print if value is 0 or NULL - if (pb_type->ports[i].port_power->buffer_type - || pb_type->ports[i].port_power->wire_type + if (pb_type->ports[i].port_power->buffer_type || pb_type->ports[i].port_power->wire_type || pb_type->pb_type_power->absolute_power_per_instance.leakage || pb_type->pb_type_power->absolute_power_per_instance.dynamic) { - fprintf(Echo, "%s\t\tport %s type %d num_pins %d\n", tabs, - pb_type->ports[i].name, pb_type->ports[i].type, - pb_type->ports[i].num_pins); + fprintf(Echo, "%s\t\tport %s type %d num_pins %d\n", tabs, pb_type->ports[i].name, + pb_type->ports[i].type, pb_type->ports[i].num_pins); //Buffer size switch (pb_type->ports[i].port_power->buffer_type) { case (POWER_BUFFER_TYPE_UNDEFINED): @@ -532,8 +498,7 @@ static void PrintPb_types_recPower(FILE* Echo, fprintf(Echo, "%s\t\t\tbuffer_size %s\n", tabs, "auto"); break; case (POWER_BUFFER_TYPE_ABSOLUTE_SIZE): - fprintf(Echo, "%s\t\t\tbuffer_size %f\n", tabs, - pb_type->ports[i].port_power->buffer_size); + fprintf(Echo, "%s\t\t\tbuffer_size %f\n", tabs, pb_type->ports[i].port_power->buffer_size); break; default: break; @@ -543,8 +508,7 @@ static void PrintPb_types_recPower(FILE* Echo, case (POWER_WIRE_TYPE_IGNORED): break; case (POWER_WIRE_TYPE_C): - fprintf(Echo, "%s\t\t\twire_cap: %e\n", tabs, - pb_type->ports[i].port_power->wire.C); + fprintf(Echo, "%s\t\t\twire_cap: %e\n", tabs, pb_type->ports[i].port_power->wire.C); break; case (POWER_WIRE_TYPE_ABSOLUTE_LENGTH): fprintf(Echo, "%s\t\t\twire_len(abs): %e\n", tabs, @@ -576,8 +540,7 @@ static void PrintPb_types_recPower(FILE* Echo, /*if NOT top-level pb (all top-level pb has NULL parent_mode, check parent's power method * This is because once energy_per_toggle is specified at one level, * all children pb's are energy_per_toggle and only want to display once*/ - if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method - == POWER_METHOD_TOGGLE_PINS) + if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method == POWER_METHOD_TOGGLE_PINS) break; } @@ -585,13 +548,11 @@ static void PrintPb_types_recPower(FILE* Echo, for (i = 0; i < pb_type->num_ports; i++) { /*Print all the power information on each port, only if available, * will not print if value is 0 or NULL*/ - if (pb_type->ports[i].port_power->energy_per_toggle - || pb_type->ports[i].port_power->scaled_by_port + if (pb_type->ports[i].port_power->energy_per_toggle || pb_type->ports[i].port_power->scaled_by_port || pb_type->pb_type_power->absolute_power_per_instance.leakage || pb_type->pb_type_power->absolute_power_per_instance.dynamic) { - fprintf(Echo, "%s\t\tport %s type %d num_pins %d\n", tabs, - pb_type->ports[i].name, pb_type->ports[i].type, - pb_type->ports[i].num_pins); + fprintf(Echo, "%s\t\tport %s type %d num_pins %d\n", tabs, pb_type->ports[i].name, + pb_type->ports[i].type, pb_type->ports[i].num_pins); //Toggle Energy if (pb_type->ports[i].port_power->energy_per_toggle) { fprintf(Echo, "%s\t\t\tenergy_per_toggle %e\n", tabs, @@ -599,18 +560,19 @@ static void PrintPb_types_recPower(FILE* Echo, } //Scaled by port (could be reversed) if (pb_type->ports[i].port_power->scaled_by_port) { - if (pb_type->ports[i].port_power->scaled_by_port->num_pins - > 1) { + if (pb_type->ports[i].port_power->scaled_by_port->num_pins > 1) { fprintf(Echo, - (pb_type->ports[i].port_power->reverse_scaled ? "%s\t\t\tscaled_by_static_prob_n: %s[%d]\n" : "%s\t\t\tscaled_by_static_prob: %s[%d]\n"), - tabs, - pb_type->ports[i].port_power->scaled_by_port->name, + (pb_type->ports[i].port_power->reverse_scaled + ? "%s\t\t\tscaled_by_static_prob_n: %s[%d]\n" + : "%s\t\t\tscaled_by_static_prob: %s[%d]\n"), + tabs, pb_type->ports[i].port_power->scaled_by_port->name, pb_type->ports[i].port_power->scaled_by_port_pin_idx); } else { - fprintf(Echo, - (pb_type->ports[i].port_power->reverse_scaled ? "%s\t\t\tscaled_by_static_prob_n: %s\n" : "%s\t\t\tscaled_by_static_prob: %s\n"), - tabs, - pb_type->ports[i].port_power->scaled_by_port->name); + fprintf( + Echo, + (pb_type->ports[i].port_power->reverse_scaled ? "%s\t\t\tscaled_by_static_prob_n: %s\n" + : "%s\t\t\tscaled_by_static_prob: %s\n"), + tabs, pb_type->ports[i].port_power->scaled_by_port->name); } } } @@ -629,8 +591,7 @@ static void PrintPb_types_recPower(FILE* Echo, if (pb_type->parent_mode) { /*if NOT top-level pb (all top-level pb has NULL parent_mode, check parent's power method * This is because of values at this level includes all children pb's*/ - if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method - == POWER_METHOD_C_INTERNAL) + if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method == POWER_METHOD_C_INTERNAL) break; } fprintf(Echo, "%s\tpower method: C-internal\n", tabs); @@ -640,15 +601,13 @@ static void PrintPb_types_recPower(FILE* Echo, pb_type->pb_type_power->absolute_power_per_instance.leakage); if (pb_type->pb_type_power->C_internal) - fprintf(Echo, "%s\t\tdynamic c-internal: %e \n", tabs, - pb_type->pb_type_power->C_internal); + fprintf(Echo, "%s\t\tdynamic c-internal: %e \n", tabs, pb_type->pb_type_power->C_internal); break; case POWER_METHOD_ABSOLUTE: if (pb_type->parent_mode) { /*if NOT top-level pb (all top-level pb has NULL parent_mode, check parent's power method * This is because of values at this level includes all children pb's*/ - if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method - == POWER_METHOD_ABSOLUTE) + if (pb_type->parent_mode->parent_pb_type->pb_type_power->estimation_method == POWER_METHOD_ABSOLUTE) break; } fprintf(Echo, "%s\tpower method: absolute\n", tabs); diff --git a/libs/libarchfpga/src/histogram.cpp b/libs/libarchfpga/src/histogram.cpp index aa00ec2ae6b..51cd03a3d2a 100644 --- a/libs/libarchfpga/src/histogram.cpp +++ b/libs/libarchfpga/src/histogram.cpp @@ -9,10 +9,14 @@ #include "histogram.h" -std::vector build_histogram(std::vector values, size_t num_bins, float min_value, float max_value) { +std::vector build_histogram(std::vector values, + size_t num_bins, + float min_value, + float max_value) { std::vector histogram; - if (values.empty()) return histogram; + if (values.empty()) + return histogram; if (std::isnan(min_value)) { min_value = *std::min_element(values.begin(), values.end()); @@ -39,9 +43,7 @@ std::vector build_histogram(std::vector values, size_t n histogram[histogram.size() - 1].max_value = max_value; //Count the values into the buckets - auto comp = [](const HistogramBucket& bucket, float value) { - return bucket.max_value < value; - }; + auto comp = [](const HistogramBucket& bucket, float value) { return bucket.max_value < value; }; for (auto value : values) { //Find the bucket who's max is less than the current slack @@ -89,23 +91,23 @@ std::vector format_histogram(std::vector histogram total_count += bucket.count; } - if (max_count == 0) return lines; //Nothing to do + if (max_count == 0) + return lines; //Nothing to do int count_digits = ceil(log10(max_count)); //Determine the maximum prefix length - size_t bar_len = width - - (18 + 3) //bucket prefix - - count_digits - - 7 //percentage - - 2; //-2 for " |" appended after count + size_t bar_len = width - (18 + 3) //bucket prefix + - count_digits - 7 //percentage + - 2; //-2 for " |" appended after count for (size_t ibucket = 0; ibucket < histogram.size(); ++ibucket) { std::string line; float pct = histogram[ibucket].count / float(total_count) * 100; - line += vtr::string_fmt("[% 9.2g:% 9.2g) %*zu (%5.1f%%) |", histogram[ibucket].min_value, histogram[ibucket].max_value, count_digits, histogram[ibucket].count, pct); + line += vtr::string_fmt("[% 9.2g:% 9.2g) %*zu (%5.1f%%) |", histogram[ibucket].min_value, + histogram[ibucket].max_value, count_digits, histogram[ibucket].count, pct); size_t num_chars = std::round((double(histogram[ibucket].count) / max_count) * bar_len); for (size_t i = 0; i < num_chars; ++i) { diff --git a/libs/libarchfpga/src/histogram.h b/libs/libarchfpga/src/histogram.h index 29a0ae47040..2e3fcb56ae5 100644 --- a/libs/libarchfpga/src/histogram.h +++ b/libs/libarchfpga/src/histogram.h @@ -15,7 +15,10 @@ struct HistogramBucket { size_t count = 0; }; -std::vector build_histogram(std::vector values, size_t num_bins, float min_value = std::numeric_limits::quiet_NaN(), float max_value = std::numeric_limits::quiet_NaN()); +std::vector build_histogram(std::vector values, + size_t num_bins, + float min_value = std::numeric_limits::quiet_NaN(), + float max_value = std::numeric_limits::quiet_NaN()); void print_histogram(std::vector histogram); diff --git a/libs/libarchfpga/src/logic_types.h b/libs/libarchfpga/src/logic_types.h index 4427b85016f..9a565d0d945 100644 --- a/libs/libarchfpga/src/logic_types.h +++ b/libs/libarchfpga/src/logic_types.h @@ -18,22 +18,19 @@ * Logic model data types * A logic model is described by its I/O ports and function name */ -enum PORTS { - IN_PORT, - OUT_PORT, - INOUT_PORT, - ERR_PORT -}; +enum PORTS { IN_PORT, OUT_PORT, INOUT_PORT, ERR_PORT }; struct t_model_ports { - enum PORTS dir = ERR_PORT; /* port direction */ - char* name = nullptr; /* name of this port */ - int size = 0; /* maximum number of pins */ - int min_size = 0; /* minimum number of pins */ - bool is_clock = false; /* clock? */ - bool is_non_clock_global = false; /* not a clock but is a special, global, control signal (eg global asynchronous reset, etc) */ - std::string clock; /* The clock associated with this pin (if the pin is sequential) */ - std::vector combinational_sink_ports; /* The other ports on this model which are combinationally driven by this port */ + enum PORTS dir = ERR_PORT; /* port direction */ + char* name = nullptr; /* name of this port */ + int size = 0; /* maximum number of pins */ + int min_size = 0; /* minimum number of pins */ + bool is_clock = false; /* clock? */ + bool is_non_clock_global + = false; /* not a clock but is a special, global, control signal (eg global asynchronous reset, etc) */ + std::string clock; /* The clock associated with this pin (if the pin is sequential) */ + std::vector + combinational_sink_ports; /* The other ports on this model which are combinationally driven by this port */ t_model_ports* next = nullptr; /* next port */ @@ -49,7 +46,8 @@ struct t_model { vtr::t_linked_vptr* pb_types = nullptr; /* Physical block types that implement this model */ t_model* next = nullptr; /* next model (linked list) */ - bool never_prune = false; /* Don't remove from the netlist even if a block of this type has no output ports used and, therefore, unconnected to the rest of the netlist */ + bool never_prune + = false; /* Don't remove from the netlist even if a block of this type has no output ports used and, therefore, unconnected to the rest of the netlist */ int index = -1; }; diff --git a/libs/libarchfpga/src/main.cpp b/libs/libarchfpga/src/main.cpp index 81b49860c5c..5670a35391c 100644 --- a/libs/libarchfpga/src/main.cpp +++ b/libs/libarchfpga/src/main.cpp @@ -24,8 +24,7 @@ int main(int argc, char** argv) { std::vector logical_block_types; if (argc - 1 != 3) { - printf("Error: Unexpected # of arguments. Expected 3 found %d arguments\n", - argc); + printf("Error: Unexpected # of arguments. Expected 3 found %d arguments\n", argc); print_help(); return 1; } diff --git a/libs/libarchfpga/src/parse_switchblocks.cpp b/libs/libarchfpga/src/parse_switchblocks.cpp index c0b55bcb7fd..587841444a9 100644 --- a/libs/libarchfpga/src/parse_switchblocks.cpp +++ b/libs/libarchfpga/src/parse_switchblocks.cpp @@ -41,16 +41,27 @@ using vtr::t_formula_data; /*---- Functions for Parsing Switchblocks from Architecture ----*/ //Load an XML wireconn specification into a t_wireconn_inf -t_wireconn_inf parse_wireconn(pugi::xml_node node, const pugiutil::loc_data& loc_data, const t_arch_switch_inf* switches, int num_switches); +t_wireconn_inf parse_wireconn(pugi::xml_node node, + const pugiutil::loc_data& loc_data, + const t_arch_switch_inf* switches, + int num_switches); //Process the desired order of a wireconn static void parse_switchpoint_order(const char* order, SwitchPointOrder& switchpoint_order); //Process a wireconn defined in the inline style (using attributes) -void parse_wireconn_inline(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc, const t_arch_switch_inf* switches, int num_switches); +void parse_wireconn_inline(pugi::xml_node node, + const pugiutil::loc_data& loc_data, + t_wireconn_inf& wc, + const t_arch_switch_inf* switches, + int num_switches); //Process a wireconn defined in the multinode style (more advanced specification) -void parse_wireconn_multinode(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc, const t_arch_switch_inf* switches, int num_switches); +void parse_wireconn_multinode(pugi::xml_node node, + const pugiutil::loc_data& loc_data, + t_wireconn_inf& wc, + const t_arch_switch_inf* switches, + int num_switches); //Process a or sub-node of a multinode wireconn t_wire_switchpoints parse_wireconn_from_to_node(pugi::xml_node node, const pugiutil::loc_data& loc_data); @@ -69,7 +80,10 @@ static void parse_num_conns(std::string num_conns, t_wireconn_inf& wireconn); static void set_switch_func_type(SB_Side_Connection& conn, const char* func_type); /* parse switch_override in wireconn */ -static void parse_switch_override(const char* switch_override, t_wireconn_inf& wireconn, const t_arch_switch_inf* switches, int num_switches); +static void parse_switch_override(const char* switch_override, + t_wireconn_inf& wireconn, + const t_arch_switch_inf* switches, + int num_switches); /* checks for correctness of a unidir switchblock. */ static void check_unidir_switchblock(const t_switchblock_inf* sb); @@ -85,7 +99,11 @@ static void check_wireconn(const t_arch* arch, const t_wireconn_inf& wireconn); /*---- Functions for Parsing Switchblocks from Architecture ----*/ /* Reads-in the wire connections specified for the switchblock in the xml arch file */ -void read_sb_wireconns(const t_arch_switch_inf* switches, int num_switches, pugi::xml_node Node, t_switchblock_inf* sb, const pugiutil::loc_data& loc_data) { +void read_sb_wireconns(const t_arch_switch_inf* switches, + int num_switches, + pugi::xml_node Node, + t_switchblock_inf* sb, + const pugiutil::loc_data& loc_data) { /* Make sure that Node is a switchblock */ check_node(Node, "switchblock", loc_data); @@ -100,7 +118,8 @@ void read_sb_wireconns(const t_arch_switch_inf* switches, int num_switches, pugi SubElem = get_first_child(Node, "wireconn", loc_data); } for (int i = 0; i < num_wireconns; i++) { - t_wireconn_inf wc = parse_wireconn(SubElem, loc_data, switches, num_switches); // need to pass in switch info for switch override + t_wireconn_inf wc = parse_wireconn(SubElem, loc_data, switches, + num_switches); // need to pass in switch info for switch override sb->wireconns.push_back(wc); SubElem = SubElem.next_sibling(SubElem.name()); } @@ -108,7 +127,10 @@ void read_sb_wireconns(const t_arch_switch_inf* switches, int num_switches, pugi return; } -t_wireconn_inf parse_wireconn(pugi::xml_node node, const pugiutil::loc_data& loc_data, const t_arch_switch_inf* switches, int num_switches) { +t_wireconn_inf parse_wireconn(pugi::xml_node node, + const pugiutil::loc_data& loc_data, + const t_arch_switch_inf* switches, + int num_switches) { t_wireconn_inf wc; size_t num_children = count_children(node, "from", loc_data, ReqOpt::OPTIONAL); @@ -124,9 +146,16 @@ t_wireconn_inf parse_wireconn(pugi::xml_node node, const pugiutil::loc_data& loc return wc; } -void parse_wireconn_inline(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc, const t_arch_switch_inf* switches, int num_switches) { +void parse_wireconn_inline(pugi::xml_node node, + const pugiutil::loc_data& loc_data, + t_wireconn_inf& wc, + const t_arch_switch_inf* switches, + int num_switches) { //Parse an inline wireconn definition, using attributes - expect_only_attributes(node, {"num_conns", "from_type", "to_type", "from_switchpoint", "to_switchpoint", "from_order", "to_order", "switch_override"}, loc_data); + expect_only_attributes(node, + {"num_conns", "from_type", "to_type", "from_switchpoint", "to_switchpoint", "from_order", + "to_order", "switch_override"}, + loc_data); /* get the connection style */ const char* char_prop = get_attribute(node, "num_conns", loc_data).value(); @@ -159,7 +188,11 @@ void parse_wireconn_inline(pugi::xml_node node, const pugiutil::loc_data& loc_da parse_switch_override(char_prop, wc, switches, num_switches); } -void parse_wireconn_multinode(pugi::xml_node node, const pugiutil::loc_data& loc_data, t_wireconn_inf& wc, const t_arch_switch_inf* switches, int num_switches) { +void parse_wireconn_multinode(pugi::xml_node node, + const pugiutil::loc_data& loc_data, + t_wireconn_inf& wc, + const t_arch_switch_inf* switches, + int num_switches) { expect_only_children(node, {"from", "to"}, loc_data); /* get the connection style */ @@ -189,8 +222,8 @@ void parse_wireconn_multinode(pugi::xml_node node, const pugiutil::loc_data& loc t_wire_switchpoints to_switchpoints = parse_wireconn_from_to_node(child, loc_data); wc.to_switchpoint_set.push_back(to_switchpoints); } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "Unrecognized child node '%s' of parent node '%s'", - node.name(), child.name()); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), + "Unrecognized child node '%s' of parent node '%s'", node.name(), child.name()); } } } @@ -215,8 +248,7 @@ t_wire_switchpoints parse_wireconn_from_to_node(pugi::xml_node node, const pugiu } if (wire_switchpoints.switchpoints.empty()) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "Empty switchpoint specification", - node.name()); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "Empty switchpoint specification", node.name()); } return wire_switchpoints; @@ -255,7 +287,8 @@ static void parse_comma_separated_wire_types(const char* ch, std::vector& wire_switchpoints) { auto points = vtr::split(ch, ","); if (points.empty()) { - archfpga_throw(__FILE__, __LINE__, "parse_comma_separated_wire_points: found empty wireconn wire point entry\n"); + archfpga_throw(__FILE__, __LINE__, + "parse_comma_separated_wire_points: found empty wireconn wire point entry\n"); } for (const auto& point_str : points) { @@ -382,7 +415,10 @@ void read_sb_switchfuncs(pugi::xml_node Node, t_switchblock_inf* sb, const pugiu return; } -static void parse_switch_override(const char* switch_override, t_wireconn_inf& wireconn, const t_arch_switch_inf* switches, int num_switches) { +static void parse_switch_override(const char* switch_override, + t_wireconn_inf& wireconn, + const t_arch_switch_inf* switches, + int num_switches) { // sentinel value to use default driving switch for the receiving wire type if (switch_override == std::string("")) { wireconn.switch_override_indx = DEFAULT_SWITCH; //Default @@ -397,7 +433,8 @@ static void parse_switch_override(const char* switch_override, t_wireconn_inf& w } } // if we haven't found a switch that matched, then throw an error - archfpga_throw(__FILE__, __LINE__, "Unknown switch_override specified in wireconn of custom switch blocks: \"%s\"\n", switch_override); + archfpga_throw(__FILE__, __LINE__, + "Unknown switch_override specified in wireconn of custom switch blocks: \"%s\"\n", switch_override); } /* checks for correctness of switch block read-in from the XML architecture file */ @@ -431,7 +468,9 @@ static void check_unidir_switchblock(const t_switchblock_inf* sb) { for (const t_wireconn_inf& wireconn : sb->wireconns) { for (const t_wire_switchpoints& wire_to_points : wireconn.to_switchpoint_set) { if (wire_to_points.switchpoints.size() > 1 || wire_to_points.switchpoints[0] != 0) { - archfpga_throw(__FILE__, __LINE__, "Unidirectional switch blocks are currently only allowed to drive the start points of wire segments\n"); + archfpga_throw(__FILE__, __LINE__, + "Unidirectional switch blocks are currently only allowed to drive the start points of " + "wire segments\n"); } } } @@ -463,7 +502,9 @@ static void check_bidir_switchblock(const t_permutation_map* permutation_map) { conn.set_sides(to_side, from_side); it = (*permutation_map).find(conn); if (it != (*permutation_map).end()) { - archfpga_throw(__FILE__, __LINE__, "If a bidirectional switch block specifies a connection from side1->side2, no connection should be specified from side2->side1 as it is implicit.\n"); + archfpga_throw(__FILE__, __LINE__, + "If a bidirectional switch block specifies a connection from side1->side2, no " + "connection should be specified from side2->side1 as it is implicit.\n"); } } } @@ -479,16 +520,19 @@ static void check_wireconn(const t_arch* arch, const t_wireconn_inf& wireconn) { //Make sure the segment exists const t_segment_inf* seg_info = find_segment(arch, seg_name); if (!seg_info) { - archfpga_throw(__FILE__, __LINE__, "Failed to find segment '%s' for from type specification\n", seg_name.c_str()); + archfpga_throw(__FILE__, __LINE__, "Failed to find segment '%s' for from type specification\n", + seg_name.c_str()); } //Check that the specified switch points are valid for (int switchpoint : wire_switchpoints.switchpoints) { if (switchpoint < 0) { - archfpga_throw(__FILE__, __LINE__, "Invalid from_switchpoint '%d' (must be >= 0)\n", switchpoint, seg_name.c_str()); + archfpga_throw(__FILE__, __LINE__, "Invalid from_switchpoint '%d' (must be >= 0)\n", + switchpoint, seg_name.c_str()); } if (switchpoint >= seg_info->length) { - archfpga_throw(__FILE__, __LINE__, "Invalid from_switchpoints '%d' (must be < %d)\n", switchpoint, seg_info->length); + archfpga_throw(__FILE__, __LINE__, "Invalid from_switchpoints '%d' (must be < %d)\n", + switchpoint, seg_info->length); } //TODO: check that points correspond to valid sb locations } @@ -500,16 +544,19 @@ static void check_wireconn(const t_arch* arch, const t_wireconn_inf& wireconn) { //Make sure the segment exists const t_segment_inf* seg_info = find_segment(arch, seg_name); if (!seg_info) { - archfpga_throw(__FILE__, __LINE__, "Failed to find segment '%s' for to type specification\n", seg_name.c_str()); + archfpga_throw(__FILE__, __LINE__, "Failed to find segment '%s' for to type specification\n", + seg_name.c_str()); } //Check that the specified switch points are valid for (int switchpoint : wire_switchpoints.switchpoints) { if (switchpoint < 0) { - archfpga_throw(__FILE__, __LINE__, "Invalid to_switchpoint '%d' (must be >= 0)\n", switchpoint, seg_name.c_str()); + archfpga_throw(__FILE__, __LINE__, "Invalid to_switchpoint '%d' (must be >= 0)\n", + switchpoint, seg_name.c_str()); } if (switchpoint >= seg_info->length) { - archfpga_throw(__FILE__, __LINE__, "Invalid to_switchpoints '%d' (must be < %d)\n", switchpoint, seg_info->length); + archfpga_throw(__FILE__, __LINE__, "Invalid to_switchpoints '%d' (must be < %d)\n", + switchpoint, seg_info->length); } //TODO: check that points correspond to valid sb locations } diff --git a/libs/libarchfpga/src/parse_switchblocks.h b/libs/libarchfpga/src/parse_switchblocks.h index a7686031818..745fa2992dd 100644 --- a/libs/libarchfpga/src/parse_switchblocks.h +++ b/libs/libarchfpga/src/parse_switchblocks.h @@ -11,12 +11,18 @@ void read_sb_switchfuncs(pugi::xml_node Node, t_switchblock_inf* sb, const pugiutil::loc_data& loc_data); /* Reads-in the wire connections specified for the switchblock in the xml arch file */ -void read_sb_wireconns(const t_arch_switch_inf* switches, int num_switches, pugi::xml_node Node, t_switchblock_inf* sb, const pugiutil::loc_data& loc_data); +void read_sb_wireconns(const t_arch_switch_inf* switches, + int num_switches, + pugi::xml_node Node, + t_switchblock_inf* sb, + const pugiutil::loc_data& loc_data); /* checks for correctness of switch block read-in from the XML architecture file */ void check_switchblock(const t_switchblock_inf* sb, const t_arch* arch); /* returns integer result according to the specified formula and data */ -int get_sb_formula_raw_result(vtr::FormulaParser& formula_parser, const char* formula, const vtr::t_formula_data& mydata); +int get_sb_formula_raw_result(vtr::FormulaParser& formula_parser, + const char* formula, + const vtr::t_formula_data& mydata); #endif /* PARSE_SWITCHBLOCKS_H */ diff --git a/libs/libarchfpga/src/physical_types.cpp b/libs/libarchfpga/src/physical_types.cpp index dfa110f393f..c5b5f13b7f6 100644 --- a/libs/libarchfpga/src/physical_types.cpp +++ b/libs/libarchfpga/src/physical_types.cpp @@ -16,21 +16,13 @@ constexpr int t_arch_switch_inf::UNDEFINED_FANIN; * t_arch_switch_inf */ -SwitchType t_arch_switch_inf::type() const { - return type_; -} +SwitchType t_arch_switch_inf::type() const { return type_; } -bool t_arch_switch_inf::buffered() const { - return switch_type_is_buffered(type()); -} +bool t_arch_switch_inf::buffered() const { return switch_type_is_buffered(type()); } -bool t_arch_switch_inf::configurable() const { - return switch_type_is_configurable(type()); -} +bool t_arch_switch_inf::configurable() const { return switch_type_is_configurable(type()); } -e_directionality t_arch_switch_inf::directionality() const { - return switch_type_directionaity(type()); -} +e_directionality t_arch_switch_inf::directionality() const { return switch_type_directionaity(type()); } float t_arch_switch_inf::Tdel(int fanin) const { if (fixed_Tdel()) { @@ -43,61 +35,41 @@ float t_arch_switch_inf::Tdel(int fanin) const { } } -bool t_arch_switch_inf::fixed_Tdel() const { - return Tdel_map_.size() == 1 && Tdel_map_.count(UNDEFINED_FANIN); -} +bool t_arch_switch_inf::fixed_Tdel() const { return Tdel_map_.size() == 1 && Tdel_map_.count(UNDEFINED_FANIN); } -void t_arch_switch_inf::set_Tdel(int fanin, float delay) { - Tdel_map_[fanin] = delay; -} +void t_arch_switch_inf::set_Tdel(int fanin, float delay) { Tdel_map_[fanin] = delay; } -void t_arch_switch_inf::set_type(SwitchType type_val) { - type_ = type_val; -} +void t_arch_switch_inf::set_type(SwitchType type_val) { type_ = type_val; } /* * t_rr_switch_inf */ -SwitchType t_rr_switch_inf::type() const { - return type_; -} +SwitchType t_rr_switch_inf::type() const { return type_; } -bool t_rr_switch_inf::buffered() const { - return switch_type_is_buffered(type()); -} +bool t_rr_switch_inf::buffered() const { return switch_type_is_buffered(type()); } -bool t_rr_switch_inf::configurable() const { - return switch_type_is_configurable(type()); -} +bool t_rr_switch_inf::configurable() const { return switch_type_is_configurable(type()); } -void t_rr_switch_inf::set_type(SwitchType type_val) { - type_ = type_val; -} +void t_rr_switch_inf::set_type(SwitchType type_val) { type_ = type_val; } static bool switch_type_is_buffered(SwitchType type) { //Muxes and Tristates isolate thier input and output into //seperate DC connected sub-circuits - return type == SwitchType::MUX - || type == SwitchType::TRISTATE - || type == SwitchType::BUFFER; + return type == SwitchType::MUX || type == SwitchType::TRISTATE || type == SwitchType::BUFFER; } static bool switch_type_is_configurable(SwitchType type) { //Shorts and buffers are non-configurable - return !(type == SwitchType::SHORT - || type == SwitchType::BUFFER); + return !(type == SwitchType::SHORT || type == SwitchType::BUFFER); } static e_directionality switch_type_directionaity(SwitchType type) { - if (type == SwitchType::SHORT - || type == SwitchType::PASS_GATE) { + if (type == SwitchType::SHORT || type == SwitchType::PASS_GATE) { //Shorts and pass gates can conduct in either direction return e_directionality::BI_DIRECTIONAL; } else { - VTR_ASSERT_SAFE(type == SwitchType::MUX - || type == SwitchType::TRISTATE - || type == SwitchType::BUFFER); + VTR_ASSERT_SAFE(type == SwitchType::MUX || type == SwitchType::TRISTATE || type == SwitchType::BUFFER); //Buffered switches can only drive in one direction return e_directionality::UNI_DIRECTIONAL; } @@ -132,17 +104,13 @@ int t_physical_tile_type::get_sub_tile_loc_from_pin(int pin_num) const { return OPEN; } -bool t_physical_tile_type::is_empty() const { - return std::string(name) == std::string(EMPTY_BLOCK_NAME); -} +bool t_physical_tile_type::is_empty() const { return std::string(name) == std::string(EMPTY_BLOCK_NAME); } /* * t_logical_block_type */ -bool t_logical_block_type::is_empty() const { - return std::string(name) == std::string(EMPTY_BLOCK_NAME); -} +bool t_logical_block_type::is_empty() const { return std::string(name) == std::string(EMPTY_BLOCK_NAME); } /** * t_pb_graph_node @@ -207,7 +175,8 @@ std::string t_pb_graph_pin::to_string(const bool full_description) const { std::string pin_string = parent_name + "[" + parent_index + "]"; pin_string += "." + port_name + "[" + pin_index + "]"; - if (!full_description) return pin_string; + if (!full_description) + return pin_string; // Traverse upward through the pb_type hierarchy, constructing // name that represents the whole hierarchy to reach this pin. diff --git a/libs/libarchfpga/src/physical_types.h b/libs/libarchfpga/src/physical_types.h index 1f2dc44c7c9..5860c960bed 100644 --- a/libs/libarchfpga/src/physical_types.h +++ b/libs/libarchfpga/src/physical_types.h @@ -108,14 +108,9 @@ class t_metadata_value { }; // Metadata storage dictionary. -struct t_metadata_dict : vtr::flat_map< - vtr::interned_string, - std::vector, - vtr::interned_string_less> { +struct t_metadata_dict : vtr::flat_map, vtr::interned_string_less> { // Is this key present in the map? - inline bool has(vtr::interned_string key) const { - return this->count(key) >= 1; - } + inline bool has(vtr::interned_string key) const { return this->count(key) >= 1; } // Get all metadata values matching key. // @@ -157,18 +152,10 @@ struct t_metadata_dict : vtr::flat_map< /* Pins describe I/O into clustered logic block. * A pin may be unconnected, driving a net or in the fanout, respectively. */ -enum e_pin_type { - OPEN = -1, - DRIVER = 0, - RECEIVER = 1 -}; +enum e_pin_type { OPEN = -1, DRIVER = 0, RECEIVER = 1 }; /* Type of interconnect within complex block: Complete for everything connected (full crossbar), direct for one-to-one connections, and mux for many-to-one connections */ -enum e_interconnect { - COMPLETE_INTERC = 1, - DIRECT_INTERC = 2, - MUX_INTERC = 3 -}; +enum e_interconnect { COMPLETE_INTERC = 1, DIRECT_INTERC = 2, MUX_INTERC = 3 }; /* Orientations. */ enum e_side : unsigned char { @@ -182,36 +169,28 @@ enum e_side : unsigned char { NUM_3D_SIDES = 6, }; -constexpr std::array TOTAL_2D_SIDES = {{TOP, RIGHT, BOTTOM, LEFT}}; //Set of all side orientations -constexpr std::array TOTAL_2D_SIDE_STRINGS = {{"TOP", "RIGHT", "BOTTOM", "LEFT"}}; //String versions of side orientations +constexpr std::array TOTAL_2D_SIDES = {{TOP, RIGHT, BOTTOM, LEFT}}; //Set of all side orientations +constexpr std::array TOTAL_2D_SIDE_STRINGS + = {{"TOP", "RIGHT", "BOTTOM", "LEFT"}}; //String versions of side orientations -constexpr std::array TOTAL_3D_SIDES = {{TOP, RIGHT, BOTTOM, LEFT, ABOVE, UNDER}}; //Set of all side orientations including different layers -constexpr std::array TOTAL_3D_SIDE_STRINGS = {{"TOP", "RIGHT", "BOTTOM", "LEFT", "ABOVE", "UNDER"}}; //String versions of side orientations including different layers +constexpr std::array TOTAL_3D_SIDES + = {{TOP, RIGHT, BOTTOM, LEFT, ABOVE, UNDER}}; //Set of all side orientations including different layers +constexpr std::array TOTAL_3D_SIDE_STRINGS + = {{"TOP", "RIGHT", "BOTTOM", "LEFT", "ABOVE", + "UNDER"}}; //String versions of side orientations including different layers /* pin location distributions */ -enum class e_pin_location_distr { - SPREAD, - PERIMETER, - SPREAD_INPUTS_PERIMETER_OUTPUTS, - CUSTOM -}; +enum class e_pin_location_distr { SPREAD, PERIMETER, SPREAD_INPUTS_PERIMETER_OUTPUTS, CUSTOM }; /* pb_type class */ -enum e_pb_type_class { - UNKNOWN_CLASS = 0, - LUT_CLASS = 1, - LATCH_CLASS = 2, - MEMORY_CLASS = 3, - NUM_CLASSES -}; +enum e_pb_type_class { UNKNOWN_CLASS = 0, LUT_CLASS = 1, LATCH_CLASS = 2, MEMORY_CLASS = 3, NUM_CLASSES }; // Set of all pb_type classes -constexpr std::array PB_TYPE_CLASSES = { - {UNKNOWN_CLASS, LUT_CLASS, LATCH_CLASS, MEMORY_CLASS}}; +constexpr std::array PB_TYPE_CLASSES + = {{UNKNOWN_CLASS, LUT_CLASS, LATCH_CLASS, MEMORY_CLASS}}; // String versions of pb_type class values -constexpr std::array PB_TYPE_CLASS_STRING = { - {"unknown", "lut", "flipflop", "memory"}}; +constexpr std::array PB_TYPE_CLASS_STRING = {{"unknown", "lut", "flipflop", "memory"}}; /* Annotations for pin-to-pin connections */ enum e_pin_to_pin_annotation_type { @@ -219,10 +198,7 @@ enum e_pin_to_pin_annotation_type { E_ANNOT_PIN_TO_PIN_CAPACITANCE, E_ANNOT_PIN_TO_PIN_PACK_PATTERN }; -enum e_pin_to_pin_annotation_format { - E_ANNOT_PIN_TO_PIN_MATRIX = 0, - E_ANNOT_PIN_TO_PIN_CONSTANT -}; +enum e_pin_to_pin_annotation_format { E_ANNOT_PIN_TO_PIN_MATRIX = 0, E_ANNOT_PIN_TO_PIN_CONSTANT }; enum e_pin_to_pin_delay_annotations { E_ANNOT_PIN_TO_PIN_DELAY_MIN = 0, //pb interconnect or primitive combinational max delay E_ANNOT_PIN_TO_PIN_DELAY_MAX, //pb interconnect or primitive combinational max delay @@ -231,12 +207,8 @@ enum e_pin_to_pin_delay_annotations { E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN, //primitive min clock-to-q delay E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MAX, //primitive max clock-to-q delay }; -enum e_pin_to_pin_capacitance_annotations { - E_ANNOT_PIN_TO_PIN_CAPACITANCE_C = 0 -}; -enum e_pin_to_pin_pack_pattern_annotations { - E_ANNOT_PIN_TO_PIN_PACK_PATTERN_NAME = 0 -}; +enum e_pin_to_pin_capacitance_annotations { E_ANNOT_PIN_TO_PIN_CAPACITANCE_C = 0 }; +enum e_pin_to_pin_pack_pattern_annotations { E_ANNOT_PIN_TO_PIN_PACK_PATTERN_NAME = 0 }; /* Power Estimation type for a PB */ enum e_power_estimation_method_ { @@ -388,10 +360,7 @@ struct t_grid_loc_def { // that come from a common definition. }; -enum GridDefType { - AUTO, - FIXED -}; +enum GridDefType { AUTO, FIXED }; struct t_layer_def { std::vector loc_defs; //The list of block location definitions for this layer specification @@ -452,8 +421,8 @@ struct t_power_usage { /*************************************************************************************************/ enum class PortEquivalence { - NONE, //The pins within the port are not equivalent and can not be swapped - FULL, //The pins within the port are fully equivalent and can be freely swapped (e.g. logically equivalent or modelling a full-crossbar) + NONE, //The pins within the port are not equivalent and can not be swapped + FULL, //The pins within the port are fully equivalent and can be freely swapped (e.g. logically equivalent or modelling a full-crossbar) INSTANCE //The port is equivalent with instance swapping (more restrictive that FULL) }; @@ -475,9 +444,7 @@ struct t_class_range { int low = 0; int high = 0; // Returns the total number of classes - int total_num() const { - return high - low + 1; - } + int total_num() const { return high - low + 1; } t_class_range() = default; @@ -491,9 +458,7 @@ struct t_pin_range { int low = 0; int high = 0; // Returns the total number of pins - int total_num() const { - return high - low + 1; - } + int total_num() const { return high - low + 1; } t_pin_range() = default; @@ -681,8 +646,9 @@ struct t_physical_tile_type { std::vector is_ignored_pin; // [0..num_pins-1] std::vector is_pin_global; // [0..num_pins-1] - std::unordered_map> on_tile_pin_num_to_pb_pin; // [root_pin_physical_num][logical_block] -> t_pb_graph_pin* - std::unordered_map pin_num_to_pb_pin; // [intra_tile_pin_physical_num] -> t_pb_graph_pin + std::unordered_map> + on_tile_pin_num_to_pb_pin; // [root_pin_physical_num][logical_block] -> t_pb_graph_pin* + std::unordered_map pin_num_to_pb_pin; // [intra_tile_pin_physical_num] -> t_pb_graph_pin std::vector fc_specs; @@ -702,7 +668,8 @@ struct t_physical_tile_type { /* Unordered map indexed by the logical block index. * tile_block_pin_directs_map[logical block index][logical block pin] -> physical tile pin */ - std::unordered_map>> tile_block_pin_directs_map; + std::unordered_map>> + tile_block_pin_directs_map; /* Returns the indices of pins that contain a clock for this physical logic block */ std::vector get_clock_pins_indices() const; @@ -740,13 +707,9 @@ struct t_capacity_range { high = high_cap; } - bool is_in_range(int cap) const { - return cap >= low and cap <= high; - } + bool is_in_range(int cap) const { return cap >= low and cap <= high; } - int total() const { - return high - low + 1; - } + int total() const { return high - low + 1; } }; /** @@ -790,8 +753,10 @@ struct t_sub_tile { ///> indices ranging from 4 to 7. t_class_range class_range; // Range of the root-level classes - std::vector> primitive_class_range; // [rel_cap][logical_block_ptr] -> class_range - std::vector> intra_pin_range; // [rel_cap][logical_block_ptr] -> intra_pin_range + std::vector> + primitive_class_range; // [rel_cap][logical_block_ptr] -> class_range + std::vector> + intra_pin_range; // [rel_cap][logical_block_ptr] -> intra_pin_range int num_phy_pins = 0; @@ -805,17 +770,11 @@ struct t_sub_tile { struct t_logical_pin { int pin = -1; - t_logical_pin(int value) { - pin = value; - } + t_logical_pin(int value) { pin = value; } - bool operator==(const t_logical_pin o) const { - return pin == o.pin; - } + bool operator==(const t_logical_pin o) const { return pin == o.pin; } - bool operator<(const t_logical_pin o) const { - return pin < o.pin; - } + bool operator<(const t_logical_pin o) const { return pin < o.pin; } }; /** A physical pin defines the pin index of a physical tile type (i.e. a grid tile type) @@ -825,17 +784,11 @@ struct t_logical_pin { struct t_physical_pin { int pin = -1; - t_physical_pin(int value) { - pin = value; - } + t_physical_pin(int value) { pin = value; } - bool operator==(const t_physical_pin o) const { - return pin == o.pin; - } + bool operator==(const t_physical_pin o) const { return pin == o.pin; } - bool operator<(const t_physical_pin o) const { - return pin < o.pin; - } + bool operator<(const t_physical_pin o) const { return pin < o.pin; } }; /** @@ -859,9 +812,7 @@ struct t_physical_tile_loc { , layer_num(layer_num_val) {} // Returns true if this type location layer_num/x/y is not equal to OPEN - operator bool() const { - return !(x == OPEN || y == OPEN || layer_num == OPEN); - } + operator bool() const { return !(x == OPEN || y == OPEN || layer_num == OPEN); } }; /** Describes I/O and clock ports of a physical tile type @@ -943,10 +894,13 @@ struct t_logical_block_type { std::vector equivalent_tiles; ///>List of physical tiles at which one could ///>place this type of netlist block. - std::unordered_map pin_logical_num_to_pb_pin_mapping; /* pin_logical_num_to_pb_pin_mapping[pin logical number] -> pb_graph_pin ptr} */ - std::unordered_map primitive_pb_pin_to_logical_class_num_mapping; /* primitive_pb_pin_to_logical_class_num_mapping[pb_graph_pin ptr] -> class logical number */ - std::vector primitive_logical_class_inf; /* primitive_logical_class_inf[class_logical_number] -> class */ - std::unordered_map primitive_pb_graph_node_class_range; /* primitive_pb_graph_node_class_range[primitive_pb_graph_node ptr] -> class range for that primitive*/ + std::unordered_map + pin_logical_num_to_pb_pin_mapping; /* pin_logical_num_to_pb_pin_mapping[pin logical number] -> pb_graph_pin ptr} */ + std::unordered_map + primitive_pb_pin_to_logical_class_num_mapping; /* primitive_pb_pin_to_logical_class_num_mapping[pb_graph_pin ptr] -> class logical number */ + std::vector primitive_logical_class_inf; /* primitive_logical_class_inf[class_logical_number] -> class */ + std::unordered_map + primitive_pb_graph_node_class_range; /* primitive_pb_graph_node_class_range[primitive_pb_graph_node ptr] -> class range for that primitive*/ // Is this t_logical_block_type empty? bool is_empty() const; @@ -1102,7 +1056,8 @@ struct t_interconnect { int num_annotations = 0; bool infer_annotations = false; - int line_num = 0; /* Interconnect is processed later, need to know what line number it messed up on to give proper error message */ + int line_num + = 0; /* Interconnect is processed later, need to know what line number it messed up on to give proper error message */ int parent_mode_index = 0; @@ -1159,8 +1114,9 @@ struct t_pb_type_power { float C_internal; /*Internal capacitance of the pb */ int leakage_default_mode; /* Default mode for leakage analysis, if block has no set mode */ - t_power_usage power_usage; /* Total power usage of this pb type */ - t_power_usage power_usage_bufs_wires; /* Power dissipated in local buffers and wire switching (Subset of total power) */ + t_power_usage power_usage; /* Total power usage of this pb type */ + t_power_usage + power_usage_bufs_wires; /* Power dissipated in local buffers and wire switching (Subset of total power) */ }; struct t_interconnect_power { @@ -1248,8 +1204,8 @@ struct t_pin_to_pin_annotation { * flat_site_index : Index of this primitive site within its primitive type within this cluster type. * Values are in [0...total_primitive_count-1], e.g. if there are 10 ALMs per cluster, 2 FFS * and 2 LUTs per ALM, then flat site indices for FFs would run from 0 to 19, and flat site - indices for LUTs would run from 0 to 19. This member is only used by nodes corresponding - to primitive sites. It is used when reconstructing clusters from a flat placement file. + * indices for LUTs would run from 0 to 19. This member is only used by nodes corresponding + * to primitive sites. It is used when reconstructing clusters from a flat placement file. * illegal_modes : vector containing illegal modes that result in conflicts during routing */ class t_pb_graph_node { @@ -1303,7 +1259,7 @@ class t_pb_graph_node { int total_pb_pins; /* only valid for top-level */ - void* temp_scratch_pad; /* temporary data, useful for keeping track of things when traversing data structure */ + void* temp_scratch_pad; /* temporary data, useful for keeping track of things when traversing data structure */ int* input_pin_class_size; /* Stores the number of pins that belong to a particular input pin class */ int num_input_pin_class; /* number of input pin classes that this pb_graph_node has */ @@ -1313,7 +1269,6 @@ class t_pb_graph_node { int total_primitive_count; /* total number of this primitive type in the cluster */ int flat_site_index; /* index of this primitive within sites of its type in this cluster */ - /* Interconnect instances for this pb * Only used for power */ @@ -1363,7 +1318,8 @@ class t_pb_graph_pin { std::vector input_edges; /* [0..num_input_edges] */ int num_input_edges = 0; // This map is initialized only if flat_routing is enabled - std::unordered_map sink_pin_edge_idx_map; /* [t_pb_graph_pin*] -> edge_idx - This is the index of the corresponding edge stored in output_edges vector */ + std::unordered_map + sink_pin_edge_idx_map; /* [t_pb_graph_pin*] -> edge_idx - This is the index of the corresponding edge stored in output_edges vector */ std::vector output_edges; /* [0..num_output_edges] */ int num_output_edges = 0; @@ -1376,26 +1332,31 @@ class t_pb_graph_pin { enum e_pb_graph_pin_type type = PB_PIN_NORMAL; /* The type of this pin (sequential, i/o etc.) */ /* sequential timing information */ - float tsu = std::numeric_limits::quiet_NaN(); /* For sequential logic elements the setup time */ - float thld = std::numeric_limits::quiet_NaN(); /* For sequential logic elements the hold time */ - float tco_min = std::numeric_limits::quiet_NaN(); /* For sequential logic elements the minimum clock to output time */ - float tco_max = std::numeric_limits::quiet_NaN(); /* For sequential logic elements the maximum clock to output time */ - t_pb_graph_pin* associated_clock_pin = nullptr; /* For sequentail elements, the associated clock */ + float tsu = std::numeric_limits::quiet_NaN(); /* For sequential logic elements the setup time */ + float thld = std::numeric_limits::quiet_NaN(); /* For sequential logic elements the hold time */ + float tco_min + = std::numeric_limits::quiet_NaN(); /* For sequential logic elements the minimum clock to output time */ + float tco_max + = std::numeric_limits::quiet_NaN(); /* For sequential logic elements the maximum clock to output time */ + t_pb_graph_pin* associated_clock_pin = nullptr; /* For sequentail elements, the associated clock */ /* This member is used when flat-routing and router_opt_choke_points are enabled. * It is used to identify choke points. * This is only valid for IPINs, and it only contain the pins that are reachable to the pin by a forwarding path. * It doesn't take into account feed-back connection. * */ - std::unordered_set connected_sinks_ptc; /* ptc numbers of sinks which are directly or indirectly connected to this pin */ + std::unordered_set + connected_sinks_ptc; /* ptc numbers of sinks which are directly or indirectly connected to this pin */ /* combinational timing information */ - int num_pin_timing = 0; /* Number of ipin to opin timing edges*/ - std::vector pin_timing; /* timing edge sink pins [0..num_pin_timing-1]*/ - std::vector pin_timing_del_max; /* primitive ipin to opin max-delay [0..num_pin_timing-1]*/ - std::vector pin_timing_del_min; /* primitive ipin to opin min-delay [0..num_pin_timing-1]*/ - int num_pin_timing_del_max_annotated = 0; //The list of valid pin_timing_del_max entries runs from [0..num_pin_timing_del_max_annotated-1] - int num_pin_timing_del_min_annotated = 0; //The list of valid pin_timing_del_max entries runs from [0..num_pin_timing_del_min_annotated-1] + int num_pin_timing = 0; /* Number of ipin to opin timing edges*/ + std::vector pin_timing; /* timing edge sink pins [0..num_pin_timing-1]*/ + std::vector pin_timing_del_max; /* primitive ipin to opin max-delay [0..num_pin_timing-1]*/ + std::vector pin_timing_del_min; /* primitive ipin to opin min-delay [0..num_pin_timing-1]*/ + int num_pin_timing_del_max_annotated + = 0; //The list of valid pin_timing_del_max entries runs from [0..num_pin_timing_del_max_annotated-1] + int num_pin_timing_del_min_annotated + = 0; //The list of valid pin_timing_del_max entries runs from [0..num_pin_timing_del_min_annotated-1] /* Applies to clusters only */ int pin_class = 0; @@ -1403,8 +1364,10 @@ class t_pb_graph_pin { /* Applies to pins of primitive only */ int* parent_pin_class = nullptr; /* [0..depth-1] the grouping of pins that this particular pin belongs to */ /* Applies to output pins of primitives only */ - t_pb_graph_pin*** list_of_connectable_input_pin_ptrs = nullptr; /* [0..depth-1][0..num_connectable_primitive_input_pins-1] what input pins this output can connect to without exiting cluster at given depth */ - int* num_connectable_primitive_input_pins = nullptr; /* [0..depth-1] number of input pins that this output pin can reach without exiting cluster at given depth */ + t_pb_graph_pin*** list_of_connectable_input_pin_ptrs + = nullptr; /* [0..depth-1][0..num_connectable_primitive_input_pins-1] what input pins this output can connect to without exiting cluster at given depth */ + int* num_connectable_primitive_input_pins + = nullptr; /* [0..depth-1] number of input pins that this output pin can reach without exiting cluster at given depth */ bool is_forced_connection = false; /* This output pin connects to one and only one input pin */ @@ -1414,14 +1377,10 @@ class t_pb_graph_pin { public: // Returns true if this pin belongs to a primitive block like // a LUT or FF, instead of a cluster-level block like a CLB. - bool is_primitive_pin() const { - return this->parent_node->is_primitive(); - } + bool is_primitive_pin() const { return this->parent_node->is_primitive(); } // Returns true if this pin belongs to a root pb_block which is a pb_block // that has no parent block. For example, pins of a CLB, IO, DSP, etc. - bool is_root_block_pin() const { - return this->parent_node->is_root(); - } + bool is_root_block_pin() const { return this->parent_node->is_root(); } // This function returns a string that contains the name of the pin // and the entire sequence of pb_types in the hierarchy from the block // of this pin back to the cluster-level (top-level) pb_type in the @@ -1508,12 +1467,7 @@ struct t_pb_graph_pin_power { /* Description of routing channel distribution across the FPGA, only available for global routing * Width is standard dev. for Gaussian. xpeak is where peak * * occurs. dc is the dc offset for Gaussian and pulse waveforms. */ -enum e_stat { - UNIFORM, - GAUSSIAN, - PULSE, - DELTA -}; +enum e_stat { UNIFORM, GAUSSIAN, PULSE, DELTA }; struct t_chan { enum e_stat type; float peak; @@ -1529,18 +1483,11 @@ struct t_chan_width_dist { t_chan chan_y_dist; }; -enum e_directionality { - UNI_DIRECTIONAL, - BI_DIRECTIONAL -}; +enum e_directionality { UNI_DIRECTIONAL, BI_DIRECTIONAL }; /* X_AXIS: Data that describes an x-directed wire segment (CHANX) * * Y_AXIS: Data that describes an y-directed wire segment (CHANY) * * BOTH_AXIS: Data that can be applied to both x-directed and y-directed wire segment */ -enum e_parallel_axis { - X_AXIS, - Y_AXIS, - BOTH_AXIS -}; +enum e_parallel_axis { X_AXIS, Y_AXIS, BOTH_AXIS }; /** * @brief An attribute of a segment that defines the general category of the wire segment type. @@ -1549,26 +1496,14 @@ enum e_parallel_axis { * - `GCLK`: A segment type that is part of the global routing network for clocks. * - `GENERAL`: Describes a segment type that is part of the regular routing network. */ -enum class SegResType { - GCLK = 0, - GENERAL = 1, - NUM_RES_TYPES -}; +enum class SegResType { GCLK = 0, GENERAL = 1, NUM_RES_TYPES }; -constexpr std::array(SegResType::NUM_RES_TYPES)> RES_TYPE_STRING = {{"GCLK", "GENERAL"}}; //String versions of segment resource types +constexpr std::array(SegResType::NUM_RES_TYPES)> RES_TYPE_STRING + = {{"GCLK", "GENERAL"}}; //String versions of segment resource types -enum e_switch_block_type { - SUBSET, - WILTON, - UNIVERSAL, - FULL, - CUSTOM -}; +enum e_switch_block_type { SUBSET, WILTON, UNIVERSAL, FULL, CUSTOM }; typedef enum e_switch_block_type t_switch_block_type; -enum e_Fc_type { - ABSOLUTE, - FRACTIONAL -}; +enum e_Fc_type { ABSOLUTE, FRACTIONAL }; /* Lists all the important information about a certain segment type. Only * * used if the route_type is DETAILED. [0 .. det_routing_arch.num_segment] * @@ -1651,7 +1586,12 @@ struct t_segment_inf { }; inline bool operator==(const t_segment_inf& a, const t_segment_inf& b) { - return a.name == b.name && a.frequency == b.frequency && a.length == b.length && a.arch_wire_switch == b.arch_wire_switch && a.arch_opin_switch == b.arch_opin_switch && a.arch_opin_between_dice_switch == b.arch_opin_between_dice_switch && a.frac_cb == b.frac_cb && a.frac_sb == b.frac_sb && a.longline == b.longline && a.Rmetal == b.Rmetal && a.Cmetal == b.Cmetal && a.directionality == b.directionality && a.parallel_axis == b.parallel_axis && a.cb == b.cb && a.sb == b.sb; + return a.name == b.name && a.frequency == b.frequency && a.length == b.length + && a.arch_wire_switch == b.arch_wire_switch && a.arch_opin_switch == b.arch_opin_switch + && a.arch_opin_between_dice_switch == b.arch_opin_between_dice_switch && a.frac_cb == b.frac_cb + && a.frac_sb == b.frac_sb && a.longline == b.longline && a.Rmetal == b.Rmetal && a.Cmetal == b.Cmetal + && a.directionality == b.directionality && a.parallel_axis == b.parallel_axis && a.cb == b.cb + && a.sb == b.sb; } /*provide hashing for t_segment_inf to enable the use of many std containers. @@ -1660,8 +1600,7 @@ inline bool operator==(const t_segment_inf& a, const t_segment_inf& b) { struct t_hash_segment_inf { size_t operator()(const t_segment_inf& seg_inf) const noexcept { size_t result; - result = ((((std::hash()(seg_inf.name) - ^ std::hash()(seg_inf.frequency) << 10) + result = ((((std::hash()(seg_inf.name) ^ std::hash()(seg_inf.frequency) << 10) ^ std::hash()(seg_inf.length) << 20) ^ std::hash()((int)seg_inf.arch_opin_switch) << 30)); return result; @@ -1676,7 +1615,8 @@ enum class SwitchType { INVALID, //Unspecified, usually an error NUM_SWITCH_TYPES }; -constexpr std::array SWITCH_TYPE_STRINGS = {{"MUX", "TRISTATE", "PASS_GATE", "SHORT", "BUFFER", "INVALID"}}; +constexpr std::array SWITCH_TYPE_STRINGS + = {{"MUX", "TRISTATE", "PASS_GATE", "SHORT", "BUFFER", "INVALID"}}; /* Constant/Reserved names for switches in architecture XML * Delayless switch: @@ -1692,10 +1632,7 @@ constexpr const char* VPR_DELAYLESS_SWITCH_NAME = "__vpr_delayless_switch__"; /* An intracluster switch automatically added to the RRG by the flat router. */ constexpr const char* VPR_INTERNAL_SWITCH_NAME = "__vpr_intra_cluster_switch__"; -enum class BufferSize { - AUTO, - ABSOLUTE -}; +enum class BufferSize { AUTO, ABSOLUTE }; /* Lists all the important information about a switch type read from the * * architecture file. * @@ -1877,12 +1814,23 @@ struct t_wire_switchpoints { /* Used to list information about a set of track segments that should connect through a switchblock */ struct t_wireconn_inf { - std::vector from_switchpoint_set; //The set of segment/wirepoints representing the 'from' set (union of all t_wire_switchpoints in vector) - std::vector to_switchpoint_set; //The set of segment/wirepoints representing the 'to' set (union of all t_wire_switchpoints in vector) - SwitchPointOrder from_switchpoint_order = SwitchPointOrder::FIXED; //The desired from_switchpoint_set ordering - SwitchPointOrder to_switchpoint_order = SwitchPointOrder::FIXED; //The desired to_switchpoint_set ordering - int switch_override_indx = DEFAULT_SWITCH; // index in switch array of the switch used to override wire_switch of the 'to' set. - // DEFAULT_SWITCH is a sentinel value (i.e. the usual driving switch from a wire for the receiving wire will be used) + ///The set of segment/wirepoints representing the 'from' set (union of all t_wire_switchpoints in vector) + std::vector from_switchpoint_set; + + ///The set of segment/wirepoints representing the 'to' set (union of all t_wire_switchpoints in vector) + std::vector to_switchpoint_set; + + ///The desired from_switchpoint_set ordering + SwitchPointOrder from_switchpoint_order = SwitchPointOrder::FIXED; + + ///The desired to_switchpoint_set ordering + SwitchPointOrder to_switchpoint_order = SwitchPointOrder::FIXED; + + /** @brief index in switch array of the switch used to override wire_switch of the 'to' set. + * DEFAULT_SWITCH is a sentinel value (i.e. the usual driving switch from a wire for + * the receiving wire will be used) + */ + int switch_override_indx = DEFAULT_SWITCH; std::string num_conns_formula; /* Specifies how many connections should be made for this wireconn. * @@ -1917,8 +1865,7 @@ class SB_Side_Connection { SB_Side_Connection(enum e_side from, enum e_side to) : from_side(from) - , to_side(to) { - } + , to_side(to) {} /* overload < operator which will be used by std::map */ bool operator<(const SB_Side_Connection& obj) const { @@ -1943,8 +1890,8 @@ typedef std::map> t_permutation_map /* Lists all information about a particular switch block specified in the architecture file */ struct t_switchblock_inf { - std::string name; /* the name of this switchblock */ - e_sb_location location; /* where on the FPGA this switchblock should be built (i.e. perimeter, core, everywhere) */ + std::string name; /* the name of this switchblock */ + e_sb_location location; /* where on the FPGA this switchblock should be built (i.e. perimeter, core, everywhere) */ e_directionality directionality; /* the directionality of this switchblock (unidir/bidir) */ int x = -1; /* The exact x-axis location that this SB is used, meaningful when type is set to E_XY_specified */ @@ -1953,7 +1900,7 @@ struct t_switchblock_inf { /* We can also define a region to apply this SB to all locations falls into this region using regular expression in the architecture file*/ t_sb_loc_spec reg_x; t_sb_loc_spec reg_y; - + t_permutation_map permutation_map; /* map holding the permutation functions attributed to this switchblock */ std::vector wireconns; /* list of wire types/groups this SB will connect */ @@ -2020,9 +1967,12 @@ struct t_router { * network during the device creation. * */ struct t_noc_inf { - double link_bandwidth; /*!< The maximum bandwidth supported in the NoC. This value is the same for all links. units in bps*/ - double link_latency; /*!< The worst case latency seen when traversing a link. This value is the same for all links. units in seconds*/ - double router_latency; /*!< The worst case latency seen when traversing a router. This value is the same for all routers, units in seconds*/ + double + link_bandwidth; /*!< The maximum bandwidth supported in the NoC. This value is the same for all links. units in bps*/ + double + link_latency; /*!< The worst case latency seen when traversing a link. This value is the same for all links. units in seconds*/ + double + router_latency; /*!< The worst case latency seen when traversing a router. This value is the same for all routers, units in seconds*/ /** A list of all routers in the NoC*/ std::vector router_list; @@ -2107,11 +2057,11 @@ struct t_arch { std::vector ipin_cblock_switch_name; std::vector grid_layouts; //Set of potential device layouts - + //the layout that is chosen to be used with command line options //It is used to generate custom SB for a specific locations within the device //If the layout is not specified in the command line options, this variable will be set to "auto" - std::string device_layout; + std::string device_layout; t_clock_arch_spec clock_arch; // Clock related data types diff --git a/libs/libarchfpga/src/physical_types_util.cpp b/libs/libarchfpga/src/physical_types_util.cpp index 43a0fbc54da..625c75fb3bb 100644 --- a/libs/libarchfpga/src/physical_types_util.cpp +++ b/libs/libarchfpga/src/physical_types_util.cpp @@ -43,9 +43,13 @@ struct t_pin_inst_port { /******************** Subroutine declarations and definition ****************************/ -static std::tuple get_pin_index_for_inst(t_physical_tile_type_ptr type, int pin_physical_num, bool is_flat); +static std::tuple get_pin_index_for_inst(t_physical_tile_type_ptr type, + int pin_physical_num, + bool is_flat); -static t_pin_inst_port block_type_pin_index_to_pin_inst(t_physical_tile_type_ptr type, int pin_physical_num, bool is_flat); +static t_pin_inst_port block_type_pin_index_to_pin_inst(t_physical_tile_type_ptr type, + int pin_physical_num, + bool is_flat); static int get_sub_tile_num_internal_classes(const t_sub_tile* sub_tile); @@ -131,7 +135,9 @@ static int get_num_reachable_sinks(t_physical_tile_type_ptr physical_tile, const int ref_sink_num, const std::vector& sink_grp); -static std::tuple get_pin_index_for_inst(t_physical_tile_type_ptr type, int pin_physical_num, bool is_flat) { +static std::tuple get_pin_index_for_inst(t_physical_tile_type_ptr type, + int pin_physical_num, + bool is_flat) { int max_ptc = get_tile_pin_max_ptc(type, is_flat); VTR_ASSERT(pin_physical_num < max_ptc); @@ -175,9 +181,12 @@ static std::tuple get_pin_index_for_inst(t_physical_til return std::make_tuple(pin_inst_num, sub_tile->index, sub_tile_cap, logical_block_idx, pb_type_idx); } -static t_pin_inst_port block_type_pin_index_to_pin_inst(t_physical_tile_type_ptr type, int pin_physical_num, bool is_flat) { +static t_pin_inst_port block_type_pin_index_to_pin_inst(t_physical_tile_type_ptr type, + int pin_physical_num, + bool is_flat) { int pin_index, sub_tile_index, inst_num, logical_num, pb_type_idx; - std::tie(pin_index, sub_tile_index, inst_num, logical_num, pb_type_idx) = get_pin_index_for_inst(type, pin_physical_num, is_flat); + std::tie(pin_index, sub_tile_index, inst_num, logical_num, pb_type_idx) + = get_pin_index_for_inst(type, pin_physical_num, is_flat); t_pin_inst_port pin_inst_port; pin_inst_port.sub_tile_index = sub_tile_index; @@ -196,7 +205,8 @@ static t_pin_inst_port block_type_pin_index_to_pin_inst(t_physical_tile_type_ptr } else { /* pin is located on the tile */ for (auto const& port : type->sub_tiles[sub_tile_index].ports) { - if (pin_index >= port.absolute_first_pin_index && pin_index < port.absolute_first_pin_index + port.num_pins) { + if (pin_index >= port.absolute_first_pin_index + && pin_index < port.absolute_first_pin_index + port.num_pins) { pin_inst_port.port_index = port.index; pin_inst_port.pin_index_in_port = pin_index - port.absolute_first_pin_index; break; @@ -267,10 +277,7 @@ static int get_pin_logical_num_from_pin_physical_num(t_physical_tile_type_ptr ph int pin_logical_num; - int offset = get_logical_block_physical_pin_num_offset(physical_tile, - sub_tile, - logical_block, - sub_tile_cap); + int offset = get_logical_block_physical_pin_num_offset(physical_tile, sub_tile, logical_block, sub_tile_cap); pin_logical_num = physical_num - offset; return pin_logical_num; @@ -301,16 +308,12 @@ static std::vector get_pb_pin_src_pins(t_physical_tile_type_ptr physical_ty for (int pin_idx = 0; pin_idx < num_pins; pin_idx++) { auto conn_pin = connected_pins_ptr[pin_idx]; if (conn_pin->is_root_block_pin()) { - driving_pins.push_back(get_physical_pin_at_sub_tile_location(physical_type, - logical_block, + driving_pins.push_back(get_physical_pin_at_sub_tile_location(physical_type, logical_block, sub_tile->capacity.low + relative_cap, conn_pin->pin_count_in_cluster)); } else { - driving_pins.push_back(get_pb_pin_physical_num(physical_type, - sub_tile, - logical_block, - relative_cap, - conn_pin)); + driving_pins.push_back( + get_pb_pin_physical_num(physical_type, sub_tile, logical_block, relative_cap, conn_pin)); } } } @@ -343,16 +346,12 @@ static std::vector get_pb_pin_sink_pins(t_physical_tile_type_ptr physical_t for (int pin_idx = 0; pin_idx < num_pins; pin_idx++) { auto conn_pin = connected_pins_ptr[pin_idx]; if (conn_pin->is_root_block_pin()) { - sink_pins.push_back(get_physical_pin_at_sub_tile_location(physical_type, - logical_block, + sink_pins.push_back(get_physical_pin_at_sub_tile_location(physical_type, logical_block, sub_tile->capacity.low + relative_cap, conn_pin->pin_count_in_cluster)); } else { - sink_pins.push_back(get_pb_pin_physical_num(physical_type, - sub_tile, - logical_block, - relative_cap, - conn_pin)); + sink_pins.push_back( + get_pb_pin_physical_num(physical_type, sub_tile, logical_block, relative_cap, conn_pin)); } } } @@ -377,9 +376,8 @@ static t_pb_graph_pin* get_mutable_tile_pin_pb_pin(t_physical_tile_type* physica static std::vector get_sink_hierarchical_parents(t_physical_tile_type_ptr physical_tile, int class_physical_num) { std::vector pb_nodes; - const t_pb_graph_node* curr_pb_node = get_pb_graph_node_from_pin_physical_num(physical_tile, - get_pin_list_from_class_physical_num(physical_tile, - class_physical_num)[0]); + const t_pb_graph_node* curr_pb_node = get_pb_graph_node_from_pin_physical_num( + physical_tile, get_pin_list_from_class_physical_num(physical_tile, class_physical_num)[0]); pb_nodes.reserve(curr_pb_node->pb_type->depth + 1); VTR_ASSERT(curr_pb_node != nullptr); @@ -397,8 +395,7 @@ static int get_num_reachable_sinks(t_physical_tile_type_ptr physical_tile, const std::vector& sink_grp) { int num_reachable_sinks = 0; - auto pb_pin = get_pb_pin_from_pin_physical_num(physical_tile, - pin_physcial_num); + auto pb_pin = get_pb_pin_from_pin_physical_num(physical_tile, pin_physcial_num); const auto& connected_sinks = pb_pin->connected_sinks_ptc; // If ref_sink_num is not reachable by pin_physical_num return 0 @@ -456,15 +453,12 @@ int get_logical_block_physical_sub_tile_index(t_physical_tile_type_ptr physical_ return sub_tile_index; } -int get_physical_pin(t_physical_tile_type_ptr physical_tile, - t_logical_block_type_ptr logical_block, - int pin) { +int get_physical_pin(t_physical_tile_type_ptr physical_tile, t_logical_block_type_ptr logical_block, int pin) { int sub_tile_index = get_logical_block_physical_sub_tile_index(physical_tile, logical_block); if (sub_tile_index == OPEN) { archfpga_throw(__FILE__, __LINE__, - "Couldn't find the corresponding physical tile type pin of the logical block type pin %d.", - pin); + "Couldn't find the corresponding physical tile type pin of the logical block type pin %d.", pin); } int sub_tile_physical_pin = get_sub_tile_physical_pin(sub_tile_index, physical_tile, logical_block, pin); @@ -478,8 +472,7 @@ int get_logical_block_physical_sub_tile_index(t_physical_tile_type_ptr physical_ for (const auto& sub_tile : physical_tile->sub_tiles) { auto eq_sites = sub_tile.equivalent_sites; auto it = std::find(eq_sites.begin(), eq_sites.end(), logical_block); - if (it != eq_sites.end() - && (sub_tile.capacity.is_in_range(sub_tile_capacity))) { + if (it != eq_sites.end() && (sub_tile.capacity.is_in_range(sub_tile_capacity))) { sub_tile_index = sub_tile.index; break; } @@ -510,7 +503,9 @@ bool is_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_block_ return std::find(equivalent_tiles.begin(), equivalent_tiles.end(), physical_tile) != equivalent_tiles.end(); } -bool is_sub_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_block_type_ptr logical_block, int sub_tile_loc) { +bool is_sub_tile_compatible(t_physical_tile_type_ptr physical_tile, + t_logical_block_type_ptr logical_block, + int sub_tile_loc) { bool capacity_compatible = false; for (auto& sub_tile : physical_tile->sub_tiles) { auto result = std::find(sub_tile.equivalent_sites.begin(), sub_tile.equivalent_sites.end(), logical_block); @@ -533,8 +528,7 @@ int get_physical_pin_at_sub_tile_location(t_physical_tile_type_ptr physical_tile if (sub_tile_index == OPEN) { archfpga_throw(__FILE__, __LINE__, - "Couldn't find the corresponding physical tile type pin of the logical block type pin %d.", - pin); + "Couldn't find the corresponding physical tile type pin of the logical block type pin %d.", pin); } int sub_tile_physical_pin = get_sub_tile_physical_pin(sub_tile_index, physical_tile, logical_block, pin); @@ -547,7 +541,8 @@ int get_physical_pin_at_sub_tile_location(t_physical_tile_type_ptr physical_tile * than other logical blocks that can be placed in the sub-tile. This will lead to an error * when computing the pin index! */ - int block_num_pins = physical_tile->sub_tiles[sub_tile_index].num_phy_pins / physical_tile->sub_tiles[sub_tile_index].capacity.total(); + int block_num_pins = physical_tile->sub_tiles[sub_tile_index].num_phy_pins + / physical_tile->sub_tiles[sub_tile_index].capacity.total(); return relative_capacity * block_num_pins + physical_tile->sub_tiles[sub_tile_index].sub_tile_to_tile_pin_indices[sub_tile_physical_pin]; @@ -631,12 +626,13 @@ std::pair get_capacity_location_from_physical_pin(t_physical_tile_type pins_to_remove += sub_tile_num_pins; } - archfpga_throw(__FILE__, __LINE__, - "Couldn't find sub tile that contains the pin %d in physical tile %s.\n", - pin, physical_tile->name); + archfpga_throw(__FILE__, __LINE__, "Couldn't find sub tile that contains the pin %d in physical tile %s.\n", pin, + physical_tile->name); } -int get_physical_pin_from_capacity_location(t_physical_tile_type_ptr physical_tile, int relative_pin, int capacity_location) { +int get_physical_pin_from_capacity_location(t_physical_tile_type_ptr physical_tile, + int relative_pin, + int capacity_location) { int pins_to_add = 0; for (auto sub_tile : physical_tile->sub_tiles) { auto capacity = sub_tile.capacity; @@ -650,9 +646,10 @@ int get_physical_pin_from_capacity_location(t_physical_tile_type_ptr physical_ti pins_to_add += sub_tile.num_phy_pins; } - archfpga_throw(__FILE__, __LINE__, - "Couldn't find sub tile that contains the relative pin %d at the capacity location %d in physical tile %s.\n", - relative_pin, capacity_location, physical_tile->name); + archfpga_throw( + __FILE__, __LINE__, + "Couldn't find sub tile that contains the relative pin %d at the capacity location %d in physical tile %s.\n", + relative_pin, capacity_location, physical_tile->name); } bool is_opin(int ipin, t_physical_tile_type_ptr type) { /* Returns true if this clb pin is an output, false otherwise. */ @@ -670,7 +667,11 @@ bool is_opin(int ipin, t_physical_tile_type_ptr type) { return false; } -bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from_layer, int to_layer, int num_of_avail_layer) { +bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, + int ipin, + int from_layer, + int to_layer, + int num_of_avail_layer) { if (type->is_empty()) { //if type is empty, there is no pins return false; } @@ -690,18 +691,11 @@ bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from // TODO: Remove is_input_type / is_output_type / is_io_type as part of // https://github.com/verilog-to-routing/vtr-verilog-to-routing/issues/1193 -bool is_input_type(t_physical_tile_type_ptr type) { - return type->is_input_type; -} +bool is_input_type(t_physical_tile_type_ptr type) { return type->is_input_type; } -bool is_output_type(t_physical_tile_type_ptr type) { - return type->is_output_type; -} +bool is_output_type(t_physical_tile_type_ptr type) { return type->is_output_type; } -bool is_io_type(t_physical_tile_type_ptr type) { - return is_input_type(type) - || is_output_type(type); -} +bool is_io_type(t_physical_tile_type_ptr type) { return is_input_type(type) || is_output_type(type); } std::string block_type_pin_index_to_name(t_physical_tile_type_ptr type, int pin_physical_num, bool is_flat) { int max_ptc = get_tile_pin_max_ptc(type, is_flat); @@ -710,7 +704,8 @@ std::string block_type_pin_index_to_name(t_physical_tile_type_ptr type, int pin_ std::string pin_name = type->name; int sub_tile_index, inst_num, logical_num, pb_type_idx; - std::tie(pin_index, sub_tile_index, inst_num, logical_num, pb_type_idx) = get_pin_index_for_inst(type, pin_physical_num, is_flat); + std::tie(pin_index, sub_tile_index, inst_num, logical_num, pb_type_idx) + = get_pin_index_for_inst(type, pin_physical_num, is_flat); if (type->sub_tiles[sub_tile_index].capacity.total() > 1) { pin_name += "[" + std::to_string(inst_num) + "]"; } @@ -725,7 +720,8 @@ std::string block_type_pin_index_to_name(t_physical_tile_type_ptr type, int pin_ if (is_pin_on_tile(type, pin_physical_num)) { for (auto const& port : type->sub_tiles[sub_tile_index].ports) { - if (pin_index >= port.absolute_first_pin_index && pin_index < port.absolute_first_pin_index + port.num_pins) { + if (pin_index >= port.absolute_first_pin_index + && pin_index < port.absolute_first_pin_index + port.num_pins) { //This port contains the desired pin index int index_in_port = pin_index - port.absolute_first_pin_index; pin_name += port.name; @@ -773,7 +769,8 @@ std::vector block_type_class_index_to_pin_names(t_physical_tile_typ //Determine ranges for each capacity instance and port pair std::map, std::array> pin_ranges; for (const auto& pin_inf : pin_info) { - auto key = std::make_tuple(pin_inf.sub_tile_index, pin_inf.capacity_instance, pin_inf.logical_block_index, pin_inf.pb_type_idx, pin_inf.port_index); + auto key = std::make_tuple(pin_inf.sub_tile_index, pin_inf.capacity_instance, pin_inf.logical_block_index, + pin_inf.pb_type_idx, pin_inf.port_index); if (!pin_ranges.count(key)) { pin_ranges[key][0] = pin_inf.pin_index_in_port; pin_ranges[key][1] = pin_inf.pin_index_in_port; @@ -815,24 +812,15 @@ std::vector block_type_class_index_to_pin_names(t_physical_tile_typ auto pb_pin = get_pb_pin_from_pin_physical_num(type, pin_physical_start); port_name = pb_pin->port->name; auto pb_graph_node = get_pb_graph_node_from_pin_physical_num(type, pin_physical_start); - block_name = vtr::string_fmt("%s[%d].%s", - type->name, - icapacity, - pb_graph_node->hierarchical_type_name().c_str()); + block_name + = vtr::string_fmt("%s[%d].%s", type->name, icapacity, pb_graph_node->hierarchical_type_name().c_str()); } std::string pin_name; if (ipin_start == ipin_end) { - pin_name = vtr::string_fmt("%s.%s[%d]", - block_name.c_str(), - port_name.c_str(), - ipin_start); + pin_name = vtr::string_fmt("%s.%s[%d]", block_name.c_str(), port_name.c_str(), ipin_start); } else { - pin_name = vtr::string_fmt("%s.%s[%d:%d]", - block_name.c_str(), - port_name.c_str(), - ipin_start, - ipin_end); + pin_name = vtr::string_fmt("%s.%s[%d:%d]", block_name.c_str(), port_name.c_str(), ipin_start, ipin_end); } pin_names.push_back(pin_name); @@ -891,13 +879,15 @@ const t_port* get_port_by_pin(t_logical_block_type_ptr type, int pin) { /** get information given class physical num **/ -std::tuple get_sub_tile_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int physical_class_num) { +std::tuple get_sub_tile_from_class_physical_num(t_physical_tile_type_ptr physical_tile, + int physical_class_num) { bool is_on_tile = is_class_on_tile(physical_tile, physical_class_num); int num_seen_class = (is_on_tile) ? 0 : (int)physical_tile->class_inf.size(); int class_num_offset = num_seen_class; for (auto& sub_tile : physical_tile->sub_tiles) { - int sub_tile_num_class = is_on_tile ? sub_tile.class_range.total_num() : get_sub_tile_num_internal_classes(&sub_tile); + int sub_tile_num_class + = is_on_tile ? sub_tile.class_range.total_num() : get_sub_tile_num_internal_classes(&sub_tile); num_seen_class += sub_tile_num_class; if (physical_class_num < num_seen_class) { @@ -919,7 +909,8 @@ t_logical_block_type_ptr get_logical_block_from_class_physical_num(t_physical_ti return get_logical_block_from_pin_physical_num(physical_tile, pin_list[0]); } -const std::vector& get_pin_list_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int class_physical_num) { +const std::vector& get_pin_list_from_class_physical_num(t_physical_tile_type_ptr physical_tile, + int class_physical_num) { if (is_class_on_tile(physical_tile, class_physical_num)) { const t_class& pin_class = physical_tile->class_inf[class_physical_num]; return pin_class.pinlist; @@ -929,7 +920,8 @@ const std::vector& get_pin_list_from_class_physical_num(t_physical_tile_typ } } -PortEquivalence get_port_equivalency_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int class_physical_num) { +PortEquivalence get_port_equivalency_from_class_physical_num(t_physical_tile_type_ptr physical_tile, + int class_physical_num) { if (is_class_on_tile(physical_tile, class_physical_num)) { const t_class& pin_class = physical_tile->class_inf[class_physical_num]; return pin_class.equivalence; @@ -999,7 +991,8 @@ int get_tile_class_max_ptc(t_physical_tile_type_ptr tile, bool is_flat) { } /** get information given pin physical number **/ -std::tuple get_sub_tile_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int physical_num) { +std::tuple get_sub_tile_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, + int physical_num) { const t_sub_tile* target_sub_tile = nullptr; int target_sub_tile_cap = OPEN; @@ -1025,7 +1018,8 @@ std::tuple get_sub_tile_from_pin_physical_num(t_physical return std::make_tuple(target_sub_tile, target_sub_tile_cap); } -t_logical_block_type_ptr get_logical_block_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int physical_num) { +t_logical_block_type_ptr get_logical_block_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, + int physical_num) { VTR_ASSERT(physical_num >= physical_tile->num_pins); const t_sub_tile* sub_tile; int sub_tile_cap; @@ -1055,18 +1049,17 @@ const t_pb_graph_pin* get_pb_pin_from_pin_physical_num(t_physical_tile_type_ptr int pin_physical_num) { const t_pb_graph_pin* pb_pin; if (is_pin_on_tile(physical_type, pin_physical_num)) { - pb_pin = get_tile_pin_pb_pin(physical_type, - logical_block, - pin_physical_num); + pb_pin = get_tile_pin_pb_pin(physical_type, logical_block, pin_physical_num); } else { - pb_pin = get_pb_pin_from_pin_physical_num(physical_type, - pin_physical_num); + pb_pin = get_pb_pin_from_pin_physical_num(physical_type, pin_physical_num); } return pb_pin; } -t_pb_graph_pin* get_mutable_pb_pin_from_pin_physical_num(t_physical_tile_type* physical_tile, t_logical_block_type* logical_block, int physical_num) { +t_pb_graph_pin* get_mutable_pb_pin_from_pin_physical_num(t_physical_tile_type* physical_tile, + t_logical_block_type* logical_block, + int physical_num) { if (is_pin_on_tile(physical_tile, physical_num)) { return get_mutable_tile_pin_pb_pin(physical_tile, logical_block, physical_num); } else { @@ -1074,13 +1067,15 @@ t_pb_graph_pin* get_mutable_pb_pin_from_pin_physical_num(t_physical_tile_type* p } } -PortEquivalence get_port_equivalency_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int pin_physical_num) { +PortEquivalence get_port_equivalency_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, + int pin_physical_num) { if (is_pin_on_tile(physical_tile, pin_physical_num)) { const t_class& pin_class = physical_tile->class_inf[physical_tile->pin_class[pin_physical_num]]; return pin_class.equivalence; } else { VTR_ASSERT(is_primitive_pin(physical_tile, pin_physical_num)); - const t_class& pin_class = physical_tile->primitive_class_inf.at(physical_tile->primitive_pin_class.at(pin_physical_num)); + const t_class& pin_class + = physical_tile->primitive_class_inf.at(physical_tile->primitive_pin_class.at(pin_physical_num)); return pin_class.equivalence; } } @@ -1101,9 +1096,8 @@ e_pin_type get_pin_type_from_pin_physical_num(t_physical_tile_type_ptr physical_ } } -std::tuple, std::vector, std::vector> get_pin_coordinates(t_physical_tile_type_ptr physical_type, - int pin_physical_num, - const std::vector& sides) { +std::tuple, std::vector, std::vector> +get_pin_coordinates(t_physical_tile_type_ptr physical_type, int pin_physical_num, const std::vector& sides) { // For the pins which are on a tile, they may be located in multiple sides/locations to model a pin which is connected to multiple // channels. However, in the case of internal pins, currently, they are only located on e_side::TOP and the root location of the // tile. @@ -1258,17 +1252,10 @@ std::vector get_physical_pin_src_pins(t_physical_tile_type_ptr physical_typ int pin_physical_num) { const t_sub_tile* sub_tile; int sub_tile_cap; - std::tie(sub_tile, sub_tile_cap) = get_sub_tile_from_pin_physical_num(physical_type, - pin_physical_num); - auto pb_pin = get_pb_pin_from_pin_physical_num(physical_type, - logical_block, - pin_physical_num); + std::tie(sub_tile, sub_tile_cap) = get_sub_tile_from_pin_physical_num(physical_type, pin_physical_num); + auto pb_pin = get_pb_pin_from_pin_physical_num(physical_type, logical_block, pin_physical_num); - return get_pb_pin_src_pins(physical_type, - sub_tile, - logical_block, - sub_tile_cap, - pb_pin); + return get_pb_pin_src_pins(physical_type, sub_tile, logical_block, sub_tile_cap, pb_pin); } std::vector get_physical_pin_sink_pins(t_physical_tile_type_ptr physical_type, @@ -1276,18 +1263,11 @@ std::vector get_physical_pin_sink_pins(t_physical_tile_type_ptr physical_ty int pin_physical_num) { const t_sub_tile* sub_tile; int sub_tile_cap; - std::tie(sub_tile, sub_tile_cap) = get_sub_tile_from_pin_physical_num(physical_type, - pin_physical_num); + std::tie(sub_tile, sub_tile_cap) = get_sub_tile_from_pin_physical_num(physical_type, pin_physical_num); - auto pb_pin = get_pb_pin_from_pin_physical_num(physical_type, - logical_block, - pin_physical_num); + auto pb_pin = get_pb_pin_from_pin_physical_num(physical_type, logical_block, pin_physical_num); - return get_pb_pin_sink_pins(physical_type, - sub_tile, - logical_block, - sub_tile_cap, - pb_pin); + return get_pb_pin_sink_pins(physical_type, sub_tile, logical_block, sub_tile_cap, pb_pin); } int get_pb_pin_physical_num(t_physical_tile_type_ptr physical_tile, @@ -1297,10 +1277,8 @@ int get_pb_pin_physical_num(t_physical_tile_type_ptr physical_tile, const t_pb_graph_pin* pin) { int pin_physical_num = OPEN; if (pin->is_root_block_pin()) { - pin_physical_num = get_physical_pin_at_sub_tile_location(physical_tile, - logical_block, - sub_tile->capacity.low + relative_cap, - pin->pin_count_in_cluster); + pin_physical_num = get_physical_pin_at_sub_tile_location( + physical_tile, logical_block, sub_tile->capacity.low + relative_cap, pin->pin_count_in_cluster); } else { int offset = sub_tile->intra_pin_range[relative_cap].at(logical_block).low; pin_physical_num = pin->pin_count_in_cluster + offset; @@ -1364,26 +1342,24 @@ int get_tile_pin_max_ptc(t_physical_tile_type_ptr tile, bool is_flat) { } } -int get_tile_num_internal_pin(t_physical_tile_type_ptr tile) { - return (int)tile->pin_num_to_pb_pin.size(); -} +int get_tile_num_internal_pin(t_physical_tile_type_ptr tile) { return (int)tile->pin_num_to_pb_pin.size(); } int get_tile_total_num_pin(t_physical_tile_type_ptr tile) { return (int)(tile->num_pins + tile->pin_num_to_pb_pin.size()); } -bool intra_tile_nodes_connected(t_physical_tile_type_ptr physical_type, - int pin_physical_num, - int sink_physical_num) { +bool intra_tile_nodes_connected(t_physical_tile_type_ptr physical_type, int pin_physical_num, int sink_physical_num) { if (is_pin_on_tile(physical_type, pin_physical_num)) { const t_sub_tile* from_sub_tile; int from_sub_tile_rel_cap; - std::tie(from_sub_tile, from_sub_tile_rel_cap) = get_sub_tile_from_pin_physical_num(physical_type, pin_physical_num); + std::tie(from_sub_tile, from_sub_tile_rel_cap) + = get_sub_tile_from_pin_physical_num(physical_type, pin_physical_num); VTR_ASSERT(from_sub_tile != nullptr && from_sub_tile_rel_cap != OPEN); const t_sub_tile* to_sub_tile; int to_sub_tile_rel_cap; - std::tie(to_sub_tile, to_sub_tile_rel_cap) = get_sub_tile_from_class_physical_num(physical_type, sink_physical_num); + std::tie(to_sub_tile, to_sub_tile_rel_cap) + = get_sub_tile_from_class_physical_num(physical_type, sink_physical_num); VTR_ASSERT(to_sub_tile != nullptr && to_sub_tile_rel_cap != OPEN); return (from_sub_tile_rel_cap == to_sub_tile_rel_cap) && (from_sub_tile == to_sub_tile); @@ -1405,12 +1381,10 @@ float get_edge_delay(t_physical_tile_type_ptr physical_type, t_logical_block_type_ptr logical_block, int src_pin_physical_num, int sink_pin_physical_num) { - const t_pb_graph_pin* src_pb_pin = get_pb_pin_from_pin_physical_num(physical_type, - logical_block, - src_pin_physical_num); - const t_pb_graph_pin* sink_pb_pin = get_pb_pin_from_pin_physical_num(physical_type, - logical_block, - sink_pin_physical_num); + const t_pb_graph_pin* src_pb_pin + = get_pb_pin_from_pin_physical_num(physical_type, logical_block, src_pin_physical_num); + const t_pb_graph_pin* sink_pb_pin + = get_pb_pin_from_pin_physical_num(physical_type, logical_block, sink_pin_physical_num); int edge_idx = src_pb_pin->sink_pin_edge_idx_map.at(sink_pb_pin); float delay = src_pb_pin->output_edges[edge_idx]->delay_max; @@ -1421,9 +1395,7 @@ float get_edge_delay(t_physical_tile_type_ptr physical_type, float get_pin_primitive_comb_delay(t_physical_tile_type_ptr physical_type, t_logical_block_type_ptr logical_block, int pin_physical_num) { - const t_pb_graph_pin* pb_pin = get_pb_pin_from_pin_physical_num(physical_type, - logical_block, - pin_physical_num); + const t_pb_graph_pin* pb_pin = get_pb_pin_from_pin_physical_num(physical_type, logical_block, pin_physical_num); VTR_ASSERT(pb_pin->is_primitive_pin()); auto it = std::max_element(pb_pin->pin_timing_del_max.begin(), pb_pin->pin_timing_del_max.end()); @@ -1462,7 +1434,8 @@ bool classes_in_same_block(t_physical_tile_type_ptr physical_tile, int num_shared_pb_graph_node = 0; curr_pb_graph_node = second_pb_graph_pin->parent_node; while (curr_pb_graph_node != nullptr) { - auto find_res = std::find(first_pb_graph_node_chain.begin(), first_pb_graph_node_chain.end(), curr_pb_graph_node); + auto find_res + = std::find(first_pb_graph_node_chain.begin(), first_pb_graph_node_chain.end(), curr_pb_graph_node); if (find_res != first_pb_graph_node_chain.end()) { num_shared_pb_graph_node++; if (num_shared_pb_graph_node >= NUM_SIMILAR_PB_NODE_THRESHOLD) @@ -1495,11 +1468,7 @@ std::map get_sink_choking_points(t_physical_tile_type_ptr physical_til continue; } - auto pb_pins = get_pb_graph_node_pins(physical_tile, - sub_tile, - logical_block, - sub_tile_rel_cap, - pb_graph_node); + auto pb_pins = get_pb_graph_node_pins(physical_tile, sub_tile, logical_block, sub_tile_rel_cap, pb_graph_node); std::unordered_map reachability_inf; bool has_unique_val = false; int prev_val = -1; @@ -1508,10 +1477,7 @@ std::map get_sink_choking_points(t_physical_tile_type_ptr physical_til for (int pin_num = pb_pins.low; pin_num <= pb_pins.high; pin_num++) { // Only choke points on IPINs are analyzed if (get_pin_type_from_pin_physical_num(physical_tile, pin_num) == e_pin_type::RECEIVER) { - int num_reachable_sinks = get_num_reachable_sinks(physical_tile, - pin_num, - sink_ptc_num, - grp); + int num_reachable_sinks = get_num_reachable_sinks(physical_tile, pin_num, sink_ptc_num, grp); if (num_reachable_sinks != 0) { if (prev_val == -1) { diff --git a/libs/libarchfpga/src/physical_types_util.h b/libs/libarchfpga/src/physical_types_util.h index 4d9c3013682..19856ec8248 100644 --- a/libs/libarchfpga/src/physical_types_util.h +++ b/libs/libarchfpga/src/physical_types_util.h @@ -118,7 +118,11 @@ bool is_opin(int ipin, t_physical_tile_type_ptr type); ///@brief Returns true if the specified pin is located at "from_layer" and it is connected to "to_layer" -bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from_layer, int to_layer, int num_of_avail_layer); +bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, + int ipin, + int from_layer, + int to_layer, + int num_of_avail_layer); ///@brief Returns true if the given physical tile type can implement a .input block type bool is_input_type(t_physical_tile_type_ptr type); @@ -144,7 +148,9 @@ bool is_io_type(t_physical_tile_type_ptr type); * The value returned in this case is 3. * Note: capacity and pin indices start from zero. */ -int get_physical_pin_from_capacity_location(t_physical_tile_type_ptr physical_tile, int relative_pin, int capacity_location); +int get_physical_pin_from_capacity_location(t_physical_tile_type_ptr physical_tile, + int relative_pin, + int capacity_location); /** * @brief Returns a pair consisting of the absolute capacity location relative to the pin parameter @@ -171,7 +177,8 @@ std::vector block_type_class_index_to_pin_names(t_physical_tile_typ bool is_flat); ///@brief Returns the physical tile type matching a given physical tile type name, or nullptr (if not found) -t_physical_tile_type_ptr find_tile_type_by_name(const std::string& name, const std::vector& types); +t_physical_tile_type_ptr find_tile_type_by_name(const std::string& name, + const std::vector& types); int find_pin_class(t_physical_tile_type_ptr type, std::string port_name, int pin_index_in_port, e_pin_type pin_type); @@ -185,7 +192,9 @@ int get_max_num_pins(t_logical_block_type_ptr logical_block); bool is_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_block_type_ptr logical_block); ///@brief Verifies whether a logical block and a relative placement location is compatible with a given physical tile -bool is_sub_tile_compatible(t_physical_tile_type_ptr physical_tile, t_logical_block_type_ptr logical_block, int sub_tile_loc); +bool is_sub_tile_compatible(t_physical_tile_type_ptr physical_tile, + t_logical_block_type_ptr logical_block, + int sub_tile_loc); /** * @brief Returns the first physical tile type that matches the logical block @@ -223,9 +232,7 @@ int get_logical_block_physical_sub_tile_index(t_physical_tile_type_ptr physical_ * * Throws an exception if the corresponding physical pin can't be found. */ -int get_physical_pin(t_physical_tile_type_ptr physical_tile, - t_logical_block_type_ptr logical_block, - int pin); +int get_physical_pin(t_physical_tile_type_ptr physical_tile, t_logical_block_type_ptr logical_block, int pin); /** * @brief Returns the physical pin index (within 'physical_tile') corresponding to the * logical index ('pin' of the first instance of 'logical_block' within the physcial tile. @@ -311,9 +318,11 @@ const t_port* get_port_by_pin(t_logical_block_type_ptr type, int pin); /* Access information related to pin classes */ /** get information given class physical num **/ -std::tuple get_sub_tile_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int physical_class_num); +std::tuple get_sub_tile_from_class_physical_num(t_physical_tile_type_ptr physical_tile, + int physical_class_num); -t_logical_block_type_ptr get_logical_block_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int class_physical_num); +t_logical_block_type_ptr get_logical_block_from_class_physical_num(t_physical_tile_type_ptr physical_tile, + int class_physical_num); /** * @@ -321,9 +330,11 @@ t_logical_block_type_ptr get_logical_block_from_class_physical_num(t_physical_ti * @param class_physical_num physical number of the class * @return return the pins' physical number of the pins connected to the given class */ -const std::vector& get_pin_list_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int class_physical_num); +const std::vector& get_pin_list_from_class_physical_num(t_physical_tile_type_ptr physical_tile, + int class_physical_num); -PortEquivalence get_port_equivalency_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int class_physical_num); +PortEquivalence get_port_equivalency_from_class_physical_num(t_physical_tile_type_ptr physical_tile, + int class_physical_num); e_pin_type get_class_type_from_class_physical_num(t_physical_tile_type_ptr physical_tile, int class_physical_num); @@ -370,9 +381,11 @@ int get_tile_class_max_ptc(t_physical_tile_type_ptr tile, bool is_flat); /* Access information related to pins */ /** get information given pin physical number **/ -std::tuple get_sub_tile_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int physical_num); +std::tuple get_sub_tile_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, + int physical_num); -t_logical_block_type_ptr get_logical_block_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int physical_num); +t_logical_block_type_ptr get_logical_block_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, + int physical_num); const t_pb_graph_pin* get_pb_pin_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int physical_num); @@ -380,15 +393,17 @@ const t_pb_graph_pin* get_pb_pin_from_pin_physical_num(t_physical_tile_type_ptr t_logical_block_type_ptr logical_block, int pin_physical_num); -t_pb_graph_pin* get_mutable_pb_pin_from_pin_physical_num(t_physical_tile_type* physical_tile, t_logical_block_type* logical_block, int physical_num); +t_pb_graph_pin* get_mutable_pb_pin_from_pin_physical_num(t_physical_tile_type* physical_tile, + t_logical_block_type* logical_block, + int physical_num); -PortEquivalence get_port_equivalency_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int pin_physical_num); +PortEquivalence get_port_equivalency_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, + int pin_physical_num); e_pin_type get_pin_type_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int physical_num); -std::tuple, std::vector, std::vector> get_pin_coordinates(t_physical_tile_type_ptr physical_type, - int pin_physical_num, - const std::vector& sides); +std::tuple, std::vector, std::vector> +get_pin_coordinates(t_physical_tile_type_ptr physical_type, int pin_physical_num, const std::vector& sides); int get_class_num_from_pin_physical_num(t_physical_tile_type_ptr physical_tile, int pin_physical_num); @@ -443,9 +458,7 @@ int get_tile_num_internal_pin(t_physical_tile_type_ptr tile); int get_tile_total_num_pin(t_physical_tile_type_ptr tile); // Check whether the pin corresponding to pin_physical_num is directly or indirectly connected to the sink corresponding to sink_physical_num -bool intra_tile_nodes_connected(t_physical_tile_type_ptr physical_type, - int pin_physical_num, - int sink_physical_num); +bool intra_tile_nodes_connected(t_physical_tile_type_ptr physical_type, int pin_physical_num, int sink_physical_num); float get_edge_delay(t_physical_tile_type_ptr physical_type, t_logical_block_type_ptr logical_block, diff --git a/libs/libarchfpga/src/read_fpga_interchange_arch.cpp b/libs/libarchfpga/src/read_fpga_interchange_arch.cpp index d1062ae0480..e8fe60af1cc 100644 --- a/libs/libarchfpga/src/read_fpga_interchange_arch.cpp +++ b/libs/libarchfpga/src/read_fpga_interchange_arch.cpp @@ -5,28 +5,28 @@ #ifdef VTR_ENABLE_CAPNPROTO -# include -# include -# include -# include -# include -# include -# include -# include -# include -# include -# include - -# include "vtr_assert.h" -# include "vtr_digest.h" -# include "vtr_log.h" -# include "vtr_memory.h" -# include "vtr_util.h" - -# include "arch_check.h" -# include "arch_error.h" -# include "arch_util.h" -# include "arch_types.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "vtr_assert.h" +#include "vtr_digest.h" +#include "vtr_log.h" +#include "vtr_memory.h" +#include "vtr_util.h" + +#include "arch_check.h" +#include "arch_error.h" +#include "arch_util.h" +#include "arch_types.h" /* * FPGA Interchange Device frontend @@ -52,10 +52,7 @@ static const auto ROUTING = Device::BELCategory::ROUTING; static const auto SITE_PORT = Device::BELCategory::SITE_PORT; // Enum for pack pattern expansion direction -enum e_pp_dir { - FORWARD = 0, - BACKWARD = 1 -}; +enum e_pp_dir { FORWARD = 0, BACKWARD = 1 }; struct t_package_pin { std::string name; @@ -103,13 +100,11 @@ static float get_corner_value(Device::CornerModel::Reader model, const char* spe bool max_corner = std::string(value) == std::string("max"); if (!slow_model && !fast_model) { - archfpga_throw("", __LINE__, - "Wrong speed model `%s`. Expected `slow` or `fast`\n", speed_model); + archfpga_throw("", __LINE__, "Wrong speed model `%s`. Expected `slow` or `fast`\n", speed_model); } if (!min_corner && !typ_corner && !max_corner) { - archfpga_throw("", __LINE__, - "Wrong corner model `%s`. Expected `min`, `typ` or `max`\n", value); + archfpga_throw("", __LINE__, "Wrong corner model `%s`. Expected `min`, `typ` or `max`\n", value); } bool has_fast = model.getFast().hasFast(); @@ -131,8 +126,7 @@ static float get_corner_value(Device::CornerModel::Reader model, const char* spe } else if (half.getMax().isMax()) { return half.getMax().getMax(); } else { - archfpga_throw("", __LINE__, - "Invalid speed model %s. No value found!\n", speed_model); + archfpga_throw("", __LINE__, "Invalid speed model %s. No value found!\n", speed_model); } } } else if (fast_model && has_fast) { @@ -151,8 +145,7 @@ static float get_corner_value(Device::CornerModel::Reader model, const char* spe } else if (half.getMax().isMax()) { return half.getMax().getMax(); } else { - archfpga_throw("", __LINE__, - "Invalid speed model %s. No value found!\n", speed_model); + archfpga_throw("", __LINE__, "Invalid speed model %s. No value found!\n", speed_model); } } } @@ -175,8 +168,7 @@ static t_model_ports* get_model_port(t_arch* arch, std::string model, std::strin } if (fail) - archfpga_throw(__FILE__, __LINE__, - "Could not find model port: %s (%s)\n", port.c_str(), model.c_str()); + archfpga_throw(__FILE__, __LINE__, "Could not find model port: %s (%s)\n", port.c_str(), model.c_str()); return nullptr; } @@ -188,8 +180,7 @@ static t_model* get_model(t_arch* arch, std::string model) { if (std::string(m->name) == model) return m; - archfpga_throw(__FILE__, __LINE__, - "Could not find model: %s\n", model.c_str()); + archfpga_throw(__FILE__, __LINE__, "Could not find model: %s\n", model.c_str()); } /** @brief Returns the physical or logical type by its name */ @@ -201,8 +192,7 @@ static T* get_type_by_name(const char* type_name, std::vector& types) { } } - archfpga_throw(__FILE__, __LINE__, - "Could not find type: %s\n", type_name); + archfpga_throw(__FILE__, __LINE__, "Could not find type: %s\n", type_name); } /** @brief Returns a generic port instantiation for a complex block */ @@ -345,9 +335,7 @@ struct ArchReader { // Utils /** @brief Returns the string corresponding to the given index */ - std::string str(size_t idx) { - return arch_->interned_strings[idx].get(&arch_->strings); - } + std::string str(size_t idx) { return arch_->interned_strings[idx].get(&arch_->strings); } /** @brief Get the BEL count of a site depending on its category (e.g. logic or routing BELs) */ int get_bel_type_count(Device::SiteType::Reader& site, Device::BELCategory category, bool skip_lut = false) { @@ -377,7 +365,9 @@ struct ArchReader { } /** @brief Get the BEL pin reader given its name, site and corresponding BEL */ - Device::BELPin::Reader get_bel_pin_reader(Device::SiteType::Reader& site, Device::BEL::Reader& bel, std::string pin_name) { + Device::BELPin::Reader get_bel_pin_reader(Device::SiteType::Reader& site, + Device::BEL::Reader& bel, + std::string pin_name) { auto bel_pins = site.getBelPins(); for (auto bel_pin : bel.getPins()) { @@ -450,9 +440,7 @@ struct ArchReader { } /** @brief Returns true in case the input argument corresponds to a PAD BEL */ - bool is_pad(std::string name) { - return pad_bels_.count(name) != 0; - } + bool is_pad(std::string name) { return pad_bels_.count(name) != 0; } /** @brief Utility function to fill in all the necessary information for the sub_tile * @@ -466,7 +454,11 @@ struct ArchReader { * - equivalent_sites * - tile_block_pin_directs_map **/ - void fill_sub_tile(t_physical_tile_type& type, t_sub_tile& sub_tile, int num_pins, int input_count, int output_count) { + void fill_sub_tile(t_physical_tile_type& type, + t_sub_tile& sub_tile, + int num_pins, + int input_count, + int output_count) { sub_tile.num_phy_pins += num_pins; type.num_pins += num_pins; type.num_inst_pins += num_pins; @@ -710,10 +702,7 @@ struct ArchReader { } std::set ostrs{ostr}; - t_ic_data ic_data = { - istr, - ostrs, - requires_pack_pattern}; + t_ic_data ic_data = {istr, ostrs, requires_pack_pattern}; ics_data.push_back(std::make_pair(ic_name, ic_data)); @@ -959,8 +948,7 @@ struct ArchReader { ret_map_name = model_name_map.insert(std::pair(temp->name, 0)); if (!ret_map_name.second) { - archfpga_throw(arch_file_, __LINE__, - "Duplicate model name: '%s'.\n", temp->name); + archfpga_throw(arch_file_, __LINE__, "Duplicate model name: '%s'.\n", temp->name); } if (!process_model_ports(temp, primitive)) { @@ -1014,19 +1002,17 @@ struct ArchReader { //Sanity checks if (model_port->is_clock == true && model_port->is_non_clock_global == true) { archfpga_throw(arch_file_, __LINE__, - "Model port '%s' cannot be both a clock and a non-clock signal simultaneously", model_port->name); + "Model port '%s' cannot be both a clock and a non-clock signal simultaneously", + model_port->name); } if (model_port->name == nullptr) { - archfpga_throw(arch_file_, __LINE__, - "Model port is missing a name"); + archfpga_throw(arch_file_, __LINE__, "Model port is missing a name"); } if (port_names.count(std::pair(model_port->name, dir)) && dir != INOUT_PORT) { - archfpga_throw(arch_file_, __LINE__, - "Duplicate model port named '%s'", model_port->name); + archfpga_throw(arch_file_, __LINE__, "Duplicate model port named '%s'", model_port->name); } if (dir == OUT_PORT && !model_port->combinational_sink_ports.empty()) { - archfpga_throw(arch_file_, __LINE__, - "Model output ports can not have combinational sink ports"); + archfpga_throw(arch_file_, __LINE__, "Model output ports can not have combinational sink ports"); } model_port->min_size = 1; @@ -1105,7 +1091,8 @@ struct ArchReader { lut_elements = arch_->lut_elements.at(name); // Count non-LUT BELs plus LUT elements - int block_count = get_bel_type_count(site, LOGIC, true) + get_bel_type_count(site, ROUTING, true) + lut_elements.size(); + int block_count + = get_bel_type_count(site, LOGIC, true) + get_bel_type_count(site, ROUTING, true) + lut_elements.size(); mode->num_pb_type_children = block_count; mode->pb_type_children = new t_pb_type[mode->num_pb_type_children]; @@ -1779,9 +1766,7 @@ struct ArchReader { auto input = ic_data.input; auto outputs = ic_data.outputs; - auto merge_string = [](std::string ss, std::string s) { - return ss.empty() ? s : ss + " " + s; - }; + auto merge_string = [](std::string ss, std::string s) { return ss.empty() ? s : ss + " " + s; }; std::string outputs_str = std::accumulate(outputs.begin(), outputs.end(), std::string(), merge_string); @@ -1844,7 +1829,8 @@ struct ArchReader { int idx = 0; for (auto pp_name : pair.second) - pp_ic->annotations[idx++] = get_pack_pattern(pp_name, pp_ic->input_string, pp_ic->output_string); + pp_ic->annotations[idx++] + = get_pack_pattern(pp_name, pp_ic->input_string, pp_ic->output_string); } } } @@ -1853,7 +1839,9 @@ struct ArchReader { /** @brief Propagates and generates all pack_patterns required for the given ic. * This is necessary to find all root blocks that generate the pack pattern. */ - std::unordered_map> propagate_pack_patterns(t_interconnect* ic, Device::SiteType::Reader& site, e_pp_dir direction) { + std::unordered_map> propagate_pack_patterns(t_interconnect* ic, + Device::SiteType::Reader& site, + e_pp_dir direction) { auto site_pins = site.getBelPins(); std::string endpoint = direction == BACKWARD ? ic->input_string : ic->output_string; @@ -1923,7 +1911,8 @@ struct ArchReader { t_interconnect* other_ic = &mode->interconnect[iic]; bool found = false; - for (auto other_ep : vtr::split(is_backward ? other_ic->output_string : other_ic->input_string, " ")) { + for (auto other_ep : + vtr::split(is_backward ? other_ic->output_string : other_ic->input_string, " ")) { found |= other_ep == ep; } @@ -2142,8 +2131,10 @@ struct ArchReader { leaf_pb_type->blif_model = vtr::strdup(const_cell.first.c_str()); leaf_pb_type->model = get_model(arch_, const_cell.first); - leaf_pb_type->ports[0] = get_generic_port(arch_, leaf_pb_type, OUT_PORT, const_cell.second, const_cell.first); - pb_type->ports[count] = get_generic_port(arch_, leaf_pb_type, OUT_PORT, const_cell.first + "_" + const_cell.second); + leaf_pb_type->ports[0] + = get_generic_port(arch_, leaf_pb_type, OUT_PORT, const_cell.second, const_cell.first); + pb_type->ports[count] + = get_generic_port(arch_, leaf_pb_type, OUT_PORT, const_cell.first + "_" + const_cell.second); std::string istr = leaf_name + "." + const_cell.second; std::string ostr = const_block_ + "." + const_cell.first + "_" + const_cell.second; @@ -2426,8 +2417,8 @@ struct ArchReader { /* Should never happen */ if (switch_name == std::string(VPR_DELAYLESS_SWITCH_NAME)) { - archfpga_throw(arch_file_, __LINE__, - "Switch name '%s' is a reserved name for VPR internal usage!", switch_name.c_str()); + archfpga_throw(arch_file_, __LINE__, "Switch name '%s' is a reserved name for VPR internal usage!", + switch_name.c_str()); } as->name = switch_name; @@ -2474,7 +2465,8 @@ struct ArchReader { arch_->Segments.resize(num_seg); size_t index = 0; for (auto i : wire_names) { - if (index >= num_seg) break; + if (index >= num_seg) + break; // Use default values as we will populate rr_graph with correct values // This segments are just declaration of future use diff --git a/libs/libarchfpga/src/read_fpga_interchange_arch.h b/libs/libarchfpga/src/read_fpga_interchange_arch.h index c859f97a002..753b44d3010 100644 --- a/libs/libarchfpga/src/read_fpga_interchange_arch.h +++ b/libs/libarchfpga/src/read_fpga_interchange_arch.h @@ -5,12 +5,12 @@ #ifdef VTR_ENABLE_CAPNPROTO -# include "DeviceResources.capnp.h" -# include "LogicalNetlist.capnp.h" -# include "capnp/serialize.h" -# include "capnp/serialize-packed.h" -# include -# include +#include "DeviceResources.capnp.h" +#include "LogicalNetlist.capnp.h" +#include "capnp/serialize.h" +#include "capnp/serialize-packed.h" +#include +#include #endif // VTR_ENABLE_CAPNPROTO diff --git a/libs/libarchfpga/src/read_xml_arch_file.cpp b/libs/libarchfpga/src/read_xml_arch_file.cpp index 577171b1c9e..880f4e51318 100644 --- a/libs/libarchfpga/src/read_xml_arch_file.cpp +++ b/libs/libarchfpga/src/read_xml_arch_file.cpp @@ -83,9 +83,7 @@ struct t_pin_counts { int output = 0; int clock = 0; - int total() const { - return input + output + clock; - } + int total() const { return input + output + clock; } }; struct t_pin_locs { @@ -100,9 +98,7 @@ struct t_pin_locs { /* [0..num_sub_tiles-1][0..width-1][0..height-1][0..num_of_layer-1][0..3][0..num_tokens-1] */ vtr::NdMatrix, 5> assignments; - bool is_distribution_set() const { - return distribution_set; - } + bool is_distribution_set() const { return distribution_set; } void set_distribution() { VTR_ASSERT(distribution_set == false); @@ -142,13 +138,9 @@ static void ProcessTileProps(pugi::xml_node Node, t_physical_tile_type* PhysicalTileType, const pugiutil::loc_data& loc_data); -static t_pin_counts ProcessSubTilePorts(pugi::xml_node Parent, - t_sub_tile* SubTile, - const pugiutil::loc_data& loc_data); +static t_pin_counts ProcessSubTilePorts(pugi::xml_node Parent, t_sub_tile* SubTile, const pugiutil::loc_data& loc_data); -static void ProcessTilePort(pugi::xml_node Node, - t_physical_tile_port* port, - const pugiutil::loc_data& loc_data); +static void ProcessTilePort(pugi::xml_node Node, t_physical_tile_port* port, const pugiutil::loc_data& loc_data); static void ProcessTileEquivalentSites(pugi::xml_node Parent, t_sub_tile* SubTile, @@ -194,7 +186,7 @@ static void ProcessSubTiles(pugi::xml_node Node, * string interment storage. * @param loc_data Points to the location in the architecture file where the parser is reading. * @param pb_idx Used to assign unique values to index_in_logical_block field in -* t_pb_type for all pb_types under a logical block type. + * t_pb_type for all pb_types under a logical block type. */ static void ProcessPb_Type(pugi::xml_node Parent, t_pb_type* pb_type, @@ -253,7 +245,7 @@ static void ProcessMode(pugi::xml_node Parent, * @brief Processes tags. * * @param strings String internment storage used to store strings used -* as keys and values in tags. + * as keys and values in tags. * @param Parent An XML node pointing to the parent tag whose children * are to be parsed. * @param loc_data Points to the location in the architecture file where the parser is reading. @@ -289,18 +281,35 @@ static void ProcessSwitchblockLocations(pugi::xml_node switchblock_locations, const t_arch& arch, const pugiutil::loc_data& loc_data); -static e_fc_value_type string_to_fc_value_type(const std::string& str, pugi::xml_node node, const pugiutil::loc_data& loc_data); -static void ProcessChanWidthDistr(pugi::xml_node Node, - t_arch* arch, - const pugiutil::loc_data& loc_data); +static e_fc_value_type string_to_fc_value_type(const std::string& str, + pugi::xml_node node, + const pugiutil::loc_data& loc_data); +static void ProcessChanWidthDistr(pugi::xml_node Node, t_arch* arch, const pugiutil::loc_data& loc_data); static void ProcessChanWidthDistrDir(pugi::xml_node Node, t_chan* chan, const pugiutil::loc_data& loc_data); static void ProcessModels(pugi::xml_node Node, t_arch* arch, const pugiutil::loc_data& loc_data); -static void ProcessModelPorts(pugi::xml_node port_group, t_model* model, std::set& port_names, const pugiutil::loc_data& loc_data); -static void ProcessLayout(pugi::xml_node Node, t_arch* arch, const pugiutil::loc_data& loc_data, int& num_of_avail_layer); -static t_grid_def ProcessGridLayout(vtr::string_internment& strings, pugi::xml_node layout_type_tag, const pugiutil::loc_data& loc_data, t_arch* arch, int& num_of_avail_layer); -static void ProcessBlockTypeLocs(t_grid_def& grid_def, int die_number, vtr::string_internment& strings, pugi::xml_node layout_block_type_tag, const pugiutil::loc_data& loc_data); +static void ProcessModelPorts(pugi::xml_node port_group, + t_model* model, + std::set& port_names, + const pugiutil::loc_data& loc_data); +static void ProcessLayout(pugi::xml_node Node, + t_arch* arch, + const pugiutil::loc_data& loc_data, + int& num_of_avail_layer); +static t_grid_def ProcessGridLayout(vtr::string_internment& strings, + pugi::xml_node layout_type_tag, + const pugiutil::loc_data& loc_data, + t_arch* arch, + int& num_of_avail_layer); +static void ProcessBlockTypeLocs(t_grid_def& grid_def, + int die_number, + vtr::string_internment& strings, + pugi::xml_node layout_block_type_tag, + const pugiutil::loc_data& loc_data); static int get_number_of_layers(pugi::xml_node layout_type_tag, const pugiutil::loc_data& loc_data); -static void ProcessDevice(pugi::xml_node Node, t_arch* arch, t_default_fc_spec& arch_def_fc, const pugiutil::loc_data& loc_data); +static void ProcessDevice(pugi::xml_node Node, + t_arch* arch, + t_default_fc_spec& arch_def_fc, + const pugiutil::loc_data& loc_data); /** * @brief Parses tag in the architecture file. @@ -323,8 +332,17 @@ static void ProcessSwitches(pugi::xml_node Node, int* NumSwitches, const bool timing_enabled, const pugiutil::loc_data& loc_data); -static void ProcessSwitchTdel(pugi::xml_node Node, const bool timing_enabled, const int switch_index, t_arch_switch_inf* Switches, const pugiutil::loc_data& loc_data); -static void ProcessDirects(pugi::xml_node Parent, t_direct_inf** Directs, int* NumDirects, const t_arch_switch_inf* Switches, const int NumSwitches, const pugiutil::loc_data& loc_data); +static void ProcessSwitchTdel(pugi::xml_node Node, + const bool timing_enabled, + const int switch_index, + t_arch_switch_inf* Switches, + const pugiutil::loc_data& loc_data); +static void ProcessDirects(pugi::xml_node Parent, + t_direct_inf** Directs, + int* NumDirects, + const t_arch_switch_inf* Switches, + const int NumSwitches, + const pugiutil::loc_data& loc_data); static void ProcessClockMetalLayers(pugi::xml_node parent, std::unordered_map& metal_layers, pugiutil::loc_data& loc_data); @@ -352,15 +370,15 @@ static void ProcessSegments(pugi::xml_node Parent, const pugiutil::loc_data& loc_data); static void ProcessSwitchblocks(pugi::xml_node Parent, t_arch* arch, const pugiutil::loc_data& loc_data); static void ProcessCB_SB(pugi::xml_node Node, std::vector& list, const pugiutil::loc_data& loc_data); -static void ProcessPower(pugi::xml_node parent, - t_power_arch* power_arch, - const pugiutil::loc_data& loc_data); +static void ProcessPower(pugi::xml_node parent, t_power_arch* power_arch, const pugiutil::loc_data& loc_data); static void ProcessClocks(pugi::xml_node Parent, t_clock_arch* clocks, const pugiutil::loc_data& loc_data); - static void ProcessPb_TypePowerEstMethod(pugi::xml_node Parent, t_pb_type* pb_type, const pugiutil::loc_data& loc_data); -static void ProcessPb_TypePort_Power(pugi::xml_node Parent, t_port* port, e_power_estimation_method power_method, const pugiutil::loc_data& loc_data); +static void ProcessPb_TypePort_Power(pugi::xml_node Parent, + t_port* port, + e_power_estimation_method power_method, + const pugiutil::loc_data& loc_data); std::string inst_port_to_port_name(std::string inst_port); @@ -441,17 +459,17 @@ void XmlReadArch(const char* ArchFile, /* Process switches */ Next = get_single_child(architecture, "switchlist", loc_data); - ProcessSwitches(Next, &(arch->Switches), &(arch->num_switches), - timing_enabled, loc_data); + ProcessSwitches(Next, &(arch->Switches), &(arch->num_switches), timing_enabled, loc_data); /* Process switchblocks. This depends on switches */ - bool switchblocklist_required = (arch->SBType == CUSTOM); //require this section only if custom switchblocks are used + bool switchblocklist_required + = (arch->SBType == CUSTOM); //require this section only if custom switchblocks are used SWITCHBLOCKLIST_REQD = BoolToReqOpt(switchblocklist_required); /* Process segments. This depends on switches */ Next = get_single_child(architecture, "segmentlist", loc_data); - ProcessSegments(Next, arch->Segments, - arch->Switches, arch->num_switches, timing_enabled, switchblocklist_required, loc_data); + ProcessSegments(Next, arch->Segments, arch->Switches, arch->num_switches, timing_enabled, + switchblocklist_required, loc_data); Next = get_single_child(architecture, "switchblocklist", loc_data, SWITCHBLOCKLIST_REQD); if (Next) { @@ -472,9 +490,7 @@ void XmlReadArch(const char* ArchFile, /* Process directs */ Next = get_single_child(architecture, "directlist", loc_data, ReqOpt::OPTIONAL); if (Next) { - ProcessDirects(Next, &(arch->Directs), &(arch->num_directs), - arch->Switches, arch->num_switches, - loc_data); + ProcessDirects(Next, &(arch->Directs), &(arch->num_directs), arch->Switches, arch->num_switches, loc_data); } /* Process Clock Networks */ @@ -484,15 +500,9 @@ void XmlReadArch(const char* ArchFile, expect_only_children(Next, expected_children, loc_data); ProcessClockMetalLayers(Next, arch->clock_arch.clock_metal_layers, loc_data); - ProcessClockNetworks(Next, - arch->clock_arch.clock_networks_arch, - arch->Switches, - arch->num_switches, + ProcessClockNetworks(Next, arch->clock_arch.clock_networks_arch, arch->Switches, arch->num_switches, loc_data); - ProcessClockRouting(Next, - arch->clock_arch.clock_connections_arch, - arch->Switches, - arch->num_switches, + ProcessClockRouting(Next, arch->clock_arch.clock_connections_arch, arch->Switches, arch->num_switches, loc_data); } @@ -515,8 +525,7 @@ void XmlReadArch(const char* ArchFile, /* This information still needs to be read, even if it is just * thrown away. */ - t_power_arch* power_arch_fake = (t_power_arch*)vtr::calloc(1, - sizeof(t_power_arch)); + t_power_arch* power_arch_fake = (t_power_arch*)vtr::calloc(1, sizeof(t_power_arch)); ProcessPower(Next, power_arch_fake, loc_data); free(power_arch_fake); } @@ -531,8 +540,7 @@ void XmlReadArch(const char* ArchFile, /* This information still needs to be read, even if it is just * thrown away. */ - t_clock_arch* clocks_fake = (t_clock_arch*)vtr::calloc(1, - sizeof(t_clock_arch)); + t_clock_arch* clocks_fake = (t_clock_arch*)vtr::calloc(1, sizeof(t_clock_arch)); ProcessClocks(Next, clocks_fake, loc_data); free(clocks_fake->clock_inf); free(clocks_fake); @@ -549,10 +557,7 @@ void XmlReadArch(const char* ArchFile, check_models(arch); MarkIoTypes(PhysicalTileTypes); - } catch (pugiutil::XmlError& e) { - archfpga_throw(ArchFile, e.line(), - "%s", e.what()); - } + } catch (pugiutil::XmlError& e) { archfpga_throw(ArchFile, e.line(), "%s", e.what()); } } /* @@ -606,10 +611,8 @@ static void LoadPinLoc(pugi::xml_node Locations, for (int width = 0; width < type->width; ++width) { for (int height = 0; height < type->height; ++height) { for (e_side side : TOTAL_2D_SIDES) { - if (((width == 0 && side == LEFT) - || (height == type->height - 1 && side == TOP) - || (width == type->width - 1 && side == RIGHT) - || (height == 0 && side == BOTTOM)) + if (((width == 0 && side == LEFT) || (height == type->height - 1 && side == TOP) + || (width == type->width - 1 && side == RIGHT) || (height == 0 && side == BOTTOM)) && ipin < type->num_pins) { //On a side, with pins still to allocate @@ -670,10 +673,8 @@ static void LoadPinLoc(pugi::xml_node Locations, for (int width = 0; width < type->width; ++width) { for (int height = 0; height < type->height; ++height) { for (e_side side : TOTAL_2D_SIDES) { - if (((width == 0 && side == LEFT) - || (height == type->height - 1 && side == TOP) - || (width == type->width - 1 && side == RIGHT) - || (height == 0 && side == BOTTOM)) + if (((width == 0 && side == LEFT) || (height == type->height - 1 && side == TOP) + || (width == type->width - 1 && side == RIGHT) || (height == 0 && side == BOTTOM)) && ipin < output_pins.size()) { //On a perimeter side, with pins still to allocate @@ -702,16 +703,17 @@ static void LoadPinLoc(pugi::xml_node Locations, for (int height = 0; height < type->height; ++height) { for (e_side side : TOTAL_2D_SIDES) { for (auto token : pin_locs->assignments[sub_tile_index][width][height][layer][side]) { - auto pin_range = ProcessPinString(Locations, - &sub_tile, - token.c_str(), - loc_data); + auto pin_range + = ProcessPinString(Locations, &sub_tile, token.c_str(), loc_data); for (int pin_num = pin_range.first; pin_num < pin_range.second; ++pin_num) { - VTR_ASSERT(pin_num < (int)sub_tile.sub_tile_to_tile_pin_indices.size() / sub_tile_capacity); + VTR_ASSERT(pin_num + < (int)sub_tile.sub_tile_to_tile_pin_indices.size() / sub_tile_capacity); for (int capacity = 0; capacity < sub_tile_capacity; ++capacity) { - int sub_tile_pin_index = pin_num + capacity * sub_tile.num_phy_pins / sub_tile_capacity; - int physical_pin_index = sub_tile.sub_tile_to_tile_pin_indices[sub_tile_pin_index]; + int sub_tile_pin_index + = pin_num + capacity * sub_tile.num_phy_pins / sub_tile_capacity; + int physical_pin_index + = sub_tile.sub_tile_to_tile_pin_indices[sub_tile_pin_index]; type->pinloc[width][height][side][physical_pin_index] = true; type->pin_width_offset[physical_pin_index] += width; type->pin_height_offset[physical_pin_index] += height; @@ -767,16 +769,14 @@ static std::pair ProcessPinString(pugi::xml_node Locations, token = tokens[token_index]; if (token.type != TOKEN_STRING) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), - "No port name is present: %s\n", pin_loc_string); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), "No port name is present: %s\n", + pin_loc_string); } auto port = get_port_by_name(type, token.data); if (port == nullptr) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), - "Port %s for %s could not be found: %s\n", - type->name, token.data, - pin_loc_string); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), "Port %s for %s could not be found: %s\n", + type->name, token.data, pin_loc_string); } int abs_first_pin_idx = port->absolute_first_pin_index; @@ -791,8 +791,8 @@ static std::pair ProcessPinString(pugi::xml_node Locations, token = tokens[token_index]; if (token.type != TOKEN_OPEN_SQUARE_BRACKET) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), - "No open square bracket present: %s\n", pin_loc_string); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), "No open square bracket present: %s\n", + pin_loc_string); } token_index++; @@ -811,8 +811,8 @@ static std::pair ProcessPinString(pugi::xml_node Locations, // Single pin is specified if (token.type != TOKEN_COLON) { if (token.type != TOKEN_CLOSE_SQUARE_BRACKET) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), - "No closing bracket: %s\n", pin_loc_string); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), "No closing bracket: %s\n", + pin_loc_string); } token_index++; @@ -840,8 +840,8 @@ static std::pair ProcessPinString(pugi::xml_node Locations, token = tokens[token_index]; if (token.type != TOKEN_CLOSE_SQUARE_BRACKET) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), - "No closed square bracket: %s\n", pin_loc_string); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), "No closed square bracket: %s\n", + pin_loc_string); } token_index++; @@ -878,8 +878,7 @@ static void ProcessPinToPinAnnotations(pugi::xml_node Parent, if (get_attribute(Parent, "value", loc_data, ReqOpt::OPTIONAL).as_string(nullptr)) { i++; } - if (0 == strcmp(Parent.name(), "C_constant") - || 0 == strcmp(Parent.name(), "C_matrix") + if (0 == strcmp(Parent.name(), "C_constant") || 0 == strcmp(Parent.name(), "C_matrix") || 0 == strcmp(Parent.name(), "pack_pattern")) { i = 1; } @@ -998,8 +997,8 @@ static void ProcessPinToPinAnnotations(pugi::xml_node Parent, if (!found_min_max_attrib) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "Failed to find either 'max' or 'min' attribute required for <%s> in <%s>", - Parent.name(), Parent.parent().name()); + "Failed to find either 'max' or 'min' attribute required for <%s> in <%s>", Parent.name(), + Parent.parent().name()); } Prop = get_attribute(Parent, "port", loc_data).value(); @@ -1041,14 +1040,15 @@ static void ProcessPinToPinAnnotations(pugi::xml_node Parent, annotation->output_pins = vtr::strdup(Prop); } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "Unknown port type %s in %s in %s", Parent.name(), - Parent.parent().name(), Parent.parent().parent().name()); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), "Unknown port type %s in %s in %s", + Parent.name(), Parent.parent().name(), Parent.parent().parent().name()); } VTR_ASSERT(i == annotation->num_value_prop_pairs); } -static void ProcessPb_TypePowerPinToggle(pugi::xml_node parent, t_pb_type* pb_type, const pugiutil::loc_data& loc_data) { +static void ProcessPb_TypePowerPinToggle(pugi::xml_node parent, + t_pb_type* pb_type, + const pugiutil::loc_data& loc_data) { pugi::xml_node cur; const char* prop; t_port* port; @@ -1061,8 +1061,7 @@ static void ProcessPb_TypePowerPinToggle(pugi::xml_node parent, t_pb_type* pb_ty port = findPortByName(prop, pb_type, &high, &low); if (!port) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Could not find port '%s' needed for energy per toggle.", - prop); + "Could not find port '%s' needed for energy per toggle.", prop); } if (high != port->num_pins - 1 || low != 0) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), @@ -1070,15 +1069,13 @@ static void ProcessPb_TypePowerPinToggle(pugi::xml_node parent, t_pb_type* pb_ty } if (port->port_power->pin_toggle_initialized) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Duplicate pin-toggle energy for port '%s'", port->name); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), "Duplicate pin-toggle energy for port '%s'", + port->name); } port->port_power->pin_toggle_initialized = true; /* Get energy per toggle */ - port->port_power->energy_per_toggle = get_attribute(cur, - "energy_per_toggle", loc_data) - .as_float(0.); + port->port_power->energy_per_toggle = get_attribute(cur, "energy_per_toggle", loc_data).as_float(0.); /* Get scaled by factor */ bool reverse_scaled = false; @@ -1091,12 +1088,10 @@ static void ProcessPb_TypePowerPinToggle(pugi::xml_node parent, t_pb_type* pb_ty } if (prop) { - port->port_power->scaled_by_port = findPortByName(prop, pb_type, - &high, &low); + port->port_power->scaled_by_port = findPortByName(prop, pb_type, &high, &low); if (high != low) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Pin-toggle 'scaled_by_static_prob' must be a single pin (%s)", - prop); + "Pin-toggle 'scaled_by_static_prob' must be a single pin (%s)", prop); } port->port_power->scaled_by_port_pin_idx = high; port->port_power->reverse_scaled = reverse_scaled; @@ -1136,23 +1131,25 @@ static void ProcessPb_TypePower(pugi::xml_node Parent, t_pb_type* pb_type, const if (require_static_absolute) { child = get_single_child(cur, "static_power", loc_data); - pb_type->pb_type_power->absolute_power_per_instance.leakage = get_attribute(child, "power_per_instance", loc_data).as_float(0.); + pb_type->pb_type_power->absolute_power_per_instance.leakage + = get_attribute(child, "power_per_instance", loc_data).as_float(0.); } if (require_dynamic_absolute) { child = get_single_child(cur, "dynamic_power", loc_data); - pb_type->pb_type_power->absolute_power_per_instance.dynamic = get_attribute(child, "power_per_instance", loc_data).as_float(0.); + pb_type->pb_type_power->absolute_power_per_instance.dynamic + = get_attribute(child, "power_per_instance", loc_data).as_float(0.); } if (require_dynamic_C_internal) { child = get_single_child(cur, "dynamic_power", loc_data); - pb_type->pb_type_power->C_internal = get_attribute(child, - "C_internal", loc_data) - .as_float(0.); + pb_type->pb_type_power->C_internal = get_attribute(child, "C_internal", loc_data).as_float(0.); } } -static void ProcessPb_TypePowerEstMethod(pugi::xml_node Parent, t_pb_type* pb_type, const pugiutil::loc_data& loc_data) { +static void ProcessPb_TypePowerEstMethod(pugi::xml_node Parent, + t_pb_type* pb_type, + const pugiutil::loc_data& loc_data) { pugi::xml_node cur; const char* prop; @@ -1190,8 +1187,7 @@ static void ProcessPb_TypePowerEstMethod(pugi::xml_node Parent, t_pb_type* pb_ty pb_type->pb_type_power->estimation_method = POWER_METHOD_SUM_OF_CHILDREN; } else { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Invalid power estimation method for pb_type '%s'", - pb_type->name); + "Invalid power estimation method for pb_type '%s'", pb_type->name); } } @@ -1264,9 +1260,8 @@ static void ProcessPb_Type(pugi::xml_node Parent, } else if (0 == strcmp(class_name, PB_TYPE_CLASS_STRING[MEMORY_CLASS])) { pb_type->class_type = MEMORY_CLASS; } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "Unknown class '%s' in pb_type '%s'\n", class_name, - pb_type->name); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), "Unknown class '%s' in pb_type '%s'\n", + class_name, pb_type->name); } free(class_name); } @@ -1292,8 +1287,8 @@ static void ProcessPb_Type(pugi::xml_node Parent, archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), "%s primitives must contain exactly one input port and one output port." "Found '%d' input port(s) and '%d' output port(s) for '%s'", - (pb_type->class_type == LUT_CLASS) ? "LUT" : "Latch", - num_in_ports, num_out_ports, pb_type->name); + (pb_type->class_type == LUT_CLASS) ? "LUT" : "Latch", num_in_ports, num_out_ports, + pb_type->name); } } @@ -1316,8 +1311,8 @@ static void ProcessPb_Type(pugi::xml_node Parent, pb_type->ports[port_idx].parent_pb_type = pb_type; pb_type->ports[port_idx].index = port_idx; pb_type->ports[port_idx].port_index_by_type = port_index_by_type; - ProcessPb_TypePort(Cur, &pb_type->ports[port_idx], - pb_type->pb_type_power->estimation_method, is_root_pb_type, loc_data); + ProcessPb_TypePort(Cur, &pb_type->ports[port_idx], pb_type->pb_type_power->estimation_method, + is_root_pb_type, loc_data); pb_type->ports[port_idx].absolute_first_pin_index = absolute_port_first_pin_index; absolute_port_first_pin_index += pb_type->ports[port_idx].num_pins; @@ -1326,8 +1321,8 @@ static void ProcessPb_Type(pugi::xml_node Parent, auto [_, success] = pb_port_names.insert(pb_type->ports[port_idx].name); if (!success) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), - "Duplicate port names in pb_type '%s': port '%s'\n", - pb_type->name, pb_type->ports[port_idx].name); + "Duplicate port names in pb_type '%s': port '%s'\n", pb_type->name, + pb_type->ports[port_idx].name); } /* get next iteration */ @@ -1371,7 +1366,8 @@ static void ProcessPb_Type(pugi::xml_node Parent, if (pb_type->blif_model != nullptr) { /* Process delay and capacitance annotations */ int num_annotations = 0; - for (auto child_name : {"delay_constant", "delay_matrix", "C_constant", "C_matrix", "T_setup", "T_clock_to_Q", "T_hold"}) { + for (auto child_name : + {"delay_constant", "delay_matrix", "C_constant", "C_matrix", "T_setup", "T_clock_to_Q", "T_hold"}) { num_annotations += count_children(Parent, child_name, loc_data, ReqOpt::OPTIONAL); } @@ -1379,7 +1375,8 @@ static void ProcessPb_Type(pugi::xml_node Parent, pb_type->num_annotations = num_annotations; int annotation_idx = 0; - for (auto child_name : {"delay_constant", "delay_matrix", "C_constant", "C_matrix", "T_setup", "T_clock_to_Q", "T_hold"}) { + for (auto child_name : + {"delay_constant", "delay_matrix", "C_constant", "C_matrix", "T_setup", "T_clock_to_Q", "T_hold"}) { Cur = get_first_child(Parent, child_name, loc_data, ReqOpt::OPTIONAL); while (Cur) { @@ -1437,8 +1434,8 @@ static void ProcessPb_Type(pugi::xml_node Parent, auto [_, success] = mode_names.insert(pb_type->modes[mode_idx].name); if (!success) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), - "Duplicate mode name: '%s' in pb_type '%s'.\n", - pb_type->modes[mode_idx].name, pb_type->name); + "Duplicate mode name: '%s' in pb_type '%s'.\n", pb_type->modes[mode_idx].name, + pb_type->name); } /* get next iteration */ @@ -1454,7 +1451,10 @@ static void ProcessPb_Type(pugi::xml_node Parent, ProcessPb_TypePower(Parent, pb_type, loc_data); } -static void ProcessPb_TypePort_Power(pugi::xml_node Parent, t_port* port, e_power_estimation_method power_method, const pugiutil::loc_data& loc_data) { +static void ProcessPb_TypePort_Power(pugi::xml_node Parent, + t_port* port, + e_power_estimation_method power_method, + const pugiutil::loc_data& loc_data) { pugi::xml_node cur; const char* prop; bool wire_defined = false; @@ -1478,10 +1478,10 @@ static void ProcessPb_TypePort_Power(pugi::xml_node Parent, t_port* port, e_powe /* Absolute C provided */ prop = get_attribute(cur, "wire_capacitance", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); if (prop) { - if (!(power_method == POWER_METHOD_AUTO_SIZES - || power_method == POWER_METHOD_SPECIFY_SIZES)) { + if (!(power_method == POWER_METHOD_AUTO_SIZES || power_method == POWER_METHOD_SPECIFY_SIZES)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Wire capacitance defined for port '%s'. This is an invalid option for the parent pb_type '%s' power estimation method.", + "Wire capacitance defined for port '%s'. This is an invalid option for the parent " + "pb_type '%s' power estimation method.", port->name, port->parent_pb_type->name); } else { wire_defined = true; @@ -1493,15 +1493,15 @@ static void ProcessPb_TypePort_Power(pugi::xml_node Parent, t_port* port, e_powe /* Wire absolute length provided */ prop = get_attribute(cur, "wire_length", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); if (prop) { - if (!(power_method == POWER_METHOD_AUTO_SIZES - || power_method == POWER_METHOD_SPECIFY_SIZES)) { + if (!(power_method == POWER_METHOD_AUTO_SIZES || power_method == POWER_METHOD_SPECIFY_SIZES)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Wire length defined for port '%s'. This is an invalid option for the parent pb_type '%s' power estimation method.", + "Wire length defined for port '%s'. This is an invalid option for the parent pb_type " + "'%s' power estimation method.", port->name, port->parent_pb_type->name); } else if (wire_defined) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Multiple wire properties defined for port '%s', pb_type '%s'.", - port->name, port->parent_pb_type->name); + "Multiple wire properties defined for port '%s', pb_type '%s'.", port->name, + port->parent_pb_type->name); } else if (strcmp(prop, "auto") == 0) { wire_defined = true; port->port_power->wire_type = POWER_WIRE_TYPE_AUTO; @@ -1515,15 +1515,15 @@ static void ProcessPb_TypePort_Power(pugi::xml_node Parent, t_port* port, e_powe /* Wire relative length provided */ prop = get_attribute(cur, "wire_relative_length", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); if (prop) { - if (!(power_method == POWER_METHOD_AUTO_SIZES - || power_method == POWER_METHOD_SPECIFY_SIZES)) { + if (!(power_method == POWER_METHOD_AUTO_SIZES || power_method == POWER_METHOD_SPECIFY_SIZES)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Wire relative length defined for port '%s'. This is an invalid option for the parent pb_type '%s' power estimation method.", + "Wire relative length defined for port '%s'. This is an invalid option for the parent " + "pb_type '%s' power estimation method.", port->name, port->parent_pb_type->name); } else if (wire_defined) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Multiple wire properties defined for port '%s', pb_type '%s'.", - port->name, port->parent_pb_type->name); + "Multiple wire properties defined for port '%s', pb_type '%s'.", port->name, + port->parent_pb_type->name); } else { wire_defined = true; port->port_power->wire_type = POWER_WIRE_TYPE_RELATIVE_LENGTH; @@ -1534,10 +1534,10 @@ static void ProcessPb_TypePort_Power(pugi::xml_node Parent, t_port* port, e_powe /* Buffer Size */ prop = get_attribute(cur, "buffer_size", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); if (prop) { - if (!(power_method == POWER_METHOD_AUTO_SIZES - || power_method == POWER_METHOD_SPECIFY_SIZES)) { + if (!(power_method == POWER_METHOD_AUTO_SIZES || power_method == POWER_METHOD_SPECIFY_SIZES)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur), - "Buffer size defined for port '%s'. This is an invalid option for the parent pb_type '%s' power estimation method.", + "Buffer size defined for port '%s'. This is an invalid option for the parent pb_type " + "'%s' power estimation method.", port->name, port->parent_pb_type->name); } else if (strcmp(prop, "auto") == 0) { port->port_power->buffer_type = POWER_BUFFER_TYPE_AUTO; @@ -1549,7 +1549,11 @@ static void ProcessPb_TypePort_Power(pugi::xml_node Parent, t_port* port, e_powe } } -static void ProcessPb_TypePort(pugi::xml_node Parent, t_port* port, e_power_estimation_method power_method, const bool is_root_pb_type, const pugiutil::loc_data& loc_data) { +static void ProcessPb_TypePort(pugi::xml_node Parent, + t_port* port, + e_power_estimation_method power_method, + const bool is_root_pb_type, + const pugiutil::loc_data& loc_data) { std::vector expected_attributes = {"name", "num_pins", "port_class"}; if (is_root_pb_type) { expected_attributes.emplace_back("equivalent"); @@ -1582,18 +1586,15 @@ static void ProcessPb_TypePort(pugi::xml_node Parent, t_port* port, e_power_esti "Invalid pin equivalence '%s' for %s port.", Prop, Parent.name()); } } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "Invalid pin equivalence '%s'.", Prop); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), "Invalid pin equivalence '%s'.", Prop); } } port->num_pins = get_attribute(Parent, "num_pins", loc_data).as_int(0); - port->is_non_clock_global = get_attribute(Parent, - "is_non_clock_global", loc_data, ReqOpt::OPTIONAL) - .as_bool(false); + port->is_non_clock_global = get_attribute(Parent, "is_non_clock_global", loc_data, ReqOpt::OPTIONAL).as_bool(false); if (port->num_pins <= 0) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "Invalid number of pins %d for %s port.", port->num_pins, Parent.name()); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), "Invalid number of pins %d for %s port.", + port->num_pins, Parent.name()); } if (0 == strcmp(Parent.name(), "input")) { @@ -1659,8 +1660,7 @@ static void ProcessPb_TypePort(pugi::xml_node Parent, t_port* port, e_power_esti port->is_clock = true; if (port->is_non_clock_global == true) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "Port %s cannot be both a clock and a non-clock simultaneously\n", - Parent.name()); + "Port %s cannot be both a clock and a non-clock simultaneously\n", Parent.name()); } if (port->parent_pb_type->class_type == LATCH_CLASS) { @@ -1678,8 +1678,7 @@ static void ProcessPb_TypePort(pugi::xml_node Parent, t_port* port, e_power_esti } } } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "Unknown port type %s", Parent.name()); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), "Unknown port type %s", Parent.name()); } ProcessPb_TypePort_Power(Parent, port, power_method, loc_data); @@ -1745,18 +1744,17 @@ static void ProcessInterconnect(vtr::string_internment& strings, num_annotations += count_children(Cur, annot_child_name, loc_data, ReqOpt::OPTIONAL); } - mode->interconnect[interconnect_idx].annotations = (t_pin_to_pin_annotation*)vtr::calloc(num_annotations, - sizeof(t_pin_to_pin_annotation)); + mode->interconnect[interconnect_idx].annotations + = (t_pin_to_pin_annotation*)vtr::calloc(num_annotations, sizeof(t_pin_to_pin_annotation)); mode->interconnect[interconnect_idx].num_annotations = num_annotations; - int annotation_idx = 0; for (auto annot_child_name : {"delay_constant", "delay_matrix", "C_constant", "C_matrix", "pack_pattern"}) { pugi::xml_node Cur2 = get_first_child(Cur, annot_child_name, loc_data, ReqOpt::OPTIONAL); while (Cur2 != nullptr) { - ProcessPinToPinAnnotations(Cur2, - &(mode->interconnect[interconnect_idx].annotations[annotation_idx]), nullptr, loc_data); + ProcessPinToPinAnnotations( + Cur2, &(mode->interconnect[interconnect_idx].annotations[annotation_idx]), nullptr, loc_data); /* get next iteration */ annotation_idx++; @@ -1766,8 +1764,8 @@ static void ProcessInterconnect(vtr::string_internment& strings, VTR_ASSERT(annotation_idx == num_annotations); /* Power */ - mode->interconnect[interconnect_idx].interconnect_power = (t_interconnect_power*)vtr::calloc(1, - sizeof(t_interconnect_power)); + mode->interconnect[interconnect_idx].interconnect_power + = (t_interconnect_power*)vtr::calloc(1, sizeof(t_interconnect_power)); mode->interconnect[interconnect_idx].interconnect_power->port_info_initialized = false; /* get next iteration */ @@ -1809,11 +1807,10 @@ static void ProcessMode(pugi::xml_node Parent, } /* Override if user specify */ - mode->disable_packing = get_attribute(Parent, "disable_packing", loc_data, ReqOpt::OPTIONAL).as_bool(mode->disable_packing); + mode->disable_packing + = get_attribute(Parent, "disable_packing", loc_data, ReqOpt::OPTIONAL).as_bool(mode->disable_packing); if (mode->disable_packing) { - VTR_LOG("mode '%s[%s]' is defined by user to be disabled in packing\n", - mode->parent_pb_type->name, - mode->name); + VTR_LOG("mode '%s[%s]' is defined by user to be disabled in packing\n", mode->parent_pb_type->name, mode->name); } mode->num_pb_type_children = count_children(Parent, "pb_type", loc_data, ReqOpt::OPTIONAL); @@ -1828,7 +1825,8 @@ static void ProcessMode(pugi::xml_node Parent, while (Cur != nullptr) { if (0 == strcmp(Cur.name(), "pb_type")) { parent_pb_idx++; - ProcessPb_Type(Cur, &mode->pb_type_children[pb_type_child_idx], mode, timing_enabled, arch, loc_data, parent_pb_idx); + ProcessPb_Type(Cur, &mode->pb_type_children[pb_type_child_idx], mode, timing_enabled, arch, loc_data, + parent_pb_idx); auto [_, success] = pb_type_names.insert(mode->pb_type_children[pb_type_child_idx].name); if (!success) { @@ -1873,8 +1871,7 @@ static t_metadata_dict ProcessMetadata(vtr::string_internment& strings, auto key = get_attribute(meta_tag, "name", loc_data).as_string(); auto value = meta_tag.child_value(); - data.add(strings.intern_string(vtr::string_view(key)), - strings.intern_string(vtr::string_view(value))); + data.add(strings.intern_string(vtr::string_view(key)), strings.intern_string(vtr::string_view(value))); meta_tag = meta_tag.next_sibling(meta_tag.name()); } } @@ -1984,7 +1981,8 @@ static void Process_Fc(pugi::xml_node Node, if (default_overriden) { //Warn if multiple overrides match - VTR_LOGF_WARN(loc_data.filename_c_str(), loc_data.line(Node), "Multiple matching Fc overrides found; the last will be applied\n"); + VTR_LOGF_WARN(loc_data.filename_c_str(), loc_data.line(Node), + "Multiple matching Fc overrides found; the last will be applied\n"); } fc_spec.fc_value_type = fc_override.fc_value_type; @@ -2012,8 +2010,7 @@ static void Process_Fc(pugi::xml_node Node, static t_fc_override Process_Fc_override(pugi::xml_node node, const pugiutil::loc_data& loc_data) { if (node.name() != std::string("fc_override")) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), - "Unexpeted node of type '%s' (expected optional 'fc_override')", - node.name()); + "Unexpeted node of type '%s' (expected optional 'fc_override')", node.name()); } t_fc_override fc_override; @@ -2037,19 +2034,16 @@ static t_fc_override Process_Fc_override(pugi::xml_node node, const pugiutil::lo fc_override.fc_value = vtr::atof(attrib.value()); seen_fc_value = true; } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), - "Unexpected attribute '%s'", attrib.name()); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "Unexpected attribute '%s'", attrib.name()); } } if (!seen_fc_type) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), - "Missing expected attribute 'fc_type'"); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "Missing expected attribute 'fc_type'"); } if (!seen_fc_value) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), - "Missing expected attribute 'fc_value'"); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), "Missing expected attribute 'fc_value'"); } if (!seen_port_or_seg) { @@ -2060,7 +2054,9 @@ static t_fc_override Process_Fc_override(pugi::xml_node node, const pugiutil::lo return fc_override; } -static e_fc_value_type string_to_fc_value_type(const std::string& str, pugi::xml_node node, const pugiutil::loc_data& loc_data) { +static e_fc_value_type string_to_fc_value_type(const std::string& str, + pugi::xml_node node, + const pugiutil::loc_data& loc_data) { e_fc_value_type fc_value_type = e_fc_value_type::FRACTIONAL; if (str == "frac") { @@ -2069,8 +2065,7 @@ static e_fc_value_type string_to_fc_value_type(const std::string& str, pugi::xml fc_value_type = e_fc_value_type::ABSOLUTE; } else { archfpga_throw(loc_data.filename_c_str(), loc_data.line(node), - "Invalid fc_type '%s'. Must be 'abs' or 'frac'.\n", - str.c_str()); + "Invalid fc_type '%s'. Must be 'abs' or 'frac'.\n", str.c_str()); } return fc_value_type; @@ -2084,7 +2079,8 @@ static void ProcessSwitchblockLocations(pugi::xml_node switchblock_locations, expect_only_attributes(switchblock_locations, {"pattern", "internal_switch"}, loc_data); - std::string pattern = get_attribute(switchblock_locations, "pattern", loc_data, ReqOpt::OPTIONAL).as_string("external_full_internal_straight"); + std::string pattern = get_attribute(switchblock_locations, "pattern", loc_data, ReqOpt::OPTIONAL) + .as_string("external_full_internal_straight"); //Initialize the location specs size_t width = type->width; @@ -2124,8 +2120,7 @@ static void ProcessSwitchblockLocations(pugi::xml_node switchblock_locations, sb_type = e_sb_type::FULL; } else { archfpga_throw(loc_data.filename_c_str(), loc_data.line(sb_loc), - "Invalid 'type' attribute '%s'\n", - sb_type_str.c_str()); + "Invalid 'type' attribute '%s'\n", sb_type_str.c_str()); } //Determine the switch type @@ -2138,9 +2133,10 @@ static void ProcessSwitchblockLocations(pugi::xml_node switchblock_locations, sb_switch_override = find_switch_by_name(arch, sb_switch_override_str); if (sb_switch_override == OPEN) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(switchblock_locations), - "Invalid 'switch_override' attribute '%s' (no matching switch named '%s' found)\n", - sb_switch_override_str.c_str(), sb_switch_override_str.c_str()); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(switchblock_locations), + "Invalid 'switch_override' attribute '%s' (no matching switch named '%s' found)\n", + sb_switch_override_str.c_str(), sb_switch_override_str.c_str()); } } @@ -2148,23 +2144,22 @@ static void ProcessSwitchblockLocations(pugi::xml_node switchblock_locations, size_t xoffset = get_attribute(sb_loc, "xoffset", loc_data, ReqOpt::OPTIONAL).as_uint(0); if (xoffset > width - 1) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(sb_loc), - "Invalid 'xoffset' attribute '%zu' (must be in range [%d,%d])\n", - xoffset, 0, width - 1); + "Invalid 'xoffset' attribute '%zu' (must be in range [%d,%d])\n", xoffset, 0, + width - 1); } //Get the vertical offset size_t yoffset = get_attribute(sb_loc, "yoffset", loc_data, ReqOpt::OPTIONAL).as_uint(0); if (yoffset > height - 1) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(sb_loc), - "Invalid 'yoffset' attribute '%zu' (must be in range [%d,%d])\n", - yoffset, 0, height - 1); + "Invalid 'yoffset' attribute '%zu' (must be in range [%d,%d])\n", yoffset, 0, + height - 1); } //Check if this location has already been set if (assigned_locs[xoffset][yoffset]) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(sb_loc), - "Duplicate specifications at xoffset=%zu yoffset=%zu\n", - xoffset, yoffset); + "Duplicate specifications at xoffset=%zu yoffset=%zu\n", xoffset, yoffset); } //Set the custom sb location and type @@ -2188,7 +2183,8 @@ static void ProcessSwitchblockLocations(pugi::xml_node switchblock_locations, if (internal_switch == OPEN) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(switchblock_locations), - "Invalid 'internal_switch' attribute '%s' (no matching switch named '%s' found)\n", + "Invalid 'internal_switch' attribute '%s' (no matching switch " + "named '%s' found)\n", internal_switch_name.c_str(), internal_switch_name.c_str()); } } @@ -2216,8 +2212,7 @@ static void ProcessSwitchblockLocations(pugi::xml_node switchblock_locations, } else { archfpga_throw(loc_data.filename_c_str(), loc_data.line(switchblock_locations), - "Invalid 'pattern' attribute '%s'\n", - pattern.c_str()); + "Invalid 'pattern' attribute '%s'\n", pattern.c_str()); } //Fill in all locations (sets internal) @@ -2294,8 +2289,8 @@ static void ProcessModels(pugi::xml_node Node, t_arch* arch, const pugiutil::loc /* Try insert new model, check if already exist at the same time */ ret_map_name = model_name_map.insert(std::pair(temp->name, 0)); if (!ret_map_name.second) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(model), - "Duplicate model name: '%s'.\n", temp->name); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(model), "Duplicate model name: '%s'.\n", + temp->name); } //Process the ports @@ -2326,7 +2321,10 @@ static void ProcessModels(pugi::xml_node Node, t_arch* arch, const pugiutil::loc return; } -static void ProcessModelPorts(pugi::xml_node port_group, t_model* model, std::set& port_names, const pugiutil::loc_data& loc_data) { +static void ProcessModelPorts(pugi::xml_node port_group, + t_model* model, + std::set& port_names, + const pugiutil::loc_data& loc_data) { for (pugi::xml_attribute attr : port_group.attributes()) { bad_attribute(attr, port_group, loc_data); } @@ -2380,17 +2378,17 @@ static void ProcessModelPorts(pugi::xml_node port_group, t_model* model, std::se //Sanity checks if (model_port->is_clock == true && model_port->is_non_clock_global == true) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(port), - "Model port '%s' cannot be both a clock and a non-clock signal simultaneously", model_port->name); + "Model port '%s' cannot be both a clock and a non-clock signal simultaneously", + model_port->name); } if (model_port->name == nullptr) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(port), - "Model port is missing a name"); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(port), "Model port is missing a name"); } if (port_names.count(model_port->name)) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(port), - "Duplicate model port named '%s'", model_port->name); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(port), "Duplicate model port named '%s'", + model_port->name); } if (dir == OUT_PORT && !model_port->combinational_sink_ports.empty()) { @@ -2412,7 +2410,10 @@ static void ProcessModelPorts(pugi::xml_node port_group, t_model* model, std::se } } -static void ProcessLayout(pugi::xml_node layout_tag, t_arch* arch, const pugiutil::loc_data& loc_data, int& num_of_avail_layer) { +static void ProcessLayout(pugi::xml_node layout_tag, + t_arch* arch, + const pugiutil::loc_data& loc_data, + int& num_of_avail_layer) { VTR_ASSERT(layout_tag.name() == std::string("layout")); //Expect no attributes on @@ -2428,7 +2429,8 @@ static void ProcessLayout(pugi::xml_node layout_tag, t_arch* arch, const pugiuti ++fixed_layout_cnt; } else { archfpga_throw(loc_data.filename_c_str(), loc_data.line(layout_type_tag), - "Unexpected tag type '<%s>', expected '' or ''", layout_type_tag.name()); + "Unexpected tag type '<%s>', expected '' or ''", + layout_type_tag.name()); } } @@ -2437,8 +2439,7 @@ static void ProcessLayout(pugi::xml_node layout_tag, t_arch* arch, const pugiuti "Expected either an or tag"); } if (auto_layout_cnt > 1) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(layout_tag), - "Expected at most one tag"); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(layout_tag), "Expected at most one tag"); } VTR_ASSERT_MSG(auto_layout_cnt == 0 || auto_layout_cnt == 1, " may appear at most once"); @@ -2484,8 +2485,7 @@ static t_grid_def ProcessGridLayout(vtr::string_internment& strings, } else { archfpga_throw(loc_data.filename_c_str(), loc_data.line(layout_type_tag), - "Unexpected tag '<%s>'. Expected '' or ''.", - layout_type_tag.name()); + "Unexpected tag '<%s>'. Expected '' or ''.", layout_type_tag.name()); } grid_def.layers.resize(num_of_avail_layer); @@ -2502,11 +2502,14 @@ static t_grid_def ProcessGridLayout(vtr::string_internment& strings, //More than one layer tag is specified, meaning that multi-die FPGA is specified in the arch file //Need to process each tag children to get block types locations for each grid die_number = get_attribute(layer_child, "die", loc_data).as_int(0); - has_global_routing = get_attribute(layer_child, "has_prog_routing", loc_data, ReqOpt::OPTIONAL).as_bool(true); + has_global_routing + = get_attribute(layer_child, "has_prog_routing", loc_data, ReqOpt::OPTIONAL).as_bool(true); arch->layer_global_routing.at(die_number) = has_global_routing; VTR_ASSERT(die_number >= 0 && die_number < num_of_avail_layer); auto insert_res = seen_die_numbers.insert(die_number); - VTR_ASSERT_MSG(insert_res.second, "Two different layers with a same die number may have been specified in the Architecture file"); + VTR_ASSERT_MSG( + insert_res.second, + "Two different layers with a same die number may have been specified in the Architecture file"); ProcessBlockTypeLocs(grid_def, die_number, strings, layer_child, loc_data); } } else { @@ -2637,14 +2640,16 @@ static void ProcessBlockTypeLocs(t_grid_def& grid_def, grid_def.layers.at(die_number).loc_defs.emplace_back(std::move(single)); } else if (loc_type == std::string("col")) { - expect_only_attributes(loc_spec_tag, {"type", "priority", "startx", "repeatx", "starty", "incry"}, loc_data); + expect_only_attributes(loc_spec_tag, {"type", "priority", "startx", "repeatx", "starty", "incry"}, + loc_data); t_grid_loc_def col(type_name, priority); auto startx_attr = get_attribute(loc_spec_tag, "startx", loc_data); col.x.start_expr = startx_attr.value(); - col.x.end_expr = startx_attr.value() + std::string(" + w - 1"); //end is inclusive so need to include block width + col.x.end_expr + = startx_attr.value() + std::string(" + w - 1"); //end is inclusive so need to include block width auto repeat_attr = get_attribute(loc_spec_tag, "repeatx", loc_data, ReqOpt::OPTIONAL); if (repeat_attr) { @@ -2667,14 +2672,16 @@ static void ProcessBlockTypeLocs(t_grid_def& grid_def, grid_def.layers.at(die_number).loc_defs.emplace_back(std::move(col)); } else if (loc_type == std::string("row")) { - expect_only_attributes(loc_spec_tag, {"type", "priority", "starty", "repeaty", "startx", "incrx"}, loc_data); + expect_only_attributes(loc_spec_tag, {"type", "priority", "starty", "repeaty", "startx", "incrx"}, + loc_data); t_grid_loc_def row(type_name, priority); auto starty_attr = get_attribute(loc_spec_tag, "starty", loc_data); row.y.start_expr = starty_attr.value(); - row.y.end_expr = starty_attr.value() + std::string(" + h - 1"); //end is inclusive so need to include block height + row.y.end_expr + = starty_attr.value() + std::string(" + h - 1"); //end is inclusive so need to include block height auto repeat_attr = get_attribute(loc_spec_tag, "repeaty", loc_data, ReqOpt::OPTIONAL); if (repeat_attr) { @@ -2696,11 +2703,10 @@ static void ProcessBlockTypeLocs(t_grid_def& grid_def, grid_def.layers.at(die_number).loc_defs.emplace_back(std::move(row)); } else if (loc_type == std::string("region")) { - expect_only_attributes(loc_spec_tag, - {"type", "priority", - "startx", "endx", "repeatx", "incrx", - "starty", "endy", "repeaty", "incry"}, - loc_data); + expect_only_attributes( + loc_spec_tag, + {"type", "priority", "startx", "endx", "repeatx", "incrx", "starty", "endy", "repeaty", "incry"}, + loc_data); t_grid_loc_def region(type_name, priority); auto startx_attr = get_attribute(loc_spec_tag, "startx", loc_data, ReqOpt::OPTIONAL); @@ -2775,7 +2781,10 @@ static int get_number_of_layers(pugi::xml_node layout_type_tag, const pugiutil:: /* Takes in node pointing to and loads all the * child type objects. */ -static void ProcessDevice(pugi::xml_node Node, t_arch* arch, t_default_fc_spec& arch_def_fc, const pugiutil::loc_data& loc_data) { +static void ProcessDevice(pugi::xml_node Node, + t_arch* arch, + t_default_fc_spec& arch_def_fc, + const pugiutil::loc_data& loc_data) { const char* Prop; pugi::xml_node Cur; bool custom_switch_block = false; @@ -2791,7 +2800,8 @@ static void ProcessDevice(pugi::xml_node Node, t_arch* arch, t_default_fc_spec& archfpga_throw(e.filename().c_str(), e.line(), msg.c_str()); } - expect_only_children(Node, {"sizing", "area", "chan_width_distr", "switch_block", "connection_block", "default_fc"}, loc_data); + expect_only_children(Node, {"sizing", "area", "chan_width_distr", "switch_block", "connection_block", "default_fc"}, + loc_data); // tag Cur = get_single_child(Node, "sizing", loc_data); @@ -2802,9 +2812,7 @@ static void ProcessDevice(pugi::xml_node Node, t_arch* arch, t_default_fc_spec& // tag Cur = get_single_child(Node, "area", loc_data); expect_only_attributes(Cur, {"grid_logic_tile_area"}, loc_data); - arch->grid_logic_tile_area = get_attribute(Cur, "grid_logic_tile_area", - loc_data, ReqOpt::OPTIONAL) - .as_float(0); + arch->grid_logic_tile_area = get_attribute(Cur, "grid_logic_tile_area", loc_data, ReqOpt::OPTIONAL).as_float(0); // tag Cur = get_single_child(Node, "chan_width_distr", loc_data, ReqOpt::OPTIONAL); @@ -2817,7 +2825,8 @@ static void ProcessDevice(pugi::xml_node Node, t_arch* arch, t_default_fc_spec& Cur = get_single_child(Node, "connection_block", loc_data); expect_only_attributes(Cur, {"input_switch_name", "input_inter_die_switch_name"}, loc_data); arch->ipin_cblock_switch_name.emplace_back(get_attribute(Cur, "input_switch_name", loc_data).as_string()); - std::string inter_die_conn = get_attribute(Cur, "input_inter_die_switch_name", loc_data, ReqOpt::OPTIONAL).as_string(""); + std::string inter_die_conn + = get_attribute(Cur, "input_inter_die_switch_name", loc_data, ReqOpt::OPTIONAL).as_string(""); if (inter_die_conn != "") { arch->ipin_cblock_switch_name.push_back(inter_die_conn); } @@ -2836,8 +2845,8 @@ static void ProcessDevice(pugi::xml_node Node, t_arch* arch, t_default_fc_spec& arch->SBType = CUSTOM; custom_switch_block = true; } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), - "Unknown property %s for switch block type x\n", Prop); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), "Unknown property %s for switch block type x\n", + Prop); } ReqOpt CUSTOM_SWITCHBLOCK_REQD = BoolToReqOpt(!custom_switch_block); @@ -2855,9 +2864,7 @@ static void ProcessDevice(pugi::xml_node Node, t_arch* arch, t_default_fc_spec& /* Takes in node pointing to and loads all the * child type objects. */ -static void ProcessChanWidthDistr(pugi::xml_node Node, - t_arch* arch, - const pugiutil::loc_data& loc_data) { +static void ProcessChanWidthDistr(pugi::xml_node Node, t_arch* arch, const pugiutil::loc_data& loc_data) { pugi::xml_node Cur; expect_only_children(Node, {"x", "y"}, loc_data); @@ -2890,8 +2897,8 @@ static void ProcessChanWidthDistrDir(pugi::xml_node Node, t_chan* chan, const pu hasXpeak = hasDc = ReqOpt::REQUIRED; chan->type = DELTA; } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Unknown property %s for chan_width_distr x\n", Prop); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unknown property %s for chan_width_distr x\n", + Prop); } chan->peak = get_attribute(Node, "peak", loc_data).as_float(UNDEFINED); @@ -2907,7 +2914,6 @@ static void ProcessTiles(pugi::xml_node Node, t_arch& arch, const pugiutil::loc_data& loc_data, const int num_of_avail_layer) { - // used to find duplicate tile names std::set tile_type_descriptors; @@ -2953,7 +2959,8 @@ static void ProcessTiles(pugi::xml_node Node, pugi::xml_node Cur = get_single_child(CurTileType, "switchblock_locations", loc_data, ReqOpt::OPTIONAL); ProcessSwitchblockLocations(Cur, &PhysicalTileType, arch, loc_data); - ProcessSubTiles(CurTileType, &PhysicalTileType, LogicalBlockTypes, arch.Segments, arch_def_fc, loc_data, num_of_avail_layer); + ProcessSubTiles(CurTileType, &PhysicalTileType, LogicalBlockTypes, arch.Segments, arch_def_fc, loc_data, + num_of_avail_layer); /* Type fully read */ ++index; @@ -3004,8 +3011,8 @@ static void ProcessTileProps(pugi::xml_node Node, PhysicalTileType->area = get_attribute(Node, "area", loc_data, ReqOpt::OPTIONAL).as_float(UNDEFINED); if (atof(Prop) < 0) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Area for type %s must be non-negative\n", PhysicalTileType->name); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Area for type %s must be non-negative\n", + PhysicalTileType->name); } } @@ -3040,8 +3047,7 @@ static t_pin_counts ProcessSubTilePorts(pugi::xml_node Parent, auto [_, subtile_success] = sub_tile_port_names.insert(port.name); if (!subtile_success) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), - "Duplicate port names in subtile '%s': port '%s'\n", - SubTile->name, port.name); + "Duplicate port names in subtile '%s': port '%s'\n", SubTile->name, port.name); } //Push port @@ -3075,9 +3081,7 @@ static t_pin_counts ProcessSubTilePorts(pugi::xml_node Parent, return pin_counts; } -static void ProcessTilePort(pugi::xml_node Node, - t_physical_tile_port* port, - const pugiutil::loc_data& loc_data) { +static void ProcessTilePort(pugi::xml_node Node, t_physical_tile_port* port, const pugiutil::loc_data& loc_data) { std::vector expected_attributes = {"name", "num_pins", "equivalent"}; if (Node.name() == "input"s || Node.name() == "clock"s) { @@ -3104,18 +3108,15 @@ static void ProcessTilePort(pugi::xml_node Node, "Invalid pin equivalence '%s' for %s port.", Prop, Node.name()); } } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Invalid pin equivalence '%s'.", Prop); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Invalid pin equivalence '%s'.", Prop); } } port->num_pins = get_attribute(Node, "num_pins", loc_data).as_int(0); - port->is_non_clock_global = get_attribute(Node, - "is_non_clock_global", loc_data, ReqOpt::OPTIONAL) - .as_bool(false); + port->is_non_clock_global = get_attribute(Node, "is_non_clock_global", loc_data, ReqOpt::OPTIONAL).as_bool(false); if (port->num_pins <= 0) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Invalid number of pins %d for %s port.", port->num_pins, Node.name()); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Invalid number of pins %d for %s port.", + port->num_pins, Node.name()); } if (0 == strcmp(Node.name(), "input")) { @@ -3132,13 +3133,11 @@ static void ProcessTilePort(pugi::xml_node Node, if (port->is_non_clock_global) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Port %s cannot be both a clock and a non-clock simultaneously\n", - Node.name()); + "Port %s cannot be both a clock and a non-clock simultaneously\n", Node.name()); } } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Unknown port type %s", Node.name()); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unknown port type %s", Node.name()); } } @@ -3194,7 +3193,8 @@ static void ProcessEquivalentSiteDirectConnection(pugi::xml_node Parent, if (num_pins != LogicalBlockType->pb_type->num_pins) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "Pin definition differ between site %s and tile %s. User-defined pin mapping is required.\n", LogicalBlockType->pb_type->name, SubTile->name); + "Pin definition differ between site %s and tile %s. User-defined pin mapping is required.\n", + LogicalBlockType->pb_type->name, SubTile->name); } vtr::bimap directs_map; @@ -3221,7 +3221,8 @@ static void ProcessEquivalentSiteCustomConnection(pugi::xml_node Parent, if (count_children(Parent, "direct", loc_data) < 1) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Parent), - "There are no direct pin mappings between site %s and tile %s.\n", site_name.c_str(), SubTile->name); + "There are no direct pin mappings between site %s and tile %s.\n", site_name.c_str(), + SubTile->name); } vtr::bimap directs_map; @@ -3344,8 +3345,7 @@ static void ProcessPinLocations(pugi::xml_node Locations, } else if (0 == strcmp(Prop, "bottom")) { side = BOTTOM; } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), - "'%s' is not a valid side.\n", Prop); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), "'%s' is not a valid side.\n", Prop); } if ((x_offset < 0) || (x_offset >= PhysicalTileType->width)) { @@ -3355,14 +3355,15 @@ static void ProcessPinLocations(pugi::xml_node Locations, } if ((y_offset < 0) || (y_offset >= PhysicalTileType->height)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), - "'%d' is an invalid vertical offset for type '%s' (must be within [0, %d]).\n", - y_offset, PhysicalTileType->name, PhysicalTileType->height - 1); + "'%d' is an invalid vertical offset for type '%s' (must be within [0, %d]).\n", y_offset, + PhysicalTileType->name, PhysicalTileType->height - 1); } if ((layer_offset < 0) || layer_offset >= num_of_avail_layer) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), - "'%d' is an invalid layer offset for type '%s' (must be within [0, num_avail_layer-1]).\n", - y_offset, PhysicalTileType->name, PhysicalTileType->height - 1); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(Cur), + "'%d' is an invalid layer offset for type '%s' (must be within [0, num_avail_layer-1]).\n", + y_offset, PhysicalTileType->name, PhysicalTileType->height - 1); } //Check for duplicate side specifications, since the code below silently overwrites if there are duplicates @@ -3380,7 +3381,8 @@ static void ProcessPinLocations(pugi::xml_node Locations, if (Count > 0) { for (int pin = 0; pin < Count; ++pin) { /* Store location assignment */ - pin_locs->assignments[sub_tile_index][x_offset][y_offset][std::abs(layer_offset)][side].emplace_back(Tokens[pin].c_str()); + pin_locs->assignments[sub_tile_index][x_offset][y_offset][std::abs(layer_offset)][side] + .emplace_back(Tokens[pin].c_str()); /* Advance through list of pins in this location */ } } @@ -3399,17 +3401,20 @@ static void ProcessPinLocations(pugi::xml_node Locations, InstPort inst_port(token.c_str()); //A pin specification should contain only the block name, and not any instance count information - if (inst_port.instance_low_index() != InstPort::UNSPECIFIED || inst_port.instance_high_index() != InstPort::UNSPECIFIED) { + if (inst_port.instance_low_index() != InstPort::UNSPECIFIED + || inst_port.instance_high_index() != InstPort::UNSPECIFIED) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), - "Pin location specification '%s' should not contain an instance range (should only be the block name)", + "Pin location specification '%s' should not contain an instance range " + "(should only be the block name)", token.c_str()); } //Check that the block name matches if (inst_port.instance_name() != SubTile->name) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), - "Mismatched sub tile name in pin location specification (expected '%s' was '%s')", - SubTile->name, inst_port.instance_name().c_str()); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(Locations), + "Mismatched sub tile name in pin location specification (expected '%s' was '%s')", + SubTile->name, inst_port.instance_name().c_str()); } int pin_low_idx = inst_port.port_low_index(); @@ -3454,9 +3459,10 @@ static void ProcessPinLocations(pugi::xml_node Locations, for (int ipin = 0; ipin < port.num_pins; ++ipin) { if (!port_pins_with_specified_locations[port.name].count(ipin)) { //Missing - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Locations), - "Pin '%s.%s[%d]' has no pin location specified (a location is required for pattern=\"custom\")", - SubTile->name, port.name, ipin); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(Locations), + "Pin '%s.%s[%d]' has no pin location specified (a location is required for pattern=\"custom\")", + SubTile->name, port.name, ipin); } } } @@ -3513,8 +3519,7 @@ static void ProcessSubTiles(pugi::xml_node Node, auto [_, success] = sub_tile_names.insert(name); if (!success) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Cur), - "Duplicate Sub Tile names in tile '%s': Sub Tile'%s'\n", - PhysicalTileType->name, name); + "Duplicate Sub Tile names in tile '%s': Sub Tile'%s'\n", PhysicalTileType->name, name); } SubTile.name = name; @@ -3718,7 +3723,8 @@ static void ProcessSegments(pugi::xml_node Parent, Segs[i].parallel_axis = Y_AXIS; y_axis_seg_found = true; } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unsopported parralel axis type: %s\n", tmp); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unsopported parralel axis type: %s\n", + tmp); } } else { x_axis_seg_found = true; @@ -3733,7 +3739,8 @@ static void ProcessSegments(pugi::xml_node Parent, if (it != RES_TYPE_STRING.end()) { Segs[i].res_type = static_cast(std::distance(RES_TYPE_STRING.begin(), it)); } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unsopported segment res_type: %s\n", tmp); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unsopported segment res_type: %s\n", + tmp); } } @@ -3774,8 +3781,7 @@ static void ProcessSegments(pugi::xml_node Parent, } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Invalid switch type '%s'.\n", tmp); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Invalid switch type '%s'.\n", tmp); } //Verify only expected sub-tags are found @@ -3792,8 +3798,8 @@ static void ProcessSegments(pugi::xml_node Parent, } } if (j >= NumSwitches) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), - "'%s' is not a valid mux name.\n", tmp); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), "'%s' is not a valid mux name.\n", + tmp); } Segs[i].arch_opin_between_dice_switch = j; } @@ -3805,7 +3811,7 @@ static void ProcessSegments(pugi::xml_node Parent, tmp = get_attribute(SubElem, "name", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); //check if tag is defined in the architecture, otherwise we should look for and - if(tmp){ + if (tmp) { /* Match names */ for (j = 0; j < NumSwitches; ++j) { if (0 == strcmp(tmp, Switches[j].name.c_str())) { @@ -3813,23 +3819,23 @@ static void ProcessSegments(pugi::xml_node Parent, } } if (j >= NumSwitches) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), - "'%s' is not a valid mux name.\n", tmp); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), "'%s' is not a valid mux name.\n", + tmp); } /* Unidir muxes must have the same switch - * for wire and opin fanin since there is - * really only the mux in unidir. */ + * for wire and opin fanin since there is + * really only the mux in unidir. */ Segs[i].arch_wire_switch = j; Segs[i].arch_opin_switch = j; - } - else { //if a general mux is not defined, we should look for specific mux for each direction in the architecture file + } else { //if a general mux is not defined, we should look for specific mux for each direction in the architecture file SubElem = get_single_child(Node, "mux_inc", loc_data, ReqOpt::OPTIONAL); tmp = get_attribute(SubElem, "name", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); - if(!tmp){ - archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), - "if mux is not specified in a wire segment, both mux_inc and mux_dec should be specified"); - } else{ + if (!tmp) { + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(SubElem), + "if mux is not specified in a wire segment, both mux_inc and mux_dec should be specified"); + } else { /* Match names */ for (j = 0; j < NumSwitches; ++j) { if (0 == strcmp(tmp, Switches[j].name.c_str())) { @@ -3838,22 +3844,23 @@ static void ProcessSegments(pugi::xml_node Parent, } if (j >= NumSwitches) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), - "'%s' is not a valid mux name.\n", tmp); + "'%s' is not a valid mux name.\n", tmp); } /* Unidir muxes must have the same switch - * for wire and opin fanin since there is - * really only the mux in unidir. */ + * for wire and opin fanin since there is + * really only the mux in unidir. */ Segs[i].arch_wire_switch = j; Segs[i].arch_opin_switch = j; } SubElem = get_single_child(Node, "mux_dec", loc_data, ReqOpt::OPTIONAL); tmp = get_attribute(SubElem, "name", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); - if(!tmp){ - archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), - "if mux is not specified in a wire segment, both mux_inc and mux_dec should be specified"); - } else{ + if (!tmp) { + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(SubElem), + "if mux is not specified in a wire segment, both mux_inc and mux_dec should be specified"); + } else { /* Match names */ for (j = 0; j < NumSwitches; ++j) { if (0 == strcmp(tmp, Switches[j].name.c_str())) { @@ -3862,18 +3869,17 @@ static void ProcessSegments(pugi::xml_node Parent, } if (j >= NumSwitches) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), - "'%s' is not a valid mux name.\n", tmp); + "'%s' is not a valid mux name.\n", tmp); } /* Unidir muxes must have the same switch - * for wire and opin fanin since there is - * really only the mux in unidir. */ + * for wire and opin fanin since there is + * really only the mux in unidir. */ Segs[i].arch_wire_switch_dec = j; Segs[i].arch_opin_switch_dec = j; } } - } - else { + } else { VTR_ASSERT(BI_DIRECTIONAL == Segs[i].directionality); SubElem = get_single_child(Node, "wire_switch", loc_data); tmp = get_attribute(SubElem, "name", loc_data).value(); @@ -3934,17 +3940,21 @@ static void ProcessSegments(pugi::xml_node Parent, if (!x_axis_seg_found || !y_axis_seg_found) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Atleast one segment per-axis needs to get specified if no segments with non-specified (default) axis attribute exist."); + "Atleast one segment per-axis needs to get specified if no segments with non-specified " + "(default) axis attribute exist."); } } - -static void calculate_custom_SB_locations(const pugiutil::loc_data& loc_data, const pugi::xml_node& SubElem, const int grid_width, const int grid_height, t_switchblock_inf& sb){ +static void calculate_custom_SB_locations(const pugiutil::loc_data& loc_data, + const pugi::xml_node& SubElem, + const int grid_width, + const int grid_height, + t_switchblock_inf& sb) { auto startx_attr = get_attribute(SubElem, "startx", loc_data, ReqOpt::OPTIONAL); - auto endx_attr = get_attribute(SubElem, "endx", loc_data, ReqOpt::OPTIONAL); + auto endx_attr = get_attribute(SubElem, "endx", loc_data, ReqOpt::OPTIONAL); auto starty_attr = get_attribute(SubElem, "starty", loc_data, ReqOpt::OPTIONAL); - auto endy_attr = get_attribute(SubElem, "endy", loc_data, ReqOpt::OPTIONAL); + auto endy_attr = get_attribute(SubElem, "endy", loc_data, ReqOpt::OPTIONAL); auto repeatx_attr = get_attribute(SubElem, "repeatx", loc_data, ReqOpt::OPTIONAL); auto repeaty_attr = get_attribute(SubElem, "repeaty", loc_data, ReqOpt::OPTIONAL); @@ -3959,19 +3969,17 @@ static void calculate_custom_SB_locations(const pugiutil::loc_data& loc_data, co vars.set_var_value("W", grid_width); vars.set_var_value("H", grid_height); - sb.reg_x.start = startx_attr.empty() ? 0 : p.parse_formula(startx_attr.value(), vars); sb.reg_y.start = starty_attr.empty() ? 0 : p.parse_formula(starty_attr.value(), vars); sb.reg_x.end = endx_attr.empty() ? (grid_width - 1) : p.parse_formula(endx_attr.value(), vars); - sb.reg_y.end = endy_attr.empty() ? (grid_height -1) : p.parse_formula(endy_attr.value(), vars); + sb.reg_y.end = endy_attr.empty() ? (grid_height - 1) : p.parse_formula(endy_attr.value(), vars); sb.reg_x.repeat = repeatx_attr.empty() ? 0 : p.parse_formula(repeatx_attr.value(), vars); sb.reg_y.repeat = repeaty_attr.empty() ? 0 : p.parse_formula(repeaty_attr.value(), vars); sb.reg_x.incr = incrx_attr.empty() ? 1 : p.parse_formula(incrx_attr.value(), vars); sb.reg_y.incr = incry_attr.empty() ? 1 : p.parse_formula(incry_attr.value(), vars); - } /* Processes the switchblocklist section from the xml architecture file. @@ -3985,10 +3993,10 @@ static void ProcessSwitchblocks(pugi::xml_node Parent, t_arch* arch, const pugiu /* get the number of switchblocks */ int num_switchblocks = count_children(Parent, "switchblock", loc_data); arch->switchblocks.reserve(num_switchblocks); - + int layout_index = -1; - for(layout_index = 0; layout_index < (int) arch->grid_layouts.size(); layout_index++){ - if(arch->grid_layouts.at(layout_index).name == arch->device_layout){ + for (layout_index = 0; layout_index < (int)arch->grid_layouts.size(); layout_index++) { + if (arch->grid_layouts.at(layout_index).name == arch->device_layout) { //found the used layout break; } @@ -4014,7 +4022,8 @@ static void ProcessSwitchblocks(pugi::xml_node Parent, t_arch* arch, const pugiu } else if (0 == strcmp(tmp, "unidir")) { sb.directionality = UNI_DIRECTIONAL; } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unsopported switchblock type: %s\n", tmp); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Unsopported switchblock type: %s\n", + tmp); } } @@ -4035,34 +4044,35 @@ static void ProcessSwitchblocks(pugi::xml_node Parent, t_arch* arch, const pugiu } else if (strcmp(tmp, "XY_SPECIFIED") == 0) { sb.location = e_sb_location::E_XY_SPECIFIED; } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), "unrecognized switchblock location: %s\n", tmp); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), + "unrecognized switchblock location: %s\n", tmp); } } /* get the switchblock coordinate only if sb.location is set to E_XY_SPECIFIED*/ - if(sb.location == e_sb_location::E_XY_SPECIFIED){ - if (arch->device_layout == "auto"){ - archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), "Specifying SB locations for auto layout devices are not supported yet!\n"); + if (sb.location == e_sb_location::E_XY_SPECIFIED) { + if (arch->device_layout == "auto") { + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), + "Specifying SB locations for auto layout devices are not supported yet!\n"); } - expect_only_attributes(SubElem, - {"x", "y", "type", - "startx", "endx", "repeatx", "incrx", - "starty", "endy", "repeaty", "incry"}, - loc_data); + expect_only_attributes( + SubElem, {"x", "y", "type", "startx", "endx", "repeatx", "incrx", "starty", "endy", "repeaty", "incry"}, + loc_data); int grid_width = arch->grid_layouts.at(layout_index).width; int grid_height = arch->grid_layouts.at(layout_index).height; - + /* Absolute location that this SB must be applied to, -1 if not specified*/ sb.x = get_attribute(SubElem, "x", loc_data, ReqOpt::OPTIONAL).as_int(-1); sb.y = get_attribute(SubElem, "y", loc_data, ReqOpt::OPTIONAL).as_int(-1); //check if the absolute value is within the device grid width and height - if(sb.x >= grid_width || sb.y >= grid_height) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), \ - "Location (%d,%d) is not valid within the grid! grid dimensions are: (%d,%d)\n", sb.x, sb.y, grid_width, grid_height); + if (sb.x >= grid_width || sb.y >= grid_height) { + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), + "Location (%d,%d) is not valid within the grid! grid dimensions are: (%d,%d)\n", sb.x, + sb.y, grid_width, grid_height); } - + /* if the the switchblock exact location is not specified and a region is specified within the architecture file, * we have to parse the region specification and apply the SB pattern to all the locations fall into the specified * region based on device width and height. @@ -4070,7 +4080,6 @@ static void ProcessSwitchblocks(pugi::xml_node Parent, t_arch* arch, const pugiu if (sb.x == -1 && sb.y == -1) { calculate_custom_SB_locations(loc_data, SubElem, grid_width, grid_height, sb); } - } /* get switchblock permutation functions */ @@ -4111,7 +4120,8 @@ static void ProcessCB_SB(pugi::xml_node Node, std::vector& list, const pug case '1': if (i >= len) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "CB or SB depopulation is too long (%d). It should be %d symbols for CBs and %d symbols for SBs.\n", + "CB or SB depopulation is too long (%d). It should be %d symbols for CBs and %d " + "symbols for SBs.\n", i, len - 1, len); } list[i] = true; @@ -4121,7 +4131,8 @@ static void ProcessCB_SB(pugi::xml_node Node, std::vector& list, const pug case '0': if (i >= len) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "CB or SB depopulation is too long (%d). It should be %d symbols for CBs and %d symbols for SBs.\n", + "CB or SB depopulation is too long (%d). It should be %d symbols for CBs and %d " + "symbols for SBs.\n", i, len - 1, len); } list[i] = false; @@ -4129,22 +4140,21 @@ static void ProcessCB_SB(pugi::xml_node Node, std::vector& list, const pug break; default: archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Invalid character %c in CB or SB depopulation list.\n", - *tmp); + "Invalid character %c in CB or SB depopulation list.\n", *tmp); } ++tmp; } if (i < len) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "CB or SB depopulation is too short (%d). It should be %d symbols for CBs and %d symbols for SBs.\n", - i, len - 1, len); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(Node), + "CB or SB depopulation is too short (%d). It should be %d symbols for CBs and %d symbols for SBs.\n", i, + len - 1, len); } } else { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "'%s' is not a valid type for specifying cb and sb depopulation.\n", - tmp); + "'%s' is not a valid type for specifying cb and sb depopulation.\n", tmp); } } @@ -4189,8 +4199,7 @@ static void ProcessSwitches(pugi::xml_node Parent, for (j = 0; j < i; ++j) { if (0 == strcmp((*Switches)[j].name.c_str(), switch_name)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Two switches with the same name '%s' were found.\n", - switch_name); + "Two switches with the same name '%s' were found.\n", switch_name); } } arch_switch.name = std::string(switch_name); @@ -4202,26 +4211,33 @@ static void ProcessSwitches(pugi::xml_node Parent, SwitchType type = SwitchType::MUX; if (0 == strcmp(type_name, "mux")) { type = SwitchType::MUX; - expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Cinternal", "Tdel", "buf_size", "power_buf_size", "mux_trans_size"}, " with type '"s + type_name + "'"s, loc_data); + expect_only_attributes(Node, + {"type", "name", "R", "Cin", "Cout", "Cinternal", "Tdel", "buf_size", + "power_buf_size", "mux_trans_size"}, + " with type '"s + type_name + "'"s, loc_data); } else if (0 == strcmp(type_name, "tristate")) { type = SwitchType::TRISTATE; - expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Cinternal", "Tdel", "buf_size", "power_buf_size"}, " with type '"s + type_name + "'"s, loc_data); + expect_only_attributes( + Node, {"type", "name", "R", "Cin", "Cout", "Cinternal", "Tdel", "buf_size", "power_buf_size"}, + " with type '"s + type_name + "'"s, loc_data); } else if (0 == strcmp(type_name, "buffer")) { type = SwitchType::BUFFER; - expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel", "buf_size", "power_buf_size"}, " with type '"s + type_name + "'"s, loc_data); + expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel", "buf_size", "power_buf_size"}, + " with type '"s + type_name + "'"s, loc_data); } else if (0 == strcmp(type_name, "pass_gate")) { type = SwitchType::PASS_GATE; - expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel"}, " with type '"s + type_name + "'"s, loc_data); + expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel"}, + " with type '"s + type_name + "'"s, loc_data); } else if (0 == strcmp(type_name, "short")) { type = SwitchType::SHORT; - expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel"}, " with type "s + type_name + "'"s, loc_data); + expect_only_attributes(Node, {"type", "name", "R", "Cin", "Cout", "Tdel"}, + " with type "s + type_name + "'"s, loc_data); } else { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Invalid switch type '%s'.\n", type_name); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), "Invalid switch type '%s'.\n", type_name); } arch_switch.set_type(type); @@ -4249,8 +4265,7 @@ static void ProcessSwitches(pugi::xml_node Parent, arch_switch.mux_trans_size = 0.; } - if (arch_switch.type() == SwitchType::SHORT - || arch_switch.type() == SwitchType::PASS_GATE) { + if (arch_switch.type() == SwitchType::SHORT || arch_switch.type() == SwitchType::PASS_GATE) { //No buffers arch_switch.buf_size_type = BufferSize::ABSOLUTE; arch_switch.buf_size = 0.; @@ -4296,7 +4311,11 @@ static void ProcessSwitches(pugi::xml_node Parent, * * are specified as children of the switch node. In this case, Tdel * is not included as a property of the switch node (first way). */ -static void ProcessSwitchTdel(pugi::xml_node Node, const bool timing_enabled, const int switch_index, t_arch_switch_inf* Switches, const pugiutil::loc_data& loc_data) { +static void ProcessSwitchTdel(pugi::xml_node Node, + const bool timing_enabled, + const int switch_index, + t_arch_switch_inf* Switches, + const pugiutil::loc_data& loc_data) { float Tdel_prop_value; int num_Tdel_children; @@ -4316,8 +4335,9 @@ static void ProcessSwitchTdel(pugi::xml_node Node, const bool timing_enabled, co /* delay should not be specified as a Tdel property AND a Tdel child */ if (has_Tdel_prop && has_Tdel_children) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Switch delay should be specified as EITHER a Tdel property OR as a child of the switch node, not both"); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(Node), + "Switch delay should be specified as EITHER a Tdel property OR as a child of the switch node, not both"); } /* get pointer to the switch's Tdel map, then read-in delay data into this map */ @@ -4335,8 +4355,10 @@ static void ProcessSwitchTdel(pugi::xml_node Node, const bool timing_enabled, co float Tdel_value = get_attribute(Tdel_child, "delay", loc_data).as_float(0.); if (seen_fanins.count(num_inputs)) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(Tdel_child), - "Tdel node specified num_inputs (%d) that has already been specified by another Tdel node", num_inputs); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(Tdel_child), + "Tdel node specified num_inputs (%d) that has already been specified by another Tdel node", + num_inputs); } else { Switches[switch_index].set_Tdel(num_inputs, Tdel_value); seen_fanins.insert(num_inputs); @@ -4355,7 +4377,12 @@ static void ProcessSwitchTdel(pugi::xml_node Node, const bool timing_enabled, co } } -static void ProcessDirects(pugi::xml_node Parent, t_direct_inf** Directs, int* NumDirects, const t_arch_switch_inf* Switches, const int NumSwitches, const pugiutil::loc_data& loc_data) { +static void ProcessDirects(pugi::xml_node Parent, + t_direct_inf** Directs, + int* NumDirects, + const t_arch_switch_inf* Switches, + const int NumSwitches, + const pugiutil::loc_data& loc_data) { int i, j; const char* direct_name; const char* from_pin_name; @@ -4378,15 +4405,17 @@ static void ProcessDirects(pugi::xml_node Parent, t_direct_inf** Directs, int* N /* Load the directs. */ Node = get_first_child(Parent, "direct", loc_data); for (i = 0; i < *NumDirects; ++i) { - expect_only_attributes(Node, {"name", "from_pin", "to_pin", "x_offset", "y_offset", "z_offset", "switch_name", "from_side", "to_side"}, loc_data); + expect_only_attributes( + Node, + {"name", "from_pin", "to_pin", "x_offset", "y_offset", "z_offset", "switch_name", "from_side", "to_side"}, + loc_data); direct_name = get_attribute(Node, "name", loc_data).value(); /* Check for direct name collisions */ for (j = 0; j < i; ++j) { if (0 == strcmp((*Directs)[j].name, direct_name)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "Two directs with the same name '%s' were found.\n", - direct_name); + "Two directs with the same name '%s' were found.\n", direct_name); } } (*Directs)[i].name = vtr::strdup(direct_name); @@ -4398,8 +4427,7 @@ static void ProcessDirects(pugi::xml_node Parent, t_direct_inf** Directs, int* N /* Check that to_pin and the from_pin are not the same */ if (0 == strcmp(to_pin_name, from_pin_name)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(Node), - "The source pin and sink pin are the same: %s.\n", - to_pin_name); + "The source pin and sink pin are the same: %s.\n", to_pin_name); } (*Directs)[i].from_pin = vtr::strdup(from_pin_name); (*Directs)[i].to_pin = vtr::strdup(to_pin_name); @@ -4467,8 +4495,7 @@ static void ProcessClockMetalLayers(pugi::xml_node parent, auto itter = metal_layers.find(name); if (itter != metal_layers.end()) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(curr_layer), - "Two metal layers with the same name '%s' were found.\n", - name.c_str()); + "Two metal layers with the same name '%s' were found.\n", name.c_str()); } metal_layers.insert({name, metal_layer}); @@ -4481,8 +4508,10 @@ static void ProcessClockNetworks(pugi::xml_node parent, const t_arch_switch_inf* switches, const int num_switches, pugiutil::loc_data& loc_data) { - std::vector expected_spine_attributes = {"name", "num_inst", "metal_layer", "starty", "endy", "x", "repeatx", "repeaty"}; - std::vector expected_rib_attributes = {"name", "num_inst", "metal_layer", "startx", "endx", "y", "repeatx", "repeaty"}; + std::vector expected_spine_attributes + = {"name", "num_inst", "metal_layer", "starty", "endy", "x", "repeatx", "repeaty"}; + std::vector expected_rib_attributes + = {"name", "num_inst", "metal_layer", "startx", "endx", "y", "repeatx", "repeaty"}; std::vector expected_children = {"rib", "spine"}; int num_clock_networks = count_children(parent, "clock_network", loc_data); @@ -4722,9 +4751,7 @@ static void ProcessClockRouting(pugi::xml_node parent, } } -static void ProcessPower(pugi::xml_node parent, - t_power_arch* power_arch, - const pugiutil::loc_data& loc_data) { +static void ProcessPower(pugi::xml_node parent, t_power_arch* power_arch, const pugiutil::loc_data& loc_data) { pugi::xml_node Cur; /* Get the local interconnect capacitances */ @@ -4739,9 +4766,7 @@ static void ProcessPower(pugi::xml_node parent, power_arch->logical_effort_factor = 4.0; Cur = get_single_child(parent, "buffers", loc_data, ReqOpt::OPTIONAL); if (Cur) { - power_arch->logical_effort_factor = get_attribute(Cur, - "logical_effort_factor", loc_data) - .as_float(0); + power_arch->logical_effort_factor = get_attribute(Cur, "logical_effort_factor", loc_data).as_float(0); ; } @@ -4749,18 +4774,14 @@ static void ProcessPower(pugi::xml_node parent, power_arch->transistors_per_SRAM_bit = 6.0; Cur = get_single_child(parent, "sram", loc_data, ReqOpt::OPTIONAL); if (Cur) { - power_arch->transistors_per_SRAM_bit = get_attribute(Cur, - "transistors_per_bit", loc_data) - .as_float(0); + power_arch->transistors_per_SRAM_bit = get_attribute(Cur, "transistors_per_bit", loc_data).as_float(0); } /* Get Mux transistor size */ power_arch->mux_transistor_size = 1.0; Cur = get_single_child(parent, "mux_transistor_size", loc_data, ReqOpt::OPTIONAL); if (Cur) { - power_arch->mux_transistor_size = get_attribute(Cur, - "mux_transistor_size", loc_data) - .as_float(0); + power_arch->mux_transistor_size = get_attribute(Cur, "mux_transistor_size", loc_data).as_float(0); } /* Get FF size */ @@ -4774,9 +4795,7 @@ static void ProcessPower(pugi::xml_node parent, power_arch->LUT_transistor_size = 1.0; Cur = get_single_child(parent, "LUT_transistor_size", loc_data, ReqOpt::OPTIONAL); if (Cur) { - power_arch->LUT_transistor_size = get_attribute(Cur, - "LUT_transistor_size", loc_data) - .as_float(0); + power_arch->LUT_transistor_size = get_attribute(Cur, "LUT_transistor_size", loc_data).as_float(0); } } @@ -4792,8 +4811,7 @@ static void ProcessClocks(pugi::xml_node Parent, t_clock_arch* clocks, const pug clocks->clock_inf = nullptr; if (clocks->num_global_clocks > 0) { clocks->clock_inf = (t_clock_network*)vtr::malloc(clocks->num_global_clocks * sizeof(t_clock_network)); - memset(clocks->clock_inf, 0, - clocks->num_global_clocks * sizeof(t_clock_network)); + memset(clocks->clock_inf, 0, clocks->num_global_clocks * sizeof(t_clock_network)); } /* Load the clock info. */ @@ -4860,8 +4878,7 @@ static e_side string_to_side(const std::string& side_str) { } else if (side_str == "bottom") { side = BOTTOM; } else { - archfpga_throw(__FILE__, __LINE__, - "Invalid side specification"); + archfpga_throw(__FILE__, __LINE__, "Invalid side specification"); } return side; } @@ -4874,6 +4891,5 @@ static T* get_type_by_name(const char* type_name, std::vector& types) { } } - archfpga_throw(__FILE__, __LINE__, - "Could not find type: %s\n", type_name); + archfpga_throw(__FILE__, __LINE__, "Could not find type: %s\n", type_name); } \ No newline at end of file diff --git a/libs/libarchfpga/src/read_xml_arch_file_noc_tag.cpp b/libs/libarchfpga/src/read_xml_arch_file_noc_tag.cpp index a9b6091686d..9146e2d42b4 100644 --- a/libs/libarchfpga/src/read_xml_arch_file_noc_tag.cpp +++ b/libs/libarchfpga/src/read_xml_arch_file_noc_tag.cpp @@ -16,9 +16,7 @@ * @param loc_data Points to the location in the xml file where the parser is reading. * @param noc_ref To be filled with NoC router locations and their connectivity. */ -static void process_topology(pugi::xml_node topology_tag, - const pugiutil::loc_data& loc_data, - t_noc_inf* noc_ref); +static void process_topology(pugi::xml_node topology_tag, const pugiutil::loc_data& loc_data, t_noc_inf* noc_ref); /** * @brief Process a tag under a tag. @@ -49,8 +47,8 @@ static void process_router(pugi::xml_node router_tag, * @param noc_ref To be filled with NoC router locations and their connectivity. */ static void process_mesh_topology(pugi::xml_node mesh_topology_tag, - const pugiutil::loc_data& loc_data, t_noc_inf* noc_ref); - + const pugiutil::loc_data& loc_data, + t_noc_inf* noc_ref); /** * Create routers and set their properties so that a mesh grid of routers is created. @@ -68,9 +66,12 @@ static void process_mesh_topology(pugi::xml_node mesh_topology_tag, static void generate_noc_mesh(pugi::xml_node mesh_topology_tag, const pugiutil::loc_data& loc_data, t_noc_inf* noc_ref, - float mesh_region_start_x, float mesh_region_end_x, - float mesh_region_start_y, float mesh_region_end_y, - int mesh_region_start_layer, int mesh_region_end_layer, + float mesh_region_start_x, + float mesh_region_end_x, + float mesh_region_start_y, + float mesh_region_end_y, + int mesh_region_start_layer, + int mesh_region_end_layer, int mesh_size); /** @@ -144,15 +145,13 @@ static void process_noc_overrides(pugi::xml_node noc_overrides_tag, const pugiutil::loc_data& loc_data, t_noc_inf& noc_ref); -void process_noc_tag(pugi::xml_node noc_tag, - t_arch* arch, - const pugiutil::loc_data& loc_data) { +void process_noc_tag(pugi::xml_node noc_tag, t_arch* arch, const pugiutil::loc_data& loc_data) { // a vector representing all the possible attributes within the noc tag - const std::vector expected_noc_attributes = {"link_bandwidth", "link_latency", "router_latency", "noc_router_tile_name"}; + const std::vector expected_noc_attributes + = {"link_bandwidth", "link_latency", "router_latency", "noc_router_tile_name"}; const std::vector expected_noc_children_tags = {"mesh", "topology"}; - // identifier that lets us know when we could not properly convert a string conversion value std::string attribute_conversion_failure_string; @@ -170,27 +169,31 @@ void process_noc_tag(pugi::xml_node noc_tag, // variables below temporarily store the attribute values as string // this is so that scientific notation can be used for these attributes - auto link_bandwidth_intermediate_val = pugiutil::get_attribute(noc_tag, "link_bandwidth", loc_data, pugiutil::REQUIRED).as_string(); + auto link_bandwidth_intermediate_val + = pugiutil::get_attribute(noc_tag, "link_bandwidth", loc_data, pugiutil::REQUIRED).as_string(); noc_ref->link_bandwidth = std::atof(link_bandwidth_intermediate_val); - auto link_latency_intermediate_val = pugiutil::get_attribute(noc_tag, "link_latency", loc_data, pugiutil::REQUIRED).as_string(); + auto link_latency_intermediate_val + = pugiutil::get_attribute(noc_tag, "link_latency", loc_data, pugiutil::REQUIRED).as_string(); noc_ref->link_latency = std::atof(link_latency_intermediate_val); - auto router_latency_intermediate_val = pugiutil::get_attribute(noc_tag, "router_latency", loc_data, pugiutil::REQUIRED).as_string(); + auto router_latency_intermediate_val + = pugiutil::get_attribute(noc_tag, "router_latency", loc_data, pugiutil::REQUIRED).as_string(); noc_ref->router_latency = std::atof(router_latency_intermediate_val); - noc_ref->noc_router_tile_name = pugiutil::get_attribute(noc_tag, "noc_router_tile_name", loc_data, pugiutil::REQUIRED).as_string(); + noc_ref->noc_router_tile_name + = pugiutil::get_attribute(noc_tag, "noc_router_tile_name", loc_data, pugiutil::REQUIRED).as_string(); // the noc parameters can only be non-zero positive values if ((noc_ref->link_bandwidth <= 0.) || (noc_ref->link_latency <= 0.) || (noc_ref->router_latency <= 0.)) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(noc_tag), - "The link bandwidth, link latency and router latency for the NoC must be a positive non-zero value."); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(noc_tag), + "The link bandwidth, link latency and router latency for the NoC must be a positive non-zero value."); } // check that the router tile name was supplied properly if (!(noc_ref->noc_router_tile_name.compare(attribute_conversion_failure_string))) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(noc_tag), - "The noc router tile name must be a string."); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(noc_tag), "The noc router tile name must be a string."); } /* We processed the NoC node, so now process the topology*/ @@ -223,33 +226,42 @@ void process_noc_tag(pugi::xml_node noc_tag, static void process_mesh_topology(pugi::xml_node mesh_topology_tag, const pugiutil::loc_data& loc_data, t_noc_inf* noc_ref) { - // identifier that lets us know when we could not properly convert an attribute value to a number constexpr int ATTRIBUTE_CONVERSION_FAILURE = -1; // a list of attributes that should be found for the mesh tag - std::vector expected_router_attributes = {"startx", "endx", "starty", "endy", "startlayer", "endlayer", "size"}; + std::vector expected_router_attributes + = {"startx", "endx", "starty", "endy", "startlayer", "endlayer", "size"}; // verify that only the acceptable attributes were supplied pugiutil::expect_only_attributes(mesh_topology_tag, expected_router_attributes, loc_data); // go through the attributes and store their values - float mesh_region_start_x = pugiutil::get_attribute(mesh_topology_tag, "startx", loc_data, pugiutil::REQUIRED).as_float(ATTRIBUTE_CONVERSION_FAILURE); - float mesh_region_end_x = pugiutil::get_attribute(mesh_topology_tag, "endx", loc_data, pugiutil::REQUIRED).as_float(ATTRIBUTE_CONVERSION_FAILURE); - float mesh_region_start_y = pugiutil::get_attribute(mesh_topology_tag, "starty", loc_data, pugiutil::REQUIRED).as_float(ATTRIBUTE_CONVERSION_FAILURE); - float mesh_region_end_y = pugiutil::get_attribute(mesh_topology_tag, "endy", loc_data, pugiutil::REQUIRED).as_float(ATTRIBUTE_CONVERSION_FAILURE); - - int mesh_region_start_layer = pugiutil::get_attribute(mesh_topology_tag, "startlayer", loc_data, pugiutil::OPTIONAL).as_int(ATTRIBUTE_CONVERSION_FAILURE); - int mesh_region_end_layer = pugiutil::get_attribute(mesh_topology_tag, "endlayer", loc_data, pugiutil::OPTIONAL).as_int(ATTRIBUTE_CONVERSION_FAILURE); - int mesh_size = pugiutil::get_attribute(mesh_topology_tag, "size", loc_data, pugiutil::REQUIRED).as_int(ATTRIBUTE_CONVERSION_FAILURE); + float mesh_region_start_x = pugiutil::get_attribute(mesh_topology_tag, "startx", loc_data, pugiutil::REQUIRED) + .as_float(ATTRIBUTE_CONVERSION_FAILURE); + float mesh_region_end_x = pugiutil::get_attribute(mesh_topology_tag, "endx", loc_data, pugiutil::REQUIRED) + .as_float(ATTRIBUTE_CONVERSION_FAILURE); + float mesh_region_start_y = pugiutil::get_attribute(mesh_topology_tag, "starty", loc_data, pugiutil::REQUIRED) + .as_float(ATTRIBUTE_CONVERSION_FAILURE); + float mesh_region_end_y = pugiutil::get_attribute(mesh_topology_tag, "endy", loc_data, pugiutil::REQUIRED) + .as_float(ATTRIBUTE_CONVERSION_FAILURE); + + int mesh_region_start_layer = pugiutil::get_attribute(mesh_topology_tag, "startlayer", loc_data, pugiutil::OPTIONAL) + .as_int(ATTRIBUTE_CONVERSION_FAILURE); + int mesh_region_end_layer = pugiutil::get_attribute(mesh_topology_tag, "endlayer", loc_data, pugiutil::OPTIONAL) + .as_int(ATTRIBUTE_CONVERSION_FAILURE); + int mesh_size = pugiutil::get_attribute(mesh_topology_tag, "size", loc_data, pugiutil::REQUIRED) + .as_int(ATTRIBUTE_CONVERSION_FAILURE); // verify that the attributes provided were legal - if ((mesh_region_start_x < 0) || (mesh_region_end_x < 0) || (mesh_region_start_y < 0) || (mesh_region_end_y < 0) || (mesh_size < 0)) { + if ((mesh_region_start_x < 0) || (mesh_region_end_x < 0) || (mesh_region_start_y < 0) || (mesh_region_end_y < 0) + || (mesh_size < 0)) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(mesh_topology_tag), "The parameters for the mesh topology have to be positive values."); } - if (mesh_region_start_layer == ATTRIBUTE_CONVERSION_FAILURE || mesh_region_end_layer == ATTRIBUTE_CONVERSION_FAILURE) { + if (mesh_region_start_layer == ATTRIBUTE_CONVERSION_FAILURE + || mesh_region_end_layer == ATTRIBUTE_CONVERSION_FAILURE) { VTR_LOGF_WARN(loc_data.filename_c_str(), loc_data.line(mesh_topology_tag), "Optional 'startlayer' and 'endlayer' attributes were not set for the tag. " "The default value of zero is used for both of them.\n"); @@ -259,24 +271,23 @@ static void process_mesh_topology(pugi::xml_node mesh_topology_tag, // now create the mesh topology for the noc // create routers, make connections and determine positions - generate_noc_mesh(mesh_topology_tag, loc_data, noc_ref, - mesh_region_start_x, mesh_region_end_x, - mesh_region_start_y, mesh_region_end_y, - mesh_region_start_layer, mesh_region_end_layer, - mesh_size); + generate_noc_mesh(mesh_topology_tag, loc_data, noc_ref, mesh_region_start_x, mesh_region_end_x, mesh_region_start_y, + mesh_region_end_y, mesh_region_start_layer, mesh_region_end_layer, mesh_size); } static void generate_noc_mesh(pugi::xml_node mesh_topology_tag, const pugiutil::loc_data& loc_data, t_noc_inf* noc_ref, - float mesh_region_start_x, float mesh_region_end_x, - float mesh_region_start_y, float mesh_region_end_y, - int mesh_region_start_layer, int mesh_region_end_layer, + float mesh_region_start_x, + float mesh_region_end_x, + float mesh_region_start_y, + float mesh_region_end_y, + int mesh_region_start_layer, + int mesh_region_end_layer, int mesh_size) { // check that the mesh size of the router is not 0 if (mesh_size == 0) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(mesh_topology_tag), - "The NoC mesh size cannot be 0."); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(mesh_topology_tag), "The NoC mesh size cannot be 0."); } // calculating the vertical and horizontal distances between routers in the supplied region @@ -305,10 +316,9 @@ static void generate_noc_mesh(pugi::xml_node mesh_topology_tag, float horizontal_router_separation = (mesh_region_end_x - mesh_region_start_x) / (mesh_size - 1); // improper region check - if (vertical_router_separation <= 0 || horizontal_router_separation <= 0 || - mesh_region_end_layer < mesh_region_start_layer) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(mesh_topology_tag), - "The NoC region is invalid."); + if (vertical_router_separation <= 0 || horizontal_router_separation <= 0 + || mesh_region_end_layer < mesh_region_start_layer) { + archfpga_throw(loc_data.filename_c_str(), loc_data.line(mesh_topology_tag), "The NoC region is invalid."); } // create routers and their connections @@ -376,9 +386,7 @@ static void generate_noc_mesh(pugi::xml_node mesh_topology_tag, /* * Go through each router in the NoC and store the list of routers that connect to it. */ -static void process_topology(pugi::xml_node topology_tag, - const pugiutil::loc_data& loc_data, - t_noc_inf* noc_ref) { +static void process_topology(pugi::xml_node topology_tag, const pugiutil::loc_data& loc_data, t_noc_inf* noc_ref) { // The topology tag should have no attributes, check that pugiutil::expect_only_attributes(topology_tag, {}, loc_data); @@ -408,8 +416,7 @@ static void process_topology(pugi::xml_node topology_tag, // check whether any routers were supplied if (noc_ref->router_list.empty()) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(topology_tag), - "No routers were supplied for the NoC."); + archfpga_throw(loc_data.filename_c_str(), loc_data.line(topology_tag), "No routers were supplied for the NoC."); } // check that the topology of the noc was correctly described in the arch file @@ -436,11 +443,14 @@ static void process_router(pugi::xml_node router_tag, t_router router_info; // store the router information from the attributes - router_info.id = pugiutil::get_attribute(router_tag, "id", loc_data, pugiutil::REQUIRED).as_int(ATTRIBUTE_CONVERSION_FAILURE); + router_info.id + = pugiutil::get_attribute(router_tag, "id", loc_data, pugiutil::REQUIRED).as_int(ATTRIBUTE_CONVERSION_FAILURE); - router_info.device_x_position = pugiutil::get_attribute(router_tag, "positionx", loc_data, pugiutil::REQUIRED).as_double(ATTRIBUTE_CONVERSION_FAILURE); + router_info.device_x_position = pugiutil::get_attribute(router_tag, "positionx", loc_data, pugiutil::REQUIRED) + .as_double(ATTRIBUTE_CONVERSION_FAILURE); - router_info.device_y_position = pugiutil::get_attribute(router_tag, "positiony", loc_data, pugiutil::REQUIRED).as_double(ATTRIBUTE_CONVERSION_FAILURE); + router_info.device_y_position = pugiutil::get_attribute(router_tag, "positiony", loc_data, pugiutil::REQUIRED) + .as_double(ATTRIBUTE_CONVERSION_FAILURE); // verify whether the attribute information was legal if ((router_info.id < 0) || (router_info.device_x_position < 0) || (router_info.device_y_position < 0)) { @@ -449,15 +459,15 @@ static void process_router(pugi::xml_node router_tag, } // get the current router connection list - std::string router_connection_list_attribute_value = pugiutil::get_attribute(router_tag, "connections", loc_data, pugiutil::REQUIRED).as_string(); + std::string router_connection_list_attribute_value + = pugiutil::get_attribute(router_tag, "connections", loc_data, pugiutil::REQUIRED).as_string(); // if the connections attribute was not provided, or it was empty, then we don't process it and throw a warning if (!router_connection_list_attribute_value.empty()) { // process the router connection list - bool router_connection_list_result = parse_noc_router_connection_list(router_tag, loc_data, router_info.id, - router_info.connection_list, - router_connection_list_attribute_value, - routers_in_arch_info); + bool router_connection_list_result + = parse_noc_router_connection_list(router_tag, loc_data, router_info.id, router_info.connection_list, + router_connection_list_attribute_value, routers_in_arch_info); // check if the user provided a legal router connection list if (!router_connection_list_result) { @@ -481,13 +491,11 @@ static void process_router(pugi::xml_node router_tag, } static void verify_noc_topology(const std::map>& routers_in_arch_info) { - for (const auto& [router_id, router_info] : routers_in_arch_info) { const auto [n_declarations, n_connections] = router_info; // case where the router was included in the architecture and had no connections to other routers if (n_declarations == 1 && n_connections == 0) { - archfpga_throw("", -1, - "The router with id:'%d' is not connected to any other router in the NoC.", + archfpga_throw("", -1, "The router with id:'%d' is not connected to any other router in the NoC.", router_id); } // case where a router was found to be connected to another router but not declared using the tag in the arch file (i.e. missing) @@ -545,14 +553,18 @@ static bool parse_noc_router_connection_list(pugi::xml_node router_tag, // check the case where a duplicate connection was provided if (std::find(connection_list.begin(), connection_list.end(), converted_connection) != connection_list.end()) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(router_tag), - "The router with id:'%d' was included multiple times in the connection list for another router.", converted_connection); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(router_tag), + "The router with id:'%d' was included multiple times in the connection list for another router.", + converted_connection); } // make sure that the current router isn't connected to itself if (router_id == converted_connection) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(router_tag), - "The router with id:%d was added to its own connection list. A router cannot connect to itself.", router_id); + archfpga_throw( + loc_data.filename_c_str(), loc_data.line(router_tag), + "The router with id:%d was added to its own connection list. A router cannot connect to itself.", + router_id); } // if we are here then a legal router id was supplied, so store it @@ -609,7 +621,8 @@ static void process_noc_overrides(pugi::xml_node noc_overrides_tag, // store the router information from the attributes int id = pugiutil::get_attribute(noc_overrides_tag, "id", loc_data, pugiutil::REQUIRED).as_int(-1); - auto router_latency_override = pugiutil::get_attribute(override_tag, "latency", loc_data, pugiutil::REQUIRED).as_string(); + auto router_latency_override + = pugiutil::get_attribute(override_tag, "latency", loc_data, pugiutil::REQUIRED).as_string(); double latency = std::atof(router_latency_override); if (id < 0 || latency <= 0.0) { @@ -619,21 +632,18 @@ static void process_noc_overrides(pugi::xml_node noc_overrides_tag, latency, id); } - auto it = std::find_if(noc_ref.router_list.begin(), noc_ref.router_list.end(), [id](const t_router& router) { - return router.id == id; - }); + auto it = std::find_if(noc_ref.router_list.begin(), noc_ref.router_list.end(), + [id](const t_router& router) { return router.id == id; }); if (it == noc_ref.router_list.end()) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(override_tag), - "The router with id:%d could not be found in the topology.", - id); + "The router with id:%d could not be found in the topology.", id); } auto [_, success] = noc_ref.router_latency_overrides.insert({id, latency}); if (!success) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(override_tag), - "The latency of the router with id:%d wad overridden once before.", - id); + "The latency of the router with id:%d wad overridden once before.", id); } } else if (override_name == "link") { @@ -646,52 +656,52 @@ static void process_noc_overrides(pugi::xml_node noc_overrides_tag, if (src < 0 || dst < 0) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(override_tag), - "The source and destination router ids (%d, %d) must be non-negative.", - src, dst); + "The source and destination router ids (%d, %d) must be non-negative.", src, dst); } - auto it = std::find_if(noc_ref.router_list.begin(), noc_ref.router_list.end(), [src, dst](const t_router& router) { - return router.id == src && - std::find(router.connection_list.begin(), router.connection_list.end(), dst) != router.connection_list.end(); - }); + auto it = std::find_if( + noc_ref.router_list.begin(), noc_ref.router_list.end(), [src, dst](const t_router& router) { + return router.id == src + && std::find(router.connection_list.begin(), router.connection_list.end(), dst) + != router.connection_list.end(); + }); if (it == noc_ref.router_list.end()) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(override_tag), - "There is no links from the router with id:%d to the router with id:%d.", - src, dst); + "There is no links from the router with id:%d to the router with id:%d.", src, dst); } - auto link_latency_override = pugiutil::get_attribute(override_tag, "latency", loc_data, pugiutil::REQUIRED).as_string(nullptr); + auto link_latency_override + = pugiutil::get_attribute(override_tag, "latency", loc_data, pugiutil::REQUIRED).as_string(nullptr); if (link_latency_override != nullptr) { double latency = std::atof(link_latency_override); if (latency <= 0.0) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(override_tag), - "The override link latency value for link (%d, %d) must be positive:%g." , - src, dst, latency); + "The override link latency value for link (%d, %d) must be positive:%g.", src, dst, + latency); } auto [_, success] = noc_ref.link_latency_overrides.insert({{src, dst}, latency}); if (!success) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(override_tag), - "The latency for link (%d, %d) was overridden once before." , - src, dst); + "The latency for link (%d, %d) was overridden once before.", src, dst); } } - auto link_bandwidth_override = pugiutil::get_attribute(override_tag, "bandwidth", loc_data, pugiutil::REQUIRED).as_string(nullptr); + auto link_bandwidth_override + = pugiutil::get_attribute(override_tag, "bandwidth", loc_data, pugiutil::REQUIRED).as_string(nullptr); if (link_bandwidth_override != nullptr) { double bandwidth = std::atof(link_latency_override); if (bandwidth <= 0.0) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(override_tag), - "The override link bandwidth value for link (%d, %d) must be positive:%g." , - src, dst, bandwidth); + "The override link bandwidth value for link (%d, %d) must be positive:%g.", src, dst, + bandwidth); } auto [_, success] = noc_ref.link_bandwidth_overrides.insert({{src, dst}, bandwidth}); if (!success) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(override_tag), - "The bandwidth for link (%d, %d) was overridden once before." , - src, dst); + "The bandwidth for link (%d, %d) was overridden once before.", src, dst); } } } else { diff --git a/libs/libarchfpga/src/read_xml_arch_file_noc_tag.h b/libs/libarchfpga/src/read_xml_arch_file_noc_tag.h index 8309d8cdec9..39d56c74ea9 100644 --- a/libs/libarchfpga/src/read_xml_arch_file_noc_tag.h +++ b/libs/libarchfpga/src/read_xml_arch_file_noc_tag.h @@ -13,8 +13,6 @@ * arch->noc with NoC-related information. * @param loc_data Points to the location in the xml file where the parser is reading. */ -void process_noc_tag(pugi::xml_node noc_tag, - t_arch* arch, - const pugiutil::loc_data& loc_data); +void process_noc_tag(pugi::xml_node noc_tag, t_arch* arch, const pugiutil::loc_data& loc_data); #endif //VTR_READ_XML_ARCH_FILE_NOC_TAG_H diff --git a/libs/libarchfpga/src/write_models_bb.cpp b/libs/libarchfpga/src/write_models_bb.cpp index 24de3938c96..0a0055039c6 100644 --- a/libs/libarchfpga/src/write_models_bb.cpp +++ b/libs/libarchfpga/src/write_models_bb.cpp @@ -7,6 +7,7 @@ using vtr::t_linked_vptr; +// clang-format off /* the output file description */ #define OUTPUT_HEADER_COMMENT(Echo, ArchFile) \ { \ @@ -23,20 +24,15 @@ using vtr::t_linked_vptr; fprintf(Echo, \ "/*********************************************************************************************************/\n\n"); \ } +// clang-format on /* a comment for the body of black box modules */ -const char* HARD_BLOCK_COMMENT = "/* the body of the complex block module is empty since it should be seen as a black box */"; +const char* HARD_BLOCK_COMMENT + = "/* the body of the complex block module is empty since it should be seen as a black box */"; /* list of vtr primitives blocks */ static constexpr short num_vtr_primitives = 8; -static constexpr const char* vtr_primitives[num_vtr_primitives] = { - "LUT_K", - "DFF", - "fpga_interconnect", - "mux", - "adder", - "multiply", - "single_port_ram", - "dual_port_ram"}; +static constexpr const char* vtr_primitives[num_vtr_primitives] + = {"LUT_K", "DFF", "fpga_interconnect", "mux", "adder", "multiply", "single_port_ram", "dual_port_ram"}; /* declarations */ void DeclareModel_bb(FILE* Echo, const t_model* model); @@ -51,9 +47,7 @@ void DeclareModel_bb(FILE* Echo, const t_model* model); * @param VEchoFile path to the architecture file * @param arch pointer to the arch data structure */ -void WriteModels_bb(const char* ArchFile, - const char* VEchoFile, - const t_arch* arch) { +void WriteModels_bb(const char* ArchFile, const char* VEchoFile, const t_arch* arch) { // validate the arch VTR_ASSERT(arch); @@ -66,8 +60,7 @@ void WriteModels_bb(const char* ArchFile, // iterate over models while (cur_model) { // avoid printing vtr primitives - if (std::all_of(vtr_primitives, - vtr_primitives + num_vtr_primitives, + if (std::all_of(vtr_primitives, vtr_primitives + num_vtr_primitives, [&](const auto& e) { return strcmp(e, cur_model->name); })) DeclareModel_bb(Echo, cur_model); diff --git a/libs/libarchfpga/src/write_models_bb.h b/libs/libarchfpga/src/write_models_bb.h index 251ebf51aad..206572a6663 100644 --- a/libs/libarchfpga/src/write_models_bb.h +++ b/libs/libarchfpga/src/write_models_bb.h @@ -3,8 +3,6 @@ #include "arch_types.h" -void WriteModels_bb(const char* ArchFile, - const char* VEchoFile, - const t_arch* arch); +void WriteModels_bb(const char* ArchFile, const char* VEchoFile, const t_arch* arch); #endif diff --git a/libs/libarchfpga/test/test_read_xml_arch_file.cpp b/libs/libarchfpga/test/test_read_xml_arch_file.cpp index edc4ad2d065..40cb88305e5 100644 --- a/libs/libarchfpga/test/test_read_xml_arch_file.cpp +++ b/libs/libarchfpga/test/test_read_xml_arch_file.cpp @@ -100,9 +100,12 @@ TEST_CASE("Verifying a parsed NoC topology", "[NoC Arch Tests]") { REQUIRE(test_router_list.size() == 3); - REQUIRE_THROWS_WITH(verify_noc_topology(test_router_list), "The router with id:'1' is not connected to any other router in the NoC."); + REQUIRE_THROWS_WITH(verify_noc_topology(test_router_list), + "The router with id:'1' is not connected to any other router in the NoC."); } - SECTION("Check the error where a router in the NoC is connected to other routers but missing a declaration in the arch file.") { + SECTION( + "Check the error where a router in the NoC is connected to other routers but missing a declaration in the arch " + "file.") { // normal routers test_router_list.insert(std::pair>(1, std::pair(1, 5))); @@ -115,7 +118,9 @@ TEST_CASE("Verifying a parsed NoC topology", "[NoC Arch Tests]") { REQUIRE(test_router_list.size() == 4); - REQUIRE_THROWS_WITH(verify_noc_topology(test_router_list), "The router with id:'3' was found to be connected to another router but missing in the architecture file. Add the router using the tag."); + REQUIRE_THROWS_WITH(verify_noc_topology(test_router_list), + "The router with id:'3' was found to be connected to another router but missing in the " + "architecture file. Add the router using the tag."); } SECTION("Check the error where the router is included more than once in the architecture file.") { // normal routers @@ -135,7 +140,9 @@ TEST_CASE("Verifying a parsed NoC topology", "[NoC Arch Tests]") { REQUIRE(test_router_list.size() == 6); - REQUIRE_THROWS_WITH(verify_noc_topology(test_router_list), "The router with id:'4' was included more than once in the architecture file. Routers should only be declared once."); + REQUIRE_THROWS_WITH(verify_noc_topology(test_router_list), + "The router with id:'4' was included more than once in the architecture file. Routers " + "should only be declared once."); } } @@ -157,12 +164,16 @@ TEST_CASE("Verifying mesh topology creation", "[NoC Arch Tests]") { int mesh_end_layer = 0; SECTION("Check the error where a mesh size was illegal.") { - REQUIRE_THROWS_WITH(generate_noc_mesh(test, test_location, &test_noc, mesh_start_x, mesh_end_x, mesh_start_y, mesh_end_y, mesh_start_layer, mesh_end_layer, mesh_size), "The NoC mesh size cannot be 0."); + REQUIRE_THROWS_WITH(generate_noc_mesh(test, test_location, &test_noc, mesh_start_x, mesh_end_x, mesh_start_y, + mesh_end_y, mesh_start_layer, mesh_end_layer, mesh_size), + "The NoC mesh size cannot be 0."); } SECTION("Check the error where a mesh region size was invalid.") { mesh_size = 3; - REQUIRE_THROWS_WITH(generate_noc_mesh(test, test_location, &test_noc, mesh_start_x, mesh_end_x, mesh_start_y, mesh_end_y, mesh_start_layer, mesh_end_layer, mesh_size), "The NoC region is invalid."); + REQUIRE_THROWS_WITH(generate_noc_mesh(test, test_location, &test_noc, mesh_start_x, mesh_end_x, mesh_start_y, + mesh_end_y, mesh_start_layer, mesh_end_layer, mesh_size), + "The NoC region is invalid."); } SECTION("Check the mesh creation for integer precision coordinates.") { // define test parameters @@ -202,7 +213,8 @@ TEST_CASE("Verifying mesh topology creation", "[NoC Arch Tests]") { golden_results_x[8] = 4; golden_results_y[8] = 4; - generate_noc_mesh(test, test_location, &test_noc, mesh_start_x, mesh_end_x, mesh_start_y, mesh_end_y, mesh_start_layer, mesh_end_layer, mesh_size); + generate_noc_mesh(test, test_location, &test_noc, mesh_start_x, mesh_end_x, mesh_start_y, mesh_end_y, + mesh_start_layer, mesh_end_layer, mesh_size); // go through all the expected routers for (int expected_router_id = 0; expected_router_id < (mesh_size * mesh_size); expected_router_id++) { @@ -254,7 +266,8 @@ TEST_CASE("Verifying mesh topology creation", "[NoC Arch Tests]") { golden_results_x[8] = 10.8; golden_results_y[8] = 6.4; - generate_noc_mesh(test, test_location, &test_noc, mesh_start_x, mesh_end_x, mesh_start_y, mesh_end_y, mesh_start_layer, mesh_end_layer, mesh_size); + generate_noc_mesh(test, test_location, &test_noc, mesh_start_x, mesh_end_x, mesh_start_y, mesh_end_y, + mesh_start_layer, mesh_end_layer, mesh_size); // go through all the expected routers for (int expected_router_id = 0; expected_router_id < (mesh_size * mesh_size); expected_router_id++) { @@ -263,9 +276,11 @@ TEST_CASE("Verifying mesh topology creation", "[NoC Arch Tests]") { // make sure the position of the routers are correct // x position - REQUIRE(vtr::isclose(golden_results_x[expected_router_id], test_noc.router_list[expected_router_id].device_x_position)); + REQUIRE(vtr::isclose(golden_results_x[expected_router_id], + test_noc.router_list[expected_router_id].device_x_position)); // y position - REQUIRE(vtr::isclose(golden_results_y[expected_router_id], test_noc.router_list[expected_router_id].device_y_position)); + REQUIRE(vtr::isclose(golden_results_y[expected_router_id], + test_noc.router_list[expected_router_id].device_y_position)); } } } \ No newline at end of file diff --git a/libs/libpugiutil/src/pugixml_loc.hpp b/libs/libpugiutil/src/pugixml_loc.hpp index 0f597a593b1..35e416c3b32 100644 --- a/libs/libpugiutil/src/pugixml_loc.hpp +++ b/libs/libpugiutil/src/pugixml_loc.hpp @@ -25,14 +25,10 @@ class loc_data { const char* filename_c_str() const { return filename_.c_str(); } //Convenience wrapper which takes xml_nodes - std::size_t line(pugi::xml_node node) const { - return line(node.offset_debug()); - } + std::size_t line(pugi::xml_node node) const { return line(node.offset_debug()); } //Convenience wrapper which takes xml_nodes - std::size_t col(pugi::xml_node node) const { - return col(node.offset_debug()); - } + std::size_t col(pugi::xml_node node) const { return col(node.offset_debug()); } //Return the line number from the given offset std::size_t line(std::ptrdiff_t offset) const; diff --git a/libs/libpugiutil/src/pugixml_util.cpp b/libs/libpugiutil/src/pugixml_util.cpp index 1353f2114d1..8a026b8282f 100644 --- a/libs/libpugiutil/src/pugixml_util.cpp +++ b/libs/libpugiutil/src/pugixml_util.cpp @@ -15,8 +15,8 @@ loc_data load_xml(pugi::xml_document& doc, //Document object to be loaded w std::string msg = load_result.description(); auto line = location_data.line(load_result.offset); auto col = location_data.col(load_result.offset); - throw XmlError("Unable to load XML file '" + filename + "', " + msg - + " (line: " + std::to_string(line) + " col: " + std::to_string(col) + ")", + throw XmlError("Unable to load XML file '" + filename + "', " + msg + " (line: " + std::to_string(line) + + " col: " + std::to_string(col) + ")", filename.c_str(), line); } @@ -55,8 +55,9 @@ pugi::xml_node get_single_child(const pugi::xml_node node, pugi::xml_node child = get_first_child(node, child_name, loc_data, req_opt); if (child && child.next_sibling(child_name.c_str())) { - throw XmlError("Multiple child '" + child_name + "' nodes found in parent node '" + node.name() + "' (only one expected)", - loc_data.filename(), loc_data.line(node)); + throw XmlError( + "Multiple child '" + child_name + "' nodes found in parent node '" + node.name() + "' (only one expected)", + loc_data.filename(), loc_data.line(node)); } return child; @@ -91,14 +92,12 @@ size_t count_children(const pugi::xml_node node, // node - The parent xml node // loc_data - XML file location data // req_opt - Whether the child tag is required (will error if required and not found) or optional. Defaults to REQUIRED -size_t count_children(const pugi::xml_node node, - const loc_data& loc_data, - const ReqOpt req_opt) { +size_t count_children(const pugi::xml_node node, const loc_data& loc_data, const ReqOpt req_opt) { size_t count = std::distance(node.begin(), node.end()); if (count == 0 && req_opt == REQUIRED) { - throw XmlError("Expected child node(s) in node '" + std::string(node.name()) + "'", - loc_data.filename(), loc_data.line(node)); + throw XmlError("Expected child node(s) in node '" + std::string(node.name()) + "'", loc_data.filename(), + loc_data.line(node)); } return count; @@ -116,10 +115,8 @@ void expect_child_node_count(const pugi::xml_node node, size_t actual_count = count_children(node, child_name, loc_data, OPTIONAL); if (actual_count != expected_count) { - throw XmlError("Found " + std::to_string(actual_count) - + " '" + child_name + "' child node(s) of " - + "'" + std::string(node.name()) + "'" - + " (expected " + std::to_string(expected_count) + ")", + throw XmlError("Found " + std::to_string(actual_count) + " '" + child_name + "' child node(s) of " + "'" + + std::string(node.name()) + "'" + " (expected " + std::to_string(expected_count) + ")", loc_data.filename(), loc_data.line(node)); } } @@ -129,16 +126,12 @@ void expect_child_node_count(const pugi::xml_node node, // node - The parent xml node // loc_data - XML file location data // expected_count - The expected number of child nodes -void expect_child_node_count(const pugi::xml_node node, - size_t expected_count, - const loc_data& loc_data) { +void expect_child_node_count(const pugi::xml_node node, size_t expected_count, const loc_data& loc_data) { size_t actual_count = count_children(node, loc_data, OPTIONAL); if (actual_count != expected_count) { - throw XmlError("Found " + std::to_string(actual_count) - + " child node(s) of " - + "'" + std::string(node.name()) + "'" - + " (expected " + std::to_string(expected_count) + ")", + throw XmlError("Found " + std::to_string(actual_count) + " child node(s) of " + "'" + std::string(node.name()) + + "'" + " (expected " + std::to_string(expected_count) + ")", loc_data.filename(), loc_data.line(node)); } } @@ -154,12 +147,9 @@ void expect_only_children(const pugi::xml_node node, const loc_data& loc_data) { for (auto child : node.children()) { std::string child_name = child.name(); - auto iter = std::find(child_names.begin(), - child_names.end(), - child_name); + auto iter = std::find(child_names.begin(), child_names.end(), child_name); if (iter == child_names.end()) { - std::string msg = "Unexpected child '" + child_name + "'" - + " of node '" + node.name() + "'."; + std::string msg = "Unexpected child '" + child_name + "'" + " of node '" + node.name() + "'."; if (!child_names.empty()) { msg += " Expected (possibly) one of: "; @@ -192,12 +182,9 @@ void expect_only_attributes(const pugi::xml_node node, const loc_data& loc_data) { for (auto attrib : node.attributes()) { std::string attrib_name = attrib.name(); - auto iter = std::find(attribute_names.begin(), - attribute_names.end(), - attrib_name); + auto iter = std::find(attribute_names.begin(), attribute_names.end(), attrib_name); if (iter == attribute_names.end()) { - std::string msg = "Unexpected attribute '" + attrib_name + "'" - + " found on node '" + node.name() + "'"; + std::string msg = "Unexpected attribute '" + attrib_name + "'" + " found on node '" + node.name() + "'"; if (!explanation.empty()) { msg += explanation; @@ -241,14 +228,12 @@ void expect_only_attributes(const pugi::xml_node node, // node - The xml node // loc_data - XML file location data // req_opt - Whether any attributes are required (will error if required and none are found) or optional. Defaults to REQUIRED -size_t count_attributes(const pugi::xml_node node, - const loc_data& loc_data, - const ReqOpt req_opt) { +size_t count_attributes(const pugi::xml_node node, const loc_data& loc_data, const ReqOpt req_opt) { size_t count = std::distance(node.attributes_begin(), node.attributes_end()); if (count == 0 && req_opt == REQUIRED) { - throw XmlError("Expected attributes on node'" + std::string(node.name()) + "'", - loc_data.filename(), loc_data.line(node)); + throw XmlError("Expected attributes on node'" + std::string(node.name()) + "'", loc_data.filename(), + loc_data.line(node)); } return count; @@ -267,8 +252,8 @@ pugi::xml_attribute get_attribute(const pugi::xml_node node, pugi::xml_attribute attr = node.attribute(attr_name.c_str()); if (!attr && req_opt == REQUIRED) { - throw XmlError("Expected '" + attr_name + "' attribute on node '" + node.name() + "'", - loc_data.filename(), loc_data.line(node)); + throw XmlError("Expected '" + attr_name + "' attribute on node '" + node.name() + "'", loc_data.filename(), + loc_data.line(node)); } return attr; diff --git a/libs/libpugiutil/src/pugixml_util.hpp b/libs/libpugiutil/src/pugixml_util.hpp index 3bb60779fc0..c9a80e3b2bc 100644 --- a/libs/libpugiutil/src/pugixml_util.hpp +++ b/libs/libpugiutil/src/pugixml_util.hpp @@ -65,10 +65,7 @@ loc_data load_xml(pugi::xml_document& doc, //Document object to be loaded wi // auto node = get_first_child(node, "port", loc_data, REQUIRED); // // is much more explicit. -enum ReqOpt { - REQUIRED, - OPTIONAL -}; +enum ReqOpt { REQUIRED, OPTIONAL }; //Gets the first child element of the given name and returns it. // @@ -109,9 +106,7 @@ size_t count_children(const pugi::xml_node node, // node - The parent xml node // loc_data - XML file location data // req_opt - Whether the child tag is required (will error if required and not found) or optional. Defaults to REQUIRED -size_t count_children(const pugi::xml_node node, - const loc_data& loc_data, - const ReqOpt req_opt); +size_t count_children(const pugi::xml_node node, const loc_data& loc_data, const ReqOpt req_opt); //Throws a well formatted error if the actual count of child nodes named 'child_name' does not equal the 'expected_count' // @@ -128,9 +123,7 @@ void expect_child_node_count(const pugi::xml_node node, // node - The parent xml node // loc_data - XML file location data // expected_count - The expected number of child nodes -void expect_child_node_count(const pugi::xml_node node, - size_t expected_count, - const loc_data& loc_data); +void expect_child_node_count(const pugi::xml_node node, size_t expected_count, const loc_data& loc_data); //Throws a well formatted error if any of node's children are not part of child_names. //Note this does not check whether the nodes in 'child_names' actually exist. @@ -168,9 +161,7 @@ void expect_only_attributes(const pugi::xml_node node, // node - The xml node // loc_data - XML file location data // req_opt - Whether any attributes are required (will error if required and none are found) or optional. Defaults to REQUIRED -size_t count_attributes(const pugi::xml_node node, - const loc_data& loc_data, - const ReqOpt req_opt = REQUIRED); +size_t count_attributes(const pugi::xml_node node, const loc_data& loc_data, const ReqOpt req_opt = REQUIRED); //Gets a named property on a node and returns it. // diff --git a/libs/librtlnumber/src/include/internal_bits.hpp b/libs/librtlnumber/src/include/internal_bits.hpp index 66f9612ba44..a7f6b7eb41a 100644 --- a/libs/librtlnumber/src/include/internal_bits.hpp +++ b/libs/librtlnumber/src/include/internal_bits.hpp @@ -340,8 +340,7 @@ static char bits_to_hex_c(short digit, bool uppercase) { case 15: return (uppercase) ? 'F' : 'f'; default: - assert_Werr(0, - "Invalid bits input" + std::to_string(digit)); + assert_Werr(0, "Invalid bits input" + std::to_string(digit)); break; } @@ -362,8 +361,7 @@ static bit_value_t c_to_bit(char c) { default: break; } - assert_Werr(0, - "Invalid bits input " + std::string(1, c)); + assert_Werr(0, "Invalid bits input " + std::string(1, c)); return 0; } @@ -382,9 +380,9 @@ class BitFields { public: BitFields(bit_value_t init_v) { - this->bits = static_cast( - (_0 == init_v) ? _All_0 : (_1 == init_v) ? _All_1 - : (_z == init_v) ? _All_z + this->bits = static_cast((_0 == init_v) ? _All_0 + : (_1 == init_v) ? _All_1 + : (_z == init_v) ? _All_z : _All_x); } @@ -439,13 +437,9 @@ class VerilogBits { std::vector> bits; size_t bit_size = 0; - size_t to_index(size_t address) { - return (address / BitFields::size()); - } + size_t to_index(size_t address) { return (address / BitFields::size()); } - size_t list_size() { - return this->bits.size(); - } + size_t list_size() { return this->bits.size(); } public: VerilogBits() { @@ -469,13 +463,9 @@ class VerilogBits { this->bits = other->get_internal_bitvector(); } - size_t size() { - return this->bit_size; - } + size_t size() { return this->bit_size; } - std::vector> get_internal_bitvector() { - return this->bits; - } + std::vector> get_internal_bitvector() { return this->bits; } BitFields* get_bitfield(size_t index) { #ifdef DEBUG_V_BITS @@ -607,9 +597,7 @@ class VerilogBits { return other; } - VerilogBits twos_complement() { - return this->twos_complement(BitSpace::_1); - } + VerilogBits twos_complement() { return this->twos_complement(BitSpace::_1); } /** * size of zero compact to the least amount of bits @@ -686,9 +674,11 @@ class VNumber { } VNumber insert(VNumber& other, size_t index_to_insert_at, size_t insertion_size) { - assert_Werr(other.is_defined_size() && this->is_defined_size(), "Size must be defined on both operand for insertion"); + assert_Werr(other.is_defined_size() && this->is_defined_size(), + "Size must be defined on both operand for insertion"); - VNumber new_bitstring(this->size() + insertion_size, BitSpace::_0, this->is_signed() && other.is_signed(), true); + VNumber new_bitstring(this->size() + insertion_size, BitSpace::_0, this->is_signed() && other.is_signed(), + true); size_t index = 0; @@ -733,13 +723,9 @@ class VNumber { this->defined_size = other.defined_size; } - VNumber(const std::string& verilog_string) { - set_value(verilog_string); - } + VNumber(const std::string& verilog_string) { set_value(verilog_string); } - VNumber(int64_t numeric_value) { - set_value(numeric_value); - } + VNumber(int64_t numeric_value) { set_value(numeric_value); } VNumber(size_t len, BitSpace::bit_value_t initial_bits, bool input_sign, bool this_defined_size) { this->bitstring = BitSpace::VerilogBits(len, initial_bits); @@ -758,7 +744,10 @@ class VNumber { size_t end = this->size(); if (end > integer_t_size) { - printf(" === Warning: Returning a 64 bit integer from a larger bitstring (%zu). The bitstring will be truncated\n", bit_size); + printf( + " === Warning: Returning a 64 bit integer from a larger bitstring (%zu). The bitstring will be " + "truncated\n", + bit_size); end = bit_size; } @@ -891,8 +880,7 @@ class VNumber { // forcefully truncate to a char return std::string(1, this->bitstring.getc()); default: - assert_Werr(0, - "Invalid base for conversion"); + assert_Werr(0, "Invalid base for conversion"); break; } std::abort(); @@ -966,8 +954,7 @@ class VNumber { radix = 16; break; // hexadecimal default: - assert_Werr(false, - "Invalid radix base for number: " + std::string(1, base)); + assert_Werr(false, "Invalid radix base for number: " + std::string(1, base)); break; } @@ -995,13 +982,9 @@ class VNumber { this->bitstring = new_bitstring.resize(BitSpace::c_to_bit(pad), bitsize); } - void set_value(int64_t in) { - this->set_value(std::to_string(in)); - } + void set_value(int64_t in) { this->set_value(std::to_string(in)); } - size_t msb_index() { - return this->bitstring.size() - 1; - } + size_t msb_index() { return this->bitstring.size() - 1; } /**** * bit twiddling functions @@ -1022,68 +1005,40 @@ class VNumber { this->bitstring.set_bit(msb_index() - index, val); } - void set_bit_from_lsb(size_t index, BitSpace::bit_value_t val) { - this->bitstring.set_bit(index, val); - } + void set_bit_from_lsb(size_t index, BitSpace::bit_value_t val) { this->bitstring.set_bit(index, val); } /*** * other */ - size_t size() { - return this->bitstring.size(); - } + size_t size() { return this->bitstring.size(); } - BitSpace::bit_value_t get_padding_bit() { - return (this->is_signed()) ? get_bit_from_msb(0) : BitSpace::_0; - } + BitSpace::bit_value_t get_padding_bit() { return (this->is_signed()) ? get_bit_from_msb(0) : BitSpace::_0; } - bool is_signed() const { - return this->sign; - } + bool is_signed() const { return this->sign; } - bool is_defined_size() { - return this->defined_size; - } + bool is_defined_size() { return this->defined_size; } - bool is_negative() { - return (this->get_bit_from_msb(0) == BitSpace::_1 && this->sign); - } + bool is_negative() { return (this->get_bit_from_msb(0) == BitSpace::_1 && this->sign); } - bool has_unknown() { - return this->bitstring.has_unknown(); - } + bool has_unknown() { return this->bitstring.has_unknown(); } - bool is_z() { - return this->bitstring.is_only_z(); - } + bool is_z() { return this->bitstring.is_only_z(); } - bool is_x() { - return this->bitstring.is_only_x(); - } + bool is_x() { return this->bitstring.is_only_x(); } - bool is_true() { - return this->bitstring.is_true(); - } + bool is_true() { return this->bitstring.is_true(); } - bool is_false() { - return this->bitstring.is_false(); - } + bool is_false() { return this->bitstring.is_false(); } VNumber twos_complement(BitSpace::bit_value_t carry) { return VNumber(this->bitstring.twos_complement(carry), this->defined_size, this->sign); } - VNumber twos_complement() { - return VNumber(this->bitstring.twos_complement(), this->defined_size, this->sign); - } + VNumber twos_complement() { return VNumber(this->bitstring.twos_complement(), this->defined_size, this->sign); } - VNumber to_signed() { - return VNumber(this->bitstring, this->defined_size, true); - } + VNumber to_signed() { return VNumber(this->bitstring, this->defined_size, true); } - VNumber to_unsigned() { - return VNumber(this->bitstring, this->defined_size, false); - } + VNumber to_unsigned() { return VNumber(this->bitstring, this->defined_size, false); } VNumber bitwise_reduce(const BitSpace::bit_value_t lut[4][4]) { return VNumber(this->bitstring.bitwise_reduce(lut), this->defined_size, false); @@ -1122,21 +1077,16 @@ class VNumber { } VNumber replicate(int64_t n_times_replicate) { - assert_Werr(n_times_replicate > 0, - "Cannot replicate bitstring less than 1 times"); + assert_Werr(n_times_replicate > 0, "Cannot replicate bitstring less than 1 times"); size_t n_times_unsigned = static_cast(n_times_replicate); return VNumber(this->bitstring.replicate(n_times_unsigned), true, this->sign); } - VNumber insert_at_lsb(VNumber& other) { - return this->insert(other, 0, other.size()); - } + VNumber insert_at_lsb(VNumber& other) { return this->insert(other, 0, other.size()); } - VNumber insert_at_msb(VNumber& other) { - return this->insert(other, this->size(), other.size()); - } + VNumber insert_at_msb(VNumber& other) { return this->insert(other, this->size(), other.size()); } }; #endif diff --git a/libs/librtlnumber/src/include/rtl_utils.hpp b/libs/librtlnumber/src/include/rtl_utils.hpp index ed0d0c3edd4..6628318da98 100644 --- a/libs/librtlnumber/src/include/rtl_utils.hpp +++ b/libs/librtlnumber/src/include/rtl_utils.hpp @@ -16,7 +16,7 @@ #include #ifndef FILE_NAME -# define FILE_NAME (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : __FILE__) +#define FILE_NAME (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : __FILE__) #endif /* Enable Debug Messages for libRTLNumber: Un-Comment to Enable Debug Messages: @@ -24,22 +24,25 @@ // #define ENABLE_DEBUG_MESSAGES #ifdef ENABLE_DEBUG_MESSAGES -# define DEBUG_MSG(debugMsg) std::cerr << "DEBUG: " << FILE_NAME << ":" << __LINE__ << " " << __func__ << "()" \ - << ": " << debugMsg << std::endl +#define DEBUG_MSG(debugMsg) \ + std::cerr << "DEBUG: " << FILE_NAME << ":" << __LINE__ << " " << __func__ << "()" \ + << ": " << debugMsg << std::endl #else -# define DEBUG_MSG(debugMsg) /* No-Op */ +#define DEBUG_MSG(debugMsg) /* No-Op */ #endif #ifndef WARN_MSG -# define WARN_MSG(warnMSG) std::cerr << "WARNING: " << FILE_NAME << ":" << __LINE__ << " " << __func__ << "()" \ - << ": " << warnMSG << "!" << std::endl +#define WARN_MSG(warnMSG) \ + std::cerr << "WARNING: " << FILE_NAME << ":" << __LINE__ << " " << __func__ << "()" \ + << ": " << warnMSG << "!" << std::endl #endif #ifndef ERR_MSG -# define ERR_MSG(errMsg) std::cerr << std::endl \ - << "ERROR: " << FILE_NAME << ":" << __LINE__ << " " << __func__ << "()" \ - << ": " << errMsg << "!" << std::endl \ - << std::endl +#define ERR_MSG(errMsg) \ + std::cerr << std::endl \ + << "ERROR: " << FILE_NAME << ":" << __LINE__ << " " << __func__ << "()" \ + << ": " << errMsg << "!" << std::endl \ + << std::endl #endif std::string string_of_radix_to_bitstring(std::string orig_string, size_t radix); @@ -48,7 +51,8 @@ std::string convert_between_bases(std::string str, uint8_t base_from, uint8_t ba inline void _assert_Werr(bool cond, const char* FUNCT, int LINE, std::string error_string) { if (!cond) { std::cerr << std::endl - << "ERROR: " << FUNCT << "::" << std::to_string(LINE) << " Assert 'assert_Werr' Failed:\t" << error_string << "!" << std::endl + << "ERROR: " << FUNCT << "::" << std::to_string(LINE) << " Assert 'assert_Werr' Failed:\t" + << error_string << "!" << std::endl << std::endl; std::abort(); } diff --git a/libs/librtlnumber/src/rtl_int.cpp b/libs/librtlnumber/src/rtl_int.cpp index 47a06828f6b..df3cf337639 100644 --- a/libs/librtlnumber/src/rtl_int.cpp +++ b/libs/librtlnumber/src/rtl_int.cpp @@ -40,11 +40,9 @@ class compare_bit { #define LT_EVAL compare_bit(0x4) static compare_bit eval_op(VNumber& a_in, VNumber& b_in) { - assert_Werr(a_in.size(), - "empty 1st bit string"); + assert_Werr(a_in.size(), "empty 1st bit string"); - assert_Werr(b_in.size(), - "empty 2nd bit string"); + assert_Werr(b_in.size(), "empty 2nd bit string"); #ifndef RTL_ALLOW_UNKNOWN_COMPARE if (a_in.has_unknown() || b_in.has_unknown()) @@ -126,11 +124,9 @@ static bool is_signed_operation(VNumber& a, VNumber& b) { * Addition operations */ static VNumber sum_op(VNumber& a, VNumber& b, const bit_value_t& initial_carry, bool is_twos_complement_subtraction) { - assert_Werr(a.size(), - "empty 1st bit string"); + assert_Werr(a.size(), "empty 1st bit string"); - assert_Werr(b.size(), - "empty 2nd bit string"); + assert_Werr(b.size(), "empty 2nd bit string"); size_t std_length = std::max(a.size(), b.size()); size_t new_length = ((true == is_twos_complement_subtraction) ? (std_length) : (std_length + 1)); @@ -186,37 +182,21 @@ static VNumber shift_op(VNumber& a, int64_t b, bool sign_shift) { return to_return; } -bool V_TRUE(VNumber& a) { - return a.is_true(); -} +bool V_TRUE(VNumber& a) { return a.is_true(); } -bool V_FALSE(VNumber& a) { - return a.is_false(); -} +bool V_FALSE(VNumber& a) { return a.is_false(); } -bool V_UNK(VNumber& a) { - return a.has_unknown(); -} +bool V_UNK(VNumber& a) { return a.has_unknown(); } -bool V_IS_X(VNumber& a) { - return a.is_x(); -} +bool V_IS_X(VNumber& a) { return a.is_x(); } -bool V_IS_Z(VNumber& a) { - return a.is_z(); -} +bool V_IS_Z(VNumber& a) { return a.is_z(); } -bool V_IS_SIGNED(VNumber& a) { - return a.is_signed(); -} +bool V_IS_SIGNED(VNumber& a) { return a.is_signed(); } -bool V_IS_UNSIGNED(VNumber& a) { - return !a.is_signed(); -} +bool V_IS_UNSIGNED(VNumber& a) { return !a.is_signed(); } -std::string V_STRING(VNumber& a, const char base) { - return a.to_vstring(base); -} +std::string V_STRING(VNumber& a, const char base) { return a.to_vstring(base); } /*** * __ __ __ ___ __ ___ __ @@ -225,9 +205,7 @@ std::string V_STRING(VNumber& a, const char base) { * */ -VNumber V_BITWISE_NOT(VNumber& a) { - return a.bitwise(l_not); -} +VNumber V_BITWISE_NOT(VNumber& a) { return a.bitwise(l_not); } VNumber V_LOGICAL_NOT(VNumber& a) { if (a.has_unknown()) @@ -243,21 +221,13 @@ VNumber V_ADD(VNumber& a) { return result; } -VNumber V_MINUS(VNumber& a) { - return a.twos_complement(); -} +VNumber V_MINUS(VNumber& a) { return a.twos_complement(); } -VNumber V_MINUS(VNumber& a, BitSpace::bit_value_t carry) { - return a.twos_complement(carry); -} +VNumber V_MINUS(VNumber& a, BitSpace::bit_value_t carry) { return a.twos_complement(carry); } -VNumber V_UNSIGNED(VNumber& a) { - return a.to_unsigned(); -} +VNumber V_UNSIGNED(VNumber& a) { return a.to_unsigned(); } -VNumber V_SIGNED(VNumber& a) { - return a.to_signed(); -} +VNumber V_SIGNED(VNumber& a) { return a.to_signed(); } VNumber V_BITWISE_AND(VNumber& a) { VNumber to_return = a.bitwise_reduce(l_and); @@ -297,15 +267,13 @@ VNumber V_BITWISE_XNOR(VNumber& a) { */ VNumber V_REPLICATE(VNumber& a, VNumber& n_times) { - assert_Werr(!n_times.has_unknown(), - "Cannot use undefined number for the replication count"); + assert_Werr(!n_times.has_unknown(), "Cannot use undefined number for the replication count"); return a.replicate(n_times.get_value()); } VNumber V_CONCAT(std::vector concat_list) { - assert_Werr(!concat_list.empty(), - "Concat List cannot be empty"); + assert_Werr(!concat_list.empty(), "Concat List cannot be empty"); VNumber init = concat_list[0]; for (size_t i = 1; i < concat_list.size(); i++) { @@ -314,9 +282,7 @@ VNumber V_CONCAT(std::vector concat_list) { return init; } -VNumber V_BITWISE_BUF(VNumber& a) { - return a.bitwise(l_buf); -} +VNumber V_BITWISE_BUF(VNumber& a) { return a.bitwise(l_buf); } VNumber V_BITWISE_BUFIF0(VNumber& input, VNumber& trigger) { if (trigger.size() == 1 && input.size() > 1) { @@ -354,29 +320,17 @@ VNumber V_BITWISE_NOTIF1(VNumber& input, VNumber& trigger) { return input.bitwise(trigger, l_notif1); } -VNumber V_BITWISE_AND(VNumber& a, VNumber& b) { - return a.bitwise(b, l_and); -} +VNumber V_BITWISE_AND(VNumber& a, VNumber& b) { return a.bitwise(b, l_and); } -VNumber V_BITWISE_OR(VNumber& a, VNumber& b) { - return a.bitwise(b, l_or); -} +VNumber V_BITWISE_OR(VNumber& a, VNumber& b) { return a.bitwise(b, l_or); } -VNumber V_BITWISE_XOR(VNumber& a, VNumber& b) { - return a.bitwise(b, l_xor); -} +VNumber V_BITWISE_XOR(VNumber& a, VNumber& b) { return a.bitwise(b, l_xor); } -VNumber V_BITWISE_NAND(VNumber& a, VNumber& b) { - return a.bitwise(b, l_nand); -} +VNumber V_BITWISE_NAND(VNumber& a, VNumber& b) { return a.bitwise(b, l_nand); } -VNumber V_BITWISE_NOR(VNumber& a, VNumber& b) { - return a.bitwise(b, l_nor); -} +VNumber V_BITWISE_NOR(VNumber& a, VNumber& b) { return a.bitwise(b, l_nor); } -VNumber V_BITWISE_XNOR(VNumber& a, VNumber& b) { - return a.bitwise(b, l_xnor); -} +VNumber V_BITWISE_XNOR(VNumber& a, VNumber& b) { return a.bitwise(b, l_xnor); } /** * Logical Operations @@ -418,48 +372,42 @@ VNumber V_LOGICAL_OR(VNumber& a, VNumber& b) { VNumber V_LT(VNumber& a, VNumber& b) { compare_bit cmp = eval_op(a, b); - BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_lt() ? BitSpace::_1 - : BitSpace::_0; + BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_lt() ? BitSpace::_1 : BitSpace::_0; VNumber to_return(1, result, false, true); return to_return; } VNumber V_GT(VNumber& a, VNumber& b) { compare_bit cmp = eval_op(a, b); - BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_gt() ? BitSpace::_1 - : BitSpace::_0; + BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_gt() ? BitSpace::_1 : BitSpace::_0; VNumber to_return(1, result, false, true); return to_return; } VNumber V_EQUAL(VNumber& a, VNumber& b) { compare_bit cmp = eval_op(a, b); - BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_eq() ? BitSpace::_1 - : BitSpace::_0; + BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_eq() ? BitSpace::_1 : BitSpace::_0; VNumber to_return(1, result, false, true); return to_return; } VNumber V_GE(VNumber& a, VNumber& b) { compare_bit cmp = eval_op(a, b); - BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_ge() ? BitSpace::_1 - : BitSpace::_0; + BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_ge() ? BitSpace::_1 : BitSpace::_0; VNumber to_return(1, result, false, true); return to_return; } VNumber V_LE(VNumber& a, VNumber& b) { compare_bit cmp = eval_op(a, b); - BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_le() ? BitSpace::_1 - : BitSpace::_0; + BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_le() ? BitSpace::_1 : BitSpace::_0; VNumber to_return(1, result, false, true); return to_return; } VNumber V_NOT_EQUAL(VNumber& a, VNumber& b) { compare_bit cmp = eval_op(a, b); - BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_ne() ? BitSpace::_1 - : BitSpace::_0; + BitSpace::bit_value_t result = cmp.is_unk() ? BitSpace::_x : cmp.is_ne() ? BitSpace::_1 : BitSpace::_0; VNumber to_return(1, result, false, true); return to_return; } @@ -511,13 +459,9 @@ VNumber V_MINUS(VNumber& a, VNumber& b, BitSpace::bit_value_t carry_in) { return sum_op(padded_a, complement, carry_in, /* is_twos_complement_subtraction */ true); } -VNumber V_ADD(VNumber& a, VNumber& b) { - return V_ADD(a, b, _0); -} +VNumber V_ADD(VNumber& a, VNumber& b) { return V_ADD(a, b, _0); } -VNumber V_MINUS(VNumber& a, VNumber& b) { - return V_MINUS(a, b, _0); -} +VNumber V_MINUS(VNumber& a, VNumber& b) { return V_MINUS(a, b, _0); } VNumber V_MULTIPLY(VNumber& a_in, VNumber& b_in) { if (a_in.has_unknown() || b_in.has_unknown()) { @@ -609,15 +553,17 @@ VNumber V_POWER(VNumber& a, VNumber& b) { } compare_bit res_a = eval_op(a, 0); - short val_a = (res_a.is_eq()) ? 0 : (res_a.is_lt()) ? (eval_op(a, -1).is_lt()) ? -2 : -1 - : - /* GREATHER_THAN */ (eval_op(a, 1).is_gt()) ? 2 - : 1; + short val_a = (res_a.is_eq()) ? 0 + : (res_a.is_lt()) ? (eval_op(a, -1).is_lt()) ? -2 : -1 + : + /* GREATHER_THAN */ (eval_op(a, 1).is_gt()) ? 2 + : 1; compare_bit res_b = eval_op(b, 0); - short val_b = (res_b.is_eq()) ? 0 : (res_b.is_lt()) ? -1 - : - /* GREATHER_THAN */ 1; + short val_b = (res_b.is_eq()) ? 0 + : (res_b.is_lt()) ? -1 + : + /* GREATHER_THAN */ 1; // Compute: Case Where 'val_a <= -2' or 'val_a >= 2'; As-Per the Spec: if (val_b > 0 && (val_a < -1 || val_a > 1)) { @@ -751,6 +697,5 @@ VNumber V_TERNARY(VNumber& a_in, VNumber& b_in, VNumber& c_in) { /* if a evaluates properly */ compare_bit eval = eval_op(V_LOGICAL_NOT(a_in), 0); - return (eval.is_unk()) ? b_in.bitwise(c_in, l_ternary) : (eval.is_eq()) ? VNumber(b_in) - : VNumber(c_in); + return (eval.is_unk()) ? b_in.bitwise(c_in, l_ternary) : (eval.is_eq()) ? VNumber(b_in) : VNumber(c_in); } diff --git a/libs/librtlnumber/src/rtl_utils.cpp b/libs/librtlnumber/src/rtl_utils.cpp index 8989456aa2d..ed2e311259d 100644 --- a/libs/librtlnumber/src/rtl_utils.cpp +++ b/libs/librtlnumber/src/rtl_utils.cpp @@ -34,7 +34,11 @@ static char to_chr(int val, short base, bool uppercase) { } } -std::string convert_between_bases(std::string str, uint8_t base_from, uint8_t base_to, bool uppercase, bool big_endian) { +std::string convert_between_bases(std::string str, + uint8_t base_from, + uint8_t base_to, + bool uppercase, + bool big_endian) { std::string digits = ""; while (str != "0") { int carry = 0; @@ -89,8 +93,7 @@ static uint8_t _to_decimal(char digit, const char* FUNCT, int LINE) { case '9': return 9; default: - _assert_Werr(false, FUNCT, LINE, - "INVALID BIT INPUT: " + std::string(1, digit)); + _assert_Werr(false, FUNCT, LINE, "INVALID BIT INPUT: " + std::string(1, digit)); break; } return 10; @@ -111,8 +114,7 @@ static std::string _radix_digit_to_bits_str(const char digit, size_t radix, cons case 'z': return "z"; default: - _assert_Werr(false, FUNCT, LINE, - "INVALID BIT INPUT: " + std::string(1, digit)); + _assert_Werr(false, FUNCT, LINE, "INVALID BIT INPUT: " + std::string(1, digit)); break; } break; @@ -140,8 +142,7 @@ static std::string _radix_digit_to_bits_str(const char digit, size_t radix, cons case 'z': return "zzz"; default: - _assert_Werr(false, FUNCT, LINE, - "INVALID BIT INPUT: " + std::string(1, digit)); + _assert_Werr(false, FUNCT, LINE, "INVALID BIT INPUT: " + std::string(1, digit)); break; } break; @@ -185,8 +186,7 @@ static std::string _radix_digit_to_bits_str(const char digit, size_t radix, cons case 'z': return "zzzz"; default: - _assert_Werr(false, FUNCT, LINE, - "INVALID BIT INPUT: " + std::string(1, digit)); + _assert_Werr(false, FUNCT, LINE, "INVALID BIT INPUT: " + std::string(1, digit)); break; } break; @@ -204,8 +204,7 @@ static std::string _radix_digit_to_bits_str(const char digit, size_t radix, cons return bitstring; } default: { - _assert_Werr(false, FUNCT, LINE, - "Invalid base " + std::to_string(radix)); + _assert_Werr(false, FUNCT, LINE, "Invalid base " + std::to_string(radix)); break; } } @@ -258,8 +257,7 @@ std::string string_of_radix_to_bitstring(std::string orig_string, size_t radix) break; default: - assert_Werr(false, - "invalid radix: " + std::to_string(radix)); + assert_Werr(false, "invalid radix: " + std::to_string(radix)); break; } @@ -277,8 +275,7 @@ std::string string_of_radix_to_bitstring(std::string orig_string, size_t radix) } result.insert(result.begin(), base_10_digits[rem_digit]); - while (new_number.size() > 1 - && new_number[0] == '0') { + while (new_number.size() > 1 && new_number[0] == '0') { new_number.erase(0, 1); } diff --git a/libs/libvtrutil/src/picosha2.h b/libs/libvtrutil/src/picosha2.h index 67794f92087..a0dd3b58cbb 100644 --- a/libs/libvtrutil/src/picosha2.h +++ b/libs/libvtrutil/src/picosha2.h @@ -36,69 +36,44 @@ typedef unsigned long word_t; typedef unsigned char byte_t; namespace detail { -inline byte_t mask_8bit(byte_t x) { - return x & 0xff; -} +inline byte_t mask_8bit(byte_t x) { return x & 0xff; } -inline word_t mask_32bit(word_t x) { - return x & 0xffffffff; -} +inline word_t mask_32bit(word_t x) { return x & 0xffffffff; } -const word_t add_constant[64] = { - 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, - 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, - 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, - 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, - 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, - 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, - 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, - 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, - 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, - 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, - 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, - 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, - 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, - 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, - 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, - 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2}; - -const word_t initial_message_digest[8] = { - 0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a, - 0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19}; - -inline word_t ch(word_t x, word_t y, word_t z) { - return (x & y) ^ ((~x) & z); -} +const word_t add_constant[64] + = {0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, + 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, + 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, + 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, + 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, + 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, + 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, + 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2}; -inline word_t maj(word_t x, word_t y, word_t z) { - return (x & y) ^ (x & z) ^ (y & z); -} +const word_t initial_message_digest[8] + = {0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a, 0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19}; + +inline word_t ch(word_t x, word_t y, word_t z) { return (x & y) ^ ((~x) & z); } + +inline word_t maj(word_t x, word_t y, word_t z) { return (x & y) ^ (x & z) ^ (y & z); } inline word_t rotr(word_t x, std::size_t n) { assert(n < 32); return mask_32bit((x >> n) | (x << (32 - n))); } -inline word_t bsig0(word_t x) { - return rotr(x, 2) ^ rotr(x, 13) ^ rotr(x, 22); -} +inline word_t bsig0(word_t x) { return rotr(x, 2) ^ rotr(x, 13) ^ rotr(x, 22); } -inline word_t bsig1(word_t x) { - return rotr(x, 6) ^ rotr(x, 11) ^ rotr(x, 25); -} +inline word_t bsig1(word_t x) { return rotr(x, 6) ^ rotr(x, 11) ^ rotr(x, 25); } inline word_t shr(word_t x, std::size_t n) { assert(n < 32); return x >> n; } -inline word_t ssig0(word_t x) { - return rotr(x, 7) ^ rotr(x, 18) ^ shr(x, 3); -} +inline word_t ssig0(word_t x) { return rotr(x, 7) ^ rotr(x, 18) ^ shr(x, 3); } -inline word_t ssig1(word_t x) { - return rotr(x, 17) ^ rotr(x, 19) ^ shr(x, 10); -} +inline word_t ssig1(word_t x) { return rotr(x, 17) ^ rotr(x, 19) ^ shr(x, 10); } template void hash256_block(RaIter1 message_digest, RaIter2 first, RaIter2 /*last*/) { @@ -196,9 +171,7 @@ std::string bytes_to_hex_string(const InContainer& bytes) { class hash256_one_by_one { public: - hash256_one_by_one() { - init(); - } + hash256_one_by_one() { init(); } void init() { buffer_.clear(); @@ -261,9 +234,7 @@ class hash256_one_by_one { } void write_data_bit_length(byte_t* begin) { word_t data_bit_length_digits[4]; - std::copy( - data_length_digits_, data_length_digits_ + 4, - data_bit_length_digits); + std::copy(data_length_digits_, data_length_digits_ + 4, data_bit_length_digits); // convert byte length to bit length (multiply 8 or shift 3 times left) word_t carry = 0; diff --git a/libs/libvtrutil/src/specrand.cpp b/libs/libvtrutil/src/specrand.cpp index 4440121dcde..c88e68df095 100644 --- a/libs/libvtrutil/src/specrand.cpp +++ b/libs/libvtrutil/src/specrand.cpp @@ -62,19 +62,13 @@ static unsigned long mt[N]; /* the array for the state vector */ static int mti = N + 1; /* mti==N+1 means mt[N] is not initialized */ -void spec_srand(int seed) { - spec_init_genrand((unsigned long)seed); -} +void spec_srand(int seed) { spec_init_genrand((unsigned long)seed); } /* Just a copy of spec_genrand_real2() */ -double spec_rand() { - return spec_genrand_int32() * (1.0 / 4294967296.0); -} +double spec_rand() { return spec_genrand_int32() * (1.0 / 4294967296.0); } /* Just a copy of spec_genrand_int31() */ -long spec_lrand48() { - return (long)(spec_genrand_int32() >> 1); -} +long spec_lrand48() { return (long)(spec_genrand_int32() >> 1); } /* initializes mt[N] with a seed */ void spec_init_genrand(unsigned long s) { @@ -101,21 +95,20 @@ void spec_init_by_array(unsigned long init_key[], int key_length) { j = 0; k = (N > key_length ? N : key_length); for (; k; k--) { - mt[i] = (mt[i] ^ ((mt[i - 1] ^ (mt[i - 1] >> 30)) * 1664525UL)) - + init_key[j] + j; /* non linear */ - mt[i] &= 0xffffffffUL; /* for WORDSIZE > 32 machines */ + mt[i] = (mt[i] ^ ((mt[i - 1] ^ (mt[i - 1] >> 30)) * 1664525UL)) + init_key[j] + j; /* non linear */ + mt[i] &= 0xffffffffUL; /* for WORDSIZE > 32 machines */ i++; j++; if (i >= N) { mt[0] = mt[N - 1]; i = 1; } - if (j >= key_length) j = 0; + if (j >= key_length) + j = 0; } for (k = N - 1; k; k--) { - mt[i] = (mt[i] ^ ((mt[i - 1] ^ (mt[i - 1] >> 30)) * 1566083941UL)) - - i; /* non linear */ - mt[i] &= 0xffffffffUL; /* for WORDSIZE > 32 machines */ + mt[i] = (mt[i] ^ ((mt[i - 1] ^ (mt[i - 1] >> 30)) * 1566083941UL)) - i; /* non linear */ + mt[i] &= 0xffffffffUL; /* for WORDSIZE > 32 machines */ i++; if (i >= N) { mt[0] = mt[N - 1]; @@ -164,9 +157,7 @@ unsigned long spec_genrand_int32() { } /* generates a random number on [0,0x7fffffff]-interval */ -long spec_genrand_int31() { - return (long)(spec_genrand_int32() >> 1); -} +long spec_genrand_int31() { return (long)(spec_genrand_int32() >> 1); } /* generates a random number on [0,1]-real-interval */ double spec_genrand_real1() { diff --git a/libs/libvtrutil/src/tl_optional.hpp b/libs/libvtrutil/src/tl_optional.hpp index 294755b69a1..d09816e32f8 100644 --- a/libs/libvtrutil/src/tl_optional.hpp +++ b/libs/libvtrutil/src/tl_optional.hpp @@ -32,78 +32,72 @@ #include #if (defined(_MSC_VER) && _MSC_VER == 1900) -# define TL_OPTIONAL_MSVC2015 +#define TL_OPTIONAL_MSVC2015 #endif #if (defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ <= 9 && !defined(__clang__)) -# define TL_OPTIONAL_GCC49 +#define TL_OPTIONAL_GCC49 #endif #if (defined(__GNUC__) && __GNUC__ == 5 && __GNUC_MINOR__ <= 4 && !defined(__clang__)) -# define TL_OPTIONAL_GCC54 +#define TL_OPTIONAL_GCC54 #endif #if (defined(__GNUC__) && __GNUC__ == 5 && __GNUC_MINOR__ <= 5 && !defined(__clang__)) -# define TL_OPTIONAL_GCC55 +#define TL_OPTIONAL_GCC55 #endif #if (defined(__GNUC__) && __GNUC__ == 4 && __GNUC_MINOR__ <= 9 && !defined(__clang__)) // GCC < 5 doesn't support overloading on const&& for member functions -# define TL_OPTIONAL_NO_CONSTRR +#define TL_OPTIONAL_NO_CONSTRR // GCC < 5 doesn't support some standard C++11 type traits -# define TL_OPTIONAL_IS_TRIVIALLY_COPY_CONSTRUCTIBLE(T) \ - std::has_trivial_copy_constructor::value -# define TL_OPTIONAL_IS_TRIVIALLY_COPY_ASSIGNABLE(T) std::has_trivial_copy_assign::value +#define TL_OPTIONAL_IS_TRIVIALLY_COPY_CONSTRUCTIBLE(T) std::has_trivial_copy_constructor::value +#define TL_OPTIONAL_IS_TRIVIALLY_COPY_ASSIGNABLE(T) std::has_trivial_copy_assign::value // This one will be different for GCC 5.7 if it's ever supported -# define TL_OPTIONAL_IS_TRIVIALLY_DESTRUCTIBLE(T) std::is_trivially_destructible::value +#define TL_OPTIONAL_IS_TRIVIALLY_DESTRUCTIBLE(T) std::is_trivially_destructible::value // GCC 5 < v < 8 has a bug in is_trivially_copy_constructible which breaks std::vector // for non-copyable types #elif (defined(__GNUC__) && __GNUC__ < 8 && !defined(__clang__)) -# ifndef TL_GCC_LESS_8_TRIVIALLY_COPY_CONSTRUCTIBLE_MUTEX -# define TL_GCC_LESS_8_TRIVIALLY_COPY_CONSTRUCTIBLE_MUTEX +#ifndef TL_GCC_LESS_8_TRIVIALLY_COPY_CONSTRUCTIBLE_MUTEX +#define TL_GCC_LESS_8_TRIVIALLY_COPY_CONSTRUCTIBLE_MUTEX namespace tl { namespace detail { template struct is_trivially_copy_constructible : std::is_trivially_copy_constructible {}; -# ifdef _GLIBCXX_VECTOR +#ifdef _GLIBCXX_VECTOR template -struct is_trivially_copy_constructible> - : std::is_trivially_copy_constructible {}; -# endif +struct is_trivially_copy_constructible> : std::is_trivially_copy_constructible {}; +#endif } // namespace detail } // namespace tl -# endif +#endif -# define TL_OPTIONAL_IS_TRIVIALLY_COPY_CONSTRUCTIBLE(T) \ - tl::detail::is_trivially_copy_constructible::value -# define TL_OPTIONAL_IS_TRIVIALLY_COPY_ASSIGNABLE(T) \ - std::is_trivially_copy_assignable::value -# define TL_OPTIONAL_IS_TRIVIALLY_DESTRUCTIBLE(T) std::is_trivially_destructible::value +#define TL_OPTIONAL_IS_TRIVIALLY_COPY_CONSTRUCTIBLE(T) tl::detail::is_trivially_copy_constructible::value +#define TL_OPTIONAL_IS_TRIVIALLY_COPY_ASSIGNABLE(T) std::is_trivially_copy_assignable::value +#define TL_OPTIONAL_IS_TRIVIALLY_DESTRUCTIBLE(T) std::is_trivially_destructible::value #else -# define TL_OPTIONAL_IS_TRIVIALLY_COPY_CONSTRUCTIBLE(T) \ - std::is_trivially_copy_constructible::value -# define TL_OPTIONAL_IS_TRIVIALLY_COPY_ASSIGNABLE(T) \ - std::is_trivially_copy_assignable::value -# define TL_OPTIONAL_IS_TRIVIALLY_DESTRUCTIBLE(T) std::is_trivially_destructible::value +#define TL_OPTIONAL_IS_TRIVIALLY_COPY_CONSTRUCTIBLE(T) std::is_trivially_copy_constructible::value +#define TL_OPTIONAL_IS_TRIVIALLY_COPY_ASSIGNABLE(T) std::is_trivially_copy_assignable::value +#define TL_OPTIONAL_IS_TRIVIALLY_DESTRUCTIBLE(T) std::is_trivially_destructible::value #endif #if __cplusplus > 201103L -# define TL_OPTIONAL_CXX14 +#define TL_OPTIONAL_CXX14 #endif // constexpr implies const in C++11, not C++14 #if (__cplusplus == 201103L || defined(TL_OPTIONAL_MSVC2015) || defined(TL_OPTIONAL_GCC49)) -# define TL_OPTIONAL_11_CONSTEXPR +#define TL_OPTIONAL_11_CONSTEXPR #else -# define TL_OPTIONAL_11_CONSTEXPR constexpr +#define TL_OPTIONAL_11_CONSTEXPR constexpr #endif namespace tl { #ifndef TL_MONOSTATE_INPLACE_MUTEX -# define TL_MONOSTATE_INPLACE_MUTEX +#define TL_MONOSTATE_INPLACE_MUTEX /// Used to represent an optional with no data; essentially a bool class monostate {}; @@ -120,7 +114,7 @@ class optional; namespace detail { #ifndef TL_TRAITS_MUTEX -# define TL_TRAITS_MUTEX +#define TL_TRAITS_MUTEX // C++14-style aliases for brevity template using remove_const_t = typename std::remove_const::type; @@ -139,17 +133,16 @@ struct conjunction : std::true_type {}; template struct conjunction : B {}; template -struct conjunction - : std::conditional, B>::type {}; +struct conjunction : std::conditional, B>::type {}; -# if defined(_LIBCPP_VERSION) && __cplusplus == 201103L -# define TL_TRAITS_LIBCXX_MEM_FN_WORKAROUND -# endif +#if defined(_LIBCPP_VERSION) && __cplusplus == 201103L +#define TL_TRAITS_LIBCXX_MEM_FN_WORKAROUND +#endif // In C++11 mode, there's an issue in libc++'s std::mem_fn // which results in a hard-error when using it in a noexcept expression // in some cases. This is a check to workaround the common failing case. -# ifdef TL_TRAITS_LIBCXX_MEM_FN_WORKAROUND +#ifdef TL_TRAITS_LIBCXX_MEM_FN_WORKAROUND template struct is_pointer_to_non_const_member_func : std::false_type {}; template @@ -171,25 +164,25 @@ template struct is_const_or_const_ref : std::true_type {}; template struct is_const_or_const_ref : std::true_type {}; -# endif +#endif // std::invoke from C++17 // https://stackoverflow.com/questions/38288042/c11-14-invoke-workaround -template::value && is_const_or_const_ref::value)>, -# endif +template::value && is_const_or_const_ref::value)>, +#endif typename = enable_if_t>::value>, int = 0> -constexpr auto invoke(Fn&& f, Args&&... args) noexcept( - noexcept(std::mem_fn(f)(std::forward(args)...))) +constexpr auto invoke(Fn&& f, Args&&... args) noexcept(noexcept(std::mem_fn(f)(std::forward(args)...))) -> decltype(std::mem_fn(f)(std::forward(args)...)) { return std::mem_fn(f)(std::forward(args)...); } template>::value>> -constexpr auto invoke(Fn&& f, Args&&... args) noexcept( - noexcept(std::forward(f)(std::forward(args)...))) +constexpr auto invoke(Fn&& f, Args&&... args) noexcept(noexcept(std::forward(f)(std::forward(args)...))) -> decltype(std::forward(f)(std::forward(args)...)) { return std::forward(f)(std::forward(args)...); } @@ -199,10 +192,7 @@ template struct invoke_result_impl; template -struct invoke_result_impl< - F, - decltype(detail::invoke(std::declval(), std::declval()...), void()), - Us...> { +struct invoke_result_impl(), std::declval()...), void()), Us...> { using type = decltype(detail::invoke(std::declval(), std::declval()...)); }; @@ -212,14 +202,14 @@ using invoke_result = invoke_result_impl; template using invoke_result_t = typename invoke_result::type; -# if defined(_MSC_VER) && _MSC_VER <= 1900 +#if defined(_MSC_VER) && _MSC_VER <= 1900 // TODO make a version which works with MSVC 2015 template struct is_swappable : std::true_type {}; template struct is_nothrow_swappable : std::true_type {}; -# else +#else // https://stackoverflow.com/questions/26744589/what-is-a-proper-way-to-implement-is-swappable-to-test-for-the-swappable-concept namespace swap_adl_tests { // if swap ADL finds this then it would call std::swap otherwise (same @@ -236,52 +226,56 @@ tag swap(T (&a)[N], T (&b)[N]); template std::false_type can_swap(...) noexcept(false); template(), std::declval()))> -std::true_type can_swap(int) noexcept(noexcept(swap(std::declval(), - std::declval()))); +std::true_type can_swap(int) noexcept(noexcept(swap(std::declval(), std::declval()))); template std::false_type uses_std(...); template -std::is_same(), std::declval())), tag> -uses_std(int); +std::is_same(), std::declval())), tag> uses_std(int); template -struct is_std_swap_noexcept - : std::integral_constant::value && std::is_nothrow_move_assignable::value> {}; +struct is_std_swap_noexcept : std::integral_constant::value + && std::is_nothrow_move_assignable::value> {}; template struct is_std_swap_noexcept : is_std_swap_noexcept {}; template -struct is_adl_swap_noexcept - : std::integral_constant(0))> {}; +struct is_adl_swap_noexcept : std::integral_constant(0))> {}; } // namespace swap_adl_tests template struct is_swappable - : std::integral_constant< - bool, - decltype(detail::swap_adl_tests::can_swap(0))::value && (!decltype(detail::swap_adl_tests::uses_std(0))::value || (std::is_move_assignable::value && std::is_move_constructible::value))> {}; + : std::integral_constant(0))::value + && (!decltype(detail::swap_adl_tests::uses_std(0))::value + || (std::is_move_assignable::value && std::is_move_constructible::value))> { +}; template struct is_swappable - : std::integral_constant< - bool, - decltype(detail::swap_adl_tests::can_swap(0))::value && (!decltype(detail::swap_adl_tests::uses_std(0))::value || is_swappable::value)> {}; + : std::integral_constant(0))::value + && (!decltype(detail::swap_adl_tests::uses_std(0))::value + || is_swappable::value)> {}; template struct is_nothrow_swappable - : std::integral_constant< - bool, - is_swappable::value && ((decltype(detail::swap_adl_tests::uses_std(0))::value && detail::swap_adl_tests::is_std_swap_noexcept::value) || (!decltype(detail::swap_adl_tests::uses_std(0))::value && detail::swap_adl_tests::is_adl_swap_noexcept::value))> { -}; -# endif + : std::integral_constant::value + && ((decltype(detail::swap_adl_tests::uses_std(0))::value + && detail::swap_adl_tests::is_std_swap_noexcept::value) + || (!decltype(detail::swap_adl_tests::uses_std(0))::value + && detail::swap_adl_tests::is_adl_swap_noexcept::value))> {}; +#endif #endif // std::void_t from C++17 template -struct voider { using type = void; }; +struct voider { + using type = void; +}; template using void_t = typename voider::type; @@ -304,8 +298,7 @@ using get_map_return = optional>>; template struct returns_void_impl; template -struct returns_void_impl>, U...> - : std::is_void> {}; +struct returns_void_impl>, U...> : std::is_void> {}; template using returns_void = returns_void_impl; @@ -316,19 +309,33 @@ template using disable_if_ret_void = enable_if_t::value>; template -using enable_forward_value = detail::enable_if_t::value && !std::is_same, in_place_t>::value && !std::is_same, detail::decay_t>::value>; +using enable_forward_value + = detail::enable_if_t::value && !std::is_same, in_place_t>::value + && !std::is_same, detail::decay_t>::value>; template using enable_from_other = detail::enable_if_t< - std::is_constructible::value && !std::is_constructible&>::value && !std::is_constructible&&>::value && !std::is_constructible&>::value && !std::is_constructible&&>::value && !std::is_convertible&, T>::value && !std::is_convertible&&, T>::value && !std::is_convertible&, T>::value && !std::is_convertible&&, T>::value>; + std::is_constructible::value && !std::is_constructible&>::value + && !std::is_constructible&&>::value && !std::is_constructible&>::value + && !std::is_constructible&&>::value && !std::is_convertible&, T>::value + && !std::is_convertible&&, T>::value && !std::is_convertible&, T>::value + && !std::is_convertible&&, T>::value>; template -using enable_assign_forward = detail::enable_if_t< - !std::is_same, detail::decay_t>::value && !detail::conjunction, std::is_same>>::value && std::is_constructible::value && std::is_assignable::value>; +using enable_assign_forward + = detail::enable_if_t, detail::decay_t>::value + && !detail::conjunction, std::is_same>>::value + && std::is_constructible::value && std::is_assignable::value>; template using enable_assign_from_other = detail::enable_if_t< - std::is_constructible::value && std::is_assignable::value && !std::is_constructible&>::value && !std::is_constructible&&>::value && !std::is_constructible&>::value && !std::is_constructible&&>::value && !std::is_convertible&, T>::value && !std::is_convertible&&, T>::value && !std::is_convertible&, T>::value && !std::is_convertible&&, T>::value && !std::is_assignable&>::value && !std::is_assignable&&>::value && !std::is_assignable&>::value && !std::is_assignable&&>::value>; + std::is_constructible::value && std::is_assignable::value + && !std::is_constructible&>::value && !std::is_constructible&&>::value + && !std::is_constructible&>::value && !std::is_constructible&&>::value + && !std::is_convertible&, T>::value && !std::is_convertible&&, T>::value + && !std::is_convertible&, T>::value && !std::is_convertible&&, T>::value + && !std::is_assignable&>::value && !std::is_assignable&&>::value + && !std::is_assignable&>::value && !std::is_assignable&&>::value>; // The storage base manages the actual storage, and correctly propagates // trivial destruction from T. This case is for when T is not trivially @@ -474,8 +481,7 @@ struct optional_move_base : optional_copy_base { optional_move_base() = default; optional_move_base(const optional_move_base& rhs) = default; - optional_move_base(optional_move_base&& rhs) noexcept( - std::is_nothrow_move_constructible::value) { + optional_move_base(optional_move_base&& rhs) noexcept(std::is_nothrow_move_constructible::value) { if (rhs.has_value()) { this->construct(std::move(rhs.get())); } else { @@ -487,7 +493,9 @@ struct optional_move_base : optional_copy_base { }; // This class manages conditionally having a trivial copy assignment operator -template +template struct optional_copy_assign_base : optional_move_base { using optional_move_base::optional_move_base; }; @@ -504,9 +512,7 @@ struct optional_copy_assign_base : optional_move_base { this->assign(rhs); return *this; } - optional_copy_assign_base& - operator=(optional_copy_assign_base&& rhs) - = default; + optional_copy_assign_base& operator=(optional_copy_assign_base&& rhs) = default; }; // This class manages conditionally having a trivial move assignment operator @@ -515,7 +521,9 @@ struct optional_copy_assign_base : optional_move_base { // to make do with a non-trivial move assignment operator even if T is trivially // move assignable #ifndef TL_OPTIONAL_GCC49 -template::value&& std::is_trivially_move_constructible::value&& std::is_trivially_move_assignable::value> +template::value&& std::is_trivially_move_constructible::value&& + std::is_trivially_move_assignable::value> struct optional_move_assign_base : optional_copy_assign_base { using optional_copy_assign_base::optional_copy_assign_base; }; @@ -533,12 +541,9 @@ struct optional_move_assign_base : optional_copy_assign_base { optional_move_assign_base(optional_move_assign_base&& rhs) = default; - optional_move_assign_base& - operator=(const optional_move_assign_base& rhs) - = default; + optional_move_assign_base& operator=(const optional_move_assign_base& rhs) = default; - optional_move_assign_base& - operator=(optional_move_assign_base&& rhs) noexcept( + optional_move_assign_base& operator=(optional_move_assign_base&& rhs) noexcept( std::is_nothrow_move_constructible::value&& std::is_nothrow_move_assignable::value) { this->assign(std::move(rhs)); return *this; @@ -547,16 +552,15 @@ struct optional_move_assign_base : optional_copy_assign_base { // optional_delete_ctor_base will conditionally delete copy and move // constructors depending on whether T is copy/move constructible -template::value, bool EnableMove = std::is_move_constructible::value> +template::value, + bool EnableMove = std::is_move_constructible::value> struct optional_delete_ctor_base { optional_delete_ctor_base() = default; optional_delete_ctor_base(const optional_delete_ctor_base&) = default; optional_delete_ctor_base(optional_delete_ctor_base&&) noexcept = default; - optional_delete_ctor_base& - operator=(const optional_delete_ctor_base&) - = default; - optional_delete_ctor_base& - operator=(optional_delete_ctor_base&&) noexcept = default; + optional_delete_ctor_base& operator=(const optional_delete_ctor_base&) = default; + optional_delete_ctor_base& operator=(optional_delete_ctor_base&&) noexcept = default; }; template @@ -564,11 +568,8 @@ struct optional_delete_ctor_base { optional_delete_ctor_base() = default; optional_delete_ctor_base(const optional_delete_ctor_base&) = default; optional_delete_ctor_base(optional_delete_ctor_base&&) noexcept = delete; - optional_delete_ctor_base& - operator=(const optional_delete_ctor_base&) - = default; - optional_delete_ctor_base& - operator=(optional_delete_ctor_base&&) noexcept = default; + optional_delete_ctor_base& operator=(const optional_delete_ctor_base&) = default; + optional_delete_ctor_base& operator=(optional_delete_ctor_base&&) noexcept = default; }; template @@ -576,11 +577,8 @@ struct optional_delete_ctor_base { optional_delete_ctor_base() = default; optional_delete_ctor_base(const optional_delete_ctor_base&) = delete; optional_delete_ctor_base(optional_delete_ctor_base&&) noexcept = default; - optional_delete_ctor_base& - operator=(const optional_delete_ctor_base&) - = default; - optional_delete_ctor_base& - operator=(optional_delete_ctor_base&&) noexcept = default; + optional_delete_ctor_base& operator=(const optional_delete_ctor_base&) = default; + optional_delete_ctor_base& operator=(optional_delete_ctor_base&&) noexcept = default; }; template @@ -588,11 +586,8 @@ struct optional_delete_ctor_base { optional_delete_ctor_base() = default; optional_delete_ctor_base(const optional_delete_ctor_base&) = delete; optional_delete_ctor_base(optional_delete_ctor_base&&) noexcept = delete; - optional_delete_ctor_base& - operator=(const optional_delete_ctor_base&) - = default; - optional_delete_ctor_base& - operator=(optional_delete_ctor_base&&) noexcept = default; + optional_delete_ctor_base& operator=(const optional_delete_ctor_base&) = default; + optional_delete_ctor_base& operator=(optional_delete_ctor_base&&) noexcept = default; }; // optional_delete_assign_base will conditionally delete copy and move @@ -604,11 +599,8 @@ struct optional_delete_assign_base { optional_delete_assign_base() = default; optional_delete_assign_base(const optional_delete_assign_base&) = default; optional_delete_assign_base(optional_delete_assign_base&&) noexcept = default; - optional_delete_assign_base& - operator=(const optional_delete_assign_base&) - = default; - optional_delete_assign_base& - operator=(optional_delete_assign_base&&) noexcept = default; + optional_delete_assign_base& operator=(const optional_delete_assign_base&) = default; + optional_delete_assign_base& operator=(optional_delete_assign_base&&) noexcept = default; }; template @@ -616,11 +608,8 @@ struct optional_delete_assign_base { optional_delete_assign_base() = default; optional_delete_assign_base(const optional_delete_assign_base&) = default; optional_delete_assign_base(optional_delete_assign_base&&) noexcept = default; - optional_delete_assign_base& - operator=(const optional_delete_assign_base&) - = default; - optional_delete_assign_base& - operator=(optional_delete_assign_base&&) noexcept = delete; + optional_delete_assign_base& operator=(const optional_delete_assign_base&) = default; + optional_delete_assign_base& operator=(optional_delete_assign_base&&) noexcept = delete; }; template @@ -628,11 +617,8 @@ struct optional_delete_assign_base { optional_delete_assign_base() = default; optional_delete_assign_base(const optional_delete_assign_base&) = default; optional_delete_assign_base(optional_delete_assign_base&&) noexcept = default; - optional_delete_assign_base& - operator=(const optional_delete_assign_base&) - = delete; - optional_delete_assign_base& - operator=(optional_delete_assign_base&&) noexcept = default; + optional_delete_assign_base& operator=(const optional_delete_assign_base&) = delete; + optional_delete_assign_base& operator=(optional_delete_assign_base&&) noexcept = default; }; template @@ -640,11 +626,8 @@ struct optional_delete_assign_base { optional_delete_assign_base() = default; optional_delete_assign_base(const optional_delete_assign_base&) = default; optional_delete_assign_base(optional_delete_assign_base&&) noexcept = default; - optional_delete_assign_base& - operator=(const optional_delete_assign_base&) - = delete; - optional_delete_assign_base& - operator=(optional_delete_assign_base&&) noexcept = delete; + optional_delete_assign_base& operator=(const optional_delete_assign_base&) = delete; + optional_delete_assign_base& operator=(optional_delete_assign_base&&) noexcept = delete; }; } // namespace detail @@ -655,8 +638,7 @@ struct nullopt_t { constexpr explicit nullopt_t(do_not_use, do_not_use) noexcept {} }; /// Represents an empty optional -static constexpr nullopt_t nullopt{nullopt_t::do_not_use{}, - nullopt_t::do_not_use{}}; +static constexpr nullopt_t nullopt{nullopt_t::do_not_use{}, nullopt_t::do_not_use{}}; class bad_optional_access : public std::exception { public: @@ -676,8 +658,7 @@ class optional : private detail::optional_move_assign_base, private detail::optional_delete_assign_base { using base = detail::optional_move_assign_base; - static_assert(!std::is_same::value, - "instantiation of optional with in_place_t is ill-formed"); + static_assert(!std::is_same::value, "instantiation of optional with in_place_t is ill-formed"); static_assert(!std::is_same, nullopt_t>::value, "instantiation of optional with nullopt_t is ill-formed"); @@ -686,97 +667,83 @@ class optional : private detail::optional_move_assign_base, // types are not SFINAE-safe. This provides better support for things like // generic lambdas. C.f. // http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2017/p0826r0.html -#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) && !defined(TL_OPTIONAL_GCC55) +#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) \ + && !defined(TL_OPTIONAL_GCC55) /// Carries out some operation which returns an optional on the stored /// object if there is one. template TL_OPTIONAL_11_CONSTEXPR auto and_then(F&& f) & { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } template TL_OPTIONAL_11_CONSTEXPR auto and_then(F&& f) && { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : result(nullopt); } template constexpr auto and_then(F&& f) const& { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } -# ifndef TL_OPTIONAL_NO_CONSTRR +#ifndef TL_OPTIONAL_NO_CONSTRR template constexpr auto and_then(F&& f) const&& { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : result(nullopt); } -# endif +#endif #else /// Carries out some operation which returns an optional on the stored /// object if there is one. template TL_OPTIONAL_11_CONSTEXPR detail::invoke_result_t and_then(F&& f) & { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } template TL_OPTIONAL_11_CONSTEXPR detail::invoke_result_t and_then(F&& f) && { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : result(nullopt); } template constexpr detail::invoke_result_t and_then(F&& f) const& { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } -# ifndef TL_OPTIONAL_NO_CONSTRR +#ifndef TL_OPTIONAL_NO_CONSTRR template constexpr detail::invoke_result_t and_then(F&& f) const&& { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : result(nullopt); } -# endif +#endif #endif -#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) && !defined(TL_OPTIONAL_GCC55) +#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) \ + && !defined(TL_OPTIONAL_GCC55) /// Carries out some operation on the stored object if there is one. template TL_OPTIONAL_11_CONSTEXPR auto map(F&& f) & { @@ -800,37 +767,31 @@ class optional : private detail::optional_move_assign_base, #else /// Carries out some operation on the stored object if there is one. template - TL_OPTIONAL_11_CONSTEXPR decltype(optional_map_impl(std::declval(), - std::declval())) - map(F&& f) & { + TL_OPTIONAL_11_CONSTEXPR decltype(optional_map_impl(std::declval(), std::declval())) map(F&& f) & { return optional_map_impl(*this, std::forward(f)); } template - TL_OPTIONAL_11_CONSTEXPR decltype(optional_map_impl(std::declval(), - std::declval())) - map(F&& f) && { + TL_OPTIONAL_11_CONSTEXPR decltype(optional_map_impl(std::declval(), std::declval())) map( + F&& f) && { return optional_map_impl(std::move(*this), std::forward(f)); } template - constexpr decltype(optional_map_impl(std::declval(), - std::declval())) - map(F&& f) const& { + constexpr decltype(optional_map_impl(std::declval(), std::declval())) map(F&& f) const& { return optional_map_impl(*this, std::forward(f)); } -# ifndef TL_OPTIONAL_NO_CONSTRR +#ifndef TL_OPTIONAL_NO_CONSTRR template - constexpr decltype(optional_map_impl(std::declval(), - std::declval())) - map(F&& f) const&& { + constexpr decltype(optional_map_impl(std::declval(), std::declval())) map(F&& f) const&& { return optional_map_impl(std::move(*this), std::forward(f)); } -# endif +#endif #endif -#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) && !defined(TL_OPTIONAL_GCC55) +#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) \ + && !defined(TL_OPTIONAL_GCC55) /// Carries out some operation on the stored object if there is one. template TL_OPTIONAL_11_CONSTEXPR auto transform(F&& f) & { @@ -854,34 +815,30 @@ class optional : private detail::optional_move_assign_base, #else /// Carries out some operation on the stored object if there is one. template - TL_OPTIONAL_11_CONSTEXPR decltype(optional_map_impl(std::declval(), - std::declval())) - transform(F&& f) & { + TL_OPTIONAL_11_CONSTEXPR decltype(optional_map_impl(std::declval(), std::declval())) transform( + F&& f) & { return optional_map_impl(*this, std::forward(f)); } template - TL_OPTIONAL_11_CONSTEXPR decltype(optional_map_impl(std::declval(), - std::declval())) - transform(F&& f) && { + TL_OPTIONAL_11_CONSTEXPR decltype(optional_map_impl(std::declval(), std::declval())) transform( + F&& f) && { return optional_map_impl(std::move(*this), std::forward(f)); } template - constexpr decltype(optional_map_impl(std::declval(), - std::declval())) - transform(F&& f) const& { + constexpr decltype(optional_map_impl(std::declval(), std::declval())) transform( + F&& f) const& { return optional_map_impl(*this, std::forward(f)); } -# ifndef TL_OPTIONAL_NO_CONSTRR +#ifndef TL_OPTIONAL_NO_CONSTRR template - constexpr decltype(optional_map_impl(std::declval(), - std::declval())) - transform(F&& f) const&& { + constexpr decltype(optional_map_impl(std::declval(), std::declval())) transform( + F&& f) const&& { return optional_map_impl(std::move(*this), std::forward(f)); } -# endif +#endif #endif /// Calls `f` if the optional is empty @@ -946,27 +903,23 @@ class optional : private detail::optional_move_assign_base, /// Maps the stored value with `f` if there is one, otherwise returns `u`. template U map_or(F&& f, U&& u) & { - return has_value() ? detail::invoke(std::forward(f), **this) - : std::forward(u); + return has_value() ? detail::invoke(std::forward(f), **this) : std::forward(u); } template U map_or(F&& f, U&& u) && { - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : std::forward(u); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : std::forward(u); } template U map_or(F&& f, U&& u) const& { - return has_value() ? detail::invoke(std::forward(f), **this) - : std::forward(u); + return has_value() ? detail::invoke(std::forward(f), **this) : std::forward(u); } #ifndef TL_OPTIONAL_NO_CONSTRR template U map_or(F&& f, U&& u) const&& { - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : std::forward(u); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : std::forward(u); } #endif @@ -974,27 +927,23 @@ class optional : private detail::optional_move_assign_base, /// `u` and returns the result. template detail::invoke_result_t map_or_else(F&& f, U&& u) & { - return has_value() ? detail::invoke(std::forward(f), **this) - : std::forward(u)(); + return has_value() ? detail::invoke(std::forward(f), **this) : std::forward(u)(); } template detail::invoke_result_t map_or_else(F&& f, U&& u) && { - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : std::forward(u)(); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : std::forward(u)(); } template detail::invoke_result_t map_or_else(F&& f, U&& u) const& { - return has_value() ? detail::invoke(std::forward(f), **this) - : std::forward(u)(); + return has_value() ? detail::invoke(std::forward(f), **this) : std::forward(u)(); } #ifndef TL_OPTIONAL_NO_CONSTRR template detail::invoke_result_t map_or_else(F&& f, U&& u) const&& { - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : std::forward(u)(); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : std::forward(u)(); } #endif @@ -1006,40 +955,28 @@ class optional : private detail::optional_move_assign_base, } /// Returns `rhs` if `*this` is empty, otherwise the current value. - TL_OPTIONAL_11_CONSTEXPR optional disjunction(const optional& rhs) & { - return has_value() ? *this : rhs; - } + TL_OPTIONAL_11_CONSTEXPR optional disjunction(const optional& rhs) & { return has_value() ? *this : rhs; } - constexpr optional disjunction(const optional& rhs) const& { - return has_value() ? *this : rhs; - } + constexpr optional disjunction(const optional& rhs) const& { return has_value() ? *this : rhs; } TL_OPTIONAL_11_CONSTEXPR optional disjunction(const optional& rhs) && { return has_value() ? std::move(*this) : rhs; } #ifndef TL_OPTIONAL_NO_CONSTRR - constexpr optional disjunction(const optional& rhs) const&& { - return has_value() ? std::move(*this) : rhs; - } + constexpr optional disjunction(const optional& rhs) const&& { return has_value() ? std::move(*this) : rhs; } #endif - TL_OPTIONAL_11_CONSTEXPR optional disjunction(optional&& rhs) & { - return has_value() ? *this : std::move(rhs); - } + TL_OPTIONAL_11_CONSTEXPR optional disjunction(optional&& rhs) & { return has_value() ? *this : std::move(rhs); } - constexpr optional disjunction(optional&& rhs) const& { - return has_value() ? *this : std::move(rhs); - } + constexpr optional disjunction(optional&& rhs) const& { return has_value() ? *this : std::move(rhs); } TL_OPTIONAL_11_CONSTEXPR optional disjunction(optional&& rhs) && { return has_value() ? std::move(*this) : std::move(rhs); } #ifndef TL_OPTIONAL_NO_CONSTRR - constexpr optional disjunction(optional&& rhs) const&& { - return has_value() ? std::move(*this) : std::move(rhs); - } + constexpr optional disjunction(optional&& rhs) const&& { return has_value() ? std::move(*this) : std::move(rhs); } #endif /// Takes the value out of the optional, leaving it empty @@ -1070,47 +1007,44 @@ class optional : private detail::optional_move_assign_base, /// Constructs the stored value in-place using the given arguments. template - constexpr explicit optional( - detail::enable_if_t::value, in_place_t>, - Args&&... args) + constexpr explicit optional(detail::enable_if_t::value, in_place_t>, + Args&&... args) : base(in_place, std::forward(args)...) {} template TL_OPTIONAL_11_CONSTEXPR explicit optional( - detail::enable_if_t&, Args&&...>::value, - in_place_t>, + detail::enable_if_t&, Args&&...>::value, in_place_t>, std::initializer_list il, Args&&... args) { this->construct(il, std::forward(args)...); } /// Constructs the stored value with `u`. - template< - class U = T, - detail::enable_if_t::value>* = nullptr, - detail::enable_forward_value* = nullptr> + template::value>* = nullptr, + detail::enable_forward_value* = nullptr> constexpr optional(U&& u) : base(in_place, std::forward(u)) {} - template< - class U = T, - detail::enable_if_t::value>* = nullptr, - detail::enable_forward_value* = nullptr> + template::value>* = nullptr, + detail::enable_forward_value* = nullptr> constexpr explicit optional(U&& u) : base(in_place, std::forward(u)) {} /// Converting copy constructor. - template< - class U, - detail::enable_from_other* = nullptr, - detail::enable_if_t::value>* = nullptr> + template* = nullptr, + detail::enable_if_t::value>* = nullptr> optional(const optional& rhs) { if (rhs.has_value()) { this->construct(*rhs); } } - template* = nullptr, detail::enable_if_t::value>* = nullptr> + template* = nullptr, + detail::enable_if_t::value>* = nullptr> explicit optional(const optional& rhs) { if (rhs.has_value()) { this->construct(*rhs); @@ -1118,20 +1052,18 @@ class optional : private detail::optional_move_assign_base, } /// Converting move constructor. - template< - class U, - detail::enable_from_other* = nullptr, - detail::enable_if_t::value>* = nullptr> + template* = nullptr, + detail::enable_if_t::value>* = nullptr> optional(optional&& rhs) { if (rhs.has_value()) { this->construct(std::move(*rhs)); } } - template< - class U, - detail::enable_from_other* = nullptr, - detail::enable_if_t::value>* = nullptr> + template* = nullptr, + detail::enable_if_t::value>* = nullptr> explicit optional(optional&& rhs) { if (rhs.has_value()) { this->construct(std::move(*rhs)); @@ -1182,8 +1114,7 @@ class optional : private detail::optional_move_assign_base, /// /// Copies the value from `rhs` if there is one. Otherwise resets the stored /// value in `*this`. - template* = nullptr> + template* = nullptr> optional& operator=(const optional& rhs) { if (has_value()) { if (rhs.has_value()) { @@ -1226,8 +1157,7 @@ class optional : private detail::optional_move_assign_base, /// one. template T& emplace(Args&&... args) { - static_assert(std::is_constructible::value, - "T must be constructible with Args"); + static_assert(std::is_constructible::value, "T must be constructible with Args"); *this = nullopt; this->construct(std::forward(args)...); @@ -1235,10 +1165,9 @@ class optional : private detail::optional_move_assign_base, } template - detail::enable_if_t< - std::is_constructible&, Args&&...>::value, - T&> - emplace(std::initializer_list il, Args&&... args) { + detail::enable_if_t&, Args&&...>::value, T&> emplace( + std::initializer_list il, + Args&&... args) { *this = nullopt; this->construct(il, std::forward(args)...); return value(); @@ -1250,8 +1179,8 @@ class optional : private detail::optional_move_assign_base, /// If both have a value, the values are swapped. /// If one has a value, it is moved to the other and the movee is left /// valueless. - void - swap(optional& rhs) noexcept(std::is_nothrow_move_constructible::value&& detail::is_nothrow_swappable::value) { + void swap(optional& rhs) noexcept( + std::is_nothrow_move_constructible::value&& detail::is_nothrow_swappable::value) { using std::swap; if (has_value()) { if (rhs.has_value()) { @@ -1268,22 +1197,16 @@ class optional : private detail::optional_move_assign_base, } /// Returns a pointer to the stored value - constexpr const T* operator->() const { - return std::addressof(this->m_value); - } + constexpr const T* operator->() const { return std::addressof(this->m_value); } - TL_OPTIONAL_11_CONSTEXPR T* operator->() { - return std::addressof(this->m_value); - } + TL_OPTIONAL_11_CONSTEXPR T* operator->() { return std::addressof(this->m_value); } /// Returns the stored value TL_OPTIONAL_11_CONSTEXPR T& operator*() & { return this->m_value; } constexpr const T& operator*() const& { return this->m_value; } - TL_OPTIONAL_11_CONSTEXPR T&& operator*() && { - return std::move(this->m_value); - } + TL_OPTIONAL_11_CONSTEXPR T&& operator*() && { return std::move(this->m_value); } #ifndef TL_OPTIONAL_NO_CONSTRR constexpr const T&& operator*() const&& { return std::move(this->m_value); } @@ -1292,9 +1215,7 @@ class optional : private detail::optional_move_assign_base, /// Returns whether or not the optional has a value constexpr bool has_value() const noexcept { return this->m_has_value; } - constexpr explicit operator bool() const noexcept { - return this->m_has_value; - } + constexpr explicit operator bool() const noexcept { return this->m_has_value; } /// Returns the contained value if there is one, otherwise throws bad_optional_access TL_OPTIONAL_11_CONSTEXPR T& value() & { @@ -1347,33 +1268,27 @@ class optional : private detail::optional_move_assign_base, /// Compares two optional objects template -inline constexpr bool operator==(const optional& lhs, - const optional& rhs) { +inline constexpr bool operator==(const optional& lhs, const optional& rhs) { return lhs.has_value() == rhs.has_value() && (!lhs.has_value() || *lhs == *rhs); } template -inline constexpr bool operator!=(const optional& lhs, - const optional& rhs) { +inline constexpr bool operator!=(const optional& lhs, const optional& rhs) { return lhs.has_value() != rhs.has_value() || (lhs.has_value() && *lhs != *rhs); } template -inline constexpr bool operator<(const optional& lhs, - const optional& rhs) { +inline constexpr bool operator<(const optional& lhs, const optional& rhs) { return rhs.has_value() && (!lhs.has_value() || *lhs < *rhs); } template -inline constexpr bool operator>(const optional& lhs, - const optional& rhs) { +inline constexpr bool operator>(const optional& lhs, const optional& rhs) { return lhs.has_value() && (!rhs.has_value() || *lhs > *rhs); } template -inline constexpr bool operator<=(const optional& lhs, - const optional& rhs) { +inline constexpr bool operator<=(const optional& lhs, const optional& rhs) { return !lhs.has_value() || (rhs.has_value() && *lhs <= *rhs); } template -inline constexpr bool operator>=(const optional& lhs, - const optional& rhs) { +inline constexpr bool operator>=(const optional& lhs, const optional& rhs) { return !rhs.has_value() || (lhs.has_value() && *lhs >= *rhs); } @@ -1480,8 +1395,7 @@ inline constexpr bool operator>=(const U& lhs, const optional& rhs) { template::value>* = nullptr, detail::enable_if_t::value>* = nullptr> -void swap(optional& lhs, - optional& rhs) noexcept(noexcept(lhs.swap(rhs))) { +void swap(optional& lhs, optional& rhs) noexcept(noexcept(lhs.swap(rhs))) { return lhs.swap(rhs); } @@ -1489,7 +1403,9 @@ namespace detail { struct i_am_secret {}; } // namespace detail -template::value, detail::decay_t, T>> +template::value, detail::decay_t, T>> inline constexpr optional make_optional(U&& v) { return optional(std::forward(v)); } @@ -1499,8 +1415,7 @@ inline constexpr optional make_optional(Args&&... args) { return optional(in_place, std::forward(args)...); } template -inline constexpr optional make_optional(std::initializer_list il, - Args&&... args) { +inline constexpr optional make_optional(std::initializer_list il, Args&&... args) { return optional(in_place, il, std::forward(args)...); } @@ -1512,14 +1427,18 @@ optional(T) -> optional; /// \exclude namespace detail { #ifdef TL_OPTIONAL_CXX14 -template(), *std::declval())), detail::enable_if_t::value>* = nullptr> +template(), *std::declval())), + detail::enable_if_t::value>* = nullptr> constexpr auto optional_map_impl(Opt&& opt, F&& f) { - return opt.has_value() - ? detail::invoke(std::forward(f), *std::forward(opt)) - : optional(nullopt); + return opt.has_value() ? detail::invoke(std::forward(f), *std::forward(opt)) : optional(nullopt); } -template(), *std::declval())), detail::enable_if_t::value>* = nullptr> +template(), *std::declval())), + detail::enable_if_t::value>* = nullptr> auto optional_map_impl(Opt&& opt, F&& f) { if (opt.has_value()) { detail::invoke(std::forward(f), *std::forward(opt)); @@ -1529,15 +1448,19 @@ auto optional_map_impl(Opt&& opt, F&& f) { return optional(nullopt); } #else -template(), *std::declval())), detail::enable_if_t::value>* = nullptr> +template(), *std::declval())), + detail::enable_if_t::value>* = nullptr> constexpr auto optional_map_impl(Opt&& opt, F&& f) -> optional { - return opt.has_value() - ? detail::invoke(std::forward(f), *std::forward(opt)) - : optional(nullopt); + return opt.has_value() ? detail::invoke(std::forward(f), *std::forward(opt)) : optional(nullopt); } -template(), *std::declval())), detail::enable_if_t::value>* = nullptr> +template(), *std::declval())), + detail::enable_if_t::value>* = nullptr> auto optional_map_impl(Opt&& opt, F&& f) -> optional { if (opt.has_value()) { @@ -1559,98 +1482,84 @@ class optional { // types are not SFINAE-safe. This provides better support for things like // generic lambdas. C.f. // http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2017/p0826r0.html -#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) && !defined(TL_OPTIONAL_GCC55) +#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) \ + && !defined(TL_OPTIONAL_GCC55) /// Carries out some operation which returns an optional on the stored /// object if there is one. template TL_OPTIONAL_11_CONSTEXPR auto and_then(F&& f) & { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } template TL_OPTIONAL_11_CONSTEXPR auto and_then(F&& f) && { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } template constexpr auto and_then(F&& f) const& { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } -# ifndef TL_OPTIONAL_NO_CONSTRR +#ifndef TL_OPTIONAL_NO_CONSTRR template constexpr auto and_then(F&& f) const&& { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } -# endif +#endif #else /// Carries out some operation which returns an optional on the stored /// object if there is one. template TL_OPTIONAL_11_CONSTEXPR detail::invoke_result_t and_then(F&& f) & { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } template TL_OPTIONAL_11_CONSTEXPR detail::invoke_result_t and_then(F&& f) && { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } template constexpr detail::invoke_result_t and_then(F&& f) const& { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } -# ifndef TL_OPTIONAL_NO_CONSTRR +#ifndef TL_OPTIONAL_NO_CONSTRR template constexpr detail::invoke_result_t and_then(F&& f) const&& { using result = detail::invoke_result_t; - static_assert(detail::is_optional::value, - "F must return an optional"); + static_assert(detail::is_optional::value, "F must return an optional"); - return has_value() ? detail::invoke(std::forward(f), **this) - : result(nullopt); + return has_value() ? detail::invoke(std::forward(f), **this) : result(nullopt); } -# endif +#endif #endif -#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) && !defined(TL_OPTIONAL_GCC55) +#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) \ + && !defined(TL_OPTIONAL_GCC55) /// Carries out some operation on the stored object if there is one. template TL_OPTIONAL_11_CONSTEXPR auto map(F&& f) & { @@ -1674,37 +1583,34 @@ class optional { #else /// Carries out some operation on the stored object if there is one. template - TL_OPTIONAL_11_CONSTEXPR decltype(detail::optional_map_impl(std::declval(), - std::declval())) - map(F&& f) & { + TL_OPTIONAL_11_CONSTEXPR decltype(detail::optional_map_impl(std::declval(), std::declval())) map( + F&& f) & { return detail::optional_map_impl(*this, std::forward(f)); } template - TL_OPTIONAL_11_CONSTEXPR decltype(detail::optional_map_impl(std::declval(), - std::declval())) - map(F&& f) && { + TL_OPTIONAL_11_CONSTEXPR decltype(detail::optional_map_impl(std::declval(), std::declval())) map( + F&& f) && { return detail::optional_map_impl(std::move(*this), std::forward(f)); } template - constexpr decltype(detail::optional_map_impl(std::declval(), - std::declval())) - map(F&& f) const& { + constexpr decltype(detail::optional_map_impl(std::declval(), std::declval())) map( + F&& f) const& { return detail::optional_map_impl(*this, std::forward(f)); } -# ifndef TL_OPTIONAL_NO_CONSTRR +#ifndef TL_OPTIONAL_NO_CONSTRR template - constexpr decltype(detail::optional_map_impl(std::declval(), - std::declval())) - map(F&& f) const&& { + constexpr decltype(detail::optional_map_impl(std::declval(), std::declval())) map( + F&& f) const&& { return detail::optional_map_impl(std::move(*this), std::forward(f)); } -# endif +#endif #endif -#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) && !defined(TL_OPTIONAL_GCC55) +#if defined(TL_OPTIONAL_CXX14) && !defined(TL_OPTIONAL_GCC49) && !defined(TL_OPTIONAL_GCC54) \ + && !defined(TL_OPTIONAL_GCC55) /// Carries out some operation on the stored object if there is one. template TL_OPTIONAL_11_CONSTEXPR auto transform(F&& f) & { @@ -1728,8 +1634,7 @@ class optional { #else /// Carries out some operation on the stored object if there is one. template - TL_OPTIONAL_11_CONSTEXPR decltype(detail::optional_map_impl(std::declval(), - std::declval())) + TL_OPTIONAL_11_CONSTEXPR decltype(detail::optional_map_impl(std::declval(), std::declval())) transform(F&& f) & { return detail::optional_map_impl(*this, std::forward(f)); } @@ -1737,27 +1642,24 @@ class optional { /// \group map /// \synopsis template auto transform(F &&f) &&; template - TL_OPTIONAL_11_CONSTEXPR decltype(detail::optional_map_impl(std::declval(), - std::declval())) + TL_OPTIONAL_11_CONSTEXPR decltype(detail::optional_map_impl(std::declval(), std::declval())) transform(F&& f) && { return detail::optional_map_impl(std::move(*this), std::forward(f)); } template - constexpr decltype(detail::optional_map_impl(std::declval(), - std::declval())) - transform(F&& f) const& { + constexpr decltype(detail::optional_map_impl(std::declval(), std::declval())) transform( + F&& f) const& { return detail::optional_map_impl(*this, std::forward(f)); } -# ifndef TL_OPTIONAL_NO_CONSTRR +#ifndef TL_OPTIONAL_NO_CONSTRR template - constexpr decltype(detail::optional_map_impl(std::declval(), - std::declval())) - transform(F&& f) const&& { + constexpr decltype(detail::optional_map_impl(std::declval(), std::declval())) transform( + F&& f) const&& { return detail::optional_map_impl(std::move(*this), std::forward(f)); } -# endif +#endif #endif /// Calls `f` if the optional is empty @@ -1822,27 +1724,23 @@ class optional { /// Maps the stored value with `f` if there is one, otherwise returns `u` template U map_or(F&& f, U&& u) & { - return has_value() ? detail::invoke(std::forward(f), **this) - : std::forward(u); + return has_value() ? detail::invoke(std::forward(f), **this) : std::forward(u); } template U map_or(F&& f, U&& u) && { - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : std::forward(u); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : std::forward(u); } template U map_or(F&& f, U&& u) const& { - return has_value() ? detail::invoke(std::forward(f), **this) - : std::forward(u); + return has_value() ? detail::invoke(std::forward(f), **this) : std::forward(u); } #ifndef TL_OPTIONAL_NO_CONSTRR template U map_or(F&& f, U&& u) const&& { - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : std::forward(u); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : std::forward(u); } #endif @@ -1850,27 +1748,23 @@ class optional { /// `u` and returns the result. template detail::invoke_result_t map_or_else(F&& f, U&& u) & { - return has_value() ? detail::invoke(std::forward(f), **this) - : std::forward(u)(); + return has_value() ? detail::invoke(std::forward(f), **this) : std::forward(u)(); } template detail::invoke_result_t map_or_else(F&& f, U&& u) && { - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : std::forward(u)(); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : std::forward(u)(); } template detail::invoke_result_t map_or_else(F&& f, U&& u) const& { - return has_value() ? detail::invoke(std::forward(f), **this) - : std::forward(u)(); + return has_value() ? detail::invoke(std::forward(f), **this) : std::forward(u)(); } #ifndef TL_OPTIONAL_NO_CONSTRR template detail::invoke_result_t map_or_else(F&& f, U&& u) const&& { - return has_value() ? detail::invoke(std::forward(f), std::move(**this)) - : std::forward(u)(); + return has_value() ? detail::invoke(std::forward(f), std::move(**this)) : std::forward(u)(); } #endif @@ -1882,40 +1776,28 @@ class optional { } /// Returns `rhs` if `*this` is empty, otherwise the current value. - TL_OPTIONAL_11_CONSTEXPR optional disjunction(const optional& rhs) & { - return has_value() ? *this : rhs; - } + TL_OPTIONAL_11_CONSTEXPR optional disjunction(const optional& rhs) & { return has_value() ? *this : rhs; } - constexpr optional disjunction(const optional& rhs) const& { - return has_value() ? *this : rhs; - } + constexpr optional disjunction(const optional& rhs) const& { return has_value() ? *this : rhs; } TL_OPTIONAL_11_CONSTEXPR optional disjunction(const optional& rhs) && { return has_value() ? std::move(*this) : rhs; } #ifndef TL_OPTIONAL_NO_CONSTRR - constexpr optional disjunction(const optional& rhs) const&& { - return has_value() ? std::move(*this) : rhs; - } + constexpr optional disjunction(const optional& rhs) const&& { return has_value() ? std::move(*this) : rhs; } #endif - TL_OPTIONAL_11_CONSTEXPR optional disjunction(optional&& rhs) & { - return has_value() ? *this : std::move(rhs); - } + TL_OPTIONAL_11_CONSTEXPR optional disjunction(optional&& rhs) & { return has_value() ? *this : std::move(rhs); } - constexpr optional disjunction(optional&& rhs) const& { - return has_value() ? *this : std::move(rhs); - } + constexpr optional disjunction(optional&& rhs) const& { return has_value() ? *this : std::move(rhs); } TL_OPTIONAL_11_CONSTEXPR optional disjunction(optional&& rhs) && { return has_value() ? std::move(*this) : std::move(rhs); } #ifndef TL_OPTIONAL_NO_CONSTRR - constexpr optional disjunction(optional&& rhs) const&& { - return has_value() ? std::move(*this) : std::move(rhs); - } + constexpr optional disjunction(optional&& rhs) const&& { return has_value() ? std::move(*this) : std::move(rhs); } #endif /// Takes the value out of the optional, leaving it empty @@ -1947,8 +1829,7 @@ class optional { TL_OPTIONAL_11_CONSTEXPR optional(optional&& rhs) = default; /// Constructs the stored value with `u`. - template>::value>* = nullptr> + template>::value>* = nullptr> constexpr optional(U&& u) noexcept : m_value(std::addressof(u)) { static_assert(std::is_lvalue_reference::value, "U must be an lvalue"); @@ -1976,8 +1857,7 @@ class optional { optional& operator=(const optional& rhs) = default; /// Rebinds this optional to `u`. - template>::value>* = nullptr> + template>::value>* = nullptr> optional& operator=(U&& u) { static_assert(std::is_lvalue_reference::value, "U must be an lvalue"); m_value = std::addressof(u); @@ -1995,8 +1875,7 @@ class optional { } /// Rebinds this optional to `u`. - template>::value>* = nullptr> + template>::value>* = nullptr> optional& emplace(U&& u) noexcept { return *this = std::forward(u); } @@ -2015,9 +1894,7 @@ class optional { constexpr bool has_value() const noexcept { return m_value != nullptr; } - constexpr explicit operator bool() const noexcept { - return m_value != nullptr; - } + constexpr explicit operator bool() const noexcept { return m_value != nullptr; } /// Returns the contained value if there is one, otherwise throws bad_optional_access TL_OPTIONAL_11_CONSTEXPR T& value() { diff --git a/libs/libvtrutil/src/vpr_error.cpp b/libs/libvtrutil/src/vpr_error.cpp index 14eb464b5ef..e03816e0fc5 100644 --- a/libs/libvtrutil/src/vpr_error.cpp +++ b/libs/libvtrutil/src/vpr_error.cpp @@ -17,15 +17,9 @@ static std::unordered_set functions_to_demote; * anything but throw an exception which will be caught * main.c. */ -void map_error_activation_status(std::string function_name) { - functions_to_demote.insert(function_name); -} +void map_error_activation_status(std::string function_name) { functions_to_demote.insert(function_name); } -void vpr_throw(enum e_vpr_error type, - const char* psz_file_name, - unsigned int line_num, - const char* psz_message, - ...) { +void vpr_throw(enum e_vpr_error type, const char* psz_file_name, unsigned int line_num, const char* psz_message, ...) { // Make a variable argument list va_list va_args; @@ -52,10 +46,7 @@ void vvpr_throw(enum e_vpr_error type, vpr_throw_msg(type, psz_file_name, line_num, msg); } -void vpr_throw_msg(enum e_vpr_error type, - const char* psz_file_name, - unsigned int line_num, - std::string msg) { +void vpr_throw_msg(enum e_vpr_error type, const char* psz_file_name, unsigned int line_num, std::string msg) { throw VprError(type, msg, psz_file_name, line_num); } diff --git a/libs/libvtrutil/src/vpr_error.h b/libs/libvtrutil/src/vpr_error.h index 16ba3891b12..d770d43ab3a 100644 --- a/libs/libvtrutil/src/vpr_error.h +++ b/libs/libvtrutil/src/vpr_error.h @@ -42,10 +42,7 @@ typedef enum e_vpr_error t_vpr_error_type; class VprError : public vtr::VtrError { public: - VprError(t_vpr_error_type err_type, - std::string msg = "", - std::string file = "", - size_t linenum = -1) + VprError(t_vpr_error_type err_type, std::string msg = "", std::string file = "", size_t linenum = -1) : VtrError(msg, file, linenum) , type_(err_type) {} @@ -65,11 +62,28 @@ void map_error_activation_status(std::string function_name); //Note that we mark these functions with the C++11 attribute 'noreturn' //as they will throw exceptions and not return normally. This can help //reduce false-positive compiler warnings -[[noreturn]] void vpr_throw(enum e_vpr_error type, const char* psz_file_name, unsigned int line_num, const char* psz_message, ...); -[[noreturn]] void vvpr_throw(enum e_vpr_error type, const char* psz_file_name, unsigned int line_num, const char* psz_message, va_list args); -[[noreturn]] void vpr_throw_msg(enum e_vpr_error type, const char* psz_file_name, unsigned int line_num, std::string msg); - -void vpr_throw_opt(enum e_vpr_error type, const char* psz_func_pretty_name, const char* psz_func_name, const char* psz_file_name, unsigned int line_num, const char* psz_message, ...); +[[noreturn]] void vpr_throw(enum e_vpr_error type, + const char* psz_file_name, + unsigned int line_num, + const char* psz_message, + ...); +[[noreturn]] void vvpr_throw(enum e_vpr_error type, + const char* psz_file_name, + unsigned int line_num, + const char* psz_message, + va_list args); +[[noreturn]] void vpr_throw_msg(enum e_vpr_error type, + const char* psz_file_name, + unsigned int line_num, + std::string msg); + +void vpr_throw_opt(enum e_vpr_error type, + const char* psz_func_pretty_name, + const char* psz_func_name, + const char* psz_file_name, + unsigned int line_num, + const char* psz_message, + ...); //Figure out what macro to use to get the name of the current function // We default to __func__ which is defined in C99 @@ -78,12 +92,12 @@ void vpr_throw_opt(enum e_vpr_error type, const char* psz_func_pretty_name, cons // information, so we prefer to use it if possible #define VPR_THROW_FUNCTION __func__ #ifdef __GNUC__ -# ifdef __GNUC_MINOR__ -# if __GNUC__ >= 2 && __GNUC_MINOR__ > 6 -# undef VPR_THROW_FUNCTION -# define VPR_THROW_FUNCTION __PRETTY_FUNCTION__ -# endif -# endif +#ifdef __GNUC_MINOR__ +#if __GNUC__ >= 2 && __GNUC_MINOR__ > 6 +#undef VPR_THROW_FUNCTION +#define VPR_THROW_FUNCTION __PRETTY_FUNCTION__ +#endif +#endif #endif /* diff --git a/libs/libvtrutil/src/vtr_array_view.h b/libs/libvtrutil/src/vtr_array_view.h index 0bb48f65eec..f7862bc4e68 100644 --- a/libs/libvtrutil/src/vtr_array_view.h +++ b/libs/libvtrutil/src/vtr_array_view.h @@ -32,14 +32,10 @@ class array_view { } ///@brief [] operator - constexpr T& operator[](size_t pos) { - return data_[pos]; - } + constexpr T& operator[](size_t pos) { return data_[pos]; } ///@brief constant [] operator - constexpr const T& operator[](size_t pos) const { - return data_[pos]; - } + constexpr const T& operator[](size_t pos) const { return data_[pos]; } ///@brief at() operator T& at(size_t pos) { @@ -60,79 +56,49 @@ class array_view { } ///@brief get the first element of the array - constexpr T& front() { - return data_[0]; - } + constexpr T& front() { return data_[0]; } ///@brief get the first element of the array (can't update it) - constexpr const T& front() const { - return data_[0]; - } + constexpr const T& front() const { return data_[0]; } ///@brief get the last element of the array - constexpr T& back() { - return data_[size() - 1]; - } + constexpr T& back() { return data_[size() - 1]; } ///@brief get the last element of the array (can't update it) - constexpr const T& back() const { - return data_[size() - 1]; - } + constexpr const T& back() const { return data_[size() - 1]; } ///@brief return the underlying pointer - constexpr T* data() { - return data_; - } + constexpr T* data() { return data_; } ///@brief return the underlying pointer (constant pointer) - constexpr const T* data() const { - return data_; - } + constexpr const T* data() const { return data_; } ///@brief return thr array size - constexpr size_t size() const noexcept { - return size_; - } + constexpr size_t size() const noexcept { return size_; } ///@brief return the array size - constexpr size_t length() const noexcept { - return size_; - } + constexpr size_t length() const noexcept { return size_; } ///@brief check if the array is empty - constexpr bool empty() const noexcept { - return size_ != 0; - } + constexpr bool empty() const noexcept { return size_ != 0; } ///@brief return a pointer to the first element of the array - constexpr T* begin() noexcept { - return data_; - } + constexpr T* begin() noexcept { return data_; } ///@brief return a constant pointer to the first element of the array - constexpr const T* begin() const noexcept { - return data_; - } + constexpr const T* begin() const noexcept { return data_; } ///@brief return a constant pointer to the first element of the array - constexpr const T* cbegin() const noexcept { - return data_; - } + constexpr const T* cbegin() const noexcept { return data_; } ///@brief return a pointer to the last element of the array - constexpr T* end() noexcept { - return data_ + size_; - } + constexpr T* end() noexcept { return data_ + size_; } ///@brief return a constant pointer to the last element of the array - constexpr const T* end() const noexcept { - return data_ + size_; - } + constexpr const T* end() const noexcept { return data_ + size_; } ///@brief return a constant pointer to the last element of the array - constexpr const T* cend() const noexcept { - return data_ + size_; - } + constexpr const T* cend() const noexcept { return data_ + size_; } private: T* data_; @@ -183,9 +149,7 @@ class array_view_id : private array_view { } ///@brief Returns a range containing the keys - key_range keys() const { - return vtr::make_range(key_begin(), key_end()); - } + key_range keys() const { return vtr::make_range(key_begin(), key_end()); } using storage::begin; using storage::cbegin; @@ -257,9 +221,10 @@ class array_view_id : private array_view { }; template -array_view_id make_const_array_view_id(Container& container) { - return array_view_id( - container.data(), container.size()); +array_view_id make_const_array_view_id( + Container& container) { + return array_view_id(container.data(), + container.size()); } } // namespace vtr diff --git a/libs/libvtrutil/src/vtr_assert.h b/libs/libvtrutil/src/vtr_assert.h index ba63a4bb573..667efa89189 100644 --- a/libs/libvtrutil/src/vtr_assert.h +++ b/libs/libvtrutil/src/vtr_assert.h @@ -29,57 +29,57 @@ // Set a default assertion level if none is specified #ifndef VTR_ASSERT_LEVEL -# define VTR_ASSERT_LEVEL 2 +#define VTR_ASSERT_LEVEL 2 #endif // Enable the assertions based on the specified level #if VTR_ASSERT_LEVEL >= 4 -# define VTR_ASSERT_DEBUG_ENABLED +#define VTR_ASSERT_DEBUG_ENABLED #endif #if VTR_ASSERT_LEVEL >= 3 -# define VTR_ASSERT_SAFE_ENABLED +#define VTR_ASSERT_SAFE_ENABLED #endif #if VTR_ASSERT_LEVEL >= 2 -# define VTR_ASSERT_ENABLED +#define VTR_ASSERT_ENABLED #endif #if VTR_ASSERT_LEVEL >= 1 -# define VTR_ASSERT_OPT_ENABLED +#define VTR_ASSERT_OPT_ENABLED #endif // Define the user assertion macros #ifdef VTR_ASSERT_DEBUG_ENABLED -# define VTR_ASSERT_DEBUG(expr) VTR_ASSERT_IMPL(expr, nullptr) -# define VTR_ASSERT_DEBUG_MSG(expr, msg) VTR_ASSERT_IMPL(expr, msg) +#define VTR_ASSERT_DEBUG(expr) VTR_ASSERT_IMPL(expr, nullptr) +#define VTR_ASSERT_DEBUG_MSG(expr, msg) VTR_ASSERT_IMPL(expr, msg) #else -# define VTR_ASSERT_DEBUG(expr) VTR_ASSERT_IMPL_NOP(expr, nullptr) -# define VTR_ASSERT_DEBUG_MSG(expr, msg) VTR_ASSERT_IMPL_NOP(expr, msg) +#define VTR_ASSERT_DEBUG(expr) VTR_ASSERT_IMPL_NOP(expr, nullptr) +#define VTR_ASSERT_DEBUG_MSG(expr, msg) VTR_ASSERT_IMPL_NOP(expr, msg) #endif #ifdef VTR_ASSERT_SAFE_ENABLED -# define VTR_ASSERT_SAFE(expr) VTR_ASSERT_IMPL(expr, nullptr) -# define VTR_ASSERT_SAFE_MSG(expr, msg) VTR_ASSERT_IMPL(expr, msg) +#define VTR_ASSERT_SAFE(expr) VTR_ASSERT_IMPL(expr, nullptr) +#define VTR_ASSERT_SAFE_MSG(expr, msg) VTR_ASSERT_IMPL(expr, msg) #else -# define VTR_ASSERT_SAFE(expr) VTR_ASSERT_IMPL_NOP(expr, nullptr) -# define VTR_ASSERT_SAFE_MSG(expr, msg) VTR_ASSERT_IMPL_NOP(expr, msg) +#define VTR_ASSERT_SAFE(expr) VTR_ASSERT_IMPL_NOP(expr, nullptr) +#define VTR_ASSERT_SAFE_MSG(expr, msg) VTR_ASSERT_IMPL_NOP(expr, msg) #endif #ifdef VTR_ASSERT_ENABLED -# define VTR_ASSERT(expr) VTR_ASSERT_IMPL(expr, nullptr) -# define VTR_ASSERT_MSG(expr, msg) VTR_ASSERT_IMPL(expr, msg) +#define VTR_ASSERT(expr) VTR_ASSERT_IMPL(expr, nullptr) +#define VTR_ASSERT_MSG(expr, msg) VTR_ASSERT_IMPL(expr, msg) #else -# define VTR_ASSERT(expr) VTR_ASSERT_IMPL_NOP(expr, nullptr) -# define VTR_ASSERT_MSG(expr, msg) VTR_ASSERT_IMPL_NOP(expr, msg) +#define VTR_ASSERT(expr) VTR_ASSERT_IMPL_NOP(expr, nullptr) +#define VTR_ASSERT_MSG(expr, msg) VTR_ASSERT_IMPL_NOP(expr, msg) #endif #ifdef VTR_ASSERT_OPT_ENABLED -# define VTR_ASSERT_OPT(expr) VTR_ASSERT_IMPL(expr, nullptr) -# define VTR_ASSERT_OPT_MSG(expr, msg) VTR_ASSERT_IMPL(expr, msg) +#define VTR_ASSERT_OPT(expr) VTR_ASSERT_IMPL(expr, nullptr) +#define VTR_ASSERT_OPT_MSG(expr, msg) VTR_ASSERT_IMPL(expr, msg) #else -# define VTR_ASSERT_OPT(expr) VTR_ASSERT_IMPL_NOP(expr, nullptr) -# define VTR_ASSERT_OPT_MSG(expr, msg) VTR_ASSERT_IMPL_NOP(expr, msg) +#define VTR_ASSERT_OPT(expr) VTR_ASSERT_IMPL_NOP(expr, nullptr) +#define VTR_ASSERT_OPT_MSG(expr, msg) VTR_ASSERT_IMPL_NOP(expr, msg) #endif /** @@ -124,12 +124,12 @@ */ #define VTR_ASSERT_FUNCTION __func__ #ifdef __GNUC__ -# ifdef __GNUC_MINOR__ -# if __GNUC__ >= 2 && __GNUC_MINOR__ > 6 -# undef VTR_ASSERT_FUNCTION -# define VTR_ASSERT_FUNCTION __PRETTY_FUNCTION__ -# endif -# endif +#ifdef __GNUC_MINOR__ +#if __GNUC__ >= 2 && __GNUC_MINOR__ > 6 +#undef VTR_ASSERT_FUNCTION +#define VTR_ASSERT_FUNCTION __PRETTY_FUNCTION__ +#endif +#endif #endif namespace vtr { @@ -144,7 +144,11 @@ namespace assert { * dead-code or potential null pointer dereferences * which are gaurded against by assertions. */ -[[noreturn]] void handle_assert(const char* expr, const char* file, unsigned int line, const char* function, const char* msg); +[[noreturn]] void handle_assert(const char* expr, + const char* file, + unsigned int line, + const char* function, + const char* msg); } // namespace assert } // namespace vtr diff --git a/libs/libvtrutil/src/vtr_bimap.h b/libs/libvtrutil/src/vtr_bimap.h index 28e11772d89..bd7f150f70c 100644 --- a/libs/libvtrutil/src/vtr_bimap.h +++ b/libs/libvtrutil/src/vtr_bimap.h @@ -52,14 +52,10 @@ class bimap { inverse_iterator inverse_end() const { return inverse_map_.end(); } ///@brief Return an iterator to the key-value pair matching key, or end() if not found - iterator find(const K key) const { - return map_.find(key); - } + iterator find(const K key) const { return map_.find(key); } ///@brief Return an iterator to the value-key pair matching value, or inverse_end() if not found - inverse_iterator find(const V value) const { - return inverse_map_.find(value); - } + inverse_iterator find(const V value) const { return inverse_map_.find(value); } ///@brief Return an immutable reference to the value matching key (throw an exception if key is not found) const V& operator[](const K key) const { diff --git a/libs/libvtrutil/src/vtr_color_map.cpp b/libs/libvtrutil/src/vtr_color_map.cpp index 7a100e25eca..e553013d352 100644 --- a/libs/libvtrutil/src/vtr_color_map.cpp +++ b/libs/libvtrutil/src/vtr_color_map.cpp @@ -6,781 +6,355 @@ namespace vtr { //Inferno data from MatPlotLib -static std::vector> inferno_data = { - {0.001462f, 0.000466f, 0.013866f}, - {0.002267f, 0.001270f, 0.018570f}, - {0.003299f, 0.002249f, 0.024239f}, - {0.004547f, 0.003392f, 0.030909f}, - {0.006006f, 0.004692f, 0.038558f}, - {0.007676f, 0.006136f, 0.046836f}, - {0.009561f, 0.007713f, 0.055143f}, - {0.011663f, 0.009417f, 0.063460f}, - {0.013995f, 0.011225f, 0.071862f}, - {0.016561f, 0.013136f, 0.080282f}, - {0.019373f, 0.015133f, 0.088767f}, - {0.022447f, 0.017199f, 0.097327f}, - {0.025793f, 0.019331f, 0.105930f}, - {0.029432f, 0.021503f, 0.114621f}, - {0.033385f, 0.023702f, 0.123397f}, - {0.037668f, 0.025921f, 0.132232f}, - {0.042253f, 0.028139f, 0.141141f}, - {0.046915f, 0.030324f, 0.150164f}, - {0.051644f, 0.032474f, 0.159254f}, - {0.056449f, 0.034569f, 0.168414f}, - {0.061340f, 0.036590f, 0.177642f}, - {0.066331f, 0.038504f, 0.186962f}, - {0.071429f, 0.040294f, 0.196354f}, - {0.076637f, 0.041905f, 0.205799f}, - {0.081962f, 0.043328f, 0.215289f}, - {0.087411f, 0.044556f, 0.224813f}, - {0.092990f, 0.045583f, 0.234358f}, - {0.098702f, 0.046402f, 0.243904f}, - {0.104551f, 0.047008f, 0.253430f}, - {0.110536f, 0.047399f, 0.262912f}, - {0.116656f, 0.047574f, 0.272321f}, - {0.122908f, 0.047536f, 0.281624f}, - {0.129285f, 0.047293f, 0.290788f}, - {0.135778f, 0.046856f, 0.299776f}, - {0.142378f, 0.046242f, 0.308553f}, - {0.149073f, 0.045468f, 0.317085f}, - {0.155850f, 0.044559f, 0.325338f}, - {0.162689f, 0.043554f, 0.333277f}, - {0.169575f, 0.042489f, 0.340874f}, - {0.176493f, 0.041402f, 0.348111f}, - {0.183429f, 0.040329f, 0.354971f}, - {0.190367f, 0.039309f, 0.361447f}, - {0.197297f, 0.038400f, 0.367535f}, - {0.204209f, 0.037632f, 0.373238f}, - {0.211095f, 0.037030f, 0.378563f}, - {0.217949f, 0.036615f, 0.383522f}, - {0.224763f, 0.036405f, 0.388129f}, - {0.231538f, 0.036405f, 0.392400f}, - {0.238273f, 0.036621f, 0.396353f}, - {0.244967f, 0.037055f, 0.400007f}, - {0.251620f, 0.037705f, 0.403378f}, - {0.258234f, 0.038571f, 0.406485f}, - {0.264810f, 0.039647f, 0.409345f}, - {0.271347f, 0.040922f, 0.411976f}, - {0.277850f, 0.042353f, 0.414392f}, - {0.284321f, 0.043933f, 0.416608f}, - {0.290763f, 0.045644f, 0.418637f}, - {0.297178f, 0.047470f, 0.420491f}, - {0.303568f, 0.049396f, 0.422182f}, - {0.309935f, 0.051407f, 0.423721f}, - {0.316282f, 0.053490f, 0.425116f}, - {0.322610f, 0.055634f, 0.426377f}, - {0.328921f, 0.057827f, 0.427511f}, - {0.335217f, 0.060060f, 0.428524f}, - {0.341500f, 0.062325f, 0.429425f}, - {0.347771f, 0.064616f, 0.430217f}, - {0.354032f, 0.066925f, 0.430906f}, - {0.360284f, 0.069247f, 0.431497f}, - {0.366529f, 0.071579f, 0.431994f}, - {0.372768f, 0.073915f, 0.432400f}, - {0.379001f, 0.076253f, 0.432719f}, - {0.385228f, 0.078591f, 0.432955f}, - {0.391453f, 0.080927f, 0.433109f}, - {0.397674f, 0.083257f, 0.433183f}, - {0.403894f, 0.085580f, 0.433179f}, - {0.410113f, 0.087896f, 0.433098f}, - {0.416331f, 0.090203f, 0.432943f}, - {0.422549f, 0.092501f, 0.432714f}, - {0.428768f, 0.094790f, 0.432412f}, - {0.434987f, 0.097069f, 0.432039f}, - {0.441207f, 0.099338f, 0.431594f}, - {0.447428f, 0.101597f, 0.431080f}, - {0.453651f, 0.103848f, 0.430498f}, - {0.459875f, 0.106089f, 0.429846f}, - {0.466100f, 0.108322f, 0.429125f}, - {0.472328f, 0.110547f, 0.428334f}, - {0.478558f, 0.112764f, 0.427475f}, - {0.484789f, 0.114974f, 0.426548f}, - {0.491022f, 0.117179f, 0.425552f}, - {0.497257f, 0.119379f, 0.424488f}, - {0.503493f, 0.121575f, 0.423356f}, - {0.509730f, 0.123769f, 0.422156f}, - {0.515967f, 0.125960f, 0.420887f}, - {0.522206f, 0.128150f, 0.419549f}, - {0.528444f, 0.130341f, 0.418142f}, - {0.534683f, 0.132534f, 0.416667f}, - {0.540920f, 0.134729f, 0.415123f}, - {0.547157f, 0.136929f, 0.413511f}, - {0.553392f, 0.139134f, 0.411829f}, - {0.559624f, 0.141346f, 0.410078f}, - {0.565854f, 0.143567f, 0.408258f}, - {0.572081f, 0.145797f, 0.406369f}, - {0.578304f, 0.148039f, 0.404411f}, - {0.584521f, 0.150294f, 0.402385f}, - {0.590734f, 0.152563f, 0.400290f}, - {0.596940f, 0.154848f, 0.398125f}, - {0.603139f, 0.157151f, 0.395891f}, - {0.609330f, 0.159474f, 0.393589f}, - {0.615513f, 0.161817f, 0.391219f}, - {0.621685f, 0.164184f, 0.388781f}, - {0.627847f, 0.166575f, 0.386276f}, - {0.633998f, 0.168992f, 0.383704f}, - {0.640135f, 0.171438f, 0.381065f}, - {0.646260f, 0.173914f, 0.378359f}, - {0.652369f, 0.176421f, 0.375586f}, - {0.658463f, 0.178962f, 0.372748f}, - {0.664540f, 0.181539f, 0.369846f}, - {0.670599f, 0.184153f, 0.366879f}, - {0.676638f, 0.186807f, 0.363849f}, - {0.682656f, 0.189501f, 0.360757f}, - {0.688653f, 0.192239f, 0.357603f}, - {0.694627f, 0.195021f, 0.354388f}, - {0.700576f, 0.197851f, 0.351113f}, - {0.706500f, 0.200728f, 0.347777f}, - {0.712396f, 0.203656f, 0.344383f}, - {0.718264f, 0.206636f, 0.340931f}, - {0.724103f, 0.209670f, 0.337424f}, - {0.729909f, 0.212759f, 0.333861f}, - {0.735683f, 0.215906f, 0.330245f}, - {0.741423f, 0.219112f, 0.326576f}, - {0.747127f, 0.222378f, 0.322856f}, - {0.752794f, 0.225706f, 0.319085f}, - {0.758422f, 0.229097f, 0.315266f}, - {0.764010f, 0.232554f, 0.311399f}, - {0.769556f, 0.236077f, 0.307485f}, - {0.775059f, 0.239667f, 0.303526f}, - {0.780517f, 0.243327f, 0.299523f}, - {0.785929f, 0.247056f, 0.295477f}, - {0.791293f, 0.250856f, 0.291390f}, - {0.796607f, 0.254728f, 0.287264f}, - {0.801871f, 0.258674f, 0.283099f}, - {0.807082f, 0.262692f, 0.278898f}, - {0.812239f, 0.266786f, 0.274661f}, - {0.817341f, 0.270954f, 0.270390f}, - {0.822386f, 0.275197f, 0.266085f}, - {0.827372f, 0.279517f, 0.261750f}, - {0.832299f, 0.283913f, 0.257383f}, - {0.837165f, 0.288385f, 0.252988f}, - {0.841969f, 0.292933f, 0.248564f}, - {0.846709f, 0.297559f, 0.244113f}, - {0.851384f, 0.302260f, 0.239636f}, - {0.855992f, 0.307038f, 0.235133f}, - {0.860533f, 0.311892f, 0.230606f}, - {0.865006f, 0.316822f, 0.226055f}, - {0.869409f, 0.321827f, 0.221482f}, - {0.873741f, 0.326906f, 0.216886f}, - {0.878001f, 0.332060f, 0.212268f}, - {0.882188f, 0.337287f, 0.207628f}, - {0.886302f, 0.342586f, 0.202968f}, - {0.890341f, 0.347957f, 0.198286f}, - {0.894305f, 0.353399f, 0.193584f}, - {0.898192f, 0.358911f, 0.188860f}, - {0.902003f, 0.364492f, 0.184116f}, - {0.905735f, 0.370140f, 0.179350f}, - {0.909390f, 0.375856f, 0.174563f}, - {0.912966f, 0.381636f, 0.169755f}, - {0.916462f, 0.387481f, 0.164924f}, - {0.919879f, 0.393389f, 0.160070f}, - {0.923215f, 0.399359f, 0.155193f}, - {0.926470f, 0.405389f, 0.150292f}, - {0.929644f, 0.411479f, 0.145367f}, - {0.932737f, 0.417627f, 0.140417f}, - {0.935747f, 0.423831f, 0.135440f}, - {0.938675f, 0.430091f, 0.130438f}, - {0.941521f, 0.436405f, 0.125409f}, - {0.944285f, 0.442772f, 0.120354f}, - {0.946965f, 0.449191f, 0.115272f}, - {0.949562f, 0.455660f, 0.110164f}, - {0.952075f, 0.462178f, 0.105031f}, - {0.954506f, 0.468744f, 0.099874f}, - {0.956852f, 0.475356f, 0.094695f}, - {0.959114f, 0.482014f, 0.089499f}, - {0.961293f, 0.488716f, 0.084289f}, - {0.963387f, 0.495462f, 0.079073f}, - {0.965397f, 0.502249f, 0.073859f}, - {0.967322f, 0.509078f, 0.068659f}, - {0.969163f, 0.515946f, 0.063488f}, - {0.970919f, 0.522853f, 0.058367f}, - {0.972590f, 0.529798f, 0.053324f}, - {0.974176f, 0.536780f, 0.048392f}, - {0.975677f, 0.543798f, 0.043618f}, - {0.977092f, 0.550850f, 0.039050f}, - {0.978422f, 0.557937f, 0.034931f}, - {0.979666f, 0.565057f, 0.031409f}, - {0.980824f, 0.572209f, 0.028508f}, - {0.981895f, 0.579392f, 0.026250f}, - {0.982881f, 0.586606f, 0.024661f}, - {0.983779f, 0.593849f, 0.023770f}, - {0.984591f, 0.601122f, 0.023606f}, - {0.985315f, 0.608422f, 0.024202f}, - {0.985952f, 0.615750f, 0.025592f}, - {0.986502f, 0.623105f, 0.027814f}, - {0.986964f, 0.630485f, 0.030908f}, - {0.987337f, 0.637890f, 0.034916f}, - {0.987622f, 0.645320f, 0.039886f}, - {0.987819f, 0.652773f, 0.045581f}, - {0.987926f, 0.660250f, 0.051750f}, - {0.987945f, 0.667748f, 0.058329f}, - {0.987874f, 0.675267f, 0.065257f}, - {0.987714f, 0.682807f, 0.072489f}, - {0.987464f, 0.690366f, 0.079990f}, - {0.987124f, 0.697944f, 0.087731f}, - {0.986694f, 0.705540f, 0.095694f}, - {0.986175f, 0.713153f, 0.103863f}, - {0.985566f, 0.720782f, 0.112229f}, - {0.984865f, 0.728427f, 0.120785f}, - {0.984075f, 0.736087f, 0.129527f}, - {0.983196f, 0.743758f, 0.138453f}, - {0.982228f, 0.751442f, 0.147565f}, - {0.981173f, 0.759135f, 0.156863f}, - {0.980032f, 0.766837f, 0.166353f}, - {0.978806f, 0.774545f, 0.176037f}, - {0.977497f, 0.782258f, 0.185923f}, - {0.976108f, 0.789974f, 0.196018f}, - {0.974638f, 0.797692f, 0.206332f}, - {0.973088f, 0.805409f, 0.216877f}, - {0.971468f, 0.813122f, 0.227658f}, - {0.969783f, 0.820825f, 0.238686f}, - {0.968041f, 0.828515f, 0.249972f}, - {0.966243f, 0.836191f, 0.261534f}, - {0.964394f, 0.843848f, 0.273391f}, - {0.962517f, 0.851476f, 0.285546f}, - {0.960626f, 0.859069f, 0.298010f}, - {0.958720f, 0.866624f, 0.310820f}, - {0.956834f, 0.874129f, 0.323974f}, - {0.954997f, 0.881569f, 0.337475f}, - {0.953215f, 0.888942f, 0.351369f}, - {0.951546f, 0.896226f, 0.365627f}, - {0.950018f, 0.903409f, 0.380271f}, - {0.948683f, 0.910473f, 0.395289f}, - {0.947594f, 0.917399f, 0.410665f}, - {0.946809f, 0.924168f, 0.426373f}, - {0.946392f, 0.930761f, 0.442367f}, - {0.946403f, 0.937159f, 0.458592f}, - {0.946903f, 0.943348f, 0.474970f}, - {0.947937f, 0.949318f, 0.491426f}, - {0.949545f, 0.955063f, 0.507860f}, - {0.951740f, 0.960587f, 0.524203f}, - {0.954529f, 0.965896f, 0.540361f}, - {0.957896f, 0.971003f, 0.556275f}, - {0.961812f, 0.975924f, 0.571925f}, - {0.966249f, 0.980678f, 0.587206f}, - {0.971162f, 0.985282f, 0.602154f}, - {0.976511f, 0.989753f, 0.616760f}, - {0.982257f, 0.994109f, 0.631017f}, - {0.988362f, 0.998364f, 0.644924f}}; +static std::vector> inferno_data + = {{0.001462f, 0.000466f, 0.013866f}, {0.002267f, 0.001270f, 0.018570f}, {0.003299f, 0.002249f, 0.024239f}, + {0.004547f, 0.003392f, 0.030909f}, {0.006006f, 0.004692f, 0.038558f}, {0.007676f, 0.006136f, 0.046836f}, + {0.009561f, 0.007713f, 0.055143f}, {0.011663f, 0.009417f, 0.063460f}, {0.013995f, 0.011225f, 0.071862f}, + {0.016561f, 0.013136f, 0.080282f}, {0.019373f, 0.015133f, 0.088767f}, {0.022447f, 0.017199f, 0.097327f}, + {0.025793f, 0.019331f, 0.105930f}, {0.029432f, 0.021503f, 0.114621f}, {0.033385f, 0.023702f, 0.123397f}, + {0.037668f, 0.025921f, 0.132232f}, {0.042253f, 0.028139f, 0.141141f}, {0.046915f, 0.030324f, 0.150164f}, + {0.051644f, 0.032474f, 0.159254f}, {0.056449f, 0.034569f, 0.168414f}, {0.061340f, 0.036590f, 0.177642f}, + {0.066331f, 0.038504f, 0.186962f}, {0.071429f, 0.040294f, 0.196354f}, {0.076637f, 0.041905f, 0.205799f}, + {0.081962f, 0.043328f, 0.215289f}, {0.087411f, 0.044556f, 0.224813f}, {0.092990f, 0.045583f, 0.234358f}, + {0.098702f, 0.046402f, 0.243904f}, {0.104551f, 0.047008f, 0.253430f}, {0.110536f, 0.047399f, 0.262912f}, + {0.116656f, 0.047574f, 0.272321f}, {0.122908f, 0.047536f, 0.281624f}, {0.129285f, 0.047293f, 0.290788f}, + {0.135778f, 0.046856f, 0.299776f}, {0.142378f, 0.046242f, 0.308553f}, {0.149073f, 0.045468f, 0.317085f}, + {0.155850f, 0.044559f, 0.325338f}, {0.162689f, 0.043554f, 0.333277f}, {0.169575f, 0.042489f, 0.340874f}, + {0.176493f, 0.041402f, 0.348111f}, {0.183429f, 0.040329f, 0.354971f}, {0.190367f, 0.039309f, 0.361447f}, + {0.197297f, 0.038400f, 0.367535f}, {0.204209f, 0.037632f, 0.373238f}, {0.211095f, 0.037030f, 0.378563f}, + {0.217949f, 0.036615f, 0.383522f}, {0.224763f, 0.036405f, 0.388129f}, {0.231538f, 0.036405f, 0.392400f}, + {0.238273f, 0.036621f, 0.396353f}, {0.244967f, 0.037055f, 0.400007f}, {0.251620f, 0.037705f, 0.403378f}, + {0.258234f, 0.038571f, 0.406485f}, {0.264810f, 0.039647f, 0.409345f}, {0.271347f, 0.040922f, 0.411976f}, + {0.277850f, 0.042353f, 0.414392f}, {0.284321f, 0.043933f, 0.416608f}, {0.290763f, 0.045644f, 0.418637f}, + {0.297178f, 0.047470f, 0.420491f}, {0.303568f, 0.049396f, 0.422182f}, {0.309935f, 0.051407f, 0.423721f}, + {0.316282f, 0.053490f, 0.425116f}, {0.322610f, 0.055634f, 0.426377f}, {0.328921f, 0.057827f, 0.427511f}, + {0.335217f, 0.060060f, 0.428524f}, {0.341500f, 0.062325f, 0.429425f}, {0.347771f, 0.064616f, 0.430217f}, + {0.354032f, 0.066925f, 0.430906f}, {0.360284f, 0.069247f, 0.431497f}, {0.366529f, 0.071579f, 0.431994f}, + {0.372768f, 0.073915f, 0.432400f}, {0.379001f, 0.076253f, 0.432719f}, {0.385228f, 0.078591f, 0.432955f}, + {0.391453f, 0.080927f, 0.433109f}, {0.397674f, 0.083257f, 0.433183f}, {0.403894f, 0.085580f, 0.433179f}, + {0.410113f, 0.087896f, 0.433098f}, {0.416331f, 0.090203f, 0.432943f}, {0.422549f, 0.092501f, 0.432714f}, + {0.428768f, 0.094790f, 0.432412f}, {0.434987f, 0.097069f, 0.432039f}, {0.441207f, 0.099338f, 0.431594f}, + {0.447428f, 0.101597f, 0.431080f}, {0.453651f, 0.103848f, 0.430498f}, {0.459875f, 0.106089f, 0.429846f}, + {0.466100f, 0.108322f, 0.429125f}, {0.472328f, 0.110547f, 0.428334f}, {0.478558f, 0.112764f, 0.427475f}, + {0.484789f, 0.114974f, 0.426548f}, {0.491022f, 0.117179f, 0.425552f}, {0.497257f, 0.119379f, 0.424488f}, + {0.503493f, 0.121575f, 0.423356f}, {0.509730f, 0.123769f, 0.422156f}, {0.515967f, 0.125960f, 0.420887f}, + {0.522206f, 0.128150f, 0.419549f}, {0.528444f, 0.130341f, 0.418142f}, {0.534683f, 0.132534f, 0.416667f}, + {0.540920f, 0.134729f, 0.415123f}, {0.547157f, 0.136929f, 0.413511f}, {0.553392f, 0.139134f, 0.411829f}, + {0.559624f, 0.141346f, 0.410078f}, {0.565854f, 0.143567f, 0.408258f}, {0.572081f, 0.145797f, 0.406369f}, + {0.578304f, 0.148039f, 0.404411f}, {0.584521f, 0.150294f, 0.402385f}, {0.590734f, 0.152563f, 0.400290f}, + {0.596940f, 0.154848f, 0.398125f}, {0.603139f, 0.157151f, 0.395891f}, {0.609330f, 0.159474f, 0.393589f}, + {0.615513f, 0.161817f, 0.391219f}, {0.621685f, 0.164184f, 0.388781f}, {0.627847f, 0.166575f, 0.386276f}, + {0.633998f, 0.168992f, 0.383704f}, {0.640135f, 0.171438f, 0.381065f}, {0.646260f, 0.173914f, 0.378359f}, + {0.652369f, 0.176421f, 0.375586f}, {0.658463f, 0.178962f, 0.372748f}, {0.664540f, 0.181539f, 0.369846f}, + {0.670599f, 0.184153f, 0.366879f}, {0.676638f, 0.186807f, 0.363849f}, {0.682656f, 0.189501f, 0.360757f}, + {0.688653f, 0.192239f, 0.357603f}, {0.694627f, 0.195021f, 0.354388f}, {0.700576f, 0.197851f, 0.351113f}, + {0.706500f, 0.200728f, 0.347777f}, {0.712396f, 0.203656f, 0.344383f}, {0.718264f, 0.206636f, 0.340931f}, + {0.724103f, 0.209670f, 0.337424f}, {0.729909f, 0.212759f, 0.333861f}, {0.735683f, 0.215906f, 0.330245f}, + {0.741423f, 0.219112f, 0.326576f}, {0.747127f, 0.222378f, 0.322856f}, {0.752794f, 0.225706f, 0.319085f}, + {0.758422f, 0.229097f, 0.315266f}, {0.764010f, 0.232554f, 0.311399f}, {0.769556f, 0.236077f, 0.307485f}, + {0.775059f, 0.239667f, 0.303526f}, {0.780517f, 0.243327f, 0.299523f}, {0.785929f, 0.247056f, 0.295477f}, + {0.791293f, 0.250856f, 0.291390f}, {0.796607f, 0.254728f, 0.287264f}, {0.801871f, 0.258674f, 0.283099f}, + {0.807082f, 0.262692f, 0.278898f}, {0.812239f, 0.266786f, 0.274661f}, {0.817341f, 0.270954f, 0.270390f}, + {0.822386f, 0.275197f, 0.266085f}, {0.827372f, 0.279517f, 0.261750f}, {0.832299f, 0.283913f, 0.257383f}, + {0.837165f, 0.288385f, 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0.285546f}, {0.960626f, 0.859069f, 0.298010f}, {0.958720f, 0.866624f, 0.310820f}, + {0.956834f, 0.874129f, 0.323974f}, {0.954997f, 0.881569f, 0.337475f}, {0.953215f, 0.888942f, 0.351369f}, + {0.951546f, 0.896226f, 0.365627f}, {0.950018f, 0.903409f, 0.380271f}, {0.948683f, 0.910473f, 0.395289f}, + {0.947594f, 0.917399f, 0.410665f}, {0.946809f, 0.924168f, 0.426373f}, {0.946392f, 0.930761f, 0.442367f}, + {0.946403f, 0.937159f, 0.458592f}, {0.946903f, 0.943348f, 0.474970f}, {0.947937f, 0.949318f, 0.491426f}, + {0.949545f, 0.955063f, 0.507860f}, {0.951740f, 0.960587f, 0.524203f}, {0.954529f, 0.965896f, 0.540361f}, + {0.957896f, 0.971003f, 0.556275f}, {0.961812f, 0.975924f, 0.571925f}, {0.966249f, 0.980678f, 0.587206f}, + {0.971162f, 0.985282f, 0.602154f}, {0.976511f, 0.989753f, 0.616760f}, {0.982257f, 0.994109f, 0.631017f}, + {0.988362f, 0.998364f, 0.644924f}}; //Plasma data from MatPlotLib -static std::vector> plasma_data = { - {5.03832136e-02f, 2.98028976e-02f, 5.27974883e-01f}, - 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4.83917732e-01f}, {7.87132978e-01f, 2.66921859e-01f, 4.80306702e-01f}, + {7.90855015e-01f, 2.71345267e-01f, 4.76706319e-01f}, {7.94549101e-01f, 2.75770179e-01f, 4.73116798e-01f}, + {7.98215577e-01f, 2.80196901e-01f, 4.69538286e-01f}, {8.01854758e-01f, 2.84625750e-01f, 4.65970871e-01f}, + {8.05466945e-01f, 2.89057057e-01f, 4.62414580e-01f}, {8.09052419e-01f, 2.93491117e-01f, 4.58869577e-01f}, + {8.12611506e-01f, 2.97927865e-01f, 4.55337565e-01f}, {8.16144382e-01f, 3.02368130e-01f, 4.51816385e-01f}, + {8.19651255e-01f, 3.06812282e-01f, 4.48305861e-01f}, {8.23132309e-01f, 3.11260703e-01f, 4.44805781e-01f}, + {8.26587706e-01f, 3.15713782e-01f, 4.41315901e-01f}, {8.30017584e-01f, 3.20171913e-01f, 4.37835947e-01f}, + {8.33422053e-01f, 3.24635499e-01f, 4.34365616e-01f}, {8.36801237e-01f, 3.29104836e-01f, 4.30905052e-01f}, + {8.40155276e-01f, 3.33580106e-01f, 4.27454836e-01f}, {8.43484103e-01f, 3.38062109e-01f, 4.24013059e-01f}, + {8.46787726e-01f, 3.42551272e-01f, 4.20579333e-01f}, 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2.95662308e-01f}, + {9.51343530e-01f, 5.22849522e-01f, 2.92274506e-01f}, {9.53427725e-01f, 5.27959550e-01f, 2.88883445e-01f}, + {9.55469640e-01f, 5.33093083e-01f, 2.85490391e-01f}, {9.57468770e-01f, 5.38250172e-01f, 2.82096149e-01f}, + {9.59424430e-01f, 5.43431038e-01f, 2.78700990e-01f}, {9.61335930e-01f, 5.48635890e-01f, 2.75305214e-01f}, + {9.63202573e-01f, 5.53864931e-01f, 2.71909159e-01f}, {9.65023656e-01f, 5.59118349e-01f, 2.68513200e-01f}, + {9.66798470e-01f, 5.64396327e-01f, 2.65117752e-01f}, {9.68525639e-01f, 5.69699633e-01f, 2.61721488e-01f}, + {9.70204593e-01f, 5.75028270e-01f, 2.58325424e-01f}, {9.71835007e-01f, 5.80382015e-01f, 2.54931256e-01f}, + {9.73416145e-01f, 5.85761012e-01f, 2.51539615e-01f}, {9.74947262e-01f, 5.91165394e-01f, 2.48151200e-01f}, + {9.76427606e-01f, 5.96595287e-01f, 2.44766775e-01f}, {9.77856416e-01f, 6.02050811e-01f, 2.41387186e-01f}, + {9.79232922e-01f, 6.07532077e-01f, 2.38013359e-01f}, {9.80556344e-01f, 6.13039190e-01f, 2.34646316e-01f}, + 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7.22691379e-01f, 1.74380656e-01f}, {9.94553260e-01f, 7.28727890e-01f, 1.71621733e-01f}, + {9.94560594e-01f, 7.34790799e-01f, 1.68937522e-01f}, {9.94494964e-01f, 7.40880020e-01f, 1.66334918e-01f}, + {9.94355411e-01f, 7.46995448e-01f, 1.63821243e-01f}, {9.94140989e-01f, 7.53136955e-01f, 1.61404226e-01f}, + {9.93850778e-01f, 7.59304390e-01f, 1.59091984e-01f}, {9.93482190e-01f, 7.65498551e-01f, 1.56890625e-01f}, + {9.93033251e-01f, 7.71719833e-01f, 1.54807583e-01f}, {9.92505214e-01f, 7.77966775e-01f, 1.52854862e-01f}, + {9.91897270e-01f, 7.84239120e-01f, 1.51041581e-01f}, {9.91208680e-01f, 7.90536569e-01f, 1.49376885e-01f}, + {9.90438793e-01f, 7.96858775e-01f, 1.47869810e-01f}, {9.89587065e-01f, 8.03205337e-01f, 1.46529128e-01f}, + {9.88647741e-01f, 8.09578605e-01f, 1.45357284e-01f}, {9.87620557e-01f, 8.15977942e-01f, 1.44362644e-01f}, + {9.86509366e-01f, 8.22400620e-01f, 1.43556679e-01f}, {9.85314198e-01f, 8.28845980e-01f, 1.42945116e-01f}, + {9.84031139e-01f, 8.35315360e-01f, 1.42528388e-01f}, {9.82652820e-01f, 8.41811730e-01f, 1.42302653e-01f}, + {9.81190389e-01f, 8.48328902e-01f, 1.42278607e-01f}, {9.79643637e-01f, 8.54866468e-01f, 1.42453425e-01f}, + {9.77994918e-01f, 8.61432314e-01f, 1.42808191e-01f}, {9.76264977e-01f, 8.68015998e-01f, 1.43350944e-01f}, + {9.74443038e-01f, 8.74622194e-01f, 1.44061156e-01f}, {9.72530009e-01f, 8.81250063e-01f, 1.44922913e-01f}, + {9.70532932e-01f, 8.87896125e-01f, 1.45918663e-01f}, {9.68443477e-01f, 8.94563989e-01f, 1.47014438e-01f}, + {9.66271225e-01f, 9.01249365e-01f, 1.48179639e-01f}, {9.64021057e-01f, 9.07950379e-01f, 1.49370428e-01f}, + {9.61681481e-01f, 9.14672479e-01f, 1.50520343e-01f}, {9.59275646e-01f, 9.21406537e-01f, 1.51566019e-01f}, + {9.56808068e-01f, 9.28152065e-01f, 1.52409489e-01f}, {9.54286813e-01f, 9.34907730e-01f, 1.52921158e-01f}, + {9.51726083e-01f, 9.41670605e-01f, 1.52925363e-01f}, {9.49150533e-01f, 9.48434900e-01f, 1.52177604e-01f}, + {9.46602270e-01f, 9.55189860e-01f, 1.50327944e-01f}, {9.44151742e-01f, 9.61916487e-01f, 1.46860789e-01f}, + {9.41896120e-01f, 9.68589814e-01f, 1.40955606e-01f}, {9.40015097e-01f, 9.75158357e-01f, 1.31325517e-01f}}; //Viridis data from MatPlotLib -static std::vector> viridis_data = { - {0.26700401f, 0.00487433f, 0.32941519f}, - {0.26851048f, 0.00960483f, 0.33542652f}, - {0.26994384f, 0.01462494f, 0.34137895f}, - {0.27130489f, 0.01994186f, 0.34726862f}, - {0.27259384f, 0.02556309f, 0.35309303f}, - {0.27380934f, 0.03149748f, 0.35885256f}, - {0.27495242f, 0.03775181f, 0.36454323f}, - {0.27602238f, 0.04416723f, 0.37016418f}, - {0.2770184f, 0.05034437f, 0.37571452f}, - {0.27794143f, 0.05632444f, 0.38119074f}, - {0.27879067f, 0.06214536f, 0.38659204f}, - {0.2795655f, 0.06783587f, 0.39191723f}, - {0.28026658f, 0.07341724f, 0.39716349f}, - {0.28089358f, 0.07890703f, 0.40232944f}, - {0.28144581f, 0.0843197f, 0.40741404f}, - {0.28192358f, 0.08966622f, 0.41241521f}, - {0.28232739f, 0.09495545f, 0.41733086f}, - {0.28265633f, 0.10019576f, 0.42216032f}, - {0.28291049f, 0.10539345f, 0.42690202f}, - {0.28309095f, 0.11055307f, 0.43155375f}, - {0.28319704f, 0.11567966f, 0.43611482f}, - {0.28322882f, 0.12077701f, 0.44058404f}, - {0.28318684f, 0.12584799f, 0.44496f}, - {0.283072f, 0.13089477f, 0.44924127f}, - {0.28288389f, 0.13592005f, 0.45342734f}, - {0.28262297f, 0.14092556f, 0.45751726f}, - {0.28229037f, 0.14591233f, 0.46150995f}, - {0.28188676f, 0.15088147f, 0.46540474f}, - {0.28141228f, 0.15583425f, 0.46920128f}, - {0.28086773f, 0.16077132f, 0.47289909f}, - {0.28025468f, 0.16569272f, 0.47649762f}, - {0.27957399f, 0.17059884f, 0.47999675f}, - {0.27882618f, 0.1754902f, 0.48339654f}, - {0.27801236f, 0.18036684f, 0.48669702f}, - {0.27713437f, 0.18522836f, 0.48989831f}, - {0.27619376f, 0.19007447f, 0.49300074f}, - {0.27519116f, 0.1949054f, 0.49600488f}, - {0.27412802f, 0.19972086f, 0.49891131f}, - {0.27300596f, 0.20452049f, 0.50172076f}, - {0.27182812f, 0.20930306f, 0.50443413f}, - {0.27059473f, 0.21406899f, 0.50705243f}, - {0.26930756f, 0.21881782f, 0.50957678f}, - {0.26796846f, 0.22354911f, 0.5120084f}, - {0.26657984f, 0.2282621f, 0.5143487f}, - {0.2651445f, 0.23295593f, 0.5165993f}, - {0.2636632f, 0.23763078f, 0.51876163f}, - {0.26213801f, 0.24228619f, 0.52083736f}, - {0.26057103f, 0.2469217f, 0.52282822f}, - {0.25896451f, 0.25153685f, 0.52473609f}, - {0.25732244f, 0.2561304f, 0.52656332f}, - {0.25564519f, 0.26070284f, 0.52831152f}, - {0.25393498f, 0.26525384f, 0.52998273f}, - {0.25219404f, 0.26978306f, 0.53157905f}, - {0.25042462f, 0.27429024f, 0.53310261f}, - {0.24862899f, 0.27877509f, 0.53455561f}, - {0.2468114f, 0.28323662f, 0.53594093f}, - {0.24497208f, 0.28767547f, 0.53726018f}, - {0.24311324f, 0.29209154f, 0.53851561f}, - {0.24123708f, 0.29648471f, 0.53970946f}, - {0.23934575f, 0.30085494f, 0.54084398f}, - {0.23744138f, 0.30520222f, 0.5419214f}, - {0.23552606f, 0.30952657f, 0.54294396f}, - {0.23360277f, 0.31382773f, 0.54391424f}, - {0.2316735f, 0.3181058f, 0.54483444f}, - {0.22973926f, 0.32236127f, 0.54570633f}, - {0.22780192f, 0.32659432f, 0.546532f}, - {0.2258633f, 0.33080515f, 0.54731353f}, - {0.22392515f, 0.334994f, 0.54805291f}, - {0.22198915f, 0.33916114f, 0.54875211f}, - {0.22005691f, 0.34330688f, 0.54941304f}, - {0.21812995f, 0.34743154f, 0.55003755f}, - {0.21620971f, 0.35153548f, 0.55062743f}, - {0.21429757f, 0.35561907f, 0.5511844f}, - {0.21239477f, 0.35968273f, 0.55171011f}, - {0.2105031f, 0.36372671f, 0.55220646f}, - {0.20862342f, 0.36775151f, 0.55267486f}, - {0.20675628f, 0.37175775f, 0.55311653f}, - {0.20490257f, 0.37574589f, 0.55353282f}, - {0.20306309f, 0.37971644f, 0.55392505f}, - {0.20123854f, 0.38366989f, 0.55429441f}, - {0.1994295f, 0.38760678f, 0.55464205f}, - {0.1976365f, 0.39152762f, 0.55496905f}, - {0.19585993f, 0.39543297f, 0.55527637f}, - {0.19410009f, 0.39932336f, 0.55556494f}, - {0.19235719f, 0.40319934f, 0.55583559f}, - {0.19063135f, 0.40706148f, 0.55608907f}, - {0.18892259f, 0.41091033f, 0.55632606f}, - {0.18723083f, 0.41474645f, 0.55654717f}, - {0.18555593f, 0.4185704f, 0.55675292f}, - {0.18389763f, 0.42238275f, 0.55694377f}, - {0.18225561f, 0.42618405f, 0.5571201f}, - {0.18062949f, 0.42997486f, 0.55728221f}, - {0.17901879f, 0.43375572f, 0.55743035f}, - {0.17742298f, 0.4375272f, 0.55756466f}, - {0.17584148f, 0.44128981f, 0.55768526f}, - {0.17427363f, 0.4450441f, 0.55779216f}, - {0.17271876f, 0.4487906f, 0.55788532f}, - {0.17117615f, 0.4525298f, 0.55796464f}, - {0.16964573f, 0.45626209f, 0.55803034f}, - {0.16812641f, 0.45998802f, 0.55808199f}, - {0.1666171f, 0.46370813f, 0.55811913f}, - {0.16511703f, 0.4674229f, 0.55814141f}, - {0.16362543f, 0.47113278f, 0.55814842f}, - {0.16214155f, 0.47483821f, 0.55813967f}, - {0.16066467f, 0.47853961f, 0.55811466f}, - {0.15919413f, 0.4822374f, 0.5580728f}, - {0.15772933f, 0.48593197f, 0.55801347f}, - {0.15626973f, 0.4896237f, 0.557936f}, - {0.15481488f, 0.49331293f, 0.55783967f}, - {0.15336445f, 0.49700003f, 0.55772371f}, - {0.1519182f, 0.50068529f, 0.55758733f}, - {0.15047605f, 0.50436904f, 0.55742968f}, - {0.14903918f, 0.50805136f, 0.5572505f}, - {0.14760731f, 0.51173263f, 0.55704861f}, - {0.14618026f, 0.51541316f, 0.55682271f}, - {0.14475863f, 0.51909319f, 0.55657181f}, - {0.14334327f, 0.52277292f, 0.55629491f}, - {0.14193527f, 0.52645254f, 0.55599097f}, - {0.14053599f, 0.53013219f, 0.55565893f}, - {0.13914708f, 0.53381201f, 0.55529773f}, - {0.13777048f, 0.53749213f, 0.55490625f}, - {0.1364085f, 0.54117264f, 0.55448339f}, - {0.13506561f, 0.54485335f, 0.55402906f}, - {0.13374299f, 0.54853458f, 0.55354108f}, - {0.13244401f, 0.55221637f, 0.55301828f}, - {0.13117249f, 0.55589872f, 0.55245948f}, - {0.1299327f, 0.55958162f, 0.55186354f}, - {0.12872938f, 0.56326503f, 0.55122927f}, - {0.12756771f, 0.56694891f, 0.55055551f}, - {0.12645338f, 0.57063316f, 0.5498411f}, - {0.12539383f, 0.57431754f, 0.54908564f}, - {0.12439474f, 0.57800205f, 0.5482874f}, - {0.12346281f, 0.58168661f, 0.54744498f}, - {0.12260562f, 0.58537105f, 0.54655722f}, - {0.12183122f, 0.58905521f, 0.54562298f}, - {0.12114807f, 0.59273889f, 0.54464114f}, - {0.12056501f, 0.59642187f, 0.54361058f}, - {0.12009154f, 0.60010387f, 0.54253043f}, - {0.11973756f, 0.60378459f, 0.54139999f}, - {0.11951163f, 0.60746388f, 0.54021751f}, - {0.11942341f, 0.61114146f, 0.53898192f}, - {0.11948255f, 0.61481702f, 0.53769219f}, - {0.11969858f, 0.61849025f, 0.53634733f}, - {0.12008079f, 0.62216081f, 0.53494633f}, - {0.12063824f, 0.62582833f, 0.53348834f}, - {0.12137972f, 0.62949242f, 0.53197275f}, - {0.12231244f, 0.63315277f, 0.53039808f}, - {0.12344358f, 0.63680899f, 0.52876343f}, - {0.12477953f, 0.64046069f, 0.52706792f}, - {0.12632581f, 0.64410744f, 0.52531069f}, - {0.12808703f, 0.64774881f, 0.52349092f}, - {0.13006688f, 0.65138436f, 0.52160791f}, - {0.13226797f, 0.65501363f, 0.51966086f}, - {0.13469183f, 0.65863619f, 0.5176488f}, - {0.13733921f, 0.66225157f, 0.51557101f}, - {0.14020991f, 0.66585927f, 0.5134268f}, - {0.14330291f, 0.66945881f, 0.51121549f}, - {0.1466164f, 0.67304968f, 0.50893644f}, - {0.15014782f, 0.67663139f, 0.5065889f}, - {0.15389405f, 0.68020343f, 0.50417217f}, - {0.15785146f, 0.68376525f, 0.50168574f}, - {0.16201598f, 0.68731632f, 0.49912906f}, - {0.1663832f, 0.69085611f, 0.49650163f}, - {0.1709484f, 0.69438405f, 0.49380294f}, - {0.17570671f, 0.6978996f, 0.49103252f}, - {0.18065314f, 0.70140222f, 0.48818938f}, - {0.18578266f, 0.70489133f, 0.48527326f}, - {0.19109018f, 0.70836635f, 0.48228395f}, - {0.19657063f, 0.71182668f, 0.47922108f}, - {0.20221902f, 0.71527175f, 0.47608431f}, - {0.20803045f, 0.71870095f, 0.4728733f}, - {0.21400015f, 0.72211371f, 0.46958774f}, - {0.22012381f, 0.72550945f, 0.46622638f}, - {0.2263969f, 0.72888753f, 0.46278934f}, - {0.23281498f, 0.73224735f, 0.45927675f}, - {0.2393739f, 0.73558828f, 0.45568838f}, - {0.24606968f, 0.73890972f, 0.45202405f}, - {0.25289851f, 0.74221104f, 0.44828355f}, - {0.25985676f, 0.74549162f, 0.44446673f}, - {0.26694127f, 0.74875084f, 0.44057284f}, - {0.27414922f, 0.75198807f, 0.4366009f}, - {0.28147681f, 0.75520266f, 0.43255207f}, - {0.28892102f, 0.75839399f, 0.42842626f}, - {0.29647899f, 0.76156142f, 0.42422341f}, - {0.30414796f, 0.76470433f, 0.41994346f}, - {0.31192534f, 0.76782207f, 0.41558638f}, - {0.3198086f, 0.77091403f, 0.41115215f}, - {0.3277958f, 0.77397953f, 0.40664011f}, - {0.33588539f, 0.7770179f, 0.40204917f}, - {0.34407411f, 0.78002855f, 0.39738103f}, - {0.35235985f, 0.78301086f, 0.39263579f}, - {0.36074053f, 0.78596419f, 0.38781353f}, - {0.3692142f, 0.78888793f, 0.38291438f}, - {0.37777892f, 0.79178146f, 0.3779385f}, - {0.38643282f, 0.79464415f, 0.37288606f}, - {0.39517408f, 0.79747541f, 0.36775726f}, - {0.40400101f, 0.80027461f, 0.36255223f}, - {0.4129135f, 0.80304099f, 0.35726893f}, - {0.42190813f, 0.80577412f, 0.35191009f}, - {0.43098317f, 0.80847343f, 0.34647607f}, - {0.44013691f, 0.81113836f, 0.3409673f}, - {0.44936763f, 0.81376835f, 0.33538426f}, - {0.45867362f, 0.81636288f, 0.32972749f}, - {0.46805314f, 0.81892143f, 0.32399761f}, - {0.47750446f, 0.82144351f, 0.31819529f}, - {0.4870258f, 0.82392862f, 0.31232133f}, - {0.49661536f, 0.82637633f, 0.30637661f}, - {0.5062713f, 0.82878621f, 0.30036211f}, - {0.51599182f, 0.83115784f, 0.29427888f}, - {0.52577622f, 0.83349064f, 0.2881265f}, - {0.5356211f, 0.83578452f, 0.28190832f}, - {0.5455244f, 0.83803918f, 0.27562602f}, - {0.55548397f, 0.84025437f, 0.26928147f}, - {0.5654976f, 0.8424299f, 0.26287683f}, - {0.57556297f, 0.84456561f, 0.25641457f}, - {0.58567772f, 0.84666139f, 0.24989748f}, - {0.59583934f, 0.84871722f, 0.24332878f}, - {0.60604528f, 0.8507331f, 0.23671214f}, - {0.61629283f, 0.85270912f, 0.23005179f}, - {0.62657923f, 0.85464543f, 0.22335258f}, - {0.63690157f, 0.85654226f, 0.21662012f}, - {0.64725685f, 0.85839991f, 0.20986086f}, - {0.65764197f, 0.86021878f, 0.20308229f}, - {0.66805369f, 0.86199932f, 0.19629307f}, - {0.67848868f, 0.86374211f, 0.18950326f}, - {0.68894351f, 0.86544779f, 0.18272455f}, - {0.69941463f, 0.86711711f, 0.17597055f}, - {0.70989842f, 0.86875092f, 0.16925712f}, - {0.72039115f, 0.87035015f, 0.16260273f}, - {0.73088902f, 0.87191584f, 0.15602894f}, - {0.74138803f, 0.87344918f, 0.14956101f}, - {0.75188414f, 0.87495143f, 0.14322828f}, - {0.76237342f, 0.87642392f, 0.13706449f}, - {0.77285183f, 0.87786808f, 0.13110864f}, - {0.78331535f, 0.87928545f, 0.12540538f}, - {0.79375994f, 0.88067763f, 0.12000532f}, - {0.80418159f, 0.88204632f, 0.11496505f}, - {0.81457634f, 0.88339329f, 0.11034678f}, - {0.82494028f, 0.88472036f, 0.10621724f}, - {0.83526959f, 0.88602943f, 0.1026459f}, - {0.84556056f, 0.88732243f, 0.09970219f}, - {0.8558096f, 0.88860134f, 0.09745186f}, - {0.86601325f, 0.88986815f, 0.09595277f}, - {0.87616824f, 0.89112487f, 0.09525046f}, - {0.88627146f, 0.89237353f, 0.09537439f}, - {0.89632002f, 0.89361614f, 0.09633538f}, - {0.90631121f, 0.89485467f, 0.09812496f}, - {0.91624212f, 0.89609127f, 0.1007168f}, - {0.92610579f, 0.89732977f, 0.10407067f}, - {0.93590444f, 0.8985704f, 0.10813094f}, - {0.94563626f, 0.899815f, 0.11283773f}, - {0.95529972f, 0.90106534f, 0.11812832f}, - {0.96489353f, 0.90232311f, 0.12394051f}, - {0.97441665f, 0.90358991f, 0.13021494f}, - {0.98386829f, 0.90486726f, 0.13689671f}, - {0.99324789f, 0.90615657f, 0.1439362f}}; +static std::vector> viridis_data + = {{0.26700401f, 0.00487433f, 0.32941519f}, {0.26851048f, 0.00960483f, 0.33542652f}, + {0.26994384f, 0.01462494f, 0.34137895f}, {0.27130489f, 0.01994186f, 0.34726862f}, + {0.27259384f, 0.02556309f, 0.35309303f}, {0.27380934f, 0.03149748f, 0.35885256f}, + {0.27495242f, 0.03775181f, 0.36454323f}, {0.27602238f, 0.04416723f, 0.37016418f}, + {0.2770184f, 0.05034437f, 0.37571452f}, {0.27794143f, 0.05632444f, 0.38119074f}, + {0.27879067f, 0.06214536f, 0.38659204f}, {0.2795655f, 0.06783587f, 0.39191723f}, + {0.28026658f, 0.07341724f, 0.39716349f}, {0.28089358f, 0.07890703f, 0.40232944f}, + {0.28144581f, 0.0843197f, 0.40741404f}, {0.28192358f, 0.08966622f, 0.41241521f}, + {0.28232739f, 0.09495545f, 0.41733086f}, {0.28265633f, 0.10019576f, 0.42216032f}, + {0.28291049f, 0.10539345f, 0.42690202f}, {0.28309095f, 0.11055307f, 0.43155375f}, + {0.28319704f, 0.11567966f, 0.43611482f}, {0.28322882f, 0.12077701f, 0.44058404f}, + {0.28318684f, 0.12584799f, 0.44496f}, {0.283072f, 0.13089477f, 0.44924127f}, + {0.28288389f, 0.13592005f, 0.45342734f}, {0.28262297f, 0.14092556f, 0.45751726f}, + {0.28229037f, 0.14591233f, 0.46150995f}, {0.28188676f, 0.15088147f, 0.46540474f}, + {0.28141228f, 0.15583425f, 0.46920128f}, {0.28086773f, 0.16077132f, 0.47289909f}, + {0.28025468f, 0.16569272f, 0.47649762f}, {0.27957399f, 0.17059884f, 0.47999675f}, + {0.27882618f, 0.1754902f, 0.48339654f}, {0.27801236f, 0.18036684f, 0.48669702f}, + {0.27713437f, 0.18522836f, 0.48989831f}, {0.27619376f, 0.19007447f, 0.49300074f}, + {0.27519116f, 0.1949054f, 0.49600488f}, {0.27412802f, 0.19972086f, 0.49891131f}, + {0.27300596f, 0.20452049f, 0.50172076f}, {0.27182812f, 0.20930306f, 0.50443413f}, + {0.27059473f, 0.21406899f, 0.50705243f}, {0.26930756f, 0.21881782f, 0.50957678f}, + {0.26796846f, 0.22354911f, 0.5120084f}, {0.26657984f, 0.2282621f, 0.5143487f}, + {0.2651445f, 0.23295593f, 0.5165993f}, {0.2636632f, 0.23763078f, 0.51876163f}, + {0.26213801f, 0.24228619f, 0.52083736f}, {0.26057103f, 0.2469217f, 0.52282822f}, + {0.25896451f, 0.25153685f, 0.52473609f}, {0.25732244f, 0.2561304f, 0.52656332f}, + {0.25564519f, 0.26070284f, 0.52831152f}, {0.25393498f, 0.26525384f, 0.52998273f}, + {0.25219404f, 0.26978306f, 0.53157905f}, {0.25042462f, 0.27429024f, 0.53310261f}, + {0.24862899f, 0.27877509f, 0.53455561f}, {0.2468114f, 0.28323662f, 0.53594093f}, + {0.24497208f, 0.28767547f, 0.53726018f}, {0.24311324f, 0.29209154f, 0.53851561f}, + {0.24123708f, 0.29648471f, 0.53970946f}, {0.23934575f, 0.30085494f, 0.54084398f}, + {0.23744138f, 0.30520222f, 0.5419214f}, {0.23552606f, 0.30952657f, 0.54294396f}, + {0.23360277f, 0.31382773f, 0.54391424f}, {0.2316735f, 0.3181058f, 0.54483444f}, + {0.22973926f, 0.32236127f, 0.54570633f}, {0.22780192f, 0.32659432f, 0.546532f}, + {0.2258633f, 0.33080515f, 0.54731353f}, {0.22392515f, 0.334994f, 0.54805291f}, + {0.22198915f, 0.33916114f, 0.54875211f}, {0.22005691f, 0.34330688f, 0.54941304f}, + {0.21812995f, 0.34743154f, 0.55003755f}, {0.21620971f, 0.35153548f, 0.55062743f}, + {0.21429757f, 0.35561907f, 0.5511844f}, {0.21239477f, 0.35968273f, 0.55171011f}, + {0.2105031f, 0.36372671f, 0.55220646f}, {0.20862342f, 0.36775151f, 0.55267486f}, + {0.20675628f, 0.37175775f, 0.55311653f}, {0.20490257f, 0.37574589f, 0.55353282f}, + {0.20306309f, 0.37971644f, 0.55392505f}, {0.20123854f, 0.38366989f, 0.55429441f}, + {0.1994295f, 0.38760678f, 0.55464205f}, {0.1976365f, 0.39152762f, 0.55496905f}, + {0.19585993f, 0.39543297f, 0.55527637f}, {0.19410009f, 0.39932336f, 0.55556494f}, + {0.19235719f, 0.40319934f, 0.55583559f}, {0.19063135f, 0.40706148f, 0.55608907f}, + {0.18892259f, 0.41091033f, 0.55632606f}, {0.18723083f, 0.41474645f, 0.55654717f}, + {0.18555593f, 0.4185704f, 0.55675292f}, {0.18389763f, 0.42238275f, 0.55694377f}, + {0.18225561f, 0.42618405f, 0.5571201f}, {0.18062949f, 0.42997486f, 0.55728221f}, + {0.17901879f, 0.43375572f, 0.55743035f}, {0.17742298f, 0.4375272f, 0.55756466f}, + {0.17584148f, 0.44128981f, 0.55768526f}, {0.17427363f, 0.4450441f, 0.55779216f}, + {0.17271876f, 0.4487906f, 0.55788532f}, {0.17117615f, 0.4525298f, 0.55796464f}, + {0.16964573f, 0.45626209f, 0.55803034f}, {0.16812641f, 0.45998802f, 0.55808199f}, + {0.1666171f, 0.46370813f, 0.55811913f}, {0.16511703f, 0.4674229f, 0.55814141f}, + {0.16362543f, 0.47113278f, 0.55814842f}, {0.16214155f, 0.47483821f, 0.55813967f}, + {0.16066467f, 0.47853961f, 0.55811466f}, {0.15919413f, 0.4822374f, 0.5580728f}, + {0.15772933f, 0.48593197f, 0.55801347f}, {0.15626973f, 0.4896237f, 0.557936f}, + {0.15481488f, 0.49331293f, 0.55783967f}, {0.15336445f, 0.49700003f, 0.55772371f}, + {0.1519182f, 0.50068529f, 0.55758733f}, {0.15047605f, 0.50436904f, 0.55742968f}, + {0.14903918f, 0.50805136f, 0.5572505f}, {0.14760731f, 0.51173263f, 0.55704861f}, + {0.14618026f, 0.51541316f, 0.55682271f}, {0.14475863f, 0.51909319f, 0.55657181f}, + {0.14334327f, 0.52277292f, 0.55629491f}, {0.14193527f, 0.52645254f, 0.55599097f}, + {0.14053599f, 0.53013219f, 0.55565893f}, {0.13914708f, 0.53381201f, 0.55529773f}, + {0.13777048f, 0.53749213f, 0.55490625f}, {0.1364085f, 0.54117264f, 0.55448339f}, + {0.13506561f, 0.54485335f, 0.55402906f}, {0.13374299f, 0.54853458f, 0.55354108f}, + {0.13244401f, 0.55221637f, 0.55301828f}, {0.13117249f, 0.55589872f, 0.55245948f}, + {0.1299327f, 0.55958162f, 0.55186354f}, {0.12872938f, 0.56326503f, 0.55122927f}, + {0.12756771f, 0.56694891f, 0.55055551f}, {0.12645338f, 0.57063316f, 0.5498411f}, + {0.12539383f, 0.57431754f, 0.54908564f}, {0.12439474f, 0.57800205f, 0.5482874f}, + {0.12346281f, 0.58168661f, 0.54744498f}, {0.12260562f, 0.58537105f, 0.54655722f}, + {0.12183122f, 0.58905521f, 0.54562298f}, {0.12114807f, 0.59273889f, 0.54464114f}, + {0.12056501f, 0.59642187f, 0.54361058f}, {0.12009154f, 0.60010387f, 0.54253043f}, + {0.11973756f, 0.60378459f, 0.54139999f}, {0.11951163f, 0.60746388f, 0.54021751f}, + {0.11942341f, 0.61114146f, 0.53898192f}, {0.11948255f, 0.61481702f, 0.53769219f}, + {0.11969858f, 0.61849025f, 0.53634733f}, {0.12008079f, 0.62216081f, 0.53494633f}, + {0.12063824f, 0.62582833f, 0.53348834f}, {0.12137972f, 0.62949242f, 0.53197275f}, + {0.12231244f, 0.63315277f, 0.53039808f}, {0.12344358f, 0.63680899f, 0.52876343f}, + {0.12477953f, 0.64046069f, 0.52706792f}, {0.12632581f, 0.64410744f, 0.52531069f}, + {0.12808703f, 0.64774881f, 0.52349092f}, {0.13006688f, 0.65138436f, 0.52160791f}, + {0.13226797f, 0.65501363f, 0.51966086f}, {0.13469183f, 0.65863619f, 0.5176488f}, + {0.13733921f, 0.66225157f, 0.51557101f}, {0.14020991f, 0.66585927f, 0.5134268f}, + {0.14330291f, 0.66945881f, 0.51121549f}, {0.1466164f, 0.67304968f, 0.50893644f}, + {0.15014782f, 0.67663139f, 0.5065889f}, {0.15389405f, 0.68020343f, 0.50417217f}, + {0.15785146f, 0.68376525f, 0.50168574f}, {0.16201598f, 0.68731632f, 0.49912906f}, + {0.1663832f, 0.69085611f, 0.49650163f}, {0.1709484f, 0.69438405f, 0.49380294f}, + {0.17570671f, 0.6978996f, 0.49103252f}, {0.18065314f, 0.70140222f, 0.48818938f}, + {0.18578266f, 0.70489133f, 0.48527326f}, {0.19109018f, 0.70836635f, 0.48228395f}, + {0.19657063f, 0.71182668f, 0.47922108f}, {0.20221902f, 0.71527175f, 0.47608431f}, + {0.20803045f, 0.71870095f, 0.4728733f}, {0.21400015f, 0.72211371f, 0.46958774f}, + {0.22012381f, 0.72550945f, 0.46622638f}, {0.2263969f, 0.72888753f, 0.46278934f}, + {0.23281498f, 0.73224735f, 0.45927675f}, {0.2393739f, 0.73558828f, 0.45568838f}, + {0.24606968f, 0.73890972f, 0.45202405f}, {0.25289851f, 0.74221104f, 0.44828355f}, + {0.25985676f, 0.74549162f, 0.44446673f}, {0.26694127f, 0.74875084f, 0.44057284f}, + {0.27414922f, 0.75198807f, 0.4366009f}, {0.28147681f, 0.75520266f, 0.43255207f}, + {0.28892102f, 0.75839399f, 0.42842626f}, {0.29647899f, 0.76156142f, 0.42422341f}, + {0.30414796f, 0.76470433f, 0.41994346f}, {0.31192534f, 0.76782207f, 0.41558638f}, + {0.3198086f, 0.77091403f, 0.41115215f}, {0.3277958f, 0.77397953f, 0.40664011f}, + {0.33588539f, 0.7770179f, 0.40204917f}, {0.34407411f, 0.78002855f, 0.39738103f}, + {0.35235985f, 0.78301086f, 0.39263579f}, {0.36074053f, 0.78596419f, 0.38781353f}, + {0.3692142f, 0.78888793f, 0.38291438f}, {0.37777892f, 0.79178146f, 0.3779385f}, + {0.38643282f, 0.79464415f, 0.37288606f}, {0.39517408f, 0.79747541f, 0.36775726f}, + {0.40400101f, 0.80027461f, 0.36255223f}, {0.4129135f, 0.80304099f, 0.35726893f}, + {0.42190813f, 0.80577412f, 0.35191009f}, {0.43098317f, 0.80847343f, 0.34647607f}, + {0.44013691f, 0.81113836f, 0.3409673f}, {0.44936763f, 0.81376835f, 0.33538426f}, + {0.45867362f, 0.81636288f, 0.32972749f}, {0.46805314f, 0.81892143f, 0.32399761f}, + {0.47750446f, 0.82144351f, 0.31819529f}, {0.4870258f, 0.82392862f, 0.31232133f}, + {0.49661536f, 0.82637633f, 0.30637661f}, {0.5062713f, 0.82878621f, 0.30036211f}, + {0.51599182f, 0.83115784f, 0.29427888f}, {0.52577622f, 0.83349064f, 0.2881265f}, + {0.5356211f, 0.83578452f, 0.28190832f}, {0.5455244f, 0.83803918f, 0.27562602f}, + {0.55548397f, 0.84025437f, 0.26928147f}, {0.5654976f, 0.8424299f, 0.26287683f}, + {0.57556297f, 0.84456561f, 0.25641457f}, {0.58567772f, 0.84666139f, 0.24989748f}, + {0.59583934f, 0.84871722f, 0.24332878f}, {0.60604528f, 0.8507331f, 0.23671214f}, + {0.61629283f, 0.85270912f, 0.23005179f}, {0.62657923f, 0.85464543f, 0.22335258f}, + {0.63690157f, 0.85654226f, 0.21662012f}, {0.64725685f, 0.85839991f, 0.20986086f}, + {0.65764197f, 0.86021878f, 0.20308229f}, {0.66805369f, 0.86199932f, 0.19629307f}, + {0.67848868f, 0.86374211f, 0.18950326f}, {0.68894351f, 0.86544779f, 0.18272455f}, + {0.69941463f, 0.86711711f, 0.17597055f}, {0.70989842f, 0.86875092f, 0.16925712f}, + {0.72039115f, 0.87035015f, 0.16260273f}, {0.73088902f, 0.87191584f, 0.15602894f}, + {0.74138803f, 0.87344918f, 0.14956101f}, {0.75188414f, 0.87495143f, 0.14322828f}, + {0.76237342f, 0.87642392f, 0.13706449f}, {0.77285183f, 0.87786808f, 0.13110864f}, + {0.78331535f, 0.87928545f, 0.12540538f}, {0.79375994f, 0.88067763f, 0.12000532f}, + {0.80418159f, 0.88204632f, 0.11496505f}, {0.81457634f, 0.88339329f, 0.11034678f}, + {0.82494028f, 0.88472036f, 0.10621724f}, {0.83526959f, 0.88602943f, 0.1026459f}, + {0.84556056f, 0.88732243f, 0.09970219f}, {0.8558096f, 0.88860134f, 0.09745186f}, + {0.86601325f, 0.88986815f, 0.09595277f}, {0.87616824f, 0.89112487f, 0.09525046f}, + {0.88627146f, 0.89237353f, 0.09537439f}, {0.89632002f, 0.89361614f, 0.09633538f}, + {0.90631121f, 0.89485467f, 0.09812496f}, {0.91624212f, 0.89609127f, 0.1007168f}, + {0.92610579f, 0.89732977f, 0.10407067f}, {0.93590444f, 0.8985704f, 0.10813094f}, + {0.94563626f, 0.899815f, 0.11283773f}, {0.95529972f, 0.90106534f, 0.11812832f}, + {0.96489353f, 0.90232311f, 0.12394051f}, {0.97441665f, 0.90358991f, 0.13021494f}, + {0.98386829f, 0.90486726f, 0.13689671f}, {0.99324789f, 0.90615657f, 0.1439362f}}; ColorMap::ColorMap(float min_val, float max_val, const std::vector>& color_data) : min_(min_val) @@ -807,17 +381,11 @@ Color ColorMap::color(float value) const { return color_data_[color_idx]; } -float ColorMap::min() const { - return min_; -} +float ColorMap::min() const { return min_; } -float ColorMap::max() const { - return max_; -} +float ColorMap::max() const { return max_; } -float ColorMap::range() const { - return max() - min(); -} +float ColorMap::range() const { return max() - min(); } InfernoColorMap::InfernoColorMap(float min_val, float max_val) : ColorMap(min_val, max_val, inferno_data) {} diff --git a/libs/libvtrutil/src/vtr_dynamic_bitset.h b/libs/libvtrutil/src/vtr_dynamic_bitset.h index 87a038f40bc..4a4424a122c 100644 --- a/libs/libvtrutil/src/vtr_dynamic_bitset.h +++ b/libs/libvtrutil/src/vtr_dynamic_bitset.h @@ -15,20 +15,14 @@ class dynamic_bitset { public: ///@brief Bits in underlying storage. static constexpr size_t kWidth = std::numeric_limits::digits; - static_assert(!std::numeric_limits::is_signed, - "dynamic_bitset storage must be unsigned!"); - static_assert(std::numeric_limits::is_integer, - "dynamic_bitset storage must be integer!"); + static_assert(!std::numeric_limits::is_signed, "dynamic_bitset storage must be unsigned!"); + static_assert(std::numeric_limits::is_integer, "dynamic_bitset storage must be integer!"); constexpr dynamic_bitset() = default; - constexpr dynamic_bitset(Index size) { - resize(size); - } + constexpr dynamic_bitset(Index size) { resize(size); } ///@brief Reize to the determined size - void resize(size_t size) { - array_.resize((size + kWidth - 1) / kWidth); - } + void resize(size_t size) { array_.resize((size + kWidth - 1) / kWidth); } ///@brief Clear all the bits void clear() { @@ -37,9 +31,7 @@ class dynamic_bitset { } ///@brief Return the size of the bitset (total number of bits) - size_t size() const { - return array_.size() * kWidth; - } + size_t size() const { return array_.size() * kWidth; } ///@brief Fill the whole bitset with a specific value (0 or 1) void fill(bool set) { diff --git a/libs/libvtrutil/src/vtr_expr_eval.cpp b/libs/libvtrutil/src/vtr_expr_eval.cpp index 791319f4367..9f3e7decce8 100644 --- a/libs/libvtrutil/src/vtr_expr_eval.cpp +++ b/libs/libvtrutil/src/vtr_expr_eval.cpp @@ -25,9 +25,17 @@ static int before_addition = 0; /*---- Functions for Parsing the Symbolic Formulas ----*/ /* converts specified formula to a vector in reverse-polish notation */ -static void formula_to_rpn(const char* formula, const t_formula_data& mydata, vector& rpn_output, stack& op_stack, bool is_breakpoint); - -static void get_formula_object(const char* ch, int& ichar, const t_formula_data& mydata, Formula_Object* fobj, bool is_breakpoint); +static void formula_to_rpn(const char* formula, + const t_formula_data& mydata, + vector& rpn_output, + stack& op_stack, + bool is_breakpoint); + +static void get_formula_object(const char* ch, + int& ichar, + const t_formula_data& mydata, + Formula_Object* fobj, + bool is_breakpoint); /* returns integer specifying precedence of passed-in operator. higher integer * means higher precedence */ @@ -37,13 +45,19 @@ static int get_fobj_precedence(const Formula_Object& fobj); static bool op_associativity_is_left(const t_operator& op); /* used by the shunting-yard formula parser to deal with operators such as add and subtract */ -static void handle_operator(const Formula_Object& fobj, vector& rpn_output, stack& op_stack); +static void handle_operator(const Formula_Object& fobj, + vector& rpn_output, + stack& op_stack); /* used by the shunting-yard formula parser to deal with brackets, ie '(' and ')' */ -static void handle_bracket(const Formula_Object& fobj, vector& rpn_output, stack& op_stack); +static void handle_bracket(const Formula_Object& fobj, + vector& rpn_output, + stack& op_stack); /* used by the shunting-yard formula parser to deal with commas, ie ','. These occur in function calls*/ -static void handle_comma(const Formula_Object& fobj, vector& rpn_output, stack& op_stack); +static void handle_comma(const Formula_Object& fobj, + vector& rpn_output, + stack& op_stack); /* parses revere-polish notation vector to return formula result */ static int parse_rpn_vector(vector& rpn_vec); @@ -128,7 +142,10 @@ int FormulaParser::parse_piecewise_formula(const char* formula, const t_formula_ str_size = pw_formula.size(); if (pw_formula[str_ind] != '{') { - throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: the first character in piece-wise formula should always be '{'\n"), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt( + "parse_piecewise_formula: the first character in piece-wise formula should always be '{'\n"), + __FILE__, __LINE__); } /* find the range to which t corresponds */ @@ -146,7 +163,8 @@ int FormulaParser::parse_piecewise_formula(const char* formula, const t_formula_ tmp_ind_start = str_ind + 1; char_found = goto_next_char(&str_ind, pw_formula, ':'); if (!char_found) { - throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: could not find char %c\n", ':'), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: could not find char %c\n", ':'), __FILE__, + __LINE__); } tmp_ind_count = str_ind - tmp_ind_start; /* range start is between { and : */ substr = pw_formula.substr(tmp_ind_start, tmp_ind_count); @@ -156,14 +174,18 @@ int FormulaParser::parse_piecewise_formula(const char* formula, const t_formula_ tmp_ind_start = str_ind + 1; char_found = goto_next_char(&str_ind, pw_formula, '}'); if (!char_found) { - throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: could not find char %c\n", '}'), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: could not find char %c\n", '}'), __FILE__, + __LINE__); } tmp_ind_count = str_ind - tmp_ind_start; /* range end is between : and } */ substr = pw_formula.substr(tmp_ind_start, tmp_ind_count); range_end = parse_formula(substr, mydata); if (range_start > range_end) { - throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: range_start, %d, is bigger than range end, %d\n", range_start, range_end), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("parse_piecewise_formula: range_start, %d, is bigger than range end, %d\n", range_start, + range_end), + __FILE__, __LINE__); } /* is the incoming wire within this range? (inclusive) */ @@ -179,13 +201,15 @@ int FormulaParser::parse_piecewise_formula(const char* formula, const t_formula_ } char_found = goto_next_char(&str_ind, pw_formula, '{'); if (!char_found) { - throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: could not find char %c\n", '{'), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: could not find char %c\n", '{'), __FILE__, + __LINE__); } } /* the string index should never actually get to the end of the string because we should have found the range to which the * current wire number corresponds */ if (str_ind == str_size - 1) { - throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: could not find a closing '}'?\n"), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("parse_piecewise_formula: could not find a closing '}'?\n"), __FILE__, + __LINE__); } /* at this point str_ind should point to '}' right before the formula we're interested in starts */ @@ -206,7 +230,8 @@ static bool goto_next_char(int* str_ind, const string& pw_formula, char ch) { bool result = true; int str_size = pw_formula.size(); if ((*str_ind) == str_size - 1) { - throw vtr::VtrError(vtr::string_fmt("goto_next_char: passed-in str_ind is already at the end of string\n"), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("goto_next_char: passed-in str_ind is already at the end of string\n"), + __FILE__, __LINE__); } do { @@ -225,7 +250,11 @@ static bool goto_next_char(int* str_ind, const string& pw_formula, char ch) { /* Parses the specified formula using a shunting yard algorithm (see wikipedia). The function's result * is stored in the rpn_output vector in reverse-polish notation */ -static void formula_to_rpn(const char* formula, const t_formula_data& mydata, vector& rpn_output, stack& op_stack, bool is_breakpoint) { +static void formula_to_rpn(const char* formula, + const t_formula_data& mydata, + vector& rpn_output, + stack& op_stack, + bool is_breakpoint) { // Empty op_stack. while (!op_stack.empty()) { op_stack.pop(); @@ -268,7 +297,9 @@ static void formula_to_rpn(const char* formula, const t_formula_data& mydata, ve rpn_output.push_back(fobj); break; default: - throw vtr::VtrError(vtr::string_fmt("in formula_to_rpn: unknown formula object type: %d\n", fobj.type), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("in formula_to_rpn: unknown formula object type: %d\n", fobj.type), __FILE__, + __LINE__); break; } } @@ -281,7 +312,8 @@ static void formula_to_rpn(const char* formula, const t_formula_data& mydata, ve fobj_dummy = op_stack.top(); if (E_FML_BRACKET == fobj_dummy.type) { - throw vtr::VtrError(vtr::string_fmt("in formula_to_rpn: Mismatched brackets in user-provided formula\n"), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("in formula_to_rpn: Mismatched brackets in user-provided formula\n"), + __FILE__, __LINE__); } rpn_output.push_back(fobj_dummy); @@ -293,7 +325,11 @@ static void formula_to_rpn(const char* formula, const t_formula_data& mydata, ve * which help determine which numeric value, if any, gets assigned to fobj * ichar is incremented by the corresponding count if the need to step through the * character array arises */ -static void get_formula_object(const char* ch, int& ichar, const t_formula_data& mydata, Formula_Object* fobj, bool is_breakpoint) { +static void get_formula_object(const char* ch, + int& ichar, + const t_formula_data& mydata, + Formula_Object* fobj, + bool is_breakpoint) { /* the character can either be part of a number, or it can be an object like W, t, (, +, etc * here we have to account for both possibilities */ @@ -312,16 +348,15 @@ static void get_formula_object(const char* ch, int& ichar, const t_formula_data& else if (var_name == "lcm") fobj->data.op = E_OP_LCM; else { - throw vtr::VtrError(vtr::string_fmt("in get_formula_object: recognized function: %s\n", var_name.c_str()), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("in get_formula_object: recognized function: %s\n", var_name.c_str()), __FILE__, + __LINE__); } } else if (!is_breakpoint) { //A number fobj->type = E_FML_NUMBER; - fobj->data.num = mydata.get_var_value( - vtr::string_view( - var_name.data(), - var_name.size())); + fobj->data.num = mydata.get_var_value(vtr::string_view(var_name.data(), var_name.size())); } else if (is_variable(var_name)) { fobj->type = E_FML_VARIABLE; if (same_string(var_name, "temp_count")) @@ -409,7 +444,8 @@ static void get_formula_object(const char* ch, int& ichar, const t_formula_data& fobj->data.op = E_OP_MOD; break; default: - throw vtr::VtrError(vtr::string_fmt("in get_formula_object: unsupported character: %c\n", *ch), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("in get_formula_object: unsupported character: %c\n", *ch), + __FILE__, __LINE__); break; } } @@ -451,11 +487,14 @@ static int get_fobj_precedence(const Formula_Object& fobj) { precedence = 4; break; default: - throw vtr::VtrError(vtr::string_fmt("in get_fobj_precedence: unrecognized operator: %d\n", op), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("in get_fobj_precedence: unrecognized operator: %d\n", op), + __FILE__, __LINE__); break; } } else { - throw vtr::VtrError(vtr::string_fmt("in get_fobj_precedence: no precedence possible for formula object type %d\n", fobj.type), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("in get_fobj_precedence: no precedence possible for formula object type %d\n", fobj.type), + __FILE__, __LINE__); } return precedence; @@ -473,9 +512,12 @@ static bool op_associativity_is_left(const t_operator& /*op*/) { } /* used by the shunting-yard formula parser to deal with operators such as add and subtract */ -static void handle_operator(const Formula_Object& fobj, vector& rpn_output, stack& op_stack) { +static void handle_operator(const Formula_Object& fobj, + vector& rpn_output, + stack& op_stack) { if (E_FML_OPERATOR != fobj.type) { - throw vtr::VtrError(vtr::string_fmt("in handle_operator: passed in formula object not of type operator\n"), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("in handle_operator: passed in formula object not of type operator\n"), + __FILE__, __LINE__); } int op_pr = get_fobj_precedence(fobj); bool op_assoc_is_left = op_associativity_is_left(fobj.data.op); @@ -494,8 +536,7 @@ static void handle_operator(const Formula_Object& fobj, vector& /* get precedence of top operator */ int top_pr = get_fobj_precedence(op_stack.top()); - keep_going = ((op_assoc_is_left && op_pr == top_pr) - || op_pr < top_pr); + keep_going = ((op_assoc_is_left && op_pr == top_pr) || op_pr < top_pr); if (keep_going) { /* pop top operator off stack onto the back of rpn_output */ @@ -514,9 +555,12 @@ static void handle_operator(const Formula_Object& fobj, vector& } /* used by the shunting-yard formula parser to deal with brackets, ie '(' and ')' */ -static void handle_bracket(const Formula_Object& fobj, vector& rpn_output, stack& op_stack) { +static void handle_bracket(const Formula_Object& fobj, + vector& rpn_output, + stack& op_stack) { if (E_FML_BRACKET != fobj.type) { - throw vtr::VtrError(vtr::string_fmt("in handle_bracket: passed-in formula object not of type bracket\n"), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("in handle_bracket: passed-in formula object not of type bracket\n"), + __FILE__, __LINE__); } /* check if left or right bracket */ @@ -532,7 +576,10 @@ static void handle_bracket(const Formula_Object& fobj, vector& r if (op_stack.empty()) { /* didn't find an opening bracket - mismatched brackets */ keep_going = false; - throw vtr::VtrError(vtr::string_fmt("Ran out of stack while parsing brackets -- bracket mismatch in user-specified formula\n"), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt( + "Ran out of stack while parsing brackets -- bracket mismatch in user-specified formula\n"), + __FILE__, __LINE__); } Formula_Object next_fobj = op_stack.top(); @@ -544,7 +591,8 @@ static void handle_bracket(const Formula_Object& fobj, vector& r } else { /* should not find two right brackets without a left bracket in-between */ keep_going = false; - throw vtr::VtrError(vtr::string_fmt("Mismatched brackets encountered in user-specified formula\n"), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("Mismatched brackets encountered in user-specified formula\n"), + __FILE__, __LINE__); } } else if (E_FML_OPERATOR == next_fobj.type) { /* pop operator off stack onto the back of rpn_output */ @@ -554,16 +602,21 @@ static void handle_bracket(const Formula_Object& fobj, vector& r keep_going = true; } else { keep_going = false; - throw vtr::VtrError(vtr::string_fmt("Found unexpected formula object on operator stack: %d\n", next_fobj.type), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("Found unexpected formula object on operator stack: %d\n", next_fobj.type), + __FILE__, __LINE__); } } while (keep_going); } } /* used by the shunting-yard formula parser to deal with commas, ie ','. These occur in function calls*/ -static void handle_comma(const Formula_Object& fobj, vector& rpn_output, stack& op_stack) { +static void handle_comma(const Formula_Object& fobj, + vector& rpn_output, + stack& op_stack) { if (E_FML_COMMA != fobj.type) { - throw vtr::VtrError(vtr::string_fmt("in handle_comm: passed-in formula object not of type comma\n"), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("in handle_comm: passed-in formula object not of type comma\n"), __FILE__, + __LINE__); } //Commas are treated as right (closing) bracket since it completes a @@ -578,7 +631,9 @@ static void handle_comma(const Formula_Object& fobj, vector& rpn if (op_stack.empty()) { /* didn't find an opening bracket - mismatched brackets */ keep_going = false; - throw vtr::VtrError(vtr::string_fmt("Ran out of stack while parsing comma -- bracket mismatch in user-specified formula\n"), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("Ran out of stack while parsing comma -- bracket mismatch in user-specified formula\n"), + __FILE__, __LINE__); keep_going = false; } @@ -589,7 +644,8 @@ static void handle_comma(const Formula_Object& fobj, vector& rpn keep_going = false; } else { /* should not find two right brackets without a left bracket in-between */ - throw vtr::VtrError(vtr::string_fmt("Mismatched brackets encountered in user-specified formula\n"), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("Mismatched brackets encountered in user-specified formula\n"), + __FILE__, __LINE__); keep_going = false; } } else if (E_FML_OPERATOR == next_fobj.type) { @@ -599,7 +655,9 @@ static void handle_comma(const Formula_Object& fobj, vector& rpn op_stack.pop(); keep_going = true; } else { - throw vtr::VtrError(vtr::string_fmt("Found unexpected formula object on operator stack: %d\n", next_fobj.type), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("Found unexpected formula object on operator stack: %d\n", next_fobj.type), __FILE__, + __LINE__); keep_going = false; } @@ -613,7 +671,9 @@ static int parse_rpn_vector(vector& rpn_vec) { /* first entry should always be a number or variable name*/ if (E_FML_NUMBER != rpn_vec[0].type && E_FML_VARIABLE != rpn_vec[0].type) { - throw vtr::VtrError(vtr::string_fmt("parse_rpn_vector: first entry is not a number or variable(was %s)\n", rpn_vec[0].to_string().c_str()), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("parse_rpn_vector: first entry is not a number or variable(was %s)\n", + rpn_vec[0].to_string().c_str()), + __FILE__, __LINE__); } if (rpn_vec.size() == 1 && rpn_vec[0].type == E_FML_NUMBER) { @@ -629,7 +689,9 @@ static int parse_rpn_vector(vector& rpn_vec) { do { ivec++; /* first item should never be operator anyway */ if (ivec == (int)rpn_vec.size()) { - throw vtr::VtrError(vtr::string_fmt("parse_rpn_vector(): found multiple numbers in formula, but no operator\n"), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("parse_rpn_vector(): found multiple numbers in formula, but no operator\n"), + __FILE__, __LINE__); } } while (E_FML_OPERATOR != rpn_vec[ivec].type); @@ -659,13 +721,18 @@ static int apply_rpn_op(const Formula_Object& arg1, const Formula_Object& arg2, /* arguments must be numbers or variables */ if (E_FML_NUMBER != arg1.type || E_FML_NUMBER != arg2.type) { if (E_FML_VARIABLE != arg1.type && E_FML_VARIABLE != arg2.type) { - throw vtr::VtrError(vtr::string_fmt("in apply_rpn_op: one of the arguments is not a number or variable(was '%s %s %s')\n", arg1.to_string().c_str(), op.to_string().c_str(), arg2.to_string().c_str()), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("in apply_rpn_op: one of the arguments is not a number or variable(was '%s %s %s')\n", + arg1.to_string().c_str(), op.to_string().c_str(), arg2.to_string().c_str()), + __FILE__, __LINE__); } } /* check that op is actually an operation */ if (E_FML_OPERATOR != op.type) { - throw vtr::VtrError(vtr::string_fmt("in apply_rpn_op: the object specified as the operation is not of operation type\n"), __FILE__, __LINE__); + throw vtr::VtrError( + vtr::string_fmt("in apply_rpn_op: the object specified as the operation is not of operation type\n"), + __FILE__, __LINE__); } /* apply operation to arguments */ @@ -722,7 +789,8 @@ static int apply_rpn_op(const Formula_Object& arg1, const Formula_Object& arg2, result = additional_assignment_op(arg1.data.num, arg2.data.num); break; default: - throw vtr::VtrError(vtr::string_fmt("in apply_rpn_op: invalid operation: %d\n", op.data.op), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("in apply_rpn_op: invalid operation: %d\n", op.data.op), __FILE__, + __LINE__); break; } @@ -766,10 +834,7 @@ static bool is_operator(const char ch) { //returns true if string signifies a function e.g max, min static bool is_function(const std::string& name) { - if (name == "min" - || name == "max" - || name == "gcd" - || name == "lcm") { + if (name == "min" || name == "max" || name == "gcd" || name == "lcm") { return true; } return false; @@ -797,7 +862,9 @@ t_compound_operator is_compound_op(const char* ch) { //checks if the entered string is a known variable name static bool is_variable(const std::string& var_name) { - if (same_string(var_name, "from_block") || same_string(var_name, "temp_count") || same_string(var_name, "move_num") || same_string(var_name, "route_net_id") || same_string(var_name, "in_blocks_affected") || same_string(var_name, "router_iter")) { + if (same_string(var_name, "from_block") || same_string(var_name, "temp_count") || same_string(var_name, "move_num") + || same_string(var_name, "route_net_id") || same_string(var_name, "in_blocks_affected") + || same_string(var_name, "router_iter")) { return true; } return false; @@ -808,17 +875,21 @@ static bool is_variable(const std::string& var_name) { static int identifier_length(const char* str) { int ichar = 0; - if (!str) return 0; + if (!str) + return 0; while (str[ichar] != '\0') { //No whitespace - if (str[ichar] == ' ') break; + if (str[ichar] == ' ') + break; //Not an operator - if (is_operator(str[ichar])) break; + if (is_operator(str[ichar])) + break; //First char must not be a number - if (ichar == 0 && is_char_number(str[ichar])) break; + if (ichar == 0 && is_char_number(str[ichar])) + break; ++ichar; //Next character } @@ -894,6 +965,4 @@ int in_blocks_affected(const std::string& expression_left) { } //namespace vtr //returns the global variable that holds all values that can trigger a breakpoint and are updated by the router and placer -BreakpointStateGlobals* get_bp_state_globals() { - return &bp_state_globals; -} +BreakpointStateGlobals* get_bp_state_globals() { return &bp_state_globals; } diff --git a/libs/libvtrutil/src/vtr_expr_eval.h b/libs/libvtrutil/src/vtr_expr_eval.h index 3c528cccd37..c14dafa31a6 100644 --- a/libs/libvtrutil/src/vtr_expr_eval.h +++ b/libs/libvtrutil/src/vtr_expr_eval.h @@ -41,9 +41,7 @@ namespace vtr { class t_formula_data { public: ///@brief clears all the formula data - void clear() { - vars_.clear(); - } + void clear() { vars_.clear(); } ///@brief set the value of a specific part of the formula void set_var_value(vtr::string_view var, int value) { vars_[var] = value; } @@ -52,16 +50,15 @@ class t_formula_data { void set_var_value(const char* var, int value) { vars_[vtr::string_view(var)] = value; } ///@brief get the value of a specific part of the formula - int get_var_value(const std::string& var) const { - return get_var_value(vtr::string_view(var.data(), var.size())); - } + int get_var_value(const std::string& var) const { return get_var_value(vtr::string_view(var.data(), var.size())); } ///@brief get the value of a specific part of the formula (the var can be c-style string) int get_var_value(vtr::string_view var) const { auto iter = vars_.find(var); if (iter == vars_.end()) { std::string copy(var.data(), var.size()); - throw vtr::VtrError(vtr::string_fmt("No value found for variable '%s' from expression\n", copy.c_str()), __FILE__, __LINE__); + throw vtr::VtrError(vtr::string_fmt("No value found for variable '%s' from expression\n", copy.c_str()), + __FILE__, __LINE__); } return iter->second; @@ -146,9 +143,7 @@ class Formula_Object { } data; ///@brief constructor - Formula_Object() { - this->type = E_FML_UNDEFINED; - } + Formula_Object() { this->type = E_FML_UNDEFINED; } ///@brief convert enum to string std::string to_string() const { diff --git a/libs/libvtrutil/src/vtr_flat_map.h b/libs/libvtrutil/src/vtr_flat_map.h index 2c0b34f8536..ec228dc33f3 100644 --- a/libs/libvtrutil/src/vtr_flat_map.h +++ b/libs/libvtrutil/src/vtr_flat_map.h @@ -94,9 +94,7 @@ class flat_map { } ///@brief direct vector constructor - explicit flat_map(Storage&& values) { - assign(std::move(values)); - } + explicit flat_map(Storage&& values) { assign(std::move(values)); } /** * @brief Move the values @@ -243,7 +241,8 @@ class flat_map { iterator insert(const_iterator position, const value_type& value) { //In a legal position VTR_ASSERT(position == begin() || value_comp()(*(position - 1), value)); - VTR_ASSERT((size() > 0 && (position + 1) == end()) || position == end() || !value_comp()(*(position + 1), value)); + VTR_ASSERT((size() > 0 && (position + 1) == end()) || position == end() + || !value_comp()(*(position + 1), value)); iterator iter = vec_.insert(position, value); @@ -254,7 +253,8 @@ class flat_map { iterator emplace(const_iterator position, const value_type& value) { //In a legal position VTR_ASSERT(position == begin() || value_comp()(*(position - 1), value)); - VTR_ASSERT((size() > 0 && (position + 1) == end()) || position == end() || !value_comp()(*(position + 1), value)); + VTR_ASSERT((size() > 0 && (position + 1) == end()) || position == end() + || !value_comp()(*(position + 1), value)); iterator iter = vec_.emplace(position, value); @@ -280,14 +280,10 @@ class flat_map { } ///@brief Erase at iterator - void erase(const_iterator position) { - vec_.erase(position); - } + void erase(const_iterator position) { vec_.erase(position); } ///@brief Erase range - void erase(const_iterator first, const_iterator last) { - vec_.erase(first, last); - } + void erase(const_iterator first, const_iterator last) { vec_.erase(first, last); } ///@brief swap two flat maps void swap(flat_map& other) { std::swap(*this, other); } @@ -344,9 +340,7 @@ class flat_map { } ///@brief Return the count of occurances of a key - size_type count(const key_type& key) const { - return (find(key) == end()) ? 0 : 1; - } + size_type count(const key_type& key) const { return (find(key) == end()) ? 0 : 1; } ///@brief lower bound function iterator lower_bound(const key_type& key) { @@ -390,9 +384,7 @@ class flat_map { return !key_comp()(lhs, rhs) && !key_comp()(rhs, lhs); } - void sort() { - std::sort(vec_.begin(), vec_.end(), value_comp()); - } + void sort() { std::sort(vec_.begin(), vec_.end(), value_comp()); } void uniquify() { //Uniquify @@ -449,9 +441,7 @@ class flat_map2 : public flat_map { } ///@brief [] operator - T& operator[](const K& key) { - return const_cast(const_cast(this)->operator[](key)); - } + T& operator[](const K& key) { return const_cast(const_cast(this)->operator[](key)); } }; ///@brief A class to perform the comparison operation for the flat map @@ -460,17 +450,11 @@ class flat_map::value_compare { friend class flat_map; public: - bool operator()(const value_type& x, const value_type& y) const { - return comp(x.first, y.first); - } + bool operator()(const value_type& x, const value_type& y) const { return comp(x.first, y.first); } //For std::lower_bound, std::upper_bound - bool operator()(const value_type& x, const key_type& y) const { - return comp(x.first, y); - } - bool operator()(const key_type& x, const value_type& y) const { - return comp(x, y.first); - } + bool operator()(const value_type& x, const key_type& y) const { return comp(x.first, y); } + bool operator()(const key_type& x, const value_type& y) const { return comp(x, y.first); } private: value_compare(Compare c) diff --git a/libs/libvtrutil/src/vtr_geometry.tpp b/libs/libvtrutil/src/vtr_geometry.tpp index e0e99fb7762..fa39a5a9110 100644 --- a/libs/libvtrutil/src/vtr_geometry.tpp +++ b/libs/libvtrutil/src/vtr_geometry.tpp @@ -22,8 +22,7 @@ T Point::y() const { template bool operator==(Point lhs, Point rhs) { - return lhs.x() == rhs.x() - && lhs.y() == rhs.y(); + return lhs.x() == rhs.x() && lhs.y() == rhs.y(); } template @@ -109,8 +108,7 @@ template template::value>::type...> Rect::Rect(Point point) : bottom_left_(point) - , top_right_(point.x() + 1, - point.y() + 1) { + , top_right_(point.x() + 1, point.y() + 1) { //pass } @@ -162,29 +160,25 @@ T Rect::height() const { template bool Rect::contains(Point point) const { //Up-to but not including right or top edges - return point.x() >= xmin() && point.x() < xmax() - && point.y() >= ymin() && point.y() < ymax(); + return point.x() >= xmin() && point.x() < xmax() && point.y() >= ymin() && point.y() < ymax(); } template bool Rect::strictly_contains(Point point) const { //Excluding edges - return point.x() > xmin() && point.x() < xmax() - && point.y() > ymin() && point.y() < ymax(); + return point.x() > xmin() && point.x() < xmax() && point.y() > ymin() && point.y() < ymax(); } template bool Rect::coincident(Point point) const { //Including right or top edges - return point.x() >= xmin() && point.x() <= xmax() - && point.y() >= ymin() && point.y() <= ymax(); + return point.x() >= xmin() && point.x() <= xmax() && point.y() >= ymin() && point.y() <= ymax(); } template bool Rect::contains(const Rect& other) const { //Including all edges - return other.xmin() >= xmin() && other.xmax() <= xmax() - && other.ymin() >= ymin() && other.ymax() <= ymax(); + return other.xmin() >= xmin() && other.xmax() <= xmax() && other.ymin() >= ymin() && other.ymax() <= ymax(); } template @@ -194,8 +188,7 @@ bool Rect::empty() const { template bool operator==(const Rect& lhs, const Rect& rhs) { - return lhs.bottom_left() == rhs.bottom_left() - && lhs.top_right() == rhs.top_right(); + return lhs.bottom_left() == rhs.bottom_left() && lhs.top_right() == rhs.top_right(); } template @@ -205,17 +198,13 @@ bool operator!=(const Rect& lhs, const Rect& rhs) { template Rect bounding_box(const Rect& lhs, const Rect& rhs) { - return Rect(std::min(lhs.xmin(), rhs.xmin()), - std::min(lhs.ymin(), rhs.ymin()), - std::max(lhs.xmax(), rhs.xmax()), + return Rect(std::min(lhs.xmin(), rhs.xmin()), std::min(lhs.ymin(), rhs.ymin()), std::max(lhs.xmax(), rhs.xmax()), std::max(lhs.ymax(), rhs.ymax())); } template Rect intersection(const Rect& lhs, const Rect& rhs) { - return Rect(std::max(lhs.xmin(), rhs.xmin()), - std::max(lhs.ymin(), rhs.ymin()), - std::min(lhs.xmax(), rhs.xmax()), + return Rect(std::max(lhs.xmin(), rhs.xmin()), std::max(lhs.ymin(), rhs.ymin()), std::min(lhs.xmax(), rhs.xmax()), std::min(lhs.ymax(), rhs.ymax())); } template @@ -229,8 +218,7 @@ static void print_rect(FILE* fp, const Rect rect) { template::value>::type...> Point sample(const vtr::Rect& r, T x, T y, T d) { VTR_ASSERT(d > 0 && x <= d && y <= d && !r.empty()); - return Point((r.xmin() * (d - x) + r.xmax() * x + d / 2) / d, - (r.ymin() * (d - y) + r.ymax() * y + d / 2) / d); + return Point((r.xmin() * (d - x) + r.xmax() * x + d / 2) / d, (r.ymin() * (d - y) + r.ymax() * y + d / 2) / d); } template diff --git a/libs/libvtrutil/src/vtr_linear_map.h b/libs/libvtrutil/src/vtr_linear_map.h index c0ef38cfca2..b02a57af2e6 100644 --- a/libs/libvtrutil/src/vtr_linear_map.h +++ b/libs/libvtrutil/src/vtr_linear_map.h @@ -225,9 +225,7 @@ class linear_map { } ///@brief Returns the number of elements in the range [first,last) that compare equal to val. - size_type count(const key_type& key) const { - return (find(key) == end()) ? 0 : 1; - } + size_type count(const key_type& key) const { return (find(key) == end()) ? 0 : 1; } ///@brief Returns an iterator pointing to the first element in the range [first,last) which does not compare less than val. iterator lower_bound(const key_type& key) { @@ -236,9 +234,7 @@ class linear_map { } ///@brief Returns a constant iterator pointing to the first element in the range [first,last) which does not compare less than val. - const_iterator lower_bound(const key_type& key) const { - return find(key); - } + const_iterator lower_bound(const key_type& key) const { return find(key); } ///@brief Returns an iterator pointing to the first element in the range [first,last) which compares greater than val. iterator upper_bound(const key_type& key) { @@ -277,9 +273,7 @@ class linear_map { } public: - friend void swap(linear_map& lhs, linear_map& rhs) { - std::swap(lhs.vec_, rhs.vec_); - } + friend void swap(linear_map& lhs, linear_map& rhs) { std::swap(lhs.vec_, rhs.vec_); } private: iterator convert_to_iterator(const_iterator const_iter) { diff --git a/libs/libvtrutil/src/vtr_list.h b/libs/libvtrutil/src/vtr_list.h index 8403742c70e..65747cb332c 100644 --- a/libs/libvtrutil/src/vtr_list.h +++ b/libs/libvtrutil/src/vtr_list.h @@ -15,8 +15,7 @@ struct t_linked_vptr { }; ///@brief Inserts a node to a list -t_linked_vptr* insert_in_vptr_list(t_linked_vptr* head, - void* vptr_to_add); +t_linked_vptr* insert_in_vptr_list(t_linked_vptr* head, void* vptr_to_add); ///@brief Delete a list t_linked_vptr* delete_in_vptr_list(t_linked_vptr* head); diff --git a/libs/libvtrutil/src/vtr_log.cpp b/libs/libvtrutil/src/vtr_log.cpp index 0615e71abe5..da609f6a687 100644 --- a/libs/libvtrutil/src/vtr_log.cpp +++ b/libs/libvtrutil/src/vtr_log.cpp @@ -13,15 +13,11 @@ PrintHandlerWarning printf_warning = log_print_warning; PrintHandlerError printf_error = log_print_error; PrintHandlerDirect printf_direct = log_print_direct; -void set_log_file(const char* filename) { - log_set_output_file(filename); -} +void set_log_file(const char* filename) { log_set_output_file(filename); } } // namespace vtr -void add_warnings_to_suppress(std::string function_name) { - warnings_to_suppress.insert(function_name); -} +void add_warnings_to_suppress(std::string function_name) { warnings_to_suppress.insert(function_name); } void set_noisy_warn_log_file(std::string log_file_name) { std::ofstream log; @@ -30,7 +26,11 @@ void set_noisy_warn_log_file(std::string log_file_name) { noisy_warn_log_file = log_file_name; } -void print_or_suppress_warning(const char* pszFileName, unsigned int lineNum, const char* pszFuncName, const char* pszMessage, ...) { +void print_or_suppress_warning(const char* pszFileName, + unsigned int lineNum, + const char* pszFuncName, + const char* pszMessage, + ...) { std::string function_name(pszFuncName); va_list va_args; diff --git a/libs/libvtrutil/src/vtr_log.h b/libs/libvtrutil/src/vtr_log.h index 3c52e249d9d..753e11b8c7d 100644 --- a/libs/libvtrutil/src/vtr_log.h +++ b/libs/libvtrutil/src/vtr_log.h @@ -77,25 +77,29 @@ #define VTR_LOGFF_WARN(file, line, func, ...) VTR_LOGVFF_WARN(true, file, line, func, __VA_ARGS__) // Conditional logging and custom file-line location macros -#define VTR_LOGVF(expr, file, line, ...) \ - do { \ - if (expr) vtr::printf(__VA_ARGS__); \ +#define VTR_LOGVF(expr, file, line, ...) \ + do { \ + if (expr) \ + vtr::printf(__VA_ARGS__); \ } while (false) -#define VTR_LOGVF_WARN(expr, file, line, ...) \ - do { \ - if (expr) print_or_suppress_warning(file, line, __func__, __VA_ARGS__); \ +#define VTR_LOGVF_WARN(expr, file, line, ...) \ + do { \ + if (expr) \ + print_or_suppress_warning(file, line, __func__, __VA_ARGS__); \ } while (false) -#define VTR_LOGVF_ERROR(expr, file, line, ...) \ - do { \ - if (expr) vtr::printf_error(file, line, __VA_ARGS__); \ +#define VTR_LOGVF_ERROR(expr, file, line, ...) \ + do { \ + if (expr) \ + vtr::printf_error(file, line, __VA_ARGS__); \ } while (false) // Conditional logging and custom file-line-func location macros -#define VTR_LOGVFF_WARN(expr, file, line, func, ...) \ - do { \ - if (expr) print_or_suppress_warning(file, line, func, __VA_ARGS__); \ +#define VTR_LOGVFF_WARN(expr, file, line, func, ...) \ + do { \ + if (expr) \ + print_or_suppress_warning(file, line, func, __VA_ARGS__); \ } while (false) /* @@ -118,11 +122,11 @@ // Debug logging macros #ifdef VTR_ENABLE_DEBUG_LOGGING //Enable -# define VTR_LOG_DEBUG(...) VTR_LOG(__VA_ARGS__) -# define VTR_LOGV_DEBUG(expr, ...) VTR_LOGV(expr, __VA_ARGS__) +#define VTR_LOG_DEBUG(...) VTR_LOG(__VA_ARGS__) +#define VTR_LOGV_DEBUG(expr, ...) VTR_LOGV(expr, __VA_ARGS__) #else //Disable -# define VTR_LOG_DEBUG(...) VTR_LOG_NOP(__VA_ARGS__) -# define VTR_LOGV_DEBUG(expr, ...) VTR_LOGV_NOP(expr, __VA_ARGS__) +#define VTR_LOG_DEBUG(...) VTR_LOG_NOP(__VA_ARGS__) +#define VTR_LOGV_DEBUG(expr, ...) VTR_LOGV_NOP(expr, __VA_ARGS__) #endif namespace vtr { @@ -162,6 +166,10 @@ void set_noisy_warn_log_file(std::string log_file_name); * is in the set of warnings_to_suppress. If so, the warning is printed on the * noisy_warn_log_file, otherwise it is printed on stdout (or the regular log file) */ -void print_or_suppress_warning(const char* pszFileName, unsigned int lineNum, const char* pszFuncName, const char* pszMessage, ...); +void print_or_suppress_warning(const char* pszFileName, + unsigned int lineNum, + const char* pszFuncName, + const char* pszMessage, + ...); #endif diff --git a/libs/libvtrutil/src/vtr_logic.h b/libs/libvtrutil/src/vtr_logic.h index 30d44c4a6b9..ce3dbbe9d97 100644 --- a/libs/libvtrutil/src/vtr_logic.h +++ b/libs/libvtrutil/src/vtr_logic.h @@ -4,12 +4,12 @@ #define VTR_LOGIC_H #ifdef FALSE -# undef FALSE +#undef FALSE #endif #define FALSE FALSE #ifdef TRUE -# undef TRUE +#undef TRUE #endif #define TRUE TRUE @@ -21,12 +21,7 @@ namespace vtr { /** * @brief This class represents the different supported logic values */ -enum class LogicValue { - FALSE = 0, - TRUE = 1, - DONT_CARE = 2, - UNKOWN = 3 -}; +enum class LogicValue { FALSE = 0, TRUE = 1, DONT_CARE = 2, UNKOWN = 3 }; } // namespace vtr diff --git a/libs/libvtrutil/src/vtr_math.cpp b/libs/libvtrutil/src/vtr_math.cpp index 32594753c4c..2d91ceca579 100644 --- a/libs/libvtrutil/src/vtr_math.cpp +++ b/libs/libvtrutil/src/vtr_math.cpp @@ -50,7 +50,9 @@ Y linear_interpolate_or_extrapolate(const std::map* xy_map, X requested_x) /* the intention of this function is to interpolate/extrapolate. we can't do so with less than 2 values in the xy_map */ if (xy_map->size() < 2) { - throw VtrError("linear_interpolate_or_extrapolate: cannot interpolate/extrapolate based on less than 2 (x,y) pairs", __FILE__, __LINE__); + throw VtrError( + "linear_interpolate_or_extrapolate: cannot interpolate/extrapolate based on less than 2 (x,y) pairs", + __FILE__, __LINE__); } auto itr = xy_map->find(requested_x); @@ -100,7 +102,9 @@ Y linear_interpolate_or_extrapolate(const std::map* xy_map, X requested_x) return result; } -template double linear_interpolate_or_extrapolate(const std::map* xy_map, int requested_x); /* (int,double) */ -template double linear_interpolate_or_extrapolate(const std::map* xy_map, double requested_x); /* (double,double) */ +template double linear_interpolate_or_extrapolate(const std::map* xy_map, + int requested_x); /* (int,double) */ +template double linear_interpolate_or_extrapolate(const std::map* xy_map, + double requested_x); /* (double,double) */ } // namespace vtr diff --git a/libs/libvtrutil/src/vtr_math.h b/libs/libvtrutil/src/vtr_math.h index 74b4ccebf58..2e7bccbe2a9 100644 --- a/libs/libvtrutil/src/vtr_math.h +++ b/libs/libvtrutil/src/vtr_math.h @@ -150,8 +150,10 @@ constexpr double DEFAULT_ABS_TOL = 0; ///@brief Return true if a and b values are close to each other template bool isclose(T a, T b, T rel_tol, T abs_tol) { - if (std::isinf(a) && std::isinf(b)) return (std::signbit(a) == std::signbit(b)); - if (std::isnan(a) && std::isnan(b)) return false; + if (std::isinf(a) && std::isinf(b)) + return (std::signbit(a) == std::signbit(b)); + if (std::isnan(a) && std::isnan(b)) + return false; T abs_largest = std::max(std::abs(a), std::abs(b)); return std::abs(a - b) <= std::max(rel_tol * abs_largest, abs_tol); diff --git a/libs/libvtrutil/src/vtr_memory.cpp b/libs/libvtrutil/src/vtr_memory.cpp index 39d6b244b13..47d0e156746 100644 --- a/libs/libvtrutil/src/vtr_memory.cpp +++ b/libs/libvtrutil/src/vtr_memory.cpp @@ -10,21 +10,17 @@ #include "vtr_log.h" #ifndef __GLIBC__ -# include +#include #else -# include +#include #endif namespace vtr { #ifndef __GLIBC__ -int malloc_trim(size_t /*pad*/) { - return 0; -} +int malloc_trim(size_t /*pad*/) { return 0; } #else -int malloc_trim(size_t pad) { - return ::malloc_trim(pad); -} +int malloc_trim(size_t pad) { return ::malloc_trim(pad); } #endif void* free(void* some) { @@ -64,8 +60,7 @@ void* realloc(void* ptr, size_t size) { ret = std::realloc(ptr, size); if (nullptr == ret && size != 0) { - throw VtrError(string_fmt("Unable to realloc memory (ptr=%p, size=%d).", ptr, size), - __FILE__, __LINE__); + throw VtrError(string_fmt("Unable to realloc memory (ptr=%p, size=%d).", ptr, size), __FILE__, __LINE__); } return ret; } diff --git a/libs/libvtrutil/src/vtr_memory.h b/libs/libvtrutil/src/vtr_memory.h index 72e92ebe8f8..4c9877ec2cc 100644 --- a/libs/libvtrutil/src/vtr_memory.h +++ b/libs/libvtrutil/src/vtr_memory.h @@ -5,8 +5,8 @@ #include #ifdef _WIN32 -# include -# include +#include +#include #endif namespace vtr { diff --git a/libs/libvtrutil/src/vtr_ndmatrix.h b/libs/libvtrutil/src/vtr_ndmatrix.h index dc69c7f60ba..df956112777 100644 --- a/libs/libvtrutil/src/vtr_ndmatrix.h +++ b/libs/libvtrutil/src/vtr_ndmatrix.h @@ -47,10 +47,9 @@ class NdMatrixProxy { VTR_ASSERT_SAFE_MSG(dim_sizes_[1] > 0, "Can not index into zero-sized dimension"); // Strip off one dimension - return NdMatrixProxy( - dim_sizes_ + 1, // Pass the dimension information - dim_strides_ + 1, // Pass the stride for the next dimension - start_ + dim_strides_[0] * index); // Advance to index in this dimension + return NdMatrixProxy(dim_sizes_ + 1, // Pass the dimension information + dim_strides_ + 1, // Pass the stride for the next dimension + start_ + dim_strides_[0] * index); // Advance to index in this dimension } ///@brief [] operator @@ -107,9 +106,7 @@ class NdMatrixProxy { * Note that it is the caller's responsibility to use this correctly; care must be taken * not to clobber elements in other dimensions */ - const T* data() const { - return start_; - } + const T* data() const { return start_; } ///@brief same as above but allow update the value T* data() { @@ -149,9 +146,7 @@ class NdMatrixBase { static_assert(N >= 1, "Minimum dimension 1"); ///@brief An empty matrix (all dimensions size zero) - NdMatrixBase() { - clear(); - } + NdMatrixBase() { clear(); } /** * @brief Specified dimension sizes: @@ -161,9 +156,7 @@ class NdMatrixBase { * ... * with optional fill value */ - NdMatrixBase(std::array dim_sizes, T value = T()) { - resize(dim_sizes, value); - } + NdMatrixBase(std::array dim_sizes, T value = T()) { resize(dim_sizes, value); } public: //Accessors ///@brief Returns the size of the matrix (number of elements) @@ -173,14 +166,10 @@ class NdMatrixBase { } ///@brief Returns true if there are no elements in the matrix - bool empty() const { - return size() == 0; - } + bool empty() const { return size() == 0; } ///@brief Returns the number of dimensions (i.e. N) - size_t ndims() const { - return dim_sizes_.size(); - } + size_t ndims() const { return dim_sizes_.size(); } ///@brief Returns the size of the ith dimension size_t dim_size(size_t i) const { @@ -217,9 +206,7 @@ class NdMatrixBase { public: //Mutators ///@brief Set all elements to 'value' - void fill(T value) { - std::fill(data_.get(), data_.get() + size(), value); - } + void fill(T value) { std::fill(data_.get(), data_.get() + size(), value); } /** * @brief Resize the matrix to the specified dimension ranges @@ -284,9 +271,7 @@ class NdMatrixBase { private: ///@brief Allocate space for all the elements - void alloc() { - data_ = std::make_unique(size()); - } + void alloc() { data_ = std::make_unique(size()); } ///@brief Returns the size of the matrix (number of elements) calculated from the current dimensions size_t calc_size() const { diff --git a/libs/libvtrutil/src/vtr_ndoffsetmatrix.h b/libs/libvtrutil/src/vtr_ndoffsetmatrix.h index f65da2908b9..b07e37f0c82 100644 --- a/libs/libvtrutil/src/vtr_ndoffsetmatrix.h +++ b/libs/libvtrutil/src/vtr_ndoffsetmatrix.h @@ -85,10 +85,11 @@ class NdOffsetMatrixProxy { int next_dim_stride = dim_stride_ / dim_ranges_[idim_ + 1].size(); //Strip off one dimension - return NdOffsetMatrixProxy(dim_ranges_, //Pass the dimension information - idim_ + 1, //Pass the next dimension - next_dim_stride, //Pass the stride for the next dimension - start_ + dim_stride_ * effective_index); //Advance to index in this dimension + return NdOffsetMatrixProxy( + dim_ranges_, //Pass the dimension information + idim_ + 1, //Pass the next dimension + next_dim_stride, //Pass the stride for the next dimension + start_ + dim_stride_ * effective_index); //Advance to index in this dimension } ///@brief [] operator @@ -173,9 +174,7 @@ class NdOffsetMatrixBase { static_assert(N >= 1, "Minimum dimension 1"); ///@brief An empty matrix (all dimensions size zero) - NdOffsetMatrixBase() { - clear(); - } + NdOffsetMatrixBase() { clear(); } /** * @brief Specified dimension sizes: @@ -185,9 +184,7 @@ class NdOffsetMatrixBase { * ... * with optional fill value */ - NdOffsetMatrixBase(std::array dim_sizes, T value = T()) { - resize(dim_sizes, value); - } + NdOffsetMatrixBase(std::array dim_sizes, T value = T()) { resize(dim_sizes, value); } /** * @brief Specified dimension index ranges: @@ -197,9 +194,7 @@ class NdOffsetMatrixBase { * ... * with optional fill value */ - NdOffsetMatrixBase(std::array dim_ranges, T value = T()) { - resize(dim_ranges, value); - } + NdOffsetMatrixBase(std::array dim_ranges, T value = T()) { resize(dim_ranges, value); } public: //Accessors ///@brief Returns the size of the matrix (number of elements) @@ -213,14 +208,10 @@ class NdOffsetMatrixBase { } ///@brief Returns true if there are no elements in the matrix - bool empty() const { - return size() == 0; - } + bool empty() const { return size() == 0; } ///@brief Returns the number of dimensions (i.e. N) - size_t ndims() const { - return dim_ranges_.size(); - } + size_t ndims() const { return dim_ranges_.size(); } ///@brief Returns the size of the ith dimension size_t dim_size(size_t i) const { @@ -245,9 +236,7 @@ class NdOffsetMatrixBase { public: //Mutators ///@brief Set all elements to 'value' - void fill(T value) { - std::fill(data_.get(), data_.get() + size(), value); - } + void fill(T value) { std::fill(data_.get(), data_.get() + size(), value); } /** * @brief Resize the matrix to the specified dimensions @@ -316,9 +305,7 @@ class NdOffsetMatrixBase { private: // Allocate space for all the elements - void alloc() { - data_ = std::make_unique(size()); - } + void alloc() { data_ = std::make_unique(size()); } protected: std::array dim_ranges_; @@ -388,7 +375,8 @@ class NdOffsetMatrix : public NdOffsetMatrixBase { const NdOffsetMatrixProxy operator[](int index) const { VTR_ASSERT_SAFE_MSG(this->dim_size(0) > 0, "Can not index into size zero dimension"); VTR_ASSERT_SAFE_MSG(this->dim_size(1) > 0, "Can not index into size zero dimension"); - VTR_ASSERT_SAFE_MSG(index >= this->dim_ranges_[0].begin_index(), "Index out of range (below dimension minimum)"); + VTR_ASSERT_SAFE_MSG(index >= this->dim_ranges_[0].begin_index(), + "Index out of range (below dimension minimum)"); VTR_ASSERT_SAFE_MSG(index < this->dim_ranges_[0].end_index(), "Index out of range (above dimension maximum)"); /* @@ -406,10 +394,11 @@ class NdOffsetMatrix : public NdOffsetMatrixBase { int next_dim_stride = dim_stride / this->dim_size(1); //Peel off the first dimension - return NdOffsetMatrixProxy(this->dim_ranges_.data(), //Pass the dimension information - 1, //Pass the next dimension - next_dim_stride, //Pass the stride for the next dimension - this->data_.get() + dim_stride * effective_index); //Advance to index in this dimension + return NdOffsetMatrixProxy( + this->dim_ranges_.data(), //Pass the dimension information + 1, //Pass the next dimension + next_dim_stride, //Pass the stride for the next dimension + this->data_.get() + dim_stride * effective_index); //Advance to index in this dimension } /** @@ -438,7 +427,8 @@ class NdOffsetMatrix : public NdOffsetMatrixBase { ///@brief Access an element (immutable) const T& operator[](int index) const { VTR_ASSERT_SAFE_MSG(this->dim_size(0) > 0, "Can not index into size zero dimension"); - VTR_ASSERT_SAFE_MSG(index >= this->dim_ranges_[0].begin_index(), "Index out of range (below dimension minimum)"); + VTR_ASSERT_SAFE_MSG(index >= this->dim_ranges_[0].begin_index(), + "Index out of range (below dimension minimum)"); VTR_ASSERT_SAFE_MSG(index < this->dim_ranges_[0].end_index(), "Index out of range (above dimension maximum)"); return this->data_[index]; diff --git a/libs/libvtrutil/src/vtr_ragged_matrix.h b/libs/libvtrutil/src/vtr_ragged_matrix.h index 862047e0b1e..3ac31786898 100644 --- a/libs/libvtrutil/src/vtr_ragged_matrix.h +++ b/libs/libvtrutil/src/vtr_ragged_matrix.h @@ -83,9 +83,7 @@ class FlatRaggedMatrix { public: //Accessors ///@brief Iterators to *all* elements - auto begin() { - return data_.begin(); - } + auto begin() { return data_.begin(); } ///@brief Iterator to the last element of the matrix auto end() { @@ -96,9 +94,7 @@ class FlatRaggedMatrix { } ///@brief Iterator to the first element of the matrix (immutable) - auto begin() const { - return data_.begin(); - } + auto begin() const { return data_.begin(); } ///@brief Iterator to the last element of the matrix (immutable) auto end() const { @@ -117,17 +113,14 @@ class FlatRaggedMatrix { } ///@brief Return true if empty - bool empty() const { - return size() == 0; - } + bool empty() const { return size() == 0; } ///@brief Indexing operators for the first dimension vtr::array_view operator[](Index0 i) { int idx = size_t(i); T* first = &data_[first_elem_[idx]]; T* last = &data_[first_elem_[idx + 1]]; - return vtr::array_view(first, - last - first); + return vtr::array_view(first, last - first); } ///@brief Indexing operators for the first dimension (immutable) @@ -135,8 +128,7 @@ class FlatRaggedMatrix { int idx = size_t(i); const T* first = &data_[first_elem_[idx]]; const T* last = &data_[first_elem_[idx + 1]]; - return vtr::array_view(first, - last - first); + return vtr::array_view(first, last - first); } ///@brief Clears the matrix @@ -192,14 +184,10 @@ class FlatRaggedMatrix { } ///@brief Return iterator to the first element - U* data() { - return first_; - } + U* data() { return first_; } ///@brief Return iterator to the first element (immutable) - U* data() const { - return first_; - } + U* data() const { return first_; } private: U* first_; @@ -230,17 +218,11 @@ class FlatRaggedMatrix { return *this; } - bool operator==(const RowLengthIterator& other) { - return irow_ == other.irow_; - } + bool operator==(const RowLengthIterator& other) { return irow_ == other.irow_; } - bool operator!=(const RowLengthIterator& other) { - return !(*this == other); - } + bool operator!=(const RowLengthIterator& other) { return !(*this == other); } - difference_type operator-(const RowLengthIterator& other) { - return irow_ - other.irow_; - } + difference_type operator-(const RowLengthIterator& other) { return irow_ - other.irow_; } value_type operator*() { //Call the callback to get the row length diff --git a/libs/libvtrutil/src/vtr_random.cpp b/libs/libvtrutil/src/vtr_random.cpp index 7e3f8ffb25d..508ce233d11 100644 --- a/libs/libvtrutil/src/vtr_random.cpp +++ b/libs/libvtrutil/src/vtr_random.cpp @@ -29,9 +29,7 @@ void srandom(int seed) { } /* returns the random_state value */ -RandState get_random_state() { - return random_state; -} +RandState get_random_state() { return random_state; } int irand(int imax, RandState& state) { #ifdef SPEC_CPU @@ -46,7 +44,7 @@ int irand(int imax, RandState& state) { ival = state & (IM - 1); /* Modulus */ ival = (int)((float)ival * (float)(imax + 0.999) / (float)IM); -# ifdef CHECK_RAND +#ifdef CHECK_RAND if ((ival < 0) || (ival > imax)) { if (ival == imax + 1) { /* Due to random floating point rounding, sometimes above calculation gives number greater than ival by 1 */ @@ -55,15 +53,13 @@ int irand(int imax, RandState& state) { throw VtrError(string_fmt("Bad value in my_irand, imax = %d ival = %d", imax, ival), __FILE__, __LINE__); } } -# endif +#endif return ival; #endif } -int irand(int imax) { - return irand(imax, random_state); -} +int irand(int imax) { return irand(imax, random_state); } float frand() { /* Creates a random float between 0 and 1. i.e. [0..1). */ @@ -78,11 +74,11 @@ float frand() { ival = random_state & (IM - 1); /* Modulus */ fval = (float)ival / (float)IM; -# ifdef CHECK_RAND +#ifdef CHECK_RAND if ((fval < 0) || (fval > 1.)) { throw VtrError(string_fmt("Bad value in my_frand, fval = %g", fval), __FILE__, __LINE__); } -# endif +#endif return (fval); #endif diff --git a/libs/libvtrutil/src/vtr_range.h b/libs/libvtrutil/src/vtr_range.h index 42375b24771..70cfc9c6872 100644 --- a/libs/libvtrutil/src/vtr_range.h +++ b/libs/libvtrutil/src/vtr_range.h @@ -72,13 +72,17 @@ class Range { * auto my_range = vtr::make_range(my_vec.begin(), my_vec.end()); */ template -constexpr auto make_range(T b, T e) { return Range(b, e); } +constexpr auto make_range(T b, T e) { + return Range(b, e); +} /** * @brief Creates a vtr::Range from a container */ template -inline auto make_range(const Container& c) { return make_range(std::begin(c), std::end(c)); } +inline auto make_range(const Container& c) { + return make_range(std::begin(c), std::end(c)); +} } // namespace vtr diff --git a/libs/libvtrutil/src/vtr_rusage.cpp b/libs/libvtrutil/src/vtr_rusage.cpp index a3b74c04c86..466e8264172 100644 --- a/libs/libvtrutil/src/vtr_rusage.cpp +++ b/libs/libvtrutil/src/vtr_rusage.cpp @@ -1,8 +1,8 @@ #include "vtr_rusage.h" #ifdef __unix__ -# include -# include +#include +#include #endif namespace vtr { diff --git a/libs/libvtrutil/src/vtr_small_vector.h b/libs/libvtrutil/src/vtr_small_vector.h index 5fe75520129..63d4d1b9bf1 100644 --- a/libs/libvtrutil/src/vtr_small_vector.h +++ b/libs/libvtrutil/src/vtr_small_vector.h @@ -111,24 +111,16 @@ class small_vector { public: //Accessors ///@brief Return a const_iterator to the first element - const_iterator begin() const { - return cbegin(); - } + const_iterator begin() const { return cbegin(); } ///@brief Return a const_iterator pointing to the past-the-end element in the container. - const_iterator end() const { - return cend(); - } + const_iterator end() const { return cend(); } ///@brief Return a const_reverse_iterator pointing to the last element in the container (i.e., its reverse beginning). - const_reverse_iterator rbegin() const { - return crbegin(); - } + const_reverse_iterator rbegin() const { return crbegin(); } ///@brief Return a const_reverse_iterator pointing to the theoretical element preceding the first element in the container (which is considered its reverse end). - const_reverse_iterator rend() const { - return crend(); - } + const_reverse_iterator rend() const { return crend(); } ///@brief Return a const_iterator pointing to the first element in the container. const_iterator cbegin() const { @@ -147,24 +139,16 @@ class small_vector { } ///@brief Return a const_reverse_iterator pointing to the last element in the container (i.e., its reverse beginning). - const_reverse_iterator crbegin() const { - return const_reverse_iterator(cend()); - } + const_reverse_iterator crbegin() const { return const_reverse_iterator(cend()); } ///@brief Return a const_reverse_iterator pointing to the theoretical element preceding the first element in the container (which is considered its reverse end). - const_reverse_iterator crend() const { - return const_reverse_iterator(cbegin()); - } + const_reverse_iterator crend() const { return const_reverse_iterator(cbegin()); } ///@brief return the vector size (Padding ensures long/short format sizes are always aligned) - size_type size() const { - return long_.size_; - } + size_type size() const { return long_.size_; } ///@brief Return the maximum size - size_t max_size() const { - return std::numeric_limits::max(); - } + size_t max_size() const { return std::numeric_limits::max(); } ///@brief Return the vector capacity size_type capacity() const { @@ -194,14 +178,10 @@ class small_vector { } ///@brief Return a constant reference to the first element - const_reference front() const { - return *begin(); - } + const_reference front() const { return *begin(); } ///@brief Return a constant reference to the last element - const_reference back() const { - return *(end() - 1); - } + const_reference back() const { return *(end() - 1); } ///@brief Return a constant pointer to the vector data const_pointer data() const { @@ -219,9 +199,7 @@ class small_vector { } ///@brief Return an iterator referring to the past-the-end element in the vector container. - iterator end() { - return const_cast(const_cast*>(this)->end()); - } + iterator end() { return const_cast(const_cast*>(this)->end()); } ///@brief Return a reverse iterator pointing to the last element in the vector (i.e., its reverse beginning). reverse_iterator rbegin() { @@ -230,14 +208,10 @@ class small_vector { } ///@brief Return a reverse iterator pointing to the theoretical element preceding the first element in the vector (which is considered its reverse end). - reverse_iterator rend() { - return reverse_iterator(const_cast*>(this)->begin()); - } + reverse_iterator rend() { return reverse_iterator(const_cast*>(this)->begin()); } ///@brief Resizes the container so that it contains n elements - void resize(size_type n) { - resize(n, value_type()); - } + void resize(size_type n) { resize(n, value_type()); } ///@brief Resizes the container so that it contains n elements and fills it with val void resize(size_type n, value_type val) { @@ -276,23 +250,15 @@ class small_vector { } ///@brief at() operator - reference at(size_t i) { - return const_cast(const_cast*>(this)->at(i)); - } + reference at(size_t i) { return const_cast(const_cast*>(this)->at(i)); } ///@brief Returns a reference to the first element in the vector. - reference front() { - return const_cast(const_cast*>(this)->front()); - } + reference front() { return const_cast(const_cast*>(this)->front()); } ///@brief Returns a reference to the last element in the vector. - reference back() { - return const_cast(const_cast*>(this)->back()); - } + reference back() { return const_cast(const_cast*>(this)->back()); } - pointer data() { - return const_cast(const_cast*>(this)->data()); - } + pointer data() { return const_cast(const_cast*>(this)->data()); } /** * @brief Assigns new contents to the vector, replacing its current contents, and modifying its size accordingly. @@ -311,18 +277,14 @@ class small_vector { * * Resize the vector to n and fill it with val */ - void assign(size_type n, const value_type& val) { - insert(begin(), n, val); - } + void assign(size_type n, const value_type& val) { insert(begin(), n, val); } /** * @brief Assigns new contents to the vector, replacing its current contents, and modifying its size accordingly. * * The compiler will automatically construct such objects from initializer list declarators (il) */ - void assign(std::initializer_list il) { - assign(il.begin(), il.end()); - } + void assign(std::initializer_list il) { assign(il.begin(), il.end()); } ///@brief Construct default value_type at new location void push_back(value_type value) { @@ -343,9 +305,7 @@ class small_vector { } ///@brief The vector is extended by inserting new elements before the element at the specified position, effectively increasing the container size by the number of elements inserted. - iterator insert(const_iterator position, const value_type& val) { - return insert(position, 1, val); - } + iterator insert(const_iterator position, const value_type& val) { return insert(position, 1, val); } /** * @brief Insert a new value @@ -412,9 +372,7 @@ class small_vector { //} ///@brief Removes from the vector a single element (position). - iterator erase(const_iterator position) { - return erase(position, position + 1); - } + iterator erase(const_iterator position) { return erase(position, position + 1); } ///@brief Removes from the vector either a range of elements ([first,last)). iterator erase(const_iterator first, const_iterator last) { @@ -491,9 +449,7 @@ class small_vector { } ///@brief Exchanges the content of the container by the content of x, which is another vector object of the same type. Sizes may differ. - void swap(small_vector& other) { - swap(*this, other); - } + void swap(small_vector& other) { swap(*this, other); } ///@brief swaps two vectors friend void swap(small_vector& lhs, small_vector& rhs) { @@ -574,35 +530,25 @@ class small_vector { if (lhs.size() != rhs.size()) { return false; } - return std::equal(lhs.begin(), lhs.end(), - rhs.begin()); + return std::equal(lhs.begin(), lhs.end(), rhs.begin()); } ///@brief < operator friend bool operator<(const small_vector& lhs, const small_vector& rhs) { - return std::lexicographical_compare(lhs.begin(), lhs.end(), - rhs.begin(), rhs.end()); + return std::lexicographical_compare(lhs.begin(), lhs.end(), rhs.begin(), rhs.end()); } ///@brief != operator - friend bool operator!=(const small_vector& lhs, const small_vector& rhs) { - return !(lhs == rhs); - } + friend bool operator!=(const small_vector& lhs, const small_vector& rhs) { return !(lhs == rhs); } ///@brief > operator - friend bool operator>(const small_vector& lhs, const small_vector& rhs) { - return rhs < lhs; - } + friend bool operator>(const small_vector& lhs, const small_vector& rhs) { return rhs < lhs; } ///@brief <= operator - friend bool operator<=(const small_vector& lhs, const small_vector& rhs) { - return !(rhs < lhs); - } + friend bool operator<=(const small_vector& lhs, const small_vector& rhs) { return !(rhs < lhs); } ///@brief >= operator - friend bool operator>=(const small_vector& lhs, const small_vector& rhs) { - return !(lhs < rhs); - } + friend bool operator>=(const small_vector& lhs, const small_vector& rhs) { return !(lhs < rhs); } public: //Lifetime management ///@brief destructor @@ -666,8 +612,10 @@ class small_vector { */ static constexpr size_t SHORT_PAD = LONG_FMT_SIZE - (sizeof(value_type) * SHORT_CAPACITY + sizeof(size_type)); - static constexpr size_t SHORT_FMT_SIZE = sizeof(small_vector_impl::short_format); - static constexpr size_t SHORT_FMT_ALIGN = alignof(small_vector_impl::short_format); + static constexpr size_t SHORT_FMT_SIZE + = sizeof(small_vector_impl::short_format); + static constexpr size_t SHORT_FMT_ALIGN + = alignof(small_vector_impl::short_format); static_assert(LONG_FMT_SIZE == SHORT_FMT_SIZE, "Short and long data formats must have same size"); static_assert(LONG_FMT_ALIGN % SHORT_FMT_ALIGN == 0, "Short and long data formats must have compatible alignment"); @@ -766,14 +714,10 @@ class small_vector { * aligned, allowing is to set the size directly * for both formats */ - void set_size(size_type new_size) { - short_.size_ = new_size; - } + void set_size(size_type new_size) { short_.size_ = new_size; } ///@brief Allocates raw (un-initialzied) memory for nelem objects of type T - static T* alloc(size_type nelem) { - return static_cast(::operator new(sizeof(T) * nelem)); - } + static T* alloc(size_type nelem) { return static_cast(::operator new(sizeof(T) * nelem)); } /** * @brief Deallocates a block of memory @@ -781,9 +725,7 @@ class small_vector { * Caller must ensure any object's associated with this block have already had * their destructors called */ - static void dealloc(T* data) { - ::operator delete(data); - } + static void dealloc(T* data) { ::operator delete(data); } /** * @brief Swaps the elements in [src_first, src_last) to positions starting at dst_first @@ -818,9 +760,7 @@ class small_vector { } ///@brief Calls the destructors of all elements currently held - void destruct_elements() { - destruct_elements(begin(), end()); - } + void destruct_elements() { destruct_elements(begin(), end()); } ///@brief Calls the destructors of elements in [first, last] range void destruct_elements(iterator first, iterator last) { @@ -830,9 +770,7 @@ class small_vector { } ///@brief Calls the destructors of elements in one position (position) - void destruct_element(iterator position) { - destruct_elements(position, position + 1); - } + void destruct_element(iterator position) { destruct_elements(position, position + 1); } private: //Data /* diff --git a/libs/libvtrutil/src/vtr_string_interning.h b/libs/libvtrutil/src/vtr_string_interning.h index 65b611e6015..e0371dffa9e 100644 --- a/libs/libvtrutil/src/vtr_string_interning.h +++ b/libs/libvtrutil/src/vtr_string_interning.h @@ -100,9 +100,7 @@ class interned_string_iterator { public: interned_string_iterator(const string_internment* internment, std::array intern_ids, size_t n); - interned_string_iterator() { - clear(); - } + interned_string_iterator() { clear(); } using value_type = char; using difference_type = void; @@ -147,7 +145,8 @@ class interned_string_iterator { ///@brief == operator inline bool operator==(const interned_string_iterator& lhs, const interned_string_iterator& rhs) { - return lhs.internment_ == rhs.internment_ && lhs.num_parts_ == rhs.num_parts_ && lhs.parts_ == rhs.parts_ && lhs.part_idx_ == rhs.part_idx_ && lhs.str_idx_ == rhs.str_idx_ && lhs.view_ == rhs.view_; + return lhs.internment_ == rhs.internment_ && lhs.num_parts_ == rhs.num_parts_ && lhs.parts_ == rhs.parts_ + && lhs.part_idx_ == rhs.part_idx_ && lhs.str_idx_ == rhs.str_idx_ && lhs.view_ == rhs.view_; } ///@brief != operator @@ -240,16 +239,12 @@ class interned_string { } ///@brief end() function - interned_string_iterator end() const { - return interned_string_iterator(); - } + interned_string_iterator end() const { return interned_string_iterator(); } ///@brief == operator - friend bool operator==(interned_string lhs, - interned_string rhs) noexcept; + friend bool operator==(interned_string lhs, interned_string rhs) noexcept; ///@brief != operator - friend bool operator!=(interned_string lhs, - interned_string rhs) noexcept; + friend bool operator!=(interned_string lhs, interned_string rhs) noexcept; ///@brief hash function friend std::hash; friend interned_string_less; @@ -302,40 +297,26 @@ class interned_string { }; ///@brief == operator -inline bool operator==(interned_string lhs, - interned_string rhs) noexcept { - return lhs.storage_ == rhs.storage_; -} +inline bool operator==(interned_string lhs, interned_string rhs) noexcept { return lhs.storage_ == rhs.storage_; } ///@brief != operator -inline bool operator!=(interned_string lhs, - interned_string rhs) noexcept { - return lhs.storage_ != rhs.storage_; -} +inline bool operator!=(interned_string lhs, interned_string rhs) noexcept { return lhs.storage_ != rhs.storage_; } ///@brief < operator -inline bool operator<(bound_interned_string lhs, - bound_interned_string rhs) noexcept { +inline bool operator<(bound_interned_string lhs, bound_interned_string rhs) noexcept { return std::lexicographical_compare(lhs.begin(), lhs.end(), rhs.begin(), rhs.end()); } ///@brief >= operator -inline bool operator>=(bound_interned_string lhs, - bound_interned_string rhs) noexcept { +inline bool operator>=(bound_interned_string lhs, bound_interned_string rhs) noexcept { return !std::lexicographical_compare(lhs.begin(), lhs.end(), rhs.begin(), rhs.end()); } ///@brief > operator -inline bool operator>(bound_interned_string lhs, - bound_interned_string rhs) noexcept { - return rhs < lhs; -} +inline bool operator>(bound_interned_string lhs, bound_interned_string rhs) noexcept { return rhs < lhs; } ///@brief <= operator -inline bool operator<=(bound_interned_string lhs, - bound_interned_string rhs) noexcept { - return rhs >= lhs; -} +inline bool operator<=(bound_interned_string lhs, bound_interned_string rhs) noexcept { return rhs >= lhs; } /** * @brief Storage of interned string, and object capable of generating new interned_string objects. @@ -392,9 +373,7 @@ class string_internment { } ///@brief Number of unique string parts stored. - size_t unique_strings() const { - return strings_.size(); - } + size_t unique_strings() const { return strings_.size(); } private: StringId intern_one_string(vtr::string_view view) { @@ -451,7 +430,9 @@ inline void interned_string::get(const string_internment* internment, std::strin * Do no construct this iterator directly. Use either * bound_interned_string::begin/end or interned_string;:begin/end. */ -inline interned_string_iterator::interned_string_iterator(const string_internment* internment, std::array intern_ids, size_t n) +inline interned_string_iterator::interned_string_iterator(const string_internment* internment, + std::array intern_ids, + size_t n) : internment_(internment) , num_parts_(n) , parts_(intern_ids) @@ -508,14 +489,10 @@ inline interned_string_iterator interned_string_iterator::operator++(int) { } ///@brief return an iterator to the first part of the interned_string -inline interned_string_iterator bound_interned_string::begin() const { - return str_->begin(internment_); -} +inline interned_string_iterator bound_interned_string::begin() const { return str_->begin(internment_); } ///@brief return an iterator to the last part of the interned_string -inline interned_string_iterator bound_interned_string::end() const { - return interned_string_iterator(); -} +inline interned_string_iterator bound_interned_string::end() const { return interned_string_iterator(); } inline std::ostream& operator<<(std::ostream& os, bound_interned_string const& value) { for (const auto& c : value) { diff --git a/libs/libvtrutil/src/vtr_string_view.h b/libs/libvtrutil/src/vtr_string_view.h index 12a7a7a446c..4250af138c1 100644 --- a/libs/libvtrutil/src/vtr_string_view.h +++ b/libs/libvtrutil/src/vtr_string_view.h @@ -42,9 +42,7 @@ class string_view { } ///@brief indexing [] operator (immutable) - constexpr char operator[](size_t pos) const { - return data_[pos]; - } + constexpr char operator[](size_t pos) const { return data_[pos]; } ///@brief aT() operator (immutable) const char& at(size_t pos) const { @@ -56,54 +54,34 @@ class string_view { } ///@brief Returns the first character of the string - constexpr const char& front() const { - return data_[0]; - } + constexpr const char& front() const { return data_[0]; } ///@brief Returns the last character of the string - constexpr const char& back() const { - return data_[size() - 1]; - } + constexpr const char& back() const { return data_[size() - 1]; } ///@brief Returns a pointer to the string data - constexpr const char* data() const { - return data_; - } + constexpr const char* data() const { return data_; } ///@brief Returns the string size - constexpr size_t size() const noexcept { - return size_; - } + constexpr size_t size() const noexcept { return size_; } ///@brief Returns the string size - constexpr size_t length() const noexcept { - return size_; - } + constexpr size_t length() const noexcept { return size_; } ///@brief Returns true if empty - constexpr bool empty() const noexcept { - return size_ == 0; - } + constexpr bool empty() const noexcept { return size_ == 0; } ///@brief Returns a pointer to the begin of the string - constexpr const char* begin() const noexcept { - return data_; - } + constexpr const char* begin() const noexcept { return data_; } ///@brief Same as begin() - constexpr const char* cbegin() const noexcept { - return data_; - } + constexpr const char* cbegin() const noexcept { return data_; } ///@brief Returns a pointer to the end of the string - constexpr const char* end() const noexcept { - return data_ + size_; - } + constexpr const char* end() const noexcept { return data_ + size_; } ///@brief Same as end() - constexpr const char* cend() const noexcept { - return data_ + size_; - } + constexpr const char* cend() const noexcept { return data_ + size_; } ///@brief Swaps two string views void swap(string_view& v) noexcept { @@ -131,40 +109,31 @@ class string_view { }; ///@brief == operator -inline bool operator==(string_view lhs, - string_view rhs) noexcept { - return lhs.size() == rhs.size() && (lhs.empty() || rhs.empty() || (strncmp(lhs.data(), rhs.data(), std::min(lhs.size(), rhs.size())) == 0)); +inline bool operator==(string_view lhs, string_view rhs) noexcept { + return lhs.size() == rhs.size() + && (lhs.empty() || rhs.empty() || (strncmp(lhs.data(), rhs.data(), std::min(lhs.size(), rhs.size())) == 0)); } ///@brief != operator -inline bool operator!=(string_view lhs, - string_view rhs) noexcept { +inline bool operator!=(string_view lhs, string_view rhs) noexcept { return lhs.size() != rhs.size() || strncmp(lhs.data(), rhs.data(), std::min(lhs.size(), rhs.size())) != 0; } ///@brief < operator -inline bool operator<(string_view lhs, - string_view rhs) noexcept { +inline bool operator<(string_view lhs, string_view rhs) noexcept { return std::lexicographical_compare(lhs.begin(), lhs.end(), rhs.begin(), rhs.end()); } ///brief >= operator -inline bool operator>=(string_view lhs, - string_view rhs) noexcept { +inline bool operator>=(string_view lhs, string_view rhs) noexcept { return !std::lexicographical_compare(lhs.begin(), lhs.end(), rhs.begin(), rhs.end()); } ///@brief > operator -inline bool operator>(string_view lhs, - string_view rhs) noexcept { - return rhs < lhs; -} +inline bool operator>(string_view lhs, string_view rhs) noexcept { return rhs < lhs; } ///@brief <= operator -inline bool operator<=(string_view lhs, - string_view rhs) noexcept { - return rhs >= lhs; -} +inline bool operator<=(string_view lhs, string_view rhs) noexcept { return rhs >= lhs; } ///@brief << operator for ostream inline std::ostream& operator<<(std::ostream& os, string_view const& value) { diff --git a/libs/libvtrutil/src/vtr_strong_id_range.h b/libs/libvtrutil/src/vtr_strong_id_range.h index f22df41f67e..18ba756594e 100644 --- a/libs/libvtrutil/src/vtr_strong_id_range.h +++ b/libs/libvtrutil/src/vtr_strong_id_range.h @@ -84,9 +84,7 @@ class StrongIdIterator { } ///@brief Indexing operator [] - StrongId operator[](ssize_t offset) const { - return StrongId(size_t(id_) + offset); - } + StrongId operator[](ssize_t offset) const { return StrongId(size_t(id_) + offset); } ///@brief ~ operator template @@ -123,9 +121,7 @@ class StrongIdIterator { ///@brief + operator template -inline StrongIdIterator operator+( - const StrongIdIterator& lhs, - ssize_t n) { +inline StrongIdIterator operator+(const StrongIdIterator& lhs, ssize_t n) { StrongIdIterator ret = lhs; ret += n; return ret; @@ -133,9 +129,7 @@ inline StrongIdIterator operator+( ///@brief - operator template -inline StrongIdIterator operator-( - const StrongIdIterator& lhs, - ssize_t n) { +inline StrongIdIterator operator-(const StrongIdIterator& lhs, ssize_t n) { StrongIdIterator ret = lhs; ret -= n; return ret; @@ -158,20 +152,14 @@ class StrongIdRange { } ///@brief Returns a StrongIdIterator to the first strongId in the range - StrongIdIterator begin() const { - return StrongIdIterator(begin_); - } + StrongIdIterator begin() const { return StrongIdIterator(begin_); } ///@brief Returns a StrongIdIterator referring to the past-the-end element in the vector container. - StrongIdIterator end() const { - return StrongIdIterator(end_); - } + StrongIdIterator end() const { return StrongIdIterator(end_); } ///@brief Returns true if the range is empty bool empty() { return begin_ == end_; } ///@brief Reurns the size of the range - size_t size() { - return std::distance(begin(), end()); - } + size_t size() { return std::distance(begin(), end()); } private: StrongId begin_; diff --git a/libs/libvtrutil/src/vtr_time.cpp b/libs/libvtrutil/src/vtr_time.cpp index 5c80ff3126c..8ea1a3f4555 100644 --- a/libs/libvtrutil/src/vtr_time.cpp +++ b/libs/libvtrutil/src/vtr_time.cpp @@ -12,49 +12,33 @@ int f_timer_depth = 0; ///@brief Constructor Timer::Timer() : start_(clock::now()) - , initial_max_rss_(get_max_rss()) { -} + , initial_max_rss_(get_max_rss()) {} ///@brief Returns the elapsed seconds since construction -float Timer::elapsed_sec() const { - return std::chrono::duration(clock::now() - start_).count(); -} +float Timer::elapsed_sec() const { return std::chrono::duration(clock::now() - start_).count(); } ///@brief Returns the maximum resident size (rss) in bytes -float Timer::max_rss_mib() const { - return get_max_rss() / BYTE_TO_MIB; -} +float Timer::max_rss_mib() const { return get_max_rss() / BYTE_TO_MIB; } ///@brief Returns the change in maximum resident size in bytes -float Timer::delta_max_rss_mib() const { - return (get_max_rss() - initial_max_rss_) / BYTE_TO_MIB; -} +float Timer::delta_max_rss_mib() const { return (get_max_rss() - initial_max_rss_) / BYTE_TO_MIB; } ///@brief Constructor ScopedActionTimer::ScopedActionTimer(std::string action_str) : action_(std::move(action_str)) - , depth_(f_timer_depth++) { -} + , depth_(f_timer_depth++) {} ///@brief Destructor -ScopedActionTimer::~ScopedActionTimer() { - --f_timer_depth; -} +ScopedActionTimer::~ScopedActionTimer() { --f_timer_depth; } ///@brief Sets quiet value (when true, prints the timing info) -void ScopedActionTimer::quiet(bool value) { - quiet_ = value; -} +void ScopedActionTimer::quiet(bool value) { quiet_ = value; } ///@brief Returns the quiet value -bool ScopedActionTimer::quiet() const { - return quiet_; -} +bool ScopedActionTimer::quiet() const { return quiet_; } ///@brief Returns the action string -std::string ScopedActionTimer::action() const { - return action_; -} +std::string ScopedActionTimer::action() const { return action_; } ///@brief Pads the output string with # if it is not empty std::string ScopedActionTimer::pad() const { @@ -65,20 +49,16 @@ std::string ScopedActionTimer::pad() const { } ///@brief Returns the depth -int ScopedActionTimer::depth() const { - return depth_; -} +int ScopedActionTimer::depth() const { return depth_; } ///@brief Constructor ScopedFinishTimer::ScopedFinishTimer(std::string action_str) - : ScopedActionTimer(std::move(action_str)) { -} + : ScopedActionTimer(std::move(action_str)) {} ///@brief Destructor ScopedFinishTimer::~ScopedFinishTimer() { if (!quiet()) { - vtr::printf_info("%s%s took %.2f seconds (max_rss %.1f MiB)\n", - pad().c_str(), action().c_str(), elapsed_sec(), + vtr::printf_info("%s%s took %.2f seconds (max_rss %.1f MiB)\n", pad().c_str(), action().c_str(), elapsed_sec(), max_rss_mib()); } } @@ -92,9 +72,8 @@ ScopedStartFinishTimer::ScopedStartFinishTimer(std::string action_str) ///@brief Destructor ScopedStartFinishTimer::~ScopedStartFinishTimer() { if (!quiet()) { - vtr::printf_info("%s%s took %.2f seconds (max_rss %.1f MiB, delta_rss %+.1f MiB)\n", - pad().c_str(), action().c_str(), elapsed_sec(), - max_rss_mib(), delta_max_rss_mib()); + vtr::printf_info("%s%s took %.2f seconds (max_rss %.1f MiB, delta_rss %+.1f MiB)\n", pad().c_str(), + action().c_str(), elapsed_sec(), max_rss_mib(), delta_max_rss_mib()); } } diff --git a/libs/libvtrutil/src/vtr_token.cpp b/libs/libvtrutil/src/vtr_token.cpp index 1715e9f2381..5f5506e6ab7 100644 --- a/libs/libvtrutil/src/vtr_token.cpp +++ b/libs/libvtrutil/src/vtr_token.cpp @@ -12,8 +12,7 @@ #include "vtr_memory.h" #include "vtr_token.h" -enum e_token_type GetTokenTypeFromChar(const enum e_token_type cur_token_type, - const char cur); +enum e_token_type GetTokenTypeFromChar(const enum e_token_type cur_token_type, const char cur); bool IsWhitespace(char c); @@ -114,8 +113,7 @@ void freeTokens(t_token* tokens, const int num_tokens) { } ///@brief Returns a token type of the given char -enum e_token_type GetTokenTypeFromChar(const enum e_token_type cur_token_type, - const char cur) { +enum e_token_type GetTokenTypeFromChar(const enum e_token_type cur_token_type, const char cur) { if (IsWhitespace(cur)) { return TOKEN_NULL; } else { @@ -213,6 +211,7 @@ bool check_my_atof_2D(const int max_i, const int max_j, const char* instring, in } *num_entries = entry_count; - if (max_i * max_j != entry_count) return false; + if (max_i * max_j != entry_count) + return false; return true; } diff --git a/libs/libvtrutil/src/vtr_util.cpp b/libs/libvtrutil/src/vtr_util.cpp index b3eef7379eb..8878d8de51f 100644 --- a/libs/libvtrutil/src/vtr_util.cpp +++ b/libs/libvtrutil/src/vtr_util.cpp @@ -12,7 +12,7 @@ #include "vtr_error.h" #if defined(__unix__) -# include //For getpid() +#include //For getpid() #endif namespace vtr { @@ -102,9 +102,7 @@ std::string replace_all(std::string_view input, std::string_view search, std::st } ///@brief Returns true if str starts with prefix -bool starts_with(const std::string& str, std::string_view prefix) { - return str.find(prefix) == 0; -} +bool starts_with(const std::string& str, std::string_view prefix) { return str.find(prefix) == 0; } ///@brief Returns a std::string formatted using a printf-style format string std::string string_fmt(const char* fmt, ...) { @@ -220,9 +218,7 @@ T atoT(const std::string& value, std::string_view type_name) { * Typically these add extra error checking * and/or correct 'unexpected' behaviour of the standard c-functions */ -int atoi(const std::string& value) { - return atoT(value, "int"); -} +int atoi(const std::string& value) { return atoT(value, "int"); } /** * @brief Legacy c-style function replacements. @@ -230,9 +226,7 @@ int atoi(const std::string& value) { * Typically these add extra error checking * and/or correct 'unexpected' behaviour of the standard c-functions */ -double atod(const std::string& value) { - return atoT(value, "double"); -} +double atod(const std::string& value) { return atoT(value, "double"); } /** * @brief Legacy c-style function replacements. @@ -240,9 +234,7 @@ double atod(const std::string& value) { * Typically these add extra error checking * and/or correct 'unexpected' behaviour of the standard c-functions */ -float atof(const std::string& value) { - return atoT(value, "float"); -} +float atof(const std::string& value) { return atoT(value, "float"); } /** * @brief Legacy c-style function replacements. @@ -250,9 +242,7 @@ float atof(const std::string& value) { * Typically these add extra error checking * and/or correct 'unexpected' behaviour of the standard c-functions */ -unsigned atou(const std::string& value) { - return atoT(value, "unsigned int"); -} +unsigned atou(const std::string& value) { return atoT(value, "unsigned int"); } /** * @brief Get next token, and wrap to next line if \ at end of line. @@ -302,7 +292,8 @@ FILE* fopen(const char* fname, const char* flag) { } if (nullptr == (fp = std::fopen(fname, flag))) { - throw VtrError(string_fmt("Error opening file %s for %s access: %s.\n", fname, flag, strerror(errno)), __FILE__, __LINE__); + throw VtrError(string_fmt("Error opening file %s for %s access: %s.\n", fname, flag, strerror(errno)), __FILE__, + __LINE__); } if (new_fname) @@ -312,9 +303,7 @@ FILE* fopen(const char* fname, const char* flag) { } ///@brief The legacy fclose function -int fclose(FILE* f) { - return std::fclose(f); -} +int fclose(FILE* f) { return std::fclose(f); } /** * @brief Get an input line, update the line number and cut off any comment part. @@ -396,7 +385,7 @@ char* getline(char*& _lineptr, FILE* _stream) { #if defined(__unix__) nread = getdelim(&_lineptr, &_n, '\n', _stream); #elif defined(_WIN32) -# define __WIN_NLTK "\r\n" +#define __WIN_NLTK "\r\n" nread = getdelim(&_lineptr, &_n, __WIN_NLTK, _stream); #endif @@ -413,9 +402,7 @@ char* getline(char*& _lineptr, FILE* _stream) { return nullptr; /* getline was unsuccessful, so error */ - throw VtrError(string_fmt("Error -- %s\n", - error_msg.c_str()), - __FILE__, __LINE__); + throw VtrError(string_fmt("Error -- %s\n", error_msg.c_str()), __FILE__, __LINE__); return nullptr; } @@ -437,9 +424,7 @@ char* getline(char*& _lineptr, FILE* _stream) { } ///@brief Returns line number of last opened and read file -int get_file_line_number_of_last_opened_file() { - return file_line_number; -} +int get_file_line_number_of_last_opened_file() { return file_line_number; } bool file_exists(const char* filename) { FILE* file; @@ -461,8 +446,7 @@ bool file_exists(const char* filename) { * * Returns true if the extension is correct, and false otherwise. */ -bool check_file_name_extension(std::string_view file_name, - std::string_view file_extension) { +bool check_file_name_extension(std::string_view file_name, std::string_view file_extension) { auto ext = std::filesystem::path(file_name).extension(); return ext == file_extension; } diff --git a/libs/libvtrutil/src/vtr_util.h b/libs/libvtrutil/src/vtr_util.h index 8463a3a6ea4..e5f5a631f1c 100644 --- a/libs/libvtrutil/src/vtr_util.h +++ b/libs/libvtrutil/src/vtr_util.h @@ -131,8 +131,7 @@ std::string join(std::initializer_list list, std::string_view delim) { template void uniquify(Container container) { std::sort(container.begin(), container.end()); - container.erase(std::unique(container.begin(), container.end()), - container.end()); + container.erase(std::unique(container.begin(), container.end()), container.end()); } template diff --git a/libs/libvtrutil/src/vtr_vec_id_set.h b/libs/libvtrutil/src/vtr_vec_id_set.h index 10dc10e0f0a..9c6efb96ebb 100644 --- a/libs/libvtrutil/src/vtr_vec_id_set.h +++ b/libs/libvtrutil/src/vtr_vec_id_set.h @@ -82,14 +82,10 @@ class vec_id_set { } ///@brief Returns the size of the container - size_t size() const { - return vec_.size(); - } + size_t size() const { return vec_.size(); } ///@brief Sort elements in the container - void sort() { - std::sort(vec_.begin(), vec_.end()); - } + void sort() { std::sort(vec_.begin(), vec_.end()); } ///@bried Clears the container void clear() { diff --git a/libs/libvtrutil/src/vtr_vector.h b/libs/libvtrutil/src/vtr_vector.h index dcf783abe99..de3ebd8e996 100644 --- a/libs/libvtrutil/src/vtr_vector.h +++ b/libs/libvtrutil/src/vtr_vector.h @@ -147,14 +147,10 @@ class vector : private std::vector { // We must re-define swap to avoid inaccessible base class errors ///@brief swap function - void swap(vector& other) { - std::swap(*this, other); - } + void swap(vector& other) { std::swap(*this, other); } ///@brief Returns a range containing the keys - key_range keys() const { - return vtr::make_range(key_begin(), key_end()); - } + key_range keys() const { return vtr::make_range(key_begin(), key_end()); } /** * @brief Returns a range containing the key-value pairs. @@ -165,9 +161,7 @@ class vector : private std::vector { * * @return A `pair_range` object representing the range of key-value pairs. */ - pair_range pairs() const { - return vtr::make_range(pair_begin(), pair_end()); - } + pair_range pairs() const { return vtr::make_range(pair_begin(), pair_end()); } public: /** @@ -218,58 +212,63 @@ class vector : private std::vector { value_type value_; }; - /** - * @brief A bidirectional iterator for a vtr:vector object. - * - * The `pair_iterator` class provides a way to iterate over key-value pairs - * within a vtr::vector container. It supports bidirectional iteration, - * allowing the user to traverse the container both forwards and backwards. - */ - class pair_iterator { - public: - using iterator_category = std::bidirectional_iterator_tag; - using difference_type = std::ptrdiff_t; - using value_type = std::pair; - using pointer = value_type*; - using reference = value_type&; + /** + * @brief A bidirectional iterator for a vtr:vector object. + * + * The `pair_iterator` class provides a way to iterate over key-value pairs + * within a vtr::vector container. It supports bidirectional iteration, + * allowing the user to traverse the container both forwards and backwards. + */ + class pair_iterator { + public: + using iterator_category = std::bidirectional_iterator_tag; + using difference_type = std::ptrdiff_t; + using value_type = std::pair; + using pointer = value_type*; + using reference = value_type&; - /// @brief constructor - pair_iterator(vector& vec, key_type init) - : vec_(vec), value_(init, vec[init]) {} + /// @brief constructor + pair_iterator(vector& vec, key_type init) + : vec_(vec) + , value_(init, vec[init]) {} - /// @brief ++ operator - pair_iterator& operator++() { - value_ = std::make_pair(key_type(size_t(value_.first) + 1), vec_[key_type(size_t(value_.first) + 1)]); - return *this; - } - /// @brief -- operator - pair_iterator& operator--() { - value_ = std::make_pair(key_type(size_t(value_.first) - 1), vec_[key_type(size_t(value_.first) - 1)]); - return *this; - } - /// @brief dereference operator - reference operator*() { return value_; } - /// @brief -> operator - pointer operator->() { return &value_; } + /// @brief ++ operator + pair_iterator& operator++() { + value_ = std::make_pair(key_type(size_t(value_.first) + 1), vec_[key_type(size_t(value_.first) + 1)]); + return *this; + } + /// @brief -- operator + pair_iterator& operator--() { + value_ = std::make_pair(key_type(size_t(value_.first) - 1), vec_[key_type(size_t(value_.first) - 1)]); + return *this; + } + /// @brief dereference operator + reference operator*() { return value_; } + /// @brief -> operator + pointer operator->() { return &value_; } - /// @brief == operator - friend bool operator==(const pair_iterator& lhs, const pair_iterator& rhs) { return lhs.value_.first == rhs.value_.first; } - /// @brief != operator - friend bool operator!=(const pair_iterator& lhs, const pair_iterator& rhs) { return !(lhs == rhs); } + /// @brief == operator + friend bool operator==(const pair_iterator& lhs, const pair_iterator& rhs) { + return lhs.value_.first == rhs.value_.first; + } + /// @brief != operator + friend bool operator!=(const pair_iterator& lhs, const pair_iterator& rhs) { return !(lhs == rhs); } - private: - /// @brief Reference to the vector of key-value pairs. - vector& vec_; - // @brief The current key-value pair being pointed to by the iterator. - value_type value_; - }; + private: + /// @brief Reference to the vector of key-value pairs. + vector& vec_; + // @brief The current key-value pair being pointed to by the iterator. + value_type value_; + }; private: key_iterator key_begin() const { return key_iterator(key_type(0)); } key_iterator key_end() const { return key_iterator(key_type(size())); } pair_iterator pair_begin() const { return pair_iterator(*const_cast*>(this), key_type(0)); } - pair_iterator pair_end() const { return pair_iterator(*const_cast*>(this), key_type(size())); } + pair_iterator pair_end() const { + return pair_iterator(*const_cast*>(this), key_type(size())); + } }; } // namespace vtr diff --git a/libs/libvtrutil/src/vtr_vector_map.h b/libs/libvtrutil/src/vtr_vector_map.h index 50309e86ed0..46bcd45ca79 100644 --- a/libs/libvtrutil/src/vtr_vector_map.h +++ b/libs/libvtrutil/src/vtr_vector_map.h @@ -107,15 +107,21 @@ class vector_map { // Delegate potentially overloaded functions to the underlying vector with perfect forwarding ///@brief push_back function template - void push_back(Args&&... args) { vec_.push_back(std::forward(args)...); } + void push_back(Args&&... args) { + vec_.push_back(std::forward(args)...); + } ///@brief emplace_back function template - void emplace_back(Args&&... args) { vec_.emplace_back(std::forward(args)...); } + void emplace_back(Args&&... args) { + vec_.emplace_back(std::forward(args)...); + } ///@brief resize function template - void resize(Args&&... args) { vec_.resize(std::forward(args)...); } + void resize(Args&&... args) { + vec_.resize(std::forward(args)...); + } ///@brief clears the container void clear() { vec_.clear(); } @@ -160,9 +166,7 @@ class vector_map { void update(const K key, const V value) { insert(key, value); } ///@brief Swap (this enables std::swap via ADL) - friend void swap(vector_map& x, vector_map& y) { - std::swap(x.vec_, y.vec_); - } + friend void swap(vector_map& x, vector_map& y) { std::swap(x.vec_, y.vec_); } private: std::vector vec_; diff --git a/libs/libvtrutil/test/test_geometry.cpp b/libs/libvtrutil/test/test_geometry.cpp index 3d44d5977ce..787a52e9639 100644 --- a/libs/libvtrutil/test/test_geometry.cpp +++ b/libs/libvtrutil/test/test_geometry.cpp @@ -34,9 +34,7 @@ TEST_CASE("Rect", "[vtr_geometry/Rect]") { vtr::Rect r3(pi_1, pi_3); vtr::Rect r4(pi_3, pi_2); - SECTION("equality") { - REQUIRE(r1 == r2); - } + SECTION("equality") { REQUIRE(r1 == r2); } SECTION("location") { REQUIRE(r1.xmin() == pi_1.x()); @@ -81,13 +79,9 @@ TEST_CASE("Rect", "[vtr_geometry/Rect]") { REQUIRE(r2.coincident(pi_2)); } - SECTION("bounds_int") { - REQUIRE(r1 == bounding_box(r3, r4)); - } + SECTION("bounds_int") { REQUIRE(r1 == bounding_box(r3, r4)); } - SECTION("empty_int") { - REQUIRE(vtr::Rect().empty()); - } + SECTION("empty_int") { REQUIRE(vtr::Rect().empty()); } SECTION("sample_int") { auto r = vtr::Rect(pi_1, pi_2); @@ -110,9 +104,7 @@ TEST_CASE("Rect", "[vtr_geometry/Rect]") { vtr::Rect r6(pf_3, pf_2); // vtr::Rect r7(pf_1); // <-- will fail to compile - SECTION("equality_float") { - REQUIRE(r3 == r4); - } + SECTION("equality_float") { REQUIRE(r3 == r4); } SECTION("location_float") { REQUIRE(r3.xmin() == pf_1.x()); @@ -156,21 +148,14 @@ TEST_CASE("Rect", "[vtr_geometry/Rect]") { REQUIRE(r4.coincident(pf_2)); } - SECTION("bounds_float") { - REQUIRE(r3 == bounding_box(r5, r6)); - } + SECTION("bounds_float") { REQUIRE(r3 == bounding_box(r5, r6)); } - SECTION("empty_float") { - REQUIRE(vtr::Rect().empty()); - } + SECTION("empty_float") { REQUIRE(vtr::Rect().empty()); } } } TEST_CASE("Line", "[vtr_geometry/Line]") { - std::vector> points = {{0, 0}, - {0, 2}, - {1, 0}, - {1, -2}}; + std::vector> points = {{0, 0}, {0, 2}, {1, 0}, {1, -2}}; vtr::Line line(points); @@ -197,8 +182,7 @@ TEST_CASE("Line", "[vtr_geometry/Line]") { } TEST_CASE("RectUnion", "[vtr_geometry/RectUnion]") { - std::vector> rects = {{0, 0, 2, 2}, - {1, 1, 3, 3}}; + std::vector> rects = {{0, 0, 2, 2}, {1, 1, 3, 3}}; vtr::RectUnion rect_union(rects); diff --git a/libs/libvtrutil/test/test_ragged_vector.cpp b/libs/libvtrutil/test/test_ragged_vector.cpp index bc5911917bb..f564b983465 100644 --- a/libs/libvtrutil/test/test_ragged_vector.cpp +++ b/libs/libvtrutil/test/test_ragged_vector.cpp @@ -18,9 +18,7 @@ TEST_CASE("Construction", "[vtr_ragged_matrix]") { REQUIRE(!ones_container.empty()); //Construct from row size callback - auto row_size_callback = [&](size_t irow) { - return row_sizes[irow]; - }; + auto row_size_callback = [&](size_t irow) { return row_sizes[irow]; }; vtr::FlatRaggedMatrix ones_callback(row_sizes.size(), row_size_callback, 1.0); REQUIRE(ones_callback.size() == nelem); REQUIRE(!ones_callback.empty()); diff --git a/libs/libvtrutil/test/test_small_vector.cpp b/libs/libvtrutil/test/test_small_vector.cpp index c0c47ab24e4..3574e903dbf 100644 --- a/libs/libvtrutil/test/test_small_vector.cpp +++ b/libs/libvtrutil/test/test_small_vector.cpp @@ -8,10 +8,12 @@ namespace vtr { //Must be delcared in namespace for argument dependent lookup to work with clang template bool operator==(const std::vector& lhs, const vtr::small_vector& rhs) { - if (lhs.size() != rhs.size()) return false; + if (lhs.size() != rhs.size()) + return false; for (size_t i = 0; i < lhs.size(); ++i) { - if (lhs[i] != rhs[i]) return false; + if (lhs[i] != rhs[i]) + return false; } return true; } diff --git a/libs/libvtrutil/test/test_strings.cpp b/libs/libvtrutil/test/test_strings.cpp index b28d1c9ef1a..9b1b6e7c2f9 100644 --- a/libs/libvtrutil/test/test_strings.cpp +++ b/libs/libvtrutil/test/test_strings.cpp @@ -125,7 +125,9 @@ TEST_CASE("Basic string internment", "[vtr_string_interning/string_internment]") REQUIRE(f == b); } -static void test_internment_retreval(const vtr::string_internment* internment, vtr::interned_string str, const char* expect) { +static void test_internment_retreval(const vtr::string_internment* internment, + vtr::interned_string str, + const char* expect) { std::string copy; str.get(internment, ©); REQUIRE(copy == expect); diff --git a/odin_ii/src/ast/ast_elaborate.cpp b/odin_ii/src/ast/ast_elaborate.cpp index 159d0b686db..dbb2e552c27 100644 --- a/odin_ii/src/ast/ast_elaborate.cpp +++ b/odin_ii/src/ast/ast_elaborate.cpp @@ -55,15 +55,13 @@ struct e_data { int pass; int index; - struct - { + struct { ast_node_t** defparams; sc_hierarchy** sc_hierarchies; // for the correct scope int num_defparams; } defparam; - struct - { + struct { ast_node_t** generate_constructs; ast_node_t** generate_parents; int* generate_indexes; // for the correct location of the parent's child @@ -72,8 +70,18 @@ struct e_data { } generate; }; -ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_hierarchy* local_ref, bool is_generate_region, bool fold_expressions, e_data* data); -ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* local_ref, bool is_generate_region, bool fold_expressions); +ast_node_t* build_hierarchy(ast_node_t* node, + ast_node_t* parent, + int index, + sc_hierarchy* local_ref, + bool is_generate_region, + bool fold_expressions, + e_data* data); +ast_node_t* finalize_ast(ast_node_t* node, + ast_node_t* parent, + sc_hierarchy* local_ref, + bool is_generate_region, + bool fold_expressions); ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long* max_size, long assignment_size); void update_string_caches(sc_hierarchy* local_ref); @@ -155,13 +163,15 @@ ast_node_t* find_top_module(ast_t* ast) { /* check atleast one module is top ... and only one */ if (!found_desired_module) { - warning_message(AST, unknown_location, "Could not find the desired top level module: %s\n", desired_module.c_str()); + warning_message(AST, unknown_location, "Could not find the desired top level module: %s\n", + desired_module.c_str()); } if (number_of_top_modules > 1) { error_message(AST, unknown_location, "Found multiple top level modules\n%s", module_name_list.c_str()); } else { - printf("==========================\nDetected Top Level Module: %s\n==========================\n", module_name_list.c_str()); + printf("==========================\nDetected Top Level Module: %s\n==========================\n", + module_name_list.c_str()); } return top_entry; @@ -227,7 +237,13 @@ int simplify_ast_module(ast_node_t** ast_module, sc_hierarchy* local_ref) { * 1. builds the official string cache list hierarchy so we can resolve identifiers * 2. resolves defparams so that we properly override parameters * ----------------------------------------------------------------------------------------------------- */ -ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_hierarchy* local_ref, bool is_generate_region, bool fold_expressions, e_data* data) { +ast_node_t* build_hierarchy(ast_node_t* node, + ast_node_t* parent, + int index, + sc_hierarchy* local_ref, + bool is_generate_region, + bool fold_expressions, + e_data* data) { short* child_skip_list = NULL; // list of children not to traverse into short skip_children = false; // skips the DFS completely if true @@ -260,8 +276,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ for (int i = 0; i < connect_list->num_children; i++) { if ((connect_list->children[i]->identifier_node && is_ordered_list) || (!connect_list->children[i]->identifier_node && !is_ordered_list)) { - error_message(AST, node->loc, - "%s", "Cannot mix port connections by name and port connections by ordered list\n"); + error_message(AST, node->loc, "%s", + "Cannot mix port connections by name and port connections by ordered list\n"); } } @@ -269,11 +285,10 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ long sc_spot = sc_lookup_string(hard_block_names, module_ref_name); /* TODO: strcmp on "multiply", "adder" for soft logic implementation? */ - if ( - sc_spot != -1 - || !strcmp(module_ref_name, SINGLE_PORT_RAM_string) + if (sc_spot != -1 || !strcmp(module_ref_name, SINGLE_PORT_RAM_string) || !strcmp(module_ref_name, DUAL_PORT_RAM_string)) { - ast_node_t* hb_node = look_for_matching_hard_block(node->children[0], module_ref_name, local_ref); + ast_node_t* hb_node + = look_for_matching_hard_block(node->children[0], module_ref_name, local_ref); if (hb_node != node->identifier_node) { free_whole_tree(node); node = hb_node; @@ -287,16 +302,23 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ case FOR: { if (data->pass == 1 && is_generate_region) { // parameters haven't been resolved yet; don't elaborate until the second pass - data->generate.generate_constructs = (ast_node_t**)vtr::realloc(data->generate.generate_constructs, sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_constructs = (ast_node_t**)vtr::realloc( + data->generate.generate_constructs, + sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); data->generate.generate_constructs[data->generate.num_generate_constructs] = node; - data->generate.generate_parents = (ast_node_t**)vtr::realloc(data->generate.generate_parents, sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_parents = (ast_node_t**)vtr::realloc( + data->generate.generate_parents, + sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); data->generate.generate_parents[data->generate.num_generate_constructs] = parent; - data->generate.generate_indexes = (int*)vtr::realloc(data->generate.generate_indexes, sizeof(int) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_indexes = (int*)vtr::realloc( + data->generate.generate_indexes, sizeof(int) * (data->generate.num_generate_constructs + 1)); data->generate.generate_indexes[data->generate.num_generate_constructs] = index; - data->generate.sc_hierarchies = (sc_hierarchy**)vtr::realloc(data->generate.sc_hierarchies, sizeof(sc_hierarchy*) * (data->generate.num_generate_constructs + 1)); + data->generate.sc_hierarchies = (sc_hierarchy**)vtr::realloc( + data->generate.sc_hierarchies, + sizeof(sc_hierarchy*) * (data->generate.num_generate_constructs + 1)); data->generate.sc_hierarchies[data->generate.num_generate_constructs] = local_ref; data->generate.num_generate_constructs++; @@ -310,9 +332,12 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ oassert(child_skip_list); // look ahead for parameters in loop conditions - node->children[0] = build_hierarchy(node->children[0], node, 0, local_ref, is_generate_region, true, data); - node->children[1] = build_hierarchy(node->children[1], node, 1, local_ref, is_generate_region, true, data); - node->children[2] = build_hierarchy(node->children[2], node, 2, local_ref, is_generate_region, true, data); + node->children[0] + = build_hierarchy(node->children[0], node, 0, local_ref, is_generate_region, true, data); + node->children[1] + = build_hierarchy(node->children[1], node, 1, local_ref, is_generate_region, true, data); + node->children[2] + = build_hierarchy(node->children[2], node, 2, local_ref, is_generate_region, true, data); // update skip list child_skip_list[0] = true; @@ -328,7 +353,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ char** genvar_list = NULL; verify_genvars(node, local_ref, &genvar_list, 0); - if (genvar_list) vtr::free(genvar_list); + if (genvar_list) + vtr::free(genvar_list); iterator = resolve_hierarchical_name_reference(local_ref, initial->children[0]->types.identifier); oassert(iterator != NULL); @@ -336,31 +362,39 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ if (!(node_is_constant(initial->children[1])) || !(node_is_constant(compare_expression->children[1])) || !(verify_terminal(terminal->children[1], iterator))) { - error_message(AST, node->loc, - "%s", "Loop generate construct conditions must be constant expressions"); + error_message(AST, node->loc, "%s", + "Loop generate construct conditions must be constant expressions"); } } int num_unrolled = 0; node = unroll_for_loop(node, parent, &num_unrolled, local_ref, is_generate_region); for (int i = index; i < (num_unrolled + index); i++) { - parent->children[i] = build_hierarchy(parent->children[i], parent, i, local_ref, is_generate_region, true, data); + parent->children[i] + = build_hierarchy(parent->children[i], parent, i, local_ref, is_generate_region, true, data); } break; } case IF: { if (data->pass == 1 && is_generate_region) { // parameters haven't been resolved yet; don't elaborate until the second pass - data->generate.generate_constructs = (ast_node_t**)vtr::realloc(data->generate.generate_constructs, sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_constructs = (ast_node_t**)vtr::realloc( + data->generate.generate_constructs, + sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); data->generate.generate_constructs[data->generate.num_generate_constructs] = node; - data->generate.generate_parents = (ast_node_t**)vtr::realloc(data->generate.generate_parents, sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_parents = (ast_node_t**)vtr::realloc( + data->generate.generate_parents, + sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); data->generate.generate_parents[data->generate.num_generate_constructs] = parent; - data->generate.generate_indexes = (int*)vtr::realloc(data->generate.generate_indexes, sizeof(int) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_indexes = (int*)vtr::realloc( + data->generate.generate_indexes, sizeof(int) * (data->generate.num_generate_constructs + 1)); data->generate.generate_indexes[data->generate.num_generate_constructs] = index; - data->generate.sc_hierarchies = (sc_hierarchy**)vtr::realloc(data->generate.sc_hierarchies, sizeof(sc_hierarchy*) * (data->generate.num_generate_constructs + 1)); + data->generate.sc_hierarchies = (sc_hierarchy**)vtr::realloc( + data->generate.sc_hierarchies, + sizeof(sc_hierarchy*) * (data->generate.num_generate_constructs + 1)); data->generate.sc_hierarchies[data->generate.num_generate_constructs] = local_ref; data->generate.num_generate_constructs++; @@ -373,7 +407,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ ast_node_t* to_return = NULL; - node->children[0] = build_hierarchy(node->children[0], node, 0, local_ref, is_generate_region, true, data); + node->children[0] + = build_hierarchy(node->children[0], node, 0, local_ref, is_generate_region, true, data); ast_node_t* child_condition = node->children[0]; if (node_is_constant(child_condition)) { VNumber condition = *(child_condition->types.vnumber); @@ -385,19 +420,18 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ to_return = node->children[2]; node->children[2] = NULL; } else if (is_generate_region) { - error_message(AST, node->loc, - "%s", "Could not resolve conditional generate construct"); + error_message(AST, node->loc, "%s", "Could not resolve conditional generate construct"); } free_whole_tree(node); node = to_return; // otherwise we keep it as is to build the circuitry } else if (is_generate_region) { - error_message(AST, node->loc, - "%s", "Could not resolve conditional generate construct"); + error_message(AST, node->loc, "%s", "Could not resolve conditional generate construct"); } if (to_return != NULL) { - if (to_return->type == BLOCK && to_return->children[0]->type != IF && (is_generate_region || to_return->types.identifier != NULL)) { + if (to_return->type == BLOCK && to_return->children[0]->type != IF + && (is_generate_region || to_return->types.identifier != NULL)) { // must create scope; parent has access to named block but not unnamed, // and child always has access to parent sc_hierarchy* new_hierarchy = init_sc_hierarchy(); @@ -408,19 +442,22 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ if (to_return->types.identifier != NULL) { // parent's children - local_ref->block_children = (sc_hierarchy**)vtr::realloc(local_ref->block_children, sizeof(sc_hierarchy*) * (local_ref->num_block_children + 1)); + local_ref->block_children = (sc_hierarchy**)vtr::realloc( + local_ref->block_children, sizeof(sc_hierarchy*) * (local_ref->num_block_children + 1)); local_ref->block_children[local_ref->num_block_children] = new_hierarchy; local_ref->num_block_children++; // scope id/instance name prefix new_hierarchy->scope_id = to_return->types.identifier; - new_hierarchy->instance_name_prefix = make_full_ref_name(local_ref->instance_name_prefix, NULL, to_return->types.identifier, NULL, -1); + new_hierarchy->instance_name_prefix = make_full_ref_name( + local_ref->instance_name_prefix, NULL, to_return->types.identifier, NULL, -1); } else if (is_generate_region) { // create a unique scope id/instance name prefix for internal use local_ref->num_unnamed_genblks++; std::string new_scope_id("genblk" + std::to_string(local_ref->num_unnamed_genblks)); new_hierarchy->scope_id = vtr::strdup(new_scope_id.c_str()); - new_hierarchy->instance_name_prefix = make_full_ref_name(local_ref->instance_name_prefix, NULL, new_hierarchy->scope_id, NULL, -1); + new_hierarchy->instance_name_prefix = make_full_ref_name( + local_ref->instance_name_prefix, NULL, new_hierarchy->scope_id, NULL, -1); } /* string caches */ @@ -434,16 +471,23 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ case CASE: { if (data->pass == 1 && is_generate_region) { // parameters haven't been resolved yet; don't elaborate until the second pass - data->generate.generate_constructs = (ast_node_t**)vtr::realloc(data->generate.generate_constructs, sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_constructs = (ast_node_t**)vtr::realloc( + data->generate.generate_constructs, + sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); data->generate.generate_constructs[data->generate.num_generate_constructs] = node; - data->generate.generate_parents = (ast_node_t**)vtr::realloc(data->generate.generate_parents, sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_parents = (ast_node_t**)vtr::realloc( + data->generate.generate_parents, + sizeof(ast_node_t*) * (data->generate.num_generate_constructs + 1)); data->generate.generate_parents[data->generate.num_generate_constructs] = parent; - data->generate.generate_indexes = (int*)vtr::realloc(data->generate.generate_indexes, sizeof(int) * (data->generate.num_generate_constructs + 1)); + data->generate.generate_indexes = (int*)vtr::realloc( + data->generate.generate_indexes, sizeof(int) * (data->generate.num_generate_constructs + 1)); data->generate.generate_indexes[data->generate.num_generate_constructs] = index; - data->generate.sc_hierarchies = (sc_hierarchy**)vtr::realloc(data->generate.sc_hierarchies, sizeof(sc_hierarchy*) * (data->generate.num_generate_constructs + 1)); + data->generate.sc_hierarchies = (sc_hierarchy**)vtr::realloc( + data->generate.sc_hierarchies, + sizeof(sc_hierarchy*) * (data->generate.num_generate_constructs + 1)); data->generate.sc_hierarchies[data->generate.num_generate_constructs] = local_ref; data->generate.num_generate_constructs++; @@ -456,7 +500,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ ast_node_t* to_return = NULL; - node->children[0] = build_hierarchy(node->children[0], node, 0, local_ref, is_generate_region, true, data); + node->children[0] + = build_hierarchy(node->children[0], node, 0, local_ref, is_generate_region, true, data); ast_node_t* child_condition = node->children[0]; if (node_is_constant(child_condition)) { ast_node_t* case_list = node->children[1]; @@ -467,21 +512,21 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ item->children[0] = NULL; } else { if (item->type != CASE_ITEM) { - error_message(AST, node->loc, - "%s", "Default case must only be the last case"); + error_message(AST, node->loc, "%s", "Default case must only be the last case"); } - item->children[0] = build_hierarchy(item->children[0], item, 0, local_ref, is_generate_region, true, data); + item->children[0] = build_hierarchy(item->children[0], item, 0, local_ref, + is_generate_region, true, data); if (node_is_constant(item->children[0])) { - VNumber eval = V_CASE_EQUAL(*(child_condition->types.vnumber), *(item->children[0]->types.vnumber)); + VNumber eval = V_CASE_EQUAL(*(child_condition->types.vnumber), + *(item->children[0]->types.vnumber)); if (V_TRUE(eval)) { to_return = item->children[1]; item->children[1] = NULL; break; } } else if (is_generate_region) { - error_message(AST, node->loc, - "%s", "Could not resolve conditional generate construct"); + error_message(AST, node->loc, "%s", "Could not resolve conditional generate construct"); } else { /* encountered non-constant item - don't continue searching */ break; @@ -501,19 +546,23 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ if (to_return->types.identifier != NULL) { // parent's children - local_ref->block_children = (sc_hierarchy**)vtr::realloc(local_ref->block_children, sizeof(sc_hierarchy*) * (local_ref->num_block_children + 1)); + local_ref->block_children = (sc_hierarchy**)vtr::realloc( + local_ref->block_children, + sizeof(sc_hierarchy*) * (local_ref->num_block_children + 1)); local_ref->block_children[local_ref->num_block_children] = new_hierarchy; local_ref->num_block_children++; // scope id/instance name prefix new_hierarchy->scope_id = to_return->types.identifier; - new_hierarchy->instance_name_prefix = make_full_ref_name(local_ref->instance_name_prefix, NULL, to_return->types.identifier, NULL, -1); + new_hierarchy->instance_name_prefix = make_full_ref_name( + local_ref->instance_name_prefix, NULL, to_return->types.identifier, NULL, -1); } else if (is_generate_region) { // create a unique scope id/instance name prefix for internal use local_ref->num_unnamed_genblks++; std::string new_scope_id("genblk" + std::to_string(local_ref->num_unnamed_genblks)); new_hierarchy->scope_id = vtr::strdup(new_scope_id.c_str()); - new_hierarchy->instance_name_prefix = make_full_ref_name(local_ref->instance_name_prefix, NULL, new_hierarchy->scope_id, NULL, -1); + new_hierarchy->instance_name_prefix = make_full_ref_name( + local_ref->instance_name_prefix, NULL, new_hierarchy->scope_id, NULL, -1); } /* string caches */ @@ -525,25 +574,22 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ node = to_return; } else if (is_generate_region) { /* no case */ - error_message(AST, node->loc, - "%s", "Could not resolve conditional generate construct"); + error_message(AST, node->loc, "%s", "Could not resolve conditional generate construct"); } } else if (is_generate_region) { - error_message(AST, node->loc, - "%s", "Could not resolve conditional generate construct"); + error_message(AST, node->loc, "%s", "Could not resolve conditional generate construct"); } break; } case REPLICATE: { if (data->pass == 2) { - node->children[0] = build_hierarchy(node->children[0], node, 0, local_ref, is_generate_region, true, data); + node->children[0] + = build_hierarchy(node->children[0], node, 0, local_ref, is_generate_region, true, data); if (!(node_is_constant(node->children[0]))) { - error_message(AST, node->loc, - "%s", "Replication constant must be a constant expression"); + error_message(AST, node->loc, "%s", "Replication constant must be a constant expression"); } else if (node->children[0]->types.vnumber->has_unknown()) { - error_message(AST, node->loc, - "%s", "Replication constant cannot contain x or z"); + error_message(AST, node->loc, "%s", "Replication constant cannot contain x or z"); } ast_node_t* new_node = NULL; @@ -571,7 +617,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ ast_node_t* newNode = ast_node_deep_copy((ast_node_t*)local_param_table_sc->data[sc_spot]); if (newNode->type != NUMBERS) { - newNode = build_hierarchy(newNode, parent, index, local_ref, is_generate_region, true, data); + newNode + = build_hierarchy(newNode, parent, index, local_ref, is_generate_region, true, data); oassert(newNode->type == NUMBERS); /* this forces parameter values as unsigned, since we don't currently support signed keyword... @@ -582,7 +629,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ delete temp; if (newNode->type != NUMBERS) { - error_message(AST, node->loc, "Parameter %s is not a constant expression\n", node->types.identifier); + error_message(AST, node->loc, "Parameter %s is not a constant expression\n", + node->types.identifier); } } @@ -641,7 +689,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ if (child_skip_list[i] == false) { /* recurse */ ast_node_t* old_child = node->children[i]; - ast_node_t* new_child = build_hierarchy(old_child, node, i, new_ref, is_generate_region, fold_expressions, data); + ast_node_t* new_child + = build_hierarchy(old_child, node, i, new_ref, is_generate_region, fold_expressions, data); node->children[i] = new_child; if (old_child != new_child) { @@ -696,13 +745,15 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ if (strcmp(defparam_ref.c_str(), instance_name.c_str()) == 0) { ast_node_t* instance_param_list = instance_node->children[0]->children[1]; - ast_node_t* param_node = ast_node_deep_copy((ast_node_t*)local_defparam_table_sc->data[j]); + ast_node_t* param_node + = ast_node_deep_copy((ast_node_t*)local_defparam_table_sc->data[j]); // identifier expected to be parameter name only vtr::free(param_node->identifier_node->types.identifier); param_node->identifier_node->types.identifier = vtr::strdup(param_ref.c_str()); if (!instance_param_list) { - instance_param_list = create_node_w_type(MODULE_PARAMETER_LIST, instance_node->children[0]->loc); + instance_param_list + = create_node_w_type(MODULE_PARAMETER_LIST, instance_node->children[0]->loc); instance_node->children[0]->children[1] = instance_param_list; } @@ -723,16 +774,17 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ ast_node_t* temp_instance = node->types.function.function_instantiations_instance[i]; char* instance_name_prefix = local_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); long sc_spot; /* lookup the name of the function associated with this instantiated point */ - if ((sc_spot = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier)) == -1) { - error_message(AST, node->loc, - "Can't find function name %s\n", temp_instance->identifier_node->types.identifier); + if ((sc_spot + = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier)) + == -1) { + error_message(AST, node->loc, "Can't find function name %s\n", + temp_instance->identifier_node->types.identifier); } /* make a unique copy of this function */ @@ -744,16 +796,19 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ add_top_module_to_ast(verilog_ast, instance); /* create the string cache list for the instantiated module */ - sc_hierarchy* original_sc_hierarchy = ((ast_node_t*)module_names_to_idx->data[sc_spot])->types.hierarchy; + sc_hierarchy* original_sc_hierarchy + = ((ast_node_t*)module_names_to_idx->data[sc_spot])->types.hierarchy; sc_hierarchy* function_sc_hierarchy = copy_sc_hierarchy(original_sc_hierarchy); function_sc_hierarchy->parent = local_ref; function_sc_hierarchy->instance_name_prefix = vtr::strdup(temp_instance_name); - function_sc_hierarchy->scope_id = vtr::strdup(temp_instance->children[0]->identifier_node->types.identifier); + function_sc_hierarchy->scope_id + = vtr::strdup(temp_instance->children[0]->identifier_node->types.identifier); function_sc_hierarchy->top_node = instance; /* update parent string cache list */ int num_function_children = local_ref->num_function_children; - local_ref->function_children = (sc_hierarchy**)vtr::realloc(local_ref->function_children, sizeof(sc_hierarchy*) * (num_function_children + 1)); + local_ref->function_children = (sc_hierarchy**)vtr::realloc( + local_ref->function_children, sizeof(sc_hierarchy*) * (num_function_children + 1)); local_ref->function_children[i] = function_sc_hierarchy; local_ref->num_function_children++; @@ -772,16 +827,17 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ ast_node_t* temp_instance = node->types.task.task_instantiations_instance[i]; char* instance_name_prefix = local_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); long sc_spot; /* lookup the name of the task associated with this instantiated point */ - if ((sc_spot = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier)) == -1) { - error_message(AST, node->loc, - "Can't find task name %s\n", temp_instance->identifier_node->types.identifier); + if ((sc_spot + = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier)) + == -1) { + error_message(AST, node->loc, "Can't find task name %s\n", + temp_instance->identifier_node->types.identifier); } /* make a unique copy of this task */ @@ -793,15 +849,18 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ add_top_module_to_ast(verilog_ast, instance); /* create the string cache list for the instantiated module */ - sc_hierarchy* original_sc_hierarchy = ((ast_node_t*)module_names_to_idx->data[sc_spot])->types.hierarchy; + sc_hierarchy* original_sc_hierarchy + = ((ast_node_t*)module_names_to_idx->data[sc_spot])->types.hierarchy; sc_hierarchy* task_sc_hierarchy = copy_sc_hierarchy(original_sc_hierarchy); task_sc_hierarchy->parent = local_ref; task_sc_hierarchy->instance_name_prefix = vtr::strdup(temp_instance_name); - task_sc_hierarchy->scope_id = vtr::strdup(temp_instance->children[0]->identifier_node->types.identifier); + task_sc_hierarchy->scope_id + = vtr::strdup(temp_instance->children[0]->identifier_node->types.identifier); /* update parent string cache list */ int num_task_children = local_ref->num_task_children; - local_ref->task_children = (sc_hierarchy**)vtr::realloc(local_ref->task_children, sizeof(sc_hierarchy*) * (num_task_children + 1)); + local_ref->task_children = (sc_hierarchy**)vtr::realloc( + local_ref->task_children, sizeof(sc_hierarchy*) * (num_task_children + 1)); local_ref->task_children[i] = task_sc_hierarchy; local_ref->num_task_children++; @@ -850,7 +909,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ vtr::free(node->children[0]->identifier_node->types.identifier); node->children[0]->identifier_node->types.identifier = new_instance_name; - module->types.module.module_instantiations_instance = (ast_node_t**)vtr::realloc(module->types.module.module_instantiations_instance, sizeof(ast_node_t*) * (num_instances + 1)); + module->types.module.module_instantiations_instance = (ast_node_t**)vtr::realloc( + module->types.module.module_instantiations_instance, sizeof(ast_node_t*) * (num_instances + 1)); module->types.module.module_instantiations_instance[num_instances] = node; module->types.module.size_module_instantiations++; @@ -861,16 +921,17 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ ast_node_t* temp_instance = node; char* instance_name_prefix = this_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); long sc_spot; /* lookup the name of the module associated with this instantiated point */ - if ((sc_spot = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier)) == -1) { - error_message(AST, node->loc, - "Can't find module name %s\n", temp_instance->identifier_node->types.identifier); + if ((sc_spot + = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier)) + == -1) { + error_message(AST, node->loc, "Can't find module name %s\n", + temp_instance->identifier_node->types.identifier); } /* make a unique copy of this module */ @@ -883,18 +944,21 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ add_top_module_to_ast(verilog_ast, instance); /* create the string cache list for the instantiated module */ - sc_hierarchy* original_sc_hierarchy = ((ast_node_t*)module_names_to_idx->data[sc_spot])->types.hierarchy; + sc_hierarchy* original_sc_hierarchy + = ((ast_node_t*)module_names_to_idx->data[sc_spot])->types.hierarchy; sc_hierarchy* module_sc_hierarchy = copy_sc_hierarchy(original_sc_hierarchy); instance->types.hierarchy = module_sc_hierarchy; module_sc_hierarchy->parent = local_ref; module_sc_hierarchy->instance_name_prefix = vtr::strdup(temp_instance_name); - module_sc_hierarchy->scope_id = vtr::strdup(temp_instance->children[0]->identifier_node->types.identifier); + module_sc_hierarchy->scope_id + = vtr::strdup(temp_instance->children[0]->identifier_node->types.identifier); module_sc_hierarchy->top_node = instance; /* update parent string cache list */ int num_module_children = local_ref->num_module_children; - local_ref->module_children = (sc_hierarchy**)vtr::realloc(local_ref->module_children, sizeof(sc_hierarchy*) * (num_module_children + 1)); + local_ref->module_children = (sc_hierarchy**)vtr::realloc( + local_ref->module_children, sizeof(sc_hierarchy*) * (num_module_children + 1)); local_ref->module_children[num_module_children] = module_sc_hierarchy; local_ref->num_module_children++; @@ -902,8 +966,10 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ if (data->pass == 2) { /* make sure parameters are updated */ /* TODO apply remaining defparams and check for conflicts */ - update_instance_parameter_table_direct_instances(temp_instance, module_sc_hierarchy->local_param_table_sc); - update_instance_parameter_table_defparams(temp_instance, module_sc_hierarchy->local_param_table_sc); + update_instance_parameter_table_direct_instances(temp_instance, + module_sc_hierarchy->local_param_table_sc); + update_instance_parameter_table_defparams(temp_instance, + module_sc_hierarchy->local_param_table_sc); } instance = build_hierarchy(instance, NULL, -1, module_sc_hierarchy, true, true, data); @@ -915,8 +981,7 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ case TERNARY_OPERATION: { if (node->children[0] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform operation with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform operation with nonexistent value"); } ast_node_t* child_condition = node->children[0]; if (node_is_constant(child_condition)) { @@ -937,8 +1002,7 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ case BINARY_OPERATION: { if (node->children[0] == NULL || node->children[1] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform operation with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform operation with nonexistent value"); } /* only fold if size can be self-determined */ @@ -964,8 +1028,7 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ case UNARY_OPERATION: { if (node->children[0] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform operation with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform operation with nonexistent value"); } /* only fold if size can be self-determined */ @@ -975,7 +1038,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ /* clean up */ free_resolved_children(node); - change_to_number_node(node, VNumber(*(new_node->types.vnumber), new_node->types.vnumber->size())); + change_to_number_node(node, + VNumber(*(new_node->types.vnumber), new_node->types.vnumber->size())); } new_node = free_whole_tree(new_node); } @@ -1005,7 +1069,8 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ resolve_concat_sizes(node->children[previous], local_ref); resolve_concat_sizes(node->children[current], local_ref); - VNumber new_value = V_CONCAT({*(node->children[previous]->types.vnumber), *(node->children[current]->types.vnumber)}); + VNumber new_value = V_CONCAT({*(node->children[previous]->types.vnumber), + *(node->children[current]->types.vnumber)}); node->children[current] = free_whole_tree(node->children[current]); @@ -1024,8 +1089,7 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ if (node->num_children == 0) { // could we simply warn and continue ? any ways we can recover rather than fail? /* resulting replication(s) of zero */ - error_message(AST, node->loc, - "%s", "Cannot concatenate zero bitstrings"); + error_message(AST, node->loc, "%s", "Cannot concatenate zero bitstrings"); } // node was all constant @@ -1069,7 +1133,11 @@ ast_node_t* build_hierarchy(ast_node_t* node, ast_node_t* parent, int index, sc_ * Basic sanity checks also happen here that weren't caught during parsing, e.g. checking port * lists. * --------------------------------------------------------------------------------------------------- */ -ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* local_ref, bool is_generate_region, bool fold_expressions) { +ast_node_t* finalize_ast(ast_node_t* node, + ast_node_t* parent, + sc_hierarchy* local_ref, + bool is_generate_region, + bool fold_expressions) { short* child_skip_list = NULL; // list of children not to traverse into short skip_children = false; // skips the DFS completely if true @@ -1107,8 +1175,8 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc for (int i = 1; i < connect_list->num_children; i++) { if ((connect_list->children[i]->identifier_node && is_ordered_list) || (!connect_list->children[i]->identifier_node && !is_ordered_list)) { - error_message(AST, node->loc, - "%s", "Cannot mix port connections by name and port connections by ordered list\n"); + error_message(AST, node->loc, "%s", + "Cannot mix port connections by name and port connections by ordered list\n"); } } break; @@ -1131,12 +1199,11 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc } for (int i = 1; i < connect_list->num_children; i++) { - if ((connect_list->children[i] - && connect_list->children[i]->children) + if ((connect_list->children[i] && connect_list->children[i]->children) && ((connect_list->children[i]->children[0] && is_ordered_list) || (!connect_list->children[i]->children[0] && !is_ordered_list))) { - error_message(AST, node->loc, - "%s", "Cannot mix port connections by name and port connections by ordered list\n"); + error_message(AST, node->loc, "%s", + "Cannot mix port connections by name and port connections by ordered list\n"); } } break; @@ -1185,7 +1252,8 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc delete temp; if (newNode->type != NUMBERS) { - error_message(AST, node->loc, "Parameter %s is not a constant expression\n", node->types.identifier); + error_message(AST, node->loc, "Parameter %s is not a constant expression\n", + node->types.identifier); } } @@ -1217,7 +1285,8 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc char** genvar_list = NULL; verify_genvars(node, local_ref, &genvar_list, 0); - if (genvar_list) vtr::free(genvar_list); + if (genvar_list) + vtr::free(genvar_list); iterator = resolve_hierarchical_name_reference(local_ref, initial->children[0]->types.identifier); oassert(iterator != NULL); @@ -1225,8 +1294,8 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc if (!(node_is_constant(initial->children[1])) || !(node_is_constant(compare_expression->children[1])) || !(verify_terminal(terminal->children[1], iterator))) { - error_message(AST, node->loc, - "%s", "Loop generate construct conditions must be constant expressions"); + error_message(AST, node->loc, "%s", + "Loop generate construct conditions must be constant expressions"); } } @@ -1250,8 +1319,7 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc node->children[1] = finalize_ast(node->children[1], node, local_ref, is_generate_region, false); if (node->children[1] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform assignment with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform assignment with nonexistent value"); } } @@ -1262,11 +1330,9 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc case REPLICATE: { node->children[0] = finalize_ast(node->children[0], node, local_ref, is_generate_region, true); if (!(node_is_constant(node->children[0]))) { - error_message(AST, node->loc, - "%s", "Replication constant must be a constant expression"); + error_message(AST, node->loc, "%s", "Replication constant must be a constant expression"); } else if (node->children[0]->types.vnumber->has_unknown()) { - error_message(AST, node->loc, - "%s", "Replication constant cannot contain x or z"); + error_message(AST, node->loc, "%s", "Replication constant cannot contain x or z"); } ast_node_t* new_node = NULL; @@ -1325,7 +1391,8 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc if (child_skip_list[i] == false) { /* recurse */ ast_node_t* old_child = node->children[i]; - ast_node_t* new_child = finalize_ast(old_child, node, new_ref, is_generate_region, fold_expressions); + ast_node_t* new_child + = finalize_ast(old_child, node, new_ref, is_generate_region, fold_expressions); node->children[i] = new_child; if (old_child != new_child) { @@ -1363,10 +1430,9 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc ast_node_t* temp_instance = node->types.module.module_instantiations_instance[i]; char* instance_name_prefix = local_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); long sc_spot = sc_lookup_string(module_names_to_idx, temp_instance_name); @@ -1376,9 +1442,11 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc long sc_spot_2; /* lookup the name of the module associated with this instantiated point */ - if ((sc_spot_2 = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier)) == -1) { - error_message(AST, node->loc, - "Can't find module name %s\n", temp_instance->identifier_node->types.identifier); + if ((sc_spot_2 + = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier)) + == -1) { + error_message(AST, node->loc, "Can't find module name %s\n", + temp_instance->identifier_node->types.identifier); } /* make a unique copy of this module */ @@ -1389,15 +1457,18 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc add_top_module_to_ast(verilog_ast, instance); /* create the string cache list for the instantiated module */ - sc_hierarchy* original_sc_hierarchy = ((ast_node_t*)module_names_to_idx->data[sc_spot])->types.hierarchy; + sc_hierarchy* original_sc_hierarchy + = ((ast_node_t*)module_names_to_idx->data[sc_spot])->types.hierarchy; sc_hierarchy* module_sc_hierarchy = copy_sc_hierarchy(original_sc_hierarchy); module_sc_hierarchy->parent = local_ref; module_sc_hierarchy->instance_name_prefix = vtr::strdup(temp_instance_name); - module_sc_hierarchy->scope_id = vtr::strdup(temp_instance->children[0]->identifier_node->types.identifier); + module_sc_hierarchy->scope_id + = vtr::strdup(temp_instance->children[0]->identifier_node->types.identifier); /* update parent string cache list */ int num_module_children = local_ref->num_module_children; - local_ref->module_children = (sc_hierarchy**)vtr::realloc(local_ref->module_children, sizeof(sc_hierarchy*) * (num_module_children + 1)); + local_ref->module_children = (sc_hierarchy**)vtr::realloc( + local_ref->module_children, sizeof(sc_hierarchy*) * (num_module_children + 1)); local_ref->module_children[i] = module_sc_hierarchy; local_ref->num_module_children++; } else { @@ -1427,10 +1498,9 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc ast_node_t* temp_instance = node->types.function.function_instantiations_instance[i]; char* instance_name_prefix = local_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); long sc_spot = sc_lookup_string(module_names_to_idx, temp_instance_name); oassert(sc_spot > -1 && module_names_to_idx->data[sc_spot] != NULL); @@ -1459,13 +1529,13 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc ast_node_t* temp_instance = node->types.task.task_instantiations_instance[i]; char* instance_name_prefix = local_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); /* lookup the name of the task associated with this instantiated point */ - long sc_spot = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier); + long sc_spot + = sc_lookup_string(module_names_to_idx, temp_instance->identifier_node->types.identifier); oassert(sc_spot > -1 && module_names_to_idx->data[sc_spot] != NULL); ast_node_t* instance = (ast_node_t*)module_names_to_idx->data[sc_spot]; @@ -1525,9 +1595,7 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc } case VAR_DECLARE: { // pack 2d array into 1d - if (node->num_children == 7 - && node->children[4] - && node->children[5]) { + if (node->num_children == 7 && node->children[4] && node->children[5]) { convert_2D_to_1D_array(&node); } @@ -1536,8 +1604,7 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc case BINARY_OPERATION: { if (node->children[0] == NULL || node->children[1] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform operation with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform operation with nonexistent value"); } /* only fold if size can be self-determined */ @@ -1563,8 +1630,7 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc case UNARY_OPERATION: { if (node->children[0] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform operation with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform operation with nonexistent value"); } /* only fold if size can be self-determined */ @@ -1574,7 +1640,8 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc /* clean up */ free_resolved_children(node); - change_to_number_node(node, VNumber(*(new_node->types.vnumber), new_node->types.vnumber->size())); + change_to_number_node(node, + VNumber(*(new_node->types.vnumber), new_node->types.vnumber->size())); } new_node = free_whole_tree(new_node); } @@ -1601,7 +1668,8 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc resolve_concat_sizes(node->children[previous], local_ref); resolve_concat_sizes(node->children[current], local_ref); - VNumber new_value = V_CONCAT({*(node->children[previous]->types.vnumber), *(node->children[current]->types.vnumber)}); + VNumber new_value = V_CONCAT({*(node->children[previous]->types.vnumber), + *(node->children[current]->types.vnumber)}); node->children[current] = free_whole_tree(node->children[current]); @@ -1620,8 +1688,7 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc if (node->num_children == 0) { // could we simply warn and continue ? any ways we can recover rather than fail? /* resulting replication(s) of zero */ - error_message(AST, node->loc, - "%s", "Cannot concatenate zero bitstrings"); + error_message(AST, node->loc, "%s", "Cannot concatenate zero bitstrings"); } // node was all constant @@ -1650,8 +1717,7 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc /* note: indexed part-selects (-: and +:) should support non-constant base expressions, * e.g. my_var[some_input+:3] = 4'b0101, but we don't support it right now... */ - error_message(AST, node->loc, - "%s", "Part-selects can only contain constant expressions"); + error_message(AST, node->loc, "%s", "Part-selects can only contain constant expressions"); } break; @@ -1676,7 +1742,8 @@ ast_node_t* finalize_ast(ast_node_t* node, ast_node_t* parent, sc_hierarchy* loc ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_memory = true; } - if (node->num_children == 2) convert_2D_to_1D_array_ref(&node, local_ref); + if (node->num_children == 2) + convert_2D_to_1D_array_ref(&node, local_ref); break; } case STATEMENT: //fallthrough @@ -1746,8 +1813,7 @@ ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long* node->children[1] = reduce_expressions(node->children[1], local_ref, max_size, assignment_size); if (node->children[1] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform assignment with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform assignment with nonexistent value"); } } else { VNumber* temp = node->children[1]->types.vnumber; @@ -1771,7 +1837,8 @@ ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long* long sc_spot = sc_lookup_string(local_symbol_table_sc, id); if (sc_spot > -1) { - operation_list signedness = ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.signedness; + operation_list signedness + = ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.signedness; VNumber* old_value = node->children[1]->types.vnumber; if (signedness == UNSIGNED) { node->children[1]->types.vnumber = new VNumber(V_UNSIGNED(*old_value)); @@ -1817,15 +1884,16 @@ ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long* /* add the source identifier contents if the * local identifier has been already resolved */ if (var_declare->types.variable.initial_value) - node->types.variable.initial_value = new VNumber((*var_declare->types.variable.initial_value)); + node->types.variable.initial_value + = new VNumber((*var_declare->types.variable.initial_value)); node->types.variable.signedness = var_declare->types.variable.signedness; node->identifier_node = ast_node_deep_copy(var_declare->identifier_node); } } else { /* error - symbol either doesn't exist or is not accessible to this scope */ - error_message(AST, node->loc, - "Missing declaration of this symbol %s\n", node->types.identifier); + error_message(AST, node->loc, "Missing declaration of this symbol %s\n", + node->types.identifier); } } break; @@ -1885,10 +1953,9 @@ ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long* ast_node_t* temp_instance = node->types.module.module_instantiations_instance[i]; char* instance_name_prefix = local_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); long sc_spot = sc_lookup_string(module_names_to_idx, temp_instance_name); /* lookup the name of the module associated with this instantiated point */ @@ -1911,10 +1978,9 @@ ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long* ast_node_t* temp_instance = node->types.function.function_instantiations_instance[i]; char* instance_name_prefix = local_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); long sc_spot = sc_lookup_string(module_names_to_idx, temp_instance_name); /* lookup the name of the module associated with this instantiated point */ @@ -1938,8 +2004,7 @@ ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long* case BINARY_OPERATION: { if (node->children[0] == NULL || node->children[1] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform operation with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform operation with nonexistent value"); } ast_node_t* new_node = fold_binary(&node); @@ -1967,8 +2032,7 @@ ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long* case UNARY_OPERATION: { if (node->children[0] == NULL) { /* resulting from replication of zero */ - error_message(AST, node->loc, - "%s", "Cannot perform operation with nonexistent value"); + error_message(AST, node->loc, "%s", "Cannot perform operation with nonexistent value"); } ast_node_t* new_node = fold_unary(&node); @@ -2111,13 +2175,14 @@ void update_instance_parameter_table_direct_instances(ast_node_t* instance, STRI if (parameter_override_list->children[j]->types.variable.is_parameter) { param_count++; if (is_by_name != (parameter_override_list->children[j]->identifier_node != NULL)) { - error_message(AST, parameter_override_list->loc, - "%s", "Cannot mix parameters passed by name and parameters passed by ordered list\n"); + error_message(AST, parameter_override_list->loc, "%s", + "Cannot mix parameters passed by name and parameters passed by ordered list\n"); } else if (is_by_name) { char* param_id = parameter_override_list->children[j]->identifier_node->types.identifier; for (int k = 0; k < j; k++) { - if (!strcmp(param_id, parameter_override_list->children[k]->identifier_node->types.identifier)) { + if (!strcmp(param_id, + parameter_override_list->children[k]->identifier_node->types.identifier)) { error_message(AST, parameter_override_list->loc, "Cannot override the same parameter twice (%s) within a module instance\n", parameter_override_list->children[j]->identifier_node->types.identifier); @@ -2126,8 +2191,7 @@ void update_instance_parameter_table_direct_instances(ast_node_t* instance, STRI sc_spot = sc_lookup_string(instance_param_table_sc, param_id); if (sc_spot == -1) { - error_message(AST, parameter_override_list->loc, - "Can't find parameter name %s in module %s\n", + error_message(AST, parameter_override_list->loc, "Can't find parameter name %s in module %s\n", param_id, instance->identifier_node->types.identifier); } } else { @@ -2144,7 +2208,8 @@ void update_instance_parameter_table_direct_instances(ast_node_t* instance, STRI if (!is_by_name && param_count > instance_param_table_sc->free) { error_message(AST, parameter_override_list->loc, "There are more parameters (%d) passed into %s than there are specified in the module (%ld)!", - param_count, instance->children[1]->children[0]->types.identifier, instance_param_table_sc->free); + param_count, instance->children[1]->children[0]->types.identifier, + instance_param_table_sc->free); } } } @@ -2159,16 +2224,14 @@ void update_instance_parameter_table_defparams(ast_node_t* instance, STRING_CACH char* param_id = parameter_override_list->children[j]->identifier_node->types.identifier; sc_spot = sc_lookup_string(instance_param_table_sc, param_id); if (sc_spot == -1) { - warning_message(AST, parameter_override_list->loc, - "Can't find parameter name %s in module %s\n", + warning_message(AST, parameter_override_list->loc, "Can't find parameter name %s in module %s\n", param_id, instance->identifier_node->types.identifier); } else { ast_node_t* param_node = (ast_node_t*)instance_param_table_sc->data[sc_spot]; if (param_node == NULL) { instance_param_table_sc->data[sc_spot] = (void*)parameter_override_list->children[j]->children[4]; } else if (!param_node->types.variable.is_parameter) { - warning_message(AST, parameter_override_list->loc, - "Defparam can only override parameters: %s\n", + warning_message(AST, parameter_override_list->loc, "Defparam can only override parameters: %s\n", parameter_override_list->children[j]->identifier_node->types.identifier); } else { /* update this parameter and remove all other overrides with this name */ @@ -2205,10 +2268,9 @@ void override_parameters_for_all_instances(ast_node_t* module, sc_hierarchy* loc ast_node_t* temp_instance = module_instantiations_instance[i]; char* instance_name_prefix = local_ref->instance_name_prefix; - char* temp_instance_name = make_full_ref_name(instance_name_prefix, - temp_instance->identifier_node->types.identifier, - temp_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name + = make_full_ref_name(instance_name_prefix, temp_instance->identifier_node->types.identifier, + temp_instance->children[0]->identifier_node->types.identifier, NULL, -1); long sc_spot = sc_lookup_string(module_names_to_idx, temp_instance_name); @@ -2247,15 +2309,13 @@ void convert_2D_to_1D_array(ast_node_t** var_declare) { error_message(AST, (*var_declare)->loc, "%s", "Odin doesn't support arrays declared [m:n] where m is less than n."); } else if ((addr_min < 0 || addr_max < 0) || (addr_min1 < 0 || addr_max1 < 0)) { - error_message(AST, (*var_declare)->loc, "%s", - "Odin doesn't support negative number in index."); + error_message(AST, (*var_declare)->loc, "%s", "Odin doesn't support negative number in index."); } char* name = (*var_declare)->identifier_node->types.identifier; if (addr_min != 0 || addr_min1 != 0) { - error_message(AST, (*var_declare)->loc, - "%s: right memory address index must be zero\n", name); + error_message(AST, (*var_declare)->loc, "%s: right memory address index must be zero\n", name); } long addr_chunk_size = (addr_max1 - addr_min1 + 1); @@ -2329,25 +2389,24 @@ void verify_genvars(ast_node_t* node, sc_hierarchy* local_ref, char*** other_gen if (strcmp(initial->children[0]->types.identifier, terminal->children[0]->types.identifier) != 0) { /* must match */ - error_message(AST, node->loc, - "%s", "Must use the same genvar for initial condition and iteration condition"); + error_message(AST, node->loc, "%s", + "Must use the same genvar for initial condition and iteration condition"); } ast_node_t* var_declare = resolve_hierarchical_name_reference(local_ref, iterator->types.identifier); if (var_declare == NULL) { - error_message(AST, iterator->loc, - "Missing declaration of this symbol %s\n", iterator->types.identifier); + error_message(AST, iterator->loc, "Missing declaration of this symbol %s\n", + iterator->types.identifier); } else if (!var_declare->types.variable.is_genvar) { - error_message(AST, node->loc, - "%s", "Iterator for loop generate construct must be declared as a genvar"); + error_message(AST, node->loc, "%s", + "Iterator for loop generate construct must be declared as a genvar"); } // check genvars that were already found for (int i = 0; i < num_genvars; i++) { if (!strcmp(iterator->types.identifier, (*other_genvars)[i])) { - error_message(AST, node->loc, - "%s", "Cannot reuse a genvar in a nested loop sequence"); + error_message(AST, node->loc, "%s", "Cannot reuse a genvar in a nested loop sequence"); } } @@ -2436,7 +2495,9 @@ ast_node_t* look_for_matching_hard_block(ast_node_t* node, char* hard_block_name * by evaluating the port connections to determine the order */ warning_message(AST, connect_list->loc, - "Attempting to convert this instance to a hard block (%s) - unnamed port connections will be matched according to hard block specification and may produce unexpected results\n", hard_block_name); + "Attempting to convert this instance to a hard block (%s) - unnamed port connections will " + "be matched according to hard block specification and may produce unexpected results\n", + hard_block_name); t_model_ports *hb_ports_1 = NULL, *hb_ports_2 = NULL; bool is_input, is_output; @@ -2537,13 +2598,15 @@ ast_node_t* look_for_matching_hard_block(ast_node_t* node, char* hard_block_name i = 0; while (hb_ports_1) { oassert(connect_list->children[i] && !connect_list->children[i]->identifier_node); - connect_list->children[i]->identifier_node = newSymbolNode(vtr::strdup(hb_ports_1->name), connect_list->loc); + connect_list->children[i]->identifier_node + = newSymbolNode(vtr::strdup(hb_ports_1->name), connect_list->loc); hb_ports_1 = hb_ports_1->next; i++; } while (hb_ports_2) { oassert(connect_list->children[i] && !connect_list->children[i]->identifier_node); - connect_list->children[i]->identifier_node = newSymbolNode(vtr::strdup(hb_ports_2->name), connect_list->loc); + connect_list->children[i]->identifier_node + = newSymbolNode(vtr::strdup(hb_ports_2->name), connect_list->loc); hb_ports_2 = hb_ports_2->next; i++; } @@ -2601,31 +2664,28 @@ void create_param_table_for_scope(ast_node_t* module_items, sc_hierarchy* local_ ast_node_t* var_declare = module_items->children[i]->children[j]; /* symbols are already dealt with */ - if (var_declare->types.variable.is_input - || var_declare->types.variable.is_output - || var_declare->types.variable.is_reg - || var_declare->types.variable.is_genvar - || var_declare->types.variable.is_wire - || var_declare->types.variable.is_defparam) + if (var_declare->types.variable.is_input || var_declare->types.variable.is_output + || var_declare->types.variable.is_reg || var_declare->types.variable.is_genvar + || var_declare->types.variable.is_wire || var_declare->types.variable.is_defparam) continue; oassert(module_items->children[i]->children[j]->type == VAR_DECLARE); - oassert(var_declare->types.variable.is_parameter - || var_declare->types.variable.is_localparam + oassert(var_declare->types.variable.is_parameter || var_declare->types.variable.is_localparam || var_declare->types.variable.is_defparam); /* make the string to add to the string cache */ - temp_string = make_full_ref_name(NULL, NULL, NULL, var_declare->identifier_node->types.identifier, -1); + temp_string + = make_full_ref_name(NULL, NULL, NULL, var_declare->identifier_node->types.identifier, -1); if (var_declare->types.variable.is_parameter || var_declare->types.variable.is_localparam) { /* look for that element */ sc_spot = sc_add_string(local_param_table_sc, temp_string); if (local_param_table_sc->data[sc_spot] != NULL) { - error_message(AST, var_declare->loc, - "Block already has parameter with this name (%s)\n", var_declare->identifier_node->types.identifier); + error_message(AST, var_declare->loc, "Block already has parameter with this name (%s)\n", + var_declare->identifier_node->types.identifier); } /* store the data which is an idx here */ @@ -2635,8 +2695,8 @@ void create_param_table_for_scope(ast_node_t* module_items, sc_hierarchy* local_ sc_spot = sc_add_string(local_defparam_table_sc, temp_string); if (local_defparam_table_sc->data[sc_spot] != NULL) { - error_message(AST, var_declare->loc, - "Block already has defparam with this name (%s)\n", var_declare->identifier_node->types.identifier); + error_message(AST, var_declare->loc, "Block already has defparam with this name (%s)\n", + var_declare->identifier_node->types.identifier); } /* store the data which is an idx here */ diff --git a/odin_ii/src/ast/ast_loop_unroll.cpp b/odin_ii/src/ast/ast_loop_unroll.cpp index ff522f56e0c..b2b532c1153 100644 --- a/odin_ii/src/ast/ast_loop_unroll.cpp +++ b/odin_ii/src/ast/ast_loop_unroll.cpp @@ -36,7 +36,11 @@ #include "vtr_memory.h" #include "vtr_util.h" -ast_node_t* unroll_for_loop(ast_node_t* node, ast_node_t* parent, int* num_unrolled, sc_hierarchy* local_ref, bool is_generate) { +ast_node_t* unroll_for_loop(ast_node_t* node, + ast_node_t* parent, + int* num_unrolled, + sc_hierarchy* local_ref, + bool is_generate) { oassert(node && node->type == FOR); ast_node_t* unrolled_for = resolve_for(node); @@ -68,7 +72,8 @@ ast_node_t* unroll_for_loop(ast_node_t* node, ast_node_t* parent, int* num_unrol child_hierarchy->parent = local_ref; if (child->types.identifier != NULL) { - local_ref->block_children = (sc_hierarchy**)vtr::realloc(local_ref->block_children, sizeof(sc_hierarchy*) * (local_ref->num_block_children + 1)); + local_ref->block_children = (sc_hierarchy**)vtr::realloc( + local_ref->block_children, sizeof(sc_hierarchy*) * (local_ref->num_block_children + 1)); local_ref->block_children[local_ref->num_block_children] = child_hierarchy; local_ref->num_block_children++; @@ -79,14 +84,16 @@ ast_node_t* unroll_for_loop(ast_node_t* node, ast_node_t* parent, int* num_unrol child->types.identifier = vtr::strdup(new_id.c_str()); child_hierarchy->scope_id = node->types.identifier; - child_hierarchy->instance_name_prefix = make_full_ref_name(local_ref->instance_name_prefix, NULL, child->types.identifier, NULL, -1); + child_hierarchy->instance_name_prefix = make_full_ref_name( + local_ref->instance_name_prefix, NULL, child->types.identifier, NULL, -1); } else { /* create a unique scope id/instance name prefix for internal use */ this_genblk = local_ref->num_unnamed_genblks + 1; std::string new_scope_id("genblk"); new_scope_id = new_scope_id + std::to_string(this_genblk) + "[" + std::to_string(j - i) + "]"; child_hierarchy->scope_id = vtr::strdup(new_scope_id.c_str()); - child_hierarchy->instance_name_prefix = make_full_ref_name(local_ref->instance_name_prefix, NULL, child_hierarchy->scope_id, NULL, -1); + child_hierarchy->instance_name_prefix = make_full_ref_name( + local_ref->instance_name_prefix, NULL, child_hierarchy->scope_id, NULL, -1); } /* string caches */ @@ -100,7 +107,8 @@ ast_node_t* unroll_for_loop(ast_node_t* node, ast_node_t* parent, int* num_unrol child_hierarchy->top_node = child; child_hierarchy->parent = local_ref; - local_ref->block_children = (sc_hierarchy**)vtr::realloc(local_ref->block_children, sizeof(sc_hierarchy*) * (local_ref->num_block_children + 1)); + local_ref->block_children = (sc_hierarchy**)vtr::realloc( + local_ref->block_children, sizeof(sc_hierarchy*) * (local_ref->num_block_children + 1)); local_ref->block_children[local_ref->num_block_children] = child_hierarchy; local_ref->num_block_children++; @@ -111,7 +119,8 @@ ast_node_t* unroll_for_loop(ast_node_t* node, ast_node_t* parent, int* num_unrol child->types.identifier = vtr::strdup(new_id.c_str()); child_hierarchy->scope_id = node->types.identifier; - child_hierarchy->instance_name_prefix = make_full_ref_name(local_ref->instance_name_prefix, NULL, child->types.identifier, NULL, -1); + child_hierarchy->instance_name_prefix + = make_full_ref_name(local_ref->instance_name_prefix, NULL, child->types.identifier, NULL, -1); /* string caches */ create_param_table_for_scope(child, child_hierarchy); @@ -203,7 +212,8 @@ int resolve_pre_condition(ast_node_t* node, ast_node_t** number_node) { if (is_unsupported_pre(node)) { return UNSUPPORTED_PRE_CONDITION_NODE; } - if (*number_node) free_whole_tree(*number_node); + if (*number_node) + free_whole_tree(*number_node); *number_node = ast_node_deep_copy(node->children[1]); return 0; } @@ -214,13 +224,32 @@ int resolve_pre_condition(ast_node_t* node, ast_node_t** number_node) { * to true or false if the symbol is replaced with some value. */ bool is_unsupported_condition(ast_node_t* node, ast_node_t* symbol) { - bool invalid_inequality = (node->type != BINARY_OPERATION || !(node->types.operation.op == LT || node->types.operation.op == GT || node->types.operation.op == LOGICAL_EQUAL || node->types.operation.op == NOT_EQUAL || node->types.operation.op == LTE || node->types.operation.op == GTE) || node->num_children != 2 || node->children[1] == nullptr || !(node->children[1]->type == NUMBERS || node->children[1]->type == IDENTIFIERS) || node->children[0] == nullptr || !(node->children[0]->type == NUMBERS || node->children[0]->type == IDENTIFIERS)); - - bool invalid_logical_concatenation = (node->type != BINARY_OPERATION || !(node->types.operation.op == LOGICAL_OR || node->types.operation.op == LOGICAL_AND) || node->num_children != 2 || node->children[1] == nullptr || is_unsupported_condition(node->children[1], symbol) || node->children[0] == nullptr || is_unsupported_condition(node->children[0], symbol)); - - bool invalid_negation = (node->type != UNARY_OPERATION || node->types.operation.op != LOGICAL_NOT || node->num_children != 1 || node->children[0] == nullptr || is_unsupported_condition(node->children[0], symbol)); - - bool contains_unknown_symbols = !(invalid_inequality) && ((node->children[0]->type == IDENTIFIERS && strcmp(node->children[0]->types.identifier, symbol->types.identifier)) || (node->children[1]->type == IDENTIFIERS && strcmp(node->children[1]->types.identifier, symbol->types.identifier))); + bool invalid_inequality + = (node->type != BINARY_OPERATION + || !(node->types.operation.op == LT || node->types.operation.op == GT + || node->types.operation.op == LOGICAL_EQUAL || node->types.operation.op == NOT_EQUAL + || node->types.operation.op == LTE || node->types.operation.op == GTE) + || node->num_children != 2 || node->children[1] == nullptr + || !(node->children[1]->type == NUMBERS || node->children[1]->type == IDENTIFIERS) + || node->children[0] == nullptr + || !(node->children[0]->type == NUMBERS || node->children[0]->type == IDENTIFIERS)); + + bool invalid_logical_concatenation + = (node->type != BINARY_OPERATION + || !(node->types.operation.op == LOGICAL_OR || node->types.operation.op == LOGICAL_AND) + || node->num_children != 2 || node->children[1] == nullptr + || is_unsupported_condition(node->children[1], symbol) || node->children[0] == nullptr + || is_unsupported_condition(node->children[0], symbol)); + + bool invalid_negation + = (node->type != UNARY_OPERATION || node->types.operation.op != LOGICAL_NOT || node->num_children != 1 + || node->children[0] == nullptr || is_unsupported_condition(node->children[0], symbol)); + + bool contains_unknown_symbols = !(invalid_inequality) + && ((node->children[0]->type == IDENTIFIERS + && strcmp(node->children[0]->types.identifier, symbol->types.identifier)) + || (node->children[1]->type == IDENTIFIERS + && strcmp(node->children[1]->types.identifier, symbol->types.identifier))); return ((invalid_inequality || contains_unknown_symbols) && invalid_logical_concatenation && invalid_negation); } @@ -256,9 +285,7 @@ condition_function resolve_condition(ast_node_t* node, ast_node_t* symbol, int* right = resolve_condition(node->children[1], symbol, error_code); if (*error_code) return nullptr; - return [=](long value) { - return (left(value) || right(value)); - }; + return [=](long value) { return (left(value) || right(value)); }; case LOGICAL_AND: left = resolve_condition(node->children[0], symbol, error_code); if (*error_code) @@ -266,9 +293,7 @@ condition_function resolve_condition(ast_node_t* node, ast_node_t* symbol, int* right = resolve_condition(node->children[1], symbol, error_code); if (*error_code) return nullptr; - return [=](long value) { - return (left(value) && right(value)); - }; + return [=](long value) { return (left(value) && right(value)); }; case LOGICAL_NOT: inner = resolve_condition(node->children[0], symbol, error_code); if (*error_code) @@ -307,7 +332,17 @@ condition_function resolve_condition(ast_node_t* node, ast_node_t* symbol, int* * can currently be unrolled statically */ bool is_unsupported_post(ast_node_t* node, ast_node_t* symbol) { - return (node == nullptr || node->type != BINARY_OPERATION || !(node->types.operation.op == ADD || node->types.operation.op == MINUS || node->types.operation.op == MULTIPLY || node->types.operation.op == DIVIDE) || node->num_children != 2 || node->children[1] == nullptr || !((node->children[1]->type == IDENTIFIERS && !strcmp(node->children[1]->types.identifier, symbol->types.identifier)) || node->children[1]->type == NUMBERS || !is_unsupported_post(node->children[0], symbol)) || node->children[0] == nullptr || !((node->children[0]->type == IDENTIFIERS && !strcmp(node->children[0]->types.identifier, symbol->types.identifier)) || node->children[0]->type == NUMBERS || !is_unsupported_post(node->children[0], symbol))); + return (node == nullptr || node->type != BINARY_OPERATION + || !(node->types.operation.op == ADD || node->types.operation.op == MINUS + || node->types.operation.op == MULTIPLY || node->types.operation.op == DIVIDE) + || node->num_children != 2 || node->children[1] == nullptr + || !((node->children[1]->type == IDENTIFIERS + && !strcmp(node->children[1]->types.identifier, symbol->types.identifier)) + || node->children[1]->type == NUMBERS || !is_unsupported_post(node->children[0], symbol)) + || node->children[0] == nullptr + || !((node->children[0]->type == IDENTIFIERS + && !strcmp(node->children[0]->types.identifier, symbol->types.identifier)) + || node->children[0]->type == NUMBERS || !is_unsupported_post(node->children[0], symbol))); } post_condition_function resolve_binary_operation(ast_node_t* node) { @@ -342,7 +377,6 @@ post_condition_function resolve_binary_operation(ast_node_t* node) { } } - /* * (function: resolve_post_condition) * return a lambda which gives the next value @@ -363,7 +397,8 @@ post_condition_function resolve_post_condition(ast_node_t* assignment, ast_node_ */ ast_node_t* node = nullptr; /* Check that the post condition assignment node is a valid assignment */ - if (assignment != nullptr && assignment->type == BLOCKING_STATEMENT && assignment->num_children == 2 && assignment->children[0] != nullptr && assignment->children[1] != nullptr) { + if (assignment != nullptr && assignment->type == BLOCKING_STATEMENT && assignment->num_children == 2 + && assignment->children[0] != nullptr && assignment->children[1] != nullptr) { node = assignment->children[1]; } /* IMPORTANT: If support for more complex post conditions is added, update this inline function */ @@ -400,7 +435,8 @@ ast_node_t* dup_and_fill_body(ast_node_t* body, ast_node_t* pre, ast_node_t** va if (child && child->num_children > 0) { if (!is_unrolled) { for (int j = 0; j < copy->children[i]->num_children; j++) { - if (copy->children[i]->children[j] != child->children[j]) free_whole_tree(copy->children[i]->children[j]); + if (copy->children[i]->children[j] != child->children[j]) + free_whole_tree(copy->children[i]->children[j]); } copy->children[i] = dup_and_fill_body(child, pre, value, error_code); diff --git a/odin_ii/src/ast/ast_loop_unroll.h b/odin_ii/src/ast/ast_loop_unroll.h index b54a221483f..f2e81830c8e 100644 --- a/odin_ii/src/ast/ast_loop_unroll.h +++ b/odin_ii/src/ast/ast_loop_unroll.h @@ -41,15 +41,18 @@ typedef std::function condition_function; typedef std::function post_condition_function; -ast_node_t* unroll_for_loop(ast_node_t* node, ast_node_t* parent, int* num_unrolled, sc_hierarchy* local_ref, bool is_generate); +ast_node_t* unroll_for_loop(ast_node_t* node, + ast_node_t* parent, + int* num_unrolled, + sc_hierarchy* local_ref, + bool is_generate); -inline bool is_for_node(ast_node_t* node) { - return node && node->type == FOR; -} +inline bool is_for_node(ast_node_t* node) { return node && node->type == FOR; } /* IMPORTANT: as support for more complex pre conditions is added, update this function. */ inline bool is_unsupported_pre(ast_node_t* node) { - return (node == nullptr || node->type != BLOCKING_STATEMENT || node->num_children != 2 || node->children[1] == nullptr || node->children[1]->type != NUMBERS); + return (node == nullptr || node->type != BLOCKING_STATEMENT || node->num_children != 2 + || node->children[1] == nullptr || node->children[1]->type != NUMBERS); } bool is_unsupported_post(ast_node_t* node, ast_node_t* symbol); bool is_unsupported_condition(ast_node_t* node, ast_node_t* symbol); diff --git a/odin_ii/src/ast/ast_util.cpp b/odin_ii/src/ast/ast_util.cpp index f60759b6ae9..d4d90d4c230 100644 --- a/odin_ii/src/ast/ast_util.cpp +++ b/odin_ii/src/ast/ast_util.cpp @@ -113,8 +113,7 @@ void add_top_module_to_ast(ast_t* ast, ast_node_t* to_add) { oassert(ast); if (to_add) { ast->top_modules_count += 1; - ast->top_modules - = (ast_node_t**)vtr::realloc(ast->top_modules, sizeof(ast_node_t*) * ast->top_modules_count); + ast->top_modules = (ast_node_t**)vtr::realloc(ast->top_modules, sizeof(ast_node_t*) * ast->top_modules_count); ast->top_modules[ast->top_modules_count - 1] = to_add; } @@ -410,8 +409,11 @@ void make_concat_into_list_of_strings(ast_node_t* concat_top, char* instance_nam } else { if (var_declare->children[0] == NULL) { concat_top->types.concat.num_bit_strings++; - concat_top->types.concat.bit_strings = (char**)vtr::realloc(concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); - concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] = get_name_of_pin_at_bit(concat_top->children[i], -1, instance_name_prefix, local_ref); + concat_top->types.concat.bit_strings + = (char**)vtr::realloc(concat_top->types.concat.bit_strings, + sizeof(char*) * (concat_top->types.concat.num_bit_strings)); + concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] + = get_name_of_pin_at_bit(concat_top->children[i], -1, instance_name_prefix, local_ref); } else if (var_declare->children[2] == NULL) { /* reverse thorugh the range since highest bit in index will be lower in the string indx */ rnode[1] = var_declare->children[0]; @@ -420,8 +422,11 @@ void make_concat_into_list_of_strings(ast_node_t* concat_top, char* instance_nam for (j = rnode[1]->types.vnumber->get_value() - rnode[2]->types.vnumber->get_value(); j >= 0; j--) { concat_top->types.concat.num_bit_strings++; - concat_top->types.concat.bit_strings = (char**)vtr::realloc(concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); - concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] = get_name_of_pin_at_bit(concat_top->children[i], j, instance_name_prefix, local_ref); + concat_top->types.concat.bit_strings + = (char**)vtr::realloc(concat_top->types.concat.bit_strings, + sizeof(char*) * (concat_top->types.concat.num_bit_strings)); + concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] + = get_name_of_pin_at_bit(concat_top->children[i], j, instance_name_prefix, local_ref); } } else if (var_declare->children[3] != NULL) { oassert(false); @@ -430,8 +435,10 @@ void make_concat_into_list_of_strings(ast_node_t* concat_top, char* instance_nam vtr::free(temp_string); } else if (concat_top->children[i]->type == ARRAY_REF) { concat_top->types.concat.num_bit_strings++; - concat_top->types.concat.bit_strings = (char**)vtr::realloc(concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); - concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] = get_name_of_pin_at_bit(concat_top->children[i], 0, instance_name_prefix, local_ref); + concat_top->types.concat.bit_strings = (char**)vtr::realloc( + concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); + concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] + = get_name_of_pin_at_bit(concat_top->children[i], 0, instance_name_prefix, local_ref); } else if (concat_top->children[i]->type == RANGE_REF) { rnode[1] = concat_top->children[i]->children[0]; rnode[2] = concat_top->children[i]->children[1]; @@ -443,16 +450,24 @@ void make_concat_into_list_of_strings(ast_node_t* concat_top, char* instance_nam // Changed to forward to fix concatenation bug. for (j = 0; j < width; j++) { concat_top->types.concat.num_bit_strings++; - concat_top->types.concat.bit_strings = (char**)vtr::realloc(concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); - concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] = get_name_of_pin_at_bit(concat_top->children[i], ((rnode[1]->types.vnumber->get_value() - rnode[2]->types.vnumber->get_value())) - j, instance_name_prefix, local_ref); + concat_top->types.concat.bit_strings = (char**)vtr::realloc( + concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); + concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] + = get_name_of_pin_at_bit( + concat_top->children[i], + ((rnode[1]->types.vnumber->get_value() - rnode[2]->types.vnumber->get_value())) - j, + instance_name_prefix, local_ref); } } else if (concat_top->children[i]->type == NUMBERS) { if (concat_top->children[i]->types.vnumber->is_defined_size()) { // Changed to reverse to fix concatenation bug. for (j = concat_top->children[i]->types.vnumber->size() - 1; j >= 0; j--) { concat_top->types.concat.num_bit_strings++; - concat_top->types.concat.bit_strings = (char**)vtr::realloc(concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); - concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] = get_name_of_pin_at_bit(concat_top->children[i], j, instance_name_prefix, local_ref); + concat_top->types.concat.bit_strings + = (char**)vtr::realloc(concat_top->types.concat.bit_strings, + sizeof(char*) * (concat_top->types.concat.num_bit_strings)); + concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] + = get_name_of_pin_at_bit(concat_top->children[i], j, instance_name_prefix, local_ref); } } else { error_message(AST, concat_top->loc, "%s", "Unsized constants cannot be concatenated.\n"); @@ -461,8 +476,10 @@ void make_concat_into_list_of_strings(ast_node_t* concat_top, char* instance_nam /* forward through list since we build concatenate list in idx order of MSB at index 0 and LSB at index list_size */ for (j = 0; j < concat_top->children[i]->types.concat.num_bit_strings; j++) { concat_top->types.concat.num_bit_strings++; - concat_top->types.concat.bit_strings = (char**)vtr::realloc(concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); - concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] = get_name_of_pin_at_bit(concat_top->children[i], j, instance_name_prefix, local_ref); + concat_top->types.concat.bit_strings = (char**)vtr::realloc( + concat_top->types.concat.bit_strings, sizeof(char*) * (concat_top->types.concat.num_bit_strings)); + concat_top->types.concat.bit_strings[concat_top->types.concat.num_bit_strings - 1] + = get_name_of_pin_at_bit(concat_top->children[i], j, instance_name_prefix, local_ref); } } else { error_message(AST, concat_top->loc, "%s", "Unsupported operation within a concatenation.\n"); @@ -475,9 +492,7 @@ void make_concat_into_list_of_strings(ast_node_t* concat_top, char* instance_nam * change the original AST node to a NUMBER node or change the value of the node * originate from the function: create_tree_node_number() in ast_util.c *-------------------------------------------------------------------------*/ -void change_to_number_node(ast_node_t* node, long value) { - return change_to_number_node(node, VNumber(value)); -} +void change_to_number_node(ast_node_t* node, long value) { return change_to_number_node(node, VNumber(value)); } /*--------------------------------------------------------------------------- * (function: change_to_number_node) @@ -510,7 +525,8 @@ char* get_name_of_var_declare_at_bit(ast_node_t* var_declare, int bit) { return_string = make_full_ref_name(NULL, NULL, NULL, var_declare->identifier_node->types.identifier, -1); } else if (var_declare->children[2] == NULL) { oassert(var_declare->children[1]->type == NUMBERS); - return_string = make_full_ref_name(NULL, NULL, NULL, var_declare->identifier_node->types.identifier, var_declare->children[1]->types.vnumber->get_value() + bit); + return_string = make_full_ref_name(NULL, NULL, NULL, var_declare->identifier_node->types.identifier, + var_declare->children[1]->types.vnumber->get_value() + bit); } else if (var_declare->children[2] != NULL) { /* MEMORY output */ oassert(false); @@ -547,7 +563,8 @@ char* get_name_of_pin_at_bit(ast_node_t* var_node, int bit, char* instance_name_ if (var_node->type == ARRAY_REF) { oassert(var_node->identifier_node != NULL); oassert(var_node->children[0]->type == NUMBERS); - return_string = make_full_ref_name(NULL, NULL, NULL, var_node->identifier_node->types.identifier, (int)var_node->children[0]->types.vnumber->get_value()); + return_string = make_full_ref_name(NULL, NULL, NULL, var_node->identifier_node->types.identifier, + (int)var_node->children[0]->types.vnumber->get_value()); } else if (var_node->type == RANGE_REF) { oassert(bit >= 0); @@ -559,7 +576,8 @@ char* get_name_of_pin_at_bit(ast_node_t* var_node, int bit, char* instance_name_ oassert(rnode[2]->type == NUMBERS); oassert(rnode[1]->types.vnumber->get_value() >= rnode[2]->types.vnumber->get_value() + bit); - return_string = make_full_ref_name(NULL, NULL, NULL, var_node->identifier_node->types.identifier, rnode[2]->types.vnumber->get_value() + bit); + return_string = make_full_ref_name(NULL, NULL, NULL, var_node->identifier_node->types.identifier, + rnode[2]->types.vnumber->get_value() + bit); } else if ((var_node->type == IDENTIFIERS) && (bit == -1)) { return_string = make_full_ref_name(NULL, NULL, NULL, var_node->types.identifier, -1); } else if (var_node->type == IDENTIFIERS) { @@ -599,13 +617,17 @@ char* get_name_of_pin_at_bit(ast_node_t* var_node, int bit, char* instance_name_ var_node = free_whole_tree(var_node); } } - } else if (var_node->type == BINARY_OPERATION || var_node->type == UNARY_OPERATION || var_node->type == TERNARY_OPERATION) { + } else if (var_node->type == BINARY_OPERATION || var_node->type == UNARY_OPERATION + || var_node->type == TERNARY_OPERATION) { if (!var_node->net_node) - error_message(AST, var_node->loc, "Expression is not allowed for outputs in instance port connections. var_node->type = %s\n", ast_node_name_based_on_ids(var_node)); + error_message(AST, var_node->loc, + "Expression is not allowed for outputs in instance port connections. var_node->type = %s\n", + ast_node_name_based_on_ids(var_node)); } else { return_string = NULL; - error_message(AST, var_node->loc, "Unsupported variable type. var_node->type = %s\n", ast_node_name_based_on_ids(var_node)); + error_message(AST, var_node->loc, "Unsupported variable type. var_node->type = %s\n", + ast_node_name_based_on_ids(var_node)); } return return_string; @@ -645,7 +667,8 @@ char* get_name_of_pin_number(ast_node_t* var_node, int bit) { return_string = vtr::strdup(ZERO_PAD_ZERO); break; default: - error_message(AST, var_node->loc, "Unrecognised character %c in binary string \"%s\"!\n", c, var_node->types.vnumber->to_vstring('B').c_str()); + error_message(AST, var_node->loc, "Unrecognised character %c in binary string \"%s\"!\n", c, + var_node->types.vnumber->to_vstring('B').c_str()); break; } @@ -672,7 +695,8 @@ char_list_t* get_name_of_pins(ast_node_t* var_node, char* instance_name_prefix, oassert(rnode[1] && rnode[1]->type == NUMBERS); oassert(var_node->identifier_node != NULL); - return_string[0] = make_full_ref_name(NULL, NULL, NULL, var_node->identifier_node->types.identifier, rnode[1]->types.vnumber->get_value()); + return_string[0] = make_full_ref_name(NULL, NULL, NULL, var_node->identifier_node->types.identifier, + rnode[1]->types.vnumber->get_value()); } else if (var_node->type == RANGE_REF) { rnode[0] = var_node->identifier_node; rnode[1] = var_node->children[0]; @@ -683,7 +707,8 @@ char_list_t* get_name_of_pins(ast_node_t* var_node, char* instance_name_prefix, if (rnode[0]->type == IDENTIFIERS) { return_string = (char**)vtr::malloc(sizeof(char*) * width); for (i = 0; i < width; i++) - return_string[i] = make_full_ref_name(NULL, NULL, NULL, rnode[0]->types.identifier, rnode[2]->types.vnumber->get_value() + i); + return_string[i] = make_full_ref_name(NULL, NULL, NULL, rnode[0]->types.identifier, + rnode[2]->types.vnumber->get_value() + i); } else { oassert(rnode[0]->type == NUMBERS); return_string = get_name_of_pins_number(rnode[0], rnode[2]->types.vnumber->get_value(), width); @@ -741,8 +766,12 @@ char_list_t* get_name_of_pins(ast_node_t* var_node, char* instance_name_prefix, return_string = (char**)vtr::malloc(sizeof(char*) * width); for (i = 0; i < width; i++) // 0th bit is MSB so need to access reverse { - return_string[i] = (char*)vtr::malloc(sizeof(char) * strlen(var_node->types.concat.bit_strings[var_node->types.concat.num_bit_strings - i - 1]) + 1); - odin_sprintf(return_string[i], "%s", var_node->types.concat.bit_strings[var_node->types.concat.num_bit_strings - i - 1]); + return_string[i] = (char*)vtr::malloc( + sizeof(char) + * strlen(var_node->types.concat.bit_strings[var_node->types.concat.num_bit_strings - i - 1]) + + 1); + odin_sprintf(return_string[i], "%s", + var_node->types.concat.bit_strings[var_node->types.concat.num_bit_strings - i - 1]); } } } else { @@ -795,7 +824,8 @@ long get_size_of_variable(ast_node_t* node, sc_hierarchy* local_ref) { if (node_is_constant(var_declare)) { assignment_size = var_declare->types.vnumber->size(); } else { - error_message(AST, node->loc, "Parameter %s is not a constant expression\n", node->types.identifier); + error_message(AST, node->loc, "Parameter %s is not a constant expression\n", + node->types.identifier); } free_whole_tree(var_declare); @@ -969,9 +999,11 @@ static void check_binary_operation(ast_node_t** node) { switch ((*node)->types.operation.op) { case MULTIPLY: if ((*node)->children[0]->type == IDENTIFIERS && (*node)->children[1]->type == NUMBERS) - check_node_number((*node), (*node)->children[1], 1); // 1 means multiply and don't need to move children nodes + check_node_number((*node), (*node)->children[1], + 1); // 1 means multiply and don't need to move children nodes if ((*node)->children[0]->type == NUMBERS && (*node)->children[1]->type == IDENTIFIERS) - check_node_number((*node), (*node)->children[0], 2); // 2 means multiply and needs to move children nodes + check_node_number((*node), (*node)->children[0], + 2); // 2 means multiply and needs to move children nodes break; case DIVIDE: if (!node_is_constant((*node)->children[1])) @@ -1061,7 +1093,8 @@ ast_node_t* fold_unary(ast_node_t** node) { case CLOG2: if (voperand_0.size() > ODIN_STD_BITWIDTH) - warning_message(AST, (*node)->loc, "argument is %ld-bits but ODIN limit is %lu-bits \n", voperand_0.size(), ODIN_STD_BITWIDTH); + warning_message(AST, (*node)->loc, "argument is %ld-bits but ODIN limit is %lu-bits \n", + voperand_0.size(), ODIN_STD_BITWIDTH); vresult = VNumber(clog2(voperand_0.get_value(), voperand_0.size())); success = true; @@ -1268,16 +1301,15 @@ bool node_is_constant(ast_node_t* node) { void assert_constant_positionnal_args(ast_node_t* node, long arg_count) { if (!node->children) { - error_message(AST, node->loc, - "%s node expects arguments\n", ast_node_name_based_on_ids(node)); + error_message(AST, node->loc, "%s node expects arguments\n", ast_node_name_based_on_ids(node)); } else if (node->num_children < arg_count) { - error_message(AST, node->loc, - "%s node expects %ld positional arguments\n", ast_node_name_based_on_ids(node), arg_count); + error_message(AST, node->loc, "%s node expects %ld positional arguments\n", ast_node_name_based_on_ids(node), + arg_count); } else { for (long i = 0; i < arg_count; i += 1) { if (!node_is_constant(node->children[i])) { - error_message(AST, node->loc, - "%s node expects a constant at positional arguments [%ld]\n", ast_node_name_based_on_ids(node), i); + error_message(AST, node->loc, "%s node expects a constant at positional arguments [%ld]\n", + ast_node_name_based_on_ids(node), i); } } } @@ -1310,11 +1342,8 @@ void c_simple_print(std::string str) { // can only be octal if there is 3+ chars following if ((str_size - 3) >= format_char_index) { // try and see if its an octal number - char buffer[4] = { - str[format_char_index + 1], - str[format_char_index + 2], - str[format_char_index + 3], - 0}; + char buffer[4] + = {str[format_char_index + 1], str[format_char_index + 2], str[format_char_index + 3], 0}; next_char = format_char_index + 4; char* endptr = NULL; char octal_value = (char)strtoul(buffer, &endptr, 8); @@ -1362,7 +1391,8 @@ void c_display(ast_node_t* node) { /* check if its an escaped % sign */ if (format_input == "%%") { printf("%%"); - } else if (!argv_nodes || argc_node >= argv_nodes->num_children || argv_nodes->children[argc_node] == NULL) { + } else if (!argv_nodes || argc_node >= argv_nodes->num_children + || argv_nodes->children[argc_node] == NULL) { error_message(AST, node->children[0]->loc, "specifier character [%ld] has no argument associated with it", argc_node); } else { @@ -1384,8 +1414,9 @@ void c_display(ast_node_t* node) { break; } case 'v': { - warning_message(AST, argv->loc, - "%s", "Odin does not use signal strength since it is unsynthesizable, printing max strenght"); + warning_message( + AST, argv->loc, "%s", + "Odin does not use signal strength since it is unsynthesizable, printing max strenght"); printf("7"); break; @@ -1411,8 +1442,8 @@ void c_display(ast_node_t* node) { break; } default: - error_message(AST, argv->loc, - "%s\n", "invalid specifier characer, one of: d, b, h, o, c, v[broken], m, s ,t[broken]"); + error_message(AST, argv->loc, "%s\n", + "invalid specifier characer, one of: d, b, h, o, c, v[broken], m, s ,t[broken]"); break; } argc_node += 1; @@ -1431,12 +1462,14 @@ void c_finish(ast_node_t* node) { * (function: clog2) *-------------------------------------------------------------------------*/ long clog2(long value_in, int length) { - if (value_in == 0) return 0; + if (value_in == 0) + return 0; long result; /* negative numbers may be larger than they need to be */ - if (value_in < 0 && value_in >= std::numeric_limits::min()) return 32; + if (value_in < 0 && value_in >= std::numeric_limits::min()) + return 32; if (length > 32) { uint64_t unsigned_val = (uint64_t)value_in; @@ -1474,7 +1507,8 @@ long resolve_concat_sizes(ast_node_t* node_top, sc_hierarchy* local_ref) { long max_size = 0; for (int i = 0; i < node_top->num_children; i++) { long this_size = resolve_concat_sizes(node_top->children[i], local_ref); - if (this_size > max_size) max_size = this_size; + if (this_size > max_size) + max_size = this_size; } concatenation_size += max_size; } break; diff --git a/odin_ii/src/ast/parse_making_ast.cpp b/odin_ii/src/ast/parse_making_ast.cpp index a92f5f927e4..b398ac46468 100644 --- a/odin_ii/src/ast/parse_making_ast.cpp +++ b/odin_ii/src/ast/parse_making_ast.cpp @@ -186,7 +186,8 @@ void next_parsed_verilog_file(ast_node_t* file_items_list) { } /* store the root of this files ast */ - all_file_items_list = (ast_node_t**)vtr::realloc(all_file_items_list, sizeof(ast_node_t*) * (size_all_file_items_list + 1)); + all_file_items_list + = (ast_node_t**)vtr::realloc(all_file_items_list, sizeof(ast_node_t*) * (size_all_file_items_list + 1)); all_file_items_list[size_all_file_items_list] = file_items_list; size_all_file_items_list++; } @@ -194,9 +195,7 @@ void next_parsed_verilog_file(ast_node_t* file_items_list) { /*--------------------------------------------------------------------------------------------- * (function: newSymbolNode) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newSymbolNode(char* id, loc_t loc) { - return create_tree_node_id(id, loc); -} +ast_node_t* newSymbolNode(char* id, loc_t loc) { return create_tree_node_id(id, loc); } /*--------------------------------------------------------------------------------------------- * (function: newNumberNode) @@ -223,7 +222,8 @@ ast_node_t* newList(ids node_type, ast_node_t* child, loc_t loc) { /* create a node for this array reference */ ast_node_t* new_node = create_node_w_type(node_type, loc); /* allocate child nodes to this node */ - if (child) allocate_children_to_node(new_node, {child}); + if (child) + allocate_children_to_node(new_node, {child}); return new_node; } @@ -244,7 +244,8 @@ ast_node_t* newfunctionList(ids node_type, ast_node_t* child, loc_t loc) { *-------------------------------------------------------------------------------------------*/ ast_node_t* newList_entry(ast_node_t* list, ast_node_t* child) { /* allocate child nodes to this node */ - if (child) add_child_to_node(list, child); + if (child) + add_child_to_node(list, child); return list; } @@ -289,13 +290,10 @@ static ast_node_t* resolve_symbol_node(ast_node_t* symbol_node) { newNode = (ast_node_t*)current_scope->param_sc->data[sc_spot]; } - if (newNode - && (newNode->types.variable.is_localparam - || newNode->types.variable.is_parameter)) { + if (newNode && (newNode->types.variable.is_localparam || newNode->types.variable.is_parameter)) { to_return = symbol_node; } else { - error_message(AST, symbol_node->loc, - "no match for parameter %s\n", symbol_node->types.identifier); + error_message(AST, symbol_node->loc, "no match for parameter %s\n", symbol_node->types.identifier); } break; } @@ -329,7 +327,8 @@ ast_node_t* resolve_ports(ids top_type, ast_node_t* symbol_list) { /* grab and update all typeless ports immediately following this one */ long j = 0; - for (j = i + 1; j < symbol_list->num_children && !(symbol_list->children[j]->types.variable.is_port); j++) { + for (j = i + 1; j < symbol_list->num_children && !(symbol_list->children[j]->types.variable.is_port); + j++) { /* port type */ symbol_list->children[j]->types.variable.is_input = this_port->types.variable.is_input; symbol_list->children[j]->types.variable.is_output = this_port->types.variable.is_output; @@ -350,7 +349,8 @@ ast_node_t* resolve_ports(ids top_type, ast_node_t* symbol_list) { symbol_list->children[j]->children[3] = ast_node_deep_copy(this_port->children[3]); if (this_port->num_children == 7) { - symbol_list->children[j]->children = (ast_node_t**)realloc(symbol_list->children[j]->children, sizeof(ast_node_t*) * 7); + symbol_list->children[j]->children + = (ast_node_t**)realloc(symbol_list->children[j]->children, sizeof(ast_node_t*) * 7); symbol_list->children[j]->children[6] = symbol_list->children[j]->children[4]; symbol_list->children[j]->children[4] = ast_node_deep_copy(this_port->children[4]); symbol_list->children[j]->children[5] = ast_node_deep_copy(this_port->children[5]); @@ -359,55 +359,71 @@ ast_node_t* resolve_ports(ids top_type, ast_node_t* symbol_list) { /* error checking */ - symbol_list->children[j] = markAndProcessPortWith(MODULE, NO_ID, NO_ID, symbol_list->children[j], this_port->types.variable.signedness); + symbol_list->children[j] = markAndProcessPortWith(MODULE, NO_ID, NO_ID, symbol_list->children[j], + this_port->types.variable.signedness); } } else { long sc_spot = -1; if (top_type == MODULE) { /* find the related INPUT or OUTPUT definition and store that instead */ - if ((sc_spot = sc_lookup_string(modules_inputs_sc, symbol_list->children[i]->identifier_node->types.identifier)) != -1) { + if ((sc_spot = sc_lookup_string(modules_inputs_sc, + symbol_list->children[i]->identifier_node->types.identifier)) + != -1) { oassert(((ast_node_t*)modules_inputs_sc->data[sc_spot])->type == VAR_DECLARE); free_whole_tree(symbol_list->children[i]); symbol_list->children[i] = (ast_node_t*)modules_inputs_sc->data[sc_spot]; oassert(symbol_list->children[i]->types.variable.is_input); - } else if ((sc_spot = sc_lookup_string(modules_outputs_sc, symbol_list->children[i]->identifier_node->types.identifier)) != -1) { + } else if ((sc_spot = sc_lookup_string(modules_outputs_sc, + symbol_list->children[i]->identifier_node->types.identifier)) + != -1) { oassert(((ast_node_t*)modules_outputs_sc->data[sc_spot])->type == VAR_DECLARE); free_whole_tree(symbol_list->children[i]); symbol_list->children[i] = (ast_node_t*)modules_outputs_sc->data[sc_spot]; oassert(symbol_list->children[i]->types.variable.is_output); } else { - error_message(AST, symbol_list->children[i]->loc, "No matching declaration for port %s\n", symbol_list->children[i]->identifier_node->types.identifier); + error_message(AST, symbol_list->children[i]->loc, "No matching declaration for port %s\n", + symbol_list->children[i]->identifier_node->types.identifier); } } else if (top_type == FUNCTION) { /* find the related INPUT or OUTPUT definition and store that instead */ - if ((sc_spot = sc_lookup_string(functions_inputs_sc, symbol_list->children[i]->identifier_node->types.identifier)) != -1) { + if ((sc_spot = sc_lookup_string(functions_inputs_sc, + symbol_list->children[i]->identifier_node->types.identifier)) + != -1) { oassert(((ast_node_t*)functions_inputs_sc->data[sc_spot])->type == VAR_DECLARE); free_whole_tree(symbol_list->children[i]); symbol_list->children[i] = (ast_node_t*)functions_inputs_sc->data[sc_spot]; oassert(symbol_list->children[i]->types.variable.is_input); - } else if ((sc_spot = sc_lookup_string(functions_outputs_sc, symbol_list->children[i]->identifier_node->types.identifier)) != -1) { + } else if ((sc_spot = sc_lookup_string(functions_outputs_sc, + symbol_list->children[i]->identifier_node->types.identifier)) + != -1) { oassert(((ast_node_t*)functions_outputs_sc->data[sc_spot])->type == VAR_DECLARE); free_whole_tree(symbol_list->children[i]); symbol_list->children[i] = (ast_node_t*)functions_outputs_sc->data[sc_spot]; oassert(symbol_list->children[i]->types.variable.is_output); } else { - error_message(AST, symbol_list->children[i]->loc, "No matching declaration for port %s\n", symbol_list->children[i]->identifier_node->types.identifier); + error_message(AST, symbol_list->children[i]->loc, "No matching declaration for port %s\n", + symbol_list->children[i]->identifier_node->types.identifier); } } else if (top_type == TASK) { /* find the related INPUT or OUTPUT definition and store that instead */ - if ((sc_spot = sc_lookup_string(tasks_inputs_sc, symbol_list->children[i]->identifier_node->types.identifier)) != -1) { + if ((sc_spot = sc_lookup_string(tasks_inputs_sc, + symbol_list->children[i]->identifier_node->types.identifier)) + != -1) { oassert(((ast_node_t*)tasks_inputs_sc->data[sc_spot])->type == VAR_DECLARE); free_whole_tree(symbol_list->children[i]); symbol_list->children[i] = (ast_node_t*)tasks_inputs_sc->data[sc_spot]; oassert(symbol_list->children[i]->types.variable.is_input); - } else if ((sc_spot = sc_lookup_string(tasks_outputs_sc, symbol_list->children[i]->identifier_node->types.identifier)) != -1) { + } else if ((sc_spot = sc_lookup_string(tasks_outputs_sc, + symbol_list->children[i]->identifier_node->types.identifier)) + != -1) { oassert(((ast_node_t*)tasks_outputs_sc->data[sc_spot])->type == VAR_DECLARE); free_whole_tree(symbol_list->children[i]); symbol_list->children[i] = (ast_node_t*)tasks_outputs_sc->data[sc_spot]; oassert(symbol_list->children[i]->types.variable.is_output); } else { - error_message(AST, symbol_list->children[i]->loc, "No matching declaration for port %s\n", symbol_list->children[i]->identifier_node->types.identifier); + error_message(AST, symbol_list->children[i]->loc, "No matching declaration for port %s\n", + symbol_list->children[i]->identifier_node->types.identifier); } } } @@ -458,26 +474,24 @@ ast_node_t* markAndProcessPortWith(ids top_type, ids port_id, ids net_id, ast_no /* look for processed inputs with this name */ sc_spot = sc_lookup_string(this_inputs_sc, port->identifier_node->types.identifier); if (sc_spot > -1 && ((ast_node_t*)this_inputs_sc->data[sc_spot])->types.variable.is_port) { - error_message(AST, port->loc, "%s already has input with this name %s\n", - top_type_name, ((ast_node_t*)this_inputs_sc->data[sc_spot])->identifier_node->types.identifier); + error_message(AST, port->loc, "%s already has input with this name %s\n", top_type_name, + ((ast_node_t*)this_inputs_sc->data[sc_spot])->identifier_node->types.identifier); } /* look for processed outputs with this name */ sc_spot = sc_lookup_string(this_outputs_sc, port->identifier_node->types.identifier); if (sc_spot > -1 && ((ast_node_t*)this_outputs_sc->data[sc_spot])->types.variable.is_port) { - error_message(AST, port->loc, "%s already has output with this name %s\n", - top_type_name, ((ast_node_t*)this_outputs_sc->data[sc_spot])->identifier_node->types.identifier); + error_message(AST, port->loc, "%s already has output with this name %s\n", top_type_name, + ((ast_node_t*)this_outputs_sc->data[sc_spot])->identifier_node->types.identifier); } switch (net_id) { case REG: if (port_id == INPUT) { - error_message(AST, port->loc, "%s", - "Input cannot be defined as a reg\n"); + error_message(AST, port->loc, "%s", "Input cannot be defined as a reg\n"); } if (port_id == INOUT) { - error_message(AST, port->loc, "%s", - "Inout cannot be defined as a reg\n"); + error_message(AST, port->loc, "%s", "Inout cannot be defined as a reg\n"); } port->types.variable.is_reg = true; port->types.variable.is_wire = false; @@ -486,8 +500,7 @@ ast_node_t* markAndProcessPortWith(ids top_type, ids port_id, ids net_id, ast_no case WIRE: if ((port->num_children == 5 && port->children[4] != NULL) || (port->num_children == 7 && port->children[6] != NULL)) { - error_message(AST, port->loc, "%s", - "Ports of type net cannot be initialized\n"); + error_message(AST, port->loc, "%s", "Ports of type net cannot be initialized\n"); } port->types.variable.is_wire = true; port->types.variable.is_reg = false; @@ -496,20 +509,16 @@ ast_node_t* markAndProcessPortWith(ids top_type, ids port_id, ids net_id, ast_no default: if ((port->num_children == 5 && port->children[4] != NULL) || (port->num_children == 7 && port->children[6] != NULL)) { - error_message(AST, port->loc, "%s", - "Ports with undefined type cannot be initialized\n"); + error_message(AST, port->loc, "%s", "Ports with undefined type cannot be initialized\n"); } - if (port->types.variable.is_reg - && !(port->types.variable.is_wire)) { + if (port->types.variable.is_reg && !(port->types.variable.is_wire)) { temp_net_id = REG; - } else if (port->types.variable.is_wire - && !(port->types.variable.is_reg)) { + } else if (port->types.variable.is_wire && !(port->types.variable.is_reg)) { temp_net_id = WIRE; } else { /* port cannot have more than one type */ - oassert(!(port->types.variable.is_wire) - && !(port->types.variable.is_reg)); + oassert(!(port->types.variable.is_wire) && !(port->types.variable.is_reg)); } if (net_id == NO_ID) { @@ -551,27 +560,25 @@ ast_node_t* markAndProcessPortWith(ids top_type, ids port_id, ids net_id, ast_no port->types.variable.is_inout = true; port->types.variable.is_input = false; port->types.variable.is_output = false; - error_message(AST, port->loc, "Odin does not handle inouts (%s)\n", port->identifier_node->types.identifier); + error_message(AST, port->loc, "Odin does not handle inouts (%s)\n", + port->identifier_node->types.identifier); break; default: - if (port->types.variable.is_input - && !(port->types.variable.is_output) + if (port->types.variable.is_input && !(port->types.variable.is_output) && !(port->types.variable.is_inout)) { port = markAndProcessPortWith(top_type, INPUT, net_id, port, signedness); - } else if (port->types.variable.is_output - && !(port->types.variable.is_input) + } else if (port->types.variable.is_output && !(port->types.variable.is_input) && !(port->types.variable.is_inout)) { port = markAndProcessPortWith(top_type, OUTPUT, net_id, port, signedness); - } else if (port->types.variable.is_inout - && !(port->types.variable.is_input) + } else if (port->types.variable.is_inout && !(port->types.variable.is_input) && !(port->types.variable.is_output)) { - error_message(AST, port->loc, "Odin does not handle inouts (%s)\n", port->identifier_node->types.identifier); + error_message(AST, port->loc, "Odin does not handle inouts (%s)\n", + port->identifier_node->types.identifier); port = markAndProcessPortWith(top_type, INOUT, net_id, port, signedness); } else { // shouldn't ever get here... - oassert(port->types.variable.is_input - || port->types.variable.is_output + oassert(port->types.variable.is_input || port->types.variable.is_output || port->types.variable.is_inout); } @@ -580,8 +587,8 @@ ast_node_t* markAndProcessPortWith(ids top_type, ids port_id, ids net_id, ast_no if (signedness == SIGNED) { /* cannot support signed ports right now */ - warning_message(AST, port->loc, - "Odin does not handle signed ports (%s)\n", port->identifier_node->types.identifier); + warning_message(AST, port->loc, "Odin does not handle signed ports (%s)\n", + port->identifier_node->types.identifier); } port->types.variable.signedness = signedness; @@ -602,8 +609,8 @@ ast_node_t* markAndProcessParameterWith(ids id, ast_node_t* parameter, operation oassert(signedness == SIGNED || signedness == UNSIGNED); if (signedness == SIGNED) { /* cannot support signed parameters right now */ - warning_message(AST, parameter->loc, - "Odin does not handle signed parameters (%s)\n", parameter->identifier_node->types.identifier); + warning_message(AST, parameter->loc, "Odin does not handle signed parameters (%s)\n", + parameter->identifier_node->types.identifier); } parameter->children[4]->types.variable.signedness = signedness; @@ -615,8 +622,8 @@ ast_node_t* markAndProcessParameterWith(ids id, ast_node_t* parameter, operation /* create an entry in the symbol table for this parameter */ if ((sc_spot = sc_lookup_string(current_scope->param_sc, parameter->identifier_node->types.identifier)) > -1) { - error_message(AST, parameter->children[4]->loc, - "Module already has parameter with this name (%s)\n", parameter->identifier_node->types.identifier); + error_message(AST, parameter->children[4]->loc, "Module already has parameter with this name (%s)\n", + parameter->identifier_node->types.identifier); } sc_spot = sc_add_string(current_scope->param_sc, parameter->identifier_node->types.identifier); @@ -646,8 +653,8 @@ ast_node_t* markAndProcessSymbolListWith(ids top_type, ids id, ast_node_t* symbo if (signedness == SIGNED) { /* cannot support signed ports right now */ - warning_message(AST, symbol_list->children[i]->loc, - "Odin does not handle signed %s (%s)\n", ids_STR[id], symbol_list->children[i]->identifier_node->types.identifier); + warning_message(AST, symbol_list->children[i]->loc, "Odin does not handle signed %s (%s)\n", + ids_STR[id], symbol_list->children[i]->identifier_node->types.identifier); } symbol_list->children[i]->types.variable.signedness = signedness; @@ -668,7 +675,8 @@ ast_node_t* markAndProcessSymbolListWith(ids top_type, ids id, ast_node_t* symbo error_message(AST, symbol_list->children[i]->loc, "%s", "ports can only appear in modules functions or task\n"); } - symbol_list->children[i] = markAndProcessPortWith(top_type, id, NO_ID, symbol_list->children[i], signedness); + symbol_list->children[i] + = markAndProcessPortWith(top_type, id, NO_ID, symbol_list->children[i], signedness); break; case WIRE: /** @@ -676,10 +684,11 @@ ast_node_t* markAndProcessSymbolListWith(ids top_type, ids id, ast_node_t* symbo * TODO: should'nt this apply to all? */ if (top_type == FUNCTION) { - if ((symbol_list->children[i]->num_children == 5 && symbol_list->children[i]->children[4] != NULL) - || (symbol_list->children[i]->num_children == 7 && symbol_list->children[i]->children[6] != NULL)) { - error_message(AST, symbol_list->children[i]->loc, "%s", - "Nets cannot be initialized\n"); + if ((symbol_list->children[i]->num_children == 5 + && symbol_list->children[i]->children[4] != NULL) + || (symbol_list->children[i]->num_children == 7 + && symbol_list->children[i]->children[6] != NULL)) { + error_message(AST, symbol_list->children[i]->loc, "%s", "Nets cannot be initialized\n"); } } symbol_list->children[i]->types.variable.is_wire = true; @@ -757,11 +766,9 @@ ast_node_t* newMinusColonRangeRef(char* id, ast_node_t* expression1, ast_node_t* ast_node_t* lsb = NULL; if (expression1 == NULL) { - error_message(AST, loc, - "first expression for range ref is NULL %s", id); + error_message(AST, loc, "first expression for range ref is NULL %s", id); } else if (expression2 == NULL) { - error_message(AST, loc, - "first expression for range ref is NULL %s", id); + error_message(AST, loc, "first expression for range ref is NULL %s", id); } // expression 1 is the msb here since we subtract expression 2 from it @@ -785,11 +792,9 @@ ast_node_t* newPlusColonRangeRef(char* id, ast_node_t* expression1, ast_node_t* ast_node_t* lsb = NULL; if (expression1 == NULL) { - error_message(AST, loc, - "first expression for range ref is NULL %s", id); + error_message(AST, loc, "first expression for range ref is NULL %s", id); } else if (expression2 == NULL) { - error_message(AST, loc, - "first expression for range ref is NULL %s", id); + error_message(AST, loc, "first expression for range ref is NULL %s", id); } // expression 1 is the lsb here since we add expression 2 to it @@ -946,7 +951,11 @@ ast_node_t* newFunctionAssigning(ast_node_t* expression1, ast_node_t* expression /*--------------------------------------------------------------------------------------------- * (function: newFor) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newFor(ast_node_t* initial, ast_node_t* compare_expression, ast_node_t* terminal, ast_node_t* statement, loc_t loc) { +ast_node_t* newFor(ast_node_t* initial, + ast_node_t* compare_expression, + ast_node_t* terminal, + ast_node_t* statement, + loc_t loc) { /* create a node for this for reference */ ast_node_t* new_node = create_node_w_type(FOR, loc); /* allocate child nodes to this node */ @@ -972,7 +981,10 @@ ast_node_t* newWhile(ast_node_t* compare_expression, ast_node_t* statement, loc_ /*--------------------------------------------------------------------------------------------- * (function: newIf) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newIf(ast_node_t* compare_expression, ast_node_t* true_expression, ast_node_t* false_expression, loc_t loc) { +ast_node_t* newIf(ast_node_t* compare_expression, + ast_node_t* true_expression, + ast_node_t* false_expression, + loc_t loc) { /* create a node for this array reference */ ast_node_t* new_node = create_node_w_type(IF, loc); /* allocate child nodes to this node */ @@ -984,7 +996,10 @@ ast_node_t* newIf(ast_node_t* compare_expression, ast_node_t* true_expression, a /*--------------------------------------------------------------------------------------------- * (function: newIfQuestion) for f = a ? b : c; *-------------------------------------------------------------------------------------------*/ -ast_node_t* newIfQuestion(ast_node_t* compare_expression, ast_node_t* true_expression, ast_node_t* false_expression, loc_t loc) { +ast_node_t* newIfQuestion(ast_node_t* compare_expression, + ast_node_t* true_expression, + ast_node_t* false_expression, + loc_t loc) { /* create a node for this array reference */ ast_node_t* new_node = create_node_w_type(TERNARY_OPERATION, loc); /* allocate child nodes to this node */ @@ -1048,7 +1063,12 @@ ast_node_t* newCFunction(ids node_type, ast_node_t* arg1, ast_node_t* arg2, ast_ /*--------------------------------------------------------------------------------------------- * (function: newCFunction) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newCFunction(ids node_type, ast_node_t* arg1, ast_node_t* arg2, ast_node_t* arg3, ast_node_t* va_args_child, loc_t loc) { +ast_node_t* newCFunction(ids node_type, + ast_node_t* arg1, + ast_node_t* arg2, + ast_node_t* arg3, + ast_node_t* va_args_child, + loc_t loc) { ast_node_t* new_node = create_node_w_type(node_type, loc); allocate_children_to_node(new_node, {arg1, arg2, arg3, va_args_child}); @@ -1112,7 +1132,10 @@ ast_node_t* newModuleParameter(char* id, ast_node_t* expression, loc_t loc) { /*--------------------------------------------------------------------------------------------- * (function: newModuleNamedInstance) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newModuleNamedInstance(char* unique_name, ast_node_t* module_connect_list, ast_node_t* module_parameter_list, loc_t loc) { +ast_node_t* newModuleNamedInstance(char* unique_name, + ast_node_t* module_connect_list, + ast_node_t* module_parameter_list, + loc_t loc) { if (!is_valid_identifier(unique_name)) { error_message(AST, loc, "Invalid character in identifier (%s)\n", unique_name); } @@ -1174,7 +1197,10 @@ ast_node_t* newTaskNamedInstance(ast_node_t* module_connect_list, loc_t loc) { /*--------------------------------------------------------------------------------------------- * (function: newTaskInstance) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newTaskInstance(char* task_name, ast_node_t* task_named_instace, ast_node_t* task_parameter_list, loc_t loc) { +ast_node_t* newTaskInstance(char* task_name, + ast_node_t* task_named_instace, + ast_node_t* task_parameter_list, + loc_t loc) { ast_node_t* symbol_node = newSymbolNode(task_name, loc); /* create a node for this array reference */ @@ -1186,7 +1212,8 @@ ast_node_t* newTaskInstance(char* task_name, ast_node_t* task_named_instace, ast allocate_children_to_node(new_node, {task_named_instace}); /* store the module symbol name that this calls in a list that will at the end be asociated with the module node */ - task_instantiations_instance_by_module = (ast_node_t**)vtr::realloc(task_instantiations_instance_by_module, sizeof(ast_node_t*) * (size_task_instantiations_by_module + 1)); + task_instantiations_instance_by_module = (ast_node_t**)vtr::realloc( + task_instantiations_instance_by_module, sizeof(ast_node_t*) * (size_task_instantiations_by_module + 1)); task_instantiations_instance_by_module[size_task_instantiations_by_module] = new_node; size_task_instantiations_by_module++; @@ -1236,10 +1263,10 @@ ast_node_t* newModuleInstance(char* module_ref_name, ast_node_t* module_named_in ast_node_t* new_master_node = create_node_w_type(MODULE_INSTANCE, loc); for (i = 0; i < module_named_instance->num_children; i++) { /* check if this name was already used */ - long sc_spot = sc_add_string(module_instances_sc, module_named_instance->children[i]->identifier_node->types.identifier); + long sc_spot + = sc_add_string(module_instances_sc, module_named_instance->children[i]->identifier_node->types.identifier); if (module_instances_sc->data[sc_spot] != NULL) { - error_message(AST, loc, - "Module already has an instance with this name (%s)\n", + error_message(AST, loc, "Module already has an instance with this name (%s)\n", module_named_instance->children[i]->identifier_node->types.identifier); } module_instances_sc->data[sc_spot] = module_named_instance->children[i]; @@ -1262,7 +1289,8 @@ ast_node_t* newModuleInstance(char* module_ref_name, ast_node_t* module_named_in /* if this module has already been parsed, update */ for (int j = 0; j < verilog_ast->top_modules_count; j++) { - if (sc_lookup_string(instantiated_modules, verilog_ast->top_modules[j]->identifier_node->types.identifier) != -1) { + if (sc_lookup_string(instantiated_modules, verilog_ast->top_modules[j]->identifier_node->types.identifier) + != -1) { verilog_ast->top_modules[j]->types.module.is_instantiated = true; } } @@ -1287,7 +1315,8 @@ ast_node_t* newFunctionInstance(char* function_ref_name, ast_node_t* function_na allocate_children_to_node(new_node, {function_named_instance}); /* store the module symbol name that this calls in a list that will at the end be asociated with the module node */ - function_instantiations_instance_by_module = (ast_node_t**)vtr::realloc(function_instantiations_instance_by_module, sizeof(ast_node_t*) * (size_function_instantiations_by_module + 1)); + function_instantiations_instance_by_module = (ast_node_t**)vtr::realloc( + function_instantiations_instance_by_module, sizeof(ast_node_t*) * (size_function_instantiations_by_module + 1)); function_instantiations_instance_by_module[size_function_instantiations_by_module] = new_node; size_function_instantiations_by_module++; @@ -1297,7 +1326,11 @@ ast_node_t* newFunctionInstance(char* function_ref_name, ast_node_t* function_na /*--------------------------------------------------------------------------------------------- * (function: newGateInstance) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newGateInstance(char* gate_instance_name, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, loc_t loc) { +ast_node_t* newGateInstance(char* gate_instance_name, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + loc_t loc) { if (!is_valid_identifier(gate_instance_name)) { error_message(AST, loc, "Invalid character in identifier (%s)\n", gate_instance_name); } @@ -1317,7 +1350,8 @@ ast_node_t* newGateInstance(char* gate_instance_name, ast_node_t* expression1, a if (size_module_variables_not_defined == 0) { module_variables_not_defined = (ast_node_t**)vtr::calloc(1, sizeof(ast_node_t*)); } else { - module_variables_not_defined = (ast_node_t**)vtr::realloc(module_variables_not_defined, sizeof(ast_node_t*) * (size_module_variables_not_defined + 1)); + module_variables_not_defined = (ast_node_t**)vtr::realloc( + module_variables_not_defined, sizeof(ast_node_t*) * (size_module_variables_not_defined + 1)); } module_variables_not_defined[size_module_variables_not_defined] = newVarMaked; size_module_variables_not_defined++; @@ -1329,7 +1363,11 @@ ast_node_t* newGateInstance(char* gate_instance_name, ast_node_t* expression1, a return new_node; } -ast_node_t* newMultipleInputsGateInstance(char* gate_instance_name, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, loc_t loc) { +ast_node_t* newMultipleInputsGateInstance(char* gate_instance_name, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + loc_t loc) { if (!is_valid_identifier(gate_instance_name)) { error_message(AST, loc, "Invalid character in identifier (%s)\n", gate_instance_name); } @@ -1357,7 +1395,8 @@ ast_node_t* newMultipleInputsGateInstance(char* gate_instance_name, ast_node_t* if (size_module_variables_not_defined == 0) { module_variables_not_defined = (ast_node_t**)vtr::calloc(1, sizeof(ast_node_t*)); } else { - module_variables_not_defined = (ast_node_t**)vtr::realloc(module_variables_not_defined, sizeof(ast_node_t*) * (size_module_variables_not_defined + 1)); + module_variables_not_defined = (ast_node_t**)vtr::realloc( + module_variables_not_defined, sizeof(ast_node_t*) * (size_module_variables_not_defined + 1)); } module_variables_not_defined[size_module_variables_not_defined] = newVarMarked; @@ -1371,7 +1410,8 @@ ast_node_t* newMultipleInputsGateInstance(char* gate_instance_name, ast_node_t* add_child_to_node(new_node, expression3->children[i]); /* clean up */ - if (expression3->type == MODULE_CONNECT) expression3 = free_single_node(expression3); + if (expression3->type == MODULE_CONNECT) + expression3 = free_single_node(expression3); return new_node; } @@ -1392,7 +1432,13 @@ ast_node_t* newGate(operation_list op_id, ast_node_t* gate_instance, loc_t loc) /*--------------------------------------------------------------------------------------------- * (function: newDefparamVarDeclare) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newDefparamVarDeclare(char* symbol, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, ast_node_t* value, loc_t loc) { +ast_node_t* newDefparamVarDeclare(char* symbol, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + ast_node_t* value, + loc_t loc) { ast_node_t* symbol_node = newSymbolNode(symbol, loc); /* create a node for this array reference */ @@ -1409,7 +1455,13 @@ ast_node_t* newDefparamVarDeclare(char* symbol, ast_node_t* expression1, ast_nod /*--------------------------------------------------------------------------------------------- * (function: newVarDeclare) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newVarDeclare(char* symbol, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, ast_node_t* value, loc_t loc) { +ast_node_t* newVarDeclare(char* symbol, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + ast_node_t* value, + loc_t loc) { if (!is_valid_identifier(symbol)) { error_message(AST, loc, "Invalid character in identifier (%s)\n", symbol); } @@ -1430,7 +1482,13 @@ ast_node_t* newVarDeclare(char* symbol, ast_node_t* expression1, ast_node_t* exp /*--------------------------------------------------------------------------------------------- * (function: newIntegerTypeVarDeclare) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newIntegerTypeVarDeclare(char* symbol, ast_node_t* /*expression1*/, ast_node_t* /*expression2*/, ast_node_t* expression3, ast_node_t* expression4, ast_node_t* value, loc_t loc) { +ast_node_t* newIntegerTypeVarDeclare(char* symbol, + ast_node_t* /*expression1*/, + ast_node_t* /*expression2*/, + ast_node_t* expression3, + ast_node_t* expression4, + ast_node_t* value, + loc_t loc) { if (!is_valid_identifier(symbol)) { error_message(AST, loc, "Invalid character in identifier (%s)\n", symbol); } @@ -1447,7 +1505,8 @@ ast_node_t* newIntegerTypeVarDeclare(char* symbol, ast_node_t* /*expression1*/, /* allocate identifier to identifier_node */ new_node->identifier_node = symbol_node; /* allocate child nodes to this node */ - allocate_children_to_node(new_node, {number_node_with_value_31, number_node_with_value_0, expression3, expression4, value}); + allocate_children_to_node(new_node, + {number_node_with_value_31, number_node_with_value_0, expression3, expression4, value}); return new_node; } @@ -1456,25 +1515,25 @@ ast_node_t* newIntegerTypeVarDeclare(char* symbol, ast_node_t* /*expression1*/, * ---------------------------------------------------- * (function: newModule) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newModule(char* module_name, ast_node_t* list_of_parameters, ast_node_t* list_of_ports, ast_node_t* list_of_module_items, loc_t loc) { +ast_node_t* newModule(char* module_name, + ast_node_t* list_of_parameters, + ast_node_t* list_of_ports, + ast_node_t* list_of_module_items, + loc_t loc) { ast_node_t* new_node = NULL; long sc_spot = sc_lookup_string(hard_block_names, module_name); if (!is_valid_identifier(module_name)) { - error_message(AST, loc, - "Invalid character in identifier (%s)\n", - module_name); - } else if (sc_spot != -1 - || !strcmp(module_name, SINGLE_PORT_RAM_string) + error_message(AST, loc, "Invalid character in identifier (%s)\n", module_name); + } else if (sc_spot != -1 || !strcmp(module_name, SINGLE_PORT_RAM_string) || !strcmp(module_name, DUAL_PORT_RAM_string)) { - error_message(AST, loc, - "Module name collides with hard block of the same name (%s)\n", module_name); - } else if (list_of_ports == NULL - || list_of_ports->num_children == 0) { + error_message(AST, loc, "Module name collides with hard block of the same name (%s)\n", module_name); + } else if (list_of_ports == NULL || list_of_ports->num_children == 0) { // this may change with hierarchy but for now we simply delete it - warning_message(AST, loc, - "there are no ports for the module (%s)\n\tall logic will be dropped since it is not driving an output\n", - module_name); + warning_message( + AST, loc, + "there are no ports for the module (%s)\n\tall logic will be dropped since it is not driving an output\n", + module_name); vtr::free(module_name); free_whole_tree(list_of_parameters); free_whole_tree(list_of_ports); @@ -1524,7 +1583,9 @@ ast_node_t* newModule(char* module_name, ast_node_t* list_of_parameters, ast_nod for (long j = 0; j < list_of_module_items->num_children && variable_found == false; j++) { if (list_of_module_items->children[j]->type == VAR_DECLARE_LIST) { for (long k = 0; k < list_of_module_items->children[j]->num_children; k++) { - if (strcmp(list_of_module_items->children[j]->children[k]->identifier_node->types.identifier, module_variables_not_defined[i]->children[0]->identifier_node->types.identifier) == 0) + if (strcmp(list_of_module_items->children[j]->children[k]->identifier_node->types.identifier, + module_variables_not_defined[i]->children[0]->identifier_node->types.identifier) + == 0) variable_found = true; } } @@ -1555,7 +1616,11 @@ ast_node_t* newModule(char* module_name, ast_node_t* list_of_parameters, ast_nod * (function: newFunction) *-------------------------------------------------------------------------------------------*/ -ast_node_t* newFunction(ast_node_t* function_return, ast_node_t* list_of_ports, ast_node_t* list_of_module_items, loc_t loc, bool automatic) { +ast_node_t* newFunction(ast_node_t* function_return, + ast_node_t* list_of_ports, + ast_node_t* list_of_module_items, + loc_t loc, + bool automatic) { long i, j; long sc_spot; char* label = NULL; @@ -1563,7 +1628,9 @@ ast_node_t* newFunction(ast_node_t* function_return, ast_node_t* list_of_ports, ast_node_t* symbol_node = NULL; if (automatic) { - warning_message(AST, loc, "%s", "ODIN II does not (yet) differentiate between automatic and static tasks & functions.IGNORING "); + warning_message( + AST, loc, "%s", + "ODIN II does not (yet) differentiate between automatic and static tasks & functions.IGNORING "); } if (list_of_ports == NULL) { @@ -1588,7 +1655,8 @@ ast_node_t* newFunction(ast_node_t* function_return, ast_node_t* list_of_ports, if (list_of_module_items->children[i]->type == VAR_DECLARE_LIST) { for (j = 0; j < list_of_module_items->children[i]->num_children; j++) { if (list_of_module_items->children[i]->children[j]->types.variable.is_input) { - label = vtr::strdup(list_of_module_items->children[i]->children[j]->identifier_node->types.identifier); + label = vtr::strdup( + list_of_module_items->children[i]->children[j]->identifier_node->types.identifier); var_node = newVarDeclare(label, NULL, NULL, NULL, NULL, NULL, loc); newList_entry(list_of_ports, var_node); } @@ -1634,14 +1702,20 @@ ast_node_t* newFunction(ast_node_t* function_return, ast_node_t* list_of_ports, return new_node; } -ast_node_t* newTask(char* task_name, ast_node_t* list_of_ports, ast_node_t* list_of_task_items, loc_t loc, bool automatic) { +ast_node_t* newTask(char* task_name, + ast_node_t* list_of_ports, + ast_node_t* list_of_task_items, + loc_t loc, + bool automatic) { long sc_spot; ast_node_t* symbol_node = newSymbolNode(task_name, loc); ast_node_t* var_node = NULL; char* label = NULL; if (automatic) { - warning_message(AST, loc, "%s", "ODIN II does not (yet) differentiate between automatic and static tasks & functions. IGNORING"); + warning_message( + AST, loc, "%s", + "ODIN II does not (yet) differentiate between automatic and static tasks & functions. IGNORING"); } /* create a node for this array reference */ @@ -1651,7 +1725,8 @@ ast_node_t* newTask(char* task_name, ast_node_t* list_of_ports, ast_node_t* list if (list_of_task_items->children[i]->type == VAR_DECLARE_LIST) { for (int j = 0; j < list_of_task_items->children[i]->num_children; j++) { if (list_of_task_items->children[i]->children[j]->types.variable.is_input) { - label = vtr::strdup(list_of_task_items->children[i]->children[j]->identifier_node->types.identifier); + label + = vtr::strdup(list_of_task_items->children[i]->children[j]->identifier_node->types.identifier); var_node = newVarDeclare(label, NULL, NULL, NULL, NULL, NULL, loc); var_node->types.variable.is_input = true; if (list_of_ports) { @@ -1660,7 +1735,8 @@ ast_node_t* newTask(char* task_name, ast_node_t* list_of_ports, ast_node_t* list list_of_ports = newList(VAR_DECLARE_LIST, var_node, loc); } } else if (list_of_task_items->children[i]->children[j]->types.variable.is_output) { - label = vtr::strdup(list_of_task_items->children[i]->children[j]->identifier_node->types.identifier); + label + = vtr::strdup(list_of_task_items->children[i]->children[j]->identifier_node->types.identifier); var_node = newVarDeclare(label, NULL, NULL, NULL, NULL, NULL, loc); var_node->types.variable.is_output = true; if (list_of_ports) { @@ -1669,7 +1745,8 @@ ast_node_t* newTask(char* task_name, ast_node_t* list_of_ports, ast_node_t* list list_of_ports = newList(VAR_DECLARE_LIST, var_node, loc); } } else if (list_of_task_items->children[i]->children[j]->types.variable.is_inout) { - label = vtr::strdup(list_of_task_items->children[i]->children[j]->identifier_node->types.identifier); + label + = vtr::strdup(list_of_task_items->children[i]->children[j]->identifier_node->types.identifier); var_node = newVarDeclare(label, NULL, NULL, NULL, NULL, NULL, loc); var_node->types.variable.is_inout = true; if (list_of_ports) { @@ -1870,8 +1947,7 @@ void graphVizOutputAst_traverse_node(FILE* fp, ast_node_t* node, ast_node_t* fro break; } case NUMBERS: - fprintf(fp, " %s
%s", - node->types.vnumber->to_vstring('h').c_str(), + fprintf(fp, " %s
%s", node->types.vnumber->to_vstring('h').c_str(), node->types.vnumber->to_vstring('b').c_str()); break; @@ -1932,7 +2008,15 @@ void graphVizOutputAst_Var_Declare(FILE* fp, ast_node_t* node, int from_num) { /*--------------------------------------------------------------------------------------------- * (function: newVarDeclare) for 2D Array *-------------------------------------------------------------------------------------------*/ -ast_node_t* newVarDeclare2D(char* symbol, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, ast_node_t* expression5, ast_node_t* expression6, ast_node_t* value, loc_t loc) { +ast_node_t* newVarDeclare2D(char* symbol, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + ast_node_t* expression5, + ast_node_t* expression6, + ast_node_t* value, + loc_t loc) { if (!is_valid_identifier(symbol)) { error_message(AST, loc, "Invalid character in identifier (%s)\n", symbol); } @@ -1944,7 +2028,8 @@ ast_node_t* newVarDeclare2D(char* symbol, ast_node_t* expression1, ast_node_t* e /* allocate identifier to identifier_node */ new_node->identifier_node = symbol_node; /* allocate child nodes to this node */ - allocate_children_to_node(new_node, {expression1, expression2, expression3, expression4, expression5, expression6, value}); + allocate_children_to_node(new_node, + {expression1, expression2, expression3, expression4, expression5, expression6, value}); return new_node; } /*--------------------------------------------------------------------------------------------- @@ -1964,7 +2049,12 @@ ast_node_t* newArrayRef2D(char* id, ast_node_t* expression1, ast_node_t* express /*--------------------------------------------------------------------------------------------- * (function: newRangeRef) for 2D Array *-------------------------------------------------------------------------------------------*/ -ast_node_t* newRangeRef2D(char* id, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, loc_t loc) { +ast_node_t* newRangeRef2D(char* id, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + loc_t loc) { /* allocate or check if there's a node for this */ ast_node_t* symbol_node = newSymbolNode(id, loc); /* create a node for this array reference */ diff --git a/odin_ii/src/ast/parse_making_ast.h b/odin_ii/src/ast/parse_making_ast.h index 122846edf3c..7005a383824 100644 --- a/odin_ii/src/ast/parse_making_ast.h +++ b/odin_ii/src/ast/parse_making_ast.h @@ -54,7 +54,12 @@ ast_node_t* newRangeRef(char* id, ast_node_t* expression1, ast_node_t* expressio ast_node_t* newMinusColonRangeRef(char* id, ast_node_t* expression1, ast_node_t* expression2, loc_t loc); ast_node_t* newPlusColonRangeRef(char* id, ast_node_t* expression1, ast_node_t* expression2, loc_t loc); -ast_node_t* newRangeRef2D(char* id, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, loc_t loc); +ast_node_t* newRangeRef2D(char* id, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + loc_t loc); ast_node_t* newBinaryOperation(operation_list op_id, ast_node_t* expression1, ast_node_t* expression2, loc_t loc); ast_node_t* newExpandPower(operation_list op_id, ast_node_t* expression1, ast_node_t* expression2, loc_t loc); ast_node_t* newUnaryOperation(operation_list op_id, ast_node_t* expression, loc_t loc); @@ -70,18 +75,31 @@ ast_node_t* newNonBlocking(ast_node_t* expression1, ast_node_t* expression2, loc ast_node_t* newInitial(ast_node_t* expression1, loc_t loc); ast_node_t* newBlocking(ast_node_t* expression1, ast_node_t* expression2, loc_t loc); ast_node_t* newIf(ast_node_t* compare_expression, ast_node_t* true_expression, ast_node_t* false_expression, loc_t loc); -ast_node_t* newIfQuestion(ast_node_t* compare_expression, ast_node_t* true_expression, ast_node_t* false_expression, loc_t loc); +ast_node_t* newIfQuestion(ast_node_t* compare_expression, + ast_node_t* true_expression, + ast_node_t* false_expression, + loc_t loc); ast_node_t* newCase(ast_node_t* compare_expression, ast_node_t* case_list, loc_t loc); ast_node_t* newAlways(ast_node_t* delay_control, ast_node_t* statements, loc_t loc); ast_node_t* newStatement(ast_node_t* statement, loc_t loc); -ast_node_t* newFor(ast_node_t* initial, ast_node_t* compare_expression, ast_node_t* terminal, ast_node_t* statement, loc_t loc); +ast_node_t* newFor(ast_node_t* initial, + ast_node_t* compare_expression, + ast_node_t* terminal, + ast_node_t* statement, + loc_t loc); ast_node_t* newWhile(ast_node_t* compare_expression, ast_node_t* statement, loc_t loc); /* MODULE INSTANCES FUNCTIONS */ ast_node_t* newModuleConnection(char* id, ast_node_t* expression, loc_t loc); -ast_node_t* newModuleNamedInstance(char* unique_name, ast_node_t* module_connect_list, ast_node_t* module_parameter_list, loc_t loc); +ast_node_t* newModuleNamedInstance(char* unique_name, + ast_node_t* module_connect_list, + ast_node_t* module_parameter_list, + loc_t loc); ast_node_t* newFunctionNamedInstance(ast_node_t* module_connect_list, ast_node_t* module_parameter_list, loc_t loc); -ast_node_t* newTaskInstance(char* task_name, ast_node_t* task_named_instace, ast_node_t* task_parameter_list, loc_t loc); +ast_node_t* newTaskInstance(char* task_name, + ast_node_t* task_named_instace, + ast_node_t* task_parameter_list, + loc_t loc); ast_node_t* newTaskNamedInstance(ast_node_t* module_connect_list, loc_t loc); ast_node_t* newModuleInstance(char* module_ref_name, ast_node_t* module_named_instance, loc_t loc); ast_node_t* newFunctionInstance(char* function_ref_name, ast_node_t* function_named_instance, loc_t loc); @@ -93,26 +111,77 @@ ast_node_t* newfunctionList(ids node_type, ast_node_t* child, loc_t loc); ast_node_t* newParallelConnection(ast_node_t* expression1, ast_node_t* expression2, loc_t loc); /* GATE INSTANCE */ -ast_node_t* newGateInstance(char* gate_instance_name, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, loc_t loc); -ast_node_t* newMultipleInputsGateInstance(char* gate_instance_name, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, loc_t loc); +ast_node_t* newGateInstance(char* gate_instance_name, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + loc_t loc); +ast_node_t* newMultipleInputsGateInstance(char* gate_instance_name, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + loc_t loc); ast_node_t* newGate(operation_list gate_type, ast_node_t* gate_instance, loc_t loc); /* MODULE ITEMS */ ast_node_t* newAssign(ast_node_t* statement, loc_t loc); -ast_node_t* newVarDeclare(char* symbol, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, ast_node_t* value, loc_t loc); -ast_node_t* newDefparamVarDeclare(char* symbol, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, ast_node_t* value, loc_t loc); -ast_node_t* newVarDeclare2D(char* symbol, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, ast_node_t* expression5, ast_node_t* expression6, ast_node_t* value, loc_t loc); -ast_node_t* newIntegerTypeVarDeclare(char* symbol, ast_node_t* expression1, ast_node_t* expression2, ast_node_t* expression3, ast_node_t* expression4, ast_node_t* value, loc_t loc); +ast_node_t* newVarDeclare(char* symbol, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + ast_node_t* value, + loc_t loc); +ast_node_t* newDefparamVarDeclare(char* symbol, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + ast_node_t* value, + loc_t loc); +ast_node_t* newVarDeclare2D(char* symbol, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + ast_node_t* expression5, + ast_node_t* expression6, + ast_node_t* value, + loc_t loc); +ast_node_t* newIntegerTypeVarDeclare(char* symbol, + ast_node_t* expression1, + ast_node_t* expression2, + ast_node_t* expression3, + ast_node_t* expression4, + ast_node_t* value, + loc_t loc); /* CFunction */ ast_node_t* newCFunction(ids type_id, ast_node_t* arg1, ast_node_t* va_args_child, loc_t loc); ast_node_t* newCFunction(ids type_id, ast_node_t* arg1, ast_node_t* arg2, ast_node_t* va_args_child, loc_t loc); -ast_node_t* newCFunction(ids type_id, ast_node_t* arg1, ast_node_t* arg2, ast_node_t* arg3, ast_node_t* va_args_child, loc_t loc); +ast_node_t* newCFunction(ids type_id, + ast_node_t* arg1, + ast_node_t* arg2, + ast_node_t* arg3, + ast_node_t* va_args_child, + loc_t loc); /* HIGH LEVEL ITEMS */ -ast_node_t* newModule(char* module_name, ast_node_t* list_of_parameters, ast_node_t* list_of_ports, ast_node_t* list_of_module_items, loc_t loc); -ast_node_t* newFunction(ast_node_t* function_return, ast_node_t* list_of_ports, ast_node_t* list_of_module_items, loc_t loc, bool automatic); -ast_node_t* newTask(char* task_name, ast_node_t* list_of_ports, ast_node_t* list_of_task_items, loc_t loc, bool automatic); +ast_node_t* newModule(char* module_name, + ast_node_t* list_of_parameters, + ast_node_t* list_of_ports, + ast_node_t* list_of_module_items, + loc_t loc); +ast_node_t* newFunction(ast_node_t* function_return, + ast_node_t* list_of_ports, + ast_node_t* list_of_module_items, + loc_t loc, + bool automatic); +ast_node_t* newTask(char* task_name, + ast_node_t* list_of_ports, + ast_node_t* list_of_task_items, + loc_t loc, + bool automatic); ast_node_t* newBlock(char* id, ast_node_t* block_node); void next_module(); diff --git a/odin_ii/src/blif/blif_reader.cpp b/odin_ii/src/blif/blif_reader.cpp index 811d0ee7d58..e6495d8cd38 100644 --- a/odin_ii/src/blif/blif_reader.cpp +++ b/odin_ii/src/blif/blif_reader.cpp @@ -68,7 +68,8 @@ blif::reader::reader() { /*Opening the blif file */ file = vtr::fopen(configuration.list_of_file_names[my_location.file].c_str(), "r"); if (file == NULL) { - error_message(PARSE_ARGS, my_location, "cannot open file: %s\n", configuration.list_of_file_names[my_location.file].c_str()); + error_message(PARSE_ARGS, my_location, "cannot open file: %s\n", + configuration.list_of_file_names[my_location.file].c_str()); } line_count = 0; num_lines = count_blif_lines(); @@ -76,9 +77,7 @@ blif::reader::reader() { output_nets_hash = new hash_table(); } -blif::reader::~reader() { - delete output_nets_hash; -} +blif::reader::~reader() { delete output_nets_hash; } void* blif::reader::_read() { printf("Reading top level module\n"); @@ -100,7 +99,8 @@ void* blif::reader::_read() { hard_block_models* models = create_hard_block_models(); printf("\n"); char* buffer = NULL; - while (getbline(buffer, READ_BLIF_BUFFER, file) && read_tokens(buffer, models)) { // Print a progress bar indicating completeness. + while (getbline(buffer, READ_BLIF_BUFFER, file) + && read_tokens(buffer, models)) { // Print a progress bar indicating completeness. position = print_progress_bar((++line_count) / (double)num_lines, position, 50, wall_time() - time); } free_hard_block_models(models); @@ -207,8 +207,9 @@ void blif::reader::find_top_module() { } if (!found) { - warning_message(PARSE_BLIF, unknown_location, - "%s", "The top module name has not been specifed in the blif file, automatically considered as 'top'.\n"); + warning_message( + PARSE_BLIF, unknown_location, "%s", + "The top module name has not been specifed in the blif file, automatically considered as 'top'.\n"); blif_netlist->identifier = vtr::strdup("top"); } else { @@ -258,7 +259,8 @@ void blif::reader::hook_up_node(nnode_t* node) { nnet_t* output_net = (nnet_t*)output_nets_hash->get(input_pin->name); if (!output_net) - error_message(PARSE_BLIF, my_location, "Error: Could not hook up the pin %s: not available.", input_pin->name); + error_message(PARSE_BLIF, my_location, "Error: Could not hook up the pin %s: not available.", + input_pin->name); add_fanout_pin_to_net(output_net, input_pin); } @@ -330,8 +332,7 @@ void blif::reader::create_hard_block_nodes(hard_block_models* models) { new_node->type = odin_subckt_strmap.at(subcircuit_name); /* check for subcircuit prefix prefix */ - if (subcircuit_stripped_name - && new_node->type == NO_OP + if (subcircuit_stripped_name && new_node->type == NO_OP && odin_subckt_strmap.find(subcircuit_stripped_name) != odin_subckt_strmap.end()) new_node->type = odin_subckt_strmap.at(subcircuit_stripped_name); @@ -352,8 +353,7 @@ void blif::reader::create_hard_block_nodes(hard_block_models* models) { } if (!model) - error_message(PARSE_BLIF, unknown_location, - "Failed to retrieve subcircuit model (%s)\n", subcircuit_name); + error_message(PARSE_BLIF, unknown_location, "Failed to retrieve subcircuit model (%s)\n", subcircuit_name); /* Add input and output ports to the new node. */ else { @@ -383,12 +383,8 @@ void blif::reader::create_hard_block_nodes(hard_block_models* models) { npin_t* new_pin = allocate_npin(); new_pin->name = vtr::strdup(name); new_pin->type = INPUT; - new_pin->mapping = (new_node->type == BRAM - || new_node->type == ROM - || new_node->type == SPRAM - || new_node->type == DPRAM - || new_node->type == MEMORY - || hb_model != NULL) + new_pin->mapping = (new_node->type == BRAM || new_node->type == ROM || new_node->type == SPRAM + || new_node->type == DPRAM || new_node->type == MEMORY || hb_model != NULL) ? get_hard_block_port_name(mapping) : NULL; @@ -400,17 +396,14 @@ void blif::reader::create_hard_block_nodes(hard_block_models* models) { char* mapping = model->outputs->names[i]; char* name = (char*)mapping_index->get(mapping); - if (!name) error_message(PARSE_BLIF, my_location, "Invalid hard block mapping: %s", model->outputs->names[i]); + if (!name) + error_message(PARSE_BLIF, my_location, "Invalid hard block mapping: %s", model->outputs->names[i]); npin_t* new_pin = allocate_npin(); new_pin->name = NULL; //vtr::strdup(name); new_pin->type = OUTPUT; - new_pin->mapping = (new_node->type == BRAM - || new_node->type == ROM - || new_node->type == SPRAM - || new_node->type == DPRAM - || new_node->type == MEMORY - || hb_model != NULL) + new_pin->mapping = (new_node->type == BRAM || new_node->type == ROM || new_node->type == SPRAM + || new_node->type == DPRAM || new_node->type == MEMORY || hb_model != NULL) ? get_hard_block_port_name(mapping) : NULL; @@ -434,7 +427,8 @@ void blif::reader::create_hard_block_nodes(hard_block_models* models) { new_node->related_ast_node->identifier_node = create_tree_node_id(vtr::strdup(subcircuit_name), my_location); /*add this node to blif_netlist as an internal node */ - blif_netlist->internal_nodes = (nnode_t**)vtr::realloc(blif_netlist->internal_nodes, sizeof(nnode_t*) * (blif_netlist->num_internal_nodes + 1)); + blif_netlist->internal_nodes = (nnode_t**)vtr::realloc( + blif_netlist->internal_nodes, sizeof(nnode_t*) * (blif_netlist->num_internal_nodes + 1)); blif_netlist->internal_nodes[blif_netlist->num_internal_nodes++] = new_node; free_hard_block_ports(ports); @@ -467,9 +461,7 @@ void blif::reader::create_internal_node_and_driver() { new_node->related_ast_node = NULL; /* gnd vcc unconn already created as top module so ignore them */ - if ( - !strcmp(names[input_count - 1], "gnd") - || !strcmp(names[input_count - 1], "vcc") + if (!strcmp(names[input_count - 1], "gnd") || !strcmp(names[input_count - 1], "vcc") || !strcmp(names[input_count - 1], "unconn")) { skip_reading_bit_map = true; free_nnode(new_node); @@ -544,7 +536,8 @@ void blif::reader::create_internal_node_and_driver() { new_node->name = make_full_ref_name(names[input_count - 1], NULL, NULL, NULL, -1); /*add this node to blif_netlist as an internal node */ - blif_netlist->internal_nodes = (nnode_t**)vtr::realloc(blif_netlist->internal_nodes, sizeof(nnode_t*) * (blif_netlist->num_internal_nodes + 1)); + blif_netlist->internal_nodes = (nnode_t**)vtr::realloc( + blif_netlist->internal_nodes, sizeof(nnode_t*) * (blif_netlist->num_internal_nodes + 1)); blif_netlist->internal_nodes[blif_netlist->num_internal_nodes++] = new_node; /*add name information and a net(driver) for the output */ @@ -609,7 +602,8 @@ void blif::reader::build_top_input_node(const char* name_str) { add_driver_pin_to_net(new_net, new_pin); - blif_netlist->top_input_nodes = (nnode_t**)vtr::realloc(blif_netlist->top_input_nodes, sizeof(nnode_t*) * (blif_netlist->num_top_input_nodes + 1)); + blif_netlist->top_input_nodes = (nnode_t**)vtr::realloc(blif_netlist->top_input_nodes, + sizeof(nnode_t*) * (blif_netlist->num_top_input_nodes + 1)); blif_netlist->top_input_nodes[blif_netlist->num_top_input_nodes++] = new_node; //long sc_spot = sc_add_string(output_nets_sc, temp_string); @@ -684,7 +678,8 @@ void blif::reader::rb_create_top_output_nodes() { /*adding the node to the blif_netlist output nodes * add_node_to_netlist() function can also be used */ - blif_netlist->top_output_nodes = (nnode_t**)vtr::realloc(blif_netlist->top_output_nodes, sizeof(nnode_t*) * (blif_netlist->num_top_output_nodes + 1)); + blif_netlist->top_output_nodes = (nnode_t**)vtr::realloc( + blif_netlist->top_output_nodes, sizeof(nnode_t*) * (blif_netlist->num_top_output_nodes + 1)); blif_netlist->top_output_nodes[blif_netlist->num_top_output_nodes++] = new_node; vtr::free(temp_string); } @@ -796,13 +791,15 @@ hard_block_model* blif::reader::read_hard_block_model(char* name_subckt, hard_bl if (!strcmp(first_word, ".inputs")) { char* name; while ((name = vtr::strtok(NULL, TOKENS, file, buffer))) { - model->inputs->names = (char**)vtr::realloc(model->inputs->names, sizeof(char*) * (model->inputs->count + 1)); + model->inputs->names = (char**)vtr::realloc(model->inputs->names, + sizeof(char*) * (model->inputs->count + 1)); model->inputs->names[model->inputs->count++] = vtr::strdup(name); } } else if (!strcmp(first_word, ".outputs")) { char* name; while ((name = vtr::strtok(NULL, TOKENS, file, buffer))) { - model->outputs->names = (char**)vtr::realloc(model->outputs->names, sizeof(char*) * (model->outputs->count + 1)); + model->outputs->names = (char**)vtr::realloc( + model->outputs->names, sizeof(char*) * (model->outputs->count + 1)); model->outputs->names[model->outputs->count++] = vtr::strdup(name); } } else if (!strcmp(first_word, ".end")) { @@ -818,7 +815,8 @@ hard_block_model* blif::reader::read_hard_block_model(char* name_subckt, hard_bl vtr::free(buffer); if (!model || feof(file)) { - error_message(PARSE_BLIF, my_location, "A subcircuit model for '%s' with matching ports was not found.", name_subckt); + error_message(PARSE_BLIF, my_location, "A subcircuit model for '%s' with matching ports was not found.", + name_subckt); } // Sort the names. @@ -869,7 +867,8 @@ void blif::reader::rb_create_top_driver_nets(const char* instance_name_prefix) { blif_netlist->gnd_node = allocate_nnode(unknown_location); // allocate memory to node pointer blif_netlist->gnd_node->type = GND_NODE; // mark the type allocate_more_output_pins(blif_netlist->gnd_node, 1); // alloacate 1 output pin pointer to this node - add_output_port_information(blif_netlist->gnd_node, 1); // add port info. this port has 1 pin ,till now number of port for this is one + add_output_port_information(blif_netlist->gnd_node, + 1); // add port info. this port has 1 pin ,till now number of port for this is one new_pin = allocate_npin(); add_output_pin_to_node(blif_netlist->gnd_node, new_pin, 0); // add this pin to output pin pointer array of this node add_driver_pin_to_net(blif_netlist->zero_net, new_pin); // add this pin to net as driver pin @@ -1034,7 +1033,8 @@ operation_list blif::reader::read_bit_map_find_unknown_gate(int input_count, nno bit_map = (char**)vtr::realloc(bit_map, sizeof(char*) * (line_count_bitmap + 1)); bit_map[line_count_bitmap++] = vtr::strdup(vtr::strtok(buffer, TOKENS, file, buffer)); - if (output_bit_map != NULL) vtr::free(output_bit_map); + if (output_bit_map != NULL) + vtr::free(output_bit_map); output_bit_map = vtr::strdup(vtr::strtok(NULL, TOKENS, file, buffer)); } @@ -1106,7 +1106,8 @@ operation_list blif::reader::read_bit_map_find_unknown_gate(int input_count, nno to_return = LOGICAL_XNOR; } /* SMUX_2 */ - else if (((strcmp(bit_map[0], "01-") == 0) && (strcmp(bit_map[1], "1-1") == 0)) || ((strcmp(bit_map[0], "1-0") == 0) && (strcmp(bit_map[1], "-11") == 0))) { + else if (((strcmp(bit_map[0], "01-") == 0) && (strcmp(bit_map[1], "1-1") == 0)) + || ((strcmp(bit_map[0], "1-0") == 0) && (strcmp(bit_map[1], "-11") == 0))) { to_return = SMUX_2; /** @@ -1123,35 +1124,23 @@ operation_list blif::reader::read_bit_map_find_unknown_gate(int input_count, nno } } else if (line_count_bitmap == 4) { /* ADDER_FUNC */ - if ( - (!strcmp(bit_map[0], "001")) - && (!strcmp(bit_map[1], "010")) - && (!strcmp(bit_map[2], "100")) + if ((!strcmp(bit_map[0], "001")) && (!strcmp(bit_map[1], "010")) && (!strcmp(bit_map[2], "100")) && (!strcmp(bit_map[3], "111"))) { to_return = ADDER_FUNC; } /* CARRY_FUNC */ - else if ( - (!strcmp(bit_map[0], "011")) - && (!strcmp(bit_map[1], "101")) - && (!strcmp(bit_map[2], "110")) - && (!strcmp(bit_map[3], "111"))) { + else if ((!strcmp(bit_map[0], "011")) && (!strcmp(bit_map[1], "101")) && (!strcmp(bit_map[2], "110")) + && (!strcmp(bit_map[3], "111"))) { to_return = CARRY_FUNC; } /* LOGICAL_XOR */ - else if ( - (!strcmp(bit_map[0], "001")) - && (!strcmp(bit_map[1], "010")) - && (!strcmp(bit_map[2], "100")) - && (!strcmp(bit_map[3], "111"))) { + else if ((!strcmp(bit_map[0], "001")) && (!strcmp(bit_map[1], "010")) && (!strcmp(bit_map[2], "100")) + && (!strcmp(bit_map[3], "111"))) { to_return = LOGICAL_XOR; } /* LOGICAL_XNOR */ - else if ( - (!strcmp(bit_map[0], "000")) - && (!strcmp(bit_map[1], "011")) - && (!strcmp(bit_map[2], "101")) - && (!strcmp(bit_map[3], "110"))) { + else if ((!strcmp(bit_map[0], "000")) && (!strcmp(bit_map[1], "011")) && (!strcmp(bit_map[2], "101")) + && (!strcmp(bit_map[3], "110"))) { to_return = LOGICAL_XNOR; } } @@ -1210,8 +1199,7 @@ operation_list blif::reader::read_bit_map_find_unknown_gate(int input_count, nno if ((bit_map[i][i] == '1') && (bit_map[i][i + line_count_bitmap] == '1')) { int j; for (j = 1; j < line_count_bitmap; j++) { - if ( - (bit_map[i][(i + j) % line_count_bitmap] != '-') + if ((bit_map[i][(i + j) % line_count_bitmap] != '-') || (bit_map[i][((i + j) % line_count_bitmap) + line_count_bitmap] != '-')) { break; } @@ -1304,7 +1292,9 @@ void blif::reader::create_latch_node_and_driver() { line += " "; } - error_message(PARSE_BLIF, my_location, "This .latch Format not supported: <%s> \n\t required format :.latch [ ] ", + error_message(PARSE_BLIF, my_location, + "This .latch Format not supported: <%s> \n\t required format :.latch " + "[ ] ", line.c_str()); } } @@ -1344,7 +1334,8 @@ void blif::reader::create_latch_node_and_driver() { new_node->name = make_full_ref_name(names[1], NULL, NULL, NULL, -1); /*add this node to blif_netlist as an ff (flip-flop) node */ - blif_netlist->ff_nodes = (nnode_t**)vtr::realloc(blif_netlist->ff_nodes, sizeof(nnode_t*) * (blif_netlist->num_ff_nodes + 1)); + blif_netlist->ff_nodes + = (nnode_t**)vtr::realloc(blif_netlist->ff_nodes, sizeof(nnode_t*) * (blif_netlist->num_ff_nodes + 1)); blif_netlist->ff_nodes[blif_netlist->num_ff_nodes++] = new_node; /*add name information and a net(driver) for the output */ @@ -1488,7 +1479,8 @@ long blif::reader::get_hard_block_pin_number(char* original_name) { long pin_number = strtol(pin_number_string, &endptr, 10); if (pin_number_string == endptr) - error_message(PARSE_BLIF, my_location, "The given port name \"%s\" does not contain a valid pin number.", original_name); + error_message(PARSE_BLIF, my_location, "The given port name \"%s\" does not contain a valid pin number.", + original_name); vtr::free(name); @@ -1672,7 +1664,8 @@ void blif::reader::add_hard_block_model(hard_block_model* m, hard_block_ports* p if (strlen(needle) > 0) { models->count += 1; - models->models = (hard_block_model**)vtr::realloc(models->models, models->count * sizeof(hard_block_model*)); + models->models + = (hard_block_model**)vtr::realloc(models->models, models->count * sizeof(hard_block_model*)); models->models[models->count - 1] = m; models->index->add(needle, m); } diff --git a/odin_ii/src/blif/blif_writer.cpp b/odin_ii/src/blif/blif_writer.cpp index 7e6e032b8ea..57df88519a7 100644 --- a/odin_ii/src/blif/blif_writer.cpp +++ b/odin_ii/src/blif/blif_writer.cpp @@ -39,22 +39,19 @@ #include "vtr_memory.h" blif::writer::writer() - : generic_writer() { -} + : generic_writer() {} blif::writer::~writer() = default; -inline void blif::writer::_write(const netlist_t* netlist) { - output_blif(this->output_file, netlist); -} +inline void blif::writer::_write(const netlist_t* netlist) { output_blif(this->output_file, netlist); } inline void blif::writer::_create_file(const char* file_name, const file_type_e file_type) { // validate the file_name pionter oassert(file_name); // validate the file type if (file_type != BLIF) - error_message(UTIL, unknown_location, - "blif back-end entity cannot create file types(%d) other than blif", file_type); + error_message(UTIL, unknown_location, "blif back-end entity cannot create file types(%d) other than blif", + file_type); // create the blif file and set it as the output file this->output_file = create_blif(file_name); } @@ -71,9 +68,7 @@ inline void blif::writer::_create_file(const char* file_name, const file_type_e bool blif::writer::warn_undriven(nnode_t* node, nnet_t* net) { if (!net->num_driver_pins) { // Add a warning for an undriven net. - warning_message(NETLIST, node->loc, - "Net %s driving node %s is itself undriven.", - net->name, node->name); + warning_message(NETLIST, node->loc, "Net %s driving node %s is itself undriven.", net->name, node->name); return true; } @@ -118,19 +113,17 @@ void blif::writer::print_net_driver(FILE* out, nnode_t* node, nnet_t* net, long npin_t* driver = net->driver_pins[driver_idx]; if (!driver->node) { // Add a warning for an undriven net. - warning_message(NETLIST, node->loc, - "Net %s driving node %s is itself undriven.", - net->name, node->name); + warning_message(NETLIST, node->loc, "Net %s driving node %s is itself undriven.", net->name, node->name); fprintf(out, " %s", "unconn"); } else if (global_args.high_level_block.provenance() == argparse::Provenance::SPECIFIED && driver->node->related_ast_node != NULL) { - fprintf(out, " %s^^%i-%i", - driver->node->name, - driver->node->related_ast_node->far_tag, + fprintf(out, " %s^^%i-%i", driver->node->name, driver->node->related_ast_node->far_tag, driver->node->related_ast_node->high_number); } else { - if (driver->name != NULL && ((driver->node->type == MULTIPLY) || (driver->node->type == HARD_IP) || (driver->node->type == MEMORY) || (driver->node->type == ADD) || (driver->node->type == MINUS))) { + if (driver->name != NULL + && ((driver->node->type == MULTIPLY) || (driver->node->type == HARD_IP) || (driver->node->type == MEMORY) + || (driver->node->type == ADD) || (driver->node->type == MINUS))) { fprintf(out, " %s", driver->name); } else { fprintf(out, " %s", driver->node->name); @@ -170,12 +163,8 @@ void blif::writer::print_input_single_driver(FILE* out, nnode_t* node, long pin_ */ void blif::writer::print_output_pin(FILE* out, nnode_t* node) { /* now print the output */ - if (node->related_ast_node != NULL - && global_args.high_level_block.provenance() == argparse::Provenance::SPECIFIED) - fprintf(out, " %s^^%i-%i", - node->name, - node->related_ast_node->far_tag, - node->related_ast_node->high_number); + if (node->related_ast_node != NULL && global_args.high_level_block.provenance() == argparse::Provenance::SPECIFIED) + fprintf(out, " %s^^%i-%i", node->name, node->related_ast_node->far_tag, node->related_ast_node->high_number); else fprintf(out, " %s", node->name); } @@ -277,9 +266,7 @@ void blif::writer::output_blif(FILE* out, const netlist_t* netlist) { for (long i = 0; i < netlist->num_top_output_nodes; i++) { nnode_t* top_output_node = netlist->top_output_nodes[i]; if (!top_output_node->input_pins[0]->net->num_driver_pins) { - warning_message(NETLIST, - top_output_node->loc, - "This output is undriven (%s) and will be removed\n", + warning_message(NETLIST, top_output_node->loc, "This output is undriven (%s) and will be removed\n", top_output_node->name); } else { print_output_pin(out, top_output_node); diff --git a/odin_ii/src/config/read_xml_config_file.cpp b/odin_ii/src/config/read_xml_config_file.cpp index b329dbd461b..cbf3226eec0 100644 --- a/odin_ii/src/config/read_xml_config_file.cpp +++ b/odin_ii/src/config/read_xml_config_file.cpp @@ -140,7 +140,8 @@ void read_outputs(pugi::xml_node a_node, config_t* config, const pugiutil::loc_d if (child != NULL) { /* Two arch files specified? */ if (global_args.arch_file.value() != "") { - error_message(PARSE_ARGS, unknown_location, "%s", "Error: Arch file specified in config file AND command line\n"); + error_message(PARSE_ARGS, unknown_location, "%s", + "Error: Arch file specified in config file AND command line\n"); } global_args.arch_file.set(child.child_value(), argparse::Provenance::SPECIFIED); } diff --git a/odin_ii/src/core/adders.cpp b/odin_ii/src/core/adders.cpp index ed6ecdb3f1c..dc56b9e4454 100644 --- a/odin_ii/src/core/adders.cpp +++ b/odin_ii/src/core/adders.cpp @@ -53,7 +53,17 @@ int min_threshold_adder = 0; netlist_t* the_netlist; -void init_split_adder(nnode_t* node, nnode_t* ptr, int a, int sizea, int b, int sizeb, int cin, int cout, int index, int flag, netlist_t* netlist); +void init_split_adder(nnode_t* node, + nnode_t* ptr, + int a, + int sizea, + int b, + int sizeb, + int cin, + int cout, + int index, + int flag, + netlist_t* netlist); static void cleanup_add_old_node(nnode_t* nodeo, netlist_t* netlist); /*--------------------------------------------------------------------------- @@ -310,19 +320,24 @@ void define_add_function(nnode_t* node, FILE* out) { if (i < node->input_port_sizes[0]) { if (!driver_pin->name) - j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->next->next->name, i, driver_pin->node->name); + j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->next->next->name, i, + driver_pin->node->name); else j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->next->next->name, i, driver_pin->name); } else if (i >= node->input_port_sizes[0] && i < node->input_port_sizes[1] + node->input_port_sizes[0]) { if (!driver_pin->name) - j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->next->name, i - node->input_port_sizes[0], driver_pin->node->name); + j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->next->name, i - node->input_port_sizes[0], + driver_pin->node->name); else - j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->next->name, i - node->input_port_sizes[0], driver_pin->name); + j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->next->name, i - node->input_port_sizes[0], + driver_pin->name); } else { if (!driver_pin->name) - j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->name, i - (node->input_port_sizes[0] + node->input_port_sizes[1]), driver_pin->node->name); + j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->name, + i - (node->input_port_sizes[0] + node->input_port_sizes[1]), driver_pin->node->name); else - j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->name, i - (node->input_port_sizes[0] + node->input_port_sizes[1]), driver_pin->name); + j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->inputs->name, + i - (node->input_port_sizes[0] + node->input_port_sizes[1]), driver_pin->name); } if (count + j > 79) { @@ -337,7 +352,8 @@ void define_add_function(nnode_t* node, FILE* out) { if (i < node->output_port_sizes[0]) j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->outputs->next->name, i, node->output_pins[i]->name); else - j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->outputs->name, i - node->output_port_sizes[0], node->output_pins[i]->name); + j = odin_sprintf(buffer, " %s[%d]=%s", hard_adders->outputs->name, i - node->output_port_sizes[0], + node->output_pins[i]->name); if (count + j > 79) { fprintf(out, "\\\n"); count = 0; @@ -359,7 +375,17 @@ void define_add_function(nnode_t* node, FILE* out) { * to original pins, output pins are set to NULL for later connecting * flag = 0: all adders are hard logic block; flag = 1: the last adder in the chain is soft logic block *---------------------------------------------------------------------*/ -void init_split_adder(nnode_t* node, nnode_t* ptr, int a, int sizea, int b, int sizeb, int cin, int cout, int index, int flag, netlist_t* netlist) { +void init_split_adder(nnode_t* node, + nnode_t* ptr, + int a, + int sizea, + int b, + int sizeb, + int cin, + int cout, + int index, + int flag, + netlist_t* netlist) { int i; int flaga = 0, flagb = 0; int current_sizea, current_sizeb; @@ -711,7 +737,8 @@ void split_adder(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int cin, in remap_pin_to_new_node(nodeo->output_pins[j], node[0], j + 2); else { node[0]->output_pins[j + 2] = allocate_npin(); - node[0]->output_pins[j + 2]->name = append_string("", "%s~dummy_output~%d~%d", node[0]->name, 0, j + 2); + node[0]->output_pins[j + 2]->name + = append_string("", "%s~dummy_output~%d~%d", node[0]->name, 0, j + 2); } //hang the first cout node[0]->output_pins[0] = allocate_npin(); @@ -740,13 +767,15 @@ void split_adder(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int cin, in else { node[count - 1]->output_pins[j + 1] = allocate_npin(); // Pad outputs with a unique and descriptive name to avoid collisions. - node[count - 1]->output_pins[j + 1]->name = append_string("", "%s~dummy_output~%d~%d", node[count - 1]->name, count - 1, j + 1); + node[count - 1]->output_pins[j + 1]->name + = append_string("", "%s~dummy_output~%d~%d", node[count - 1]->name, count - 1, j + 1); } } //Hang the last cout node[count - 1]->output_pins[0] = allocate_npin(); // Pad outputs with a unique and descriptive name to avoid collisions. - node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[count - 1]->name, count - 1, 0); + node[count - 1]->output_pins[0]->name + = append_string("", "%s~dummy_output~%d~%d", node[count - 1]->name, count - 1, 0); } else { for (j = 0; j < node[count - 1]->num_output_pins - 1; j++) //if(((count - 1) * sizea + j - 1) < nodeo->num_output_pins) @@ -756,7 +785,8 @@ void split_adder(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int cin, in else { node[count - 1]->output_pins[0] = allocate_npin(); // Pad outputs with a unique and descriptive name to avoid collisions. - node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[count - 1]->name, count - 1, 0); + node[count - 1]->output_pins[0]->name + = append_string("", "%s~dummy_output~%d~%d", node[count - 1]->name, count - 1, 0); } } } @@ -1169,19 +1199,26 @@ int match_pins(nnode_t* node, nnode_t* next_node) { /*--------------------------------------------------------------------------------------------- * connect adder type output pin to a node *-------------------------------------------------------------------------------------------*/ -static void connect_output_pin_to_node(int* width, int current_pin, int output_pin_id, nnode_t* node, nnode_t* current_adder, short subtraction) { +static void connect_output_pin_to_node(int* width, + int current_pin, + int output_pin_id, + nnode_t* node, + nnode_t* current_adder, + short subtraction) { // output if (subtraction) { remap_pin_to_new_node(node->output_pins[current_pin], current_adder, output_pin_id); } else { - npin_t* node_pin_select = node->output_pins[(node->num_input_port_sizes == 2) ? current_pin : (current_pin < width[output_pin_id] - 1) ? current_pin + 1 - : 0]; + npin_t* node_pin_select = node->output_pins[(node->num_input_port_sizes == 2) ? current_pin + : (current_pin < width[output_pin_id] - 1) ? current_pin + 1 + : 0]; if (node_pin_select) { if (node_pin_select->type != NO_ID || (node->num_input_port_sizes == 2)) { remap_pin_to_new_node(node_pin_select, current_adder, output_pin_id); } else { current_adder->output_pins[output_pin_id] = allocate_npin(); - current_adder->output_pins[output_pin_id]->name = append_string("", "%s~dummy_output~%d", current_adder->name, output_pin_id); + current_adder->output_pins[output_pin_id]->name + = append_string("", "%s~dummy_output~%d", current_adder->name, output_pin_id); } } } @@ -1190,7 +1227,15 @@ static void connect_output_pin_to_node(int* width, int current_pin, int output_p /*--------------------------------------------------------------------------------------------- * make a single half-adder (can do unary subtraction, binary subtraction and addition) *-------------------------------------------------------------------------------------------*/ -static nnode_t* make_adder(operation_list funct, nnode_t* current_adder, nnode_t* previous_carry, int* width, int current_pin, netlist_t* netlist, nnode_t* node, short subtraction, short mark) { +static nnode_t* make_adder(operation_list funct, + nnode_t* current_adder, + nnode_t* previous_carry, + int* width, + int current_pin, + netlist_t* netlist, + nnode_t* node, + short subtraction, + short mark) { //make a 2 bit 0r 3 bit sum or carry based on previous carry nnode_t* new_funct = NULL; short is_three_port_gate = 0; @@ -1213,8 +1258,10 @@ static nnode_t* make_adder(operation_list funct, nnode_t* current_adder, nnode_t //copy the input pin of a half-adder to another function (CARRY or ADDER) if (current_adder != NULL) { - add_input_pin_to_node(new_funct, copy_input_npin(current_adder->input_pins[0 + is_three_port_gate]), 0 + is_three_port_gate); - add_input_pin_to_node(new_funct, copy_input_npin(current_adder->input_pins[1 + is_three_port_gate]), 1 + is_three_port_gate); + add_input_pin_to_node(new_funct, copy_input_npin(current_adder->input_pins[0 + is_three_port_gate]), + 0 + is_three_port_gate); + add_input_pin_to_node(new_funct, copy_input_npin(current_adder->input_pins[1 + is_three_port_gate]), + 1 + is_three_port_gate); } // create one from scratch else { @@ -1321,9 +1368,11 @@ void instantiate_add_w_carry_block(int* width, nnode_t* node, short mark, netlis short construct_last_carry_flag = (i != width[0] - 1 || !subtraction) ? 1 : 0; //build Ripple Carry Adder - nnode_t* current_adder = make_adder(ADDER_FUNC, NULL, previous_carry, width, i, netlist, node, subtraction, mark); + nnode_t* current_adder + = make_adder(ADDER_FUNC, NULL, previous_carry, width, i, netlist, node, subtraction, mark); if (construct_last_carry_flag) - previous_carry = make_adder(CARRY_FUNC, current_adder, previous_carry, width, i, netlist, node, subtraction, mark); + previous_carry + = make_adder(CARRY_FUNC, current_adder, previous_carry, width, i, netlist, node, subtraction, mark); connect_output_pin_to_node(width, i, 0, node, current_adder, subtraction); } @@ -1337,8 +1386,8 @@ void instantiate_add_w_carry_block(int* width, nnode_t* node, short mark, netlis bool is_ast_adder(ast_node_t* node) { bool is_adder; ast_node_t* instance = node->children[0]; - is_adder = (!strcmp(node->identifier_node->types.identifier, "adder")) - && (instance->children[0]->num_children == 4); + is_adder + = (!strcmp(node->identifier_node->types.identifier, "adder")) && (instance->children[0]->num_children == 4); ast_node_t* connect_list = instance->children[0]; if (is_adder && connect_list->children[0]->identifier_node) { @@ -1346,7 +1395,8 @@ bool is_ast_adder(ast_node_t* node) { for (int i = 0; i < connect_list->num_children && is_adder; i++) { char* id = connect_list->children[i]->identifier_node->types.identifier; - if ((strcmp(id, "a") != 0) && (strcmp(id, "b") != 0) && (strcmp(id, "cin") != 0) && (strcmp(id, "cout") != 0) && (strcmp(id, "sumout") != 0)) { + if ((strcmp(id, "a") != 0) && (strcmp(id, "b") != 0) && (strcmp(id, "cin") != 0) + && (strcmp(id, "cout") != 0) && (strcmp(id, "sumout") != 0)) { is_adder = false; break; } diff --git a/odin_ii/src/core/block_memories.cpp b/odin_ii/src/core/block_memories.cpp index 0b3cad7e3ea..e78c88bfa85 100644 --- a/odin_ii/src/core/block_memories.cpp +++ b/odin_ii/src/core/block_memories.cpp @@ -53,8 +53,16 @@ static void create_nrmw_dual_port_ram(block_memory_t* bram, netlist_t* netlist); static void create_2rw_multiplexed_dual_port_ram(block_memory_t* bram, netlist_t* netlist); static bool check_same_addrs(block_memory_t* bram); -static signal_list_t* split_cascade_port(signal_list_t* signalvar, signal_list_t* selectors, int desired_width, nnode_t* node, netlist_t* netlist); -static void decode_out_port(signal_list_t* src, signal_list_t* outs, signal_list_t* selectors, nnode_t* node, netlist_t* netlist); +static signal_list_t* split_cascade_port(signal_list_t* signalvar, + signal_list_t* selectors, + int desired_width, + nnode_t* node, + netlist_t* netlist); +static void decode_out_port(signal_list_t* src, + signal_list_t* outs, + signal_list_t* selectors, + nnode_t* node, + netlist_t* netlist); static void cleanup_block_memory_old_node(nnode_t* old_node); @@ -223,11 +231,7 @@ static void create_nr_single_port_ram(block_memory_t* rom, netlist_t* netlist) { /* INPUTS */ selectors = copy_input_signals(rom->read_en); /* adding the muxed read addrs as spram address */ - signals->addr = split_cascade_port(rom->read_addr, - selectors, - addr_width, - old_node, - netlist); + signals->addr = split_cascade_port(rom->read_addr, selectors, addr_width, old_node, netlist); /* add clk singnal */ signals->clk = rom->clk->pins[0]; @@ -855,20 +859,12 @@ static void create_nrmw_dual_port_ram(block_memory_t* bram, netlist_t* netlist) /* INPUTS */ selectors = copy_input_signals(bram->read_en); /* adding the read addr input port as address1 */ - signals->addr1 = split_cascade_port(bram->read_addr, - selectors, - addr_width, - old_node, - netlist); + signals->addr1 = split_cascade_port(bram->read_addr, selectors, addr_width, old_node, netlist); free_signal_list(selectors); selectors = copy_input_signals(bram->write_en); /* adding the write addr port as address2 */ - signals->addr2 = split_cascade_port(bram->write_addr, - selectors, - addr_width, - old_node, - netlist); + signals->addr2 = split_cascade_port(bram->write_addr, selectors, addr_width, old_node, netlist); free_signal_list(selectors); /* handling clock signals */ @@ -881,11 +877,7 @@ static void create_nrmw_dual_port_ram(block_memory_t* bram, netlist_t* netlist) } selectors = copy_input_signals(bram->write_en); /* adding the write data port as data2 */ - signals->data2 = split_cascade_port(bram->write_data, - selectors, - data_width, - old_node, - netlist); + signals->data2 = split_cascade_port(bram->write_data, selectors, data_width, old_node, netlist); free_signal_list(selectors); /* first port does not have data, so the enable is GND */ @@ -896,11 +888,7 @@ static void create_nrmw_dual_port_ram(block_memory_t* bram, netlist_t* netlist) for (i = 0; i < num_wr_ports; ++i) { add_pin_to_signal_list(vcc_signals, get_one_pin(netlist)); } - signal_list_t* we2_signal = split_cascade_port(vcc_signals, - bram->write_en, - 1, - old_node, - netlist); + signal_list_t* we2_signal = split_cascade_port(vcc_signals, bram->write_en, 1, old_node, netlist); signals->we2 = we2_signal->pins[0]; @@ -957,11 +945,7 @@ static void create_2rw_multiplexed_dual_port_ram(block_memory_t* bram, netlist_t /* INPUTS */ selectors = copy_input_signals(bram->read_en); /* adding the read addr input port as address1 */ - signals->addr1 = split_cascade_port(bram->read_addr, - selectors, - addr_width, - old_node, - netlist); + signals->addr1 = split_cascade_port(bram->read_addr, selectors, addr_width, old_node, netlist); free_signal_list(selectors); signals->addr2 = init_signal_list(); @@ -1034,8 +1018,7 @@ void map_rom_to_mem_hardblocks(block_memory_t* rom, netlist_t* netlist) { int rom_relative_area = depth * width; t_model* lutram_model = find_hard_block(LUTRAM_string); - if (lutram_model != NULL - && (LUTRAM_INFERENCE_THRESHOLD_MIN <= rom_relative_area) + if (lutram_model != NULL && (LUTRAM_INFERENCE_THRESHOLD_MIN <= rom_relative_area) && (rom_relative_area <= LUTRAM_INFERENCE_THRESHOLD_MAX)) { /* map to LUTRAM */ // nnode_t* lutram = NULL; @@ -1084,8 +1067,7 @@ void map_bram_to_mem_hardblocks(block_memory_t* bram, netlist_t* netlist) { int bram_relative_area = depth * width; t_model* lutram_model = find_hard_block(LUTRAM_string); - if (lutram_model != NULL - && (LUTRAM_INFERENCE_THRESHOLD_MIN <= bram_relative_area) + if (lutram_model != NULL && (LUTRAM_INFERENCE_THRESHOLD_MIN <= bram_relative_area) && (bram_relative_area <= LUTRAM_INFERENCE_THRESHOLD_MAX)) { /* map to LUTRAM */ // nnode_t* lutram = NULL; @@ -1189,7 +1171,11 @@ static bool check_same_addrs(block_memory_t* bram) { * * @return last item outputs in the chain of cascaded signals */ -static signal_list_t* split_cascade_port(signal_list_t* signalvar, signal_list_t* selectors, int desired_width, nnode_t* node, netlist_t* netlist) { +static signal_list_t* split_cascade_port(signal_list_t* signalvar, + signal_list_t* selectors, + int desired_width, + nnode_t* node, + netlist_t* netlist) { /* check if cascade is needed */ if (signalvar->count == desired_width) { return (signalvar); @@ -1238,12 +1224,7 @@ static signal_list_t* split_cascade_port(signal_list_t* signalvar, signal_list_t signal_list_t* selector_i = init_signal_list(); add_pin_to_signal_list(selector_i, selectors->pins[i]); /* a regular multiplexer instatiation */ - muxes[i] = make_multiport_smux(mux_inputs, - selector_i, - 2, - NULL, - node, - netlist); + muxes[i] = make_multiport_smux(mux_inputs, selector_i, 2, NULL, node, netlist); // CLEAN UP free_signal_list(selector_i); @@ -1296,7 +1277,11 @@ static signal_list_t* split_cascade_port(signal_list_t* signalvar, signal_list_t * @param node pointer to the corresponding node * @param netlist pointer to the current netlist */ -static void decode_out_port(signal_list_t* src, signal_list_t* outs, signal_list_t* selectors, nnode_t* node, netlist_t* netlist) { +static void decode_out_port(signal_list_t* src, + signal_list_t* outs, + signal_list_t* selectors, + nnode_t* node, + netlist_t* netlist) { int width = src->count; /* validate signals list size */ oassert(width != 0); @@ -1354,12 +1339,7 @@ static void decode_out_port(signal_list_t* src, signal_list_t* outs, signal_list signal_list_t* selector_i = init_signal_list(); add_pin_to_signal_list(selector_i, selectors->pins[i]); /* a regular multiplexer instatiation */ - muxes[i] = make_multiport_smux(mux_inputs, - selector_i, - 2, - splitted_signals[i], - node, - netlist); + muxes[i] = make_multiport_smux(mux_inputs, selector_i, 2, splitted_signals[i], node, netlist); // CLEAN UP free_signal_list(selector_i); diff --git a/odin_ii/src/core/hard_blocks.cpp b/odin_ii/src/core/hard_blocks.cpp index ebdd39e4401..71f3f732eb0 100644 --- a/odin_ii/src/core/hard_blocks.cpp +++ b/odin_ii/src/core/hard_blocks.cpp @@ -73,36 +73,27 @@ void register_hard_blocks() { if (single_port_rams) { if (configuration.split_memory_width) { - register_hb_port_size( - get_model_port(single_port_rams->inputs, "data"), 1); + register_hb_port_size(get_model_port(single_port_rams->inputs, "data"), 1); - register_hb_port_size( - get_model_port(single_port_rams->outputs, "out"), 1); + register_hb_port_size(get_model_port(single_port_rams->outputs, "out"), 1); } - register_hb_port_size( - get_model_port(single_port_rams->inputs, "addr"), get_sp_ram_split_depth()); + register_hb_port_size(get_model_port(single_port_rams->inputs, "addr"), get_sp_ram_split_depth()); } if (dual_port_rams) { if (configuration.split_memory_width) { - register_hb_port_size( - get_model_port(dual_port_rams->inputs, "data1"), 1); - register_hb_port_size( - get_model_port(dual_port_rams->inputs, "data2"), 1); - - register_hb_port_size( - get_model_port(dual_port_rams->outputs, "out1"), 1); - register_hb_port_size( - get_model_port(dual_port_rams->outputs, "out2"), 1); + register_hb_port_size(get_model_port(dual_port_rams->inputs, "data1"), 1); + register_hb_port_size(get_model_port(dual_port_rams->inputs, "data2"), 1); + + register_hb_port_size(get_model_port(dual_port_rams->outputs, "out1"), 1); + register_hb_port_size(get_model_port(dual_port_rams->outputs, "out2"), 1); } int split_depth = get_dp_ram_split_depth(); - register_hb_port_size( - get_model_port(dual_port_rams->inputs, "addr1"), split_depth); - register_hb_port_size( - get_model_port(dual_port_rams->inputs, "addr2"), split_depth); + register_hb_port_size(get_model_port(dual_port_rams->inputs, "addr1"), split_depth); + register_hb_port_size(get_model_port(dual_port_rams->inputs, "addr2"), split_depth); } } @@ -135,7 +126,8 @@ void define_hard_block(nnode_t* node, FILE* out) { oassert(node->output_port_sizes[0] > 0); //IF the hard_blocks is an adder or a multiplier, we ignore it.(Already print out in define_add_function and define_mult_function) - if (strcmp(node->related_ast_node->identifier_node->types.identifier, "multiply") == 0 || strcmp(node->related_ast_node->identifier_node->types.identifier, "adder") == 0) + if (strcmp(node->related_ast_node->identifier_node->types.identifier, "multiply") == 0 + || strcmp(node->related_ast_node->identifier_node->types.identifier, "adder") == 0) return; count = fprintf(out, "\n.subckt "); @@ -146,26 +138,30 @@ void define_hard_block(nnode_t* node, FILE* out) { port = index = 0; for (i = 0; i < node->num_input_pins; i++) { /* Check that the input pin is driven */ - if (node->input_pins[i]->net->num_driver_pins == 0 - && node->input_pins[i]->net != syn_netlist->zero_net - && node->input_pins[i]->net != syn_netlist->one_net - && node->input_pins[i]->net != syn_netlist->pad_net) { - warning_message(NETLIST, node->loc, "Signal %s is not driven. padding with ground\n", node->input_pins[i]->name); + if (node->input_pins[i]->net->num_driver_pins == 0 && node->input_pins[i]->net != syn_netlist->zero_net + && node->input_pins[i]->net != syn_netlist->one_net && node->input_pins[i]->net != syn_netlist->pad_net) { + warning_message(NETLIST, node->loc, "Signal %s is not driven. padding with ground\n", + node->input_pins[i]->name); add_fanout_pin_to_net(syn_netlist->zero_net, node->input_pins[i]); } else if (node->input_pins[i]->net->num_driver_pins > 1) { - error_message(NETLIST, node->loc, "Multiple (%d) driver pins not supported in hard block definition\n", node->input_pins[i]->net->num_driver_pins); + error_message(NETLIST, node->loc, "Multiple (%d) driver pins not supported in hard block definition\n", + node->input_pins[i]->net->num_driver_pins); } if (node->input_port_sizes[port] == 1) { if (node->input_pins[i]->net->driver_pins[0]->name != NULL) - j = odin_sprintf(buffer, " %s=%s", node->input_pins[i]->mapping, node->input_pins[i]->net->driver_pins[0]->name); + j = odin_sprintf(buffer, " %s=%s", node->input_pins[i]->mapping, + node->input_pins[i]->net->driver_pins[0]->name); else - j = odin_sprintf(buffer, " %s=%s", node->input_pins[i]->mapping, node->input_pins[i]->net->driver_pins[0]->node->name); + j = odin_sprintf(buffer, " %s=%s", node->input_pins[i]->mapping, + node->input_pins[i]->net->driver_pins[0]->node->name); } else { if (node->input_pins[i]->net->driver_pins[0]->name != NULL) - j = odin_sprintf(buffer, " %s[%d]=%s", node->input_pins[i]->mapping, index, node->input_pins[i]->net->driver_pins[0]->name); + j = odin_sprintf(buffer, " %s[%d]=%s", node->input_pins[i]->mapping, index, + node->input_pins[i]->net->driver_pins[0]->name); else - j = odin_sprintf(buffer, " %s[%d]=%s", node->input_pins[i]->mapping, index, node->input_pins[i]->net->driver_pins[0]->node->name); + j = odin_sprintf(buffer, " %s[%d]=%s", node->input_pins[i]->mapping, index, + node->input_pins[i]->net->driver_pins[0]->node->name); } if (count + j > 79) { @@ -318,8 +314,7 @@ int hard_block_port_size(t_model* hb, char* pname) { return 0; } -enum PORTS -hard_block_port_direction(t_model* hb, char* pname) { +enum PORTS hard_block_port_direction(t_model* hb, char* pname) { t_model_ports* tmp; if (hb == NULL) diff --git a/odin_ii/src/core/implicit_memory.cpp b/odin_ii/src/core/implicit_memory.cpp index 67861c2bda0..a73486238b4 100644 --- a/odin_ii/src/core/implicit_memory.cpp +++ b/odin_ii/src/core/implicit_memory.cpp @@ -63,7 +63,8 @@ void init_implicit_memory_index() { implicit_memory* lookup_implicit_memory(char* instance_name_prefix, char* identifier) { char* memory_string = make_full_ref_name(instance_name_prefix, NULL, NULL, identifier, -1); - std::unordered_map::const_iterator mem_out = implicit_memories.find(std::string(memory_string)); + std::unordered_map::const_iterator mem_out + = implicit_memories.find(std::string(memory_string)); vtr::free(memory_string); @@ -145,11 +146,14 @@ bool is_signal_list_connected_to_memory(implicit_memory* memory, signal_list_t* /* * Creates an implicit memory block with the given depth and data width, and the given name and prefix. */ -implicit_memory* create_implicit_memory_block(int data_width, long memory_depth, char* name, char* instance_name_prefix, loc_t loc) { +implicit_memory* create_implicit_memory_block(int data_width, + long memory_depth, + char* name, + char* instance_name_prefix, + loc_t loc) { char implicit_string[] = "implicit_ram"; - oassert(memory_depth > 0 - && "implicit memory depth must be greater than 0"); + oassert(memory_depth > 0 && "implicit memory depth must be greater than 0"); //find closest power of 2 from memory depth. long addr_width = 0; @@ -161,7 +165,8 @@ implicit_memory* create_implicit_memory_block(int data_width, long memory_depth, //verify if it is a power of two (only one bit set) if ((memory_depth != real_memory_depth)) { - warning_message(NETLIST, loc, "Rounding memory <%s> of size <%ld> to closest power of two: %ld.", name, memory_depth, real_memory_depth); + warning_message(NETLIST, loc, "Rounding memory <%s> of size <%ld> to closest power of two: %ld.", name, + memory_depth, real_memory_depth); memory_depth = real_memory_depth; } @@ -212,7 +217,8 @@ void add_output_port_to_implicit_memory(implicit_memory* memory, signal_list_t* * Looks up an implicit memory based on the given name. */ implicit_memory* lookup_implicit_memory_input(char* name) { - std::unordered_map::const_iterator mem_out = implicit_memory_inputs.find(std::string(name)); + std::unordered_map::const_iterator mem_out + = implicit_memory_inputs.find(std::string(name)); if (mem_out == implicit_memory_inputs.end()) return NULL; @@ -333,24 +339,33 @@ void finalize_implicit_memory(implicit_memory* memory) { if (!has_clk) { add_dummy_input_port_to_implicit_memory(memory, 1, "clk"); - warning_message(NETLIST, memory->node->loc, "Implicit memory %s is not clocked. Padding clock pin.", memory->name); + warning_message(NETLIST, memory->node->loc, "Implicit memory %s is not clocked. Padding clock pin.", + memory->name); } char has_port1 = has_addr1 || has_data1 || has_we1 || has_out1; char has_port2 = has_addr2 || has_data2 || has_we2 || has_out2; if (has_port1) { - if (!has_addr1) add_dummy_input_port_to_implicit_memory(memory, memory->addr_width, "addr1"); - if (!has_data1) add_dummy_input_port_to_implicit_memory(memory, memory->data_width, "data1"); - if (!has_we1) add_dummy_input_port_to_implicit_memory(memory, 1, "we1"); - if (!has_out1) add_dummy_output_port_to_implicit_memory(memory, memory->data_width, "out1"); + if (!has_addr1) + add_dummy_input_port_to_implicit_memory(memory, memory->addr_width, "addr1"); + if (!has_data1) + add_dummy_input_port_to_implicit_memory(memory, memory->data_width, "data1"); + if (!has_we1) + add_dummy_input_port_to_implicit_memory(memory, 1, "we1"); + if (!has_out1) + add_dummy_output_port_to_implicit_memory(memory, memory->data_width, "out1"); } if (has_port2) { - if (!has_addr2) add_dummy_input_port_to_implicit_memory(memory, memory->addr_width, "addr2"); - if (!has_data2) add_dummy_input_port_to_implicit_memory(memory, memory->data_width, "data2"); - if (!has_we2) add_dummy_input_port_to_implicit_memory(memory, 1, "we2"); - if (!has_out2) add_dummy_output_port_to_implicit_memory(memory, memory->data_width, "out2"); + if (!has_addr2) + add_dummy_input_port_to_implicit_memory(memory, memory->addr_width, "addr2"); + if (!has_data2) + add_dummy_input_port_to_implicit_memory(memory, memory->data_width, "data2"); + if (!has_we2) + add_dummy_input_port_to_implicit_memory(memory, 1, "we2"); + if (!has_out2) + add_dummy_output_port_to_implicit_memory(memory, memory->data_width, "out2"); } if (!has_port1 || !has_port2) diff --git a/odin_ii/src/core/implicit_memory.h b/odin_ii/src/core/implicit_memory.h index 172545c796b..532943b10bb 100644 --- a/odin_ii/src/core/implicit_memory.h +++ b/odin_ii/src/core/implicit_memory.h @@ -50,7 +50,11 @@ implicit_memory* lookup_implicit_memory_reference_ast(char* instance_name_prefix char is_valid_implicit_memory_reference_ast(char* instance_name_prefix, ast_node_t* node); bool is_signal_list_connected_to_memory(implicit_memory* memory, signal_list_t* signals, const char* port_name); -implicit_memory* create_implicit_memory_block(int data_width, long words, char* name, char* instance_name_prefix, loc_t loc); +implicit_memory* create_implicit_memory_block(int data_width, + long words, + char* name, + char* instance_name_prefix, + loc_t loc); implicit_memory* lookup_implicit_memory_input(char* name); diff --git a/odin_ii/src/core/memories.cpp b/odin_ii/src/core/memories.cpp index 00880cfaabf..17f991b79b8 100644 --- a/odin_ii/src/core/memories.cpp +++ b/odin_ii/src/core/memories.cpp @@ -125,8 +125,8 @@ void remap_input_port_to_memory(nnode_t* node, signal_list_t* signals, const cha for (i = 0; i < j; i++) { npin_t* pin = node->input_pins[i]; if (!strcmp(pin->mapping, port_name)) { - error_message(NETLIST, node->loc, - "Attempted to reassign output port %s to memory %s.", port_name, node->name); + error_message(NETLIST, node->loc, "Attempted to reassign output port %s to memory %s.", port_name, + node->name); } } @@ -159,8 +159,8 @@ void add_input_port_to_memory(nnode_t* node, signal_list_t* signalsvar, const ch for (i = 0; i < j; i++) { npin_t* pin = node->input_pins[i]; if (!strcmp(pin->mapping, port_name)) { - error_message(NETLIST, node->loc, - "Attempted to reassign input port %s to memory %s.", port_name, node->name); + error_message(NETLIST, node->loc, "Attempted to reassign input port %s to memory %s.", port_name, + node->name); } } @@ -193,8 +193,8 @@ void add_output_port_to_memory(nnode_t* node, signal_list_t* signals, const char for (i = 0; i < j; i++) { npin_t* pin = node->output_pins[i]; if (!strcmp(pin->mapping, port_name)) { - error_message(NETLIST, node->loc, - "Attempted to reassign output port %s to node %s.", port_name, node->name); + error_message(NETLIST, node->loc, "Attempted to reassign output port %s to node %s.", port_name, + node->name); return; } } @@ -239,7 +239,8 @@ void check_memories_and_report_distribution() { long depth = get_sp_ram_depth(node); if (depth > shift_left_value_with_overflow_check(0x1, HARD_RAM_ADDR_LIMIT, node->loc)) - error_message(NETLIST, node->loc, "Memory %s of depth %zu exceeds ODIN depth bound of 2^%d.", node->name, depth, HARD_RAM_ADDR_LIMIT); + error_message(NETLIST, node->loc, "Memory %s of depth %zu exceeds ODIN depth bound of 2^%d.", node->name, + depth, HARD_RAM_ADDR_LIMIT); printf("SPRAM: %zu width %zu depth\n", width, depth); @@ -264,7 +265,8 @@ void check_memories_and_report_distribution() { long width = get_dp_ram_width(node); long depth = get_dp_ram_depth(node); if (depth > shift_left_value_with_overflow_check(0x1, HARD_RAM_ADDR_LIMIT, node->loc)) - error_message(NETLIST, node->loc, "Memory %s of depth %zu exceeds ODIN depth bound of 2^%d.", node->name, depth, HARD_RAM_ADDR_LIMIT); + error_message(NETLIST, node->loc, "Memory %s of depth %zu exceeds ODIN depth bound of 2^%d.", node->name, + depth, HARD_RAM_ADDR_LIMIT); printf("DPRAM: %zu width %zu depth\n", width, depth); total_memory_bits += width * depth; @@ -352,7 +354,8 @@ void split_sp_memory_depth(nnode_t* node, int split_size) { add_input_port_to_memory(new_mem_node1, we, "we"); free_signal_list(we); - nnode_t* not_g = make_not_gate_with_input(copy_input_npin(signals->addr->pins[0]), new_mem_node2, new_mem_node2->traverse_visited); + nnode_t* not_g = make_not_gate_with_input(copy_input_npin(signals->addr->pins[0]), new_mem_node2, + new_mem_node2->traverse_visited); and_g = make_2port_gate(LOGICAL_AND, 1, 1, 1, new_mem_node2, new_mem_node2->traverse_visited); connect_nodes(not_g, 0, and_g, 0); @@ -494,7 +497,8 @@ void split_dp_memory_depth(nnode_t* node, int split_size) { add_input_port_to_memory(new_mem_node1, we, "we2"); free_signal_list(we); - nnode_t* not_g = make_not_gate_with_input(copy_input_npin(signals->addr1->pins[0]), new_mem_node2, new_mem_node2->traverse_visited); + nnode_t* not_g = make_not_gate_with_input(copy_input_npin(signals->addr1->pins[0]), new_mem_node2, + new_mem_node2->traverse_visited); and_node = make_2port_gate(LOGICAL_AND, 1, 1, 1, new_mem_node2, new_mem_node2->traverse_visited); connect_nodes(not_g, 0, and_node, 0); add_input_pin_to_node(and_node, copy_input_npin(signals->we1), 1); @@ -503,7 +507,8 @@ void split_dp_memory_depth(nnode_t* node, int split_size) { add_input_port_to_memory(new_mem_node2, we, "we1"); free_signal_list(we); - not_g = make_not_gate_with_input(copy_input_npin(signals->addr2->pins[0]), new_mem_node2, new_mem_node2->traverse_visited); + not_g = make_not_gate_with_input(copy_input_npin(signals->addr2->pins[0]), new_mem_node2, + new_mem_node2->traverse_visited); and_node = make_2port_gate(LOGICAL_AND, 1, 1, 1, new_mem_node2, new_mem_node2->traverse_visited); connect_nodes(not_g, 0, and_node, 0); @@ -939,7 +944,8 @@ void filter_memories_by_soft_logic_cutoff() { long depth = get_sp_ram_depth(node); long width = get_sp_ram_width(node); - if (depth > configuration.soft_logic_memory_depth_threshold || width > configuration.soft_logic_memory_width_threshold) + if (depth > configuration.soft_logic_memory_depth_threshold + || width > configuration.soft_logic_memory_width_threshold) sp_memory_list = insert_in_vptr_list(sp_memory_list, node); } } @@ -955,7 +961,8 @@ void filter_memories_by_soft_logic_cutoff() { long depth = get_dp_ram_depth(node); long width = get_dp_ram_width(node); - if (depth > configuration.soft_logic_memory_depth_threshold || width > configuration.soft_logic_memory_width_threshold) + if (depth > configuration.soft_logic_memory_depth_threshold + || width > configuration.soft_logic_memory_width_threshold) dp_memory_list = insert_in_vptr_list(dp_memory_list, node); } } @@ -1210,7 +1217,8 @@ bool is_ast_sp_ram(ast_node_t* node) { for (int i = 0; i < connect_list->num_children && is_ram; i++) { char* id = connect_list->children[i]->identifier_node->types.identifier; - if ((strcmp(id, "we") != 0) && (strcmp(id, "clk") != 0) && (strcmp(id, "addr") != 0) && (strcmp(id, "data") != 0) && (strcmp(id, "out") != 0)) { + if ((strcmp(id, "we") != 0) && (strcmp(id, "clk") != 0) && (strcmp(id, "addr") != 0) + && (strcmp(id, "data") != 0) && (strcmp(id, "out") != 0)) { is_ram = false; break; } @@ -1232,7 +1240,9 @@ bool is_ast_dp_ram(ast_node_t* node) { for (int i = 0; i < connect_list->num_children && is_ram; i++) { char* id = connect_list->children[i]->identifier_node->types.identifier; - if ((strcmp(id, "clk") != 0) && (strcmp(id, "we1") != 0) && (strcmp(id, "we2") != 0) && (strcmp(id, "addr1") != 0) && (strcmp(id, "addr2") != 0) && (strcmp(id, "data1") != 0) && (strcmp(id, "data2") != 0) && (strcmp(id, "out1") != 0) && (strcmp(id, "out2") != 0)) { + if ((strcmp(id, "clk") != 0) && (strcmp(id, "we1") != 0) && (strcmp(id, "we2") != 0) + && (strcmp(id, "addr1") != 0) && (strcmp(id, "addr2") != 0) && (strcmp(id, "data1") != 0) + && (strcmp(id, "data2") != 0) && (strcmp(id, "out1") != 0) && (strcmp(id, "out2") != 0)) { is_ram = false; break; } @@ -1267,8 +1277,7 @@ sp_ram_signals* get_sp_ram_signals(nnode_t* node) { else if (!strcmp(pin->mapping, "clk")) signals->clk = pin; else - error_message(NETLIST, ast_node->loc, - "Unexpected input pin mapping \"%s\" on memory node: %s\n", + error_message(NETLIST, ast_node->loc, "Unexpected input pin mapping \"%s\" on memory node: %s\n", pin->mapping, node->name); } @@ -1283,8 +1292,7 @@ sp_ram_signals* get_sp_ram_signals(nnode_t* node) { if (!strcmp(pin->mapping, "out")) add_pin_to_signal_list(signals->out, pin); else - error_message(NETLIST, ast_node->loc, - "Unexpected output pin mapping \"%s\" on memory node: %s\n", + error_message(NETLIST, ast_node->loc, "Unexpected output pin mapping \"%s\" on memory node: %s\n", pin->mapping, node->name); } @@ -1336,8 +1344,7 @@ dp_ram_signals* get_dp_ram_signals(nnode_t* node) { else if (!strcmp(pin->mapping, "clk")) signals->clk = pin; else - error_message(NETLIST, ast_node->loc, - "Unexpected input pin mapping \"%s\" on memory node: %s\n", + error_message(NETLIST, ast_node->loc, "Unexpected input pin mapping \"%s\" on memory node: %s\n", pin->mapping, node->name); } @@ -1358,8 +1365,7 @@ dp_ram_signals* get_dp_ram_signals(nnode_t* node) { else if (!strcmp(pin->mapping, "out2")) add_pin_to_signal_list(signals->out2, pin); else - error_message(NETLIST, ast_node->loc, - "Unexpected output pin mapping \"%s\" on memory node: %s\n", + error_message(NETLIST, ast_node->loc, "Unexpected output pin mapping \"%s\" on memory node: %s\n", pin->mapping, node->name); } @@ -1399,11 +1405,8 @@ void instantiate_soft_single_port_ram(nnode_t* node, short mark, netlist_t* netl for (long i = 0; i < num_addr; i++) { npin_t* address_pin = decoder->pins[i]; /* Check that the input pin is driven */ - oassert( - address_pin->net->num_driver_pins - || address_pin->net == syn_netlist->zero_net - || address_pin->net == syn_netlist->one_net - || address_pin->net == syn_netlist->pad_net); + oassert(address_pin->net->num_driver_pins || address_pin->net == syn_netlist->zero_net + || address_pin->net == syn_netlist->one_net || address_pin->net == syn_netlist->pad_net); // An AND gate to enable and disable writing. nnode_t* and_g = make_1port_logic_gate(LOGICAL_AND, 2, node, mark); @@ -1427,11 +1430,8 @@ void instantiate_soft_single_port_ram(nnode_t* node, short mark, netlist_t* netl for (j = 0; j < num_addr; j++) { npin_t* address_pin = decoder->pins[j]; /* Check that the input pin is driven */ - oassert( - address_pin->net->num_driver_pins - || address_pin->net == syn_netlist->zero_net - || address_pin->net == syn_netlist->one_net - || address_pin->net == syn_netlist->pad_net); + oassert(address_pin->net->num_driver_pins || address_pin->net == syn_netlist->zero_net + || address_pin->net == syn_netlist->one_net || address_pin->net == syn_netlist->pad_net); // A multiplexer switches between accepting incoming data and keeping existing data. nnode_t* mux = make_2port_gate(MUX_2, 2, 2, 1, node, mark); @@ -1512,16 +1512,10 @@ void instantiate_soft_dual_port_ram(nnode_t* node, short mark, netlist_t* netlis npin_t* addr1_pin = decoder1->pins[i]; npin_t* addr2_pin = decoder2->pins[i]; - oassert( - addr1_pin->net->num_driver_pins - || addr1_pin->net == syn_netlist->zero_net - || addr1_pin->net == syn_netlist->one_net - || addr1_pin->net == syn_netlist->pad_net); - oassert( - addr2_pin->net->num_driver_pins - || addr2_pin->net == syn_netlist->zero_net - || addr2_pin->net == syn_netlist->one_net - || addr2_pin->net == syn_netlist->pad_net); + oassert(addr1_pin->net->num_driver_pins || addr1_pin->net == syn_netlist->zero_net + || addr1_pin->net == syn_netlist->one_net || addr1_pin->net == syn_netlist->pad_net); + oassert(addr2_pin->net->num_driver_pins || addr2_pin->net == syn_netlist->zero_net + || addr2_pin->net == syn_netlist->one_net || addr2_pin->net == syn_netlist->pad_net); // Write enable and gate for address 1. nnode_t* and1 = make_1port_logic_gate(LOGICAL_AND, 2, node, mark); @@ -1565,16 +1559,10 @@ void instantiate_soft_dual_port_ram(nnode_t* node, short mark, netlist_t* netlis npin_t* addr1_pin = decoder1->pins[j]; npin_t* addr2_pin = decoder2->pins[j]; - oassert( - addr1_pin->net->num_driver_pins - || addr1_pin->net == syn_netlist->zero_net - || addr1_pin->net == syn_netlist->one_net - || addr1_pin->net == syn_netlist->pad_net); - oassert( - addr2_pin->net->num_driver_pins - || addr2_pin->net == syn_netlist->zero_net - || addr2_pin->net == syn_netlist->one_net - || addr2_pin->net == syn_netlist->pad_net); + oassert(addr1_pin->net->num_driver_pins || addr1_pin->net == syn_netlist->zero_net + || addr1_pin->net == syn_netlist->one_net || addr1_pin->net == syn_netlist->pad_net); + oassert(addr2_pin->net->num_driver_pins || addr2_pin->net == syn_netlist->zero_net + || addr2_pin->net == syn_netlist->one_net || addr2_pin->net == syn_netlist->pad_net); // The data mux selects between the two data lines for this address. nnode_t* data_mux = make_2port_gate(MUX_2, 2, 2, 1, node, mark); @@ -1659,7 +1647,10 @@ void instantiate_soft_dual_port_ram(nnode_t* node, short mark, netlist_t* netlis signal_list_t* create_decoder(nnode_t* node, short mark, signal_list_t* input_list) { long num_inputs = input_list->count; if (num_inputs > SOFT_RAM_ADDR_LIMIT) - error_message(NETLIST, node->loc, "Memory %s of depth 2^%ld exceeds ODIN bound of 2^%d.\nMust use an FPGA architecture that contains embedded hard block memories", node->name, num_inputs, SOFT_RAM_ADDR_LIMIT); + error_message(NETLIST, node->loc, + "Memory %s of depth 2^%ld exceeds ODIN bound of 2^%d.\nMust use an FPGA architecture that " + "contains embedded hard block memories", + node->name, num_inputs, SOFT_RAM_ADDR_LIMIT); // Number of outputs is 2^num_inputs long num_outputs = shift_left_value_with_overflow_check(0x1, num_inputs, node->loc); @@ -1667,11 +1658,10 @@ signal_list_t* create_decoder(nnode_t* node, short mark, signal_list_t* input_li // Create NOT gates for all inputs and put the outputs in their own signal list. signal_list_t* not_gates = init_signal_list(); for (long i = 0; i < num_inputs; i++) { - if (!input_list->pins[i]->net->num_driver_pins - && input_list->pins[i]->net != syn_netlist->zero_net - && input_list->pins[i]->net != syn_netlist->one_net - && input_list->pins[i]->net != syn_netlist->pad_net) { - warning_message(NETLIST, node->loc, "Signal %s is not driven. padding with ground\n", input_list->pins[i]->name); + if (!input_list->pins[i]->net->num_driver_pins && input_list->pins[i]->net != syn_netlist->zero_net + && input_list->pins[i]->net != syn_netlist->one_net && input_list->pins[i]->net != syn_netlist->pad_net) { + warning_message(NETLIST, node->loc, "Signal %s is not driven. padding with ground\n", + input_list->pins[i]->name); add_fanout_pin_to_net(syn_netlist->zero_net, input_list->pins[i]); } diff --git a/odin_ii/src/core/multipliers.cpp b/odin_ii/src/core/multipliers.cpp index a14eaa86781..0112c92fe09 100644 --- a/odin_ii/src/core/multipliers.cpp +++ b/odin_ii/src/core/multipliers.cpp @@ -52,7 +52,14 @@ int min_mult = 0; int* mults = NULL; void record_mult_distribution(nnode_t* node); -void init_split_multiplier(nnode_t* node, nnode_t* ptr, int offa, int a, int offb, int b, nnode_t* node_a, nnode_t* node_b); +void init_split_multiplier(nnode_t* node, + nnode_t* ptr, + int offa, + int a, + int offb, + int b, + nnode_t* node_a, + nnode_t* node_b); void init_multiplier_adder(nnode_t* node, nnode_t* parent, int a, int b); void split_multiplier_a(nnode_t* node, int a0, int a1, int b); void split_multiplier_b(nnode_t* node, int a, int b1, int b0); @@ -129,7 +136,8 @@ void instantiate_simple_soft_multiplier(nnode_t* node, short mark, netlist_t* ne partial_products[i] = (nnode_t**)vtr::malloc(sizeof(nnode_t*) * multiplier_width); if (i < multiplicand_width - 1) { - adders_for_partial_products[i] = make_2port_gate(ADD, multiplier_width + 1, multiplier_width + 1, multiplier_width + 1, node, mark); + adders_for_partial_products[i] + = make_2port_gate(ADD, multiplier_width + 1, multiplier_width + 1, multiplier_width + 1, node, mark); } for (j = 0; j < multiplier_width; j++) { @@ -147,7 +155,8 @@ void instantiate_simple_soft_multiplier(nnode_t* node, short mark, netlist_t* ne remap_pin_to_new_node(node->input_pins[i + multiplicand_offset_index], partial_products[i][j], 0); } else { /* ELSE - this needs to be a new output of the multiplicand port */ - add_input_pin_to_node(partial_products[i][j], copy_input_npin(partial_products[i][0]->input_pins[0]), 0); + add_input_pin_to_node(partial_products[i][j], copy_input_npin(partial_products[i][0]->input_pins[0]), + 0); } /* hookup the input of the multiplier to each AND gate */ @@ -156,13 +165,15 @@ void instantiate_simple_soft_multiplier(nnode_t* node, short mark, netlist_t* ne remap_pin_to_new_node(node->input_pins[j + multiplier_offset_index], partial_products[i][j], 1); } else { /* ELSE - this needs to be a new output of the multiplier port */ - add_input_pin_to_node(partial_products[i][j], copy_input_npin(partial_products[0][j]->input_pins[1]), 1); + add_input_pin_to_node(partial_products[i][j], copy_input_npin(partial_products[0][j]->input_pins[1]), + 1); } } } /* hookup each of the adders */ - for (i = 0; i < multiplicand_width - 1; i++) // -1 since the first stage is a combo of partial products while all others are part of tree + for (i = 0; i < multiplicand_width - 1; + i++) // -1 since the first stage is a combo of partial products while all others are part of tree { for (j = 0; j < multiplier_width + 1; j++) // +1 since adders are one greater than multwidth to pass carry { @@ -214,7 +225,8 @@ void instantiate_simple_soft_multiplier(nnode_t* node, short mark, netlist_t* ne remap_pin_to_new_node(node->output_pins[i], buf_node, 0); } else { /* ELSE - the final outputs are straight from the outputs of the last adder */ - remap_pin_to_new_node(node->output_pins[i], adders_for_partial_products[multiplicand_width - 2], current_index); + remap_pin_to_new_node(node->output_pins[i], adders_for_partial_products[multiplicand_width - 2], + current_index); } current_index++; } @@ -353,8 +365,7 @@ void declare_hard_multiplier(nnode_t* node) { * (function: instantiate_hard_multiplier ) *-------------------------------------------------------------------------*/ void instantiate_hard_multiplier(nnode_t* node, short mark, netlist_t* /*netlist*/) { - oassert(node - && "node is NULL to instantiate hard multiplier"); + oassert(node && "node is NULL to instantiate hard multiplier"); declare_hard_multiplier(node); @@ -373,8 +384,9 @@ void instantiate_hard_multiplier(nnode_t* node, short mark, netlist_t* /*netlist portA = 1; portB = 0; } - std::string tmp( - node_name + "_" + std::to_string(node->input_port_sizes[portA]) + "_" + std::to_string(node->input_port_sizes[portB]) + "_" + std::to_string(node->output_port_sizes[0])); + std::string tmp(node_name + "_" + std::to_string(node->input_port_sizes[portA]) + "_" + + std::to_string(node->input_port_sizes[portB]) + "_" + + std::to_string(node->output_port_sizes[0])); node->name = vtr::strdup(tmp.c_str()); } else { /* Give names to the output pins */ @@ -383,8 +395,7 @@ void instantiate_hard_multiplier(nnode_t* node, short mark, netlist_t* /*netlist vtr::free(node->output_pins[i]->name); } //build the output string - std::string tmp( - node_name + "[" + std::to_string(node->output_pins[i]->pin_node_idx) + "]"); + std::string tmp(node_name + "[" + std::to_string(node->output_pins[i]->pin_node_idx) + "]"); node->output_pins[i]->name = vtr::strdup(tmp.c_str()); } node->name = vtr::strdup(node->output_pins[node->num_output_pins - 1]->name); @@ -487,13 +498,13 @@ void define_mult_function(nnode_t* node, FILE* out) { count += fprintf(out, " multiply"); } else { if (node->input_port_sizes[0] > node->input_port_sizes[1]) { - count += fprintf(out, " mult_%d_%d_%d", node->input_port_sizes[0], - node->input_port_sizes[1], node->output_port_sizes[0]); + count += fprintf(out, " mult_%d_%d_%d", node->input_port_sizes[0], node->input_port_sizes[1], + node->output_port_sizes[0]); flip = false; } else { - count += fprintf(out, " mult_%d_%d_%d", node->input_port_sizes[1], - node->input_port_sizes[0], node->output_port_sizes[0]); + count += fprintf(out, " mult_%d_%d_%d", node->input_port_sizes[1], node->input_port_sizes[0], + node->output_port_sizes[0]); flip = true; } @@ -507,7 +518,8 @@ void define_mult_function(nnode_t* node, FILE* out) { npin_t* driver_pin = net->driver_pins[0]; if (!driver_pin->name) - j = odin_sprintf(buffer, " %s[%ld]=%s", hard_multipliers->inputs->next->name, i, driver_pin->node->name); + j = odin_sprintf(buffer, " %s[%ld]=%s", hard_multipliers->inputs->next->name, i, + driver_pin->node->name); else j = odin_sprintf(buffer, " %s[%ld]=%s", hard_multipliers->inputs->next->name, i, driver_pin->name); } else { @@ -516,9 +528,7 @@ void define_mult_function(nnode_t* node, FILE* out) { oassert(net->num_driver_pins == 1); npin_t* driver_pin = net->driver_pins[0]; - long index = flip - ? i - node->input_port_sizes[1] - : i - node->input_port_sizes[0]; + long index = flip ? i - node->input_port_sizes[1] : i - node->input_port_sizes[0]; if (!driver_pin->name) j = odin_sprintf(buffer, " %s[%ld]=%s", hard_multipliers->inputs->name, index, driver_pin->node->name); @@ -552,7 +562,14 @@ void define_mult_function(nnode_t* node, FILE* out) { * to original pins, output pins are set to NULL for later connecting * with temp pins to connect cascading multipliers/adders. *---------------------------------------------------------------------*/ -void init_split_multiplier(nnode_t* node, nnode_t* ptr, int offa, int a, int offb, int b, nnode_t* node_a, nnode_t* node_b) { +void init_split_multiplier(nnode_t* node, + nnode_t* ptr, + int offa, + int a, + int offb, + int b, + nnode_t* node_a, + nnode_t* node_b) { int i; /* Copy properties from original node */ @@ -717,7 +734,8 @@ void split_multiplier(nnode_t* node, int a0, int b0, int a1, int b1, netlist_t* addbig->name = (char*)vtr::malloc(strlen(node->name) + 6); strcpy(addbig->name, node->name); strcat(addbig->name, "-add1"); - init_multiplier_adder(addbig, addsmall, addsmall->num_output_pins, a0b0->num_output_pins - b0 + a1b1->num_output_pins); + init_multiplier_adder(addbig, addsmall, addsmall->num_output_pins, + a0b0->num_output_pins - b0 + a1b1->num_output_pins); // connect inputs to port a of addsmall for (i = 0; i < a1b0->num_output_pins; i++) @@ -1157,7 +1175,8 @@ void split_soft_multiplier(nnode_t* node, netlist_t* netlist) { remap_pin_to_new_node(node->input_pins[j], partial_products[i][j], 1); } else { // this input was remapped before, copy from the AND gate input instead - add_input_pin_to_node(partial_products[i][j], copy_input_npin(partial_products[0][j]->input_pins[1]), 1); + add_input_pin_to_node(partial_products[i][j], copy_input_npin(partial_products[0][j]->input_pins[1]), + 1); } // hookup the input multiplicand bits the AND gates if (j == 0) { @@ -1165,7 +1184,8 @@ void split_soft_multiplier(nnode_t* node, netlist_t* netlist) { remap_pin_to_new_node(node->input_pins[i + node->input_port_sizes[0]], partial_products[i][j], 0); } else { // this input was remapped before, copy from the AND gate input instead - add_input_pin_to_node(partial_products[i][j], copy_input_npin(partial_products[i][0]->input_pins[0]), 0); + add_input_pin_to_node(partial_products[i][j], copy_input_npin(partial_products[i][0]->input_pins[0]), + 0); } } } @@ -1186,16 +1206,20 @@ void split_soft_multiplier(nnode_t* node, netlist_t* netlist) { auto add_id = row / 2; // get the widths of the adder, by finding the larger operand size - adder_widths[level][add_id] = std::max(first_row.bits.size() - shift_difference, second_row.bits.size()); + adder_widths[level][add_id] + = std::max(first_row.bits.size() - shift_difference, second_row.bits.size()); // first level of addition has a carry out that needs to be generated, so increase adder size by 1 - if (level == 0) adder_widths[level][add_id]++; + if (level == 0) + adder_widths[level][add_id]++; // add one bit for carry out if that last bit of the addition is fed by both levels // (was found to be the only case were a carry out will be needed in this multiplier adder tree) - if (first_row.bits.size() - shift_difference == second_row.bits.size()) adder_widths[level][add_id]++; + if (first_row.bits.size() - shift_difference == second_row.bits.size()) + adder_widths[level][add_id]++; // initialize this adder adders[level][add_id] = allocate_nnode(node->loc); - init_multiplier_adder(adders[level][add_id], node, adder_widths[level][add_id], adder_widths[level][add_id]); + init_multiplier_adder(adders[level][add_id], node, adder_widths[level][add_id], + adder_widths[level][add_id]); adders[level][add_id]->name = node_name(adders[level][add_id], node->name); // initialize the output of this adder in the next stage @@ -1222,10 +1246,12 @@ void split_soft_multiplier(nnode_t* node, netlist_t* netlist) { } // input port b of the adder if (bit < second_row.bits.size()) { - connect_nodes(second_row.bits[bit].first, second_row.bits[bit].second, adders[level][add_id], bit + adder_widths[level][add_id]); + connect_nodes(second_row.bits[bit].first, second_row.bits[bit].second, adders[level][add_id], + bit + adder_widths[level][add_id]); } else { // connect additional inputs to gnd - add_input_pin_to_node(adders[level][add_id], get_zero_pin(netlist), bit + adder_widths[level][add_id]); + add_input_pin_to_node(adders[level][add_id], get_zero_pin(netlist), + bit + adder_widths[level][add_id]); } } } @@ -1288,8 +1314,7 @@ void split_soft_multiplier(nnode_t* node, netlist_t* netlist) { bool is_ast_multiplier(ast_node_t* node) { bool is_mult; ast_node_t* instance = node->children[0]; - is_mult = (!strcmp(node->children[0]->types.identifier, "multiply")) - && (instance->children[0]->num_children == 3); + is_mult = (!strcmp(node->children[0]->types.identifier, "multiply")) && (instance->children[0]->num_children == 3); ast_node_t* connect_list = instance->children[0]; if (is_mult && connect_list->children[0]->identifier_node) { diff --git a/odin_ii/src/core/odin_ii.cpp b/odin_ii/src/core/odin_ii.cpp index 415f89a84b6..f7d2d2202f4 100644 --- a/odin_ii/src/core/odin_ii.cpp +++ b/odin_ii/src/core/odin_ii.cpp @@ -150,7 +150,8 @@ static void optimization() { //END ################# NETLIST OPTIMIZATION ############################ if (configuration.output_netlist_graphs) - graphVizOutputNetlist(configuration.debug_output_path, "optimized", 2, syn_netlist); /* Path is where we are */ + graphVizOutputNetlist(configuration.debug_output_path, "optimized", 2, + syn_netlist); /* Path is where we are */ } optimization_time = wall_time() - optimization_time; @@ -218,7 +219,8 @@ static ODIN_ERROR_CODE synthesize() { elaborate(); printf("Successful Elaboration of the design by Odin-II\n"); } catch (vtr::VtrError& vtr_error) { - printf("Odin-II Failed to parse Verilog / load BLIF file: %s with exit code:%d \n", vtr_error.what(), ERROR_ELABORATION); + printf("Odin-II Failed to parse Verilog / load BLIF file: %s with exit code:%d \n", vtr_error.what(), + ERROR_ELABORATION); exit(ERROR_ELABORATION); } @@ -227,7 +229,8 @@ static ODIN_ERROR_CODE synthesize() { optimization(); printf("Successful Optimization of netlist by Odin-II\n"); } catch (vtr::VtrError& vtr_error) { - printf("Odin-II Failed to perform netlist optimization %s with exit code:%d \n", vtr_error.what(), ERROR_OPTIMIZATION); + printf("Odin-II Failed to perform netlist optimization %s with exit code:%d \n", vtr_error.what(), + ERROR_OPTIMIZATION); exit(ERROR_OPTIMIZATION); } @@ -236,7 +239,8 @@ static ODIN_ERROR_CODE synthesize() { techmap(); printf("Successful Partial Technology Mapping by Odin-II\n"); } catch (vtr::VtrError& vtr_error) { - printf("Odin-II Failed to perform partial mapping to target device %s with exit code:%d \n", vtr_error.what(), ERROR_TECHMAP); + printf("Odin-II Failed to perform partial mapping to target device %s with exit code:%d \n", vtr_error.what(), + ERROR_TECHMAP); exit(ERROR_TECHMAP); } /*take the synthsis time before outputting netlist */ @@ -286,10 +290,12 @@ netlist_t* start_odin_ii(int argc, char** argv) { create_directory(configuration.debug_output_path); } catch (vtr::VtrError& vtr_error) { - printf("Odin Failed Reading The command line arguments %s with exit code%d\n", vtr_error.what(), ERROR_PARSE_ARGS); + printf("Odin Failed Reading The command line arguments %s with exit code%d\n", vtr_error.what(), + ERROR_PARSE_ARGS); exit(ERROR_PARSE_ARGS); } catch (argparse::ArgParseError& arg_error) { - printf("Odin Failed Reading The command line arguments %s with exit code%d\n", arg_error.what(), ERROR_PARSE_ARGS); + printf("Odin Failed Reading The command line arguments %s with exit code%d\n", arg_error.what(), + ERROR_PARSE_ARGS); exit(ERROR_PARSE_ARGS); } @@ -299,7 +305,8 @@ netlist_t* start_odin_ii(int argc, char** argv) { try { read_config_file(global_args.config_file.value().c_str()); } catch (vtr::VtrError& vtr_error) { - printf("Odin Failed Reading Configuration file %s with exit code%d\n", vtr_error.what(), ERROR_PARSE_CONFIG); + printf("Odin Failed Reading Configuration file %s with exit code%d\n", vtr_error.what(), + ERROR_PARSE_CONFIG); exit(ERROR_PARSE_CONFIG); } } @@ -332,7 +339,8 @@ netlist_t* start_odin_ii(int argc, char** argv) { error_code = synthesize(); printf("odin_ii synthesis has finished with code: %d\n", error_code); } catch (vtr::VtrError& vtr_error) { - printf("Odin Failed to Synthesis for the file: %s with exit code:%d \n", vtr_error.what(), ERROR_SYNTHESIS); + printf("Odin Failed to Synthesis for the file: %s with exit code:%d \n", vtr_error.what(), + ERROR_SYNTHESIS); exit(ERROR_SYNTHESIS); } } @@ -345,8 +353,7 @@ netlist_t* start_odin_ii(int argc, char** argv) { */ netlist_t* sim_netlist = NULL; if ((global_args.blif_file.provenance() == argparse::Provenance::SPECIFIED && !coarsen_cleanup) - || global_args.interactive_simulation - || global_args.sim_num_test_vectors + || global_args.interactive_simulation || global_args.sim_num_test_vectors || global_args.sim_vector_input_file.provenance() == argparse::Provenance::SPECIFIED) { configuration.input_file_type = file_type_e::BLIF; @@ -373,7 +380,8 @@ netlist_t* start_odin_ii(int argc, char** argv) { /* Simulate netlist */ if (sim_netlist && !global_args.interactive_simulation - && (global_args.sim_num_test_vectors || (global_args.sim_vector_input_file.provenance() == argparse::Provenance::SPECIFIED))) { + && (global_args.sim_num_test_vectors + || (global_args.sim_vector_input_file.provenance() == argparse::Provenance::SPECIFIED))) { printf("Netlist Simulation Begin\n"); create_directory(global_args.sim_directory); @@ -415,7 +423,8 @@ struct ParseInitRegState { else if (str == "X") return -1; std::stringstream msg; - msg << "Invalid conversion from '" << str << "' (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str << "' (expected one of: " << argparse::join(default_choices(), ", ") + << ")"; throw argparse::ArgParseConversionError(msg.str()); } @@ -431,9 +440,7 @@ struct ParseInitRegState { throw argparse::ArgParseConversionError(msg.str()); } - std::vector default_choices() { - return {"0", "1", "X"}; - } + std::vector default_choices() { return {"0", "1", "X"}; } }; /*--------------------------------------------------------------------------------------------- @@ -451,23 +458,16 @@ void get_options(int argc, char** argv) { auto& input_grp = parser.add_argument_group("input files"); - input_grp.add_argument(global_args.config_file, "-c") - .help("Configuration file") - .metavar("XML_CONFIGURATION_FILE"); + input_grp.add_argument(global_args.config_file, "-c").help("Configuration file").metavar("XML_CONFIGURATION_FILE"); input_grp.add_argument(global_args.input_files, "-v") .help("List of Verilog HDL file") .nargs('+') .metavar("VERILOG_FILE"); - input_grp.add_argument(global_args.blif_file, "-b") - .help("BLIF file") - .metavar("BLIF_FILE"); + input_grp.add_argument(global_args.blif_file, "-b").help("BLIF file").metavar("BLIF_FILE"); - input_grp.add_argument(global_args.input_files, "-V") - .help("DEPRECATED") - .nargs('+') - .metavar("N/A"); + input_grp.add_argument(global_args.input_files, "-V").help("DEPRECATED").nargs('+').metavar("N/A"); auto& output_grp = parser.add_argument_group("output files"); @@ -518,7 +518,9 @@ void get_options(int argc, char** argv) { .metavar("N/A"); other_grp.add_argument(global_args.adder_cin_global, "--adder_cin_global") - .help("Defines if the first cin of an adder/subtractor is connected to a global gnd/vdd instead of a dummy adder generating a gnd/vdd.") + .help( + "Defines if the first cin of an adder/subtractor is connected to a global gnd/vdd instead of a dummy adder " + "generating a gnd/vdd.") .default_value("false") .action(argparse::Action::STORE_TRUE); @@ -541,10 +543,7 @@ void get_options(int argc, char** argv) { .default_value("false") .action(argparse::Action::STORE_TRUE); - rand_sim_grp.add_argument(global_args.sim_random_seed, "-r") - .help("Random seed") - .default_value("0") - .metavar("SEED"); + rand_sim_grp.add_argument(global_args.sim_random_seed, "-r").help("Random seed").default_value("0").metavar("SEED"); rand_sim_grp.add_argument(global_args.sim_hold_low, "-L") .help("list of primary inputs to hold high at cycle 0, and low for all subsequent cycles") @@ -671,7 +670,8 @@ void get_options(int argc, char** argv) { int max_thread = std::thread::hardware_concurrency(); global_args.parralelized_simulation.set( - std::max(1, std::min(thread_requested, std::min((CONCURENCY_LIMIT - 1), max_thread))), argparse::Provenance::SPECIFIED); + std::max(1, std::min(thread_requested, std::min((CONCURENCY_LIMIT - 1), max_thread))), + argparse::Provenance::SPECIFIED); //Allow some config values to be overriden from command line if (!global_args.input_files.value().empty()) { diff --git a/odin_ii/src/core/odin_memory.h b/odin_ii/src/core/odin_memory.h index f681ba5e50a..f8764a713c9 100644 --- a/odin_ii/src/core/odin_memory.h +++ b/odin_ii/src/core/odin_memory.h @@ -35,9 +35,9 @@ #include "odin_error.h" #ifndef __GLIBC__ -# include +#include #else -# include +#include #endif namespace odin { @@ -48,15 +48,12 @@ char* strdup(const char* in); template void free(T** ptr_ref) { - oassert(ptr_ref != NULL - && "did not pass in a valid ref"); + oassert(ptr_ref != NULL && "did not pass in a valid ref"); T* ptr = (*ptr_ref); (*ptr_ref) = NULL; - if (ptr != NULL - && (uintptr_t)ptr >= min_address - && (uintptr_t)ptr <= max_address) { + if (ptr != NULL && (uintptr_t)ptr >= min_address && (uintptr_t)ptr <= max_address) { std::free(ptr); } } @@ -80,8 +77,7 @@ void* calloc(T _n_element, S _element_size) { if (n_bytes > 0) { ret = std::calloc(n_bytes, 1); - oassert(ret != NULL - && "odin::calloc failed, OOM?"); + oassert(ret != NULL && "odin::calloc failed, OOM?"); } if (ret != NULL) { @@ -100,8 +96,7 @@ void* malloc(T _n_bytes) { template void realloc(T** ptr_ref, S _n_bytes) { - oassert(ptr_ref != NULL - && "did not pass in a valid ref"); + oassert(ptr_ref != NULL && "did not pass in a valid ref"); T* ptr = (*ptr_ref); (*ptr_ref) = NULL; @@ -111,13 +106,10 @@ void realloc(T** ptr_ref, S _n_bytes) { n_bytes = static_cast(_n_bytes); } - if (ptr != NULL - && (uintptr_t)ptr >= min_address - && (uintptr_t)ptr <= max_address) { + if (ptr != NULL && (uintptr_t)ptr >= min_address && (uintptr_t)ptr <= max_address) { if (n_bytes > 0) { ptr = (T*)std::realloc(ptr, n_bytes); - oassert(ptr != NULL - && "odin::realloc failed, OOM?"); + oassert(ptr != NULL && "odin::realloc failed, OOM?"); } else { free(&ptr); } diff --git a/odin_ii/src/core/subtractions.cpp b/odin_ii/src/core/subtractions.cpp index 21dce7ae95a..684a7c379a4 100644 --- a/odin_ii/src/core/subtractions.cpp +++ b/odin_ii/src/core/subtractions.cpp @@ -44,7 +44,16 @@ t_linked_vptr* sub_chain_list = NULL; int subchaintotal = 0; int* sub = NULL; -void init_split_adder_for_sub(nnode_t* node, nnode_t* ptr, int a, int sizea, int b, int sizeb, int cin, int cout, int index, int flag); +void init_split_adder_for_sub(nnode_t* node, + nnode_t* ptr, + int a, + int sizea, + int b, + int sizeb, + int cin, + int cout, + int index, + int flag); static void cleanup_sub_old_node(nnode_t* nodeo, netlist_t* netlist); /*--------------------------------------------------------------------------- @@ -158,7 +167,16 @@ void instantiate_hard_adder_subtraction(nnode_t* node, short mark, netlist_t* /* * Create a carry chain adder when spliting. Inputs are connected * to original pins, output pins are set to NULL for later connecting *---------------------------------------------------------------------*/ -void init_split_adder_for_sub(nnode_t* node, nnode_t* ptr, int a, int sizea, int b, int sizeb, int cin, int cout, int index, int flag) { +void init_split_adder_for_sub(nnode_t* node, + nnode_t* ptr, + int a, + int sizea, + int b, + int sizeb, + int cin, + int cout, + int index, + int flag) { int i; int flaga = 0; int current_sizea, current_sizeb; @@ -324,7 +342,15 @@ void init_split_adder_for_sub(nnode_t* node, nnode_t* ptr, int a, int sizea, int * extending NOT contracting. *-----------------------------------------------------------------------*/ -void split_adder_for_sub(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int cin, int cout, int count, netlist_t* netlist) { +void split_adder_for_sub(nnode_t* nodeo, + int a, + int b, + int sizea, + int sizeb, + int cin, + int cout, + int count, + netlist_t* netlist) { nnode_t** node; nnode_t** not_node; int i, j; @@ -414,11 +440,13 @@ void split_adder_for_sub(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int oassert(not_node[i]->input_pins[0]->net->num_driver_pins == 1); if (not_node[i]->input_pins[0]->net->driver_pins[0]->node->type == GND_NODE) { connect_nodes(netlist->vcc_node, 0, node[0], (lefta + i)); - remove_fanout_pins_from_net(not_node[i]->input_pins[0]->net, not_node[i]->input_pins[0], not_node[i]->input_pins[0]->pin_net_idx); + remove_fanout_pins_from_net(not_node[i]->input_pins[0]->net, not_node[i]->input_pins[0], + not_node[i]->input_pins[0]->pin_net_idx); free_nnode(not_node[i]); } else if (not_node[i]->input_pins[0]->net->driver_pins[0]->node->type == VCC_NODE) { connect_nodes(netlist->gnd_node, 0, node[0], (lefta + i)); - remove_fanout_pins_from_net(not_node[i]->input_pins[0]->net, not_node[i]->input_pins[0], not_node[i]->input_pins[0]->pin_net_idx); + remove_fanout_pins_from_net(not_node[i]->input_pins[0]->net, not_node[i]->input_pins[0], + not_node[i]->input_pins[0]->pin_net_idx); free_nnode(not_node[i]); } else connect_nodes(not_node[i], 0, node[0], (lefta + i)); @@ -440,11 +468,13 @@ void split_adder_for_sub(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int oassert(not_node[i]->input_pins[0]->net->num_driver_pins == 1); if (not_node[i]->input_pins[0]->net->driver_pins[0]->node->type == GND_NODE) { connect_nodes(netlist->vcc_node, 0, node[0], (sizea + i + 1)); - remove_fanout_pins_from_net(not_node[i]->input_pins[0]->net, not_node[i]->input_pins[0], not_node[i]->input_pins[0]->pin_net_idx); + remove_fanout_pins_from_net(not_node[i]->input_pins[0]->net, not_node[i]->input_pins[0], + not_node[i]->input_pins[0]->pin_net_idx); free_nnode(not_node[i]); } else if (not_node[i]->input_pins[0]->net->driver_pins[0]->node->type == VCC_NODE) { connect_nodes(netlist->gnd_node, 0, node[0], (sizea + i + 1)); - remove_fanout_pins_from_net(not_node[i]->input_pins[0]->net, not_node[i]->input_pins[0], not_node[i]->input_pins[0]->pin_net_idx); + remove_fanout_pins_from_net(not_node[i]->input_pins[0]->net, not_node[i]->input_pins[0], + not_node[i]->input_pins[0]->pin_net_idx); free_nnode(not_node[i]); } else connect_nodes(not_node[i], 0, node[0], (sizea + i + 1)); @@ -467,11 +497,16 @@ void split_adder_for_sub(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int oassert(not_node[(i * sizeb + j - 1)]->input_pins[0]->net->num_driver_pins == 1); if (not_node[(i * sizeb + j - 1)]->input_pins[0]->net->driver_pins[0]->node->type == GND_NODE) { connect_nodes(netlist->vcc_node, 0, node[i], (lefta + j)); - remove_fanout_pins_from_net(not_node[(i * sizeb + j - 1)]->input_pins[0]->net, not_node[(i * sizeb + j - 1)]->input_pins[0], not_node[(i * sizeb + j - 1)]->input_pins[0]->pin_net_idx); + remove_fanout_pins_from_net(not_node[(i * sizeb + j - 1)]->input_pins[0]->net, + not_node[(i * sizeb + j - 1)]->input_pins[0], + not_node[(i * sizeb + j - 1)]->input_pins[0]->pin_net_idx); free_nnode(not_node[(i * sizeb + j - 1)]); - } else if (not_node[(i * sizeb + j - 1)]->input_pins[0]->net->driver_pins[0]->node->type == VCC_NODE) { + } else if (not_node[(i * sizeb + j - 1)]->input_pins[0]->net->driver_pins[0]->node->type + == VCC_NODE) { connect_nodes(netlist->gnd_node, 0, node[i], (lefta + j)); - remove_fanout_pins_from_net(not_node[(i * sizeb + j - 1)]->input_pins[0]->net, not_node[(i * sizeb + j - 1)]->input_pins[0], not_node[(i * sizeb + j - 1)]->input_pins[0]->pin_net_idx); + remove_fanout_pins_from_net(not_node[(i * sizeb + j - 1)]->input_pins[0]->net, + not_node[(i * sizeb + j - 1)]->input_pins[0], + not_node[(i * sizeb + j - 1)]->input_pins[0]->pin_net_idx); free_nnode(not_node[(i * sizeb + j - 1)]); } else connect_nodes(not_node[(i * sizeb + j - 1)], 0, node[i], (lefta + j)); @@ -487,11 +522,13 @@ void split_adder_for_sub(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int oassert(not_node[index]->input_pins[0]->net->num_driver_pins == 1); if (not_node[index]->input_pins[0]->net->driver_pins[0]->node->type == GND_NODE) { connect_nodes(netlist->vcc_node, 0, node[i], (sizea + j)); - remove_fanout_pins_from_net(not_node[index]->input_pins[0]->net, not_node[index]->input_pins[0], not_node[index]->input_pins[0]->pin_net_idx); + remove_fanout_pins_from_net(not_node[index]->input_pins[0]->net, not_node[index]->input_pins[0], + not_node[index]->input_pins[0]->pin_net_idx); free_nnode(not_node[index]); } else if (not_node[index]->input_pins[0]->net->driver_pins[0]->node->type == VCC_NODE) { connect_nodes(netlist->gnd_node, 0, node[i], (sizea + j)); - remove_fanout_pins_from_net(not_node[index]->input_pins[0]->net, not_node[index]->input_pins[0], not_node[index]->input_pins[0]->pin_net_idx); + remove_fanout_pins_from_net(not_node[index]->input_pins[0]->net, not_node[index]->input_pins[0], + not_node[index]->input_pins[0]->pin_net_idx); free_nnode(not_node[index]); } else connect_nodes(not_node[index], 0, node[i], (sizea + j)); @@ -564,14 +601,16 @@ void split_adder_for_sub(nnode_t* nodeo, int a, int b, int sizea, int sizeb, int else { node[i]->output_pins[j + 1] = allocate_npin(); // Pad outputs with a unique and descriptive name to avoid collisions. - node[i]->output_pins[j + 1]->name = append_string("", "%s~dummy_output~%d~%d", node[i]->name, i, j + 2); + node[i]->output_pins[j + 1]->name + = append_string("", "%s~dummy_output~%d~%d", node[i]->name, i, j + 2); } } } } node[count - 1]->output_pins[0] = allocate_npin(); // Pad outputs with a unique and descriptive name to avoid collisions. - node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); + node[count - 1]->output_pins[0]->name + = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); //connect_nodes(node[count - 1], (node[(count - 1)]->num_output_pins - 1), netlist->gnd_node, 0); //} diff --git a/odin_ii/src/core/subtractions.h b/odin_ii/src/core/subtractions.h index 98874502093..95ffd387a04 100644 --- a/odin_ii/src/core/subtractions.h +++ b/odin_ii/src/core/subtractions.h @@ -35,7 +35,15 @@ extern vtr::t_linked_vptr* sub_chain_list; extern void report_sub_distribution(); extern void declare_hard_adder_for_sub(nnode_t* node); extern void instantiate_hard_adder_subtraction(nnode_t* node, short mark, netlist_t* netlist); -extern void split_adder_for_sub(nnode_t* node, int a, int b, int sizea, int sizeb, int cin, int cout, int count, netlist_t* netlist); +extern void split_adder_for_sub(nnode_t* node, + int a, + int b, + int sizea, + int sizeb, + int cin, + int cout, + int count, + netlist_t* netlist); extern void iterate_adders_for_sub(netlist_t* netlist); extern void instantiate_sub_w_borrow_block(nnode_t* node, short traverse_mark_number, netlist_t* netlist); extern void clean_adders_for_sub(); diff --git a/odin_ii/src/generic/generic_io.cpp b/odin_ii/src/generic/generic_io.cpp index 73604b088df..6b494af6ffa 100644 --- a/odin_ii/src/generic/generic_io.cpp +++ b/odin_ii/src/generic/generic_io.cpp @@ -32,16 +32,19 @@ generic_io::~generic_io() = default; void* generic_io::_read() { error_message(UTIL, unknown_location, - "Function \"%s\" is called for reading the input file without definition provided!\n", __PRETTY_FUNCTION__); + "Function \"%s\" is called for reading the input file without definition provided!\n", + __PRETTY_FUNCTION__); return NULL; } void generic_io::_write(const netlist_t* /* netlist */) { error_message(UTIL, unknown_location, - "Function \"%s\" is called for reading the input file without definition provided!\n", __PRETTY_FUNCTION__); + "Function \"%s\" is called for reading the input file without definition provided!\n", + __PRETTY_FUNCTION__); } void generic_io::_create_file(const char* /* file_name */, const file_type_e /* file_type */) { error_message(UTIL, unknown_location, - "Function \"%s\" is called for reading the input file without definition provided!\n", __PRETTY_FUNCTION__); + "Function \"%s\" is called for reading the input file without definition provided!\n", + __PRETTY_FUNCTION__); } diff --git a/odin_ii/src/map/hard_soft_logic_mixer.cpp b/odin_ii/src/map/hard_soft_logic_mixer.cpp index 394aa74526a..0e902fd7b41 100644 --- a/odin_ii/src/map/hard_soft_logic_mixer.cpp +++ b/odin_ii/src/map/hard_soft_logic_mixer.cpp @@ -44,21 +44,13 @@ HardSoftLogicMixer::~HardSoftLogicMixer() { delete this->_opts[i]; } } -void HardSoftLogicMixer::note_candidate_node(nnode_t* opNode) { - _nodes_by_opt[opNode->type].push_back(opNode); -} +void HardSoftLogicMixer::note_candidate_node(nnode_t* opNode) { _nodes_by_opt[opNode->type].push_back(opNode); } -bool HardSoftLogicMixer::hardenable(nnode_t* node) { - return this->_opts[node->type]->hardenable(node); -} +bool HardSoftLogicMixer::hardenable(nnode_t* node) { return this->_opts[node->type]->hardenable(node); } -bool HardSoftLogicMixer::enabled(nnode_t* node) { - return this->_opts[node->type]->enabled(); -} +bool HardSoftLogicMixer::enabled(nnode_t* node) { return this->_opts[node->type]->enabled(); } -int HardSoftLogicMixer::hard_blocks_needed(operation_list opt) { - return _nodes_by_opt[opt].size(); -} +int HardSoftLogicMixer::hard_blocks_needed(operation_list opt) { return _nodes_by_opt[opt].size(); } void HardSoftLogicMixer::partial_map_node(nnode_t* node, short traverse_number, netlist_t* netlist) { _opts[node->type]->partial_map_node(node, traverse_number, netlist, this); diff --git a/odin_ii/src/map/mixing_optimization.cpp b/odin_ii/src/map/mixing_optimization.cpp index 09ffff9a92c..f86414b87d0 100644 --- a/odin_ii/src/map/mixing_optimization.cpp +++ b/odin_ii/src/map/mixing_optimization.cpp @@ -38,7 +38,9 @@ using vtr::t_linked_vptr; void MixingOpt::scale_counts() { if (this->_blocks_count < 0 || this->_blocks_count == INT_MAX || this->_ratio < 0.0 || this->_ratio > 1.0) { - error_message(NETLIST, unknown_location, "The parameters for optimization kind:%i are configured incorrectly : count %i, ratio %f\n", this->_kind, this->_blocks_count, this->_ratio); + error_message(NETLIST, unknown_location, + "The parameters for optimization kind:%i are configured incorrectly : count %i, ratio %f\n", + this->_kind, this->_blocks_count, this->_ratio); exit(0); } this->_blocks_count = this->_blocks_count * this->_ratio; @@ -46,12 +48,17 @@ void MixingOpt::scale_counts() { void MixingOpt::assign_weights(netlist_t* /*netlist*/, std::vector /*nodes*/) { // compute weights for all noted nodes - error_message(NETLIST, unknown_location, "Assign_weights mixing optimization was called for optimization without specification provided, for kind %i\n", this->_kind); + error_message( + NETLIST, unknown_location, + "Assign_weights mixing optimization was called for optimization without specification provided, for kind %i\n", + this->_kind); exit(0); } void MixingOpt::perform(netlist_t*, std::vector&) { - error_message(NETLIST, unknown_location, "Performing mixing optimization was called for optimization without method provided, for kind %i\n", this->_kind); + error_message(NETLIST, unknown_location, + "Performing mixing optimization was called for optimization without method provided, for kind %i\n", + this->_kind); exit(0); } @@ -64,7 +71,8 @@ MultsOpt::MultsOpt(int _exact) MultsOpt::MultsOpt(float ratio) : MixingOpt(ratio, MULTIPLY) { if (ratio < 0.0 || ratio > 1.0) { - error_message(NETLIST, unknown_location, "Multipliers mixing optimization is started with wrong ratio %f\n", ratio); + error_message(NETLIST, unknown_location, "Multipliers mixing optimization is started with wrong ratio %f\n", + ratio); exit(0); } @@ -170,7 +178,9 @@ void AddersOpt::assign_weights(netlist_t* netlist, std::vector nodes) void AddersOpt::scale_counts() { if (this->_blocks_count < 0 || this->_blocks_count == INT_MAX || this->_ratio < 0.0 || this->_ratio > 1.0) { - error_message(NETLIST, unknown_location, "The parameters for optimization kind:%i are configured incorrectly : count %i, ratio %f\n", this->_kind, this->_blocks_count, this->_ratio); + error_message(NETLIST, unknown_location, + "The parameters for optimization kind:%i are configured incorrectly : count %i, ratio %f\n", + this->_kind, this->_blocks_count, this->_ratio); exit(0); } this->_blocks_count = std::ceil(this->_blocks_count * this->_ratio); @@ -186,9 +196,7 @@ void AddersOpt::perform(netlist_t* netlist, std::vector& weighted_node for (size_t j = 0; j < nodes_count; j++) { // if found a new maximal cost that is higher than a current maximum AND is not restricted by input // params for minimal "hardenable" adder width - if (weighted_nodes[j] - && maximal_cost < weighted_nodes[j]->weight - && this->hardenable(weighted_nodes[j])) { + if (weighted_nodes[j] && maximal_cost < weighted_nodes[j]->weight && this->hardenable(weighted_nodes[j])) { maximal_cost = weighted_nodes[j]->weight; index = j; } @@ -217,9 +225,7 @@ void AddersOpt::perform(netlist_t* netlist, std::vector& weighted_node } } -void MixingOpt::set_blocks_needed(int new_count) { - this->_blocks_count = new_count; -} +void MixingOpt::set_blocks_needed(int new_count) { this->_blocks_count = new_count; } void MultsOpt::set_blocks_needed(int new_count) { // with development for fixed_layout, this value will change @@ -255,17 +261,28 @@ void AddersOpt::set_blocks_needed(int num_to_hard_blocks) { } void MixingOpt::instantiate_soft_logic(netlist_t* /*netlist*/, std::vector /* nodes*/) { - error_message(NETLIST, unknown_location, "Performing instantiate_soft_logic was called for optimization without method provided, for kind %i\n", this->_kind); + error_message( + NETLIST, unknown_location, + "Performing instantiate_soft_logic was called for optimization without method provided, for kind %i\n", + this->_kind); exit(0); } void MixingOpt::instantiate_hard_logic(netlist_t* /*netlist*/, std::vector /* nodes*/) { - error_message(NETLIST, unknown_location, "Performing instantiate_hard_logic was called for optimization without method provided, for kind %i\n", this->_kind); + error_message( + NETLIST, unknown_location, + "Performing instantiate_hard_logic was called for optimization without method provided, for kind %i\n", + this->_kind); exit(0); } -void MixingOpt::partial_map_node(nnode_t* /*node*/, short /*traverse_value*/, netlist_t*, /*netlist*/ HardSoftLogicMixer* /*mixer*/) { - error_message(NETLIST, unknown_location, "Performing partial_map_node was called for optimization without method provided, for kind %i\n", this->_kind); +void MixingOpt::partial_map_node(nnode_t* /*node*/, + short /*traverse_value*/, + netlist_t*, + /*netlist*/ HardSoftLogicMixer* /*mixer*/) { + error_message(NETLIST, unknown_location, + "Performing partial_map_node was called for optimization without method provided, for kind %i\n", + this->_kind); exit(0); } diff --git a/odin_ii/src/map/mixing_optimization.h b/odin_ii/src/map/mixing_optimization.h index 50d1dc2d0af..e54cbe44a0e 100644 --- a/odin_ii/src/map/mixing_optimization.h +++ b/odin_ii/src/map/mixing_optimization.h @@ -76,9 +76,7 @@ class MixingOpt { * * @param nodes pointer to the vector with mults */ - virtual bool enabled() { - return _enabled; - } + virtual bool enabled() { return _enabled; } /** * @brief Instantiates an alternative (not on hard blocks) @@ -118,9 +116,7 @@ class MixingOpt { */ virtual void set_blocks_needed(int count); - operation_list get_kind() { - return _kind; - } + operation_list get_kind() { return _kind; } /** * @brief based on criteria for hardening given kind of operation, return @@ -128,9 +124,7 @@ class MixingOpt { * * @param nnode_t* pointer to the node */ - virtual bool hardenable(nnode_t*) { - return false; - } + virtual bool hardenable(nnode_t*) { return false; } /** * @brief allowing for replacing with dynamic polymorphism for different diff --git a/odin_ii/src/map/partial_map.cpp b/odin_ii/src/map/partial_map.cpp index 18dcb805f1b..c1897f9c03a 100644 --- a/odin_ii/src/map/partial_map.cpp +++ b/odin_ii/src/map/partial_map.cpp @@ -113,7 +113,8 @@ void depth_first_traverse_partial_map(nnode_t* node, uintptr_t traverse_mark_num if (next_net->fanout_pins[j]) { if (next_net->fanout_pins[j]->node) { /* recursive call point */ - depth_first_traverse_partial_map(next_net->fanout_pins[j]->node, traverse_mark_number, netlist); + depth_first_traverse_partial_map(next_net->fanout_pins[j]->node, traverse_mark_number, + netlist); } } } @@ -172,7 +173,8 @@ void partial_map_node(nnode_t* node, short traverse_number, netlist_t* netlist) case MINUS: if (hard_adders) { if (node->num_input_port_sizes == 3) { - int max_num = (node->input_port_sizes[0] >= node->input_port_sizes[1]) ? node->input_port_sizes[0] : node->input_port_sizes[1]; + int max_num = (node->input_port_sizes[0] >= node->input_port_sizes[1]) ? node->input_port_sizes[0] + : node->input_port_sizes[1]; if (max_num >= min_add) instantiate_hard_adder_subtraction(node, traverse_number, netlist); else @@ -231,7 +233,8 @@ void partial_map_node(nnode_t* node, short traverse_number, netlist_t* netlist) long width = is_sp_ram(node) ? get_sp_ram_width(node) : get_dp_ram_width(node); // If the memory satisfies the threshold for the use of a hard logic block, use one. - if (depth > configuration.soft_logic_memory_depth_threshold || width > configuration.soft_logic_memory_width_threshold) { + if (depth > configuration.soft_logic_memory_depth_threshold + || width > configuration.soft_logic_memory_width_threshold) { instantiate_hard_block(node, traverse_number, netlist); } else { printf("\tInferring soft logic ram: %zux%zu\n", width, depth); @@ -432,7 +435,8 @@ void instantiate_multi_port_n_bits_mux(nnode_t* node, short mark, netlist_t* net /* creating multiple stages to decode single bit mux into 2-mux */ for (i = 0; i < selector_width; i++) { /* num of muxes in each stage */ - int num_of_muxes = shift_left_value_with_overflow_check(0x1, selector_width - (i + 1), single_bit_mux->loc); + int num_of_muxes + = shift_left_value_with_overflow_check(0x1, selector_width - (i + 1), single_bit_mux->loc); muxes[i] = (nnode_t**)vtr::calloc(num_of_muxes, sizeof(nnode_t*)); output_signals[i] = init_signal_list(); @@ -463,23 +467,16 @@ void instantiate_multi_port_n_bits_mux(nnode_t* node, short mark, netlist_t* net /* connecting the single bit mux input pins into decoded 2-Muxes */ if (i == 0) { - remap_pin_to_new_node(single_bit_mux->input_pins[port_offset + j], - muxes[i][j], - 1); + remap_pin_to_new_node(single_bit_mux->input_pins[port_offset + j], muxes[i][j], 1); remap_pin_to_new_node(single_bit_mux->input_pins[port_offset + j + (num_expressions / 2)], - muxes[i][j], - 2); + muxes[i][j], 2); } /* connecting the outputs of internal 2-muxes to next level 2-muxes as input */ else { - add_input_pin_to_node(muxes[i][j], - output_signals[i - 1]->pins[j], - 1); + add_input_pin_to_node(muxes[i][j], output_signals[i - 1]->pins[j], 1); - add_input_pin_to_node(muxes[i][j], - output_signals[i - 1]->pins[j + num_of_muxes], - 2); + add_input_pin_to_node(muxes[i][j], output_signals[i - 1]->pins[j + num_of_muxes], 2); } // Connect output pin to related input pin @@ -696,7 +693,8 @@ void instantiate_bitwise_logic(nnode_t* node, operation_list op, short mark, net int i, j; operation_list cell_op; - if (!node) return; + if (!node) + return; oassert(node->num_input_pins > 0); oassert(node->num_input_port_sizes >= 2); @@ -951,8 +949,7 @@ void instantiate_GT(nnode_t* node, operation_list type, short mark, netlist_t* n port_B_offset = 0; port_A_index = 0; port_B_index = 0; - error_message(NETLIST, node->loc, "Invalid node type %s in instantiate_GT\n", - node_name_based_on_op(node)); + error_message(NETLIST, node->loc, "Invalid node type %s in instantiate_GT\n", node_name_based_on_op(node)); } if (width_max > 1) { @@ -1248,8 +1245,7 @@ static void instantiate_constant_shift(nnode_t* node, operation_list type, short /* Extend pad_bit to outputs that don't have inputs connected */ for (i = output_width - 1; i >= operand_width - shift_size; i--) { npin_t* extension_pin = NULL; - if (node->related_ast_node - && node->attributes->port_a_signed == SIGNED && node->type == ASR) { + if (node->related_ast_node && node->attributes->port_a_signed == SIGNED && node->type == ASR) { /* for signed values padding will be with last pin */ extension_pin = copy_input_npin(operand_signal->pins[pad_bit]); } else { @@ -1358,20 +1354,15 @@ static void instantiate_variable_shift(nnode_t* node, operation_list type, short // shift by pow(2,i) and connect the output of the previous stage mux as the second input to the next stage mux for (int j = shift_size; j < input_port_width; j++) - add_input_pin_to_node(muxes[i][j - shift_size], - copy_input_npin(input_pins->pins[j]), - 2); + add_input_pin_to_node(muxes[i][j - shift_size], copy_input_npin(input_pins->pins[j]), 2); // connect the sign bit of the previous output as extension bits int pad_bit = input_port_width - 1; for (int j = 0; j < shift_size; j++) { if (node->attributes->port_a_signed == SIGNED && type == ASR) { add_input_pin_to_node(muxes[i][j + input_port_width - shift_size], - copy_input_npin(input_pins->pins[pad_bit]), - 2); + copy_input_npin(input_pins->pins[pad_bit]), 2); } else { - add_input_pin_to_node(muxes[i][j + input_port_width - shift_size], - get_zero_pin(netlist), - 2); + add_input_pin_to_node(muxes[i][j + input_port_width - shift_size], get_zero_pin(netlist), 2); } } @@ -1384,15 +1375,11 @@ static void instantiate_variable_shift(nnode_t* node, operation_list type, short // shift by pow(2,i) and connect the output of the previous stage mux as the second input to the next stage mux for (int j = 0; j < input_port_width - shift_size; j++) - add_input_pin_to_node(muxes[i][j + shift_size], - copy_input_npin(input_pins->pins[j]), - 2); + add_input_pin_to_node(muxes[i][j + shift_size], copy_input_npin(input_pins->pins[j]), 2); // connect the zero as extension bits for (int j = 0; j < shift_size; j++) - add_input_pin_to_node(muxes[i][j], - get_zero_pin(netlist), - 2); + add_input_pin_to_node(muxes[i][j], get_zero_pin(netlist), 2); } for (int j = 0; j < input_port_width; j++) { diff --git a/odin_ii/src/netlist/netlist_check.cpp b/odin_ii/src/netlist/netlist_check.cpp index 4ab7e42daf6..be16f945012 100644 --- a/odin_ii/src/netlist/netlist_check.cpp +++ b/odin_ii/src/netlist/netlist_check.cpp @@ -35,7 +35,11 @@ nnode_t* find_node_at_top_of_combo_loop(nnode_t* start_node); void depth_first_traverse_check_if_forward_leveled(nnode_t* node, uintptr_t traverse_mark_number); -void depth_first_traverse_until_next_ff_or_output(nnode_t* node, nnode_t* calling_node, uintptr_t traverse_mark_number, int seq_level, netlist_t* netlist); +void depth_first_traverse_until_next_ff_or_output(nnode_t* node, + nnode_t* calling_node, + uintptr_t traverse_mark_number, + int seq_level, + netlist_t* netlist); /*--------------------------------------------------------------------------------------------- * (function: check_netlist) @@ -52,7 +56,11 @@ void check_netlist(netlist_t* netlist) { /*--------------------------------------------------------------------------------------------- * (function: depth_first_traverse_until_next_ff_or_output) *-------------------------------------------------------------------------------------------*/ -void depth_first_traverse_until_next_ff_or_output(nnode_t* node, nnode_t* calling_node, uintptr_t traverse_mark_number, int seq_level, netlist_t* netlist) { +void depth_first_traverse_until_next_ff_or_output(nnode_t* node, + nnode_t* calling_node, + uintptr_t traverse_mark_number, + int seq_level, + netlist_t* netlist) { int i, j; nnode_t* next_node; nnet_t* next_net; @@ -62,9 +70,22 @@ void depth_first_traverse_until_next_ff_or_output(nnode_t* node, nnode_t* callin /* IF - the this node is the end of a sequential level then the node before needs to be stored */ if (calling_node->sequential_terminator == false) { /* IF - it hasn't been stored before */ - netlist->num_at_sequential_level_combinational_termination_node[netlist->num_sequential_level_combinational_termination_nodes - 1]++; - netlist->sequential_level_combinational_termination_node[netlist->num_sequential_level_combinational_termination_nodes - 1] = (nnode_t**)vtr::realloc(netlist->sequential_level_combinational_termination_node[netlist->num_sequential_level_combinational_termination_nodes - 1], sizeof(nnode_t*) * netlist->num_at_sequential_level_combinational_termination_node[netlist->num_sequential_level_combinational_termination_nodes - 1]); - netlist->sequential_level_combinational_termination_node[netlist->num_sequential_level_combinational_termination_nodes - 1][netlist->num_at_sequential_level_combinational_termination_node[netlist->num_sequential_level_combinational_termination_nodes - 1] - 1] = calling_node; + netlist->num_at_sequential_level_combinational_termination_node + [netlist->num_sequential_level_combinational_termination_nodes - 1]++; + netlist->sequential_level_combinational_termination_node + [netlist->num_sequential_level_combinational_termination_nodes - 1] + = (nnode_t**)vtr::realloc( + netlist->sequential_level_combinational_termination_node + [netlist->num_sequential_level_combinational_termination_nodes - 1], + sizeof(nnode_t*) + * netlist->num_at_sequential_level_combinational_termination_node + [netlist->num_sequential_level_combinational_termination_nodes - 1]); + netlist->sequential_level_combinational_termination_node + [netlist->num_sequential_level_combinational_termination_nodes - 1] + [netlist->num_at_sequential_level_combinational_termination_node + [netlist->num_sequential_level_combinational_termination_nodes - 1] + - 1] + = calling_node; /* mark the node locally */ calling_node->sequential_terminator = true; } @@ -84,7 +105,9 @@ void depth_first_traverse_until_next_ff_or_output(nnode_t* node, nnode_t* callin /* add to the next sequntial list */ netlist->num_at_sequential_level[seq_level + 1]++; - netlist->sequential_level_nodes[seq_level + 1] = (nnode_t**)vtr::realloc(netlist->sequential_level_nodes[seq_level + 1], sizeof(nnode_t*) * netlist->num_at_sequential_level[seq_level + 1]); + netlist->sequential_level_nodes[seq_level + 1] + = (nnode_t**)vtr::realloc(netlist->sequential_level_nodes[seq_level + 1], + sizeof(nnode_t*) * netlist->num_at_sequential_level[seq_level + 1]); netlist->sequential_level_nodes[seq_level + 1][netlist->num_at_sequential_level[seq_level + 1] - 1] = node; return; @@ -145,7 +168,8 @@ void depth_first_traverse_check_if_forward_leveled(nnode_t* node, uintptr_t trav continue; if ((next_node->forward_level == -1) && (next_node->type != FF_NODE)) { - graphVizOutputCombinationalNet(configuration.debug_output_path, "combo_loop", COMBO_LOOP_ERROR, /*next_node);*/ find_node_at_top_of_combo_loop(next_node)); + graphVizOutputCombinationalNet(configuration.debug_output_path, "combo_loop", COMBO_LOOP_ERROR, + /*next_node);*/ find_node_at_top_of_combo_loop(next_node)); oassert(false); } @@ -183,7 +207,8 @@ nnode_t* find_node_at_top_of_combo_loop(nnode_t* start_node) { if (!all_visited) { for (int i = 0; i < next_node->input_pins[idx_missed]->net->num_driver_pins; i++) { - if (next_node->input_pins[idx_missed]->net->driver_pins[i]->node->backward_level < next_node->backward_level) { + if (next_node->input_pins[idx_missed]->net->driver_pins[i]->node->backward_level + < next_node->backward_level) { /* IF - the next node has a lower backward level than this node suggests that it is * closer to primary outputs and not in the combo loop */ vtr::free(stack); diff --git a/odin_ii/src/netlist/netlist_cleanup.cpp b/odin_ii/src/netlist/netlist_cleanup.cpp index 99790a01017..67b0afb0c9d 100644 --- a/odin_ii/src/netlist/netlist_cleanup.cpp +++ b/odin_ii/src/netlist/netlist_cleanup.cpp @@ -74,8 +74,9 @@ node_list_t* insert_node_list(node_list_t* node_list, nnode_t* node) { /* Traverse the netlist backwards, moving from outputs to inputs */ void traverse_backward(nnode_t* node) { - if (node->node_data == VISITED_BACKWARD) return; // Already visited - node->node_data = VISITED_BACKWARD; // Mark as visited + if (node->node_data == VISITED_BACKWARD) + return; // Already visited + node->node_data = VISITED_BACKWARD; // Mark as visited int i; for (i = 0; i < node->num_input_pins; i++) { // ensure this net has a driver (i.e. skip undriven outputs) @@ -95,8 +96,10 @@ void traverse_backward(nnode_t* node) { * remove_me: should the current node be removed? * */ void traverse_forward(nnode_t* node, int toplevel, int remove_me) { - if (node == NULL) return; // Shouldn't happen, but check just in case - if (node->node_data == VISITED_FORWARD) return; // Already visited, shouldn't happen anyway + if (node == NULL) + return; // Shouldn't happen, but check just in case + if (node->node_data == VISITED_FORWARD) + return; // Already visited, shouldn't happen anyway /* We want to remove this node if either its parent was removed, * or if it was not visited on the backwards sweep */ @@ -218,7 +221,8 @@ void calculate_addsub_statistics(node_list_t* addsub) { /* Carry out is always output pin 0 */ nnet_t* carry_out_net = node->output_pins[0]->net; - if (carry_out_net == NULL || carry_out_net->fanout_pins[0] == NULL || (node->type != ADD && node->type != MINUS)) + if (carry_out_net == NULL || carry_out_net->fanout_pins[0] == NULL + || (node->type != ADD && node->type != MINUS)) found_tail = true; else node = carry_out_net->fanout_pins[0]->node; @@ -227,11 +231,13 @@ void calculate_addsub_statistics(node_list_t* addsub) { if (node->type == ADD) { adder_chain_count += 1; total_adders += chain_depth; - if (chain_depth > longest_adder_chain) longest_adder_chain = chain_depth; + if (chain_depth > longest_adder_chain) + longest_adder_chain = chain_depth; } else if (node->type == MINUS) { subtractor_chain_count += 1; total_subtractors += chain_depth; - if (chain_depth > longest_subtractor_chain) longest_subtractor_chain = chain_depth; + if (chain_depth > longest_subtractor_chain) + longest_subtractor_chain = chain_depth; } sum_of_addsub_logs += log(chain_depth); @@ -308,9 +314,8 @@ void report_removed_nodes(long long* node_list) { warning_message(NETLIST, unknown_location, "%s", "Following unused node(s) removed from the netlist:\n"); for (int i = 0; i < operation_list_END; i++) { if (node_list[i] > UNUSED_NODE_TYPE) { - std::string msg = std::string("Number of removed <") - + operation_list_STR[i][ODIN_LONG_STRING] - + "> node(s): "; + std::string msg + = std::string("Number of removed <") + operation_list_STR[i][ODIN_LONG_STRING] + "> node(s): "; printf("%-42s%lld\n", msg.c_str(), node_list[i]); } } @@ -321,6 +326,7 @@ void remove_unused_logic(netlist_t* netlist) { mark_output_dependencies(netlist); identify_unused_nodes(netlist); remove_unused_nodes(&useless_nodes); - if (global_args.all_warnings) report_removed_nodes(num_removed_nodes); + if (global_args.all_warnings) + report_removed_nodes(num_removed_nodes); calculate_addsub_statistics(&addsub_nodes); } diff --git a/odin_ii/src/netlist/netlist_create_from_ast.cpp b/odin_ii/src/netlist/netlist_create_from_ast.cpp index 5bac51168de..7e1b570dcc6 100644 --- a/odin_ii/src/netlist/netlist_create_from_ast.cpp +++ b/odin_ii/src/netlist/netlist_create_from_ast.cpp @@ -74,8 +74,14 @@ circuit_type_e type_of_circuit; edge_type_e circuit_edge; /* PROTOTYPES */ -void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, char* instance_name, sc_hierarchy* local_ref, int level); -signal_list_t* netlist_expand_ast_of_module(ast_node_t** node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); +void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, + char* instance_name, + sc_hierarchy* local_ref, + int level); +signal_list_t* netlist_expand_ast_of_module(ast_node_t** node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); void create_all_driver_nets_in_this_scope(char* instance_name_prefix, sc_hierarchy* local_ref); @@ -86,10 +92,22 @@ nnet_t* define_nodes_and_nets_with_driver(ast_node_t* var_declare, char* instanc ast_node_t* resolve_top_module_parameters(ast_node_t* node, sc_hierarchy* top_sc_list); ast_node_t* resolve_top_parameters_defined_by_parameters(ast_node_t* node, sc_hierarchy* top_sc_list, int count); -void connect_hard_block_and_alias(ast_node_t* hb_instance, char* instance_name_prefix, int outport_size, sc_hierarchy* local_ref); -void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_instance, char* instance_name_prefix, sc_hierarchy* local_ref); -signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* module_instance, char* instance_name_prefix, sc_hierarchy* local_ref); -signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task_instance, char* instance_name_prefix, sc_hierarchy* local_ref); +void connect_hard_block_and_alias(ast_node_t* hb_instance, + char* instance_name_prefix, + int outport_size, + sc_hierarchy* local_ref); +void connect_module_instantiation_and_alias(short PASS, + ast_node_t* module_instance, + char* instance_name_prefix, + sc_hierarchy* local_ref); +signal_list_t* connect_function_instantiation_and_alias(short PASS, + ast_node_t* module_instance, + char* instance_name_prefix, + sc_hierarchy* local_ref); +signal_list_t* connect_task_instantiation_and_alias(short PASS, + ast_node_t* task_instance, + char* instance_name_prefix, + sc_hierarchy* local_ref); VNumber* get_init_value(ast_node_t* node); void define_latchs_initial_value_inside_initial_statement(ast_node_t* initial_node, sc_hierarchy* local_ref); @@ -99,32 +117,86 @@ signal_list_t* create_gate(ast_node_t* gate, char* instance_name_prefix, sc_hier signal_list_t* create_hard_block(ast_node_t* block, char* instance_name_prefix, sc_hierarchy* local_ref); signal_list_t* create_pins(ast_node_t* var_declare, char* name, char* instance_name_prefix, sc_hierarchy* local_ref); signal_list_t* create_output_pin(ast_node_t* var_declare, char* instance_name_prefix, sc_hierarchy* local_ref); -signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); -signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists, int list_size, char* instance_name_prefix, long assignment_size); +signal_list_t* assignment_alias(ast_node_t* assignment, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); +signal_list_t* create_operation_node(ast_node_t* op, + signal_list_t** input_lists, + int list_size, + char* instance_name_prefix, + long assignment_size); void terminate_continuous_assignment(ast_node_t* node, signal_list_t* assignment, char* instance_name_prefix); -void terminate_registered_assignment(ast_node_t* always_node, signal_list_t* assignment, signal_list_t* potential_clocks, sc_hierarchy* local_ref); - -signal_list_t* create_case(ast_node_t* case_ast, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); -void create_case_control_signals(ast_node_t* case_list_of_items, ast_node_t** compare_against, nnode_t* case_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); -signal_list_t* create_case_mux_statements(ast_node_t* case_list_of_items, nnode_t* case_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); +void terminate_registered_assignment(ast_node_t* always_node, + signal_list_t* assignment, + signal_list_t* potential_clocks, + sc_hierarchy* local_ref); + +signal_list_t* create_case(ast_node_t* case_ast, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); +void create_case_control_signals(ast_node_t* case_list_of_items, + ast_node_t** compare_against, + nnode_t* case_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); +signal_list_t* create_case_mux_statements(ast_node_t* case_list_of_items, + nnode_t* case_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); signal_list_t* create_if(ast_node_t* if_ast, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); -void create_if_control_signals(ast_node_t** if_expression, nnode_t* if_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); -signal_list_t* create_if_mux_statements(ast_node_t* if_ast, nnode_t* if_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); -signal_list_t* create_if_for_question(ast_node_t* if_ast, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); -signal_list_t* create_if_question_mux_expressions(ast_node_t* if_ast, nnode_t* if_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size); -signal_list_t* create_mux_statements(signal_list_t** statement_lists, nnode_t* case_node, int num_statement_lists, char* instance_name_prefix, sc_hierarchy* local_ref); -signal_list_t* create_mux_expressions(signal_list_t** expression_lists, nnode_t* mux_node, int num_expression_lists, char* instance_name_prefix); - -signal_list_t* evaluate_sensitivity_list(ast_node_t* delay_control, char* instance_name_prefix, sc_hierarchy* local_ref); +void create_if_control_signals(ast_node_t** if_expression, + nnode_t* if_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); +signal_list_t* create_if_mux_statements(ast_node_t* if_ast, + nnode_t* if_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); +signal_list_t* create_if_for_question(ast_node_t* if_ast, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); +signal_list_t* create_if_question_mux_expressions(ast_node_t* if_ast, + nnode_t* if_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size); +signal_list_t* create_mux_statements(signal_list_t** statement_lists, + nnode_t* case_node, + int num_statement_lists, + char* instance_name_prefix, + sc_hierarchy* local_ref); +signal_list_t* create_mux_expressions(signal_list_t** expression_lists, + nnode_t* mux_node, + int num_expression_lists, + char* instance_name_prefix); + +signal_list_t* evaluate_sensitivity_list(ast_node_t* delay_control, + char* instance_name_prefix, + sc_hierarchy* local_ref); int alias_output_assign_pins_to_inputs(char_list_t* output_list, signal_list_t* input_list, ast_node_t* node); int find_smallest_non_numerical(ast_node_t* node, signal_list_t** input_list, int num_input_lists); void pad_with_zeros(ast_node_t* node, signal_list_t* list, int pad_size, char* instance_name_prefix); -signal_list_t* create_dual_port_ram_block(ast_node_t* block, char* instance_name_prefix, t_model* hb_model, sc_hierarchy* local_ref); -signal_list_t* create_single_port_ram_block(ast_node_t* block, char* instance_name_prefix, t_model* hb_model, sc_hierarchy* local_ref); -signal_list_t* create_soft_single_port_ram_block(ast_node_t* block, char* instance_name_prefix, sc_hierarchy* local_ref); +signal_list_t* create_dual_port_ram_block(ast_node_t* block, + char* instance_name_prefix, + t_model* hb_model, + sc_hierarchy* local_ref); +signal_list_t* create_single_port_ram_block(ast_node_t* block, + char* instance_name_prefix, + t_model* hb_model, + sc_hierarchy* local_ref); +signal_list_t* create_soft_single_port_ram_block(ast_node_t* block, + char* instance_name_prefix, + sc_hierarchy* local_ref); signal_list_t* create_soft_dual_port_ram_block(ast_node_t* block, char* instance_name_prefix, sc_hierarchy* local_ref); void look_for_clocks(netlist_t* netlist); @@ -229,11 +301,16 @@ void look_for_clocks(netlist_t* netlist) { * Recurses through modules by depth first traversal of the tree of modules. Expands * the netlists at each level. *-------------------------------------------------------------------------------------------*/ -void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, char* instance_name, sc_hierarchy* local_ref, int level) { +void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, + char* instance_name, + sc_hierarchy* local_ref, + int level) { signal_list_t* list = NULL; /* BASE CASE is when there are no other instantiations of modules in this module */ - if ((*current_module)->types.module.size_module_instantiations == 0 && (*current_module)->types.function.size_function_instantiations == 0 && (*current_module)->types.task.size_task_instantiations == 0) { + if ((*current_module)->types.module.size_module_instantiations == 0 + && (*current_module)->types.function.size_function_instantiations == 0 + && (*current_module)->types.task.size_task_instantiations == 0) { list = netlist_expand_ast_of_module(current_module, instance_name, local_ref, 0); } else { /* ELSE - we need to visit all the children before */ @@ -245,16 +322,19 @@ void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, c * module name is MODULE_INSTANCE->IDENTIFIER(child[0]) */ - char* temp_instance_name = make_full_ref_name(instance_name, - (*current_module)->types.module.module_instantiations_instance[k]->identifier_node->types.identifier, - (*current_module)->types.module.module_instantiations_instance[k]->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name = make_full_ref_name( + instance_name, + (*current_module)->types.module.module_instantiations_instance[k]->identifier_node->types.identifier, + (*current_module) + ->types.module.module_instantiations_instance[k] + ->children[0] + ->identifier_node->types.identifier, + NULL, -1); long sc_spot; /* lookup the name of the module associated with this instantiated point */ if ((sc_spot = sc_lookup_string(module_names_to_idx, temp_instance_name)) == -1) { - error_message(NETLIST, (*current_module)->loc, - "Can't find instance name %s\n", temp_instance_name); + error_message(NETLIST, (*current_module)->loc, "Can't find instance name %s\n", temp_instance_name); } ast_node_t* instance = (ast_node_t*)module_names_to_idx->data[sc_spot]; @@ -276,22 +356,27 @@ void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, c * module name is MODULE_INSTANCE->IDENTIFIER(child[0]) */ char* temp_instance_name = make_full_ref_name(instance_name, - (*current_module)->types.function.function_instantiations_instance[k]->identifier_node->types.identifier, - (*current_module)->types.function.function_instantiations_instance[k]->children[0]->identifier_node->types.identifier, + (*current_module) + ->types.function.function_instantiations_instance[k] + ->identifier_node->types.identifier, + (*current_module) + ->types.function.function_instantiations_instance[k] + ->children[0] + ->identifier_node->types.identifier, NULL, -1); long sc_spot; /* lookup the name of the module associated with this instantiated point */ if ((sc_spot = sc_lookup_string(module_names_to_idx, temp_instance_name)) == -1) { - error_message(NETLIST, (*current_module)->loc, - "Can't find instance name %s\n", temp_instance_name); + error_message(NETLIST, (*current_module)->loc, "Can't find instance name %s\n", temp_instance_name); } sc_hierarchy* function_sc_hierarchy = local_ref->function_children[k]; oassert(!strcmp(function_sc_hierarchy->instance_name_prefix, temp_instance_name)); /* recursive call point */ - convert_ast_to_netlist_recursing_via_modules(((ast_node_t**)&module_names_to_idx->data[sc_spot]), temp_instance_name, function_sc_hierarchy, level + 1); + convert_ast_to_netlist_recursing_via_modules(((ast_node_t**)&module_names_to_idx->data[sc_spot]), + temp_instance_name, function_sc_hierarchy, level + 1); /* clean up */ vtr::free(temp_instance_name); @@ -303,23 +388,27 @@ void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, c * module name is MODULE_INSTANCE->IDENTIFIER(child[0]) */ - char* temp_instance_name = make_full_ref_name(instance_name, - (*current_module)->types.task.task_instantiations_instance[k]->identifier_node->types.identifier, - (*current_module)->types.task.task_instantiations_instance[k]->children[0]->identifier_node->types.identifier, - NULL, -1); + char* temp_instance_name = make_full_ref_name( + instance_name, + (*current_module)->types.task.task_instantiations_instance[k]->identifier_node->types.identifier, + (*current_module) + ->types.task.task_instantiations_instance[k] + ->children[0] + ->identifier_node->types.identifier, + NULL, -1); long sc_spot; /* lookup the name of the module associated with this instantiated point */ if ((sc_spot = sc_lookup_string(module_names_to_idx, temp_instance_name)) == -1) { - error_message(NETLIST, (*current_module)->loc, - "Can't find instance name %s\n", temp_instance_name); + error_message(NETLIST, (*current_module)->loc, "Can't find instance name %s\n", temp_instance_name); } sc_hierarchy* task_sc_hierarchy = local_ref->task_children[k]; oassert(!strcmp(task_sc_hierarchy->instance_name_prefix, temp_instance_name)); /* recursive call point */ - convert_ast_to_netlist_recursing_via_modules(((ast_node_t**)&module_names_to_idx->data[sc_spot]), temp_instance_name, task_sc_hierarchy, level + 1); + convert_ast_to_netlist_recursing_via_modules(((ast_node_t**)&module_names_to_idx->data[sc_spot]), + temp_instance_name, task_sc_hierarchy, level + 1); /* clean up */ vtr::free(temp_instance_name); @@ -329,7 +418,8 @@ void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, c list = netlist_expand_ast_of_module(current_module, instance_name, local_ref, 0); } - if (list) free_signal_list(list); + if (list) + free_signal_list(list); } /*--------------------------------------------------------------------------- @@ -338,7 +428,10 @@ void convert_ast_to_netlist_recursing_via_modules(ast_node_t** current_module, c * Allows for a pre amble, looks at children (dfs), then does post amble * Can skip children traverse and the ambles... *-------------------------------------------------------------------------*/ -signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { /* with the top module we need to visit the entire ast tree */ long i; short* child_skip_list = NULL; // list of children not to traverse into @@ -404,7 +497,9 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc long j; for (j = 0; j < node->children[i]->num_children; j++) { /* make the aliases for all the drivers as they're passed through modules */ - connect_module_instantiation_and_alias(INSTANTIATE_DRIVERS, node->children[i]->children[j], instance_name_prefix, local_ref); + connect_module_instantiation_and_alias(INSTANTIATE_DRIVERS, + node->children[i]->children[j], + instance_name_prefix, local_ref); } /* is a call site for another module. Alias names to nets and pins */ @@ -427,7 +522,9 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc long j; for (j = 0; j < node->children[i]->num_children; j++) { /* make the aliases for all the drivers as they're passed through modules */ - connect_module_instantiation_and_alias(INSTANTIATE_DRIVERS, node->children[i]->children[j], instance_name_prefix, local_ref); + connect_module_instantiation_and_alias(INSTANTIATE_DRIVERS, + node->children[i]->children[j], + instance_name_prefix, local_ref); } /* is a call site for another module. Alias names to nets and pins */ @@ -485,11 +582,13 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc skip_children = true; break; case FUNCTION_INSTANCE: - return_sig_list = connect_function_instantiation_and_alias(INSTANTIATE_DRIVERS, node, instance_name_prefix, local_ref); + return_sig_list = connect_function_instantiation_and_alias(INSTANTIATE_DRIVERS, node, + instance_name_prefix, local_ref); skip_children = true; break; case TASK_INSTANCE: - return_sig_list = connect_task_instantiation_and_alias(INSTANTIATE_DRIVERS, node, instance_name_prefix, local_ref); + return_sig_list + = connect_task_instantiation_and_alias(INSTANTIATE_DRIVERS, node, instance_name_prefix, local_ref); skip_children = true; break; case GATE: @@ -575,7 +674,8 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc } /* recursively call through the tree going to each instance. This is depth first traverse. */ - children_signal_list[i] = netlist_expand_ast_of_module(&(node->children[i]), instance_name_prefix, child_ref, assignment_size); + children_signal_list[i] = netlist_expand_ast_of_module(&(node->children[i]), instance_name_prefix, + child_ref, assignment_size); } } } @@ -584,8 +684,7 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc /* POST AMBLE - process the children */ switch (node->type) { case FILE_ITEMS: - error_message(NETLIST, node->loc, "%s", - "FILE_ITEMS are not supported by Odin.\n"); + error_message(NETLIST, node->loc, "%s", "FILE_ITEMS are not supported by Odin.\n"); break; case CONCATENATE: return_sig_list = concatenate_signal_lists(children_signal_list, node->num_children); @@ -597,7 +696,8 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc long j; for (j = 0; j < node->children[i]->num_children; j++) { /* make the aliases for all the drivers as they're passed through modules */ - connect_module_instantiation_and_alias(ALIAS_INPUTS, node->children[i]->children[j], instance_name_prefix, local_ref); + connect_module_instantiation_and_alias(ALIAS_INPUTS, node->children[i]->children[j], + instance_name_prefix, local_ref); } } } @@ -605,12 +705,14 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc break; } case FUNCTION_INSTANCE: { - signal_list_t* temp_list = connect_function_instantiation_and_alias(ALIAS_INPUTS, node, instance_name_prefix, local_ref); + signal_list_t* temp_list + = connect_function_instantiation_and_alias(ALIAS_INPUTS, node, instance_name_prefix, local_ref); free_signal_list(temp_list); // list is unused; discard break; } case TASK_INSTANCE: { - signal_list_t* temp_list = connect_task_instantiation_and_alias(ALIAS_INPUTS, node, instance_name_prefix, local_ref); + signal_list_t* temp_list + = connect_task_instantiation_and_alias(ALIAS_INPUTS, node, instance_name_prefix, local_ref); free_signal_list(temp_list); // list is unused; discard break; } @@ -649,11 +751,13 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc break; case BINARY_OPERATION: oassert(node->num_children == 2); - return_sig_list = create_operation_node(node, children_signal_list, node->num_children, instance_name_prefix, assignment_size); + return_sig_list = create_operation_node(node, children_signal_list, node->num_children, + instance_name_prefix, assignment_size); break; case UNARY_OPERATION: oassert(node->num_children == 1); - return_sig_list = create_operation_node(node, children_signal_list, node->num_children, instance_name_prefix, assignment_size); + return_sig_list = create_operation_node(node, children_signal_list, node->num_children, + instance_name_prefix, assignment_size); break; case BLOCK: if (node->num_children > 0) { @@ -662,7 +766,8 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc long j; for (j = 0; j < node->children[i]->num_children; j++) { /* make the aliases for all the drivers as they're passed through modules */ - connect_module_instantiation_and_alias(ALIAS_INPUTS, node->children[i]->children[j], instance_name_prefix, local_ref); + connect_module_instantiation_and_alias(ALIAS_INPUTS, node->children[i]->children[j], + instance_name_prefix, local_ref); } } } @@ -689,15 +794,9 @@ signal_list_t* netlist_expand_ast_of_module(ast_node_t** node_ref, char* instanc if (children_signal_list != NULL) { for (i = 0; i < node->num_children; i++) { /* skip lists that have already been freed */ - if (children_signal_list[i] - && node->type != BINARY_OPERATION - && node->type != UNARY_OPERATION - && node->type != BLOCK - && node->type != VAR_DECLARE_LIST - && node->type != ASSIGN - && node->type != ALWAYS - && node->type != STATEMENT - && node->type != CONCATENATE) { + if (children_signal_list[i] && node->type != BINARY_OPERATION && node->type != UNARY_OPERATION + && node->type != BLOCK && node->type != VAR_DECLARE_LIST && node->type != ASSIGN && node->type != ALWAYS + && node->type != STATEMENT && node->type != CONCATENATE) { free_signal_list(children_signal_list[i]); } } @@ -753,11 +852,9 @@ void create_all_driver_nets_in_this_scope(char* instance_name_prefix, sc_hierarc /* all registers are drivers */ (local_symbol_table[i]->types.variable.is_reg) /* a wire that is an input can be a driver */ - || ((local_symbol_table[i]->types.variable.is_wire) - && (!local_symbol_table[i]->types.variable.is_input)) + || ((local_symbol_table[i]->types.variable.is_wire) && (!local_symbol_table[i]->types.variable.is_input)) /* any output that has nothing else is an implied wire driver */ - || ((local_symbol_table[i]->types.variable.is_output) - && (!local_symbol_table[i]->types.variable.is_reg) + || ((local_symbol_table[i]->types.variable.is_output) && (!local_symbol_table[i]->types.variable.is_reg) && (!local_symbol_table[i]->types.variable.is_wire))) { /* create nets based on this driver as the name */ define_nets_with_driver(local_symbol_table[i], instance_name_prefix); @@ -892,12 +989,12 @@ void create_top_output_nodes(ast_node_t* module, char* instance_name_prefix, sc_ if (var_declare->children[0] == NULL) { /* IF - this is a identifier then find it in the output_nets and hook it up to a newly created node */ /* get the name of the pin */ - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, var_declare->identifier_node->types.identifier, -1); + full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, + var_declare->identifier_node->types.identifier, -1); /* check if the instantiation pin exists. */ if ((sc_spot = sc_lookup_string(output_nets_sc, full_name)) == -1) { - warning_message(NETLIST, var_declare->loc, - "Output pin (%s) is not hooked up!!!\n", full_name); + warning_message(NETLIST, var_declare->loc, "Output pin (%s) is not hooked up!!!\n", full_name); } new_pin = allocate_npin(); @@ -917,7 +1014,8 @@ void create_top_output_nodes(ast_node_t* module, char* instance_name_prefix, sc_ add_input_pin_to_node(new_node, new_pin, 0); /* record this node */ - syn_netlist->top_output_nodes = (nnode_t**)vtr::realloc(syn_netlist->top_output_nodes, sizeof(nnode_t*) * (syn_netlist->num_top_output_nodes + 1)); + syn_netlist->top_output_nodes = (nnode_t**)vtr::realloc( + syn_netlist->top_output_nodes, sizeof(nnode_t*) * (syn_netlist->num_top_output_nodes + 1)); syn_netlist->top_output_nodes[syn_netlist->num_top_output_nodes] = new_node; syn_netlist->num_top_output_nodes++; } else if (var_declare->children[2] == NULL) { @@ -941,12 +1039,13 @@ void create_top_output_nodes(ast_node_t* module, char* instance_name_prefix, sc_ /* assume digit 1 is largest */ for (k = min_value; k <= max_value; k++) { /* get the name of the pin */ - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, var_declare->identifier_node->types.identifier, k); + full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, + var_declare->identifier_node->types.identifier, k); /* check if the instantiation pin exists. */ if ((sc_spot = sc_lookup_string(output_nets_sc, full_name)) == -1) { - warning_message(NETLIST, var_declare->loc, - "Output pin (%s) is not hooked up!!!\n", full_name); + warning_message(NETLIST, var_declare->loc, "Output pin (%s) is not hooked up!!!\n", + full_name); } new_pin = allocate_npin(); /* hookup this pin to this net */ @@ -965,7 +1064,8 @@ void create_top_output_nodes(ast_node_t* module, char* instance_name_prefix, sc_ add_input_pin_to_node(new_node, new_pin, 0); /* record this node */ - syn_netlist->top_output_nodes = (nnode_t**)vtr::realloc(syn_netlist->top_output_nodes, sizeof(nnode_t*) * (syn_netlist->num_top_output_nodes + 1)); + syn_netlist->top_output_nodes = (nnode_t**)vtr::realloc( + syn_netlist->top_output_nodes, sizeof(nnode_t*) * (syn_netlist->num_top_output_nodes + 1)); syn_netlist->top_output_nodes[syn_netlist->num_top_output_nodes] = new_node; syn_netlist->num_top_output_nodes++; } @@ -999,13 +1099,13 @@ nnet_t* define_nets_with_driver(ast_node_t* var_declare, char* instance_name_pre new_net = allocate_nnet(); /* make the string to add to the string cache */ - temp_string = make_full_ref_name(instance_name_prefix, NULL, NULL, var_declare->identifier_node->types.identifier, -1); + temp_string + = make_full_ref_name(instance_name_prefix, NULL, NULL, var_declare->identifier_node->types.identifier, -1); /* look for that element */ sc_spot = sc_add_string(output_nets_sc, temp_string); if (output_nets_sc->data[sc_spot] != NULL) { - error_message(NETLIST, var_declare->loc, - "Net (%s) with the same name already created\n", temp_string); + error_message(NETLIST, var_declare->loc, "Net (%s) with the same name already created\n", temp_string); } /* store the data which is an idx here */ output_nets_sc->data[sc_spot] = (void*)new_net; @@ -1030,8 +1130,7 @@ nnet_t* define_nets_with_driver(ast_node_t* var_declare, char* instance_name_pre } //ODIN doesn't support negative number in index now. if (min_value < 0 || max_value < 0) { - warning_message(NETLIST, var_declare->loc, "%s", - "Odin doesn't support negative number in index."); + warning_message(NETLIST, var_declare->loc, "%s", "Odin doesn't support negative number in index."); } /* This register declaration is a range as opposed to a single bit so we need to define each element */ @@ -1041,12 +1140,12 @@ nnet_t* define_nets_with_driver(ast_node_t* var_declare, char* instance_name_pre new_net = allocate_nnet(); /* create the string to add to the cache */ - temp_string = make_full_ref_name(instance_name_prefix, NULL, NULL, var_declare->identifier_node->types.identifier, i); + temp_string = make_full_ref_name(instance_name_prefix, NULL, NULL, + var_declare->identifier_node->types.identifier, i); sc_spot = sc_add_string(output_nets_sc, temp_string); if (output_nets_sc->data[sc_spot] != NULL) { - error_message(NETLIST, var_declare->loc, - "Net (%s) with the same name already created\n", temp_string); + error_message(NETLIST, var_declare->loc, "Net (%s) with the same name already created\n", temp_string); } /* store the data which is an idx here */ output_nets_sc->data[sc_spot] = (void*)new_net; @@ -1072,8 +1171,7 @@ nnet_t* define_nets_with_driver(ast_node_t* var_declare, char* instance_name_pre } //ODIN doesn't support negative number in index now. if (data_min < 0 || data_max < 0) { - warning_message(NETLIST, var_declare->loc, "%s", - "Odin doesn't support negative number in index."); + warning_message(NETLIST, var_declare->loc, "%s", "Odin doesn't support negative number in index."); } ast_node_t* node_max2 = var_declare->children[2]; @@ -1089,21 +1187,18 @@ nnet_t* define_nets_with_driver(ast_node_t* var_declare, char* instance_name_pre } //ODIN doesn't support negative number in index now. if (addr_min < 0 || addr_max < 0) { - warning_message(NETLIST, var_declare->loc, "%s", - "Odin doesn't support negative number in index."); + warning_message(NETLIST, var_declare->loc, "%s", "Odin doesn't support negative number in index."); } char* name = var_declare->identifier_node->types.identifier; if (data_min != 0) - error_message(NETLIST, var_declare->loc, - "%s: right memory index must be zero\n", name); + error_message(NETLIST, var_declare->loc, "%s: right memory index must be zero\n", name); oassert(data_min <= data_max); if (addr_min != 0) - error_message(NETLIST, var_declare->loc, - "%s: right memory address index must be zero\n", name); + error_message(NETLIST, var_declare->loc, "%s: right memory address index must be zero\n", name); oassert(addr_min <= addr_max); @@ -1135,12 +1230,12 @@ nnet_t* define_nodes_and_nets_with_driver(ast_node_t* var_declare, char* instanc /* create the net */ new_net = allocate_nnet(); - temp_string = make_full_ref_name(instance_name_prefix, NULL, NULL, var_declare->identifier_node->types.identifier, -1); + temp_string + = make_full_ref_name(instance_name_prefix, NULL, NULL, var_declare->identifier_node->types.identifier, -1); sc_spot = sc_add_string(output_nets_sc, temp_string); if (output_nets_sc->data[sc_spot] != NULL) { - error_message(NETLIST, var_declare->loc, - "Net (%s) with the same name already created\n", temp_string); + error_message(NETLIST, var_declare->loc, "Net (%s) with the same name already created\n", temp_string); } /* store the data which is an idx here */ output_nets_sc->data[sc_spot] = (void*)new_net; @@ -1162,7 +1257,8 @@ nnet_t* define_nodes_and_nets_with_driver(ast_node_t* var_declare, char* instanc add_driver_pin_to_net(new_net, new_pin); /* store it in the list of input nodes */ - syn_netlist->top_input_nodes = (nnode_t**)vtr::realloc(syn_netlist->top_input_nodes, sizeof(nnode_t*) * (syn_netlist->num_top_input_nodes + 1)); + syn_netlist->top_input_nodes = (nnode_t**)vtr::realloc( + syn_netlist->top_input_nodes, sizeof(nnode_t*) * (syn_netlist->num_top_input_nodes + 1)); syn_netlist->top_input_nodes[syn_netlist->num_top_input_nodes] = new_node; syn_netlist->num_top_input_nodes++; } else if (var_declare->children[2] == NULL) { @@ -1180,8 +1276,7 @@ nnet_t* define_nodes_and_nets_with_driver(ast_node_t* var_declare, char* instanc } //ODIN doesn't support negative number in index now. if (min_value < 0 || max_value < 0) { - warning_message(NETLIST, var_declare->loc, "%s", - "Odin doesn't support negative number in index."); + warning_message(NETLIST, var_declare->loc, "%s", "Odin doesn't support negative number in index."); } /* assume digit 1 is largest */ @@ -1190,12 +1285,12 @@ nnet_t* define_nodes_and_nets_with_driver(ast_node_t* var_declare, char* instanc new_net = allocate_nnet(); /* FOR single driver signal */ - temp_string = make_full_ref_name(instance_name_prefix, NULL, NULL, var_declare->identifier_node->types.identifier, i); + temp_string = make_full_ref_name(instance_name_prefix, NULL, NULL, + var_declare->identifier_node->types.identifier, i); sc_spot = sc_add_string(output_nets_sc, temp_string); if (output_nets_sc->data[sc_spot] != NULL) { - error_message(NETLIST, var_declare->loc, - "Net (%s) with the same name already created\n", temp_string); + error_message(NETLIST, var_declare->loc, "Net (%s) with the same name already created\n", temp_string); } /* store the data which is an idx here */ output_nets_sc->data[sc_spot] = (void*)new_net; @@ -1217,13 +1312,15 @@ nnet_t* define_nodes_and_nets_with_driver(ast_node_t* var_declare, char* instanc add_driver_pin_to_net(new_net, new_pin); /* store it in the list of input nodes */ - syn_netlist->top_input_nodes = (nnode_t**)vtr::realloc(syn_netlist->top_input_nodes, sizeof(nnode_t*) * (syn_netlist->num_top_input_nodes + 1)); + syn_netlist->top_input_nodes = (nnode_t**)vtr::realloc( + syn_netlist->top_input_nodes, sizeof(nnode_t*) * (syn_netlist->num_top_input_nodes + 1)); syn_netlist->top_input_nodes[syn_netlist->num_top_input_nodes] = new_node; syn_netlist->num_top_input_nodes++; } } else if (var_declare->types.variable.is_memory) { /* Implicit memory */ - error_message(NETLIST, var_declare->children[2]->loc, "%s\n", "Unhandled implicit memory in define_nodes_and_nets_with_driver"); + error_message(NETLIST, var_declare->children[2]->loc, "%s\n", + "Unhandled implicit memory in define_nodes_and_nets_with_driver"); } return new_net; @@ -1239,7 +1336,8 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local long i, j; char* temp_string; long sc_spot; - oassert(module_items->type == MODULE_ITEMS || module_items->type == FUNCTION_ITEMS || module_items->type == TASK_ITEMS || module_items->type == BLOCK); + oassert(module_items->type == MODULE_ITEMS || module_items->type == FUNCTION_ITEMS + || module_items->type == TASK_ITEMS || module_items->type == BLOCK); STRING_CACHE* local_symbol_table_sc = local_ref->local_symbol_table_sc; ast_node_t** local_symbol_table = local_ref->local_symbol_table; @@ -1257,23 +1355,23 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local ast_node_t* var_declare = module_items->children[i]->children[j]; /* parameters are already dealt with */ - if (var_declare->types.variable.is_parameter - || var_declare->types.variable.is_localparam + if (var_declare->types.variable.is_parameter || var_declare->types.variable.is_localparam || var_declare->types.variable.is_defparam) continue; oassert(var_declare->type == VAR_DECLARE); - oassert((var_declare->types.variable.is_input) || (var_declare->types.variable.is_output) || (var_declare->types.variable.is_reg) || (var_declare->types.variable.is_genvar) || (var_declare->types.variable.is_wire)); + oassert((var_declare->types.variable.is_input) || (var_declare->types.variable.is_output) + || (var_declare->types.variable.is_reg) || (var_declare->types.variable.is_genvar) + || (var_declare->types.variable.is_wire)); - if (var_declare->types.variable.is_input - && var_declare->types.variable.is_reg) { - error_message(NETLIST, var_declare->loc, "%s", - "Input cannot be defined as a reg\n"); + if (var_declare->types.variable.is_input && var_declare->types.variable.is_reg) { + error_message(NETLIST, var_declare->loc, "%s", "Input cannot be defined as a reg\n"); } /* make the string to add to the string cache */ - temp_string = make_full_ref_name(NULL, NULL, NULL, var_declare->identifier_node->types.identifier, -1); + temp_string + = make_full_ref_name(NULL, NULL, NULL, var_declare->identifier_node->types.identifier, -1); /* look for that element */ sc_spot = sc_add_string(local_symbol_table_sc, temp_string); @@ -1285,8 +1383,7 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local * Then update the stored string cache entry with information */ if (var_declare->types.variable.is_input && ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_reg) { - error_message(NETLIST, var_declare->loc, "%s", - "Input cannot be defined as a reg\n"); + error_message(NETLIST, var_declare->loc, "%s", "Input cannot be defined as a reg\n"); } /* MORE ERRORS ... could check for same declaration name ... */ else if (var_declare->types.variable.is_output) { @@ -1295,8 +1392,10 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local } else if ((var_declare->types.variable.is_reg) || (var_declare->types.variable.is_wire) || (var_declare->types.variable.is_genvar)) { /* copy the output status over */ - ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_wire = var_declare->types.variable.is_wire; - ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_reg = var_declare->types.variable.is_reg; + ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_wire + = var_declare->types.variable.is_wire; + ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_reg + = var_declare->types.variable.is_reg; } else { oassert(false && "invalid type"); } @@ -1305,7 +1404,8 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local local_symbol_table_sc->data[sc_spot] = (void*)var_declare; /* store the symbol */ - local_symbol_table = (ast_node_t**)vtr::realloc(local_symbol_table, sizeof(ast_node_t*) * (num_local_symbol_table + 1)); + local_symbol_table = (ast_node_t**)vtr::realloc( + local_symbol_table, sizeof(ast_node_t*) * (num_local_symbol_table + 1)); local_symbol_table[num_local_symbol_table] = (ast_node_t*)var_declare; num_local_symbol_table++; @@ -1328,14 +1428,20 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local } } else if (module_items->children[i]->type == ASSIGN) { /* might be an implicit declaration */ - if ((module_items->children[i]->children[0]) && (module_items->children[i]->children[0]->type == BLOCKING_STATEMENT)) { - if ((module_items->children[i]->children[0]->identifier_node) && (module_items->children[i]->children[0]->identifier_node->type == IDENTIFIERS)) { - temp_string = make_full_ref_name(NULL, NULL, NULL, module_items->children[i]->children[0]->identifier_node->types.identifier, -1); + if ((module_items->children[i]->children[0]) + && (module_items->children[i]->children[0]->type == BLOCKING_STATEMENT)) { + if ((module_items->children[i]->children[0]->identifier_node) + && (module_items->children[i]->children[0]->identifier_node->type == IDENTIFIERS)) { + temp_string = make_full_ref_name( + NULL, NULL, NULL, module_items->children[i]->children[0]->identifier_node->types.identifier, + -1); /* look for that element */ sc_spot = sc_lookup_string(local_symbol_table_sc, temp_string); if (sc_spot == -1) { - implicit_declarations = (ast_node_t**)vtr::realloc(implicit_declarations, sizeof(ast_node_t*) * (num_implicit_declarations + 1)); - implicit_declarations[num_implicit_declarations] = module_items->children[i]->children[0]->identifier_node; + implicit_declarations = (ast_node_t**)vtr::realloc( + implicit_declarations, sizeof(ast_node_t*) * (num_implicit_declarations + 1)); + implicit_declarations[num_implicit_declarations] + = module_items->children[i]->children[0]->identifier_node; num_implicit_declarations++; } vtr::free(temp_string); @@ -1368,7 +1474,8 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local local_symbol_table_sc->data[sc_spot] = (void*)var_declare; /* store the symbol */ - local_symbol_table = (ast_node_t**)vtr::realloc(local_symbol_table, sizeof(ast_node_t*) * (num_local_symbol_table + 1)); + local_symbol_table = (ast_node_t**)vtr::realloc(local_symbol_table, + sizeof(ast_node_t*) * (num_local_symbol_table + 1)); local_symbol_table[num_local_symbol_table] = (ast_node_t*)var_declare; num_local_symbol_table++; } else { @@ -1434,9 +1541,8 @@ void connect_memory_and_alias(ast_node_t* hb_instance, char* instance_name_prefi char* ip_name = hb_var_node->types.identifier; /* We can ignore inputs since they are already resolved */ - enum PORTS port_dir = (!strcmp(ip_name, "out") || !strcmp(ip_name, "out1") || !strcmp(ip_name, "out2")) - ? OUT_PORT - : IN_PORT; + enum PORTS port_dir + = (!strcmp(ip_name, "out") || !strcmp(ip_name, "out1") || !strcmp(ip_name, "out2")) ? OUT_PORT : IN_PORT; if ((port_dir == OUT_PORT) || (port_dir == INOUT_PORT)) { char* name_of_hb_input; char* full_name; @@ -1451,8 +1557,7 @@ void connect_memory_and_alias(ast_node_t* hb_instance, char* instance_name_prefi vtr::free(name_of_hb_input); } - alias_name = make_full_ref_name(instance_name_prefix, - hb_instance->identifier_node->types.identifier, + alias_name = make_full_ref_name(instance_name_prefix, hb_instance->identifier_node->types.identifier, hb_instance->children[0]->identifier_node->types.identifier, hb_connect_list->children[i]->identifier_node->types.identifier, -1); @@ -1473,25 +1578,26 @@ void connect_memory_and_alias(ast_node_t* hb_instance, char* instance_name_prefi full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_hb_input, -1); vtr::free(name_of_hb_input); - alias_name = make_full_ref_name(instance_name_prefix, - hb_instance->identifier_node->types.identifier, - hb_instance->children[0]->identifier_node->types.identifier, - hb_connect_list->children[i]->identifier_node->types.identifier, j); + alias_name + = make_full_ref_name(instance_name_prefix, hb_instance->identifier_node->types.identifier, + hb_instance->children[0]->identifier_node->types.identifier, + hb_connect_list->children[i]->identifier_node->types.identifier, j); } else { oassert(j == 0); /* this will crash because of an oassert. we keep it but we work around the problem here */ if (hb_instance_var_node->type == RANGE_REF) { full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, NULL, -1); } else { - name_of_hb_input = get_name_of_pin_at_bit(hb_instance_var_node, -1, instance_name_prefix, local_ref); + name_of_hb_input + = get_name_of_pin_at_bit(hb_instance_var_node, -1, instance_name_prefix, local_ref); full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_hb_input, j); vtr::free(name_of_hb_input); } - alias_name = make_full_ref_name(instance_name_prefix, - hb_instance->identifier_node->types.identifier, - hb_instance->children[0]->identifier_node->types.identifier, - hb_connect_list->children[i]->identifier_node->types.identifier, -1); + alias_name + = make_full_ref_name(instance_name_prefix, hb_instance->identifier_node->types.identifier, + hb_instance->children[0]->identifier_node->types.identifier, + hb_connect_list->children[i]->identifier_node->types.identifier, -1); } /* Search for the old_input name */ @@ -1509,7 +1615,8 @@ void connect_memory_and_alias(ast_node_t* hb_instance, char* instance_name_prefi input_nets_sc->data[sc_spot_input_new] = input_nets_sc->data[sc_spot_input_old]; } else { /* already exists so we'll join the nets */ - combine_nets((nnet_t*)input_nets_sc->data[sc_spot_input_old], (nnet_t*)input_nets_sc->data[sc_spot_input_new], syn_netlist); + combine_nets((nnet_t*)input_nets_sc->data[sc_spot_input_old], + (nnet_t*)input_nets_sc->data[sc_spot_input_new], syn_netlist); input_nets_sc->data[sc_spot_input_old] = NULL; } } else { @@ -1555,7 +1662,10 @@ void connect_memory_and_alias(ast_node_t* hb_instance, char* instance_name_prefi * Assume that ports are written in the same order as the instantiation. * Also, we will assume that the portwidths have to match *-------------------------------------------------------------------------*/ -void connect_hard_block_and_alias(ast_node_t* hb_instance, char* instance_name_prefix, int outport_size, sc_hierarchy* local_ref) { +void connect_hard_block_and_alias(ast_node_t* hb_instance, + char* instance_name_prefix, + int outport_size, + sc_hierarchy* local_ref) { t_model* hb_model; ast_node_t* hb_connect_list; long i; @@ -1567,7 +1677,8 @@ void connect_hard_block_and_alias(ast_node_t* hb_instance, char* instance_name_p char* identifier = hb_instance->identifier_node->types.identifier; hb_model = find_hard_block(identifier); if (!hb_model) { - error_message(NETLIST, hb_instance->loc, "Found Hard Block \"%s\": Not supported by FPGA Architecture\n", identifier); + error_message(NETLIST, hb_instance->loc, "Found Hard Block \"%s\": Not supported by FPGA Architecture\n", + identifier); } /* Note: Hard Block port matching is checked in earlier node processing */ @@ -1608,25 +1719,26 @@ void connect_hard_block_and_alias(ast_node_t* hb_instance, char* instance_name_p full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_hb_input, -1); vtr::free(name_of_hb_input); - alias_name = make_full_ref_name(instance_name_prefix, - hb_instance->identifier_node->types.identifier, - hb_instance->children[0]->identifier_node->types.identifier, - hb_connect_list->children[i]->identifier_node->types.identifier, j); + alias_name + = make_full_ref_name(instance_name_prefix, hb_instance->identifier_node->types.identifier, + hb_instance->children[0]->identifier_node->types.identifier, + hb_connect_list->children[i]->identifier_node->types.identifier, j); } else { oassert(j == 0); /* this will crash because of an oassert. we keep it but we work around the problem here */ if (hb_instance_var_node->type == RANGE_REF) { full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, NULL, -1); } else { - name_of_hb_input = get_name_of_pin_at_bit(hb_instance_var_node, -1, instance_name_prefix, local_ref); + name_of_hb_input + = get_name_of_pin_at_bit(hb_instance_var_node, -1, instance_name_prefix, local_ref); full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_hb_input, -1); vtr::free(name_of_hb_input); } - alias_name = make_full_ref_name(instance_name_prefix, - hb_instance->identifier_node->types.identifier, - hb_instance->children[0]->identifier_node->types.identifier, - hb_connect_list->children[i]->identifier_node->types.identifier, -1); + alias_name + = make_full_ref_name(instance_name_prefix, hb_instance->identifier_node->types.identifier, + hb_instance->children[0]->identifier_node->types.identifier, + hb_connect_list->children[i]->identifier_node->types.identifier, -1); } /* Search for the old_input name */ @@ -1648,7 +1760,8 @@ void connect_hard_block_and_alias(ast_node_t* hb_instance, char* instance_name_p input_nets_sc->data[sc_spot_input_new] = input_nets_sc->data[sc_spot_input_old]; } else { /* already exists so we'll join the nets */ - combine_nets((nnet_t*)input_nets_sc->data[sc_spot_input_old], (nnet_t*)input_nets_sc->data[sc_spot_input_new], syn_netlist); + combine_nets((nnet_t*)input_nets_sc->data[sc_spot_input_old], + (nnet_t*)input_nets_sc->data[sc_spot_input_new], syn_netlist); input_nets_sc->data[sc_spot_input_old] = NULL; } } else { @@ -1701,26 +1814,29 @@ void connect_hard_block_and_alias(ast_node_t* hb_instance, char* instance_name_p * Assume that ports are written in the same order as the instantiation. Also, * we will assume that the portwidths have to match *-------------------------------------------------------------------------*/ -void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_instance, char* instance_name_prefix, sc_hierarchy* local_ref) { +void connect_module_instantiation_and_alias(short PASS, + ast_node_t* module_instance, + char* instance_name_prefix, + sc_hierarchy* local_ref) { long i; int j; ast_node_t* module_node = NULL; ast_node_t* module_list = NULL; - ast_node_t* module_instance_list = module_instance->children[0]->children[0]; // MODULE_INSTANCE->MODULE_INSTANCE_NAME(child[0])->MODULE_CONNECT_LIST(child[0]) + ast_node_t* module_instance_list + = module_instance->children[0] + ->children[0]; // MODULE_INSTANCE->MODULE_INSTANCE_NAME(child[0])->MODULE_CONNECT_LIST(child[0]) long sc_spot; long sc_spot_output; long sc_spot_input_old; long sc_spot_input_new; - char* module_instance_name = make_full_ref_name(instance_name_prefix, - module_instance->identifier_node->types.identifier, - module_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* module_instance_name + = make_full_ref_name(instance_name_prefix, module_instance->identifier_node->types.identifier, + module_instance->children[0]->identifier_node->types.identifier, NULL, -1); /* lookup the node of the module associated with this instantiated module */ if ((sc_spot = sc_lookup_string(module_names_to_idx, module_instance_name)) == -1) { - error_message(NETLIST, module_instance->loc, - "Can't find module %s\n", module_instance_name); + error_message(NETLIST, module_instance->loc, "Can't find module %s\n", module_instance_name); } vtr::free(module_instance_name); @@ -1772,7 +1888,8 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta ast_node_t* node3 = module_var_node->children[2]; ast_node_t* node4 = module_var_node->children[3]; - oassert(node2->type == NUMBERS && node1->type == NUMBERS && node3->type == NUMBERS && node4->type == NUMBERS); + oassert(node2->type == NUMBERS && node1->type == NUMBERS && node3->type == NUMBERS + && node4->type == NUMBERS); /* assume all arrays declared [largest:smallest] */ oassert(node2->types.vnumber->get_value() <= node1->types.vnumber->get_value()); oassert(node4->types.vnumber->get_value() <= node3->types.vnumber->get_value()); @@ -1783,12 +1900,16 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta //--------------------------------------------------------------------------- else if (module_var_node->children[4] != NULL) { /* Implicit memory */ - error_message(NETLIST, module_var_node->children[4]->loc, "%s\n", "Unhandled implicit memory in connect_module_instantiation_and_alias"); + error_message(NETLIST, module_var_node->children[4]->loc, "%s\n", + "Unhandled implicit memory in connect_module_instantiation_and_alias"); } // IF - this condition creates the circuitry of the expressions used in the module list - if (module_instance_var_node->type == BINARY_OPERATION || module_instance_var_node->type == UNARY_OPERATION || module_instance_var_node->type == TERNARY_OPERATION || module_instance_var_node->type == CONCATENATE) { - input_signals = netlist_expand_ast_of_module(&(module_instance_var_node), instance_name_prefix, local_ref, port_size); + if (module_instance_var_node->type == BINARY_OPERATION || module_instance_var_node->type == UNARY_OPERATION + || module_instance_var_node->type == TERNARY_OPERATION + || module_instance_var_node->type == CONCATENATE) { + input_signals = netlist_expand_ast_of_module(&(module_instance_var_node), instance_name_prefix, + local_ref, port_size); // set a flag for the port to be recognized as an expression if (input_signals) has_resolved_with_circuitry = true; @@ -1819,7 +1940,9 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta * So, it will be padded with gnd net */ warning_message(NETLIST, module_instance_var_node->loc, - "The driver width of the port (%s) in module (%s) is less than the actual port width. Will be connected to gnd net.\n", port_name, module_instance->identifier_node->types.identifier); + "The driver width of the port (%s) in module (%s) is less than the actual " + "port width. Will be connected to gnd net.\n", + port_name, module_instance->identifier_node->types.identifier); npin_t* gnd_pin = get_zero_pin(syn_netlist); input_signal_net = gnd_pin->net; } else { @@ -1832,31 +1955,35 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta } else { if (port_size > 1) { /* Get the name of the module instantiation pin */ - name_of_module_instance_of_input = get_name_of_pin_at_bit(module_instance_var_node, j, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_module_instance_of_input, -1); + name_of_module_instance_of_input + = get_name_of_pin_at_bit(module_instance_var_node, j, instance_name_prefix, local_ref); + full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, + name_of_module_instance_of_input, -1); vtr::free(name_of_module_instance_of_input); /* make the new string for the alias name - has to be a identifier in the instantiated modules old names */ name_of_module_instance_of_input = get_name_of_var_declare_at_bit(module_var_node, j); - alias_name = make_full_ref_name(instance_name_prefix, - module_instance->identifier_node->types.identifier, - module_instance->children[0]->identifier_node->types.identifier, - name_of_module_instance_of_input, -1); + alias_name = make_full_ref_name( + instance_name_prefix, module_instance->identifier_node->types.identifier, + module_instance->children[0]->identifier_node->types.identifier, + name_of_module_instance_of_input, -1); vtr::free(name_of_module_instance_of_input); } else { oassert(j == 0); /* Get the name of the module instantiation pin */ - name_of_module_instance_of_input = get_name_of_pin_at_bit(module_instance_var_node, -1, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_module_instance_of_input, -1); + name_of_module_instance_of_input + = get_name_of_pin_at_bit(module_instance_var_node, -1, instance_name_prefix, local_ref); + full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, + name_of_module_instance_of_input, -1); vtr::free(name_of_module_instance_of_input); name_of_module_instance_of_input = get_name_of_var_declare_at_bit(module_var_node, 0); - alias_name = make_full_ref_name(instance_name_prefix, - module_instance->identifier_node->types.identifier, - module_instance->children[0]->identifier_node->types.identifier, - name_of_module_instance_of_input, -1); + alias_name = make_full_ref_name( + instance_name_prefix, module_instance->identifier_node->types.identifier, + module_instance->children[0]->identifier_node->types.identifier, + name_of_module_instance_of_input, -1); vtr::free(name_of_module_instance_of_input); } @@ -1865,11 +1992,16 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta /* search for the old_input name */ if ((sc_spot_input_old = sc_lookup_string(input_nets_sc, alias_name)) == -1) { /* doesn it have to exist since might only be used in module */ - char* full_port_name = make_full_ref_name(module_instance->children[0]->identifier_node->types.identifier, NULL, port_name, NULL, -1); + char* full_port_name = make_full_ref_name( + module_instance->children[0]->identifier_node->types.identifier, NULL, port_name, NULL, -1); if (port_size > 1) { - warning_message(NETLIST, module_instance_var_node->loc, "This module port %s[%d] is unused in module %s\n", full_port_name, j, module_node->identifier_node->types.identifier); + warning_message(NETLIST, module_instance_var_node->loc, + "This module port %s[%d] is unused in module %s\n", full_port_name, j, + module_node->identifier_node->types.identifier); } else { - warning_message(NETLIST, module_instance_var_node->loc, "This module port %s is unused in module %s\n", full_port_name, module_node->identifier_node->types.identifier); + warning_message(NETLIST, module_instance_var_node->loc, + "This module port %s is unused in module %s\n", full_port_name, + module_node->identifier_node->types.identifier); } vtr::free(full_port_name); @@ -1907,7 +2039,8 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta module_var_node->identifier_node->types.identifier) != 0) { error_message(NETLIST, module_var_node->loc, - "This module entry does not match up correctly (%s != %s). Odin expects the order of ports to be the same\n", + "This module entry does not match up correctly (%s != %s). Odin expects the " + "order of ports to be the same\n", module_instance_list->children[i]->identifier_node->types.identifier, module_var_node->identifier_node->types.identifier); } @@ -1926,33 +2059,39 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta * instantiated modules old names */ if (port_size > 1) { /* Get the name of the module instantiation pin */ - name_of_module_instance_of_input = get_name_of_pin_at_bit(module_instance_var_node, j, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_module_instance_of_input, -1); + name_of_module_instance_of_input + = get_name_of_pin_at_bit(module_instance_var_node, j, instance_name_prefix, local_ref); + full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, + name_of_module_instance_of_input, -1); vtr::free(name_of_module_instance_of_input); name_of_module_instance_of_input = get_name_of_var_declare_at_bit(module_var_node, j); alias_name = make_full_ref_name(instance_name_prefix, module_instance->identifier_node->types.identifier, - module_instance->children[0]->identifier_node->types.identifier, name_of_module_instance_of_input, -1); + module_instance->children[0]->identifier_node->types.identifier, + name_of_module_instance_of_input, -1); vtr::free(name_of_module_instance_of_input); } else { oassert(j == 0); /* Get the name of the module instantiation pin */ - name_of_module_instance_of_input = get_name_of_pin_at_bit(module_instance_var_node, -1, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_module_instance_of_input, -1); + name_of_module_instance_of_input + = get_name_of_pin_at_bit(module_instance_var_node, -1, instance_name_prefix, local_ref); + full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, + name_of_module_instance_of_input, -1); vtr::free(name_of_module_instance_of_input); name_of_module_instance_of_input = get_name_of_var_declare_at_bit(module_var_node, 0); alias_name = make_full_ref_name(instance_name_prefix, module_instance->identifier_node->types.identifier, - module_instance->children[0]->identifier_node->types.identifier, name_of_module_instance_of_input, -1); + module_instance->children[0]->identifier_node->types.identifier, + name_of_module_instance_of_input, -1); vtr::free(name_of_module_instance_of_input); } /* check if the instantiation pin exists. */ if ((sc_spot_output = sc_lookup_string(output_nets_sc, alias_name)) == -1) { - error_message(NETLIST, module_var_node->loc, - "This output (%s) must exist...must be an error\n", alias_name); + error_message(NETLIST, module_var_node->loc, "This output (%s) must exist...must be an error\n", + alias_name); } /* can already be there */ @@ -1979,9 +2118,12 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta /* IF the designer users port names then make sure they line up */ if (module_instance_list->children[i]->identifier_node != NULL) { - if (strcmp(module_instance_list->children[i]->identifier_node->types.identifier, module_var_node->identifier_node->types.identifier) != 0) { + if (strcmp(module_instance_list->children[i]->identifier_node->types.identifier, + module_var_node->identifier_node->types.identifier) + != 0) { error_message(NETLIST, module_var_node->loc, - "This module entry does not match up correctly (%s != %s). Odin expects the order of ports to be the same\n", + "This module entry does not match up correctly (%s != %s). Odin expects the " + "order of ports to be the same\n", module_instance_list->children[i]->identifier_node->types.identifier, module_var_node->identifier_node->types.identifier); } @@ -1997,7 +2139,10 @@ void connect_module_instantiation_and_alias(short PASS, ast_node_t* module_insta } } -signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* function_instance, char* instance_name_prefix, sc_hierarchy* local_ref) { +signal_list_t* connect_function_instantiation_and_alias(short PASS, + ast_node_t* function_instance, + char* instance_name_prefix, + sc_hierarchy* local_ref) { signal_list_t* return_list = init_signal_list(); long i; @@ -2005,7 +2150,9 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* //signal_list_t *aux_node = NULL; ast_node_t* function_node = NULL; ast_node_t* function_list = NULL; - ast_node_t* function_instance_list = function_instance->children[0]->children[0]; // function_INSTANCE->function_INSTANCE_NAME(child[0])->function_CONNECT_LIST(child[0]) + ast_node_t* function_instance_list + = function_instance->children[0] + ->children[0]; // function_INSTANCE->function_INSTANCE_NAME(child[0])->function_CONNECT_LIST(child[0]) long sc_spot; long sc_spot_output; long sc_spot_input_old; @@ -2015,8 +2162,7 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* /* lookup the node of the function associated with this instantiated function */ if ((sc_spot = sc_lookup_string(module_names_to_idx, function_instance_name)) == -1) { - error_message(NETLIST, function_instance->loc, - "Can't find function %s\n", function_instance_name); + error_message(NETLIST, function_instance->loc, "Can't find function %s\n", function_instance_name); } if (function_instance_name != function_instance->identifier_node->types.identifier) @@ -2043,7 +2189,8 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* ast_node_t* function_var_node = function_list->children[i]; ast_node_t* function_instance_var_node = NULL; - if (i > 0) function_instance_var_node = function_instance_list->children[i]->children[0]; + if (i > 0) + function_instance_var_node = function_instance_list->children[i]->children[0]; if ( // skip inputs on pass 1 @@ -2056,10 +2203,13 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* /* IF the designer users port names then make sure they line up */ // TODO: This code may need to be moved down the line if (i > 0 && function_instance_list->children[i]->identifier_node != NULL) { - if (strcmp(function_instance_list->children[i]->identifier_node->types.identifier, function_var_node->identifier_node->types.identifier) != 0) { + if (strcmp(function_instance_list->children[i]->identifier_node->types.identifier, + function_var_node->identifier_node->types.identifier) + != 0) { // TODO: This error message may not be correct. If assigning by name, the order should not matter error_message(NETLIST, function_var_node->loc, - "This function entry does not match up correctly (%s != %s). Odin expects the order of ports to be the same\n", + "This function entry does not match up correctly (%s != %s). Odin expects the order of " + "ports to be the same\n", function_instance_list->children[i]->identifier_node->types.identifier, function_var_node->identifier_node->types.identifier); } @@ -2072,12 +2222,12 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* if (function_var_node->children[0] == NULL) { port_size = 1; } else if (function_var_node->children[2] == NULL) { - char* function_name = make_full_ref_name(instance_name_prefix, - // function_name - function_instance->identifier_node->types.identifier, - // instance name - function_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* function_name + = make_full_ref_name(instance_name_prefix, + // function_name + function_instance->identifier_node->types.identifier, + // instance name + function_instance->children[0]->identifier_node->types.identifier, NULL, -1); ast_node_t* node1 = function_var_node->children[0]; ast_node_t* node2 = function_var_node->children[1]; @@ -2088,12 +2238,12 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* oassert(node2->types.vnumber->get_value() <= node1->types.vnumber->get_value()); port_size = node1->types.vnumber->get_value() - node2->types.vnumber->get_value() + 1; } else if (function_var_node->children[4] == NULL) { - char* function_name = make_full_ref_name(instance_name_prefix, - // function_name - function_instance->identifier_node->types.identifier, - // instance name - function_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* function_name + = make_full_ref_name(instance_name_prefix, + // function_name + function_instance->identifier_node->types.identifier, + // instance name + function_instance->children[0]->identifier_node->types.identifier, NULL, -1); ast_node_t* node1 = function_var_node->children[0]; ast_node_t* node2 = function_var_node->children[1]; @@ -2101,7 +2251,8 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* ast_node_t* node4 = function_var_node->children[3]; free(function_name); - oassert(node2->type == NUMBERS && node1->type == NUMBERS && node3->type == NUMBERS && node4->type == NUMBERS); + oassert(node2->type == NUMBERS && node1->type == NUMBERS && node3->type == NUMBERS + && node4->type == NUMBERS); /* assume all arrays declared [largest:smallest] */ oassert(node2->types.vnumber->get_value() <= node1->types.vnumber->get_value()); oassert(node4->types.vnumber->get_value() <= node3->types.vnumber->get_value()); @@ -2111,12 +2262,18 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* //----------------------------------------------------------------------------------- else if (function_var_node->children[4] != NULL) { /* Implicit memory */ - error_message(NETLIST, function_var_node->children[4]->loc, "%s\n", "Unhandled implicit memory in connect_function_instantiation_and_alias"); + error_message(NETLIST, function_var_node->children[4]->loc, "%s\n", + "Unhandled implicit memory in connect_function_instantiation_and_alias"); } // IF - this condition creates the circuitry of the expressions used in the function list - if (i > 0 && (function_instance_var_node->type == BINARY_OPERATION || function_instance_var_node->type == UNARY_OPERATION || function_instance_var_node->type == TERNARY_OPERATION || function_instance_var_node->type == CONCATENATE)) { - input_signals = netlist_expand_ast_of_module(&(function_instance_var_node), instance_name_prefix, local_ref, port_size); + if (i > 0 + && (function_instance_var_node->type == BINARY_OPERATION + || function_instance_var_node->type == UNARY_OPERATION + || function_instance_var_node->type == TERNARY_OPERATION + || function_instance_var_node->type == CONCATENATE)) { + input_signals = netlist_expand_ast_of_module(&(function_instance_var_node), instance_name_prefix, local_ref, + port_size); // set a flag for the port to be recognized as an expression if (input_signals) has_resolved_with_circuitry = true; @@ -2136,10 +2293,10 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* if (has_resolved_with_circuitry) { /* create the unique name for this gate */ - alias_name = make_full_ref_name(instance_name_prefix, - function_instance->identifier_node->types.identifier, - function_instance->children[0]->identifier_node->types.identifier, - port_name, (port_size == 1) ? -1 : j); + alias_name + = make_full_ref_name(instance_name_prefix, function_instance->identifier_node->types.identifier, + function_instance->children[0]->identifier_node->types.identifier, + port_name, (port_size == 1) ? -1 : j); if (j >= input_signals->count) { /* @@ -2147,7 +2304,9 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* * So, it will be padded with gnd net */ warning_message(NETLIST, function_instance_var_node->loc, - "The driver width of the port (%s) in function (%s) is less than the actual port width. Will be connected to gnd net.\n", port_name, function_instance->identifier_node->types.identifier); + "The driver width of the port (%s) in function (%s) is less than the actual " + "port width. Will be connected to gnd net.\n", + port_name, function_instance->identifier_node->types.identifier); npin_t* gnd_pin = get_zero_pin(syn_netlist); input_signal_net = gnd_pin->net; } else { @@ -2160,31 +2319,35 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* } else { if (port_size > 1) { /* Get the name of the function instantiation pin */ - name_of_function_instance_of_input = get_name_of_pin_at_bit(function_instance_var_node, j, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_function_instance_of_input, -1); + name_of_function_instance_of_input + = get_name_of_pin_at_bit(function_instance_var_node, j, instance_name_prefix, local_ref); + full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, + name_of_function_instance_of_input, -1); vtr::free(name_of_function_instance_of_input); /* make the new string for the alias name - has to be a identifier in the instantiated functions old names */ name_of_function_instance_of_input = get_name_of_var_declare_at_bit(function_var_node, j); - alias_name = make_full_ref_name(instance_name_prefix, - function_instance->identifier_node->types.identifier, - function_instance->children[0]->identifier_node->types.identifier, - name_of_function_instance_of_input, -1); + alias_name = make_full_ref_name( + instance_name_prefix, function_instance->identifier_node->types.identifier, + function_instance->children[0]->identifier_node->types.identifier, + name_of_function_instance_of_input, -1); vtr::free(name_of_function_instance_of_input); } else { oassert(j == 0); /* Get the name of the function instantiation pin */ - name_of_function_instance_of_input = get_name_of_pin_at_bit(function_instance_var_node, -1, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_function_instance_of_input, -1); + name_of_function_instance_of_input + = get_name_of_pin_at_bit(function_instance_var_node, -1, instance_name_prefix, local_ref); + full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, + name_of_function_instance_of_input, -1); vtr::free(name_of_function_instance_of_input); name_of_function_instance_of_input = get_name_of_var_declare_at_bit(function_var_node, 0); - alias_name = make_full_ref_name(instance_name_prefix, - function_instance->identifier_node->types.identifier, - function_instance->children[0]->identifier_node->types.identifier, - name_of_function_instance_of_input, -1); + alias_name = make_full_ref_name( + instance_name_prefix, function_instance->identifier_node->types.identifier, + function_instance->children[0]->identifier_node->types.identifier, + name_of_function_instance_of_input, -1); vtr::free(name_of_function_instance_of_input); } @@ -2193,11 +2356,16 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* /* search for the old_input name */ if ((sc_spot_input_old = sc_lookup_string(input_nets_sc, alias_name)) == -1) { /* doesn it have to exist since might only be used in function */ - char* full_port_name = make_full_ref_name(function_instance->children[0]->identifier_node->types.identifier, NULL, port_name, NULL, -1); + char* full_port_name = make_full_ref_name( + function_instance->children[0]->identifier_node->types.identifier, NULL, port_name, NULL, -1); if (port_size > 1) { - warning_message(NETLIST, function_instance_var_node->loc, "This function port %s[%d] is unused in module %s\n", full_port_name, j, function_node->identifier_node->types.identifier); + warning_message(NETLIST, function_instance_var_node->loc, + "This function port %s[%d] is unused in module %s\n", full_port_name, j, + function_node->identifier_node->types.identifier); } else { - warning_message(NETLIST, function_instance_var_node->loc, "This function port %s is unused in module %s\n", full_port_name, function_node->identifier_node->types.identifier); + warning_message(NETLIST, function_instance_var_node->loc, + "This function port %s is unused in module %s\n", full_port_name, + function_node->identifier_node->types.identifier); } vtr::free(full_port_name); @@ -2235,7 +2403,8 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* function_var_node->identifier_node->types.identifier) != 0) { error_message(NETLIST, function_var_node->loc, - "This function entry does not match up correctly (%s != %s). Odin expects the order of ports to be the same\n", + "This function entry does not match up correctly (%s != %s). Odin expects the " + "order of ports to be the same\n", function_instance_list->children[i]->identifier_node->types.identifier, function_var_node->identifier_node->types.identifier); } @@ -2263,9 +2432,10 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* name_of_function_instance_of_input = get_name_of_var_declare_at_bit(function_var_node, j); - alias_name = make_full_ref_name(instance_name_prefix, - function_instance->identifier_node->types.identifier, - function_instance->children[0]->identifier_node->types.identifier, name_of_function_instance_of_input, -1); + alias_name + = make_full_ref_name(instance_name_prefix, function_instance->identifier_node->types.identifier, + function_instance->children[0]->identifier_node->types.identifier, + name_of_function_instance_of_input, -1); vtr::free(name_of_function_instance_of_input); @@ -2281,17 +2451,18 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* name_of_function_instance_of_input = get_name_of_var_declare_at_bit(function_var_node, 0); - alias_name = make_full_ref_name(instance_name_prefix, - function_instance->identifier_node->types.identifier, - function_instance->children[0]->identifier_node->types.identifier, name_of_function_instance_of_input, -1); + alias_name + = make_full_ref_name(instance_name_prefix, function_instance->identifier_node->types.identifier, + function_instance->children[0]->identifier_node->types.identifier, + name_of_function_instance_of_input, -1); vtr::free(name_of_function_instance_of_input); } /* check if the instantiation pin exists. */ if ((sc_spot_output = sc_lookup_string(output_nets_sc, alias_name)) == -1) { - error_message(NETLIST, function_var_node->loc, - "This output (%s) must exist...must be an error\n", alias_name); + error_message(NETLIST, function_var_node->loc, "This output (%s) must exist...must be an error\n", + alias_name); } /* can already be there */ @@ -2337,7 +2508,10 @@ signal_list_t* connect_function_instantiation_and_alias(short PASS, ast_node_t* * (function: connect_task_instantiation_and_alias) *-------------------------------------------------------------------------------------------*/ -signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task_instance, char* instance_name_prefix, sc_hierarchy* local_ref) { +signal_list_t* connect_task_instantiation_and_alias(short PASS, + ast_node_t* task_instance, + char* instance_name_prefix, + sc_hierarchy* local_ref) { signal_list_t* return_list = init_signal_list(); long i; @@ -2345,7 +2519,8 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task //signal_list_t *aux_node = NULL; ast_node_t* task_node = NULL; ast_node_t* task_list = NULL; - ast_node_t* task_instance_list = task_instance->children[0]->children[0]; // TASK_INSTANCE->TASK_NAMED_INSTANCE->TASK_CONNECT_LIST(child[0]) + ast_node_t* task_instance_list + = task_instance->children[0]->children[0]; // TASK_INSTANCE->TASK_NAMED_INSTANCE->TASK_CONNECT_LIST(child[0]) long sc_spot; long sc_spot_output; long sc_spot_input_old; @@ -2354,8 +2529,7 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task /* lookup the node of the task associated with this instantiated task */ if ((sc_spot = sc_lookup_string(module_names_to_idx, task_instance_name)) == -1) { - error_message(NETLIST, task_instance->loc, - "Can't find task %s\n", task_instance_name); + error_message(NETLIST, task_instance->loc, "Can't find task %s\n", task_instance_name); } if (task_instance_name != task_instance->identifier_node->types.identifier) @@ -2393,10 +2567,13 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task /* IF the designer users port names then make sure they line up */ // TODO: This code may need to be moved down the line if (i > 0 && task_instance_list->children[i]->identifier_node != NULL) { - if (strcmp(task_instance_list->children[i]->identifier_node->types.identifier, task_var_node->identifier_node->types.identifier) != 0) { + if (strcmp(task_instance_list->children[i]->identifier_node->types.identifier, + task_var_node->identifier_node->types.identifier) + != 0) { // TODO: This error message may not be correct. If assigning by name, the order should not matter error_message(NETLIST, task_var_node->loc, - "This task entry does not match up correctly (%s != %s). Odin expects the order of ports to be the same\n", + "This task entry does not match up correctly (%s != %s). Odin expects the order of " + "ports to be the same\n", task_instance_list->children[i]->identifier_node->types.identifier, task_var_node->identifier_node->types.identifier); } @@ -2409,12 +2586,12 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task if (task_var_node->children[0] == NULL) { port_size = 1; } else if (task_var_node->children[2] == NULL) { - char* task_name = make_full_ref_name(instance_name_prefix, - // task_name - task_instance->identifier_node->types.identifier, - // instance name - task_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* task_name + = make_full_ref_name(instance_name_prefix, + // task_name + task_instance->identifier_node->types.identifier, + // instance name + task_instance->children[0]->identifier_node->types.identifier, NULL, -1); ast_node_t* node1 = task_var_node->children[0]; ast_node_t* node2 = task_var_node->children[1]; @@ -2425,12 +2602,12 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task oassert(node2->types.vnumber->get_value() <= node1->types.vnumber->get_value()); port_size = node1->types.vnumber->get_value() - node2->types.vnumber->get_value() + 1; } else if (task_var_node->children[4] == NULL) { - char* task_name = make_full_ref_name(instance_name_prefix, - // task_name - task_instance->identifier_node->types.identifier, - // instance name - task_instance->children[0]->identifier_node->types.identifier, - NULL, -1); + char* task_name + = make_full_ref_name(instance_name_prefix, + // task_name + task_instance->identifier_node->types.identifier, + // instance name + task_instance->children[0]->identifier_node->types.identifier, NULL, -1); ast_node_t* node1 = task_var_node->children[0]; ast_node_t* node2 = task_var_node->children[1]; @@ -2438,7 +2615,8 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task ast_node_t* node4 = task_var_node->children[3]; vtr::free(task_name); - oassert(node2->type == NUMBERS && node1->type == NUMBERS && node3->type == NUMBERS && node4->type == NUMBERS); + oassert(node2->type == NUMBERS && node1->type == NUMBERS && node3->type == NUMBERS + && node4->type == NUMBERS); /* assume all arrays declared [largest:smallest] */ oassert(node2->types.vnumber->get_value() <= node1->types.vnumber->get_value()); oassert(node4->types.vnumber->get_value() <= node3->types.vnumber->get_value()); @@ -2448,12 +2626,15 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task //----------------------------------------------------------------------------------- else if (task_var_node->children[4] != NULL) { /* Implicit memory */ - error_message(NETLIST, task_var_node->children[4]->loc, "%s\n", "Unhandled implicit memory in connect_task_instantiation_and_alias"); + error_message(NETLIST, task_var_node->children[4]->loc, "%s\n", + "Unhandled implicit memory in connect_task_instantiation_and_alias"); } // IF - this condition creates the circuitry of the expressions used in the task list - if (task_instance_var_node->type == BINARY_OPERATION || task_instance_var_node->type == UNARY_OPERATION || task_instance_var_node->type == TERNARY_OPERATION || task_instance_var_node->type == CONCATENATE) { - input_signals = netlist_expand_ast_of_module(&(task_instance_var_node), instance_name_prefix, local_ref, port_size); + if (task_instance_var_node->type == BINARY_OPERATION || task_instance_var_node->type == UNARY_OPERATION + || task_instance_var_node->type == TERNARY_OPERATION || task_instance_var_node->type == CONCATENATE) { + input_signals + = netlist_expand_ast_of_module(&(task_instance_var_node), instance_name_prefix, local_ref, port_size); // set a flag for the port to be recognized as an expression if (input_signals) has_resolved_with_circuitry = true; @@ -2473,10 +2654,10 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task if (has_resolved_with_circuitry) { /* create the unique name for this gate */ - alias_name = make_full_ref_name(instance_name_prefix, - task_instance->identifier_node->types.identifier, - task_instance->children[0]->identifier_node->types.identifier, - port_name, (port_size == 1) ? -1 : j); + alias_name + = make_full_ref_name(instance_name_prefix, task_instance->identifier_node->types.identifier, + task_instance->children[0]->identifier_node->types.identifier, port_name, + (port_size == 1) ? -1 : j); if (j >= input_signals->count) { /* @@ -2484,7 +2665,9 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task * So, it will be padded with gnd net */ warning_message(NETLIST, task_instance_var_node->loc, - "The driver width of the port (%s) in task (%s) is less than the actual port width. Will be connected to gnd net.\n", port_name, task_instance->identifier_node->types.identifier); + "The driver width of the port (%s) in task (%s) is less than the actual port " + "width. Will be connected to gnd net.\n", + port_name, task_instance->identifier_node->types.identifier); npin_t* gnd_pin = get_zero_pin(syn_netlist); input_signal_net = gnd_pin->net; } else { @@ -2497,31 +2680,35 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task } else { if (port_size > 1) { /* Get the name of the task instantiation pin */ - name_of_task_instance_of_input = get_name_of_pin_at_bit(task_instance_var_node, j, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); + name_of_task_instance_of_input + = get_name_of_pin_at_bit(task_instance_var_node, j, instance_name_prefix, local_ref); + full_name + = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); vtr::free(name_of_task_instance_of_input); /* make the new string for the alias name - has to be a identifier in the instantiated tasks old names */ name_of_task_instance_of_input = get_name_of_var_declare_at_bit(task_var_node, j); - alias_name = make_full_ref_name(instance_name_prefix, - task_instance->identifier_node->types.identifier, - task_instance->children[0]->identifier_node->types.identifier, - name_of_task_instance_of_input, -1); + alias_name + = make_full_ref_name(instance_name_prefix, task_instance->identifier_node->types.identifier, + task_instance->children[0]->identifier_node->types.identifier, + name_of_task_instance_of_input, -1); vtr::free(name_of_task_instance_of_input); } else { oassert(j == 0); /* Get the name of the task instantiation pin */ - name_of_task_instance_of_input = get_name_of_pin_at_bit(task_instance_var_node, -1, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); + name_of_task_instance_of_input + = get_name_of_pin_at_bit(task_instance_var_node, -1, instance_name_prefix, local_ref); + full_name + = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); vtr::free(name_of_task_instance_of_input); name_of_task_instance_of_input = get_name_of_var_declare_at_bit(task_var_node, 0); - alias_name = make_full_ref_name(instance_name_prefix, - task_instance->identifier_node->types.identifier, - task_instance->children[0]->identifier_node->types.identifier, - name_of_task_instance_of_input, -1); + alias_name + = make_full_ref_name(instance_name_prefix, task_instance->identifier_node->types.identifier, + task_instance->children[0]->identifier_node->types.identifier, + name_of_task_instance_of_input, -1); vtr::free(name_of_task_instance_of_input); } @@ -2530,11 +2717,16 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task /* search for the old_input name */ if ((sc_spot_input_old = sc_lookup_string(input_nets_sc, alias_name)) == -1) { /* doesn it have to exist since might only be used in the task */ - char* full_port_name = make_full_ref_name(task_instance->children[0]->identifier_node->types.identifier, NULL, port_name, NULL, -1); + char* full_port_name = make_full_ref_name( + task_instance->children[0]->identifier_node->types.identifier, NULL, port_name, NULL, -1); if (port_size > 1) { - warning_message(NETLIST, task_instance_var_node->loc, "This task port %s[%d] is unused in module %s\n", full_port_name, j, task_node->identifier_node->types.identifier); + warning_message(NETLIST, task_instance_var_node->loc, + "This task port %s[%d] is unused in module %s\n", full_port_name, j, + task_node->identifier_node->types.identifier); } else { - warning_message(NETLIST, task_instance_var_node->loc, "This task port %s is unused in module %s\n", full_port_name, task_node->identifier_node->types.identifier); + warning_message(NETLIST, task_instance_var_node->loc, + "This task port %s is unused in module %s\n", full_port_name, + task_node->identifier_node->types.identifier); } vtr::free(full_port_name); @@ -2572,7 +2764,8 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task task_var_node->identifier_node->types.identifier) != 0) { error_message(NETLIST, task_var_node->loc, - "This task entry does not match up correctly (%s != %s). Odin expects the order of ports to be the same\n", + "This task entry does not match up correctly (%s != %s). Odin expects the order " + "of ports to be the same\n", task_instance_list->children[i]->identifier_node->types.identifier, task_var_node->identifier_node->types.identifier); } @@ -2593,42 +2786,50 @@ signal_list_t* connect_task_instantiation_and_alias(short PASS, ast_node_t* task * instantiated tasks old names */ if (port_size > 1) { /* Get the name of the task instantiation pin */ - name_of_task_instance_of_input = get_name_of_pin_at_bit(task_instance_var_node, j, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); + name_of_task_instance_of_input + = get_name_of_pin_at_bit(task_instance_var_node, j, instance_name_prefix, local_ref); + full_name + = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); vtr::free(name_of_task_instance_of_input); name_of_task_instance_of_input = get_name_of_var_declare_at_bit(task_var_node, j); - alias_name = make_full_ref_name(instance_name_prefix, - task_instance->identifier_node->types.identifier, - task_instance->children[0]->identifier_node->types.identifier, name_of_task_instance_of_input, -1); + alias_name + = make_full_ref_name(instance_name_prefix, task_instance->identifier_node->types.identifier, + task_instance->children[0]->identifier_node->types.identifier, + name_of_task_instance_of_input, -1); vtr::free(name_of_task_instance_of_input); } else { oassert(j == 0); /* Get the name of the task instantiation pin */ - name_of_task_instance_of_input = get_name_of_pin_at_bit(task_instance_var_node, -1, instance_name_prefix, local_ref); - full_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); + name_of_task_instance_of_input + = get_name_of_pin_at_bit(task_instance_var_node, -1, instance_name_prefix, local_ref); + full_name + = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); vtr::free(name_of_task_instance_of_input); name_of_task_instance_of_input = NULL; name_of_task_instance_of_input = get_name_of_var_declare_at_bit(task_var_node, 0); - alias_name = make_full_ref_name(instance_name_prefix, - task_instance->identifier_node->types.identifier, - task_instance->children[0]->identifier_node->types.identifier, name_of_task_instance_of_input, -1); + alias_name + = make_full_ref_name(instance_name_prefix, task_instance->identifier_node->types.identifier, + task_instance->children[0]->identifier_node->types.identifier, + name_of_task_instance_of_input, -1); vtr::free(name_of_task_instance_of_input); } /* check if the instantiation pin exists. */ if ((sc_spot_output = sc_lookup_string(output_nets_sc, alias_name)) == -1) { - error_message(NETLIST, task_var_node->loc, - "This output (%s) must exist...must be an error\n", alias_name); + error_message(NETLIST, task_var_node->loc, "This output (%s) must exist...must be an error\n", + alias_name); } /* Copy over the initial value data from the net alias to the corresponding * flip-flop node if one exists. This is necessary if an initial value is * assigned on a higher-level task since the flip-flop node will have * already been instantiated without any initial value. */ - name_of_task_instance_of_input = get_name_of_pin_at_bit(task_instance_var_node, j, instance_name_prefix, local_ref); - char* pin_name = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); + name_of_task_instance_of_input + = get_name_of_pin_at_bit(task_instance_var_node, j, instance_name_prefix, local_ref); + char* pin_name + = make_full_ref_name(instance_name_prefix, NULL, NULL, name_of_task_instance_of_input, -1); nnet_t* output_net = (nnet_t*)output_nets_sc->data[sc_spot_output]; npin_t* new_pin2 = allocate_npin(); @@ -2662,8 +2863,7 @@ signal_list_t* create_pins(ast_node_t* var_declare, char* name, char* instance_n nnet_t* new_in_net; char_list_t* pin_lists = NULL; - oassert((!name || !var_declare) - && "Invalid state or internal error"); + oassert((!name || !var_declare) && "Invalid state or internal error"); if (name == NULL) { /* get all the pins */ pin_lists = get_name_of_pins_with_prefix(var_declare, instance_name_prefix, local_ref); @@ -2768,7 +2968,10 @@ signal_list_t* create_output_pin(ast_node_t* var_declare, char* instance_name_pr /*--------------------------------------------------------------------------------------------- * (function: assignment_alias) *-------------------------------------------------------------------------------------------*/ -signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* assignment_alias(ast_node_t* assignment, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { ast_node_t* left = assignment->children[0]; ast_node_t* right = assignment->children[1]; @@ -2783,15 +2986,17 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref /* process the signal for the input gate */ if (right_memory) { if (!is_valid_implicit_memory_reference_ast(instance_name_prefix, right)) - error_message(NETLIST, assignment->loc, - "Invalid addressing mode for implicit memory %s.\n", right_memory->name); + error_message(NETLIST, assignment->loc, "Invalid addressing mode for implicit memory %s.\n", + right_memory->name); - signal_list_t* address = netlist_expand_ast_of_module(&(right->children[0]), instance_name_prefix, local_ref, assignment_size); + signal_list_t* address + = netlist_expand_ast_of_module(&(right->children[0]), instance_name_prefix, local_ref, assignment_size); // Pad/shrink the address to the depth of the memory. if (address->count == 0) { warning_message(NETLIST, assignment->loc, - "indexing into memory with %s has address of length 0, skipping memory read", instance_name_prefix); + "indexing into memory with %s has address of length 0, skipping memory read", + instance_name_prefix); } else { if (address->count != right_memory->addr_width) { if (address->count > right_memory->addr_width) { @@ -2801,10 +3006,12 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref unused_pins_name = unused_pins_name + " " + address->pins[i]->name; } warning_message(NETLIST, assignment->loc, - "indexing into memory with %s has larger input than memory. Unused pins: %s", instance_name_prefix, unused_pins_name.c_str()); + "indexing into memory with %s has larger input than memory. Unused pins: %s", + instance_name_prefix, unused_pins_name.c_str()); } else { warning_message(NETLIST, assignment->loc, - "indexing into memory with %s has smaller input than memory. Padding with GND", instance_name_prefix); + "indexing into memory with %s has smaller input than memory. Padding with GND", + instance_name_prefix); } while (address->count < right_memory->addr_width) @@ -2822,7 +3029,8 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref bool first_address_is_connected = is_signal_list_connected_to_memory(right_memory, address, "addr1"); bool second_address_is_connected = is_signal_list_connected_to_memory(right_memory, address, "addr2"); - bool memory_is_single_port = !strcmp(right_memory_ast_node->identifier_node->types.identifier, SINGLE_PORT_RAM_string); + bool memory_is_single_port + = !strcmp(right_memory_ast_node->identifier_node->types.identifier, SINGLE_PORT_RAM_string); if (memory_is_single_port && !first_address_is_connected) { if (right_memory->node->input_pins) { @@ -2830,7 +3038,8 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref if (address_port && !strcmp(address_port, "addr1")) { // changing to a dual-port ram, since the first port is already connected - ast_node_t* identifier_node = create_tree_node_id(vtr::strdup(DUAL_PORT_RAM_string), assignment->loc); + ast_node_t* identifier_node + = create_tree_node_id(vtr::strdup(DUAL_PORT_RAM_string), assignment->loc); // free the default identifier node (spram) if (right_memory_ast_node->identifier_node) { @@ -2839,7 +3048,8 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref right_memory_ast_node->identifier_node = identifier_node; - input_pin_index = right_memory->data_width + right_memory->data_width + right_memory->addr_width + 2; + input_pin_index + = right_memory->data_width + right_memory->data_width + right_memory->addr_width + 2; output_pin_index = right_memory->data_width; // first address port is already been used, so that the second port should use for the next address port @@ -2904,7 +3114,8 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref } } else { - in_1 = netlist_expand_ast_of_module(&(assignment->children[1]), instance_name_prefix, local_ref, assignment_size); + in_1 = netlist_expand_ast_of_module(&(assignment->children[1]), instance_name_prefix, local_ref, + assignment_size); oassert(in_1 != NULL); right = assignment->children[1]; } @@ -2913,8 +3124,8 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref if (left_memory) { if (!is_valid_implicit_memory_reference_ast(instance_name_prefix, left)) - error_message(NETLIST, assignment->loc, - "Invalid addressing mode for implicit memory %s.\n", left_memory->name); + error_message(NETLIST, assignment->loc, "Invalid addressing mode for implicit memory %s.\n", + left_memory->name); // A memory can only be written from a clocked rising edge block. if (type_of_circuit != SEQUENTIAL) { @@ -2923,12 +3134,14 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref "Assignment to implicit memories is only supported within sequential circuits.\n"); } else { // Make sure the memory is addressed. - signal_list_t* address = netlist_expand_ast_of_module(&(left->children[0]), instance_name_prefix, local_ref, assignment_size); + signal_list_t* address + = netlist_expand_ast_of_module(&(left->children[0]), instance_name_prefix, local_ref, assignment_size); // Pad/shrink the address to the depth of the memory. if (address->count == 0) { warning_message(NETLIST, assignment->loc, - "indexing into memory with %s has address of length 0, skipping memory write", instance_name_prefix); + "indexing into memory with %s has address of length 0, skipping memory write", + instance_name_prefix); } else { if (address->count != left_memory->addr_width) { if (address->count > left_memory->addr_width) { @@ -2938,10 +3151,12 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref unused_pins_name = unused_pins_name + " " + address->pins[i]->name; } warning_message(NETLIST, assignment->loc, - "indexing into memory with %s has larger input than memory. Unused pins: %s", instance_name_prefix, unused_pins_name.c_str()); + "indexing into memory with %s has larger input than memory. Unused pins: %s", + instance_name_prefix, unused_pins_name.c_str()); } else { warning_message(NETLIST, assignment->loc, - "indexing into memory with %s has smaller input than memory. Padding with GND", instance_name_prefix); + "indexing into memory with %s has smaller input than memory. Padding with GND", + instance_name_prefix); } while (address->count < left_memory->addr_width) @@ -2965,7 +3180,8 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref bool first_address_is_connected = is_signal_list_connected_to_memory(left_memory, address, "addr1"); bool second_address_is_connected = is_signal_list_connected_to_memory(left_memory, address, "addr2"); - bool memory_is_single_port = !strcmp(left_memory_ast_node->identifier_node->types.identifier, SINGLE_PORT_RAM_string); + bool memory_is_single_port + = !strcmp(left_memory_ast_node->identifier_node->types.identifier, SINGLE_PORT_RAM_string); if (memory_is_single_port && !first_address_is_connected) { if (left_memory->node->input_pins) { @@ -2973,7 +3189,8 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref if (address_port && !strcmp(address_port, "addr1")) { // changing to a dual-port ram, since the first port is already connected - ast_node_t* identifier_node = create_tree_node_id(vtr::strdup(DUAL_PORT_RAM_string), assignment->loc); + ast_node_t* identifier_node + = create_tree_node_id(vtr::strdup(DUAL_PORT_RAM_string), assignment->loc); // free the default identifier node (spram) if (left_memory_ast_node->identifier_node) { @@ -2982,7 +3199,8 @@ signal_list_t* assignment_alias(ast_node_t* assignment, char* instance_name_pref left_memory_ast_node->identifier_node = identifier_node; - input_pin_index = left_memory->data_width + left_memory->data_width + left_memory->addr_width + 2; + input_pin_index + = left_memory->data_width + left_memory->data_width + left_memory->addr_width + 2; // first address port is already been used, so that the second port should use for the next address port address_port = vtr::strdup("addr2"); @@ -3145,16 +3363,21 @@ void define_latchs_initial_value_inside_initial_statement(ast_node_t* initial_no for (i = 0; i < initial_node->num_children; i++) { /*check to see if, for each member of the initial block, if the assignment to a given variable is a number and not * a complex statement*/ - if ((initial_node->children[i]->type == BLOCKING_STATEMENT || initial_node->children[i]->type == NON_BLOCKING_STATEMENT) + if ((initial_node->children[i]->type == BLOCKING_STATEMENT + || initial_node->children[i]->type == NON_BLOCKING_STATEMENT) && initial_node->children[i]->children[1]->type == NUMBERS) { //Find corresponding register, set it's members to reflect initialization. if (initial_node->children[i]) { /*if the identifier we found in the table matches the identifier of our blocking statement*/ - sc_spot = sc_lookup_string(local_symbol_table_sc, initial_node->children[i]->children[0]->types.identifier); + sc_spot + = sc_lookup_string(local_symbol_table_sc, initial_node->children[i]->children[0]->types.identifier); if (sc_spot == -1) { - warning_message(NETLIST, initial_node->children[i]->loc, "Register [%s] used in initial block is not declared.\n", initial_node->children[i]->identifier_node->types.identifier); + warning_message(NETLIST, initial_node->children[i]->loc, + "Register [%s] used in initial block is not declared.\n", + initial_node->children[i]->identifier_node->types.identifier); } else { - local_symbol_table[sc_spot]->types.variable.initial_value = get_init_value(initial_node->children[i]->children[1]); + local_symbol_table[sc_spot]->types.variable.initial_value + = get_init_value(initial_node->children[i]->children[1]); } } } @@ -3164,7 +3387,10 @@ void define_latchs_initial_value_inside_initial_statement(ast_node_t* initial_no /*--------------------------------------------------------------------------------------------- * (function: terminate_registered_assignment) *-------------------------------------------------------------------------------------------*/ -void terminate_registered_assignment(ast_node_t* always_node, signal_list_t* assignment, signal_list_t* potential_clocks, sc_hierarchy* local_ref) { +void terminate_registered_assignment(ast_node_t* always_node, + signal_list_t* assignment, + signal_list_t* potential_clocks, + sc_hierarchy* local_ref) { oassert(potential_clocks != NULL); npin_t** list_dependence_pin = (npin_t**)vtr::calloc(assignment->count, sizeof(npin_t*)); @@ -3180,19 +3406,22 @@ void terminate_registered_assignment(ast_node_t* always_node, signal_list_t* ass sc_spot = sc_lookup_string(input_nets_sc, potential_clocks->pins[i]->name); if (sc_spot == -1) { error_message(NETLIST, always_node->loc, - "Sensitivity list element (%s) is not a driver or net ... must be\n", potential_clocks->pins[i]->name); + "Sensitivity list element (%s) is not a driver or net ... must be\n", + potential_clocks->pins[i]->name); } temp_net = (nnet_t*)input_nets_sc->data[sc_spot]; } else { temp_net = (nnet_t*)output_nets_sc->data[sc_spot]; } - if ((((temp_net->num_fanout_pins == 1) && (temp_net->fanout_pins[0]->node == NULL)) || (temp_net->num_fanout_pins == 0)) + if ((((temp_net->num_fanout_pins == 1) && (temp_net->fanout_pins[0]->node == NULL)) + || (temp_net->num_fanout_pins == 0)) && (local_clock_found == true)) { error_message(NETLIST, always_node->loc, "Suspected second clock (%s). In a sequential sensitivity list, Odin expects the " "clock not to drive anything and any other signals in this list to drive stuff. " - "For example, a reset in the sensitivy list has to be hooked up to something in the always block.\n", + "For example, a reset in the sensitivy list has to be hooked up to something in the " + "always block.\n", potential_clocks->pins[i]->name); } else if (temp_net->num_fanout_pins == 0) { /* If this element is in the sensitivity list and doesn't drive anything it's the clock */ @@ -3220,8 +3449,7 @@ void terminate_registered_assignment(ast_node_t* always_node, signal_list_t* ass /* look up the net */ int sc_spot = sc_lookup_string(output_nets_sc, pin->name); if (sc_spot == -1) { - error_message(NETLIST, always_node->loc, - "Assignment is missing driver (%s)\n", pin->name); + error_message(NETLIST, always_node->loc, "Assignment is missing driver (%s)\n", pin->name); } nnet_t* net = (nnet_t*)output_nets_sc->data[sc_spot]; //looking for dependence according to with the type of statement (non-blocking or blocking) @@ -3285,7 +3513,8 @@ void terminate_registered_assignment(ast_node_t* always_node, signal_list_t* ass add_driver_pin_to_net(net, ff_output_pin); - syn_netlist->ff_nodes = (nnode_t**)vtr::realloc(syn_netlist->ff_nodes, sizeof(nnode_t*) * (syn_netlist->num_ff_nodes + 1)); + syn_netlist->ff_nodes + = (nnode_t**)vtr::realloc(syn_netlist->ff_nodes, sizeof(nnode_t*) * (syn_netlist->num_ff_nodes + 1)); syn_netlist->ff_nodes[syn_netlist->num_ff_nodes] = ff_node; syn_netlist->num_ff_nodes++; } @@ -3299,9 +3528,13 @@ void terminate_registered_assignment(ast_node_t* always_node, signal_list_t* ass ref_string = pin->net->driver_pins[0]->node->name; for (j = i - 1; j >= 0; j--) { - if (list_dependence_pin[j] && list_dependence_pin[j]->net->num_driver_pins && list_dependence_type[j] == BLOCKING_STATEMENT && strcmp(ref_string, assignment->pins[j]->node->name) == 0) { + if (list_dependence_pin[j] && list_dependence_pin[j]->net->num_driver_pins + && list_dependence_type[j] == BLOCKING_STATEMENT + && strcmp(ref_string, assignment->pins[j]->node->name) == 0) { if (list_dependence_pin[j]->net->num_driver_pins > 1 || pin->net->num_driver_pins > 1) { - error_message(NETLIST, unknown_location, "%s", "Multiple registered assignments to the same variable not supported for this use case"); + error_message( + NETLIST, unknown_location, "%s", + "Multiple registered assignments to the same variable not supported for this use case"); } dependence_variable_position = j; ref_string = list_dependence_pin[j]->net->driver_pins[0]->node->name; @@ -3364,8 +3597,7 @@ void terminate_continuous_assignment(ast_node_t* node, signal_list_t* assignment /* look up the net */ long sc_spot = sc_lookup_string(output_nets_sc, pin->name); if (sc_spot == -1) { - warning_message(NETLIST, node->loc, - "Assignment (%s) is missing driver\n", pin->name); + warning_message(NETLIST, node->loc, "Assignment (%s) is missing driver\n", pin->name); } else { nnet_t* net = (nnet_t*)output_nets_sc->data[sc_spot]; @@ -3429,7 +3661,8 @@ int alias_output_assign_pins_to_inputs(char_list_t* output_list, signal_list_t* if (i >= input_list->count) { if (global_args.all_warnings) warning_message(NETLIST, node->loc, - "More nets to drive than drivers, padding with ZEROs for driver %s\n", output_list->strings[i]); + "More nets to drive than drivers, padding with ZEROs for driver %s\n", + output_list->strings[i]); add_pin_to_signal_list(input_list, get_zero_pin(syn_netlist)); } @@ -3442,8 +3675,9 @@ int alias_output_assign_pins_to_inputs(char_list_t* output_list, signal_list_t* } if (global_args.all_warnings && output_list->num_strings < input_list->count) - warning_message(NETLIST, node->loc, "%s", - "Alias: More driver pins than nets to drive: sometimes using decimal numbers causes this problem\n"); + warning_message( + NETLIST, node->loc, "%s", + "Alias: More driver pins than nets to drive: sometimes using decimal numbers causes this problem\n"); return output_list->num_strings; } @@ -3453,7 +3687,10 @@ int alias_output_assign_pins_to_inputs(char_list_t* output_list, signal_list_t* * This function creates a gate node in the netlist and hooks up the inputs * and outputs. *------------------------------------------------------------------------*/ -signal_list_t* create_gate(ast_node_t* gate, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* create_gate(ast_node_t* gate, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { signal_list_t* out_1 = NULL; for (long j = 0; j < gate->children[0]->num_children; j++) { @@ -3469,7 +3706,8 @@ signal_list_t* create_gate(ast_node_t* gate, char* instance_name_prefix, sc_hier /* IF one input gate */ /* process the signal for the input gate */ - signal_list_t* in_1 = netlist_expand_ast_of_module(&(gate_instance->children[1]), instance_name_prefix, local_ref, assignment_size); + signal_list_t* in_1 = netlist_expand_ast_of_module(&(gate_instance->children[1]), instance_name_prefix, + local_ref, assignment_size); /* process the signal for the input ga$te */ out_1 = create_output_pin(gate_instance->children[0], instance_name_prefix, local_ref); @@ -3502,7 +3740,8 @@ signal_list_t* create_gate(ast_node_t* gate, char* instance_name_prefix, sc_hier signal_list_t** in = (signal_list_t**)vtr::calloc(gate_instance->num_children - 1, sizeof(signal_list_t*)); for (long i = 0; i < gate_instance->num_children - 1; i++) { - in[i] = netlist_expand_ast_of_module(&(gate_instance->children[i + 1]), instance_name_prefix, local_ref, assignment_size); + in[i] = netlist_expand_ast_of_module(&(gate_instance->children[i + 1]), instance_name_prefix, local_ref, + assignment_size); } /* process the signal for the input gate */ @@ -3554,7 +3793,11 @@ signal_list_t* create_gate(ast_node_t* gate, char* instance_name_prefix, sc_hier /*---------------------------------------------------------------------------- * (function: create_operation_node) *--------------------------------------------------------------------------*/ -signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists, int list_size, char* instance_name_prefix, long assignment_size) { +signal_list_t* create_operation_node(ast_node_t* op, + signal_list_t** input_lists, + int list_size, + char* instance_name_prefix, + long assignment_size) { long i; signal_list_t* return_list = init_signal_list(); nnode_t* operation_node; @@ -3638,7 +3881,8 @@ signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists case SL: // << //output_port_width = op->types.operation.output_port_width; output_port_width = assignment_size; - input_port_width = (input_lists[0]->count > input_lists[1]->count) ? input_lists[0]->count : input_lists[1]->count; + input_port_width + = (input_lists[0]->count > input_lists[1]->count) ? input_lists[0]->count : input_lists[1]->count; if (output_port_width > input_port_width) input_port_width = output_port_width; @@ -3708,7 +3952,8 @@ signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists allocate_more_output_pins(operation_node, output_port_width); add_output_port_information(operation_node, output_port_width); - if ((operation_node->type == SR) || (operation_node->type == ASL) || (operation_node->type == SL) || (operation_node->type == ASR)) { + if ((operation_node->type == SR) || (operation_node->type == ASL) || (operation_node->type == SL) + || (operation_node->type == ASR)) { if (op->children[1]->type != NUMBERS) { /* to keep the record of first input signedness */ operation_node->attributes->port_a_signed = op->children[0]->types.variable.signedness; @@ -3719,7 +3964,8 @@ signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists /* record this port size */ add_input_port_information(operation_node, input_port_width); /* hookup the input pins */ - hookup_input_pins_from_signal_list(operation_node, current_idx, input_lists[k], 0, input_port_width, syn_netlist); + hookup_input_pins_from_signal_list(operation_node, current_idx, input_lists[k], 0, input_port_width, + syn_netlist); current_idx += input_port_width; } @@ -3807,7 +4053,8 @@ signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists add_input_port_information(operation_node, input_port_width); /* hookup the input pins = will do padding of zeros for smaller port */ - hookup_input_pins_from_signal_list(operation_node, current_idx, input_lists[i], 0, input_port_width, syn_netlist); + hookup_input_pins_from_signal_list(operation_node, current_idx, input_lists[i], 0, input_port_width, + syn_netlist); current_idx += input_port_width; } else { /* ELSE if taking the port widths as they are */ @@ -3817,7 +4064,8 @@ signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists add_input_port_information(operation_node, input_lists[i]->count); /* hookup the input pins */ - hookup_input_pins_from_signal_list(operation_node, current_idx, input_lists[i], 0, input_lists[i]->count, syn_netlist); + hookup_input_pins_from_signal_list(operation_node, current_idx, input_lists[i], 0, + input_lists[i]->count, syn_netlist); current_idx += input_lists[i]->count; } @@ -3831,7 +4079,8 @@ signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists new_pin1 = allocate_npin(); new_pin2 = allocate_npin(); new_net = allocate_nnet(); - new_net->name = make_full_ref_name(NULL, NULL, NULL, operation_node->name, i); //vtr::strdup(operation_node->name); + new_net->name + = make_full_ref_name(NULL, NULL, NULL, operation_node->name, i); //vtr::strdup(operation_node->name); /* hook the output pin into the node */ add_output_pin_to_node(operation_node, new_pin1, i); /* hook up new pin 1 into the new net */ @@ -3853,7 +4102,9 @@ signal_list_t* create_operation_node(ast_node_t* op, signal_list_t** input_lists /*--------------------------------------------------------------------------------------------- * (function: evaluate_sensitivity_list) *-------------------------------------------------------------------------------------------*/ -signal_list_t* evaluate_sensitivity_list(ast_node_t* delay_control, char* instance_name_prefix, sc_hierarchy* local_ref) { +signal_list_t* evaluate_sensitivity_list(ast_node_t* delay_control, + char* instance_name_prefix, + sc_hierarchy* local_ref) { long i; circuit_edge = UNDEFINED_SENSITIVITY; signal_list_t* return_sig_list = init_signal_list(); @@ -3885,14 +4136,16 @@ signal_list_t* evaluate_sensitivity_list(ast_node_t* delay_control, char* instan if (circuit_edge != child_sensitivity) { if (circuit_edge == ASYNCHRONOUS_SENSITIVITY || child_sensitivity == ASYNCHRONOUS_SENSITIVITY) { error_message(NETLIST, delay_control->loc, "%s", - "Sensitivity list switches between edge sensitive to asynchronous. You can't define something like always @(posedge clock or a).\n"); + "Sensitivity list switches between edge sensitive to asynchronous. You can't define " + "something like always @(posedge clock or a).\n"); } } switch (child_sensitivity) { case FALLING_EDGE_SENSITIVITY: //falltrhough case RISING_EDGE_SENSITIVITY: { - signal_list_t* temp_list = create_pins(delay_control->children[i]->children[0], NULL, instance_name_prefix, local_ref); + signal_list_t* temp_list + = create_pins(delay_control->children[i]->children[0], NULL, instance_name_prefix, local_ref); oassert(temp_list->count == 1); temp_list->pins[0]->sensitivity = child_sensitivity; add_pin_to_signal_list(return_sig_list, temp_list->pins[0]); @@ -3923,7 +4176,10 @@ signal_list_t* evaluate_sensitivity_list(ast_node_t* delay_control, char* instan /*--------------------------------------------------------------------------------------------- * (function: create_if_for_question) *-------------------------------------------------------------------------------------------*/ -signal_list_t* create_if_for_question(ast_node_t* if_ast, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* create_if_for_question(ast_node_t* if_ast, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { signal_list_t* return_list; nnode_t* if_node; @@ -3946,7 +4202,11 @@ signal_list_t* create_if_for_question(ast_node_t* if_ast, char* instance_name_pr /*--------------------------------------------------------------------------------------------- * (function: create_if_question_mux_expressions) *-------------------------------------------------------------------------------------------*/ -signal_list_t* create_if_question_mux_expressions(ast_node_t* if_ast, nnode_t* if_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* create_if_question_mux_expressions(ast_node_t* if_ast, + nnode_t* if_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { signal_list_t** if_expressions; signal_list_t* return_list; int i; @@ -3956,10 +4216,12 @@ signal_list_t* create_if_question_mux_expressions(ast_node_t* if_ast, nnode_t* i /* now we will process the statements and add to the other ports */ for (i = 0; i < 2; i++) { - if (if_ast->children[i + 1] != NULL) // checking to see if expression exists. +1 since first child is control expression + if (if_ast->children[i + 1] + != NULL) // checking to see if expression exists. +1 since first child is control expression { /* IF - this is a normal case item, then process the case match and the details of the statement */ - if_expressions[i] = netlist_expand_ast_of_module(&(if_ast->children[i + 1]), instance_name_prefix, local_ref, assignment_size); + if_expressions[i] = netlist_expand_ast_of_module(&(if_ast->children[i + 1]), instance_name_prefix, + local_ref, assignment_size); } else { error_message(NETLIST, if_ast->loc, "%s", "No such thing as a a = b ? z;\n"); } @@ -3975,7 +4237,10 @@ signal_list_t* create_if_question_mux_expressions(ast_node_t* if_ast, nnode_t* i /*--------------------------------------------------------------------------------------------- * (function: create_if) *-------------------------------------------------------------------------------------------*/ -signal_list_t* create_if(ast_node_t* if_ast, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* create_if(ast_node_t* if_ast, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { signal_list_t* return_list; nnode_t* if_node; @@ -3998,7 +4263,11 @@ signal_list_t* create_if(ast_node_t* if_ast, char* instance_name_prefix, sc_hier /*--------------------------------------------------------------------------------------------- * (function: create_if_control_signals) *-------------------------------------------------------------------------------------------*/ -void create_if_control_signals(ast_node_t** if_expression, nnode_t* if_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +void create_if_control_signals(ast_node_t** if_expression, + nnode_t* if_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { signal_list_t* if_logic_expression; signal_list_t* if_logic_expression_final; nnode_t* not_node; @@ -4018,7 +4287,8 @@ void create_if_control_signals(ast_node_t** if_expression, nnode_t* if_node, cha nnode_t* or_gate; signal_list_t* default_expression; - or_gate = make_1port_logic_gate_with_inputs(LOGICAL_OR, if_logic_expression->count, if_logic_expression, if_node, -1); + or_gate = make_1port_logic_gate_with_inputs(LOGICAL_OR, if_logic_expression->count, if_logic_expression, + if_node, -1); default_expression = make_output_pins_for_existing_node(or_gate, 1); /* copy that output pin to be put into the default */ @@ -4055,7 +4325,11 @@ void create_if_control_signals(ast_node_t** if_expression, nnode_t* if_node, cha /*--------------------------------------------------------------------------------------------- * (function: create_if_mux_statements) *-------------------------------------------------------------------------------------------*/ -signal_list_t* create_if_mux_statements(ast_node_t* if_ast, nnode_t* if_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* create_if_mux_statements(ast_node_t* if_ast, + nnode_t* if_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { signal_list_t** if_statements; signal_list_t* return_list; int i, j; @@ -4065,10 +4339,12 @@ signal_list_t* create_if_mux_statements(ast_node_t* if_ast, nnode_t* if_node, ch /* now we will process the statements and add to the other ports */ for (i = 0; i < 2; i++) { - if (if_ast->children[i + 1] != NULL) // checking to see if statement exists. +1 since first child is control expression + if (if_ast->children[i + 1] + != NULL) // checking to see if statement exists. +1 since first child is control expression { /* IF - this is a normal case item, then process the case match and the details of the statement */ - if_statements[i] = netlist_expand_ast_of_module(&(if_ast->children[i + 1]), instance_name_prefix, local_ref, assignment_size); + if_statements[i] = netlist_expand_ast_of_module(&(if_ast->children[i + 1]), instance_name_prefix, local_ref, + assignment_size); sort_signal_list_alphabetically(if_statements[i]); /* free unused nnodes */ @@ -4094,7 +4370,10 @@ signal_list_t* create_if_mux_statements(ast_node_t* if_ast, nnode_t* if_node, ch /*--------------------------------------------------------------------------------------------- * (function: create_case) *-------------------------------------------------------------------------------------------*/ -signal_list_t* create_case(ast_node_t* case_ast, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* create_case(ast_node_t* case_ast, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { signal_list_t* return_list; nnode_t* case_node; ast_node_t* case_list_of_items; @@ -4110,10 +4389,12 @@ signal_list_t* create_case(ast_node_t* case_ast, char* instance_name_prefix, sc_ case_list_of_items = case_ast->children[1]; /* create all the control structures for the case mux ... each bit will turn on one of the paths ... one hot mux */ - create_case_control_signals(case_list_of_items, &(case_ast->children[0]), case_node, instance_name_prefix, local_ref, assignment_size); + create_case_control_signals(case_list_of_items, &(case_ast->children[0]), case_node, instance_name_prefix, + local_ref, assignment_size); /* create the statements and integrate them into the mux */ - return_list = create_case_mux_statements(case_list_of_items, case_node, instance_name_prefix, local_ref, assignment_size); + return_list + = create_case_mux_statements(case_list_of_items, case_node, instance_name_prefix, local_ref, assignment_size); return return_list; } @@ -4121,7 +4402,12 @@ signal_list_t* create_case(ast_node_t* case_ast, char* instance_name_prefix, sc_ /*--------------------------------------------------------------------------------------------- * (function: create_case_control_signals) *-------------------------------------------------------------------------------------------*/ -void create_case_control_signals(ast_node_t* case_list_of_items, ast_node_t** compare_against, nnode_t* case_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +void create_case_control_signals(ast_node_t* case_list_of_items, + ast_node_t** compare_against, + nnode_t* case_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { long i; signal_list_t* other_expressions_pin_list = init_signal_list(); @@ -4140,11 +4426,14 @@ void create_case_control_signals(ast_node_t* case_list_of_items, ast_node_t** co logical_equal->types.operation.op = LOGICAL_EQUAL; /* get the signals to compare against */ - case_compares[0] = netlist_expand_ast_of_module(compare_against, instance_name_prefix, local_ref, assignment_size); - case_compares[1] = netlist_expand_ast_of_module(&(case_list_of_items->children[i]->children[0]), instance_name_prefix, local_ref, assignment_size); + case_compares[0] + = netlist_expand_ast_of_module(compare_against, instance_name_prefix, local_ref, assignment_size); + case_compares[1] = netlist_expand_ast_of_module(&(case_list_of_items->children[i]->children[0]), + instance_name_prefix, local_ref, assignment_size); /* make a LOGIC_EQUAL gate that collects all the other signals and if they're all off */ - case_compare_expression = create_operation_node(logical_equal, case_compares, 2, instance_name_prefix, assignment_size); + case_compare_expression + = create_operation_node(logical_equal, case_compares, 2, instance_name_prefix, assignment_size); oassert(case_compare_expression->count == 1); /* hookup this pin to the spot in the case_node */ @@ -4165,7 +4454,8 @@ void create_case_control_signals(ast_node_t* case_list_of_items, ast_node_t** co oassert(i == case_list_of_items->num_children - 1); // has to be at the end /* make a NOR gate that collects all the other signals and if they're all off */ - default_node = make_1port_logic_gate_with_inputs(LOGICAL_NOR, case_list_of_items->num_children - 1, other_expressions_pin_list, case_node, -1); + default_node = make_1port_logic_gate_with_inputs(LOGICAL_NOR, case_list_of_items->num_children - 1, + other_expressions_pin_list, case_node, -1); default_expression = make_output_pins_for_existing_node(default_node, 1); // Mark the "default" case for simulation. @@ -4186,7 +4476,11 @@ void create_case_control_signals(ast_node_t* case_list_of_items, ast_node_t** co /*--------------------------------------------------------------------------------------------- * (function: create_case_mux_statements) *-------------------------------------------------------------------------------------------*/ -signal_list_t* create_case_mux_statements(ast_node_t* case_list_of_items, nnode_t* case_node, char* instance_name_prefix, sc_hierarchy* local_ref, long assignment_size) { +signal_list_t* create_case_mux_statements(ast_node_t* case_list_of_items, + nnode_t* case_node, + char* instance_name_prefix, + sc_hierarchy* local_ref, + long assignment_size) { signal_list_t** case_statement; signal_list_t* return_list; long i, j; @@ -4198,7 +4492,8 @@ signal_list_t* create_case_mux_statements(ast_node_t* case_list_of_items, nnode_ for (i = 0; i < case_list_of_items->num_children; i++) { if (case_list_of_items->children[i]->type == CASE_ITEM) { /* IF - this is a normal case item, then process the case match and the details of the statement */ - case_statement[i] = netlist_expand_ast_of_module(&(case_list_of_items->children[i]->children[1]), instance_name_prefix, local_ref, assignment_size); + case_statement[i] = netlist_expand_ast_of_module(&(case_list_of_items->children[i]->children[1]), + instance_name_prefix, local_ref, assignment_size); sort_signal_list_alphabetically(case_statement[i]); /* free unused nnodes */ @@ -4210,7 +4505,8 @@ signal_list_t* create_case_mux_statements(ast_node_t* case_list_of_items, nnode_ } } else if (case_list_of_items->children[i]->type == CASE_DEFAULT) { oassert(i == case_list_of_items->num_children - 1); // has to be at the end - case_statement[i] = netlist_expand_ast_of_module(&(case_list_of_items->children[i]->children[0]), instance_name_prefix, local_ref, assignment_size); + case_statement[i] = netlist_expand_ast_of_module(&(case_list_of_items->children[i]->children[0]), + instance_name_prefix, local_ref, assignment_size); sort_signal_list_alphabetically(case_statement[i]); /* free unused nnodes */ @@ -4226,7 +4522,8 @@ signal_list_t* create_case_mux_statements(ast_node_t* case_list_of_items, nnode_ } /* now with all the lists sorted, we do the matching and proper propogation */ - return_list = create_mux_statements(case_statement, case_node, case_list_of_items->num_children, instance_name_prefix, local_ref); + return_list = create_mux_statements(case_statement, case_node, case_list_of_items->num_children, + instance_name_prefix, local_ref); vtr::free(case_statement); return return_list; @@ -4235,7 +4532,11 @@ signal_list_t* create_case_mux_statements(ast_node_t* case_list_of_items, nnode_ /*--------------------------------------------------------------------------------------------- * (function: create_mux_statements) *-------------------------------------------------------------------------------------------*/ -signal_list_t* create_mux_statements(signal_list_t** statement_lists, nnode_t* mux_node, int num_statement_lists, char* instance_name_prefix, sc_hierarchy* local_ref) { +signal_list_t* create_mux_statements(signal_list_t** statement_lists, + nnode_t* mux_node, + int num_statement_lists, + char* instance_name_prefix, + sc_hierarchy* local_ref) { int i, j; signal_list_t* combined_lists; int* per_case_statement_idx; @@ -4282,9 +4583,11 @@ signal_list_t* create_mux_statements(signal_list_t** statement_lists, nnode_t* m int pin_index = in_index * num_statement_lists + j; /* check if the current element for this case statement is defined */ - if ( - (per_case_statement_idx[j] < (statement_lists[j] ? statement_lists[j]->count : 0)) - && (statement_lists[j] ? (strcmp(combined_lists->pins[i]->name, statement_lists[j]->pins[per_case_statement_idx[j]]->name) == 0) : 0)) { + if ((per_case_statement_idx[j] < (statement_lists[j] ? statement_lists[j]->count : 0)) + && (statement_lists[j] ? ( + strcmp(combined_lists->pins[i]->name, statement_lists[j]->pins[per_case_statement_idx[j]]->name) + == 0) + : 0)) { /* If they match then we have a signal with this name and we can attach the pin */ add_input_pin_to_node(mux_node, statement_lists[j]->pins[per_case_statement_idx[j]], pin_index); @@ -4303,7 +4606,8 @@ signal_list_t* create_mux_statements(signal_list_t** statement_lists, nnode_t* m add_input_pin_to_node(mux_node, get_zero_pin(syn_netlist), pin_index); } else { /* lookup this driver name */ - signal_list_t* this_pin_list = create_pins(NULL, pin->name, instance_name_prefix, local_ref); + signal_list_t* this_pin_list + = create_pins(NULL, pin->name, instance_name_prefix, local_ref); oassert(this_pin_list->count == 1); //add_a_input_pin_to_node_spot_idx(mux_node, get_zero_pin(syn_netlist), pin_index); add_input_pin_to_node(mux_node, this_pin_list->pins[0], pin_index); @@ -4345,7 +4649,10 @@ signal_list_t* create_mux_statements(signal_list_t** statement_lists, nnode_t* m /*--------------------------------------------------------------------------------------------- * (function: create_mux_expressions) *-------------------------------------------------------------------------------------------*/ -signal_list_t* create_mux_expressions(signal_list_t** expression_lists, nnode_t* mux_node, int num_expression_lists, char* /*instance_name_prefix*/) { +signal_list_t* create_mux_expressions(signal_list_t** expression_lists, + nnode_t* mux_node, + int num_expression_lists, + char* /*instance_name_prefix*/) { int i, j; signal_list_t* return_list = init_signal_list(); int max_index = -1; @@ -4443,10 +4750,9 @@ int find_smallest_non_numerical(ast_node_t* node, signal_list_t** input_list, in /* check if the smallest is not a number */ for (i = 0; i < input_list[smallest_idx]->count; i++) { - found_non_numerical = !( - input_list[smallest_idx]->pins[i]->name - && (strstr(input_list[smallest_idx]->pins[i]->name, ONE_VCC_CNS) - || strstr(input_list[smallest_idx]->pins[i]->name, ZERO_GND_ZERO))); + found_non_numerical = !(input_list[smallest_idx]->pins[i]->name + && (strstr(input_list[smallest_idx]->pins[i]->name, ONE_VCC_CNS) + || strstr(input_list[smallest_idx]->pins[i]->name, ZERO_GND_ZERO))); /* Not a number so this is the smallest */ if (found_non_numerical) break; @@ -4475,7 +4781,8 @@ void pad_with_zeros(ast_node_t* node, signal_list_t* list, int pad_size, char* / } else if (pad_size < list->count) { if (global_args.all_warnings) warning_message(NETLIST, node->loc, "%s", - "More driver pins than nets to drive. This means that for this operation you are losing some of the most significant bits\n"); + "More driver pins than nets to drive. This means that for this operation you are losing " + "some of the most significant bits\n"); } } @@ -4484,7 +4791,10 @@ void pad_with_zeros(ast_node_t* node, signal_list_t* list, int pad_size, char* / * This function creates a dual port ram block node in the netlist * and hooks up the inputs and outputs. *------------------------------------------------------------------------*/ -signal_list_t* create_dual_port_ram_block(ast_node_t* block, char* instance_name_prefix, t_model* hb_model, sc_hierarchy* local_ref) { +signal_list_t* create_dual_port_ram_block(ast_node_t* block, + char* instance_name_prefix, + t_model* hb_model, + sc_hierarchy* local_ref) { if (!hb_model || !is_ast_dp_ram(block)) error_message(NETLIST, block->loc, "%s", "Error in creating dual port ram\n"); @@ -4499,7 +4809,8 @@ signal_list_t* create_dual_port_ram_block(ast_node_t* block, char* instance_name /* store all of the relevant info */ block_node->related_ast_node = block; block_node->type = HARD_IP; - block_node->name = hard_node_name(block_node, instance_name_prefix, block->identifier_node->types.identifier, block_instance->identifier_node->types.identifier); + block_node->name = hard_node_name(block_node, instance_name_prefix, block->identifier_node->types.identifier, + block_instance->identifier_node->types.identifier); /* Declare the hard block as used for the blif generation */ hb_model->used = 1; @@ -4522,7 +4833,8 @@ signal_list_t* create_dual_port_ram_block(ast_node_t* block, char* instance_name } if (!hb_ports) - error_message(NETLIST, block->loc, "Non-existant port %s in hard block %s\n", ip_name, block->identifier_node->types.identifier); + error_message(NETLIST, block->loc, "Non-existant port %s in hard block %s\n", ip_name, + block->identifier_node->types.identifier); /* Link the signal to the port definition */ block_connect->children[0]->hb_port = (void*)hb_ports; @@ -4590,11 +4902,8 @@ signal_list_t* create_dual_port_ram_block(ast_node_t* block, char* instance_name allocate_more_output_pins(block_node, out_port_size); add_output_port_information(block_node, out_port_size); - char* alias_name = make_full_ref_name( - instance_name_prefix, - block->identifier_node->types.identifier, - block->children[0]->identifier_node->types.identifier, - ip_name, -1); + char* alias_name = make_full_ref_name(instance_name_prefix, block->identifier_node->types.identifier, + block->children[0]->identifier_node->types.identifier, ip_name, -1); t_memory_port_sizes* ps = (t_memory_port_sizes*)vtr::calloc(1, sizeof(t_memory_port_sizes)); ps->size = out_port_size; @@ -4604,12 +4913,9 @@ signal_list_t* create_dual_port_ram_block(ast_node_t* block, char* instance_name /* make the implicit output list and hook up the outputs */ int j; for (j = 0; j < out_port_size; j++) { - char* pin_name = make_full_ref_name( - instance_name_prefix, - block->identifier_node->types.identifier, - block->children[0]->identifier_node->types.identifier, - ip_name, - (out_port_size > 1) ? j : -1); + char* pin_name = make_full_ref_name(instance_name_prefix, block->identifier_node->types.identifier, + block->children[0]->identifier_node->types.identifier, ip_name, + (out_port_size > 1) ? j : -1); npin_t* new_pin1 = allocate_npin(); new_pin1->mapping = make_signal_name(hb_ports->name, -1); @@ -4650,7 +4956,10 @@ signal_list_t* create_dual_port_ram_block(ast_node_t* block, char* instance_name * This function creates a single port ram block node in the netlist * and hooks up the inputs and outputs. *------------------------------------------------------------------------*/ -signal_list_t* create_single_port_ram_block(ast_node_t* block, char* instance_name_prefix, t_model* hb_model, sc_hierarchy* local_ref) { +signal_list_t* create_single_port_ram_block(ast_node_t* block, + char* instance_name_prefix, + t_model* hb_model, + sc_hierarchy* local_ref) { if (!hb_model || !is_ast_sp_ram(block)) error_message(NETLIST, block->loc, "%s", "Error in creating single port ram\n"); @@ -4666,9 +4975,7 @@ signal_list_t* create_single_port_ram_block(ast_node_t* block, char* instance_na block_node->type = HARD_IP; ast_node_t* block_instance = block->children[0]; ast_node_t* block_list = block_instance->children[0]; - block_node->name = hard_node_name(block_node, - instance_name_prefix, - block->identifier_node->types.identifier, + block_node->name = hard_node_name(block_node, instance_name_prefix, block->identifier_node->types.identifier, block_instance->identifier_node->types.identifier); /* Declare the hard block as used for the blif generation */ @@ -4694,7 +5001,8 @@ signal_list_t* create_single_port_ram_block(ast_node_t* block, char* instance_na } if (!hb_ports) - error_message(NETLIST, block->loc, "Non-existant port %s in hard block %s\n", ip_name, block->identifier_node->types.identifier); + error_message(NETLIST, block->loc, "Non-existant port %s in hard block %s\n", ip_name, + block->identifier_node->types.identifier); /* Link the signal to the port definition */ block_connect->children[0]->hb_port = (void*)hb_ports; @@ -4765,11 +5073,8 @@ signal_list_t* create_single_port_ram_block(ast_node_t* block, char* instance_na allocate_more_output_pins(block_node, out_port_size); add_output_port_information(block_node, out_port_size); - char* alias_name = make_full_ref_name( - instance_name_prefix, - block->identifier_node->types.identifier, - block->children[0]->identifier_node->types.identifier, - ip_name, -1); + char* alias_name = make_full_ref_name(instance_name_prefix, block->identifier_node->types.identifier, + block->children[0]->identifier_node->types.identifier, ip_name, -1); t_memory_port_sizes* ps = (t_memory_port_sizes*)vtr::calloc(1, sizeof(t_memory_port_sizes)); ps->size = out_port_size; ps->name = alias_name; @@ -4778,10 +5083,8 @@ signal_list_t* create_single_port_ram_block(ast_node_t* block, char* instance_na /* make the implicit output list and hook up the outputs */ int j; for (j = 0; j < out_port_size; j++) { - char* pin_name = make_full_ref_name(instance_name_prefix, - block->identifier_node->types.identifier, - block->children[0]->identifier_node->types.identifier, - ip_name, + char* pin_name = make_full_ref_name(instance_name_prefix, block->identifier_node->types.identifier, + block->children[0]->identifier_node->types.identifier, ip_name, (out_port_size > 1) ? j : -1); npin_t* new_pin1 = allocate_npin(); @@ -4826,7 +5129,9 @@ signal_list_t* create_single_port_ram_block(ast_node_t* block, char* instance_na * Creates an architecture independent memory block which will be mapped * to soft logic during the partial map. */ -signal_list_t* create_soft_single_port_ram_block(ast_node_t* block, char* instance_name_prefix, sc_hierarchy* local_ref) { +signal_list_t* create_soft_single_port_ram_block(ast_node_t* block, + char* instance_name_prefix, + sc_hierarchy* local_ref) { char* identifier = block->identifier_node->types.identifier; if (!is_ast_sp_ram(block)) @@ -4841,9 +5146,7 @@ signal_list_t* create_soft_single_port_ram_block(ast_node_t* block, char* instan block_node->type = HARD_IP; ast_node_t* block_instance = block->children[0]; ast_node_t* block_list = block_instance->children[0]; - block_node->name = hard_node_name(block_node, - instance_name_prefix, - identifier, + block_node->name = hard_node_name(block_node, instance_name_prefix, identifier, block_instance->identifier_node->types.identifier); long i; @@ -4894,11 +5197,9 @@ signal_list_t* create_soft_single_port_ram_block(ast_node_t* block, char* instan allocate_more_output_pins(block_node, out_port_size); add_output_port_information(block_node, out_port_size); - char* alias_name = make_full_ref_name( - instance_name_prefix, - identifier, - block->children[0]->identifier_node->types.identifier, - block_connect->types.identifier, -1); + char* alias_name = make_full_ref_name(instance_name_prefix, identifier, + block->children[0]->identifier_node->types.identifier, + block_connect->types.identifier, -1); t_memory_port_sizes* ps = (t_memory_port_sizes*)vtr::calloc(1, sizeof(t_memory_port_sizes)); ps->size = out_port_size; ps->name = alias_name; @@ -4909,16 +5210,13 @@ signal_list_t* create_soft_single_port_ram_block(ast_node_t* block, char* instan for (j = 0; j < out_port_size; j++) { char* pin_name; if (out_port_size > 1) { - pin_name = make_full_ref_name(instance_name_prefix, - identifier, + pin_name = make_full_ref_name(instance_name_prefix, identifier, block->children[0]->identifier_node->types.identifier, block_connect->types.identifier, j); } else { - pin_name = make_full_ref_name( - instance_name_prefix, - identifier, - block->children[0]->identifier_node->types.identifier, - block_connect->types.identifier, -1); + pin_name = make_full_ref_name(instance_name_prefix, identifier, + block->children[0]->identifier_node->types.identifier, + block_connect->types.identifier, -1); } npin_t* new_pin1 = allocate_npin(); @@ -4979,9 +5277,7 @@ signal_list_t* create_soft_dual_port_ram_block(ast_node_t* block, char* instance block_node->type = HARD_IP; ast_node_t* block_instance = block->children[0]; ast_node_t* block_list = block_instance->children[0]; - block_node->name = hard_node_name(block_node, - instance_name_prefix, - identifier, + block_node->name = hard_node_name(block_node, instance_name_prefix, identifier, block_instance->identifier_node->types.identifier); long i; @@ -5042,11 +5338,7 @@ signal_list_t* create_soft_dual_port_ram_block(ast_node_t* block, char* instance int is_output = is_out1 || is_out2; if (is_output) { - char* alias_name = make_full_ref_name( - instance_name_prefix, - identifier, - instance_name, - ip_name, -1); + char* alias_name = make_full_ref_name(instance_name_prefix, identifier, instance_name, ip_name, -1); int port_size = is_out1 ? out1_size : out2_size; @@ -5061,12 +5353,8 @@ signal_list_t* create_soft_dual_port_ram_block(ast_node_t* block, char* instance // make the implicit output list and hook up the outputs int j; for (j = 0; j < port_size; j++) { - char* pin_name = make_full_ref_name( - instance_name_prefix, - identifier, - instance_name, - ip_name, - (port_size > 1) ? j : -1); + char* pin_name = make_full_ref_name(instance_name_prefix, identifier, instance_name, ip_name, + (port_size > 1) ? j : -1); npin_t* new_pin1 = allocate_npin(); new_pin1->mapping = ip_name; @@ -5151,8 +5439,7 @@ signal_list_t* create_hard_block(ast_node_t* block, char* instance_name_prefix, /* TODO: create_soft_adder_block()/create_soft_multiplier_block()??? */ if (!hb_model) { - error_message(NETLIST, block->loc, - "Found Hard Block \"%s\": Not supported by FPGA Architecture\n", identifier); + error_message(NETLIST, block->loc, "Found Hard Block \"%s\": Not supported by FPGA Architecture\n", identifier); } /* memory's are a special case due to splitting */ @@ -5171,11 +5458,8 @@ signal_list_t* create_hard_block(ast_node_t* block, char* instance_name_prefix, /* store all of the relevant info */ block_node->related_ast_node = block; block_node->type = HARD_IP; - block_node->name = hard_node_name( - block_node, - instance_name_prefix, - block->identifier_node->types.identifier, - block_instance->identifier_node->types.identifier); + block_node->name = hard_node_name(block_node, instance_name_prefix, block->identifier_node->types.identifier, + block_instance->identifier_node->types.identifier); /* Declare the hard block as used for the blif generation */ hb_model->used = 1; @@ -5194,7 +5478,8 @@ signal_list_t* create_hard_block(ast_node_t* block, char* instance_name_prefix, } if (hb_ports == NULL) { - error_message(NETLIST, block->loc, "Non-existant port %s in hard block %s\n", ip_name, block->identifier_node->types.identifier); + error_message(NETLIST, block->loc, "Non-existant port %s in hard block %s\n", ip_name, + block->identifier_node->types.identifier); } /* Link the signal to the port definition */ @@ -5452,14 +5737,14 @@ void reorder_connections_from_name(ast_node_t* instance_node_list, ast_node_t* i } } if (!has_matched) { - error_message(NETLIST, instantiated_instance_list->children[i]->loc, - "Module entry %s does not exist\n", + error_message(NETLIST, instantiated_instance_list->children[i]->loc, "Module entry %s does not exist\n", instantiated_instance_list->children[i]->identifier_node->types.identifier); } } // keep the reordered instantiated instance port in an array to swap them later - ast_node_t** swapping_children = (ast_node_t**)vtr::calloc(instantiated_instance_list->num_children, sizeof(ast_node_t*)); + ast_node_t** swapping_children + = (ast_node_t**)vtr::calloc(instantiated_instance_list->num_children, sizeof(ast_node_t*)); for (i = start_index; i < instantiated_instance_list->num_children; i++) { if (arr_index[i] != -1) { swapping_children[arr_index[i]] = instantiated_instance_list->children[i]; @@ -5468,8 +5753,8 @@ void reorder_connections_from_name(ast_node_t* instance_node_list, ast_node_t* i // make instantiated instance ports ordered by swapping them using reordered indexes for (i = start_index; i < instantiated_instance_list->num_children; i++) { - instantiated_instance_list->children[i] = (swapping_children[i]) ? swapping_children[i] - : instantiated_instance_list->children[i]; + instantiated_instance_list->children[i] + = (swapping_children[i]) ? swapping_children[i] : instantiated_instance_list->children[i]; swapping_children[i] = NULL; } diff --git a/odin_ii/src/netlist/netlist_statistic.cpp b/odin_ii/src/netlist/netlist_statistic.cpp index 6a2aeef0061..d9f2f633c8d 100644 --- a/odin_ii/src/netlist/netlist_statistic.cpp +++ b/odin_ii/src/netlist/netlist_statistic.cpp @@ -44,12 +44,34 @@ static metric_t* get_downward_stat(nnet_t* net, netlist_t* netlist, uintptr_t tr static metric_t* get_upward_stat(nnode_t* node, netlist_t* netlist, uintptr_t traverse_mark_number); static metric_t* get_downward_stat(nnode_t* node, netlist_t* netlist, uintptr_t traverse_mark_number); -static metric_t* get_downward_stat(metric_t* destination, signal_list_t* signals, netlist_t* netlist, uintptr_t traverse_mark_number); -static metric_t* get_upward_stat(metric_t* destination, signal_list_t* signals, netlist_t* netlist, uintptr_t traverse_mark_number); -static metric_t* get_downward_stat(metric_t* destination, nnode_t** node_list, long long node_count, netlist_t* netlist, uintptr_t traverse_mark_number); -static metric_t* get_upward_stat(metric_t* destination, nnode_t** node_list, long long node_count, netlist_t* netlist, uintptr_t traverse_mark_number); -static metric_t* get_downward_stat(metric_t* destination, nnet_t** net_list, long long net_count, netlist_t* netlist, uintptr_t traverse_mark_number); -static metric_t* get_upward_stat(metric_t* destination, nnet_t** net_list, long long net_count, netlist_t* netlist, uintptr_t traverse_mark_number); +static metric_t* get_downward_stat(metric_t* destination, + signal_list_t* signals, + netlist_t* netlist, + uintptr_t traverse_mark_number); +static metric_t* get_upward_stat(metric_t* destination, + signal_list_t* signals, + netlist_t* netlist, + uintptr_t traverse_mark_number); +static metric_t* get_downward_stat(metric_t* destination, + nnode_t** node_list, + long long node_count, + netlist_t* netlist, + uintptr_t traverse_mark_number); +static metric_t* get_upward_stat(metric_t* destination, + nnode_t** node_list, + long long node_count, + netlist_t* netlist, + uintptr_t traverse_mark_number); +static metric_t* get_downward_stat(metric_t* destination, + nnet_t** net_list, + long long net_count, + netlist_t* netlist, + uintptr_t traverse_mark_number); +static metric_t* get_upward_stat(metric_t* destination, + nnet_t** net_list, + long long net_count, + netlist_t* netlist, + uintptr_t traverse_mark_number); static void init(metric_t* m) { m->min_depth = 0; @@ -89,17 +111,16 @@ void mixing_optimization_stats(nnode_t* node, netlist_t* netlist) { break; } default: - error_message(NETLIST, unknown_location, "Counting weights for mixing optimization for %i: Hard block type is unimplemented", node->type); + error_message(NETLIST, unknown_location, + "Counting weights for mixing optimization for %i: Hard block type is unimplemented", + node->type); break; } } static void print_stats(metric_t* m) { - printf("\n\t%s:%0.4lf\n\t%s: %0.4lf\n\t%s: %0.4lf\n\t%s: %0.4lf\n", - "shortest path", m->min_depth, - "critical path", m->max_depth, - "average path", m->avg_depth, - "overall fan-out", m->avg_width); + printf("\n\t%s:%0.4lf\n\t%s: %0.4lf\n\t%s: %0.4lf\n\t%s: %0.4lf\n", "shortest path", m->min_depth, "critical path", + m->max_depth, "average path", m->avg_depth, "overall fan-out", m->avg_width); } _static_unused(print_stats) //quiet warning @@ -243,9 +264,7 @@ static void count_node_type(operation_list op, nnode_t* node, netlist_t* netlist } } -static void count_node_type(nnode_t* node, netlist_t* netlist) { - count_node_type(node->type, node, netlist); -} +static void count_node_type(nnode_t* node, netlist_t* netlist) { count_node_type(node->type, node, netlist); } static metric_t* get_upward_stat(nnet_t* net, netlist_t* netlist, uintptr_t traverse_mark_number) { metric_t* destination = NULL; @@ -339,7 +358,10 @@ static metric_t* get_downward_stat(nnode_t* node, netlist_t* netlist, uintptr_t return destination; } -static metric_t* get_downward_stat(metric_t* destination, signal_list_t* signals, netlist_t* netlist, uintptr_t traverse_mark_number) { +static metric_t* get_downward_stat(metric_t* destination, + signal_list_t* signals, + netlist_t* netlist, + uintptr_t traverse_mark_number) { if (signals) { if (signals->count) { metric_t** child_stat = (metric_t**)vtr::calloc(signals->count, sizeof(metric_t*)); @@ -362,7 +384,10 @@ static metric_t* get_downward_stat(metric_t* destination, signal_list_t* signals return destination; } -static metric_t* get_upward_stat(metric_t* destination, signal_list_t* signals, netlist_t* netlist, uintptr_t traverse_mark_number) { +static metric_t* get_upward_stat(metric_t* destination, + signal_list_t* signals, + netlist_t* netlist, + uintptr_t traverse_mark_number) { if (signals) { if (signals->count) { metric_t** child_stat = (metric_t**)vtr::calloc(signals->count, sizeof(metric_t*)); @@ -386,7 +411,11 @@ static metric_t* get_upward_stat(metric_t* destination, signal_list_t* signals, return destination; } -static metric_t* get_upward_stat(metric_t* destination, nnode_t** node_list, long long node_count, netlist_t* netlist, uintptr_t traverse_mark_number) { +static metric_t* get_upward_stat(metric_t* destination, + nnode_t** node_list, + long long node_count, + netlist_t* netlist, + uintptr_t traverse_mark_number) { if (node_list) { if (node_count) { metric_t** child_stat = (metric_t**)vtr::calloc(node_count, sizeof(metric_t*)); @@ -401,7 +430,11 @@ static metric_t* get_upward_stat(metric_t* destination, nnode_t** node_list, lon return destination; } -static metric_t* get_downward_stat(metric_t* destination, nnode_t** node_list, long long node_count, netlist_t* netlist, uintptr_t traverse_mark_number) { +static metric_t* get_downward_stat(metric_t* destination, + nnode_t** node_list, + long long node_count, + netlist_t* netlist, + uintptr_t traverse_mark_number) { if (node_list) { if (node_count) { metric_t** child_stat = (metric_t**)vtr::calloc(node_count, sizeof(metric_t*)); @@ -416,7 +449,11 @@ static metric_t* get_downward_stat(metric_t* destination, nnode_t** node_list, l return destination; } -static metric_t* get_upward_stat(metric_t* destination, nnet_t** net_list, long long net_count, netlist_t* netlist, uintptr_t traverse_mark_number) { +static metric_t* get_upward_stat(metric_t* destination, + nnet_t** net_list, + long long net_count, + netlist_t* netlist, + uintptr_t traverse_mark_number) { if (net_list) { if (net_count) { metric_t** child_stat = (metric_t**)vtr::calloc(net_count, sizeof(metric_t*)); @@ -431,7 +468,11 @@ static metric_t* get_upward_stat(metric_t* destination, nnet_t** net_list, long return destination; } -static metric_t* get_downward_stat(metric_t* destination, nnet_t** net_list, long long net_count, netlist_t* netlist, uintptr_t traverse_mark_number) { +static metric_t* get_downward_stat(metric_t* destination, + nnet_t** net_list, + long long net_count, + netlist_t* netlist, + uintptr_t traverse_mark_number) { if (net_list) { if (net_count) { metric_t** child_stat = (metric_t**)vtr::calloc(net_count, sizeof(metric_t*)); @@ -460,7 +501,10 @@ stat_t* get_stats(nnet_t* net, netlist_t* netlist, uintptr_t traverse_mark_numbe return stat; } -stat_t* get_stats(signal_list_t* input_signals, signal_list_t* output_signals, netlist_t* netlist, uintptr_t traverse_mark_number) { +stat_t* get_stats(signal_list_t* input_signals, + signal_list_t* output_signals, + netlist_t* netlist, + uintptr_t traverse_mark_number) { stat_t* stat = (stat_t*)vtr::malloc(sizeof(stat_t)); // we recompute bellow the input since this is were connection can change get_downward_stat(&stat->downward, input_signals, netlist, traverse_mark_number); @@ -502,7 +546,8 @@ void compute_statistics(netlist_t* netlist, bool display) { // reinit the node count init_stat(netlist); - get_upward_stat(&netlist->output_node_stat, netlist->top_output_nodes, netlist->num_top_output_nodes, netlist, travelsal_id + 1); + get_upward_stat(&netlist->output_node_stat, netlist->top_output_nodes, netlist->num_top_output_nodes, netlist, + travelsal_id + 1); if (display) { std::string hdr = ""; @@ -511,10 +556,10 @@ void compute_statistics(netlist_t* netlist, bool display) { switch (op) { // For top IO nodes generate detailed info since the design might have unconnected input nodes case INPUT_NODE: { - auto unused_pi = netlist->num_top_input_nodes - netlist->num_of_type[op] - netlist->num_of_type[CLOCK_NODE]; + auto unused_pi = netlist->num_top_input_nodes - netlist->num_of_type[op] + - netlist->num_of_type[CLOCK_NODE]; if (unused_pi > 0) { - hdr = std::string("Number of unused <") - + operation_list_STR[op][ODIN_LONG_STRING] + hdr = std::string("Number of unused <") + operation_list_STR[op][ODIN_LONG_STRING] + "> node: "; printf("%-42s%lld\n", hdr.c_str(), unused_pi); } @@ -523,8 +568,7 @@ void compute_statistics(netlist_t* netlist, bool display) { case OUTPUT_NODE: { auto unused_po = netlist->num_top_output_nodes - netlist->num_of_type[op]; if (unused_po > 0) { - hdr = std::string("Number of unused <") - + operation_list_STR[op][ODIN_LONG_STRING] + hdr = std::string("Number of unused <") + operation_list_STR[op][ODIN_LONG_STRING] + "> node: "; printf("%-42s%lld\n", hdr.c_str(), unused_po); } @@ -532,9 +576,7 @@ void compute_statistics(netlist_t* netlist, bool display) { } default: { if (netlist->num_of_type[op] > UNUSED_NODE_TYPE) { - hdr = std::string("Number of <") - + operation_list_STR[op][ODIN_LONG_STRING] - + "> node: "; + hdr = std::string("Number of <") + operation_list_STR[op][ODIN_LONG_STRING] + "> node: "; printf("%-42s%lld\n", hdr.c_str(), netlist->num_of_type[op]); } } diff --git a/odin_ii/src/netlist/netlist_statistic.h b/odin_ii/src/netlist/netlist_statistic.h index ed79ec51735..1ad6ba80183 100644 --- a/odin_ii/src/netlist/netlist_statistic.h +++ b/odin_ii/src/netlist/netlist_statistic.h @@ -32,7 +32,10 @@ static const unsigned int traversal_id = 0; static const uintptr_t mult_optimization_traverse_value = (uintptr_t)&traversal_id; static const uintptr_t adder_optimization_traverse_value = (uintptr_t)&traversal_id; -stat_t* get_stats(signal_list_t* input_signals, signal_list_t* output_signals, netlist_t* netlist, uintptr_t traverse_mark_number); +stat_t* get_stats(signal_list_t* input_signals, + signal_list_t* output_signals, + netlist_t* netlist, + uintptr_t traverse_mark_number); stat_t* get_stats(nnode_t** node_list, long long node_count, netlist_t* netlist, uintptr_t traverse_mark_number); stat_t* get_stats(nnet_t** net_list, long long net_count, netlist_t* netlist, uintptr_t traverse_mark_number); stat_t* get_stats(nnode_t* node, netlist_t* netlist, uintptr_t traverse_mark_number); diff --git a/odin_ii/src/netlist/netlist_utils.cpp b/odin_ii/src/netlist/netlist_utils.cpp index aebde8aa8cb..fb024e421be 100644 --- a/odin_ii/src/netlist/netlist_utils.cpp +++ b/odin_ii/src/netlist/netlist_utils.cpp @@ -175,7 +175,8 @@ void allocate_more_output_pins(nnode_t* node, int width) { * (function: add_output_port_information) *-------------------------------------------------------------------------------------------*/ void add_output_port_information(nnode_t* node, int port_width) { - node->output_port_sizes = (int*)vtr::realloc(node->output_port_sizes, sizeof(int) * (node->num_output_port_sizes + 1)); + node->output_port_sizes + = (int*)vtr::realloc(node->output_port_sizes, sizeof(int) * (node->num_output_port_sizes + 1)); node->output_port_sizes[node->num_output_port_sizes] = port_width; node->num_output_port_sizes++; } @@ -439,7 +440,8 @@ void combine_nets(nnet_t* output_net, nnet_t* input_net, netlist_t* netlist) { input_net->combined = true; /* Need to keep the initial value data when we combine the nets */ - oassert(input_net->initial_value == init_value_e::undefined || input_net->initial_value == output_net->initial_value); + oassert(input_net->initial_value == init_value_e::undefined + || input_net->initial_value == output_net->initial_value); input_net->initial_value = output_initial_value; /* special cases for global nets */ @@ -498,14 +500,16 @@ void join_nets(nnet_t* join_to_net, nnet_t* other_net) { for (int i = 0; i < join_to_net->num_driver_pins; i++) { const char* pin_name = join_to_net->driver_pins[i]->name ? join_to_net->driver_pins[i]->name : "unknown"; if ((join_to_net->driver_pins[i]->node != NULL)) - warning_message(NETLIST, join_to_net->driver_pins[i]->node->loc, "%s %s\n", "Combinational loop with driver pin", pin_name); + warning_message(NETLIST, join_to_net->driver_pins[i]->node->loc, "%s %s\n", + "Combinational loop with driver pin", pin_name); else warning_message(NETLIST, unknown_location, "%s %s\n", "Combinational loop with driver pin", pin_name); } for (int i = 0; i < join_to_net->num_fanout_pins; i++) { const char* pin_name = join_to_net->fanout_pins[i]->name ? join_to_net->fanout_pins[i]->name : "unknown"; if ((join_to_net->fanout_pins[i] != NULL) && (join_to_net->fanout_pins[i]->node != NULL)) - warning_message(NETLIST, join_to_net->fanout_pins[i]->node->loc, "%s %s\n", "Combinational loop with fanout pin", pin_name); + warning_message(NETLIST, join_to_net->fanout_pins[i]->node->loc, "%s %s\n", + "Combinational loop with fanout pin", pin_name); else warning_message(NETLIST, unknown_location, "%s %s\n", "Combinational loop with fanout pin", pin_name); } @@ -513,9 +517,12 @@ void join_nets(nnet_t* join_to_net, nnet_t* other_net) { error_message(NETLIST, unknown_location, "%s", "Found a combinational loop"); } else if (other_net->num_driver_pins > 1) { if (other_net->name && join_to_net->name) - error_message(NETLIST, unknown_location, "Tried to join net %s to %s but this would lose %d drivers for net %s", other_net->name, join_to_net->name, other_net->num_driver_pins - 1, other_net->name); + error_message(NETLIST, unknown_location, + "Tried to join net %s to %s but this would lose %d drivers for net %s", other_net->name, + join_to_net->name, other_net->num_driver_pins - 1, other_net->name); else - error_message(NETLIST, unknown_location, "Tried to join nets but this would lose %d drivers", other_net->num_driver_pins - 1); + error_message(NETLIST, unknown_location, "Tried to join nets but this would lose %d drivers", + other_net->num_driver_pins - 1); } /* copy the driver over to the new_net */ @@ -574,7 +581,8 @@ void integrate_nets(char* alias_name, char* full_name, nnet_t* driver_net) { } } else { /* already exists so we'll join the nets */ - combine_nets((nnet_t*)input_nets_sc->data[sc_spot_input_old], (nnet_t*)input_nets_sc->data[sc_spot_input_new], syn_netlist); + combine_nets((nnet_t*)input_nets_sc->data[sc_spot_input_old], + (nnet_t*)input_nets_sc->data[sc_spot_input_new], syn_netlist); input_nets_sc->data[sc_spot_input_old] = NULL; } } else { @@ -985,7 +993,12 @@ void free_attribute(attr_t* attribute) { * (function: hookup_input_pins_from_signal_list) * For each pin in this list hook it up to the inputs according to indexes and width *--------------------------------------------------------------------------*/ -void hookup_input_pins_from_signal_list(nnode_t* node, int n_start_idx, signal_list_t* input_list, int il_start_idx, int width, netlist_t* netlist) { +void hookup_input_pins_from_signal_list(nnode_t* node, + int n_start_idx, + signal_list_t* input_list, + int il_start_idx, + int width, + netlist_t* netlist) { int i; for (i = 0; i < width; i++) { @@ -1009,7 +1022,12 @@ void hookup_input_pins_from_signal_list(nnode_t* node, int n_start_idx, signal_l * For each pin in this list hook it up to the inputs according to * indexes and width. Extra pins are tied to PAD for later resolution. *--------------------------------------------------------------------------*/ -void hookup_hb_input_pins_from_signal_list(nnode_t* node, int n_start_idx, signal_list_t* input_list, int il_start_idx, int width, netlist_t* netlist) { +void hookup_hb_input_pins_from_signal_list(nnode_t* node, + int n_start_idx, + signal_list_t* input_list, + int il_start_idx, + int width, + netlist_t* netlist) { int i; for (i = 0; i < width; i++) { @@ -1030,7 +1048,11 @@ void hookup_hb_input_pins_from_signal_list(nnode_t* node, int n_start_idx, signa * (function: hookup_output_pouts_from_signal_list) * hooks the pin into the output net, by checking for a driving net *-------------------------------------------------------------------------------------------*/ -void hookup_output_pins_from_signal_list(nnode_t* node, int n_start_idx, signal_list_t* output_list, int ol_start_idx, int width) { +void hookup_output_pins_from_signal_list(nnode_t* node, + int n_start_idx, + signal_list_t* output_list, + int ol_start_idx, + int width) { int i; long sc_spot_output; @@ -1042,7 +1064,8 @@ void hookup_output_pins_from_signal_list(nnode_t* node, int n_start_idx, signal_ if ((sc_spot_output = sc_lookup_string(output_nets_sc, output_list->pins[ol_start_idx + i]->name)) == -1) { /* this output pin does not have a net OR we couldn't find it */ - error_message(NETLIST, node->loc, "Net for driver (%s) doesn't exist for node %s\n", output_list->pins[ol_start_idx + i]->name, node->name); + error_message(NETLIST, node->loc, "Net for driver (%s) doesn't exist for node %s\n", + output_list->pins[ol_start_idx + i]->name, node->name); } /* hook the outpin into the net */ diff --git a/odin_ii/src/netlist/netlist_utils.h b/odin_ii/src/netlist/netlist_utils.h index 90181ffb287..11e415da9ae 100644 --- a/odin_ii/src/netlist/netlist_utils.h +++ b/odin_ii/src/netlist/netlist_utils.h @@ -82,9 +82,23 @@ signal_list_t* copy_input_signals(signal_list_t* signalsvar); signal_list_t* copy_output_signals(signal_list_t* signalsvar); void free_signal_list(signal_list_t* list); -void hookup_hb_input_pins_from_signal_list(nnode_t* node, int n_start_idx, signal_list_t* input_list, int il_start_idx, int width, netlist_t* netlist); -void hookup_input_pins_from_signal_list(nnode_t* node, int n_start_idx, signal_list_t* input_list, int il_start_idx, int width, netlist_t* netlist); -void hookup_output_pins_from_signal_list(nnode_t* node, int n_start_idx, signal_list_t* output_list, int ol_start_idx, int width); +void hookup_hb_input_pins_from_signal_list(nnode_t* node, + int n_start_idx, + signal_list_t* input_list, + int il_start_idx, + int width, + netlist_t* netlist); +void hookup_input_pins_from_signal_list(nnode_t* node, + int n_start_idx, + signal_list_t* input_list, + int il_start_idx, + int width, + netlist_t* netlist); +void hookup_output_pins_from_signal_list(nnode_t* node, + int n_start_idx, + signal_list_t* output_list, + int ol_start_idx, + int width); signal_list_t* make_output_pins_for_existing_node(nnode_t* node, int width); void connect_nodes(nnode_t* out_node, int out_idx, nnode_t* in_node, int in_idx); diff --git a/odin_ii/src/netlist/netlist_visualizer.cpp b/odin_ii/src/netlist/netlist_visualizer.cpp index 2d81aa6b456..68faf58e2f2 100644 --- a/odin_ii/src/netlist/netlist_visualizer.cpp +++ b/odin_ii/src/netlist/netlist_visualizer.cpp @@ -220,7 +220,8 @@ void forward_traversal_net_graph_display(FILE* fp, uintptr_t marker_value, nnode } else if (current_node->type == OUTPUT_NODE) { fprintf(fp, "\t%s_O [shape=triangle];\n", temp_string); } else { - fprintf(fp, "\t%s [label=\"%d:%d\"];\n", temp_string, current_node->forward_level, current_node->backward_level); + fprintf(fp, "\t%s [label=\"%d:%d\"];\n", temp_string, current_node->forward_level, + current_node->backward_level); } vtr::free(temp_string); @@ -230,7 +231,8 @@ void forward_traversal_net_graph_display(FILE* fp, uintptr_t marker_value, nnode continue; for (k = 0; k < current_node->output_pins[j]->net->num_fanout_pins; k++) { - if ((current_node->output_pins[j] == NULL) || (current_node->output_pins[j]->net == NULL) || (current_node->output_pins[j]->net->fanout_pins[k] == NULL)) + if ((current_node->output_pins[j] == NULL) || (current_node->output_pins[j]->net == NULL) + || (current_node->output_pins[j]->net->fanout_pins[k] == NULL)) continue; /* visit the fanout point */ @@ -252,14 +254,16 @@ void forward_traversal_net_graph_display(FILE* fp, uintptr_t marker_value, nnode odin_sprintf(temp_string2, "%s_O", temp_string2); } - fprintf(fp, "\t%s -> %s [label=\"%s\"];\n", temp_string, temp_string2, current_node->output_pins[j]->net->fanout_pins[k]->name); + fprintf(fp, "\t%s -> %s [label=\"%s\"];\n", temp_string, temp_string2, + current_node->output_pins[j]->net->fanout_pins[k]->name); vtr::free(temp_string); vtr::free(temp_string2); if ((next_node->traverse_visited != marker_value) && (next_node->type != FF_NODE)) { /* IF - not visited yet then add to list */ - stack_of_nodes = (nnode_t**)vtr::realloc(stack_of_nodes, sizeof(nnode_t*) * (num_stack_of_nodes + 1)); + stack_of_nodes + = (nnode_t**)vtr::realloc(stack_of_nodes, sizeof(nnode_t*) * (num_stack_of_nodes + 1)); stack_of_nodes[num_stack_of_nodes] = next_node; num_stack_of_nodes++; } @@ -308,7 +312,8 @@ void backward_traversal_net_graph_display(FILE* fp, uintptr_t marker_value, nnod } else if (current_node->type == OUTPUT_NODE) { fprintf(fp, "\t%s_O [shape=triangle];\n", temp_string); } else { - fprintf(fp, "\t%s [label=\"%d:%d\"];\n", temp_string, current_node->forward_level, current_node->backward_level); + fprintf(fp, "\t%s [label=\"%d:%d\"];\n", temp_string, current_node->forward_level, + current_node->backward_level); } } vtr::free(temp_string); @@ -318,7 +323,8 @@ void backward_traversal_net_graph_display(FILE* fp, uintptr_t marker_value, nnod if (current_node->input_pins[j] == NULL) continue; - if ((current_node->input_pins[j] == NULL) || (current_node->input_pins[j]->net == NULL) || (current_node->input_pins[j]->net->num_driver_pins == 0)) + if ((current_node->input_pins[j] == NULL) || (current_node->input_pins[j]->net == NULL) + || (current_node->input_pins[j]->net->num_driver_pins == 0)) continue; /* visit the fanout point */ @@ -331,14 +337,16 @@ void backward_traversal_net_graph_display(FILE* fp, uintptr_t marker_value, nnod temp_string = vtr::strdup(make_simple_name(current_node->name, "^-+.", '_').c_str()); temp_string2 = vtr::strdup(make_simple_name(next_node->name, "^-+.", '_').c_str()); - fprintf(fp, "\t%s -> %s [label=\"%s\"];\n", temp_string2, temp_string, current_node->input_pins[j]->name); + fprintf(fp, "\t%s -> %s [label=\"%s\"];\n", temp_string2, temp_string, + current_node->input_pins[j]->name); vtr::free(temp_string); vtr::free(temp_string2); if ((next_node->traverse_visited != marker_value) && (next_node->type != FF_NODE)) { /* IF - not visited yet then add to list */ - stack_of_nodes = (nnode_t**)vtr::realloc(stack_of_nodes, sizeof(nnode_t*) * (num_stack_of_nodes + 1)); + stack_of_nodes + = (nnode_t**)vtr::realloc(stack_of_nodes, sizeof(nnode_t*) * (num_stack_of_nodes + 1)); stack_of_nodes[num_stack_of_nodes] = next_node; num_stack_of_nodes++; } diff --git a/odin_ii/src/netlist/node_creation_library.cpp b/odin_ii/src/netlist/node_creation_library.cpp index 53bf1af7ee9..2bf55f05f7c 100644 --- a/odin_ii/src/netlist/node_creation_library.cpp +++ b/odin_ii/src/netlist/node_creation_library.cpp @@ -186,7 +186,11 @@ nnode_t* make_1port_logic_gate(operation_list type, int width, nnode_t* node, sh * (function: make_1port_logic_gate_with_inputs) * Make a gate with variable sized inputs, 1 output, and connect to the supplied inputs *-------------------------------------------------------------------------------------------*/ -nnode_t* make_1port_logic_gate_with_inputs(operation_list type, int width, signal_list_t* pin_list, nnode_t* node, short mark) { +nnode_t* make_1port_logic_gate_with_inputs(operation_list type, + int width, + signal_list_t* pin_list, + nnode_t* node, + short mark) { nnode_t* logic_node; int i; @@ -204,7 +208,13 @@ nnode_t* make_1port_logic_gate_with_inputs(operation_list type, int width, signa * (function: make_3port_logic_gates) * Make a 3 port gate all variable port widths. *-------------------------------------------------------------------------------------------*/ -nnode_t* make_3port_gate(operation_list type, int width_port1, int width_port2, int width_port3, int width_output, nnode_t* node, short mark) { +nnode_t* make_3port_gate(operation_list type, + int width_port1, + int width_port2, + int width_port3, + int width_output, + nnode_t* node, + short mark) { nnode_t* logic_node = allocate_nnode(node->loc); logic_node->traverse_visited = mark; logic_node->type = type; @@ -229,7 +239,12 @@ nnode_t* make_3port_gate(operation_list type, int width_port1, int width_port2, * (function: make_2port_logic_gates) * Make a 2 port gate with variable sizes. The first port will be input_pins index 0..width_port1. *-------------------------------------------------------------------------------------------*/ -nnode_t* make_2port_gate(operation_list type, int width_port1, int width_port2, int width_output, nnode_t* node, short mark) { +nnode_t* make_2port_gate(operation_list type, + int width_port1, + int width_port2, + int width_output, + nnode_t* node, + short mark) { nnode_t* logic_node = allocate_nnode(node->loc); logic_node->traverse_visited = mark; logic_node->type = type; @@ -287,8 +302,7 @@ const char* edge_type_blif_str(edge_type_e edge_type, loc_t loc) { case ASYNCHRONOUS_SENSITIVITY: return "as"; default: - error_message(NETLIST, loc, - "undefined sensitivity kind for flip flop %s", edge_type_e_STR[edge_type]); + error_message(NETLIST, loc, "undefined sensitivity kind for flip flop %s", edge_type_e_STR[edge_type]); return NULL; } @@ -306,8 +320,7 @@ edge_type_e edge_type_blif_enum(std::string edge_kind_str, loc_t loc) { else if (edge_kind_str == "as") return ASYNCHRONOUS_SENSITIVITY; else { - error_message(NETLIST, loc, - "undefined sensitivity kind for flip flop %s", edge_kind_str.c_str()); + error_message(NETLIST, loc, "undefined sensitivity kind for flip flop %s", edge_kind_str.c_str()); return UNDEFINED_SENSITIVITY; } @@ -332,9 +345,7 @@ char* hard_node_name(nnode_t* /*node*/, char* instance_name_prefix, char* hb_nam * (function: node_name) * This creates the unique node name *-------------------------------------------------------------------------------------------*/ -char* node_name(nnode_t* node, char* instance_name_prefix) { - return op_node_name(node->type, instance_name_prefix); -} +char* node_name(nnode_t* node, char* instance_name_prefix) { return op_node_name(node->type, instance_name_prefix); } /*--------------------------------------------------------------------------------------------- * (function: node_name) @@ -365,7 +376,12 @@ char* op_node_name(operation_list op, char* instance_prefix_name) { * * @return mux node */ -nnode_t* make_multiport_smux(signal_list_t** inputs, signal_list_t* selector, int num_muxed_inputs, signal_list_t* outs, nnode_t* node, netlist_t* netlist) { +nnode_t* make_multiport_smux(signal_list_t** inputs, + signal_list_t* selector, + int num_muxed_inputs, + signal_list_t* outs, + nnode_t* node, + netlist_t* netlist) { /* validation */ int valid_num_mux_inputs = shift_left_value_with_overflow_check(0X1, selector->count, node->loc); oassert(valid_num_mux_inputs >= num_muxed_inputs); diff --git a/odin_ii/src/netlist/node_creation_library.h b/odin_ii/src/netlist/node_creation_library.h index 98ba85b3401..600de5957ba 100644 --- a/odin_ii/src/netlist/node_creation_library.h +++ b/odin_ii/src/netlist/node_creation_library.h @@ -29,15 +29,30 @@ #include "odin_types.h" nnode_t* make_not_gate_with_input(npin_t* input_pin, nnode_t* node, short mark); -nnode_t* make_1port_logic_gate_with_inputs(operation_list type, int width, signal_list_t* pin_list, nnode_t* node, short mark); +nnode_t* make_1port_logic_gate_with_inputs(operation_list type, + int width, + signal_list_t* pin_list, + nnode_t* node, + short mark); nnode_t* make_not_gate(nnode_t* node, short mark); nnode_t* make_inverter(npin_t* pin, nnode_t* node, short mark); nnode_t* make_1port_logic_gate(operation_list type, int width, nnode_t* node, short mark); nnode_t* make_1port_gate(operation_list type, int width_input, int width_output, nnode_t* node, short mark); -nnode_t* make_2port_gate(operation_list type, int width_port1, int width_port2, int width_output, nnode_t* node, short mark); -nnode_t* make_3port_gate(operation_list type, int width_port1, int width_port2, int width_port3, int width_output, nnode_t* node, short mark); +nnode_t* make_2port_gate(operation_list type, + int width_port1, + int width_port2, + int width_output, + nnode_t* node, + short mark); +nnode_t* make_3port_gate(operation_list type, + int width_port1, + int width_port2, + int width_port3, + int width_output, + nnode_t* node, + short mark); nnode_t* make_nport_gate(operation_list type, int port_sizes, int width, int width_output, nnode_t* node, short mark); npin_t* get_zero_pin(); @@ -49,5 +64,10 @@ char* hard_node_name(nnode_t* node, char* instance_name_prefix, char* hb_name, c edge_type_e edge_type_blif_enum(std::string edge_kind_str, loc_t loc); const char* edge_type_blif_str(edge_type_e edge_type, loc_t loc); -extern nnode_t* make_multiport_smux(signal_list_t** inputs, signal_list_t* selector, int num_muxed_inputs, signal_list_t* outs, nnode_t* node, netlist_t* netlist); +extern nnode_t* make_multiport_smux(signal_list_t** inputs, + signal_list_t* selector, + int num_muxed_inputs, + signal_list_t* outs, + nnode_t* node, + netlist_t* netlist); #endif diff --git a/odin_ii/src/simulate/simulate_blif.cpp b/odin_ii/src/simulate/simulate_blif.cpp index 7982abfbe3f..49d203b5928 100644 --- a/odin_ii/src/simulate/simulate_blif.cpp +++ b/odin_ii/src/simulate/simulate_blif.cpp @@ -45,13 +45,7 @@ static inline BitSpace::bit_value_t init_value(nnode_t* node) { return (BitSpace::bit_value_t)((node) ? node->initial_value : init_value_e::undefined); } -enum edge_eval_e { - FALLING, - RISING, - HIGH, - LOW, - UNK -}; +enum edge_eval_e { FALLING, RISING, HIGH, LOW, UNK }; inline static edge_eval_e get_edge_type(npin_t* clk, int cycle) { if (!clk) @@ -84,23 +78,20 @@ inline static edge_eval_e get_edge_type(npin_t* clk, int cycle) { inline static bool ff_trigger(edge_type_e type, npin_t* clk, int cycle) { edge_eval_e clk_e = get_edge_type(clk, cycle); // update the flip-flop from the input value of the previous cycle. - return ( - (type == FALLING_EDGE_SENSITIVITY && clk_e == FALLING) - || (type == RISING_EDGE_SENSITIVITY && clk_e == RISING) - || (type == ACTIVE_HIGH_SENSITIVITY && clk_e == HIGH) - || (type == ACTIVE_LOW_SENSITIVITY && clk_e == LOW) - || (type == ASYNCHRONOUS_SENSITIVITY && (clk_e == RISING || clk_e == FALLING))); + return ((type == FALLING_EDGE_SENSITIVITY && clk_e == FALLING) + || (type == RISING_EDGE_SENSITIVITY && clk_e == RISING) + || (type == ACTIVE_HIGH_SENSITIVITY && clk_e == HIGH) || (type == ACTIVE_LOW_SENSITIVITY && clk_e == LOW) + || (type == ASYNCHRONOUS_SENSITIVITY && (clk_e == RISING || clk_e == FALLING))); } -inline static BitSpace::bit_value_t get_D(npin_t* D, int cycle) { - return get_pin_value(D, cycle - 1); -} +inline static BitSpace::bit_value_t get_D(npin_t* D, int cycle) { return get_pin_value(D, cycle - 1); } -inline static BitSpace::bit_value_t get_Q(npin_t* Q, int cycle) { - return get_pin_value(Q, cycle - 1); -} +inline static BitSpace::bit_value_t get_Q(npin_t* Q, int cycle) { return get_pin_value(Q, cycle - 1); } -inline static BitSpace::bit_value_t compute_ff(bool trigger, BitSpace::bit_value_t D_val, BitSpace::bit_value_t Q_val, int /*cycle*/) { +inline static BitSpace::bit_value_t compute_ff(bool trigger, + BitSpace::bit_value_t D_val, + BitSpace::bit_value_t Q_val, + int /*cycle*/) { return (trigger) ? D_val : Q_val; } @@ -109,8 +100,9 @@ inline static BitSpace::bit_value_t compute_ff(bool trigger, npin_t* D, npin_t* } static inline bool is_clock_node(nnode_t* node) { - return node && ((node->type == CLOCK_NODE) || (std::string(node->name) == "top^clk") // Strictly for memories. - || (std::string(node->name) == DEFAULT_CLOCK_NAME)); + return node + && ((node->type == CLOCK_NODE) || (std::string(node->name) == "top^clk") // Strictly for memories. + || (std::string(node->name) == DEFAULT_CLOCK_NAME)); } static void simulate_cycle(int cycle, stages_t* s); @@ -293,7 +285,8 @@ sim_data_t* init_simulation(netlist_t* netlist) { if (global_args.sim_vector_input_file.provenance() == argparse::Provenance::SPECIFIED) { sim_data->in = fopen(global_args.sim_vector_input_file.value().c_str(), "r"); if (!sim_data->in) - error_message(SIMULATION, unknown_location, "Could not open vector input file: %s", global_args.sim_vector_input_file.value().c_str()); + error_message(SIMULATION, unknown_location, "Could not open vector input file: %s", + global_args.sim_vector_input_file.value().c_str()); } if (sim_data->in && sim_data->input_lines->count != 0) { @@ -301,9 +294,11 @@ sim_data_t* init_simulation(netlist_t* netlist) { // Read the vector headers and check to make sure they match the lines. if (!verify_test_vector_headers(sim_data->in, sim_data->input_lines)) - error_message(SIMULATION, unknown_location, "Invalid vector header format in %s.", global_args.sim_vector_input_file.value().c_str()); + error_message(SIMULATION, unknown_location, "Invalid vector header format in %s.", + global_args.sim_vector_input_file.value().c_str()); - printf("Simulating %ld existing vectors from \"%s\".\n", sim_data->num_vectors, global_args.sim_vector_input_file.value().c_str()); + printf("Simulating %ld existing vectors from \"%s\".\n", sim_data->num_vectors, + global_args.sim_vector_input_file.value().c_str()); fflush(stdout); } // or be randomly generated. Passed via the -g option. it also serve as a fallback when we have an empty input @@ -368,7 +363,8 @@ void simulate_steps(sim_data_t* sim_data, double min_coverage) { // if we target a minimum coverage keep generating if (min_coverage > 0.0) { if (cycle + 1 == sim_data->num_vectors) { - current_coverage = (((double)get_num_covered_nodes(sim_data->stages) / (double)sim_data->stages->num_nodes)); + current_coverage + = (((double)get_num_covered_nodes(sim_data->stages) / (double)sim_data->stages->num_nodes)); if (global_args.sim_achieve_best) { if (current_coverage > min_coverage) { increment_vector_by = global_args.sim_num_test_vectors; @@ -402,8 +398,9 @@ void simulate_steps(sim_data_t* sim_data, double min_coverage) { // Delay drawing of the progress bar until the second wave to improve the accuracy of the ETA. if ((sim_data->num_vectors == 1) || cycle) { - progress_bar_position = print_progress_bar( - (cycle + 1) / (double)(sim_data->num_vectors), progress_bar_position, progress_bar_length, sim_data->total_time); + progress_bar_position + = print_progress_bar((cycle + 1) / (double)(sim_data->num_vectors), progress_bar_position, + progress_bar_length, sim_data->total_time); } cycle++; @@ -564,7 +561,8 @@ static int is_node_ready(nnode_t* node, int cycle) { } if (!already_flagged) { - node->undriven_pins = (npin_t**)vtr::realloc(node->undriven_pins, sizeof(npin_t*) * (node->num_undriven_pins + 1)); + node->undriven_pins + = (npin_t**)vtr::realloc(node->undriven_pins, sizeof(npin_t*) * (node->num_undriven_pins + 1)); node->undriven_pins[node->num_undriven_pins++] = pin; warning_message(SIMULATION, node->loc, "A node (%s) has an undriven input pin.", node->name); @@ -994,7 +992,8 @@ static bool compute_and_store_value(nnode_t* node, int cycle) { if (pin_cycle != cycle) { if (!node->internal_clk_warn) { node->internal_clk_warn = true; - warning_message(SIMULATION, node->loc, "clock(%s) is internally driven, verify your circuit", node->name); + warning_message(SIMULATION, node->loc, "clock(%s) is internally driven, verify your circuit", + node->name); } //toggle according to ratio BitSpace::bit_value_t prev_value = BitSpace::l_not[CLOCK_INITIAL_VALUE]; @@ -1022,7 +1021,9 @@ static bool compute_and_store_value(nnode_t* node, int cycle) { } else { if (!node->internal_clk_warn) { node->internal_clk_warn = true; - warning_message(SIMULATION, node->loc, "node used as clock (%s) is itself driven by a clock, verify your circuit", node->name); + warning_message(SIMULATION, node->loc, + "node used as clock (%s) is itself driven by a clock, verify your circuit", + node->name); } update_pin_value(node->output_pins[0], get_pin_value(node->input_pins[0], cycle - 1), cycle); } @@ -1083,7 +1084,8 @@ static bool compute_and_store_value(nnode_t* node, int cycle) { // Count number of ones and toggles for coverage estimation bool covered = true; - bool skip_node_from_coverage = (type == INPUT_NODE || type == CLOCK_NODE || type == GND_NODE || type == VCC_NODE || type == PAD_NODE); + bool skip_node_from_coverage + = (type == INPUT_NODE || type == CLOCK_NODE || type == GND_NODE || type == VCC_NODE || type == PAD_NODE); if (!skip_node_from_coverage) { for (int i = 0; i < node->num_output_pins && covered; i++) { @@ -1184,20 +1186,15 @@ nnode_t** get_children_of(nnode_t* node, int* num_children) { char* node_name = get_pin_name(node->name); char* net_name = get_pin_name(net->name); - std::string format_message = - "Found output pin \"%s\" (%ld) on node \"%s\" (%ld)\n" - " which is mapped to a net \"%s\" (%ld) whose driver pins are:\n"; + std::string format_message + = "Found output pin \"%s\" (%ld) on node \"%s\" (%ld)\n" + " which is mapped to a net \"%s\" (%ld) whose driver pins are:\n"; for (int j = 0; j < net->num_driver_pins; j++) - format_message += " " + std::string(net->driver_pins[j]->name) + " (" + std::to_string(net->driver_pins[j]->unique_id) + ")\n"; + format_message += " " + std::string(net->driver_pins[j]->name) + " (" + + std::to_string(net->driver_pins[j]->unique_id) + ")\n"; - warning_message(SIMULATION, node->loc, - format_message.c_str(), - pin_name, - pin->unique_id, - node_name, - node->unique_id, - net_name, - net->unique_id); + warning_message(SIMULATION, node->loc, format_message.c_str(), pin_name, pin->unique_id, node_name, + node->unique_id, net_name, net->unique_id); vtr::free(net_name); vtr::free(pin_name); @@ -1274,20 +1271,15 @@ nnode_t** get_children_of_nodepin(nnode_t* node, int* num_children, int output_p char* node_name = get_pin_name(node->name); char* net_name = get_pin_name(net->name); - std::string format_message = - "Found output pin \"%s\" (%ld) on node \"%s\" (%ld)\n" - " which is mapped to a net \"%s\" (%ld) whose driver pins are:\n"; + std::string format_message + = "Found output pin \"%s\" (%ld) on node \"%s\" (%ld)\n" + " which is mapped to a net \"%s\" (%ld) whose driver pins are:\n"; for (int j = 0; j < net->num_driver_pins; j++) - format_message += " " + std::string(net->driver_pins[j]->name) + " (" + std::to_string(net->driver_pins[j]->unique_id) + ")\n"; + format_message += " " + std::string(net->driver_pins[j]->name) + " (" + + std::to_string(net->driver_pins[j]->unique_id) + ")\n"; - warning_message(SIMULATION, node->loc, - format_message.c_str(), - pin_name, - pin->unique_id, - node_name, - node->unique_id, - net_name, - net->unique_id); + warning_message(SIMULATION, node->loc, format_message.c_str(), pin_name, pin->unique_id, node_name, + node->unique_id, net_name, net->unique_id); vtr::free(net_name); vtr::free(pin_name); @@ -1573,12 +1565,13 @@ static void compute_hard_ip_node(nnode_t* node, int cycle) { void* handle = dlopen(filename, RTLD_LAZY); if (!handle) - error_message(SIMULATION, unknown_location, - "Couldn't open a shared library for hard-block simulation: %s", dlerror()); + error_message(SIMULATION, unknown_location, "Couldn't open a shared library for hard-block simulation: %s", + dlerror()); dlerror(); - void (*func_pointer)(int, int, int*, int, int*) = (void (*)(int, int, int*, int, int*))dlsym(handle, "simulate_block_cycle"); + void (*func_pointer)(int, int, int*, int, int*) + = (void (*)(int, int, int*, int, int*))dlsym(handle, "simulate_block_cycle"); char* error = dlerror(); if (error) @@ -1634,7 +1627,8 @@ static void compute_generic_node(nnode_t* node, int cycle) { break; } - if (j == lut_size) found = true; + if (j == lut_size) + found = true; } if (node->generic_output == BitSpace::_1) { @@ -1664,7 +1658,8 @@ static void compute_add_node(nnode_t* node, int cycle) { oassert(node->output_port_sizes[0] == node->input_port_sizes[0]); oassert(node->output_port_sizes[1] == 1); - BitSpace::bit_value_t carry = get_pin_value(node->input_pins[node->input_port_sizes[0] + node->input_port_sizes[1]], cycle); + BitSpace::bit_value_t carry + = get_pin_value(node->input_pins[node->input_port_sizes[0] + node->input_port_sizes[1]], cycle); /** * TODO: this must be a bug, unconn is 'z' and pushing '1' is just a "patch" @@ -1750,8 +1745,7 @@ static void compute_memory_node(nnode_t* node, int cycle) { else if (is_dp_ram(node)) compute_dual_port_memory(node, cycle); else - error_message(SIMULATION, node->loc, - "Could not resolve memory hard block %s to a valid type.", node->name); + error_message(SIMULATION, node->loc, "Could not resolve memory hard block %s to a valid type.", node->name); } /** @@ -1770,7 +1764,13 @@ static long compute_address(nnode_t* node, signal_list_t* input_address, int cyc return address; } -static void read_write_to_memory(nnode_t* node, signal_list_t* input_address, signal_list_t* data_out, signal_list_t* data_in, bool trigger, npin_t* write_enabled, int cycle) { +static void read_write_to_memory(nnode_t* node, + signal_list_t* input_address, + signal_list_t* data_out, + signal_list_t* data_in, + bool trigger, + npin_t* write_enabled, + int cycle) { long address = compute_address(node, input_address, cycle); //make a single trigger out of write_enable pin and if it was a positive edge @@ -1825,8 +1825,7 @@ static void compute_dual_port_memory(nnode_t* node, int cycle) { bool trigger = ff_trigger(RISING_EDGE_SENSITIVITY, signals->clk, cycle); if (node->memory_data.empty()) - instantiate_memory(node, - std::max(signals->data1->count, signals->data2->count), + instantiate_memory(node, std::max(signals->data1->count, signals->data2->count), std::max(signals->addr1->count, signals->addr2->count)); read_write_to_memory(node, signals->addr1, signals->out1, signals->data1, trigger, signals->we1, cycle); @@ -1841,7 +1840,8 @@ static void compute_dual_port_memory(nnode_t* node, int cycle) { */ static void instantiate_memory(nnode_t* node, long data_width, long addr_width) { long max_address = shift_left_value_with_overflow_check(0x1, addr_width, node->loc); - node->memory_data = std::vector>(max_address, std::vector(data_width, init_value(node))); + node->memory_data = std::vector>( + max_address, std::vector(data_width, init_value(node))); if (global_args.read_mif_input) { char* filename = get_mif_filename(node); assign_memory_from_mif_file(node, filename, data_width, addr_width); @@ -1850,10 +1850,7 @@ static void instantiate_memory(nnode_t* node, long data_width, long addr_width) } static int parse_mif_radix(std::string radix) { - return (radix == "HEX") ? 16 : (radix == "DEC") ? 10 - : (radix == "OCT") ? 8 - : (radix == "BIN") ? 2 - : 0; + return (radix == "HEX") ? 16 : (radix == "DEC") ? 10 : (radix == "OCT") ? 8 : (radix == "BIN") ? 2 : 0; } static void assign_memory_from_mif_file(nnode_t* node, const char* filename, int width, long address_width) { @@ -1904,23 +1901,25 @@ static void assign_memory_from_mif_file(nnode_t* node, const char* filename, int if (token) { // Make sure the address and value are valid strings of the specified radix. if (!is_string_of_radix(address_string, addr_radix)) - error_message(SIMULATION, temp_loc, "%s: address %s is not a base %d string.", filename, address_string, addr_radix); + error_message(SIMULATION, temp_loc, "%s: address %s is not a base %d string.", filename, + address_string, addr_radix); if (!is_string_of_radix(data_string, data_radix)) - error_message(SIMULATION, temp_loc, "%s: data string %s is not a base %d string.", filename, data_string, data_radix); + error_message(SIMULATION, temp_loc, "%s: data string %s is not a base %d string.", filename, + data_string, data_radix); char* binary_data = convert_string_of_radix_to_bit_string(data_string, data_radix, width); long address = convert_string_of_radix_to_long(address_string, addr_radix); if (address > address_width) - error_message(SIMULATION, temp_loc, "%s: address %s is out of range.", filename, address_string); + error_message(SIMULATION, temp_loc, "%s: address %s is out of range.", filename, + address_string); // Write the parsed value string to the memory location. for (int i = 0; i < width; i++) node->memory_data[address][i] = binary_data[i] - '0'; } else { - error_message(SIMULATION, temp_loc, - "%s: MIF syntax error.", filename); + error_message(SIMULATION, temp_loc, "%s: MIF syntax error.", filename); } } @@ -1951,7 +1950,8 @@ static void assign_memory_from_mif_file(nnode_t* node, const char* filename, int long mif_width = std::strtol(item_in->second.c_str(), NULL, 10); if (mif_width != width) - error_message(SIMULATION, temp_loc, "%s: MIF width mismatch: must be %d but %ld was given", filename, width, mif_width); + error_message(SIMULATION, temp_loc, "%s: MIF width mismatch: must be %d but %ld was given", + filename, width, mif_width); // Verify the depth parameter. item_in = symbols.find("DEPTH"); @@ -1961,8 +1961,8 @@ static void assign_memory_from_mif_file(nnode_t* node, const char* filename, int long mif_depth = std::strtol(item_in->second.c_str(), NULL, 10); long expected_depth = shift_left_value_with_overflow_check(0x1, address_width, temp_loc); if (mif_depth != expected_depth) - error_message(SIMULATION, temp_loc, - "%s: MIF depth mismatch: must be %ld but %ld was given", filename, expected_depth, mif_depth); + error_message(SIMULATION, temp_loc, "%s: MIF depth mismatch: must be %ld but %ld was given", + filename, expected_depth, mif_depth); // Parse the radix specifications and make sure they're OK. item_in = symbols.find("ADDRESS_RADIX"); @@ -1971,7 +1971,8 @@ static void assign_memory_from_mif_file(nnode_t* node, const char* filename, int addr_radix = parse_mif_radix(item_in->second); if (!addr_radix) error_message(SIMULATION, temp_loc, - "%s: invalid or missing ADDRESS_RADIX: must specify DEC, HEX, OCT, or BIN", filename); + "%s: invalid or missing ADDRESS_RADIX: must specify DEC, HEX, OCT, or BIN", + filename); item_in = symbols.find("DATA_RADIX"); if (item_in == symbols.end()) @@ -1979,7 +1980,8 @@ static void assign_memory_from_mif_file(nnode_t* node, const char* filename, int data_radix = parse_mif_radix(item_in->second); if (!data_radix) error_message(SIMULATION, temp_loc, - "%s: invalid or missing DATA_RADIX: must specify DEC, HEX, OCT, or BIN", filename); + "%s: invalid or missing DATA_RADIX: must specify DEC, HEX, OCT, or BIN", + filename); // If everything checks out, start reading the values. in_content = true; @@ -2026,8 +2028,7 @@ static void assign_node_to_line(nnode_t* node, lines_t* l, int type, int single_ if (single_pin) { if (j == -1) { - warning_message(SIMULATION, node->loc, - "Could not map single-bit node '%s' line", node->name); + warning_message(SIMULATION, node->loc, "Could not map single-bit node '%s' line", node->name); } else { pin_number = (pin_number == -1) ? 0 : pin_number; int already_added = l->lines[j]->number_of_pins >= 1; @@ -2036,8 +2037,7 @@ static void assign_node_to_line(nnode_t* node, lines_t* l, int type, int single_ } } else { if (j == -1) - warning_message(SIMULATION, node->loc, - "Could not map multi-bit node '%s' to line", node->name); + warning_message(SIMULATION, node->loc, "Could not map multi-bit node '%s' to line", node->name); else insert_pin_into_line(node->output_pins[0], pin_number, l->lines[j], type); } @@ -2148,9 +2148,9 @@ static int verify_test_vector_headers(FILE* in, lines_t* l) { } else if (next == ' ' || next == '\t' || next == '\n') { if (buffer_length) { if (current_line > l->count) { - warning_message(SIMULATION, unknown_location, - "%s\n", - "Vector header mismatch: the number of header is shorter than in your vector file!\n"); + warning_message( + SIMULATION, unknown_location, "%s\n", + "Vector header mismatch: the number of header is shorter than in your vector file!\n"); } else if (strcmp(l->lines[current_line]->name, buffer)) { char* expected_header = generate_vector_header(l); warning_message(SIMULATION, unknown_location, @@ -2233,7 +2233,8 @@ static char* generate_vector_header(lines_t* l) { for (j = 0; j < l->count; j++) { // "+ 2" for null and newline/space. if ((strlen(header) + strlen(l->lines[j]->name) + 2) > BUFFER_MAX_SIZE) - error_message(SIMULATION, unknown_location, "%s", "Buffer overflow anticipated while generating vector header."); + error_message(SIMULATION, unknown_location, "%s", + "Buffer overflow anticipated while generating vector header."); strcat(header, l->lines[j]->name); strcat(header, " "); @@ -2349,7 +2350,8 @@ static test_vector* parse_test_vector(char* buffer) { bit = value % 2; value /= 2; } - v->values[v->count] = (BitSpace::bit_value_t*)vtr::realloc(v->values[v->count], sizeof(BitSpace::bit_value_t) * (v->counts[v->count] + 1)); + v->values[v->count] = (BitSpace::bit_value_t*)vtr::realloc( + v->values[v->count], sizeof(BitSpace::bit_value_t) * (v->counts[v->count] + 1)); v->values[v->count][v->counts[v->count]++] = bit; } } @@ -2362,7 +2364,8 @@ static test_vector* parse_test_vector(char* buffer) { else if (token[i] == '1') value = 1; - v->values[v->count] = (BitSpace::bit_value_t*)vtr::realloc(v->values[v->count], sizeof(BitSpace::bit_value_t) * (v->counts[v->count] + 1)); + v->values[v->count] = (BitSpace::bit_value_t*)vtr::realloc( + v->values[v->count], sizeof(BitSpace::bit_value_t) * (v->counts[v->count] + 1)); v->values[v->count][v->counts[v->count]++] = value; } } @@ -2461,7 +2464,8 @@ static test_vector* generate_random_test_vector(int cycle, sim_data_t* sim_data) value = (rand() % 3) - 1; } - v->values[v->count] = (BitSpace::bit_value_t*)vtr::realloc(v->values[v->count], sizeof(BitSpace::bit_value_t) * (v->counts[v->count] + 1)); + v->values[v->count] = (BitSpace::bit_value_t*)vtr::realloc( + v->values[v->count], sizeof(BitSpace::bit_value_t) * (v->counts[v->count] + 1)); v->values[v->count][v->counts[v->count]++] = value; } v->count++; @@ -2619,7 +2623,8 @@ static int verify_output_vectors(const char* output_vector_file, int num_vectors } else { // The file being verified against. FILE* existing_out = fopen(output_vector_file, "r"); - if (!existing_out) error_message(SIMULATION, unknown_location, "Could not open vector output file: %s", output_vector_file); + if (!existing_out) + error_message(SIMULATION, unknown_location, "Could not open vector output file: %s", output_vector_file); // Our current output vectors. (Just produced.) char out_vec_file[BUFFER_MAX_SIZE] = {0}; @@ -2639,7 +2644,8 @@ static int verify_output_vectors(const char* output_vector_file, int num_vectors break; } else if (!get_next_vector(current_out, buffer2)) { error = true; - warning_message(SIMULATION, unknown_location, "Simulation produced fewer than %d vectors. \n", num_vectors); + warning_message(SIMULATION, unknown_location, "Simulation produced fewer than %d vectors. \n", + num_vectors); break; } // The headers differ. @@ -2688,7 +2694,8 @@ static int verify_output_vectors(const char* output_vector_file, int num_vectors // If the file we're checking against is longer than the current output, print an appropriate warning. if (!error && get_next_vector(existing_out, buffer1)) { error = true; - warning_message(SIMULATION, unknown_location, "%s contains more than %d vectors.\n", output_vector_file, num_vectors); + warning_message(SIMULATION, unknown_location, "%s contains more than %d vectors.\n", output_vector_file, + num_vectors); } fclose(existing_out); @@ -2719,7 +2726,8 @@ static void add_additional_items_to_lines(nnode_t* node, lines_t* l) { break; } } - if (add) break; + if (add) + break; } if (pin->net && pin->net->name) { @@ -2729,7 +2737,8 @@ static void add_additional_items_to_lines(nnode_t* node, lines_t* l) { break; } } - if (add) break; + if (add) + break; } } @@ -2875,10 +2884,8 @@ static int is_vector(char* buffer) { * and false if no vector was found. */ static int get_next_vector(FILE* file, char* buffer) { - oassert(file != NULL - && "unable to retrieve file for next test vector"); - oassert(buffer != NULL - && "unable to use buffer for next test vector as it is not initialized"); + oassert(file != NULL && "unable to retrieve file for next test vector"); + oassert(buffer != NULL && "unable to use buffer for next test vector as it is not initialized"); while (fgets(buffer, BUFFER_MAX_SIZE, file)) if (is_vector(buffer)) @@ -2964,7 +2971,8 @@ static void print_netlist_stats(stages_t* stages, int /*num_vectors*/) { printf(" Threads: %d\n", number_of_workers); printf(" Degree: %3.2f\n", stages->num_connections / (float)stages->num_nodes); printf(" Stages: %d\n", stages->count); - printf(" Nodes/thread: %d(%4.2f%%)\n", (stages->num_nodes / number_of_workers), 100.0 / (double)number_of_workers); + printf(" Nodes/thread: %d(%4.2f%%)\n", (stages->num_nodes / number_of_workers), + 100.0 / (double)number_of_workers); printf("\n"); } @@ -2990,7 +2998,8 @@ static void print_simulation_stats(stages_t* stages, int /*num_vectors*/, double * with their parents, ids, etc. */ static void print_ancestry(nnode_t* bottom_node, int n) { - if (!n) n = 10; + if (!n) + n = 10; std::queue queue = std::queue(); queue.push(bottom_node); @@ -3133,7 +3142,8 @@ static nnode_t* print_update_trace(nnode_t* bottom_node, int cycle) { is_undriven = true; } char* name2 = get_pin_name(node2->name); - printf("\t(%s) %s (%ld) %ld %ld %s \n", pin->mapping, name2, node2->unique_id, node2->num_input_pins, node2->num_output_pins, is_undriven ? "*" : ""); + printf("\t(%s) %s (%ld) %ld %ld %s \n", pin->mapping, name2, node2->unique_id, + node2->num_input_pins, node2->num_output_pins, is_undriven ? "*" : ""); vtr::free(name2); } } diff --git a/odin_ii/src/utils/atomic_buffer.h b/odin_ii/src/utils/atomic_buffer.h index ac9e29ba952..1bb8dac3b38 100644 --- a/odin_ii/src/utils/atomic_buffer.h +++ b/odin_ii/src/utils/atomic_buffer.h @@ -115,8 +115,7 @@ class atomic_buffer { void print() { for (int i = 0; i < BUFFER_SIZE; i++) { uint8_t value = get_bits(i); - printf("%s", (value == 0) ? "0" : (value == 1) ? "1" - : "x"); + printf("%s", (value == 0) ? "0" : (value == 1) ? "1" : "x"); } printf("\n"); } @@ -127,18 +126,14 @@ class atomic_buffer { set_bits(i, value); } - int32_t lock_free_get_cycle() { - return this->cycle; - } + int32_t lock_free_get_cycle() { return this->cycle; } void lock_free_update_cycle(int64_t cycle_in) { //if (cycle_in > this->cycle) this->cycle = cycle_in; } - data_t lock_free_get_value(int64_t cycle_in) { - return get_bits(cycle_in); - } + data_t lock_free_get_value(int64_t cycle_in) { return get_bits(cycle_in); } void lock_free_update_value(data_t value_in, int64_t cycle_in) { if (cycle_in > this->cycle) { diff --git a/odin_ii/src/utils/enum_str.cpp b/odin_ii/src/utils/enum_str.cpp index cdfedf88bb0..9d45aff79d6 100644 --- a/odin_ii/src/utils/enum_str.cpp +++ b/odin_ii/src/utils/enum_str.cpp @@ -33,24 +33,18 @@ const char* ieee_std_STR[] = { }; const char* edge_type_e_STR[] = { - "UNDEFINED_SENSITIVITY", - "FALLING_EDGE_SENSITIVITY", - "RISING_EDGE_SENSITIVITY", - "ACTIVE_HIGH_SENSITIVITY", - "ACTIVE_LOW_SENSITIVITY", - "ASYNCHRONOUS_SENSITIVITY", + "UNDEFINED_SENSITIVITY", "FALLING_EDGE_SENSITIVITY", "RISING_EDGE_SENSITIVITY", + "ACTIVE_HIGH_SENSITIVITY", "ACTIVE_LOW_SENSITIVITY", "ASYNCHRONOUS_SENSITIVITY", }; -const char* _ZERO_GND_ZERO[] = { - "ZERO_GND_ZERO", "ZGZ"}; +const char* _ZERO_GND_ZERO[] = {"ZERO_GND_ZERO", "ZGZ"}; const char* _ONE_VCC_CNS[] = { "ONE_VCC_CNS", "OVC", }; -const char* _ZERO_PAD_ZERO[] = { - "ZERO_PAD_ZERO", "ZPZ"}; +const char* _ZERO_PAD_ZERO[] = {"ZERO_PAD_ZERO", "ZPZ"}; const char* ZERO_GND_ZERO = _ZERO_GND_ZERO[ODIN_STRING_TYPE]; const char* ONE_VCC_CNS = _ONE_VCC_CNS[ODIN_STRING_TYPE]; @@ -138,100 +132,46 @@ const char* operation_list_STR[][2] = { {"ERROR OOB", "OOB"} // should not reach this }; -const char* ids_STR[] = { - "NO_ID", - /* top level things */ - "FILE_ITEMS", - "MODULE", - "SPECIFY", - /* VARIABLES */ - "INPUT", - "OUTPUT", - "INOUT", - "WIRE", - "REG", - "GENVAR", - "PARAMETER", - "LOCALPARAM", - "INITIAL", - "PORT", - /* OTHER MODULE ITEMS */ - "MODULE_ITEMS", - "VAR_DECLARE", - "VAR_DECLARE_LIST", - "ASSIGN", - /* OTHER MODULE AND FUNCTION ITEMS */ - "FUNCTION", - /* OTHER FUNCTION ITEMS */ - "FUNCTION_ITEMS", - "TASK", - "TASK_ITEMS", - /* primitives */ - "GATE", - "GATE_INSTANCE", - "ONE_GATE_INSTANCE", - /* Module instances */ - "MODULE_CONNECT_LIST", - "MODULE_CONNECT", - "MODULE_PARAMETER_LIST", - "MODULE_PARAMETER", - "MODULE_NAMED_INSTANCE", - "MODULE_INSTANCE", - "MODULE_MASTER_INSTANCE", - "ONE_MODULE_INSTANCE", - /* Function instances*/ - "FUNCTION_NAMED_INSTANCE", - "FUNCTION_INSTANCE", +const char* ids_STR[] + = {"NO_ID", + /* top level things */ + "FILE_ITEMS", "MODULE", "SPECIFY", + /* VARIABLES */ + "INPUT", "OUTPUT", "INOUT", "WIRE", "REG", "GENVAR", "PARAMETER", "LOCALPARAM", "INITIAL", "PORT", + /* OTHER MODULE ITEMS */ + "MODULE_ITEMS", "VAR_DECLARE", "VAR_DECLARE_LIST", "ASSIGN", + /* OTHER MODULE AND FUNCTION ITEMS */ + "FUNCTION", + /* OTHER FUNCTION ITEMS */ + "FUNCTION_ITEMS", "TASK", "TASK_ITEMS", + /* primitives */ + "GATE", "GATE_INSTANCE", "ONE_GATE_INSTANCE", + /* Module instances */ + "MODULE_CONNECT_LIST", "MODULE_CONNECT", "MODULE_PARAMETER_LIST", "MODULE_PARAMETER", "MODULE_NAMED_INSTANCE", + "MODULE_INSTANCE", "MODULE_MASTER_INSTANCE", "ONE_MODULE_INSTANCE", + /* Function instances*/ + "FUNCTION_NAMED_INSTANCE", "FUNCTION_INSTANCE", - "TASK_NAMED_INSTANCE", - "TASK_INSTANCE", - /* Specify Items */ - "SPECIFY_ITEMS", - "SPECIFY_PARAMETER", - "SPECIFY_PAL_CONNECTION_STATEMENT", - "SPECIFY_PAL_CONNECT_LIST", - /* statements */ - "STATEMENT", - "BLOCK", - "NON_BLOCKING_STATEMENT", - "BLOCKING_STATEMENT", - "ASSIGNING_LIST", - "CASE", - "CASE_LIST", - "CASE_ITEM", - "CASE_DEFAULT", - "ALWAYS", - "IF", - "FOR", - "WHILE", - /* Delay Control */ - "DELAY_CONTROL", - "POSEDGE", - "NEGEDGE", - /* expressions */ - "TERNARY_OPERATION", - "BINARY_OPERATION", - "UNARY_OPERATION", - /* basic primitives */ - "ARRAY_REF", - "RANGE_REF", - "CONCATENATE", - "REPLICATE", - /* basic identifiers */ - "IDENTIFIERS", - "NUMBERS", - /* C functions */ - "C_ARG_LIST", - "DISPLAY", - "FINISH", - /* Hard Blocks */ - "HARD_BLOCK", - "HARD_BLOCK_NAMED_INSTANCE", - "HARD_BLOCK_CONNECT_LIST", - "HARD_BLOCK_CONNECT", - // EDDIE: new enum value for ids to replace MEMORY from operation_t - "RAM", - "ids_END"}; + "TASK_NAMED_INSTANCE", "TASK_INSTANCE", + /* Specify Items */ + "SPECIFY_ITEMS", "SPECIFY_PARAMETER", "SPECIFY_PAL_CONNECTION_STATEMENT", "SPECIFY_PAL_CONNECT_LIST", + /* statements */ + "STATEMENT", "BLOCK", "NON_BLOCKING_STATEMENT", "BLOCKING_STATEMENT", "ASSIGNING_LIST", "CASE", "CASE_LIST", + "CASE_ITEM", "CASE_DEFAULT", "ALWAYS", "IF", "FOR", "WHILE", + /* Delay Control */ + "DELAY_CONTROL", "POSEDGE", "NEGEDGE", + /* expressions */ + "TERNARY_OPERATION", "BINARY_OPERATION", "UNARY_OPERATION", + /* basic primitives */ + "ARRAY_REF", "RANGE_REF", "CONCATENATE", "REPLICATE", + /* basic identifiers */ + "IDENTIFIERS", "NUMBERS", + /* C functions */ + "C_ARG_LIST", "DISPLAY", "FINISH", + /* Hard Blocks */ + "HARD_BLOCK", "HARD_BLOCK_NAMED_INSTANCE", "HARD_BLOCK_CONNECT_LIST", "HARD_BLOCK_CONNECT", + // EDDIE: new enum value for ids to replace MEMORY from operation_t + "RAM", "ids_END"}; /* supported input/output file extensions */ extern const strbimap file_extension_strmap({{".ilang", file_type_e::ILANG}, @@ -260,7 +200,5 @@ extern const strbimap file_type_strmap({{"ilang", file_type_e::ILAN * FIRST_ELEMENT: model name showing in a blif file * SECOND_ELEMENT: corresponding Odin-II cell type */ -extern const strmap odin_subckt_strmap({{"multiply", MULTIPLY}, - {"mult_", MULTIPLY}, - {"adder", ADD}, - {"sub", MINUS}}); +extern const strmap odin_subckt_strmap( + {{"multiply", MULTIPLY}, {"mult_", MULTIPLY}, {"adder", ADD}, {"sub", MINUS}}); diff --git a/odin_ii/src/utils/hash_table.cpp b/odin_ii/src/utils/hash_table.cpp index 493b43a7266..60c4980324e 100644 --- a/odin_ii/src/utils/hash_table.cpp +++ b/odin_ii/src/utils/hash_table.cpp @@ -35,9 +35,7 @@ void hash_table::destroy_free_items() { vtr::free(kv.second); } -void hash_table::add(std::string key, void* item) { - this->my_map.emplace(key, item); -} +void hash_table::add(std::string key, void* item) { this->my_map.emplace(key, item); } void* hash_table::remove(std::string key) { void* value = NULL; @@ -58,6 +56,4 @@ void* hash_table::get(std::string key) { return value; } -bool hash_table::is_empty() { - return my_map.empty(); -} +bool hash_table::is_empty() { return my_map.empty(); } diff --git a/odin_ii/src/utils/hierarchy_util.cpp b/odin_ii/src/utils/hierarchy_util.cpp index 7e5f9556601..be0bdbe40b8 100644 --- a/odin_ii/src/utils/hierarchy_util.cpp +++ b/odin_ii/src/utils/hierarchy_util.cpp @@ -269,25 +269,29 @@ ast_node_t* resolve_hierarchical_name_reference_by_path_search(sc_hierarchy* loc for (int i = 0; !var_declare && i < local_ref->num_module_children; i++) { if (local_ref->module_children[i]->scope_id == scope_id) { - var_declare = resolve_hierarchical_name_reference_by_path_search(local_ref->module_children[i], identifier); + var_declare + = resolve_hierarchical_name_reference_by_path_search(local_ref->module_children[i], identifier); } } for (int i = 0; !var_declare && i < local_ref->num_function_children; i++) { if (local_ref->function_children[i]->scope_id == scope_id) { - var_declare = resolve_hierarchical_name_reference_by_path_search(local_ref->function_children[i], identifier); + var_declare = resolve_hierarchical_name_reference_by_path_search(local_ref->function_children[i], + identifier); } } for (int i = 0; !var_declare && i < local_ref->num_task_children; i++) { if (local_ref->task_children[i]->scope_id == scope_id) { - var_declare = resolve_hierarchical_name_reference_by_path_search(local_ref->task_children[i], identifier); + var_declare + = resolve_hierarchical_name_reference_by_path_search(local_ref->task_children[i], identifier); } } for (int i = 0; !var_declare && i < local_ref->num_block_children; i++) { if (local_ref->block_children[i]->scope_id == scope_id) { - var_declare = resolve_hierarchical_name_reference_by_path_search(local_ref->block_children[i], identifier); + var_declare + = resolve_hierarchical_name_reference_by_path_search(local_ref->block_children[i], identifier); } } } diff --git a/odin_ii/src/utils/odin_buffer.h b/odin_ii/src/utils/odin_buffer.h index 5ef460be6c9..e170b4e301b 100644 --- a/odin_ii/src/utils/odin_buffer.h +++ b/odin_ii/src/utils/odin_buffer.h @@ -77,17 +77,11 @@ class buffered_reader_t { size_t buffer_size = 2; - static bool is_eof(int in) { - return (EOF == in); - } + static bool is_eof(int in) { return (EOF == in); } - static bool is_nl(int in) { - return is_eof(in) || ('\n' == (char)in || '\r' == (char)in); - } + static bool is_nl(int in) { return is_eof(in) || ('\n' == (char)in || '\r' == (char)in); } - static bool is_whitespace(int in) { - return is_nl(in) || (' ' == (char)in || '\t' == (char)in); - } + static bool is_whitespace(int in) { return is_nl(in) || (' ' == (char)in || '\t' == (char)in); } bool is_one_line_comment(const char* in) { return (one_line_comment_len && strncmp(in, one_line_comment, one_line_comment_len) == 0); @@ -104,7 +98,10 @@ class buffered_reader_t { buffered_reader_t() {} public: - buffered_reader_t(FILE* _source, const char* _one_line_comment, const char* _n_line_comment_ST, const char* _n_line_comment_END) { + buffered_reader_t(FILE* _source, + const char* _one_line_comment, + const char* _n_line_comment_ST, + const char* _n_line_comment_END) { this->source = _source; if (_one_line_comment) { @@ -120,10 +117,9 @@ class buffered_reader_t { this->n_line_comment_END_len = strlen(_n_line_comment_END); } - this->buffer_size = (std::max((size_t)2, // for whitespace duplicate - std::max(one_line_comment_len, - std::max(n_line_comment_ST_len, - n_line_comment_END_len)))); + this->buffer_size + = (std::max((size_t)2, // for whitespace duplicate + std::max(one_line_comment_len, std::max(n_line_comment_ST_len, n_line_comment_END_len)))); } /* diff --git a/odin_ii/src/utils/odin_error.cpp b/odin_ii/src/utils/odin_error.cpp index 73c4629c5ad..b62029596d9 100644 --- a/odin_ii/src/utils/odin_error.cpp +++ b/odin_ii/src/utils/odin_error.cpp @@ -38,16 +38,8 @@ int delayed_errors = 0; const loc_t unknown_location = {-1, -1, -1}; const char* odin_error_STR[] = { - "", - "UTIL", - "PARSE_ARGS", - "PARSE_TO_AST", - "AST", - "BLIF ELABORATION", - "NETLIST", - "PARSE_BLIF", - "OUTPUT_BLIF", - "SIMULATION", + "", "UTIL", "PARSE_ARGS", "PARSE_TO_AST", "AST", "BLIF ELABORATION", + "NETLIST", "PARSE_BLIF", "OUTPUT_BLIF", "SIMULATION", }; void verify_delayed_error(odin_error error_type) { @@ -103,7 +95,8 @@ static std::string get_culprit_line(int line_number, const char* file) { } static void print_culprit_line_with_context(int column, int target_line, const char* file, int num_context_lines) { - for (int curr_line = std::max(target_line - num_context_lines, 0); curr_line <= target_line + num_context_lines; curr_line++) { + for (int curr_line = std::max(target_line - num_context_lines, 0); curr_line <= target_line + num_context_lines; + curr_line++) { std::string culprit_line = get_culprit_line(curr_line, file); int num_printed; fprintf(stderr, " %*d | %n%s\n", NUMBER_OF_LINES_DIGIT, curr_line + 1, &num_printed, culprit_line.c_str()); @@ -113,7 +106,14 @@ static void print_culprit_line_with_context(int column, int target_line, const c } } -void _log_message(odin_error error_type, loc_t loc, bool fatal_error, const char* function_file_name, int function_line, const char* function_name, const char* message, ...) { +void _log_message(odin_error error_type, + loc_t loc, + bool fatal_error, + const char* function_file_name, + int function_line, + const char* function_name, + const char* message, + ...) { fflush(stdout); va_list ap; @@ -142,8 +142,7 @@ void _log_message(odin_error error_type, loc_t loc, bool fatal_error, const char fprintf(stderr, "\n"); } - if (loc.file >= 0 && (size_t)loc.file < include_file_names.size() - && loc.line >= 0) { + if (loc.file >= 0 && (size_t)loc.file < include_file_names.size() && loc.line >= 0) { print_culprit_line_with_context(loc.col, loc.line, include_file_names[loc.file].first.c_str(), 2); } @@ -153,7 +152,10 @@ void _log_message(odin_error error_type, loc_t loc, bool fatal_error, const char } } -void _verbose_abort(const char* condition_str, const char* odin_file_name, int odin_line_number, const char* odin_function_name) { +void _verbose_abort(const char* condition_str, + const char* odin_file_name, + int odin_line_number, + const char* odin_function_name) { fflush(stdout); fprintf(stderr, "\n%s:%d: %s: ", odin_file_name, odin_line_number, odin_function_name); if (condition_str) { diff --git a/odin_ii/src/utils/odin_error.h b/odin_ii/src/utils/odin_error.h index d8abb9393f7..7c35ecfab66 100644 --- a/odin_ii/src/utils/odin_error.h +++ b/odin_ii/src/utils/odin_error.h @@ -65,12 +65,23 @@ extern int delayed_errors; extern const loc_t unknown_location; // causes an interrupt in GDB -[[noreturn]] void _verbose_abort(const char* condition_str, const char* odin_file_name, int odin_line_number, const char* odin_function_name); +[[noreturn]] void _verbose_abort(const char* condition_str, + const char* odin_file_name, + int odin_line_number, + const char* odin_function_name); #define oassert(condition) \ - if (!bool(condition)) _verbose_abort(#condition, __FILE__, __LINE__, __func__) + if (!bool(condition)) \ + _verbose_abort(#condition, __FILE__, __LINE__, __func__) -void _log_message(odin_error error_type, loc_t loc, bool soft_error, const char* function_file_name, int function_line, const char* function_name, const char* message, ...); +void _log_message(odin_error error_type, + loc_t loc, + bool soft_error, + const char* function_file_name, + int function_line, + const char* function_name, + const char* message, + ...); #define error_message(error_type, loc, message, ...) \ _log_message(error_type, loc, true, __FILE__, __LINE__, __PRETTY_FUNCTION__, message, __VA_ARGS__) @@ -78,8 +89,9 @@ void _log_message(odin_error error_type, loc_t loc, bool soft_error, const char* #define warning_message(error_type, loc, message, ...) \ _log_message(error_type, loc, false, __FILE__, __LINE__, __PRETTY_FUNCTION__, message, __VA_ARGS__) -#define possible_error_message(error_type, loc, message, ...) \ - _log_message(error_type, loc, !global_args.permissive.value(), __FILE__, __LINE__, __PRETTY_FUNCTION__, message, __VA_ARGS__) +#define possible_error_message(error_type, loc, message, ...) \ + _log_message(error_type, loc, !global_args.permissive.value(), __FILE__, __LINE__, __PRETTY_FUNCTION__, message, \ + __VA_ARGS__) #define delayed_error_message(error_type, loc, message, ...) \ { \ diff --git a/odin_ii/src/utils/odin_types.h b/odin_ii/src/utils/odin_types.h index 2fa18d01f11..4e6ee37d5d4 100644 --- a/odin_ii/src/utils/odin_types.h +++ b/odin_ii/src/utils/odin_types.h @@ -48,9 +48,9 @@ #define ODIN_SHORT_STRING 1 #ifndef DEBUG_ODIN -# define ODIN_STRING_TYPE ODIN_SHORT_STRING +#define ODIN_STRING_TYPE ODIN_SHORT_STRING #else -# define ODIN_STRING_TYPE ODIN_LONG_STRING +#define ODIN_STRING_TYPE ODIN_LONG_STRING #endif #define ODIN_STD_BITWIDTH (sizeof(long) * 8) @@ -68,7 +68,8 @@ #define RESET -1 #define LEVELIZE 12 -#define verify_i_o_availabilty(node, expected_input_size, expected_output_size) passed_verify_i_o_availabilty(node, expected_input_size, expected_output_size, __FILE__, __LINE__) +#define verify_i_o_availabilty(node, expected_input_size, expected_output_size) \ + passed_verify_i_o_availabilty(node, expected_input_size, expected_output_size, __FILE__, __LINE__) struct ast_node_t; struct nnode_t; @@ -187,12 +188,7 @@ enum file_type_e { file_type_e_END }; -enum ieee_std { - ieee_1995, - ieee_2001_noconfig, - ieee_2001, - ieee_2005 -}; +enum ieee_std { ieee_1995, ieee_2001_noconfig, ieee_2001, ieee_2005 }; enum edge_type_e { UNDEFINED_SENSITIVITY, @@ -204,11 +200,7 @@ enum edge_type_e { edge_type_e_END }; -enum circuit_type_e { - COMBINATIONAL, - SEQUENTIAL, - circuit_type_e_END -}; +enum circuit_type_e { COMBINATIONAL, SEQUENTIAL, circuit_type_e_END }; enum init_value_e { _0 = 0, @@ -404,12 +396,10 @@ struct typ { VNumber* vnumber = nullptr; sc_hierarchy* hierarchy; sc_scope* scope; - struct - { + struct { operation_list op; } operation; - struct - { + struct { short is_parameter; short is_string; short is_localparam; @@ -425,26 +415,22 @@ struct typ { operation_list signedness; VNumber* initial_value = nullptr; } variable; - struct - { + struct { short is_instantiated; ast_node_t** module_instantiations_instance; int size_module_instantiations; } module; - struct - { + struct { short is_instantiated; ast_node_t** function_instantiations_instance; int size_function_instantiations; } function; - struct - { + struct { short is_instantiated; ast_node_t** task_instantiations_instance; int size_task_instantiations; } task; - struct - { + struct { int num_bit_strings; char** bit_strings; } concat; @@ -543,10 +529,11 @@ struct nnode_t { short unique_node_data_id; void* node_data; // this is a point where you can add additional data for your optimization or technique - int forward_level; // this is your logic level relative to PIs and FFs .. i.e farthest PI - int backward_level; // this is your reverse logic level relative to POs and FFs .. i.e. farthest PO - int sequential_level; // the associated sequential network that the node is in - short sequential_terminator; // if this combinational node is a terminator for the sequential level (connects to flip-flop or Output pin + int forward_level; // this is your logic level relative to PIs and FFs .. i.e farthest PI + int backward_level; // this is your reverse logic level relative to POs and FFs .. i.e. farthest PO + int sequential_level; // the associated sequential network that the node is in + short + sequential_terminator; // if this combinational node is a terminator for the sequential level (connects to flip-flop or Output pin netlist_t* internal_netlist; // this is a point of having a subgraph in a node @@ -670,7 +657,8 @@ struct netlist_t { nnode_t*** forward_levels; int num_forward_levels; int* num_at_forward_level; - nnode_t*** backward_levels; // NOTE backward levels isn't neccessarily perfect. Because of multiple output pins, the node can be put closer to POs than should be. To fix, run a rebuild of the list afterwards since the marked "node->backward_level" is correct */ + nnode_t*** + backward_levels; // NOTE backward levels isn't neccessarily perfect. Because of multiple output pins, the node can be put closer to POs than should be. To fix, run a rebuild of the list afterwards since the marked "node->backward_level" is correct */ int num_backward_levels; int* num_at_backward_level; diff --git a/odin_ii/src/utils/odin_util.cpp b/odin_ii/src/utils/odin_util.cpp index 2597fcfdb9e..96dab2c20a0 100644 --- a/odin_ii/src/utils/odin_util.cpp +++ b/odin_ii/src/utils/odin_util.cpp @@ -43,18 +43,19 @@ // for mkdir #ifdef WIN32 -# include -# define getcwd _getcwd +#include +#define getcwd _getcwd #else -# include -# include +#include +#include #endif long shift_left_value_with_overflow_check(long input_value, long shift_by, loc_t loc) { if (shift_by < 0) error_message(NETLIST, loc, "requesting a shift left that is negative [%ld]\n", shift_by); else if (shift_by >= (long)ODIN_STD_BITWIDTH - 1) - warning_message(NETLIST, loc, "requesting a shift left that will overflow the maximum size of %ld [%ld]\n", shift_by, ODIN_STD_BITWIDTH - 1); + warning_message(NETLIST, loc, "requesting a shift left that will overflow the maximum size of %ld [%ld]\n", + shift_by, ODIN_STD_BITWIDTH - 1); return input_value << shift_by; } @@ -87,7 +88,8 @@ void create_directory(std::string path) { #endif if (error_code && errno != EEXIST) { - error_message(AST, unknown_location, "Odin Failed to create directory :%s with exit code%d\n", path.c_str(), errno); + error_message(AST, unknown_location, "Odin Failed to create directory :%s with exit code%d\n", path.c_str(), + errno); } } @@ -119,7 +121,8 @@ void report_frontend_elaborator() { } void assert_supported_file_extension(std::string input_file, loc_t loc) { - bool supported = (file_extension_strmap.find(string_to_lower(get_file_extension(input_file))) != file_extension_strmap.end()); + bool supported + = (file_extension_strmap.find(string_to_lower(get_file_extension(input_file))) != file_extension_strmap.end()); if (!supported) { std::string supported_extension_list = ""; @@ -128,10 +131,8 @@ void assert_supported_file_extension(std::string input_file, loc_t loc) { supported_extension_list += iter.first; } - possible_error_message(UTIL, loc, - "File (%s) has an unsupported extension (%s), Odin only supports { %s }", - input_file.c_str(), - get_file_extension(input_file).c_str(), + possible_error_message(UTIL, loc, "File (%s) has an unsupported extension (%s), Odin only supports { %s }", + input_file.c_str(), get_file_extension(input_file).c_str(), supported_extension_list.c_str()); } } @@ -182,17 +183,13 @@ const char* name_based_on_ids(ids op) { * (function: node_name_based_on_op) * Get the string version of a node *-------------------------------------------------------------------------------------------*/ -const char* node_name_based_on_op(nnode_t* node) { - return name_based_on_op(node->type); -} +const char* node_name_based_on_op(nnode_t* node) { return name_based_on_op(node->type); } /*--------------------------------------------------------------------------------------------- * (function: node_name_based_on_ids) * Get the string version of a ast node *-------------------------------------------------------------------------------------------*/ -const char* ast_node_name_based_on_ids(ast_node_t* node) { - return name_based_on_ids(node->type); -} +const char* ast_node_name_based_on_ids(ast_node_t* node) { return name_based_on_ids(node->type); } /*-------------------------------------------------------------------------- * (function: make_signal_name) @@ -214,7 +211,11 @@ char* make_signal_name(char* signal_name, int bit) { * // {previous_string}.instance_name^signal_name * // {previous_string}.instance_name^signal_name~bit *-------------------------------------------------------------------------------------------*/ -char* make_full_ref_name(const char* previous, const char* /*module_name*/, const char* module_instance_name, const char* signal_name, long bit) { +char* make_full_ref_name(const char* previous, + const char* /*module_name*/, + const char* module_instance_name, + const char* signal_name, + long bit) { std::stringstream return_string; if (previous) return_string << previous; @@ -519,7 +520,8 @@ int is_hex_string(char* string) { int is_dont_care_string(char* string) { unsigned int i; for (i = 0; i < strlen(string); i++) - if (string[i] != 'x') return false; + if (string[i] != 'x') + return false; //if (!((string[i] >= '0' && string[i] <= '9') || (tolower(string[i]) >= 'a' && tolower(string[i]) <= 'f'))) // return false; @@ -753,15 +755,18 @@ void reverse_string(char* string, int length) { } } -void passed_verify_i_o_availabilty(nnode_t* node, int expected_input_size, int expected_output_size, const char* current_src, int line_src) { +void passed_verify_i_o_availabilty(nnode_t* node, + int expected_input_size, + int expected_output_size, + const char* current_src, + int line_src) { if (!node) error_message(UTIL, unknown_location, "node unavailable @%s::%d", current_src, line_src); std::stringstream err_message; int error = 0; - if (expected_input_size != -1 - && node->num_input_pins != expected_input_size) { + if (expected_input_size != -1 && node->num_input_pins != expected_input_size) { err_message << " input size is " << std::to_string(node->num_input_pins) << " expected 3:\n"; for (int i = 0; i < node->num_input_pins; i++) err_message << "\t" << node->input_pins[0]->name << "\n"; @@ -769,8 +774,7 @@ void passed_verify_i_o_availabilty(nnode_t* node, int expected_input_size, int e error = 1; } - if (expected_output_size != -1 - && node->num_output_pins != expected_output_size) { + if (expected_output_size != -1 && node->num_output_pins != expected_output_size) { err_message << " output size is " << std::to_string(node->num_output_pins) << " expected 1:\n"; for (int i = 0; i < node->num_output_pins; i++) err_message << "\t" << node->output_pins[0]->name << "\n"; @@ -779,15 +783,14 @@ void passed_verify_i_o_availabilty(nnode_t* node, int expected_input_size, int e } if (error) - error_message(UTIL, node->loc, "failed for %s:%s %s\n", node_name_based_on_op(node), node->name, err_message.str().c_str()); + error_message(UTIL, node->loc, "failed for %s:%s %s\n", node_name_based_on_op(node), node->name, + err_message.str().c_str()); } /* * Prints the time in appropriate units. */ -void print_time(double time) { - printf("%.1fms", time * 1000); -} +void print_time(double time) { printf("%.1fms", time * 1000); } /* * Gets the current time in seconds. @@ -1003,7 +1006,8 @@ void print_input_files_info() { case (file_type_e::SYSTEM_VERILOG): //fallthorugh case (file_type_e::UHDM): { for (std::string v_file : global_args.input_files.value()) - printf("Input %s file: %s\n", file_type_strmap[configuration.input_file_type].c_str(), vtr::basename(v_file).c_str()); + printf("Input %s file: %s\n", file_type_strmap[configuration.input_file_type].c_str(), + vtr::basename(v_file).c_str()); break; } case (file_type_e::EBLIF): //fallthrough @@ -1019,8 +1023,7 @@ void print_input_files_info() { supported_extension_list += iter.first; } - possible_error_message(UTIL, unknown_location, - "Invalid input file extension, Odin only supports { %s }", + possible_error_message(UTIL, unknown_location, "Invalid input file extension, Odin only supports { %s }", supported_extension_list.c_str()); break; } diff --git a/odin_ii/src/utils/odin_util.h b/odin_ii/src/utils/odin_util.h index aea84649868..3f949584712 100644 --- a/odin_ii/src/utils/odin_util.h +++ b/odin_ii/src/utils/odin_util.h @@ -48,7 +48,11 @@ const char* node_name_based_on_op(nnode_t* node); const char* ast_node_name_based_on_ids(ast_node_t* node); char* make_signal_name(char* signal_name, int bit); -char* make_full_ref_name(const char* previous, const char* module_name, const char* module_instance_name, const char* signal_name, long bit); +char* make_full_ref_name(const char* previous, + const char* module_name, + const char* module_instance_name, + const char* signal_name, + long bit); bool output_vector_headers_equal(char* buffer1, char* buffer2); int is_string_of_radix(char* string, int radix); @@ -92,7 +96,11 @@ bool only_one_is_true(std::vector tested); int odin_sprintf(char* s, const char* format, ...); char* str_collate(char* str1, char* str2); -void passed_verify_i_o_availabilty(nnode_t* node, int expected_input_size, int expected_output_size, const char* current_src, int line_src); +void passed_verify_i_o_availabilty(nnode_t* node, + int expected_input_size, + int expected_output_size, + const char* current_src, + int line_src); void print_input_files_info(); diff --git a/odin_ii/src/utils/string_cache.cpp b/odin_ii/src/utils/string_cache.cpp index 98c3f7ea2f5..dca69b26aa4 100644 --- a/odin_ii/src/utils/string_cache.cpp +++ b/odin_ii/src/utils/string_cache.cpp @@ -31,14 +31,10 @@ #include "vtr_util.h" #include "vtr_memory.h" -unsigned long -string_hash(STRING_CACHE* sc, - const char* string); +unsigned long string_hash(STRING_CACHE* sc, const char* string); void generate_sc_hash(STRING_CACHE* sc); -unsigned long -string_hash(STRING_CACHE* sc, - const char* string) { +unsigned long string_hash(STRING_CACHE* sc, const char* string) { long a, i, mod, mul; a = 0; @@ -69,8 +65,7 @@ void generate_sc_hash(STRING_CACHE* sc) { } } -STRING_CACHE* -sc_new_string_cache(void) { +STRING_CACHE* sc_new_string_cache(void) { STRING_CACHE* sc; sc = (STRING_CACHE*)sc_do_alloc(1, sizeof(STRING_CACHE)); @@ -87,8 +82,7 @@ sc_new_string_cache(void) { return sc; } -long sc_lookup_string(STRING_CACHE* sc, - const char* string) { +long sc_lookup_string(STRING_CACHE* sc, const char* string) { long i, hash; if (sc == NULL) { @@ -105,8 +99,7 @@ long sc_lookup_string(STRING_CACHE* sc, } } -long sc_add_string(STRING_CACHE* sc, - const char* string) { +long sc_add_string(STRING_CACHE* sc, const char* string) { long i; long hash; void* a; @@ -141,8 +134,7 @@ long sc_add_string(STRING_CACHE* sc, return i; } -void* sc_do_alloc(long a, - long b) { +void* sc_do_alloc(long a, long b) { void* r; if (a < 1) @@ -151,9 +143,7 @@ void* sc_do_alloc(long a, b = 1; r = vtr::calloc(a, b); while (r == NULL) { - fprintf(stderr, - "Failed to allocated %ld chunks of %ld bytes (%ld bytes total)\n", - a, b, a * b); + fprintf(stderr, "Failed to allocated %ld chunks of %ld bytes (%ld bytes total)\n", a, b, a * b); r = vtr::calloc(a, b); } return r; diff --git a/odin_ii/src/verilog/verilog_reader.cpp b/odin_ii/src/verilog/verilog_reader.cpp index 86e63402747..4226f23c8d5 100644 --- a/odin_ii/src/verilog/verilog_reader.cpp +++ b/odin_ii/src/verilog/verilog_reader.cpp @@ -36,7 +36,9 @@ verilog::reader::~reader() = default; void* verilog::reader::_read() { /* parse to abstract syntax tree */ - printf("Parser starting - we'll create an abstract syntax tree. Note this tree can be viewed using Grap Viz (see documentation)\n"); + printf( + "Parser starting - we'll create an abstract syntax tree. Note this tree can be viewed using Grap Viz (see " + "documentation)\n"); verilog_ast = init_parser(); parse_to_ast(); diff --git a/odin_ii/src/verilog/verilog_writer.cpp b/odin_ii/src/verilog/verilog_writer.cpp index 623f16de861..14171fcf869 100644 --- a/odin_ii/src/verilog/verilog_writer.cpp +++ b/odin_ii/src/verilog/verilog_writer.cpp @@ -46,16 +46,15 @@ inline void verilog::writer::_create_file(const char* file_name, const file_type oassert(file_name); // validate the file type if (file_type != VERILOG) - error_message(UTIL, unknown_location, - "verilog back-end entity cannot create file types(%d) other than verilog", file_type); + error_message(UTIL, unknown_location, "verilog back-end entity cannot create file types(%d) other than verilog", + file_type); // create the verilog file and set it as the output file this->output_file = create_verilog(file_name); } void verilog::writer::_write(const netlist_t* netlist) { // to write the top module and netlist components - if (netlist) { - /* [TODO] */ + if (netlist) { /* [TODO] */ } // print out the rest od models, including DSPs in the target architecture diff --git a/vpr/src/analysis/timing_reports.cpp b/vpr/src/analysis/timing_reports.cpp index 7ff47a81cf9..07a450c454c 100644 --- a/vpr/src/analysis/timing_reports.cpp +++ b/vpr/src/analysis/timing_reports.cpp @@ -21,20 +21,25 @@ void generate_setup_timing_stats(const std::string& prefix, auto& timing_ctx = g_vpr_ctx.timing(); auto& atom_ctx = g_vpr_ctx.atom(); - print_setup_timing_summary(*timing_ctx.constraints, *timing_info.setup_analyzer(), "Final ", analysis_opts.write_timing_summary); + print_setup_timing_summary(*timing_ctx.constraints, *timing_info.setup_analyzer(), "Final ", + analysis_opts.write_timing_summary); - VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, blk_loc_registry); + VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, + blk_loc_registry); resolver.set_detail_level(analysis_opts.timing_report_detail); tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, *timing_ctx.constraints); - timing_reporter.report_timing_setup(prefix + "report_timing.setup.rpt", *timing_info.setup_analyzer(), analysis_opts.timing_report_npaths); + timing_reporter.report_timing_setup(prefix + "report_timing.setup.rpt", *timing_info.setup_analyzer(), + analysis_opts.timing_report_npaths); if (analysis_opts.timing_report_skew) { - timing_reporter.report_skew_setup(prefix + "report_skew.setup.rpt", *timing_info.setup_analyzer(), analysis_opts.timing_report_npaths); + timing_reporter.report_skew_setup(prefix + "report_skew.setup.rpt", *timing_info.setup_analyzer(), + analysis_opts.timing_report_npaths); } - timing_reporter.report_unconstrained_setup(prefix + "report_unconstrained_timing.setup.rpt", *timing_info.setup_analyzer()); + timing_reporter.report_unconstrained_setup(prefix + "report_unconstrained_timing.setup.rpt", + *timing_info.setup_analyzer()); } void generate_hold_timing_stats(const std::string& prefix, @@ -48,16 +53,20 @@ void generate_hold_timing_stats(const std::string& prefix, print_hold_timing_summary(*timing_ctx.constraints, *timing_info.hold_analyzer(), "Final "); - VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, blk_loc_registry); + VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, + blk_loc_registry); resolver.set_detail_level(analysis_opts.timing_report_detail); tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, *timing_ctx.constraints); - timing_reporter.report_timing_hold(prefix + "report_timing.hold.rpt", *timing_info.hold_analyzer(), analysis_opts.timing_report_npaths); + timing_reporter.report_timing_hold(prefix + "report_timing.hold.rpt", *timing_info.hold_analyzer(), + analysis_opts.timing_report_npaths); if (analysis_opts.timing_report_skew) { - timing_reporter.report_skew_hold(prefix + "report_skew.hold.rpt", *timing_info.hold_analyzer(), analysis_opts.timing_report_npaths); + timing_reporter.report_skew_hold(prefix + "report_skew.hold.rpt", *timing_info.hold_analyzer(), + analysis_opts.timing_report_npaths); } - timing_reporter.report_unconstrained_hold(prefix + "report_unconstrained_timing.hold.rpt", *timing_info.hold_analyzer()); + timing_reporter.report_unconstrained_hold(prefix + "report_unconstrained_timing.hold.rpt", + *timing_info.hold_analyzer()); } diff --git a/vpr/src/analytical_place/analytical_placement_flow.cpp b/vpr/src/analytical_place/analytical_placement_flow.cpp index dd25b531dbd..a444b280a3d 100644 --- a/vpr/src/analytical_place/analytical_placement_flow.cpp +++ b/vpr/src/analytical_place/analytical_placement_flow.cpp @@ -71,39 +71,24 @@ void run_analytical_placement_flow(t_vpr_setup& vpr_setup) { // Create the ap netlist from the atom netlist using the result from the // prepacker. - APNetlist ap_netlist = gen_ap_netlist_from_atoms(atom_nlist, - prepacker, - constraints); + APNetlist ap_netlist = gen_ap_netlist_from_atoms(atom_nlist, prepacker, constraints); print_ap_netlist_stats(ap_netlist); // Run the Global Placer // For now, just runs the solver. PartialPlacement p_placement(ap_netlist); - std::unique_ptr solver = make_analytical_solver(e_analytical_solver::QP_HYBRID, - ap_netlist); + std::unique_ptr solver = make_analytical_solver(e_analytical_solver::QP_HYBRID, ap_netlist); solver->solve(0, p_placement); // Verify that the partial placement is valid before running the full // legalizer. const size_t device_width = device_ctx.grid.width(); const size_t device_height = device_ctx.grid.height(); - VTR_ASSERT(p_placement.verify(ap_netlist, - device_width, - device_height, - device_ctx.grid.get_num_layers())); + VTR_ASSERT(p_placement.verify(ap_netlist, device_width, device_height, device_ctx.grid.get_num_layers())); // Run the Full Legalizer. - FullLegalizer full_legalizer(ap_netlist, - vpr_setup, - device_ctx.grid, - device_ctx.arch, - atom_nlist, - prepacker, - device_ctx.logical_block_types, - vpr_setup.PackerRRGraph, - device_ctx.arch->models, - device_ctx.arch->model_library, - vpr_setup.PackerOpts); + FullLegalizer full_legalizer(ap_netlist, vpr_setup, device_ctx.grid, device_ctx.arch, atom_nlist, prepacker, + device_ctx.logical_block_types, vpr_setup.PackerRRGraph, device_ctx.arch->models, + device_ctx.arch->model_library, vpr_setup.PackerOpts); full_legalizer.legalize(p_placement); } - diff --git a/vpr/src/analytical_place/analytical_placement_flow.h b/vpr/src/analytical_place/analytical_placement_flow.h index 638456177f1..527fe241706 100644 --- a/vpr/src/analytical_place/analytical_placement_flow.h +++ b/vpr/src/analytical_place/analytical_placement_flow.h @@ -16,4 +16,3 @@ struct t_vpr_setup; * @param vpr_setup The setup options provided by the user. */ void run_analytical_placement_flow(t_vpr_setup& vpr_setup); - diff --git a/vpr/src/analytical_place/analytical_solver.cpp b/vpr/src/analytical_place/analytical_solver.cpp index e15f510a20b..41e8c923375 100644 --- a/vpr/src/analytical_place/analytical_solver.cpp +++ b/vpr/src/analytical_place/analytical_solver.cpp @@ -26,8 +26,7 @@ #include #endif // EIGEN_INSTALLED -std::unique_ptr make_analytical_solver(e_analytical_solver solver_type, - const APNetlist& netlist) { +std::unique_ptr make_analytical_solver(e_analytical_solver solver_type, const APNetlist& netlist) { // Based on the solver type passed in, build the solver. switch (solver_type) { case e_analytical_solver::QP_HYBRID: @@ -35,22 +34,20 @@ std::unique_ptr make_analytical_solver(e_analytical_solver sol return std::make_unique(netlist); #else (void)netlist; - VPR_FATAL_ERROR(VPR_ERROR_AP, - "QP Hybrid Solver requires the Eigen library"); + VPR_FATAL_ERROR(VPR_ERROR_AP, "QP Hybrid Solver requires the Eigen library"); break; #endif // EIGEN_INSTALLED default: - VPR_FATAL_ERROR(VPR_ERROR_AP, - "Unrecognized analytical solver type"); + VPR_FATAL_ERROR(VPR_ERROR_AP, "Unrecognized analytical solver type"); break; } return nullptr; } AnalyticalSolver::AnalyticalSolver(const APNetlist& netlist) - : netlist_(netlist), - blk_id_to_row_id_(netlist.blocks().size(), APRowId::INVALID()), - row_id_to_blk_id_(netlist.blocks().size(), APBlockId::INVALID()) { + : netlist_(netlist) + , blk_id_to_row_id_(netlist.blocks().size(), APRowId::INVALID()) + , row_id_to_blk_id_(netlist.blocks().size(), APBlockId::INVALID()) { // Get the number of moveable blocks in the netlist and create a unique // row ID from [0, num_moveable_blocks) for each moveable block in the // netlist. @@ -183,8 +180,7 @@ void QPHybridSolver::init_linear_system() { size_t star_node_id = num_moveable_blocks_ + star_node_offset; for (APPinId pin_id : netlist_.net_pins(net_id)) { APBlockId blk_id = netlist_.pin_block(pin_id); - add_connection_to_system(star_node_id, blk_id, w, tripletList, - b_x, b_y, A_sparse, blk_id_to_row_id_, + add_connection_to_system(star_node_id, blk_id, w, tripletList, b_x, b_y, A_sparse, blk_id_to_row_id_, netlist_); } star_node_offset++; @@ -213,9 +209,8 @@ void QPHybridSolver::init_linear_system() { std::swap(first_blk_id, second_blk_id); } size_t first_row_id = (size_t)blk_id_to_row_id_[first_blk_id]; - add_connection_to_system(first_row_id, second_blk_id, w, tripletList, - b_x, b_y, A_sparse, blk_id_to_row_id_, - netlist_); + add_connection_to_system(first_row_id, second_blk_id, w, tripletList, b_x, b_y, A_sparse, + blk_id_to_row_id_, netlist_); } } } @@ -252,16 +247,15 @@ void QPHybridSolver::init_linear_system() { * @param row_id_to_blk_id Lookup for the row id from the APBlock Id. * @param iteration The current iteration of the Global Placer. */ -static inline void update_linear_system_with_anchors( - Eigen::SparseMatrix &A_sparse_diff, - Eigen::VectorXd &b_x_diff, - Eigen::VectorXd &b_y_diff, - PartialPlacement& p_placement, - size_t num_moveable_blocks, - vtr::vector row_id_to_blk_id, - unsigned iteration) { +static inline void update_linear_system_with_anchors(Eigen::SparseMatrix& A_sparse_diff, + Eigen::VectorXd& b_x_diff, + Eigen::VectorXd& b_y_diff, + PartialPlacement& p_placement, + size_t num_moveable_blocks, + vtr::vector row_id_to_blk_id, + unsigned iteration) { // Anchor weights grow exponentially with iteration. - double coeff_pseudo_anchor = 0.01 * std::exp((double)iteration/5); + double coeff_pseudo_anchor = 0.01 * std::exp((double)iteration / 5); for (size_t row_id_idx = 0; row_id_idx < num_moveable_blocks; row_id_idx++) { APRowId row_id = APRowId(row_id_idx); APBlockId blk_id = row_id_to_blk_id[row_id]; @@ -272,7 +266,7 @@ static inline void update_linear_system_with_anchors( } } -void QPHybridSolver::solve(unsigned iteration, PartialPlacement &p_placement) { +void QPHybridSolver::solve(unsigned iteration, PartialPlacement& p_placement) { // Create a temporary linear system which will contain the original linear // system which may be updated to include the anchor points. Eigen::SparseMatrix A_sparse_diff = Eigen::SparseMatrix(A_sparse); @@ -282,8 +276,7 @@ void QPHybridSolver::solve(unsigned iteration, PartialPlacement &p_placement) { // In any other iteration, use the moveable APBlocks current placement as // anchor-points (fixed block positions). if (iteration != 0) { - update_linear_system_with_anchors(A_sparse_diff, b_x_diff, b_y_diff, - p_placement, num_moveable_blocks_, + update_linear_system_with_anchors(A_sparse_diff, b_x_diff, b_y_diff, p_placement, num_moveable_blocks_, row_id_to_blk_id_, iteration); } // Verify that the constant vectors are valid. @@ -295,7 +288,7 @@ void QPHybridSolver::solve(unsigned iteration, PartialPlacement &p_placement) { // - This tolerance may need to be a function of the number of nets. // - Instead of normalizing the fixed blocks, the tolerance can be scaled // by the size of the device. - Eigen::ConjugateGradient, Eigen::Lower|Eigen::Upper> cg; + Eigen::ConjugateGradient, Eigen::Lower | Eigen::Upper> cg; cg.compute(A_sparse_diff); VTR_ASSERT(cg.info() == Eigen::Success && "Conjugate Gradient failed at compute!"); // Use the solver to solve for x and y using the constant vectors @@ -321,4 +314,3 @@ void QPHybridSolver::solve(unsigned iteration, PartialPlacement &p_placement) { } #endif // EIGEN_INSTALLED - diff --git a/vpr/src/analytical_place/analytical_solver.h b/vpr/src/analytical_place/analytical_solver.h index a86eae6d073..f1d4535ec8f 100644 --- a/vpr/src/analytical_place/analytical_solver.h +++ b/vpr/src/analytical_place/analytical_solver.h @@ -15,7 +15,7 @@ #ifdef EIGEN_INSTALLED #include "Eigen/Sparse" -#endif // EIGEN_INSTALLED +#endif // EIGEN_INSTALLED // Forward declarations class PartialPlacement; @@ -27,7 +27,7 @@ class APNetlist; * NOTE: More are coming. */ enum class e_analytical_solver { - QP_HYBRID // A solver which optimizes the quadratic HPWL of the design. + QP_HYBRID // A solver which optimizes the quadratic HPWL of the design. }; /** @@ -49,7 +49,7 @@ typedef vtr::StrongId APRowId; * compare different solvers. */ class AnalyticalSolver { -public: + public: virtual ~AnalyticalSolver() {} /** @@ -58,7 +58,7 @@ class AnalyticalSolver { * Initializes the internal data members of the base class which are useful * for all solvers. */ - AnalyticalSolver(const APNetlist &netlist); + AnalyticalSolver(const APNetlist& netlist); /** * @brief Run an iteration of the solver using the given partial placement @@ -78,10 +78,9 @@ class AnalyticalSolver { * @param p_placement A "hint" to a legal solution that the solver should * try and be like. */ - virtual void solve(unsigned iteration, PartialPlacement &p_placement) = 0; - -protected: + virtual void solve(unsigned iteration, PartialPlacement& p_placement) = 0; + protected: /// @brief The APNetlist the solver is optimizing over. It is implied that /// the netlist is not being modified during global placement. const APNetlist& netlist_; @@ -105,8 +104,7 @@ class AnalyticalSolver { /** * @brief A factory method which creates an Analytical Solver of the given type. */ -std::unique_ptr make_analytical_solver(e_analytical_solver solver_type, - const APNetlist &netlist); +std::unique_ptr make_analytical_solver(e_analytical_solver solver_type, const APNetlist& netlist); // The Eigen library is used to solve matrix equations in the following solvers. // The solver cannot be built if Eigen is not installed. @@ -136,7 +134,7 @@ std::unique_ptr make_analytical_solver(e_analytical_solver sol * https://doi.org/10.1109/TCAD.2005.846365 */ class QPHybridSolver : public AnalyticalSolver { -private: + private: /// @brief The threshold for the number of pins a net will have to use the /// Star or Clique net models. If the number of pins is larger /// than this number, a star node will be created. @@ -173,14 +171,14 @@ class QPHybridSolver : public AnalyticalSolver { /// @brief The constant vector in the y dimension for the linear system. Eigen::VectorXd b_y; -public: - + public: /** * @brief Constructor of the QPHybridSolver * * Initializes internal data and constructs the initial linear system. */ - QPHybridSolver(const APNetlist& netlist) : AnalyticalSolver(netlist) { + QPHybridSolver(const APNetlist& netlist) + : AnalyticalSolver(netlist) { // Initializing the linear system only depends on the netlist and fixed // block locations. Both are provided by the netlist, allowing this to // be initialized in the constructor. @@ -207,8 +205,7 @@ class QPHybridSolver : public AnalyticalSolver { * @param p_placement A "guess" solution. The result will be written into * this object. */ - void solve(unsigned iteration, PartialPlacement &p_placement) final; + void solve(unsigned iteration, PartialPlacement& p_placement) final; }; #endif // EIGEN_INSTALLED - diff --git a/vpr/src/analytical_place/ap_netlist.cpp b/vpr/src/analytical_place/ap_netlist.cpp index 6ae59e596b4..e1bc61e169e 100644 --- a/vpr/src/analytical_place/ap_netlist.cpp +++ b/vpr/src/analytical_place/ap_netlist.cpp @@ -59,18 +59,15 @@ void APNetlist::set_block_loc(const APBlockId id, const APFixedBlockLoc& loc) { VTR_ASSERT_SAFE(valid_block_id(id)); // Check that the location is fixed; if all dims are unfixed then it is not fixed. - if (loc.x == APFixedBlockLoc::UNFIXED_DIM && - loc.y == APFixedBlockLoc::UNFIXED_DIM && - loc.sub_tile == APFixedBlockLoc::UNFIXED_DIM && - loc.layer_num == APFixedBlockLoc::UNFIXED_DIM) + if (loc.x == APFixedBlockLoc::UNFIXED_DIM && loc.y == APFixedBlockLoc::UNFIXED_DIM + && loc.sub_tile == APFixedBlockLoc::UNFIXED_DIM && loc.layer_num == APFixedBlockLoc::UNFIXED_DIM) return; // Ensure that the block is fixed to a single position on the grid (x, y, layer). // sub-tile is allowed to be unfixed. - VTR_ASSERT(loc.x != APFixedBlockLoc::UNFIXED_DIM && - loc.y != APFixedBlockLoc::UNFIXED_DIM && - loc.layer_num != APFixedBlockLoc::UNFIXED_DIM && - "AP: Currently, AP assumes block is locked down to a single position on the device grid."); + VTR_ASSERT(loc.x != APFixedBlockLoc::UNFIXED_DIM && loc.y != APFixedBlockLoc::UNFIXED_DIM + && loc.layer_num != APFixedBlockLoc::UNFIXED_DIM + && "AP: Currently, AP assumes block is locked down to a single position on the device grid."); block_locs_[id] = loc; block_mobilities_[id] = APBlockMobility::FIXED; @@ -93,7 +90,11 @@ APPortId APNetlist::create_port(const APBlockId blk_id, const std::string& name, return port_id; } -APPinId APNetlist::create_pin(const APPortId port_id, BitIndex port_bit, const APNetId net_id, const PinType pin_type_, bool is_const) { +APPinId APNetlist::create_pin(const APPortId port_id, + BitIndex port_bit, + const APNetId net_id, + const PinType pin_type_, + bool is_const) { APPinId pin_id = Netlist::create_pin(port_id, port_bit, net_id, pin_type_, is_const); // Check post-conditions: size @@ -145,11 +146,13 @@ void APNetlist::rebuild_block_refs_impl(const vtr::vector_map& // Unused } -void APNetlist::rebuild_port_refs_impl(const vtr::vector_map& /*block_id_map*/, const vtr::vector_map& /*pin_id_map*/) { +void APNetlist::rebuild_port_refs_impl(const vtr::vector_map& /*block_id_map*/, + const vtr::vector_map& /*pin_id_map*/) { // Unused } -void APNetlist::rebuild_pin_refs_impl(const vtr::vector_map& /*port_id_map*/, const vtr::vector_map& /*net_id_map*/) { +void APNetlist::rebuild_pin_refs_impl(const vtr::vector_map& /*port_id_map*/, + const vtr::vector_map& /*net_id_map*/) { // Unused } @@ -207,4 +210,3 @@ bool APNetlist::validate_net_sizes_impl(size_t /*num_nets*/) const { // No AP-specific net data to check return true; } - diff --git a/vpr/src/analytical_place/ap_netlist.h b/vpr/src/analytical_place/ap_netlist.h index ec64ae38a9b..d4694b8760f 100644 --- a/vpr/src/analytical_place/ap_netlist.h +++ b/vpr/src/analytical_place/ap_netlist.h @@ -51,8 +51,8 @@ struct APFixedBlockLoc { * block ids. */ enum class APBlockMobility : bool { - MOVEABLE, // The block is not constrained in any dimension. - FIXED // The block is fixed. + MOVEABLE, // The block is not constrained in any dimension. + FIXED // The block is fixed. }; /** @@ -64,7 +64,7 @@ enum class APBlockMobility : bool { * APBlocks. These need not have physical meaning. */ class APNetlist : public Netlist { -public: + public: /** * @brief Constructs a netlist * @@ -72,12 +72,13 @@ class APNetlist : public Netlist { * @param id A unique identifier for the netlist (e.g. a secure digest of * the input file) */ - APNetlist(std::string name = "", std::string id = "") : Netlist(name, id) {} + APNetlist(std::string name = "", std::string id = "") + : Netlist(name, id) {} APNetlist(const APNetlist& rhs) = default; APNetlist& operator=(const APNetlist& rhs) = default; -public: // Public Accessors + public: // Public Accessors /* * Blocks */ @@ -92,7 +93,7 @@ class APNetlist : public Netlist { /// This method should not be used if the block is moveable. const APFixedBlockLoc& block_loc(const APBlockId id) const; -public: // Public Mutators + public: // Public Mutators /* * Note: all create_*() functions will silently return the appropriate ID * if it has already been created. @@ -134,7 +135,11 @@ class APNetlist : public Netlist { * @param is_const Indicates whether the pin holds a constant value (e.g. * vcc/gnd) */ - APPinId create_pin(const APPortId port_id, BitIndex port_bit, const APNetId net_id, const PinType pin_type, bool is_const = false); + APPinId create_pin(const APPortId port_id, + BitIndex port_bit, + const APNetId net_id, + const PinType pin_type, + bool is_const = false); /** * @brief Create an empty, or return an existing net in the netlist @@ -143,7 +148,7 @@ class APNetlist : public Netlist { */ APNetId create_net(const std::string& name); -private: // Private Members + private: // Private Members /* * Netlist compression / optimization */ @@ -154,9 +159,12 @@ class APNetlist : public Netlist { void clean_pins_impl(const vtr::vector_map& pin_id_map) override; void clean_nets_impl(const vtr::vector_map& net_id_map) override; - void rebuild_block_refs_impl(const vtr::vector_map& pin_id_map, const vtr::vector_map& port_id_map) override; - void rebuild_port_refs_impl(const vtr::vector_map& block_id_map, const vtr::vector_map& pin_id_map) override; - void rebuild_pin_refs_impl(const vtr::vector_map& port_id_map, const vtr::vector_map& net_id_map) override; + void rebuild_block_refs_impl(const vtr::vector_map& pin_id_map, + const vtr::vector_map& port_id_map) override; + void rebuild_port_refs_impl(const vtr::vector_map& block_id_map, + const vtr::vector_map& pin_id_map) override; + void rebuild_pin_refs_impl(const vtr::vector_map& port_id_map, + const vtr::vector_map& net_id_map) override; void rebuild_net_refs_impl(const vtr::vector_map& pin_id_map) override; /// @brief Shrinks internal data structures to required size to reduce @@ -180,7 +188,7 @@ class APNetlist : public Netlist { bool validate_pin_sizes_impl(size_t num_pins) const override; bool validate_net_sizes_impl(size_t num_nets) const override; -private: // Private Data + private: // Private Data /// @brief Molecule of each block vtr::vector_map block_molecules_; /// @brief Type of each block @@ -189,4 +197,3 @@ class APNetlist : public Netlist { /// NOTE: This vector will likely be quite sparse. vtr::vector_map block_locs_; }; - diff --git a/vpr/src/analytical_place/ap_netlist_fwd.h b/vpr/src/analytical_place/ap_netlist_fwd.h index 3fc9e87dea7..ede36cf6a07 100644 --- a/vpr/src/analytical_place/ap_netlist_fwd.h +++ b/vpr/src/analytical_place/ap_netlist_fwd.h @@ -26,7 +26,7 @@ class APNetlist; * @brief A unique identifier for a block in the AP netlist */ class APBlockId : public ParentBlockId { -public: + public: static constexpr APBlockId INVALID() { return APBlockId(); } using ParentBlockId::ParentBlockId; @@ -37,7 +37,7 @@ class APBlockId : public ParentBlockId { * @brief A unique identifier for a net in the AP netlist */ class APNetId : public ParentNetId { -public: + public: static constexpr APNetId INVALID() { return APNetId(); } using ParentNetId::ParentNetId; @@ -48,7 +48,7 @@ class APNetId : public ParentNetId { * @brief A unique identifier for a port in the AP netlist */ class APPortId : public ParentPortId { -public: + public: static constexpr APPortId INVALID() { return APPortId(); } using ParentPortId::ParentPortId; @@ -59,7 +59,7 @@ class APPortId : public ParentPortId { * @brief A unique identifier for a pin in the AP netlist */ class APPinId : public ParentPinId { -public: + public: static constexpr APPinId INVALID() { return APPinId(); } using ParentPinId::ParentPinId; @@ -101,4 +101,3 @@ struct hash { } }; } // namespace std - diff --git a/vpr/src/analytical_place/full_legalizer.cpp b/vpr/src/analytical_place/full_legalizer.cpp index 8f78785e6fe..319472aad87 100644 --- a/vpr/src/analytical_place/full_legalizer.cpp +++ b/vpr/src/analytical_place/full_legalizer.cpp @@ -53,7 +53,7 @@ typedef vtr::StrongId DeviceTileId; * unify the two flows and make it more stable! */ class APClusterPlacer { -private: + private: // Get the macro for the given cluster block. t_pl_macro get_macro(ClusterBlockId clb_blk_id) { // Basically stolen from initial_placement.cpp:place_one_block @@ -74,7 +74,7 @@ class APClusterPlacer { return pl_macro; } -public: + public: /** * @brief Constructor for the APClusterPlacer * @@ -118,9 +118,7 @@ class APClusterPlacer { * @brief Given a cluster and tile it wants to go into, try to place the * cluster at this tile's postion. */ - bool place_cluster(ClusterBlockId clb_blk_id, - const t_physical_tile_loc& tile_loc, - int sub_tile) { + bool place_cluster(ClusterBlockId clb_blk_id, const t_physical_tile_loc& tile_loc, int sub_tile) { const DeviceContext& device_ctx = g_vpr_ctx.device(); // FIXME: THIS MUST TAKE INTO ACCOUNT THE CONSTRAINTS AS WELL!!! // - Right now it is just implied. @@ -153,7 +151,9 @@ class APClusterPlacer { auto& blk_loc_registry = g_vpr_ctx.mutable_placement().mutable_blk_loc_registry(); VTR_ASSERT(!is_block_placed(clb_blk_id, block_locs) && "Block already placed. Is this intentional?"); t_pl_macro pl_macro = get_macro(clb_blk_id); - const PartitionRegion& pr = is_cluster_constrained(clb_blk_id) ? g_vpr_ctx.floorplanning().cluster_constraints[clb_blk_id] : get_device_partition_region(); + const PartitionRegion& pr = is_cluster_constrained(clb_blk_id) + ? g_vpr_ctx.floorplanning().cluster_constraints[clb_blk_id] + : get_device_partition_region(); t_logical_block_type_ptr block_type = g_vpr_ctx.clustering().clb_nlist.block_type(clb_blk_id); // FIXME: We really should get this from the place context, not the device context. // - Stealing it for now to get this to work. @@ -175,9 +175,10 @@ class APClusterPlacer { * @param primitive_candidate_block_types A list of candidate block types for * the given molecule. */ -static LegalizationClusterId create_new_cluster(t_pack_molecule* seed_molecule, - ClusterLegalizer& cluster_legalizer, - const std::map>& primitive_candidate_block_types) { +static LegalizationClusterId create_new_cluster( + t_pack_molecule* seed_molecule, + ClusterLegalizer& cluster_legalizer, + const std::map>& primitive_candidate_block_types) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); // This was stolen from pack/cluster_util.cpp:start_new_cluster // It tries to find a block type and mode for the given molecule. @@ -203,8 +204,7 @@ static LegalizationClusterId create_new_cluster(t_pack_molecule* seed_molecule, } } // This should never happen. - VPR_FATAL_ERROR(VPR_ERROR_AP, - "Unable to create a cluster for the given seed molecule"); + VPR_FATAL_ERROR(VPR_ERROR_AP, "Unable to create a cluster for the given seed molecule"); return LegalizationClusterId(); } @@ -214,18 +214,11 @@ void FullLegalizer::create_clusters(const PartialPlacement& p_placement) { // FIXME: The legalization strategy is currently set to full. Should handle // this better to make it faster. t_pack_high_fanout_thresholds high_fanout_thresholds(packer_opts_.high_fanout_threshold); - ClusterLegalizer cluster_legalizer(atom_netlist_, - prepacker_, - logical_block_types_, - lb_type_rr_graphs_, - user_models_, - library_models_, - packer_opts_.target_external_pin_util, - high_fanout_thresholds, - ClusterLegalizationStrategy::FULL, + ClusterLegalizer cluster_legalizer(atom_netlist_, prepacker_, logical_block_types_, lb_type_rr_graphs_, + user_models_, library_models_, packer_opts_.target_external_pin_util, + high_fanout_thresholds, ClusterLegalizationStrategy::FULL, packer_opts_.enable_pin_feasibility_filter, - packer_opts_.feasible_block_array_size, - packer_opts_.pack_verbosity); + packer_opts_.feasible_block_array_size, packer_opts_.pack_verbosity); // Create clusters for each tile. // Start by giving each root tile a unique ID. size_t grid_width = device_grid_.width(); @@ -258,8 +251,8 @@ void FullLegalizer::create_clusters(const PartialPlacement& p_placement) { blocks_in_tiles[tile_id].push_back(ap_blk_id); } // Create the legalized clusters per tile. - std::map> - primitive_candidate_block_types = identify_primitive_candidate_block_types(); + std::map> primitive_candidate_block_types + = identify_primitive_candidate_block_types(); for (size_t tile_id_idx = 0; tile_id_idx < num_device_tiles; tile_id_idx++) { DeviceTileId tile_id = DeviceTileId(tile_id_idx); // Create the molecule list @@ -277,7 +270,8 @@ void FullLegalizer::create_clusters(const PartialPlacement& p_placement) { t_pack_molecule* seed_mol = mol_list.front(); mol_list.pop_front(); // Use the seed molecule to create a cluster for this tile. - LegalizationClusterId new_cluster_id = create_new_cluster(seed_mol, cluster_legalizer, primitive_candidate_block_types); + LegalizationClusterId new_cluster_id + = create_new_cluster(seed_mol, cluster_legalizer, primitive_candidate_block_types); // Insert all molecules that you can into the cluster. // NOTE: If the mol_list was somehow sorted, we can just stop at // first failure! @@ -319,8 +313,7 @@ void FullLegalizer::create_clusters(const PartialPlacement& p_placement) { print_pb_type_count(clb_nlist); } -void FullLegalizer::place_clusters(const ClusteredNetlist& clb_nlist, - const PartialPlacement& p_placement) { +void FullLegalizer::place_clusters(const ClusteredNetlist& clb_nlist, const PartialPlacement& p_placement) { // PLACING: // Create a lookup from the AtomBlockId to the APBlockId vtr::vector atom_to_ap_block(atom_netlist_.blocks().size()); @@ -365,8 +358,7 @@ void FullLegalizer::place_clusters(const ClusteredNetlist& clb_nlist, for (ClusterBlockId clb_blk_id : unplaced_clusters) { bool success = ap_cluster_placer.exhaustively_place_cluster(clb_blk_id); if (!success) { - VPR_FATAL_ERROR(VPR_ERROR_AP, - "Unable to find valid place for cluster in AP placement!"); + VPR_FATAL_ERROR(VPR_ERROR_AP, "Unable to find valid place for cluster in AP placement!"); } } @@ -394,4 +386,3 @@ void FullLegalizer::legalize(const PartialPlacement& p_placement) { // Place the clusters based on where the atoms want to be placed. place_clusters(clb_nlist, p_placement); } - diff --git a/vpr/src/analytical_place/full_legalizer.h b/vpr/src/analytical_place/full_legalizer.h index e5f72586b28..4e517fe5a3f 100644 --- a/vpr/src/analytical_place/full_legalizer.h +++ b/vpr/src/analytical_place/full_legalizer.h @@ -32,7 +32,7 @@ struct t_vpr_setup; * fully legal clustering and placement for use in the rest of the VTR flow. */ class FullLegalizer { -public: + public: /** * @brief Constructor of the Full Legalizer class. * @@ -50,17 +50,17 @@ class FullLegalizer { const t_model* user_models, const t_model* library_models, const t_packer_opts& packer_opts) - : ap_netlist_(ap_netlist), - vpr_setup_(vpr_setup), - device_grid_(device_grid), - arch_(arch), - atom_netlist_(atom_netlist), - prepacker_(prepacker), - logical_block_types_(logical_block_types), - lb_type_rr_graphs_(lb_type_rr_graphs), - user_models_(user_models), - library_models_(library_models), - packer_opts_(packer_opts) {} + : ap_netlist_(ap_netlist) + , vpr_setup_(vpr_setup) + , device_grid_(device_grid) + , arch_(arch) + , atom_netlist_(atom_netlist) + , prepacker_(prepacker) + , logical_block_types_(logical_block_types) + , lb_type_rr_graphs_(lb_type_rr_graphs) + , user_models_(user_models) + , library_models_(library_models) + , packer_opts_(packer_opts) {} /** * @brief Perform legalization on the given partial placement solution @@ -71,7 +71,7 @@ class FullLegalizer { */ void legalize(const PartialPlacement& p_placement); -private: + private: /** * @brief Helper method to create the clusters from the given partial * placement. @@ -84,8 +84,7 @@ class FullLegalizer { * @brief Helper method to place the clusters based on the given partial * placement. */ - void place_clusters(const ClusteredNetlist& clb_nlist, - const PartialPlacement& p_placement); + void place_clusters(const ClusteredNetlist& clb_nlist, const PartialPlacement& p_placement); // AP Context Info const APNetlist& ap_netlist_; @@ -107,4 +106,3 @@ class FullLegalizer { // Placement Context Info // TODO: Populate this once the placer is cleaned up some. }; - diff --git a/vpr/src/analytical_place/gen_ap_netlist_from_atoms.cpp b/vpr/src/analytical_place/gen_ap_netlist_from_atoms.cpp index 34207e88145..32e352ecd57 100644 --- a/vpr/src/analytical_place/gen_ap_netlist_from_atoms.cpp +++ b/vpr/src/analytical_place/gen_ap_netlist_from_atoms.cpp @@ -82,7 +82,8 @@ APNetlist gen_ap_netlist_from_atoms(const AtomNetlist& atom_netlist, const PartitionRegion& partition_pr = constraints.get_partition_pr(part_id); // TODO: Either handle the union of legal locations or turn into a // proper error. - VTR_ASSERT(partition_pr.get_regions().size() == 1 && "AP: Each partition should contain only one region for AP right now."); + VTR_ASSERT(partition_pr.get_regions().size() == 1 + && "AP: Each partition should contain only one region for AP right now."); const Region& region = partition_pr.get_regions()[0]; // Get the x and y. const vtr::Rect& region_rect = region.get_rect(); @@ -91,7 +92,8 @@ APNetlist gen_ap_netlist_from_atoms(const AtomNetlist& atom_netlist, int blk_x_loc = region_rect.xmin(); int blk_y_loc = region_rect.ymin(); // Get the layer. - VTR_ASSERT(region.get_layer_range().first == region.get_layer_range().second && "AP: Expect each region to be a single point in layer!"); + VTR_ASSERT(region.get_layer_range().first == region.get_layer_range().second + && "AP: Expect each region to be a single point in layer!"); int blk_layer_num = region.get_layer_range().first; // Get the sub_tile (if fixed). int blk_sub_tile = APFixedBlockLoc::UNFIXED_DIM; @@ -172,4 +174,3 @@ APNetlist gen_ap_netlist_from_atoms(const AtomNetlist& atom_netlist, return ap_netlist; } - diff --git a/vpr/src/analytical_place/gen_ap_netlist_from_atoms.h b/vpr/src/analytical_place/gen_ap_netlist_from_atoms.h index f03055a826d..ed5ae7bb0d1 100644 --- a/vpr/src/analytical_place/gen_ap_netlist_from_atoms.h +++ b/vpr/src/analytical_place/gen_ap_netlist_from_atoms.h @@ -27,4 +27,3 @@ class UserPlaceConstraints; APNetlist gen_ap_netlist_from_atoms(const AtomNetlist& atom_netlist, const Prepacker& prepacker, const UserPlaceConstraints& constraints); - diff --git a/vpr/src/analytical_place/partial_placement.cpp b/vpr/src/analytical_place/partial_placement.cpp index fc80f43b4a7..1568e6e21c2 100644 --- a/vpr/src/analytical_place/partial_placement.cpp +++ b/vpr/src/analytical_place/partial_placement.cpp @@ -31,9 +31,7 @@ double PartialPlacement::get_hpwl(const APNetlist& netlist) const { return hpwl; } -bool PartialPlacement::verify_locs(const APNetlist& netlist, - size_t grid_width, - size_t grid_height) const { +bool PartialPlacement::verify_locs(const APNetlist& netlist, size_t grid_width, size_t grid_height) const { // Make sure all of the loc values are there. if (block_x_locs.size() != netlist.blocks().size()) return false; @@ -43,13 +41,9 @@ bool PartialPlacement::verify_locs(const APNetlist& netlist, for (APBlockId blk_id : netlist.blocks()) { double x_pos = block_x_locs[blk_id]; double y_pos = block_y_locs[blk_id]; - if (std::isnan(x_pos) || - x_pos < 0.0 || - x_pos >= grid_width) + if (std::isnan(x_pos) || x_pos < 0.0 || x_pos >= grid_width) return false; - if (std::isnan(y_pos) || - y_pos < 0.0 || - y_pos >= grid_height) + if (std::isnan(y_pos) || y_pos < 0.0 || y_pos >= grid_height) return false; if (netlist.block_mobility(blk_id) == APBlockMobility::FIXED) { const APFixedBlockLoc& fixed_loc = netlist.block_loc(blk_id); @@ -63,8 +57,7 @@ bool PartialPlacement::verify_locs(const APNetlist& netlist, return true; } -bool PartialPlacement::verify_layer_nums(const APNetlist& netlist, - size_t grid_num_layers) const { +bool PartialPlacement::verify_layer_nums(const APNetlist& netlist, size_t grid_num_layers) const { // Make sure all of the layer nums are there if (block_layer_nums.size() != netlist.blocks().size()) return false; @@ -120,4 +113,3 @@ bool PartialPlacement::verify(const APNetlist& netlist, // If all other verify methods passed, then the placement is valid. return true; } - diff --git a/vpr/src/analytical_place/partial_placement.h b/vpr/src/analytical_place/partial_placement.h index e111dd7bd79..4b2e0324b05 100644 --- a/vpr/src/analytical_place/partial_placement.h +++ b/vpr/src/analytical_place/partial_placement.h @@ -71,10 +71,10 @@ struct PartialPlacement { * @param netlist The APNetlist which contains the blocks to be placed. */ PartialPlacement(const APNetlist& netlist) - : block_x_locs(netlist.blocks().size(), -1.0), - block_y_locs(netlist.blocks().size(), -1.0), - block_layer_nums(netlist.blocks().size(), 0.0), - block_sub_tiles(netlist.blocks().size(), 0) { + : block_x_locs(netlist.blocks().size(), -1.0) + , block_y_locs(netlist.blocks().size(), -1.0) + , block_layer_nums(netlist.blocks().size(), 0.0) + , block_sub_tiles(netlist.blocks().size(), 0) { // Note: All blocks are initialized to: // x_loc = -1.0 // y_loc = -1.0 @@ -84,7 +84,7 @@ struct PartialPlacement { for (APBlockId blk_id : netlist.blocks()) { if (netlist.block_mobility(blk_id) != APBlockMobility::FIXED) continue; - const APFixedBlockLoc &loc = netlist.block_loc(blk_id); + const APFixedBlockLoc& loc = netlist.block_loc(blk_id); if (loc.x != -1) block_x_locs[blk_id] = loc.x; if (loc.y != -1) @@ -158,9 +158,7 @@ struct PartialPlacement { * @param grid_width The width of the device grid * @param grid_height The height of the device grid */ - bool verify_locs(const APNetlist& netlist, - size_t grid_width, - size_t grid_height) const; + bool verify_locs(const APNetlist& netlist, size_t grid_width, size_t grid_height) const; /** * @brief Verify the block_layer_nums vector @@ -173,8 +171,7 @@ struct PartialPlacement { * @param netlist The APNetlist used to generate this placement * @param grid_num_layers The number of layers in the device grid */ - bool verify_layer_nums(const APNetlist& netlist, - size_t grid_num_layers) const; + bool verify_layer_nums(const APNetlist& netlist, size_t grid_num_layers) const; /** * @brief Verify the sub_tiles @@ -196,9 +193,5 @@ struct PartialPlacement { * @param grid_height The height of the device grid * @param grid_num_layers The number of layers in the device grid */ - bool verify(const APNetlist& netlist, - size_t grid_width, - size_t grid_height, - size_t grid_num_layers) const; + bool verify(const APNetlist& netlist, size_t grid_width, size_t grid_height, size_t grid_num_layers) const; }; - diff --git a/vpr/src/base/CheckArch.cpp b/vpr/src/base/CheckArch.cpp index b8a324bb14f..60c14c236c7 100644 --- a/vpr/src/base/CheckArch.cpp +++ b/vpr/src/base/CheckArch.cpp @@ -29,8 +29,7 @@ static void CheckSwitches(const t_arch& Arch) { CurSwitch = Arch.Switches; for (i = 0; i < Arch.num_switches; i++) { /* This assumes all segments have the same directionality */ - if (CurSwitch->buffered() - && Arch.Segments[0].directionality == BI_DIRECTIONAL) { + if (CurSwitch->buffered() && Arch.Segments[0].directionality == BI_DIRECTIONAL) { /* Largest resistance tri-state buffer would have a minimum * width transistor in the buffer pull-down and a min-width * pass transistoron the output. @@ -84,8 +83,7 @@ static void CheckSwitches(const t_arch& Arch) { static void CheckSegments(const t_arch& Arch) { auto& CurSeg = Arch.Segments; for (size_t i = 0; i < (Arch.Segments).size(); i++) { - if (CurSeg[i].directionality == UNI_DIRECTIONAL - && CurSeg[i].longline == true) { + if (CurSeg[i].directionality == UNI_DIRECTIONAL && CurSeg[i].longline == true) { vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), 0, "Long lines not supported for unidirectional architectures.\n" "Refer to segmentlist of '%s'\n", diff --git a/vpr/src/base/CheckSetup.cpp b/vpr/src/base/CheckSetup.cpp index 13c98a0fe91..afbc03ff822 100644 --- a/vpr/src/base/CheckSetup.cpp +++ b/vpr/src/base/CheckSetup.cpp @@ -20,24 +20,19 @@ void CheckSetup(const t_packer_opts& PackerOpts, int Tmp; if (!Timing.timing_analysis_enabled && PackerOpts.timing_driven) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Packing cannot be timing driven without timing analysis enabled\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Packing cannot be timing driven without timing analysis enabled\n"); } if (PackerOpts.load_flat_placement) { if (PackerOpts.device_layout == "auto") { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Legalization requires a fixed device layout.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Legalization requires a fixed device layout.\n"); } if (!PlacerOpts.constraints_file.empty()) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Cannot specify a fixed clusters file when running legalization.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Cannot specify a fixed clusters file when running legalization.\n"); } } - - if ((GLOBAL == RouterOpts.route_type) - && (PlacerOpts.place_algorithm.is_timing_driven())) { + if ((GLOBAL == RouterOpts.route_type) && (PlacerOpts.place_algorithm.is_timing_driven())) { /* Works, but very weird. Can't optimize timing well, since you're * not doing proper architecture delay modelling. */ VTR_LOG_WARN( @@ -45,45 +40,39 @@ void CheckSetup(const t_packer_opts& PackerOpts, "This is allowed, but strange, and circuit speed will suffer.\n"); } - if (!Timing.timing_analysis_enabled - && (PlacerOpts.place_algorithm.is_timing_driven())) { + if (!Timing.timing_analysis_enabled && (PlacerOpts.place_algorithm.is_timing_driven())) { /* May work, not tested */ - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Timing analysis must be enabled for timing-driven placement.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Timing analysis must be enabled for timing-driven placement.\n"); } if (!PlacerOpts.doPlacement && (!PlacerOpts.constraints_file.empty())) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "A block location file requires that placement is enabled.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "A block location file requires that placement is enabled.\n"); } - if (PlacerOpts.place_algorithm.is_timing_driven() && - PlacerOpts.place_static_move_prob.size() > NUM_PL_MOVE_TYPES) { + if (PlacerOpts.place_algorithm.is_timing_driven() && PlacerOpts.place_static_move_prob.size() > NUM_PL_MOVE_TYPES) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "The number of provided placer move probabilities (%d) should equal or less than the total number of supported moves (%d).\n", - PlacerOpts.place_static_move_prob.size(), - NUM_PL_MOVE_TYPES); + "The number of provided placer move probabilities (%d) should equal or less than the total " + "number of supported moves (%d).\n", + PlacerOpts.place_static_move_prob.size(), NUM_PL_MOVE_TYPES); } - if (!PlacerOpts.place_algorithm.is_timing_driven() && - PlacerOpts.place_static_move_prob.size() > NUM_PL_NONTIMING_MOVE_TYPES) { + if (!PlacerOpts.place_algorithm.is_timing_driven() + && PlacerOpts.place_static_move_prob.size() > NUM_PL_NONTIMING_MOVE_TYPES) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "The number of placer non timing move probabilities (%d) should equal to or less than the total number of supported moves (%d).\n", - PlacerOpts.place_static_move_prob.size(), - NUM_PL_MOVE_TYPES); + "The number of placer non timing move probabilities (%d) should equal to or less than the " + "total number of supported moves (%d).\n", + PlacerOpts.place_static_move_prob.size(), NUM_PL_MOVE_TYPES); } // Rules for doing Analytical Placement if (APOpts.doAP) { // Make sure that the --place option was not set. if (PlacerOpts.doPlacement) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Cannot perform both analytical and non-analytical placement.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Cannot perform both analytical and non-analytical placement.\n"); } // Make sure that the --pack option was not set. if (PackerOpts.doPacking) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Analytical placement should skip packing.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Analytical placement should skip packing.\n"); } // TODO: Should check that read_vpr_constraint_file is non-empty or @@ -97,15 +86,16 @@ void CheckSetup(const t_packer_opts& PackerOpts, if (RouterOpts.doRouting) { if (!Timing.timing_analysis_enabled - && (DEMAND_ONLY != RouterOpts.base_cost_type && DEMAND_ONLY_NORMALIZED_LENGTH != RouterOpts.base_cost_type)) { + && (DEMAND_ONLY != RouterOpts.base_cost_type + && DEMAND_ONLY_NORMALIZED_LENGTH != RouterOpts.base_cost_type)) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "base_cost_type must be demand_only or demand_only_normalized_length when timing analysis is disabled.\n"); + "base_cost_type must be demand_only or demand_only_normalized_length when timing analysis " + "is disabled.\n"); } } if (DETAILED == RouterOpts.route_type) { - if ((Chans.chan_x_dist.type != UNIFORM) - || (Chans.chan_y_dist.type != UNIFORM)) { + if ((Chans.chan_x_dist.type != UNIFORM) || (Chans.chan_y_dist.type != UNIFORM)) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Detailed routing currently only supported on FPGAs with uniform channel distributions.\n"); } @@ -115,38 +105,32 @@ void CheckSetup(const t_packer_opts& PackerOpts, Tmp = Segments[i].arch_opin_switch; auto& device_ctx = g_vpr_ctx.device(); if (!device_ctx.arch_switch_inf[Tmp].buffered()) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "arch_opin_switch (#%d) of segment type #%d is not buffered.\n", Tmp, i); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "arch_opin_switch (#%d) of segment type #%d is not buffered.\n", Tmp, i); } } if ((PlacerOpts.place_chan_width != NO_FIXED_CHANNEL_WIDTH) && PlacerOpts.place_chan_width < 0) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Place channel width must be positive.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Place channel width must be positive.\n"); } if ((RouterOpts.fixed_channel_width != NO_FIXED_CHANNEL_WIDTH) && RouterOpts.fixed_channel_width < 0) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Routing channel width must be positive.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Routing channel width must be positive.\n"); } if (UNI_DIRECTIONAL == RoutingArch.directionality) { - if ((RouterOpts.fixed_channel_width != NO_FIXED_CHANNEL_WIDTH) - && (RouterOpts.fixed_channel_width % 2 > 0)) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Routing channel width must be even for unidirectional.\n"); + if ((RouterOpts.fixed_channel_width != NO_FIXED_CHANNEL_WIDTH) && (RouterOpts.fixed_channel_width % 2 > 0)) { + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Routing channel width must be even for unidirectional.\n"); } - if ((PlacerOpts.place_chan_width != NO_FIXED_CHANNEL_WIDTH) - && (PlacerOpts.place_chan_width % 2 > 0)) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Place channel width must be even for unidirectional.\n"); + if ((PlacerOpts.place_chan_width != NO_FIXED_CHANNEL_WIDTH) && (PlacerOpts.place_chan_width % 2 > 0)) { + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Place channel width must be even for unidirectional.\n"); } } if (ServerOpts.is_server_mode_enabled) { if (ServerOpts.port_num < DYMANIC_PORT_RANGE_MIN || ServerOpts.port_num > DYNAMIC_PORT_RANGE_MAX) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Specified server port number `--port %d` is out of range [%d-%d]. Please specify a port number within that range.\n", - ServerOpts.port_num, DYMANIC_PORT_RANGE_MIN, DYNAMIC_PORT_RANGE_MAX); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, + "Specified server port number `--port %d` is out of range [%d-%d]. Please specify a port " + "number within that range.\n", + ServerOpts.port_num, DYMANIC_PORT_RANGE_MIN, DYNAMIC_PORT_RANGE_MAX); } } } diff --git a/vpr/src/base/SetupGrid.cpp b/vpr/src/base/SetupGrid.cpp index a7aaf214dd2..a229912d3f4 100644 --- a/vpr/src/base/SetupGrid.cpp +++ b/vpr/src/base/SetupGrid.cpp @@ -29,10 +29,21 @@ using vtr::FormulaParser; using vtr::t_formula_data; -static DeviceGrid auto_size_device_grid(const std::vector& grid_layouts, const std::map& minimum_instance_counts, float maximum_device_utilization); -static std::vector grid_overused_resources(const DeviceGrid& grid, std::map instance_counts); -static bool grid_satisfies_instance_counts(const DeviceGrid& grid, const std::map& instance_counts, float maximum_utilization); -static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t width, size_t height, bool warn_out_of_range = true, const std::vector& limiting_resources = std::vector()); +static DeviceGrid auto_size_device_grid(const std::vector& grid_layouts, + const std::map& minimum_instance_counts, + float maximum_device_utilization); +static std::vector grid_overused_resources( + const DeviceGrid& grid, + std::map instance_counts); +static bool grid_satisfies_instance_counts(const DeviceGrid& grid, + const std::map& instance_counts, + float maximum_utilization); +static DeviceGrid build_device_grid(const t_grid_def& grid_def, + size_t width, + size_t height, + bool warn_out_of_range = true, + const std::vector& limiting_resources + = std::vector()); static void CheckGrid(const DeviceGrid& grid); @@ -46,7 +57,10 @@ static void set_grid_block_type(int priority, const t_metadata_dict* meta); ///@brief Create the device grid based on resource requirements -DeviceGrid create_device_grid(const std::string& layout_name, const std::vector& grid_layouts, const std::map& minimum_instance_counts, float target_device_utilization) { +DeviceGrid create_device_grid(const std::string& layout_name, + const std::vector& grid_layouts, + const std::map& minimum_instance_counts, + float target_device_utilization) { if (layout_name == "auto") { //Auto-size the device // @@ -56,9 +70,7 @@ DeviceGrid create_device_grid(const std::string& layout_name, const std::vector< //Use the specified device //Find the matching grid definition - auto cmp = [&](const t_grid_def& grid_def) { - return grid_def.name == layout_name; - }; + auto cmp = [&](const t_grid_def& grid_def) { return grid_def.name == layout_name; }; auto iter = std::find_if(grid_layouts.begin(), grid_layouts.end(), cmp); if (iter == grid_layouts.end()) { @@ -70,7 +82,8 @@ DeviceGrid create_device_grid(const std::string& layout_name, const std::vector< } valid_names += "'" + grid_layouts[i].name + "'"; } - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find grid layout named '%s' (valid grid layouts: %s)\n", layout_name.c_str(), valid_names.c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find grid layout named '%s' (valid grid layouts: %s)\n", + layout_name.c_str(), valid_names.c_str()); } return build_device_grid(*iter, iter->width, iter->height); @@ -78,7 +91,10 @@ DeviceGrid create_device_grid(const std::string& layout_name, const std::vector< } ///@brief Create the device grid based on dimensions -DeviceGrid create_device_grid(const std::string& layout_name, const std::vector& grid_layouts, size_t width, size_t height) { +DeviceGrid create_device_grid(const std::string& layout_name, + const std::vector& grid_layouts, + size_t width, + size_t height) { if (layout_name == "auto") { VTR_ASSERT(!grid_layouts.empty()); //Auto-size @@ -117,9 +133,7 @@ DeviceGrid create_device_grid(const std::string& layout_name, const std::vector< } } else { //Use the specified device - auto cmp = [&](const t_grid_def& grid_def) { - return grid_def.name == layout_name; - }; + auto cmp = [&](const t_grid_def& grid_def) { return grid_def.name == layout_name; }; auto iter = std::find_if(grid_layouts.begin(), grid_layouts.end(), cmp); if (iter == grid_layouts.end()) { @@ -131,7 +145,8 @@ DeviceGrid create_device_grid(const std::string& layout_name, const std::vector< } valid_names += "'" + grid_layouts[i].name + "'"; } - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find grid layout named '%s' (valid grid layouts: %s)\n", layout_name.c_str(), valid_names.c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find grid layout named '%s' (valid grid layouts: %s)\n", + layout_name.c_str(), valid_names.c_str()); } return build_device_grid(*iter, iter->width, iter->height); @@ -144,19 +159,21 @@ DeviceGrid create_device_grid(const std::string& layout_name, const std::vector< * If a set of fixed grid layouts are specified, the smallest satisfying grid is picked * If an auto grid layouts are specified, the smallest dynamicly sized grid is picked */ -static DeviceGrid auto_size_device_grid(const std::vector& grid_layouts, const std::map& minimum_instance_counts, float maximum_device_utilization) { +static DeviceGrid auto_size_device_grid(const std::vector& grid_layouts, + const std::map& minimum_instance_counts, + float maximum_device_utilization) { VTR_ASSERT(!grid_layouts.empty()); DeviceGrid grid; - auto is_auto_grid_def = [](const t_grid_def& grid_def) { - return grid_def.grid_type == GridDefType::AUTO; - }; + auto is_auto_grid_def = [](const t_grid_def& grid_def) { return grid_def.grid_type == GridDefType::AUTO; }; auto auto_layout_itr = std::find_if(grid_layouts.begin(), grid_layouts.end(), is_auto_grid_def); if (auto_layout_itr != grid_layouts.end()) { //Automatic grid layout, find the smallest height/width - VTR_ASSERT_SAFE_MSG(std::find_if(auto_layout_itr + 1, grid_layouts.end(), is_auto_grid_def) == grid_layouts.end(), "Only one "); + VTR_ASSERT_SAFE_MSG( + std::find_if(auto_layout_itr + 1, grid_layouts.end(), is_auto_grid_def) == grid_layouts.end(), + "Only one "); //Determine maximum device size to try before concluding that the circuit cannot fit on any device //Calculate total number of required instances @@ -213,8 +230,10 @@ static DeviceGrid auto_size_device_grid(const std::vector& grid_layo //Maximum device size reached VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Device auto-fit aborted: device size already exceeds required resources count by %d times yet still cannot fit the design. " - "This may be due to resources that do not grow as the grid size increases (e.g. PLLs in the Titan Stratix IV architecture capture).\n", + "Device auto-fit aborted: device size already exceeds required resources count by %d times yet " + "still cannot fit the design. " + "This may be due to resources that do not grow as the grid size increases (e.g. PLLs in the " + "Titan Stratix IV architecture capture).\n", MAX_SIZE_FACTOR); } else { @@ -262,7 +281,9 @@ static DeviceGrid auto_size_device_grid(const std::vector& grid_layo * Performs a fast counting based estimate, allocating the least * flexible block types (those with the fewestequivalent tiles) first. */ -static std::vector grid_overused_resources(const DeviceGrid& grid, std::map instance_counts) { +static std::vector grid_overused_resources( + const DeviceGrid& grid, + std::map instance_counts) { auto& device_ctx = g_vpr_ctx.device(); std::vector overused_resources; @@ -305,7 +326,8 @@ static std::vector grid_overused_resources(const Devic avail_tiles[tile_type] = 0; } - if (required_blocks == 0) break; + if (required_blocks == 0) + break; } if (required_blocks > 0) { @@ -317,7 +339,9 @@ static std::vector grid_overused_resources(const Devic return overused_resources; } -static bool grid_satisfies_instance_counts(const DeviceGrid& grid, const std::map& instance_counts, float maximum_utilization) { +static bool grid_satisfies_instance_counts(const DeviceGrid& grid, + const std::map& instance_counts, + float maximum_utilization) { //Are the resources satisfied? auto overused_resources = grid_overused_resources(grid, instance_counts); @@ -336,11 +360,14 @@ static bool grid_satisfies_instance_counts(const DeviceGrid& grid, const std::ma } ///@brief Build the specified device grid -static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_width, size_t grid_height, bool warn_out_of_range, const std::vector& limiting_resources) { +static DeviceGrid build_device_grid(const t_grid_def& grid_def, + size_t grid_width, + size_t grid_height, + bool warn_out_of_range, + const std::vector& limiting_resources) { if (grid_def.grid_type == GridDefType::FIXED) { if (grid_def.width != int(grid_width) || grid_def.height != int(grid_height)) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Requested grid size (%zu%zu) does not match fixed device size (%dx%d)", + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Requested grid size (%zu%zu) does not match fixed device size (%dx%d)", grid_width, grid_height, grid_def.width, grid_def.height); } } @@ -355,7 +382,8 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt //Track the current priority for each grid location // Note that we initialize it to the lowest (i.e. most negative) possible value, so // any user-specified priority will override the default empty grid - grid_priorities.resize(std::array{(size_t)num_layers, grid_width, grid_height}, std::numeric_limits::lowest()); + grid_priorities.resize(std::array{(size_t)num_layers, grid_width, grid_height}, + std::numeric_limits::lowest()); //Initialize the device to all empty blocks auto empty_type = device_ctx.EMPTY_PHYSICAL_TILE_TYPE; @@ -364,9 +392,7 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt for (size_t x = 0; x < grid_width; ++x) { for (size_t y = 0; y < grid_height; ++y) { set_grid_block_type(std::numeric_limits::lowest() + 1, //+1 so it overrides without warning - empty_type, - layer, x, y, - grid, grid_priorities, + empty_type, layer, x, y, grid, grid_priorities, /*meta=*/nullptr); } } @@ -380,8 +406,7 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt auto type = find_tile_type_by_name(grid_loc_def.block_type, device_ctx.physical_tile_types); if (!type) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, - "Failed to find block type '%s' for grid location specification", + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find block type '%s' for grid location specification", grid_loc_def.block_type.c_str()); } @@ -423,16 +448,20 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt // Start locations outside the device will never create block instances if (startx > grid_width - 1) { if (warn_out_of_range) { - VTR_LOG_WARN("Block type '%s' grid location specification startx (%s = %d) falls outside device horizontal range [%d,%d]\n", - type->name, xspec.start_expr.c_str(), startx, 0, grid_width - 1); + VTR_LOG_WARN( + "Block type '%s' grid location specification startx (%s = %d) falls outside device horizontal " + "range [%d,%d]\n", + type->name, xspec.start_expr.c_str(), startx, 0, grid_width - 1); } continue; //No instances will be created } if (starty > grid_height - 1) { if (warn_out_of_range) { - VTR_LOG_WARN("Block type '%s' grid location specification starty (%s = %d) falls outside device vertical range [%d,%d]\n", - type->name, yspec.start_expr.c_str(), starty, 0, grid_height - 1); + VTR_LOG_WARN( + "Block type '%s' grid location specification starty (%s = %d) falls outside device vertical " + "range [%d,%d]\n", + type->name, yspec.start_expr.c_str(), starty, 0, grid_height - 1); } continue; //No instances will be created } @@ -440,28 +469,34 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt //Check end against the device dimensions if (endx > grid_width - 1) { if (warn_out_of_range) { - VTR_LOG_WARN("Block type '%s' grid location specification endx (%s = %d) falls outside device horizontal range [%d,%d]\n", - type->name, xspec.end_expr.c_str(), endx, 0, grid_width - 1); + VTR_LOG_WARN( + "Block type '%s' grid location specification endx (%s = %d) falls outside device horizontal " + "range [%d,%d]\n", + type->name, xspec.end_expr.c_str(), endx, 0, grid_width - 1); } } if (endy > grid_height - 1) { if (warn_out_of_range) { - VTR_LOG_WARN("Block type '%s' grid location specification endy (%s = %d) falls outside device vertical range [%d,%d]\n", - type->name, yspec.end_expr.c_str(), endy, 0, grid_height - 1); + VTR_LOG_WARN( + "Block type '%s' grid location specification endy (%s = %d) falls outside device vertical " + "range [%d,%d]\n", + type->name, yspec.end_expr.c_str(), endy, 0, grid_height - 1); } } //The end must fall after (or equal) to the start if (endx < startx) { VPR_FATAL_ERROR(VPR_ERROR_ARCH, - "Grid location specification endx (%s = %d) can not come before startx (%s = %d) for block type '%s'", + "Grid location specification endx (%s = %d) can not come before startx (%s = %d) for " + "block type '%s'", xspec.end_expr.c_str(), endx, xspec.start_expr.c_str(), startx, type->name); } if (endy < starty) { VPR_FATAL_ERROR(VPR_ERROR_ARCH, - "Grid location specification endy (%s = %d) can not come before starty (%s = %d) for block type '%s'", + "Grid location specification endy (%s = %d) can not come before starty (%s = %d) for " + "block type '%s'", yspec.end_expr.c_str(), endy, yspec.start_expr.c_str(), starty, type->name); } @@ -520,10 +555,7 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt //Fill in the region for (size_t x = x_start; x + (type->width - 1) <= x_max; x += incrx) { for (size_t y = y_start; y + (type->height - 1) <= y_max; y += incry) { - set_grid_block_type(grid_loc_def.priority, - type, - layer, x, y, - grid, grid_priorities, + set_grid_block_type(grid_loc_def.priority, type, layer, x, y, grid, grid_priorities, grid_loc_def.meta); } } @@ -534,11 +566,11 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt //Warn if any types were not specified in the grid layout for (auto const& type : device_ctx.physical_tile_types) { - if (&type == empty_type) continue; //Don't worry if empty hasn't been specified + if (&type == empty_type) + continue; //Don't worry if empty hasn't been specified if (!seen_types.count(&type)) { - VTR_LOG_WARN("Block type '%s' was not specified in device grid layout\n", - type.name); + VTR_LOG_WARN("Block type '%s' was not specified in device grid layout\n", type.name); } } @@ -568,9 +600,7 @@ static void set_grid_block_type(int priority, const t_physical_tile_type* type; int priority; - bool operator<(const TypeLocation& rhs) const { - return x < rhs.x || y < rhs.y || type < rhs.type; - } + bool operator<(const TypeLocation& rhs) const { return x < rhs.x || y < rhs.y || type < rhs.type; } }; //Collect locations effected by this block @@ -593,9 +623,11 @@ static void set_grid_block_type(int priority, if (priority < max_priority_type_loc.priority) { //Lower priority, do not override #ifdef VERBOSE - VTR_LOG("Not creating block '%s' at (%zu,%zu) since overlaps block '%s' at (%zu,%zu) with higher priority (%d > %d)\n", - type->name, x_root, y_root, max_priority_type_loc.type->name, max_priority_type_loc.x, max_priority_type_loc.y, - max_priority_type_loc.priority, priority); + VTR_LOG( + "Not creating block '%s' at (%zu,%zu) since overlaps block '%s' at (%zu,%zu) with higher priority (%d > " + "%d)\n", + type->name, x_root, y_root, max_priority_type_loc.type->name, max_priority_type_loc.x, + max_priority_type_loc.y, max_priority_type_loc.priority, priority); #endif return; } @@ -609,8 +641,7 @@ static void set_grid_block_type(int priority, "Ambiguous block type specification at grid location (%zu,%zu)." " Existing block type '%s' at (%zu,%zu) has the same priority (%d) as new overlapping type '%s'." " The last specification will apply.\n", - x_root, y_root, - max_priority_type_loc.type->name, max_priority_type_loc.x, max_priority_type_loc.y, + x_root, y_root, max_priority_type_loc.type->name, max_priority_type_loc.x, max_priority_type_loc.y, priority, type->name); } @@ -629,8 +660,7 @@ static void set_grid_block_type(int priority, auto& grid_tile = grid[layer_num][x][y]; VTR_ASSERT(grid_priorities[layer_num][x][y] <= priority); - if (grid_tile.type != nullptr - && grid_tile.type != device_ctx.EMPTY_PHYSICAL_TILE_TYPE) { + if (grid_tile.type != nullptr && grid_tile.type != device_ctx.EMPTY_PHYSICAL_TILE_TYPE) { //We are overriding a non-empty block, we need to be careful //to ensure we remove any blocks which will be invalidated when we //overwrite part of their locations @@ -638,9 +668,7 @@ static void set_grid_block_type(int priority, size_t orig_root_x = x - grid[layer_num][x][y].width_offset; size_t orig_root_y = y - grid[layer_num][x][y].height_offset; - root_blocks_to_rip_up.insert(TypeLocation(orig_root_x, - orig_root_y, - grid[layer_num][x][y].type, + root_blocks_to_rip_up.insert(TypeLocation(orig_root_x, orig_root_y, grid[layer_num][x][y].type, grid_priorities[layer_num][x][y])); } @@ -673,8 +701,7 @@ static void set_grid_block_type(int priority, #ifdef VERBOSE VTR_LOG("Ripping up block '%s' at (%d,%d) offset (%d,%d). Overlapped by '%s' at (%d,%d)\n", - invalidated_root.type->name, invalidated_root.x, invalidated_root.y, - x_offset, y_offset, + invalidated_root.type->name, invalidated_root.x, invalidated_root.y, x_offset, y_offset, type->name, x_root, y_root); #endif @@ -702,21 +729,13 @@ static void CheckGrid(const DeviceGrid& grid) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Grid Location (%d,%d,%d) has no type.\n", i, j, layer_num); } - if ((grid.get_width_offset(tile_loc) < 0) - || (grid.get_width_offset(tile_loc) >= type->width)) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Grid Location (%d,%d,%d) has invalid width offset (%d).\n", - i, - j, - layer_num, - width_offset); + if ((grid.get_width_offset(tile_loc) < 0) || (grid.get_width_offset(tile_loc) >= type->width)) { + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Grid Location (%d,%d,%d) has invalid width offset (%d).\n", i, j, + layer_num, width_offset); } - if ((grid.get_height_offset(tile_loc) < 0) - || (grid.get_height_offset(tile_loc) >= type->height)) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Grid Location (%d,%d,%d) has invalid height offset (%d).\n", - i, - j, - layer_num, - height_offset); + if ((grid.get_height_offset(tile_loc) < 0) || (grid.get_height_offset(tile_loc) >= type->height)) { + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Grid Location (%d,%d,%d) has invalid height offset (%d).\n", i, j, + layer_num, height_offset); } //Verify that type and width/height offsets are correct (e.g. for dimension > 1 blocks) @@ -732,19 +751,22 @@ static void CheckGrid(const DeviceGrid& grid) { int tile_height_offset = grid.get_height_offset(tile_loc_offset); if (tile_type != type) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Grid Location (%d,%d,%d) should have type '%s' (based on root location) but has type '%s'\n", + "Grid Location (%d,%d,%d) should have type '%s' (based on root " + "location) but has type '%s'\n", i, j, layer_num, type->name, type->name); } if (tile_width_offset != x_offset) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Grid Location (%d,%d,%d) of type '%s' should have width offset '%d' (based on root location) but has '%d'\n", + "Grid Location (%d,%d,%d) of type '%s' should have width offset '%d' " + "(based on root location) but has '%d'\n", i, j, layer_num, type->name, x_offset, tile_width_offset); } if (tile_height_offset != y_offset) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Grid Location (%d,%d,%d) of type '%s' should have height offset '%d' (based on root location) but has '%d'\n", + "Grid Location (%d,%d,%d) of type '%s' should have height offset '%d' " + "(based on root location) but has '%d'\n", i, j, layer_num, type->name, y_offset, tile_height_offset); } } @@ -755,7 +777,8 @@ static void CheckGrid(const DeviceGrid& grid) { } } -float calculate_device_utilization(const DeviceGrid& grid, const std::map& instance_counts) { +float calculate_device_utilization(const DeviceGrid& grid, + const std::map& instance_counts) { //Record the resources of the grid std::map grid_resources; for (int layer_num = 0; layer_num < grid.get_num_layers(); ++layer_num) { @@ -808,6 +831,4 @@ float calculate_device_utilization(const DeviceGrid& grid, const std::map& instance_counts); +float calculate_device_utilization(const DeviceGrid& grid, + const std::map& instance_counts); /** * @brief Returns the effective size of the device diff --git a/vpr/src/base/SetupVPR.cpp b/vpr/src/base/SetupVPR.cpp index 77fb495014b..3e30ce17fc2 100644 --- a/vpr/src/base/SetupVPR.cpp +++ b/vpr/src/base/SetupVPR.cpp @@ -29,17 +29,12 @@ #include "ShowSetup.h" static void SetupNetlistOpts(const t_options& Options, t_netlist_opts& NetlistOpts); -static void SetupPackerOpts(const t_options& Options, - t_packer_opts* PackerOpts); -static void SetupPlacerOpts(const t_options& Options, - t_placer_opts* PlacerOpts); -static void SetupAnnealSched(const t_options& Options, - t_annealing_sched* AnnealSched); +static void SetupPackerOpts(const t_options& Options, t_packer_opts* PackerOpts); +static void SetupPlacerOpts(const t_options& Options, t_placer_opts* PlacerOpts); +static void SetupAnnealSched(const t_options& Options, t_annealing_sched* AnnealSched); static void SetupRouterOpts(const t_options& Options, t_router_opts* RouterOpts); -static void SetupNocOpts(const t_options& Options, - t_noc_opts* NocOpts); -static void SetupServerOpts(const t_options& Options, - t_server_opts* ServerOpts); +static void SetupNocOpts(const t_options& Options, t_noc_opts* NocOpts); +static void SetupServerOpts(const t_options& Options, t_server_opts* ServerOpts); static void SetupRoutingArch(const t_arch& Arch, t_det_routing_arch* RoutingArch); static void SetupTiming(const t_options& Options, const bool TimingEnabled, t_timing_inf* Timing); static void SetupSwitches(const t_arch& Arch, @@ -55,7 +50,9 @@ static void SetupPowerOpts(const t_options& Options, t_power_opts* power_opts, t * @param wire_to_arch_ipin_switch Switch id that must be used when *track* and *IPIN* are located at the same die * @param wire_to_arch_ipin_switch_between_dice Switch id that must be used when *track* and *IPIN* are located at different dice. */ -static void find_ipin_cblock_switch_index(const t_arch& Arch, int& wire_to_arch_ipin_switch, int& wire_to_arch_ipin_switch_between_dice); +static void find_ipin_cblock_switch_index(const t_arch& Arch, + int& wire_to_arch_ipin_switch, + int& wire_to_arch_ipin_switch_between_dice); // Fill the data structures used when flat_routing is enabled to speed-up routing static void alloc_and_load_intra_cluster_resources(bool reachability_analysis); @@ -118,8 +115,7 @@ void SetupVPR(const t_options* options, auto& device_ctx = g_vpr_ctx.mutable_device(); if (options->CircuitName.value() == "") { - VPR_FATAL_ERROR(VPR_ERROR_BLIF_F, - "No blif file found in arguments (did you specify an architecture file?)\n"); + VPR_FATAL_ERROR(VPR_ERROR_BLIF_F, "No blif file found in arguments (did you specify an architecture file?)\n"); } alloc_and_load_output_file_names(options->CircuitName); @@ -160,19 +156,13 @@ void SetupVPR(const t_options* options, vtr::ScopedStartFinishTimer t("Loading Architecture Description"); switch (options->arch_format) { case e_arch_format::VTR: - XmlReadArch(options->ArchFile.value().c_str(), - timingenabled, - arch, - device_ctx.physical_tile_types, + XmlReadArch(options->ArchFile.value().c_str(), timingenabled, arch, device_ctx.physical_tile_types, device_ctx.logical_block_types); break; case e_arch_format::FPGAInterchange: VTR_LOG("Use FPGA Interchange device\n"); - FPGAInterchangeReadArch(options->ArchFile.value().c_str(), - timingenabled, - arch, - device_ctx.physical_tile_types, - device_ctx.logical_block_types); + FPGAInterchangeReadArch(options->ArchFile.value().c_str(), timingenabled, arch, + device_ctx.physical_tile_types, device_ctx.logical_block_types); break; default: VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Invalid architecture format!"); @@ -221,13 +211,11 @@ void SetupVPR(const t_options* options, VTR_ASSERT(device_ctx.EMPTY_LOGICAL_BLOCK_TYPE != nullptr); if (num_inputs == 0) { - VPR_ERROR(VPR_ERROR_ARCH, - "Architecture contains no top-level block type containing '.input' models"); + VPR_ERROR(VPR_ERROR_ARCH, "Architecture contains no top-level block type containing '.input' models"); } if (num_outputs == 0) { - VPR_ERROR(VPR_ERROR_ARCH, - "Architecture contains no top-level block type containing '.output' models"); + VPR_ERROR(VPR_ERROR_ARCH, "Architecture contains no top-level block type containing '.output' models"); } segments = arch->Segments; @@ -245,12 +233,8 @@ void SetupVPR(const t_options* options, //Setup the default flow, if no specific stages specified //do all - if (!options->do_packing - && !options->do_legalize - && !options->do_placement - && !options->do_analytical_placement - && !options->do_routing - && !options->do_analysis) { + if (!options->do_packing && !options->do_legalize && !options->do_placement && !options->do_analytical_placement + && !options->do_routing && !options->do_analysis) { //run all stages if none specified packerOpts->doPacking = STAGE_DO; placerOpts->doPlacement = STAGE_DO; @@ -274,7 +258,8 @@ void SetupVPR(const t_options* options, packerOpts->doPacking = STAGE_LOAD; placerOpts->doPlacement = STAGE_LOAD; routerOpts->doRouting = STAGE_DO; - analysisOpts->doAnalysis = ((options->do_analysis) ? STAGE_DO : STAGE_AUTO); //Always run analysis after routing + analysisOpts->doAnalysis + = ((options->do_analysis) ? STAGE_DO : STAGE_AUTO); //Always run analysis after routing } if (options->do_placement) { @@ -370,7 +355,8 @@ static void SetupSwitches(const t_arch& Arch, int switches_to_copy = NumArchSwitches; int num_arch_switches = NumArchSwitches; - find_ipin_cblock_switch_index(Arch, RoutingArch->wire_to_arch_ipin_switch, RoutingArch->wire_to_arch_ipin_switch_between_dice); + find_ipin_cblock_switch_index(Arch, RoutingArch->wire_to_arch_ipin_switch, + RoutingArch->wire_to_arch_ipin_switch_between_dice); /* Depends on device_ctx.num_arch_switches */ RoutingArch->delayless_switch = num_arch_switches++; @@ -395,8 +381,10 @@ static void SetupSwitches(const t_arch& Arch, device_ctx.arch_switch_inf[RoutingArch->delayless_switch].mux_trans_size = 0.; device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buf_size_type = BufferSize::ABSOLUTE; device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buf_size = 0.; - VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buffered(), "Delayless switch expected to be buffered (isolating)"); - VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch->delayless_switch].configurable(), "Delayless switch expected to be configurable"); + VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch->delayless_switch].buffered(), + "Delayless switch expected to be buffered (isolating)"); + VTR_ASSERT_MSG(device_ctx.arch_switch_inf[RoutingArch->delayless_switch].configurable(), + "Delayless switch expected to be configurable"); device_ctx.all_sw_inf[RoutingArch->delayless_switch] = device_ctx.arch_switch_inf[RoutingArch->delayless_switch]; @@ -409,8 +397,11 @@ static void SetupSwitches(const t_arch& Arch, // //Note that we don't warn about the R value as it may be used to size the buffer (if buf_size_type is AUTO) if (device_ctx.arch_switch_inf[RoutingArch->wire_to_arch_ipin_switch].Cout != 0.) { - VTR_LOG_WARN("Non-zero switch output capacitance (%g) has no effect when switch '%s' is used for connection block inputs\n", - device_ctx.arch_switch_inf[RoutingArch->wire_to_arch_ipin_switch].Cout, Arch.ipin_cblock_switch_name[0].c_str()); + VTR_LOG_WARN( + "Non-zero switch output capacitance (%g) has no effect when switch '%s' is used for connection block " + "inputs\n", + device_ctx.arch_switch_inf[RoutingArch->wire_to_arch_ipin_switch].Cout, + Arch.ipin_cblock_switch_name[0].c_str()); } } @@ -419,8 +410,7 @@ static void SetupSwitches(const t_arch& Arch, * * Since checks are already done, this just copies values across */ -static void SetupRoutingArch(const t_arch& Arch, - t_det_routing_arch* RoutingArch) { +static void SetupRoutingArch(const t_arch& Arch, t_det_routing_arch* RoutingArch) { RoutingArch->switch_block_type = Arch.SBType; RoutingArch->R_minW_nmos = Arch.R_minW_nmos; RoutingArch->R_minW_pmos = Arch.R_minW_pmos; @@ -515,8 +505,7 @@ static void SetupRouterOpts(const t_options& Options, t_router_opts* RouterOpts) RouterOpts->with_timing_analysis = Options.timing_analysis; } -static void SetupAnnealSched(const t_options& Options, - t_annealing_sched* AnnealSched) { +static void SetupAnnealSched(const t_options& Options, t_annealing_sched* AnnealSched) { AnnealSched->alpha_t = Options.PlaceAlphaT; if (AnnealSched->alpha_t >= 1 || AnnealSched->alpha_t <= 0) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, "alpha_t must be between 0 and 1 exclusive.\n"); @@ -576,8 +565,7 @@ static void SetupAnnealSched(const t_options& Options, * Error checking, such as checking for conflicting params is assumed * to be done beforehand */ -void SetupPackerOpts(const t_options& Options, - t_packer_opts* PackerOpts) { +void SetupPackerOpts(const t_options& Options, t_packer_opts* PackerOpts) { PackerOpts->output_file = Options.NetFile; PackerOpts->circuit_file_name = Options.CircuitFile; @@ -784,8 +772,6 @@ static void SetupNocOpts(const t_options& Options, t_noc_opts* NocOpts) { } NocOpts->noc_sat_routing_log_search_progress = Options.noc_sat_routing_log_search_progress; NocOpts->noc_placement_file_name = Options.noc_placement_file_name; - - } static void SetupServerOpts(const t_options& Options, t_server_opts* ServerOpts) { @@ -793,8 +779,11 @@ static void SetupServerOpts(const t_options& Options, t_server_opts* ServerOpts) ServerOpts->port_num = Options.server_port_num; } -static void find_ipin_cblock_switch_index(const t_arch& Arch, int& wire_to_arch_ipin_switch, int& wire_to_arch_ipin_switch_between_dice) { - for (auto cb_switch_name_index = 0; cb_switch_name_index < (int)Arch.ipin_cblock_switch_name.size(); cb_switch_name_index++) { +static void find_ipin_cblock_switch_index(const t_arch& Arch, + int& wire_to_arch_ipin_switch, + int& wire_to_arch_ipin_switch_between_dice) { + for (auto cb_switch_name_index = 0; cb_switch_name_index < (int)Arch.ipin_cblock_switch_name.size(); + cb_switch_name_index++) { int ipin_cblock_switch_index = UNDEFINED; for (int iswitch = 0; iswitch < Arch.num_switches; ++iswitch) { if (Arch.Switches[iswitch].name == Arch.ipin_cblock_switch_name[cb_switch_name_index]) { @@ -807,7 +796,8 @@ static void find_ipin_cblock_switch_index(const t_arch& Arch, int& wire_to_arch_ } } if (ipin_cblock_switch_index == UNDEFINED) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find connection block input pin switch named '%s'\n", Arch.ipin_cblock_switch_name[0].c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find connection block input pin switch named '%s'\n", + Arch.ipin_cblock_switch_name[0].c_str()); } //first index in Arch.ipin_cblock_switch_name is related to same die connections @@ -841,11 +831,10 @@ static void alloc_and_load_intra_cluster_resources(bool reachability_analysis) { VTR_ASSERT(mutable_logical_block == logic_block_ptr); // Continuous ranges are assigned to make passing them more memory-efficient sub_tile.primitive_class_range[sub_tile_inst].insert( - std::make_pair(logic_block_ptr, t_class_range(physical_class_offset, - physical_class_offset + num_classes - 1))); - sub_tile.intra_pin_range[sub_tile_inst].insert( - std::make_pair(logic_block_ptr, t_pin_range(physical_pin_offset, - physical_pin_offset + num_pins - 1))); + std::make_pair(logic_block_ptr, + t_class_range(physical_class_offset, physical_class_offset + num_classes - 1))); + sub_tile.intra_pin_range[sub_tile_inst].insert(std::make_pair( + logic_block_ptr, t_pin_range(physical_pin_offset, physical_pin_offset + num_pins - 1))); add_logical_pin_to_physical_tile(physical_pin_offset, logic_block_ptr, &physical_type); std::vector logical_classes = logic_block_ptr->primitive_logical_class_inf; @@ -859,15 +848,12 @@ static void alloc_and_load_intra_cluster_resources(bool reachability_analysis) { int physical_class_num = physical_class_offset; for (auto& logic_class : logical_classes) { - auto result = physical_type.primitive_class_inf.insert(std::make_pair(physical_class_num, logic_class)); - add_primitive_pin_to_physical_tile(logic_class.pinlist, - physical_class_num, - &physical_type); + auto result + = physical_type.primitive_class_inf.insert(std::make_pair(physical_class_num, logic_class)); + add_primitive_pin_to_physical_tile(logic_class.pinlist, physical_class_num, &physical_type); VTR_ASSERT(result.second); if (reachability_analysis && logic_class.type == e_pin_type::RECEIVER) { - do_reachability_analysis(&physical_type, - mutable_logical_block, - &logic_class, + do_reachability_analysis(&physical_type, mutable_logical_block, &logic_class, physical_class_num); } physical_class_num++; @@ -888,7 +874,8 @@ static void set_root_pin_to_pb_pin_map(t_physical_tile_type* physical_type) { int inst_num_pin = sub_tile.num_phy_pins / sub_tile.capacity.total(); // Later in the code, I've assumed that pins of a subtile are mapped in a continuous fashion to // the tile pins - Usage case: vpr_utils.cpp:get_pb_pins - VTR_ASSERT(sub_tile.sub_tile_to_tile_pin_indices[0] + sub_tile.num_phy_pins - 1 == sub_tile.sub_tile_to_tile_pin_indices[sub_tile.num_phy_pins - 1]); + VTR_ASSERT(sub_tile.sub_tile_to_tile_pin_indices[0] + sub_tile.num_phy_pins - 1 + == sub_tile.sub_tile_to_tile_pin_indices[sub_tile.num_phy_pins - 1]); for (int sub_tile_pin_num = 0; sub_tile_pin_num < sub_tile.num_phy_pins; sub_tile_pin_num++) { for (auto& eq_site : sub_tile.equivalent_sites) { t_physical_pin sub_tile_physical_pin = t_physical_pin(sub_tile_pin_num % inst_num_pin); @@ -901,10 +888,11 @@ static void set_root_pin_to_pb_pin_map(t_physical_tile_type* physical_type) { auto map_find_res = physical_type->on_tile_pin_num_to_pb_pin.find(physical_pin_num); if (map_find_res == physical_type->on_tile_pin_num_to_pb_pin.end()) { - physical_type->on_tile_pin_num_to_pb_pin.insert(std::make_pair(physical_pin_num, - std::unordered_map())); + physical_type->on_tile_pin_num_to_pb_pin.insert(std::make_pair( + physical_pin_num, std::unordered_map())); } - auto insert_res = physical_type->on_tile_pin_num_to_pb_pin.at(physical_pin_num).insert(std::make_pair(eq_site, pb_pin)); + auto insert_res = physical_type->on_tile_pin_num_to_pb_pin.at(physical_pin_num) + .insert(std::make_pair(eq_site, pb_pin)); VTR_ASSERT(insert_res.second); } } @@ -963,9 +951,12 @@ static void add_intra_tile_switches() { t_arch_switch_inf arch_switch_inf = create_internal_arch_sw(max_delay); // AM: In the function that arch_sw to rr_swith remapping takes place, we assumed that the delay of the intra-cluster // switches is fixed, and it is not dependent on the fan-in. - VTR_ASSERT_MSG(arch_switch_inf.fixed_Tdel(), "Intra-cluster switch is expected to have a fixed delay"); - VTR_ASSERT_MSG(arch_switch_inf.buffered(), "Intra-cluster switch is expected to be buffered (isolating)"); - VTR_ASSERT_MSG(arch_switch_inf.configurable(), "Intra-cluster switch is expected to be configurable"); + VTR_ASSERT_MSG(arch_switch_inf.fixed_Tdel(), + "Intra-cluster switch is expected to have a fixed delay"); + VTR_ASSERT_MSG(arch_switch_inf.buffered(), + "Intra-cluster switch is expected to be buffered (isolating)"); + VTR_ASSERT_MSG(arch_switch_inf.configurable(), + "Intra-cluster switch is expected to be configurable"); device_ctx.all_sw_inf.insert(std::make_pair(switch_type_id, arch_switch_inf)); } else { @@ -984,7 +975,8 @@ static void add_intra_tile_switches() { for (int pb_type_idx = 0; pb_type_idx < modes[mode_num].num_pb_type_children; pb_type_idx++) { t_pb_type* child_pb_type = &modes[mode_num].pb_type_children[pb_type_idx]; for (int pb_num = 0; pb_num < child_pb_type->num_pb; pb_num++) { - t_pb_graph_node* child_pb_graph_node = &pb_graph_node->child_pb_graph_nodes[mode_num][pb_type_idx][pb_num]; + t_pb_graph_node* child_pb_graph_node + = &pb_graph_node->child_pb_graph_nodes[mode_num][pb_type_idx][pb_num]; pb_graph_node_q.push_back(child_pb_graph_node); } } @@ -1006,7 +998,8 @@ static void do_reachability_analysis(t_physical_tile_type* physical_tile, int curr_pin_physical_num = pin_list.front(); pin_list.pop_front(); - t_pb_graph_pin* curr_pb_graph_pin = get_mutable_pb_pin_from_pin_physical_num(physical_tile, logical_block, curr_pin_physical_num); + t_pb_graph_pin* curr_pb_graph_pin + = get_mutable_pb_pin_from_pin_physical_num(physical_tile, logical_block, curr_pin_physical_num); if (curr_pb_graph_pin->port->type != PORTS::IN_PORT) { continue; } else { @@ -1014,12 +1007,11 @@ static void do_reachability_analysis(t_physical_tile_type* physical_tile, // Make sure that we are visiting each pin once. if (insert_res.second) { curr_pb_graph_pin->connected_sinks_ptc.insert(physical_class_num); - auto driving_pins = get_physical_pin_src_pins(physical_tile, - logical_block, - curr_pin_physical_num); + auto driving_pins = get_physical_pin_src_pins(physical_tile, logical_block, curr_pin_physical_num); for (auto driving_pin_physical_num : driving_pins) { // Since we define reachable class as a class which is connected to a pin through a series of IPINs, only IPINs are added to the list - if (get_pin_type_from_pin_physical_num(physical_tile, driving_pin_physical_num) == e_pin_type::RECEIVER) { + if (get_pin_type_from_pin_physical_num(physical_tile, driving_pin_physical_num) + == e_pin_type::RECEIVER) { pin_list.push_back(driving_pin_physical_num); } } diff --git a/vpr/src/base/ShowSetup.cpp b/vpr/src/base/ShowSetup.cpp index f7af0074b55..4378c341f03 100644 --- a/vpr/src/base/ShowSetup.cpp +++ b/vpr/src/base/ShowSetup.cpp @@ -17,8 +17,7 @@ /******** Function Prototypes ********/ static void ShowPackerOpts(const t_packer_opts& PackerOpts); static void ShowNetlistOpts(const t_netlist_opts& NetlistOpts); -static void ShowPlacerOpts(const t_placer_opts& PlacerOpts, - const t_annealing_sched& AnnealSched); +static void ShowPlacerOpts(const t_placer_opts& PlacerOpts, const t_annealing_sched& AnnealSched); static void ShowAnalyticalPlacerOpts(const t_ap_opts& APOpts); static void ShowRouterOpts(const t_router_opts& RouterOpts); static void ShowAnalysisOpts(const t_analysis_opts& AnalysisOpts); @@ -170,8 +169,7 @@ void ClusteredNetlistStats::write(OutputFormat fmt, std::ostream& output) const writeXML(output); break; default: - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Unknown extension on in block usage summary file"); + VPR_FATAL_ERROR(VPR_ERROR_PACK, "Unknown extension on in block usage summary file"); break; } } @@ -384,7 +382,8 @@ static void ShowRouterOpts(const t_router_opts& RouterOpts) { VTR_LOG("RouterOpts.verify_binary_search: %s\n", RouterOpts.verify_binary_search ? "true" : "false"); VTR_LOG("RouterOpts.min_channel_width_hint: %d\n", RouterOpts.min_channel_width_hint); VTR_LOG("RouterOpts.read_rr_edge_metadata: %s\n", RouterOpts.read_rr_edge_metadata ? "true" : "false"); - VTR_LOG("RouterOpts.exit_after_first_routing_iteration: %s\n", RouterOpts.exit_after_first_routing_iteration ? "true" : "false"); + VTR_LOG("RouterOpts.exit_after_first_routing_iteration: %s\n", + RouterOpts.exit_after_first_routing_iteration ? "true" : "false"); if (TIMING_DRIVEN == RouterOpts.router_algorithm) { VTR_LOG("RouterOpts.astar_fac: %f\n", RouterOpts.astar_fac); @@ -398,11 +397,14 @@ static void ShowRouterOpts(const t_router_opts& RouterOpts) { VTR_LOG("RouterOpts.incr_reroute_delay_ripup: %f\n", RouterOpts.incr_reroute_delay_ripup); else { std::string incr_delay_ripup_opts[3] = {"ON", "OFF", "AUTO"}; - VTR_LOG("RouterOpts.incr_reroute_delay_ripup: %s\n", incr_delay_ripup_opts[(size_t)RouterOpts.incr_reroute_delay_ripup].c_str()); + VTR_LOG("RouterOpts.incr_reroute_delay_ripup: %s\n", + incr_delay_ripup_opts[(size_t)RouterOpts.incr_reroute_delay_ripup].c_str()); } - VTR_LOG("RouterOpts.save_routing_per_iteration: %s\n", RouterOpts.save_routing_per_iteration ? "true" : "false"); - VTR_LOG("RouterOpts.congested_routing_iteration_threshold_frac: %f\n", RouterOpts.congested_routing_iteration_threshold_frac); + VTR_LOG("RouterOpts.save_routing_per_iteration: %s\n", + RouterOpts.save_routing_per_iteration ? "true" : "false"); + VTR_LOG("RouterOpts.congested_routing_iteration_threshold_frac: %f\n", + RouterOpts.congested_routing_iteration_threshold_frac); VTR_LOG("RouterOpts.high_fanout_threshold: %d\n", RouterOpts.high_fanout_threshold); VTR_LOG("RouterOpts.router_debug_net: %d\n", RouterOpts.router_debug_net); VTR_LOG("RouterOpts.router_debug_sink_rr: %d\n", RouterOpts.router_debug_sink_rr); @@ -410,7 +412,8 @@ static void ShowRouterOpts(const t_router_opts& RouterOpts) { VTR_LOG("RouterOpts.max_convergence_count: %d\n", RouterOpts.max_convergence_count); VTR_LOG("RouterOpts.reconvergence_cpd_threshold: %f\n", RouterOpts.reconvergence_cpd_threshold); VTR_LOG("RouterOpts.update_lower_bound_delays: %s\n", RouterOpts.update_lower_bound_delays ? "true" : "false"); - VTR_LOG("RouterOpts.first_iteration_timing_report_file: %s\n", RouterOpts.first_iteration_timing_report_file.c_str()); + VTR_LOG("RouterOpts.first_iteration_timing_report_file: %s\n", + RouterOpts.first_iteration_timing_report_file.c_str()); VTR_LOG("RouterOpts.route_bb_update: "); switch (RouterOpts.route_bb_update) { @@ -495,8 +498,7 @@ static void ShowRouterOpts(const t_router_opts& RouterOpts) { VTR_LOG("\n"); } -static void ShowPlacerOpts(const t_placer_opts& PlacerOpts, - const t_annealing_sched& AnnealSched) { +static void ShowPlacerOpts(const t_placer_opts& PlacerOpts, const t_annealing_sched& AnnealSched) { VTR_LOG("PlacerOpts.place_freq: "); switch (PlacerOpts.place_freq) { case PLACE_ONCE: @@ -511,8 +513,7 @@ static void ShowPlacerOpts(const t_placer_opts& PlacerOpts, default: VTR_LOG_ERROR("Unknown Place Freq\n"); } - if ((PLACE_ONCE == PlacerOpts.place_freq) - || (PLACE_ALWAYS == PlacerOpts.place_freq)) { + if ((PLACE_ONCE == PlacerOpts.place_freq) || (PLACE_ALWAYS == PlacerOpts.place_freq)) { VTR_LOG("PlacerOpts.place_algorithm: "); switch (PlacerOpts.place_algorithm.get()) { case BOUNDING_BOX_PLACE: @@ -568,12 +569,14 @@ static void ShowPlacerOpts(const t_placer_opts& PlacerOpts, std::string e_reducer_strings[5] = {"MIN", "MAX", "MEDIAN", "ARITHMEAN", "GEOMEAN"}; if ((size_t)PlacerOpts.delay_model_reducer > 4) VPR_FATAL_ERROR(VPR_ERROR_UNKNOWN, "Unknown delay_model_reducer\n"); - VTR_LOG("PlacerOpts.delay_model_reducer: %s\n", e_reducer_strings[(size_t)PlacerOpts.delay_model_reducer].c_str()); + VTR_LOG("PlacerOpts.delay_model_reducer: %s\n", + e_reducer_strings[(size_t)PlacerOpts.delay_model_reducer].c_str()); std::string place_delay_model_strings[3] = {"SIMPLE", "DELTA", "DELTA_OVERRIDE"}; if ((size_t)PlacerOpts.delay_model_type > 2) VPR_FATAL_ERROR(VPR_ERROR_UNKNOWN, "Unknown delay_model_type\n"); - VTR_LOG("PlacerOpts.delay_model_type: %s\n", place_delay_model_strings[(size_t)PlacerOpts.delay_model_type].c_str()); + VTR_LOG("PlacerOpts.delay_model_type: %s\n", + place_delay_model_strings[(size_t)PlacerOpts.delay_model_type].c_str()); } VTR_LOG("PlacerOpts.rlim_escape_fraction: %f\n", PlacerOpts.rlim_escape_fraction); @@ -618,22 +621,26 @@ static void ShowAnalyticalPlacerOpts(const t_ap_opts& APOpts) { static void ShowNetlistOpts(const t_netlist_opts& NetlistOpts) { VTR_LOG("NetlistOpts.absorb_buffer_luts : %s\n", (NetlistOpts.absorb_buffer_luts) ? "true" : "false"); - VTR_LOG("NetlistOpts.sweep_dangling_primary_ios : %s\n", (NetlistOpts.sweep_dangling_primary_ios) ? "true" : "false"); + VTR_LOG("NetlistOpts.sweep_dangling_primary_ios : %s\n", + (NetlistOpts.sweep_dangling_primary_ios) ? "true" : "false"); VTR_LOG("NetlistOpts.sweep_dangling_nets : %s\n", (NetlistOpts.sweep_dangling_nets) ? "true" : "false"); VTR_LOG("NetlistOpts.sweep_dangling_blocks : %s\n", (NetlistOpts.sweep_dangling_blocks) ? "true" : "false"); - VTR_LOG("NetlistOpts.sweep_constant_primary_outputs: %s\n", (NetlistOpts.sweep_constant_primary_outputs) ? "true" : "false"); + VTR_LOG("NetlistOpts.sweep_constant_primary_outputs: %s\n", + (NetlistOpts.sweep_constant_primary_outputs) ? "true" : "false"); VTR_LOG("NetlistOpts.netlist_verbosity : %d\n", NetlistOpts.netlist_verbosity); std::string const_gen_inference_strings[3] = {"NONE", "COMB", "COMB_SEQ"}; if ((size_t)NetlistOpts.const_gen_inference > 3) VPR_FATAL_ERROR(VPR_ERROR_UNKNOWN, "Unknown delay_model_reducer\n"); - VTR_LOG("NetlistOpts.const_gen_inference : %s\n", const_gen_inference_strings[(size_t)NetlistOpts.const_gen_inference].c_str()); + VTR_LOG("NetlistOpts.const_gen_inference : %s\n", + const_gen_inference_strings[(size_t)NetlistOpts.const_gen_inference].c_str()); VTR_LOG("\n"); } static void ShowAnalysisOpts(const t_analysis_opts& AnalysisOpts) { - VTR_LOG("AnalysisOpts.gen_post_synthesis_netlist: %s\n", (AnalysisOpts.gen_post_synthesis_netlist) ? "true" : "false"); + VTR_LOG("AnalysisOpts.gen_post_synthesis_netlist: %s\n", + (AnalysisOpts.gen_post_synthesis_netlist) ? "true" : "false"); VTR_LOG("AnalysisOpts.timing_report_npaths: %d\n", AnalysisOpts.timing_report_npaths); VTR_LOG("AnalysisOpts.timing_report_skew: %s\n", AnalysisOpts.timing_report_skew ? "true" : "false"); VTR_LOG("AnalysisOpts.echo_dot_timing_graph_node: %s\n", AnalysisOpts.echo_dot_timing_graph_node.c_str()); @@ -657,8 +664,10 @@ static void ShowAnalysisOpts(const t_analysis_opts& AnalysisOpts) { } const auto opts = { - std::make_tuple(&AnalysisOpts.post_synth_netlist_unconn_input_handling, "post_synth_netlist_unconn_input_handling"), - std::make_tuple(&AnalysisOpts.post_synth_netlist_unconn_output_handling, "post_synth_netlist_unconn_output_handling"), + std::make_tuple(&AnalysisOpts.post_synth_netlist_unconn_input_handling, + "post_synth_netlist_unconn_input_handling"), + std::make_tuple(&AnalysisOpts.post_synth_netlist_unconn_output_handling, + "post_synth_netlist_unconn_output_handling"), }; for (const auto& opt : opts) { auto value = *std::get<0>(opt); @@ -739,7 +748,8 @@ static void ShowNocOpts(const t_noc_opts& NocOpts) { VTR_LOG("NocOpts.noc_congestion_weighting: %f\n", NocOpts.noc_congestion_weighting); VTR_LOG("NocOpts.noc_swap_percentage: %d%%\n", NocOpts.noc_swap_percentage); VTR_LOG("NocOpts.noc_sat_routing_bandwidth_resolution: %d\n", NocOpts.noc_sat_routing_bandwidth_resolution); - VTR_LOG("NocOpts.noc_sat_routing_latency_overrun_weighting: %d\n", NocOpts.noc_sat_routing_latency_overrun_weighting); + VTR_LOG("NocOpts.noc_sat_routing_latency_overrun_weighting: %d\n", + NocOpts.noc_sat_routing_latency_overrun_weighting); VTR_LOG("NocOpts.noc_sat_routing_congestion_weighting: %d\n", NocOpts.noc_sat_routing_congestion_weighting); VTR_LOG("NocOpts.noc_sat_routing_num_workers: %d\n", NocOpts.noc_sat_routing_num_workers); VTR_LOG("NocOpts.noc_routing_algorithm: %s\n", NocOpts.noc_placement_file_name.c_str()); diff --git a/vpr/src/base/ShowSetup.h b/vpr/src/base/ShowSetup.h index 2991a1f42fe..d5245f6c513 100644 --- a/vpr/src/base/ShowSetup.h +++ b/vpr/src/base/ShowSetup.h @@ -17,11 +17,7 @@ struct ClusteredNetlistStats { public: ClusteredNetlistStats(); - enum OutputFormat { - HumanReadable, - JSON, - XML - }; + enum OutputFormat { HumanReadable, JSON, XML }; int num_nets; int num_blocks; diff --git a/vpr/src/base/atom_lookup.cpp b/vpr/src/base/atom_lookup.cpp index f771b8af154..208cd746b97 100644 --- a/vpr/src/base/atom_lookup.cpp +++ b/vpr/src/base/atom_lookup.cpp @@ -112,11 +112,12 @@ void AtomLookup::add_atom_clb_net(const AtomNetId atom_net, const ClusterNetId c clb_net_to_atom_net_[clb_net] = atom_net; } -void AtomLookup::remove_clb_net(const ClusterNetId clb_net){ - if(!clb_net_to_atom_net_.count(clb_net)) +void AtomLookup::remove_clb_net(const ClusterNetId clb_net) { + if (!clb_net_to_atom_net_.count(clb_net)) { return; + } - auto atom_net = clb_net_to_atom_net_[clb_net]; + AtomNetId atom_net = clb_net_to_atom_net_[clb_net]; auto& all_clb_nets = atom_net_to_clb_nets_[atom_net]; /* This is o(n), but an AtomNetId rarely has >5 ClusterNetIds */ all_clb_nets.erase(std::remove(all_clb_nets.begin(), all_clb_nets.end(), clb_net), all_clb_nets.end()); @@ -124,11 +125,12 @@ void AtomLookup::remove_clb_net(const ClusterNetId clb_net){ /* Remove mapping for given atom net */ void AtomLookup::remove_atom_net(const AtomNetId atom_net) { - if(!atom_net_to_clb_nets_.count(atom_net)) + if (!atom_net_to_clb_nets_.count(atom_net)) { return; + } - auto cluster_nets = atom_net_to_clb_nets_[atom_net]; - for(auto c: cluster_nets){ + const auto& cluster_nets = atom_net_to_clb_nets_[atom_net]; + for (const ClusterNetId c : cluster_nets) { clb_net_to_atom_net_.erase(c); } atom_net_to_clb_nets_.erase(atom_net); @@ -173,7 +175,7 @@ AtomLookup::pin_tnode_range AtomLookup::atom_pin_tnodes(BlockTnode block_tnode_t } void AtomLookup::set_atom_pin_tnode(const AtomPinId pin, const tatum::NodeId node, BlockTnode block_tnode_type) { - //A pin always expands to an external tnode (i.e. it's external connectivity in the netlist) + //A pin always expands to an external tnode (i.e. its external connectivity in the netlist) //but some pins may expand to an additional tnode (i.e. to SOURCE/SINK to cover internal sequential paths within a block) if (block_tnode_type == BlockTnode::EXTERNAL) { atom_pin_tnode_external_[pin] = node; diff --git a/vpr/src/base/atom_netlist.cpp b/vpr/src/base/atom_netlist.cpp index 1cbd2232f1f..75ad45ff1a5 100644 --- a/vpr/src/base/atom_netlist.cpp +++ b/vpr/src/base/atom_netlist.cpp @@ -85,8 +85,9 @@ AtomPortId AtomNetlist::find_atom_port(const AtomBlockId blk_id, const t_model_p //We can tell from the model port the set of ports //the port can be found in - port_range range = (model_port->dir == IN_PORT) ? (model_port->is_clock) ? block_clock_ports(blk_id) : block_input_ports(blk_id) - : (block_output_ports(blk_id)); + port_range range = (model_port->dir == IN_PORT) + ? (model_port->is_clock) ? block_clock_ports(blk_id) : block_input_ports(blk_id) + : (block_output_ports(blk_id)); for (auto port_id : range) { if (port_name(port_id) == model_port->name) { @@ -97,7 +98,9 @@ AtomPortId AtomNetlist::find_atom_port(const AtomBlockId blk_id, const t_model_p return AtomPortId::INVALID(); } -AtomBlockId AtomNetlist::find_atom_pin_driver(const AtomBlockId blk_id, const t_model_ports* model_port, const BitIndex port_bit) const { +AtomBlockId AtomNetlist::find_atom_pin_driver(const AtomBlockId blk_id, + const t_model_ports* model_port, + const BitIndex port_bit) const { // find the port id the matches the given port model AtomPortId port_id = find_atom_port(blk_id, model_port); @@ -192,7 +195,11 @@ AtomPortId AtomNetlist::create_port(const AtomBlockId blk_id, const t_model_port return port_id; } -AtomPinId AtomNetlist::create_pin(const AtomPortId port_id, BitIndex port_bit, const AtomNetId net_id, const PinType pin_type_, bool is_const) { +AtomPinId AtomNetlist::create_pin(const AtomPortId port_id, + BitIndex port_bit, + const AtomNetId net_id, + const PinType pin_type_, + bool is_const) { AtomPinId pin_id = Netlist::create_pin(port_id, port_bit, net_id, pin_type_, is_const); //Check post-conditions: size @@ -298,8 +305,7 @@ void AtomNetlist::shrink_to_fit_impl() { * */ bool AtomNetlist::validate_block_sizes_impl(size_t num_blocks) const { - if (block_truth_tables_.size() != num_blocks - || block_models_.size() != num_blocks) { + if (block_truth_tables_.size() != num_blocks || block_models_.size() != num_blocks) { return false; } return true; diff --git a/vpr/src/base/atom_netlist.h b/vpr/src/base/atom_netlist.h index b40e18d2d18..f3addd091f9 100644 --- a/vpr/src/base/atom_netlist.h +++ b/vpr/src/base/atom_netlist.h @@ -148,7 +148,9 @@ class AtomNetlist : public Netlist& pin_id_map) override; void clean_nets_impl(const vtr::vector_map& net_id_map) override; - void rebuild_block_refs_impl(const vtr::vector_map& pin_id_map, const vtr::vector_map& port_id_map) override; - void rebuild_port_refs_impl(const vtr::vector_map& block_id_map, const vtr::vector_map& pin_id_map) override; - void rebuild_pin_refs_impl(const vtr::vector_map& port_id_map, const vtr::vector_map& net_id_map) override; + void rebuild_block_refs_impl(const vtr::vector_map& pin_id_map, + const vtr::vector_map& port_id_map) override; + void rebuild_port_refs_impl(const vtr::vector_map& block_id_map, + const vtr::vector_map& pin_id_map) override; + void rebuild_pin_refs_impl(const vtr::vector_map& port_id_map, + const vtr::vector_map& net_id_map) override; void rebuild_net_refs_impl(const vtr::vector_map& pin_id_map) override; ///@brief Shrinks internal data structures to required size to reduce memory consumption diff --git a/vpr/src/base/atom_netlist_utils.cpp b/vpr/src/base/atom_netlist_utils.cpp index cbfed079c25..8514d55e5af 100644 --- a/vpr/src/base/atom_netlist_utils.cpp +++ b/vpr/src/base/atom_netlist_utils.cpp @@ -24,9 +24,18 @@ int infer_and_mark_constant_pins(AtomNetlist& netlist, e_const_gen_inference con int mark_undriven_primitive_outputs_as_constant(AtomNetlist& netlist, int verbosity); ///@brief Marks all primtive output pins of blk which have only constant inputs as constant pins -int infer_and_mark_block_pins_constant(AtomNetlist& netlist, AtomBlockId blk, e_const_gen_inference const_gen_inference_method, int verbosity); -int infer_and_mark_block_combinational_outputs_constant(AtomNetlist& netlist, AtomBlockId blk, e_const_gen_inference const_gen_inference_method, int verbosity); -int infer_and_mark_block_sequential_outputs_constant(AtomNetlist& netlist, AtomBlockId blk, e_const_gen_inference const_gen_inference_method, int verbosity); +int infer_and_mark_block_pins_constant(AtomNetlist& netlist, + AtomBlockId blk, + e_const_gen_inference const_gen_inference_method, + int verbosity); +int infer_and_mark_block_combinational_outputs_constant(AtomNetlist& netlist, + AtomBlockId blk, + e_const_gen_inference const_gen_inference_method, + int verbosity); +int infer_and_mark_block_sequential_outputs_constant(AtomNetlist& netlist, + AtomBlockId blk, + e_const_gen_inference const_gen_inference_method, + int verbosity); ///@brief Returns the set of input ports which are combinationally connected to output_port std::vector find_combinationally_connected_input_ports(const AtomNetlist& netlist, AtomPortId output_port); @@ -140,7 +149,8 @@ void print_netlist_as_blif(FILE* f, const AtomNetlist& netlist) { for (auto blk_id : netlist.blocks()) { if (netlist.block_type(blk_id) == AtomBlockType::BLOCK) { const t_model* blk_model = netlist.block_model(blk_id); - if (blk_model->name != std::string(MODEL_LATCH)) continue; + if (blk_model->name != std::string(MODEL_LATCH)) + continue; //Nets std::string d_net; @@ -168,7 +178,8 @@ void print_netlist_as_blif(FILE* f, const AtomNetlist& netlist) { clk_net = netlist.net_name(net_id); } else { - VPR_FATAL_ERROR(VPR_ERROR_ATOM_NETLIST, "Unrecognzied latch port '%s'", netlist.port_name(port_id).c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ATOM_NETLIST, "Unrecognzied latch port '%s'", + netlist.port_name(port_id).c_str()); } } } @@ -227,7 +238,8 @@ void print_netlist_as_blif(FILE* f, const AtomNetlist& netlist) { for (auto blk_id : netlist.blocks()) { if (netlist.block_type(blk_id) == AtomBlockType::BLOCK) { const t_model* blk_model = netlist.block_model(blk_id); - if (blk_model->name != std::string(MODEL_NAMES)) continue; + if (blk_model->name != std::string(MODEL_NAMES)) + continue; std::vector nets; @@ -294,10 +306,8 @@ void print_netlist_as_blif(FILE* f, const AtomNetlist& netlist) { std::set subckt_models; for (auto blk_id : netlist.blocks()) { const t_model* blk_model = netlist.block_model(blk_id); - if (blk_model->name == std::string(MODEL_LATCH) - || blk_model->name == std::string(MODEL_NAMES) - || blk_model->name == std::string(MODEL_INPUT) - || blk_model->name == std::string(MODEL_OUTPUT)) { + if (blk_model->name == std::string(MODEL_LATCH) || blk_model->name == std::string(MODEL_NAMES) + || blk_model->name == std::string(MODEL_INPUT) || blk_model->name == std::string(MODEL_OUTPUT)) { continue; } @@ -424,10 +434,14 @@ std::string atom_pin_arch_name(const AtomNetlist& netlist, const AtomPinId pin) int mark_constant_generators(AtomNetlist& netlist, e_const_gen_inference const_gen_inference_method, int verbosity) { int num_undriven_pins_marked_const = mark_undriven_primitive_outputs_as_constant(netlist, verbosity); - VTR_LOGV(verbosity > 0, "Inferred %4d additional primitive pins as constant generators since they have no combinationally connected inputs\n", num_undriven_pins_marked_const); + VTR_LOGV(verbosity > 0, + "Inferred %4d additional primitive pins as constant generators since they have no combinationally " + "connected inputs\n", + num_undriven_pins_marked_const); int num_inferred_pins_marked_const = infer_and_mark_constant_pins(netlist, const_gen_inference_method, verbosity); - VTR_LOGV(verbosity > 0, "Inferred %4d additional primitive pins as constant generators due to constant inputs\n", num_inferred_pins_marked_const); + VTR_LOGV(verbosity > 0, "Inferred %4d additional primitive pins as constant generators due to constant inputs\n", + num_inferred_pins_marked_const); return num_undriven_pins_marked_const + num_inferred_pins_marked_const; } @@ -441,16 +455,19 @@ int mark_undriven_primitive_outputs_as_constant(AtomNetlist& netlist, int verbos size_t num_pins_marked_constant = 0; for (AtomBlockId blk : netlist.blocks()) { - if (!blk) continue; + if (!blk) + continue; //Don't mark primary I/Os as constants - if (netlist.block_type(blk) != AtomBlockType::BLOCK) continue; + if (netlist.block_type(blk) != AtomBlockType::BLOCK) + continue; for (AtomPortId output_port : netlist.block_output_ports(blk)) { const t_model_ports* model_port = netlist.port_model(output_port); //Don't mark sequential or clock generator ports as constants - if (!model_port->clock.empty() || model_port->is_clock) continue; + if (!model_port->clock.empty() || model_port->is_clock) + continue; //Find the upstream combinationally connected ports std::vector upstream_ports = find_combinationally_connected_input_ports(netlist, output_port); @@ -475,9 +492,11 @@ int mark_undriven_primitive_outputs_as_constant(AtomNetlist& netlist, int verbos //The current output port has no inputs driving the primitive's internal //timing edges. Therefore we treat all its pins as constant generators. for (AtomPinId output_pin : netlist.port_pins(output_port)) { - if (netlist.pin_is_constant(output_pin)) continue; + if (netlist.pin_is_constant(output_pin)) + continue; - VTR_LOGV(verbosity > 1, "Marking pin '%s' as constant since it has no combinationally connected inputs\n", + VTR_LOGV(verbosity > 1, + "Marking pin '%s' as constant since it has no combinationally connected inputs\n", netlist.pin_name(output_pin).c_str()); netlist.set_pin_is_constant(output_pin, true); ++num_pins_marked_constant; @@ -489,7 +508,9 @@ int mark_undriven_primitive_outputs_as_constant(AtomNetlist& netlist, int verbos return num_pins_marked_constant; } -int infer_and_mark_constant_pins(AtomNetlist& netlist, e_const_gen_inference const_gen_inference_method, int verbosity) { +int infer_and_mark_constant_pins(AtomNetlist& netlist, + e_const_gen_inference const_gen_inference_method, + int verbosity) { size_t num_pins_inferred_constant = 0; //It is possible that by marking one constant generator @@ -503,7 +524,8 @@ int infer_and_mark_constant_pins(AtomNetlist& netlist, e_const_gen_inference con //Look through all the blocks marking those pins which are //constant generataors for (auto blk : netlist.blocks()) { - if (!blk) continue; + if (!blk) + continue; num_pins_marked += infer_and_mark_block_pins_constant(netlist, blk, const_gen_inference_method, verbosity); } @@ -514,17 +536,25 @@ int infer_and_mark_constant_pins(AtomNetlist& netlist, e_const_gen_inference con return num_pins_inferred_constant; } -int infer_and_mark_block_pins_constant(AtomNetlist& netlist, AtomBlockId block, e_const_gen_inference const_gen_inference_method, int verbosity) { +int infer_and_mark_block_pins_constant(AtomNetlist& netlist, + AtomBlockId block, + e_const_gen_inference const_gen_inference_method, + int verbosity) { size_t num_pins_marked_constant = 0; - num_pins_marked_constant += infer_and_mark_block_combinational_outputs_constant(netlist, block, const_gen_inference_method, verbosity); + num_pins_marked_constant + += infer_and_mark_block_combinational_outputs_constant(netlist, block, const_gen_inference_method, verbosity); - num_pins_marked_constant += infer_and_mark_block_sequential_outputs_constant(netlist, block, const_gen_inference_method, verbosity); + num_pins_marked_constant + += infer_and_mark_block_sequential_outputs_constant(netlist, block, const_gen_inference_method, verbosity); return num_pins_marked_constant; } -int infer_and_mark_block_combinational_outputs_constant(AtomNetlist& netlist, AtomBlockId blk, e_const_gen_inference const_gen_inference_method, int verbosity) { +int infer_and_mark_block_combinational_outputs_constant(AtomNetlist& netlist, + AtomBlockId blk, + e_const_gen_inference const_gen_inference_method, + int verbosity) { //Only if combinational constant generator inference enabled if (const_gen_inference_method != e_const_gen_inference::COMB && const_gen_inference_method != e_const_gen_inference::COMB_SEQ) { @@ -535,14 +565,16 @@ int infer_and_mark_block_combinational_outputs_constant(AtomNetlist& netlist, At || const_gen_inference_method == e_const_gen_inference::COMB_SEQ); //Don't mark primary I/Os as constants - if (netlist.block_type(blk) != AtomBlockType::BLOCK) return 0; + if (netlist.block_type(blk) != AtomBlockType::BLOCK) + return 0; size_t num_pins_marked_constant = 0; for (AtomPortId output_port : netlist.block_output_ports(blk)) { const t_model_ports* model_port = netlist.port_model(output_port); //Only handle combinational ports - if (!model_port->clock.empty() || model_port->is_clock) continue; + if (!model_port->clock.empty() || model_port->is_clock) + continue; //Find the upstream combinationally connected ports std::vector upstream_ports = find_combinationally_connected_input_ports(netlist, output_port); @@ -568,9 +600,11 @@ int infer_and_mark_block_combinational_outputs_constant(AtomNetlist& netlist, At //The current output port is combinational and has only constant upstream inputs. //Therefore we treat all its pins as constant generators. for (AtomPinId output_pin : netlist.port_pins(output_port)) { - if (netlist.pin_is_constant(output_pin)) continue; + if (netlist.pin_is_constant(output_pin)) + continue; - VTR_LOGV(verbosity > 1, "Marking combinational pin '%s' as constant since all it's upstream inputs are constant\n", + VTR_LOGV(verbosity > 1, + "Marking combinational pin '%s' as constant since all it's upstream inputs are constant\n", netlist.pin_name(output_pin).c_str()); netlist.set_pin_is_constant(output_pin, true); ++num_pins_marked_constant; @@ -581,7 +615,10 @@ int infer_and_mark_block_combinational_outputs_constant(AtomNetlist& netlist, At return num_pins_marked_constant; } -int infer_and_mark_block_sequential_outputs_constant(AtomNetlist& netlist, AtomBlockId blk, e_const_gen_inference const_gen_inference_method, int verbosity) { +int infer_and_mark_block_sequential_outputs_constant(AtomNetlist& netlist, + AtomBlockId blk, + e_const_gen_inference const_gen_inference_method, + int verbosity) { //Only if sequential constant generator inference enabled if (const_gen_inference_method != e_const_gen_inference::COMB_SEQ) { return 0; @@ -590,20 +627,23 @@ int infer_and_mark_block_sequential_outputs_constant(AtomNetlist& netlist, AtomB VTR_ASSERT(const_gen_inference_method == e_const_gen_inference::COMB_SEQ); //Don't mark primary I/Os as constants - if (netlist.block_type(blk) != AtomBlockType::BLOCK) return 0; + if (netlist.block_type(blk) != AtomBlockType::BLOCK) + return 0; //Collect the sequential output ports std::vector sequential_outputs; for (AtomPortId output_port : netlist.block_output_ports(blk)) { const t_model_ports* model_port = netlist.port_model(output_port); - if (model_port->clock.empty() || model_port->is_clock) continue; + if (model_port->clock.empty() || model_port->is_clock) + continue; //Only handle sequential ports sequential_outputs.push_back(output_port); } - if (sequential_outputs.empty()) return 0; //No sequential outputs, nothing to do + if (sequential_outputs.empty()) + return 0; //No sequential outputs, nothing to do //We mark sequential output ports as constants only when *all* inputs are constant // @@ -629,16 +669,18 @@ int infer_and_mark_block_sequential_outputs_constant(AtomNetlist& netlist, AtomB } } - if (!all_inputs_constant) return 0; + if (!all_inputs_constant) + return 0; int num_pins_marked_constant = 0; for (AtomPortId output_port : sequential_outputs) { for (AtomPinId output_pin : netlist.port_pins(output_port)) { - if (netlist.pin_is_constant(output_pin)) continue; + if (netlist.pin_is_constant(output_pin)) + continue; - VTR_LOGV(verbosity > 1, "Marking sequential pin '%s' as constant since all inputs to block '%s' (%s) are constant\n", - netlist.pin_name(output_pin).c_str(), - netlist.block_name(blk).c_str(), + VTR_LOGV(verbosity > 1, + "Marking sequential pin '%s' as constant since all inputs to block '%s' (%s) are constant\n", + netlist.pin_name(output_pin).c_str(), netlist.block_name(blk).c_str(), netlist.block_model(blk)->name); netlist.set_pin_is_constant(output_pin, true); ++num_pins_marked_constant; @@ -716,7 +758,8 @@ bool is_buffer_lut(const AtomNetlist& netlist, const AtomBlockId blk) { if (netlist.block_type(blk) == AtomBlockType::BLOCK) { const t_model* blk_model = netlist.block_model(blk); - if (blk_model->name != std::string(MODEL_NAMES)) return false; + if (blk_model->name != std::string(MODEL_NAMES)) + return false; auto input_ports = netlist.block_input_ports(blk); auto output_ports = netlist.block_output_ports(blk); @@ -822,13 +865,17 @@ bool remove_buffer_lut(AtomNetlist& netlist, AtomBlockId blk, int verbosity) { auto input_net = netlist.pin_net(input_pin); auto output_net = netlist.pin_net(output_pin); - VTR_LOGV_WARN(verbosity > 1, "Attempting to remove buffer '%s' (%s) from net '%s' to net '%s'\n", netlist.block_name(blk).c_str(), netlist.block_model(blk)->name, netlist.net_name(input_net).c_str(), netlist.net_name(output_net).c_str()); + VTR_LOGV_WARN(verbosity > 1, "Attempting to remove buffer '%s' (%s) from net '%s' to net '%s'\n", + netlist.block_name(blk).c_str(), netlist.block_model(blk)->name, netlist.net_name(input_net).c_str(), + netlist.net_name(output_net).c_str()); //Collect the new driver and sink pins AtomPinId new_driver = netlist.net_driver(input_net); if (!new_driver) { - VTR_LOGV_WARN(verbosity > 2, "Buffer '%s' has no input and will not be absorbed (left to be swept)\n", netlist.block_name(blk).c_str(), netlist.block_model(blk)->name, netlist.net_name(input_net).c_str(), netlist.net_name(output_net).c_str()); + VTR_LOGV_WARN(verbosity > 2, "Buffer '%s' has no input and will not be absorbed (left to be swept)\n", + netlist.block_name(blk).c_str(), netlist.block_model(blk)->name, + netlist.net_name(input_net).c_str(), netlist.net_name(output_net).c_str()); return false; //Dangling/undriven input, leave buffer to be swept } @@ -840,9 +887,7 @@ bool remove_buffer_lut(AtomNetlist& netlist, AtomBlockId blk, int verbosity) { //We don't copy the input pin (i.e. pin 2) std::copy_if(input_sinks.begin(), input_sinks.end(), std::back_inserter(new_sinks), - [input_pin](AtomPinId id) { - return id != input_pin; - }); + [input_pin](AtomPinId id) { return id != input_pin; }); //Since we are copying sinks we don't include the output driver (i.e. pin m+1) std::copy(output_sinks.begin(), output_sinks.end(), std::back_inserter(new_sinks)); @@ -857,18 +902,16 @@ bool remove_buffer_lut(AtomNetlist& netlist, AtomBlockId blk, int verbosity) { // Note that the driver can only (potentially) be an INPAD, and the sinks only (potentially) OUTPADs AtomBlockType driver_block_type = netlist.block_type(netlist.pin_block(new_driver)); bool driver_is_pi = (driver_block_type == AtomBlockType::INPAD); - bool po_in_input_sinks = std::any_of(input_sinks.begin(), input_sinks.end(), - [&](AtomPinId pin_id) { - VTR_ASSERT(netlist.pin_type(pin_id) == PinType::SINK); - AtomBlockId blk_id = netlist.pin_block(pin_id); - return netlist.block_type(blk_id) == AtomBlockType::OUTPAD; - }); - bool po_in_output_sinks = std::any_of(output_sinks.begin(), output_sinks.end(), - [&](AtomPinId pin_id) { - VTR_ASSERT(netlist.pin_type(pin_id) == PinType::SINK); - AtomBlockId blk_id = netlist.pin_block(pin_id); - return netlist.block_type(blk_id) == AtomBlockType::OUTPAD; - }); + bool po_in_input_sinks = std::any_of(input_sinks.begin(), input_sinks.end(), [&](AtomPinId pin_id) { + VTR_ASSERT(netlist.pin_type(pin_id) == PinType::SINK); + AtomBlockId blk_id = netlist.pin_block(pin_id); + return netlist.block_type(blk_id) == AtomBlockType::OUTPAD; + }); + bool po_in_output_sinks = std::any_of(output_sinks.begin(), output_sinks.end(), [&](AtomPinId pin_id) { + VTR_ASSERT(netlist.pin_type(pin_id) == PinType::SINK); + AtomBlockId blk_id = netlist.pin_block(pin_id); + return netlist.block_type(blk_id) == AtomBlockType::OUTPAD; + }); std::string new_net_name; auto input_net_name = netlist.net_name(input_net); @@ -912,7 +955,8 @@ bool remove_buffer_lut(AtomNetlist& netlist, AtomBlockId blk, int verbosity) { bool is_removable_block(const AtomNetlist& netlist, const AtomBlockId blk_id, std::string* reason) { //Any block with no fanout is removable for (AtomPinId pin_id : netlist.block_output_pins(blk_id)) { - if (!pin_id) continue; + if (!pin_id) + continue; AtomNetId net_id = netlist.pin_net(pin_id); if (net_id) { //There is a valid output net @@ -927,7 +971,8 @@ bool is_removable_block(const AtomNetlist& netlist, const AtomBlockId blk_id, st return false; } - if (reason) *reason = "has no fanout"; + if (reason) + *reason = "has no fanout"; return true; } @@ -935,7 +980,8 @@ bool is_removable_input(const AtomNetlist& netlist, const AtomBlockId blk_id, st AtomBlockType type = netlist.block_type(blk_id); //Only return true if an INPAD - if (type != AtomBlockType::INPAD) return false; + if (type != AtomBlockType::INPAD) + return false; return is_removable_block(netlist, blk_id, reason); } @@ -944,11 +990,13 @@ bool is_removable_output(const AtomNetlist& netlist, const AtomBlockId blk_id, s AtomBlockType type = netlist.block_type(blk_id); //Only return true if an OUTPAD - if (type != AtomBlockType::OUTPAD) return false; + if (type != AtomBlockType::OUTPAD) + return false; //An output is only removable if it has no fan-in for (AtomPinId pin_id : netlist.block_input_pins(blk_id)) { - if (!pin_id) continue; + if (!pin_id) + continue; AtomNetId net_id = netlist.pin_net(pin_id); if (net_id) { //There is a valid input net @@ -956,14 +1004,16 @@ bool is_removable_output(const AtomNetlist& netlist, const AtomBlockId blk_id, s } } - if (reason) *reason = "has no fanin"; + if (reason) + *reason = "has no fanin"; return true; } size_t sweep_constant_primary_outputs(AtomNetlist& netlist, int verbosity) { size_t removed_count = 0; for (AtomBlockId blk_id : netlist.blocks()) { - if (!blk_id) continue; + if (!blk_id) + continue; if (netlist.block_type(blk_id) == AtomBlockType::OUTPAD) { VTR_ASSERT(netlist.block_output_pins(blk_id).size() == 0); @@ -981,7 +1031,8 @@ size_t sweep_constant_primary_outputs(AtomNetlist& netlist, int verbosity) { if (all_inputs_are_const) { //All inputs are constant, so we should remove this output - VTR_LOGV_WARN(verbosity > 2, "Sweeping constant primary output '%s'\n", netlist.block_name(blk_id).c_str()); + VTR_LOGV_WARN(verbosity > 2, "Sweeping constant primary output '%s'\n", + netlist.block_name(blk_id).c_str()); netlist.remove_block(blk_id); removed_count++; } @@ -1047,26 +1098,18 @@ size_t sweep_iterative(AtomNetlist& netlist, dangling_outputs_swept += pass_dangling_outputs_swept; constant_outputs_swept += pass_constant_outputs_swept; constant_generators_marked += pass_constant_generators_marked; - } while (pass_dangling_nets_swept != 0 - || pass_dangling_blocks_swept != 0 - || pass_dangling_inputs_swept != 0 - || pass_dangling_outputs_swept != 0 - || pass_constant_outputs_swept != 0 + } while (pass_dangling_nets_swept != 0 || pass_dangling_blocks_swept != 0 || pass_dangling_inputs_swept != 0 + || pass_dangling_outputs_swept != 0 || pass_constant_outputs_swept != 0 || pass_constant_generators_marked != 0); VTR_LOGV(verbosity > 0, "Swept input(s) : %zu\n", dangling_inputs_swept); VTR_LOGV(verbosity > 0, "Swept output(s) : %zu (%zu dangling, %zu constant)\n", - dangling_outputs_swept + constant_outputs_swept, - dangling_outputs_swept, - constant_outputs_swept); + dangling_outputs_swept + constant_outputs_swept, dangling_outputs_swept, constant_outputs_swept); VTR_LOGV(verbosity > 0, "Swept net(s) : %zu\n", dangling_nets_swept); VTR_LOGV(verbosity > 0, "Swept block(s) : %zu\n", dangling_blocks_swept); VTR_LOGV(verbosity > 0, "Constant Pins Marked: %zu\n", constant_generators_marked); - return dangling_nets_swept - + dangling_blocks_swept - + dangling_inputs_swept - + dangling_outputs_swept + return dangling_nets_swept + dangling_blocks_swept + dangling_inputs_swept + dangling_outputs_swept + constant_outputs_swept; } @@ -1074,19 +1117,22 @@ size_t sweep_blocks(AtomNetlist& netlist, int verbosity) { //Identify any blocks (not inputs or outputs) for removal std::unordered_set blocks_to_remove; for (auto blk_id : netlist.blocks()) { - if (!blk_id) continue; + if (!blk_id) + continue; AtomBlockType type = netlist.block_type(blk_id); //Don't remove inpads/outpads here, we have seperate sweep functions for these - if (type == AtomBlockType::INPAD || type == AtomBlockType::OUTPAD) continue; + if (type == AtomBlockType::INPAD || type == AtomBlockType::OUTPAD) + continue; //We remove any blocks with no fanout std::string reason; if (is_removable_block(netlist, blk_id, &reason)) { blocks_to_remove.insert(blk_id); - VTR_LOGV_WARN(verbosity > 1, "Block '%s' will be swept (%s)\n", netlist.block_name(blk_id).c_str(), reason.c_str()); + VTR_LOGV_WARN(verbosity > 1, "Block '%s' will be swept (%s)\n", netlist.block_name(blk_id).c_str(), + reason.c_str()); } } @@ -1102,13 +1148,15 @@ size_t sweep_inputs(AtomNetlist& netlist, int verbosity) { //Identify any inputs for removal std::unordered_set inputs_to_remove; for (auto blk_id : netlist.blocks()) { - if (!blk_id) continue; + if (!blk_id) + continue; std::string reason; if (is_removable_input(netlist, blk_id, &reason)) { inputs_to_remove.insert(blk_id); - VTR_LOGV_WARN(verbosity > 1, "Primary input '%s' will be swept (%s)\n", netlist.block_name(blk_id).c_str(), reason.c_str()); + VTR_LOGV_WARN(verbosity > 1, "Primary input '%s' will be swept (%s)\n", netlist.block_name(blk_id).c_str(), + reason.c_str()); } } @@ -1124,12 +1172,14 @@ size_t sweep_outputs(AtomNetlist& netlist, int verbosity) { //Identify any outputs for removal std::unordered_set outputs_to_remove; for (auto blk_id : netlist.blocks()) { - if (!blk_id) continue; + if (!blk_id) + continue; std::string reason; if (is_removable_output(netlist, blk_id, &reason)) { outputs_to_remove.insert(blk_id); - VTR_LOGV_WARN(verbosity > 1, "Primary output '%s' will be swept (%s)\n", netlist.block_name(blk_id).c_str(), reason.c_str()); + VTR_LOGV_WARN(verbosity > 1, "Primary output '%s' will be swept (%s)\n", netlist.block_name(blk_id).c_str(), + reason.c_str()); } } @@ -1146,16 +1196,19 @@ size_t sweep_nets(AtomNetlist& netlist, int verbosity) { std::unordered_set nets_to_remove; for (auto net_id : netlist.nets()) { - if (!net_id) continue; + if (!net_id) + continue; if (!netlist.net_driver(net_id)) { //No driver - VTR_LOGV_WARN(verbosity > 1, "Net '%s' has no driver and will be removed\n", netlist.net_name(net_id).c_str()); + VTR_LOGV_WARN(verbosity > 1, "Net '%s' has no driver and will be removed\n", + netlist.net_name(net_id).c_str()); nets_to_remove.insert(net_id); } if (netlist.net_sinks(net_id).size() == 0) { //No sinks - VTR_LOGV_WARN(verbosity > 1, "Net '%s' has no sinks and will be removed\n", netlist.net_name(net_id).c_str()); + VTR_LOGV_WARN(verbosity > 1, "Net '%s' has no sinks and will be removed\n", + netlist.net_name(net_id).c_str()); nets_to_remove.insert(net_id); } } @@ -1205,7 +1258,9 @@ bool truth_table_encodes_on_set(const AtomNetlist::TruthTable& truth_table) { return encodes_on_set; } -AtomNetlist::TruthTable permute_truth_table(const AtomNetlist::TruthTable& truth_table, const size_t num_inputs, const std::vector& permutation) { +AtomNetlist::TruthTable permute_truth_table(const AtomNetlist::TruthTable& truth_table, + const size_t num_inputs, + const std::vector& permutation) { AtomNetlist::TruthTable permuted_truth_table; for (const auto& row : truth_table) { @@ -1246,7 +1301,8 @@ AtomNetlist::TruthTable expand_truth_table(const AtomNetlist::TruthTable& truth_ return expanded_truth_table; } -std::vector truth_table_to_lut_mask(const AtomNetlist::TruthTable& truth_table, const size_t num_inputs) { +std::vector truth_table_to_lut_mask(const AtomNetlist::TruthTable& truth_table, + const size_t num_inputs) { bool on_set = truth_table_encodes_on_set(truth_table); //Initialize the lut mask @@ -1308,8 +1364,7 @@ void cube_to_minterms_recurr(std::vector cube, std::vector cube, std::vector find_netlist_physical_clock_nets(const AtomNetlist& netlist) { std::set clock_nets; //The clock nets - std::map> clock_gen_ports; //Records info about clock generating ports + std::map> + clock_gen_ports; //Records info about clock generating ports //Look through all the blocks (except I/Os) to find sink clock pins, or //clock generators // //Since we don't have good information about what pins are clock generators we build a lookup as we go for (auto blk_id : netlist.blocks()) { - if (!blk_id) continue; + if (!blk_id) + continue; AtomBlockType type = netlist.block_type(blk_id); - if (type != AtomBlockType::BLOCK) continue; + if (type != AtomBlockType::BLOCK) + continue; //Save any clock generating ports on this model type const t_model* model = netlist.block_model(blk_id); @@ -1367,7 +1425,8 @@ std::set find_netlist_physical_clock_nets(const AtomNetlist& netlist) //Look for connected input clocks for (auto pin_id : netlist.block_clock_pins(blk_id)) { - if (!pin_id) continue; + if (!pin_id) + continue; AtomNetId clk_net_id = netlist.pin_net(pin_id); VTR_ASSERT(clk_net_id); @@ -1383,13 +1442,16 @@ std::set find_netlist_physical_clock_nets(const AtomNetlist& netlist) for (const t_model_ports* model_port : clock_gen_ports[model]) { AtomPortId clk_gen_port = netlist.find_atom_port(blk_id, model_port); - if (!clk_gen_port) continue; //Port not connected on this block + if (!clk_gen_port) + continue; //Port not connected on this block for (AtomPinId pin_id : netlist.port_pins(clk_gen_port)) { - if (!pin_id) continue; + if (!pin_id) + continue; AtomNetId clk_net_id = netlist.pin_net(pin_id); - if (!clk_net_id) continue; + if (!clk_net_id) + continue; clock_nets.insert(clk_net_id); } @@ -1446,9 +1508,11 @@ std::set find_netlist_logical_clock_drivers(const AtomNetlist& netlis VTR_ASSERT(upstream_net); - VTR_LOG_WARN("Assuming clocks may propagate through %s (%s) from pin %s to %s (assuming a non-inverting buffer).\n", - netlist.block_name(driver_blk).c_str(), netlist.block_model(driver_blk)->name, - netlist.pin_name(upstream_pin).c_str(), netlist.pin_name(driver_pin).c_str()); + VTR_LOG_WARN( + "Assuming clocks may propagate through %s (%s) from pin %s to %s (assuming a non-inverting " + "buffer).\n", + netlist.block_name(driver_blk).c_str(), netlist.block_model(driver_blk)->name, + netlist.pin_name(upstream_pin).c_str(), netlist.pin_name(driver_pin).c_str()); clock_nets.insert(upstream_net); ++assumed_buffer_count; @@ -1496,7 +1560,9 @@ void print_netlist_clock_info(const AtomNetlist& netlist) { auto blk_id = netlist.pin_block(pin_id); clk_blks.insert(blk_id); } - VTR_LOG(" Netlist Clock '%s' Fanout: %zu pins (%.1f%%), %zu blocks (%.1f%%)\n", netlist.net_name(net_id).c_str(), fanout, 100. * float(fanout) / netlist.pins().size(), clk_blks.size(), 100 * float(clk_blks.size()) / netlist.blocks().size()); + VTR_LOG(" Netlist Clock '%s' Fanout: %zu pins (%.1f%%), %zu blocks (%.1f%%)\n", + netlist.net_name(net_id).c_str(), fanout, 100. * float(fanout) / netlist.pins().size(), clk_blks.size(), + 100 * float(clk_blks.size()) / netlist.blocks().size()); } } diff --git a/vpr/src/base/atom_netlist_utils.h b/vpr/src/base/atom_netlist_utils.h index aaa559d4a73..8db87d9f89f 100644 --- a/vpr/src/base/atom_netlist_utils.h +++ b/vpr/src/base/atom_netlist_utils.h @@ -82,10 +82,13 @@ AtomNetlist::TruthTable expand_truth_table(const AtomNetlist::TruthTable& truth_ * @param permutation A vector indicies to permute, permutation[i] is the input pin where * the signal currently connected to input i should be placed */ -AtomNetlist::TruthTable permute_truth_table(const AtomNetlist::TruthTable& truth_table, const size_t num_inputs, const std::vector& permutation); +AtomNetlist::TruthTable permute_truth_table(const AtomNetlist::TruthTable& truth_table, + const size_t num_inputs, + const std::vector& permutation); ///@brief Convers a truth table to a lut mask (sequence of binary values representing minterms) -std::vector truth_table_to_lut_mask(const AtomNetlist::TruthTable& truth_table, const size_t num_inputs); +std::vector truth_table_to_lut_mask(const AtomNetlist::TruthTable& truth_table, + const size_t num_inputs); /** * @brief Convers a logic cube (potnetially including don't cares) into diff --git a/vpr/src/base/blk_loc_registry.cpp b/vpr/src/base/blk_loc_registry.cpp index 3841524a450..16eafabbdc7 100644 --- a/vpr/src/base/blk_loc_registry.cpp +++ b/vpr/src/base/blk_loc_registry.cpp @@ -7,33 +7,19 @@ BlkLocRegistry::BlkLocRegistry() : expected_transaction_(e_expected_transaction::APPLY) {} -const vtr::vector_map& BlkLocRegistry::block_locs() const { - return block_locs_; -} +const vtr::vector_map& BlkLocRegistry::block_locs() const { return block_locs_; } -vtr::vector_map& BlkLocRegistry::mutable_block_locs() { - return block_locs_; -} +vtr::vector_map& BlkLocRegistry::mutable_block_locs() { return block_locs_; } -const GridBlock& BlkLocRegistry::grid_blocks() const { - return grid_blocks_; -} +const GridBlock& BlkLocRegistry::grid_blocks() const { return grid_blocks_; } -GridBlock& BlkLocRegistry::mutable_grid_blocks() { - return grid_blocks_; -} +GridBlock& BlkLocRegistry::mutable_grid_blocks() { return grid_blocks_; } -const vtr::vector_map& BlkLocRegistry::physical_pins() const { - return physical_pins_; -} +const vtr::vector_map& BlkLocRegistry::physical_pins() const { return physical_pins_; } -vtr::vector_map& BlkLocRegistry::mutable_physical_pins() { - return physical_pins_; -} +vtr::vector_map& BlkLocRegistry::mutable_physical_pins() { return physical_pins_; } -int BlkLocRegistry::tile_pin_index(const ClusterPinId pin) const { - return physical_pins_[pin]; -} +int BlkLocRegistry::tile_pin_index(const ClusterPinId pin) const { return physical_pins_[pin]; } int BlkLocRegistry::net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) const { const auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -51,10 +37,10 @@ void BlkLocRegistry::set_block_location(ClusterBlockId blk_id, const t_pl_loc& l const std::string& block_name = cluster_ctx.clb_nlist.block_name(blk_id); // Check if block location is out of range of grid dimensions - if (location.x < 0 || location.x > int(device_ctx.grid.width() - 1) - || location.y < 0 || location.y > int(device_ctx.grid.height() - 1)) { - VPR_THROW(VPR_ERROR_PLACE, "Block %s with ID %d is out of range at location (%d, %d). \n", - block_name.c_str(), blk_id, location.x, location.y); + if (location.x < 0 || location.x > int(device_ctx.grid.width() - 1) || location.y < 0 + || location.y > int(device_ctx.grid.height() - 1)) { + VPR_THROW(VPR_ERROR_PLACE, "Block %s with ID %d is out of range at location (%d, %d). \n", block_name.c_str(), + blk_id, location.x, location.y); } // Set the location of the block @@ -65,16 +51,13 @@ void BlkLocRegistry::set_block_location(ClusterBlockId blk_id, const t_pl_loc& l auto logical_block = cluster_ctx.clb_nlist.block_type(blk_id); if (location.sub_tile >= physical_tile->capacity || location.sub_tile < 0) { - VPR_THROW(VPR_ERROR_PLACE, "Block %s subtile number (%d) is out of range. \n", block_name.c_str(), location.sub_tile); + VPR_THROW(VPR_ERROR_PLACE, "Block %s subtile number (%d) is out of range. \n", block_name.c_str(), + location.sub_tile); } if (!is_sub_tile_compatible(physical_tile, logical_block, block_locs_[blk_id].loc.sub_tile)) { VPR_THROW(VPR_ERROR_PLACE, "Attempt to place block %s with ID %d at illegal location (%d,%d,%d). \n", - block_name.c_str(), - blk_id, - location.x, - location.y, - location.layer); + block_name.c_str(), blk_id, location.x, location.y, location.layer); } // Mark the grid location and usage of the block @@ -163,9 +146,11 @@ void BlkLocRegistry::place_sync_external_block_connections(ClusterBlockId iblk) for (ClusterPinId pin : clb_nlist.block_pins(iblk)) { int logical_pin_index = clb_nlist.pin_logical_index(pin); - int sub_tile_pin_index = get_sub_tile_physical_pin(sub_tile_index, physical_tile, logical_block, logical_pin_index); + int sub_tile_pin_index + = get_sub_tile_physical_pin(sub_tile_index, physical_tile, logical_block, logical_pin_index); - int new_physical_pin_index = sub_tile.sub_tile_to_tile_pin_indices[sub_tile_pin_index + rel_capacity * max_num_block_pins]; + int new_physical_pin_index + = sub_tile.sub_tile_to_tile_pin_indices[sub_tile_pin_index + rel_capacity * max_num_block_pins]; auto result = physical_pins_.find(pin); if (result != physical_pins_.end()) { @@ -193,9 +178,9 @@ void BlkLocRegistry::apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_aff block_locs_[blk].loc = new_loc; // get physical tile type of the old location - t_physical_tile_type_ptr old_type = device_ctx.grid.get_physical_type({old_loc.x,old_loc.y,old_loc.layer}); + t_physical_tile_type_ptr old_type = device_ctx.grid.get_physical_type({old_loc.x, old_loc.y, old_loc.layer}); // get physical tile type of the new location - t_physical_tile_type_ptr new_type = device_ctx.grid.get_physical_type({new_loc.x,new_loc.y, new_loc.layer}); + t_physical_tile_type_ptr new_type = device_ctx.grid.get_physical_type({new_loc.x, new_loc.y, new_loc.layer}); // if physical tile type of old location does not equal physical tile type of new location, sync the new physical pins if (old_type != new_type) { diff --git a/vpr/src/base/blk_loc_registry.h b/vpr/src/base/blk_loc_registry.h index 17df9883e0e..ea452b40271 100644 --- a/vpr/src/base/blk_loc_registry.h +++ b/vpr/src/base/blk_loc_registry.h @@ -122,10 +122,7 @@ class BlkLocRegistry { */ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected); - enum class e_expected_transaction { - APPLY, - COMMIT_REVERT - }; + enum class e_expected_transaction { APPLY, COMMIT_REVERT }; e_expected_transaction expected_transaction_; }; diff --git a/vpr/src/base/check_netlist.cpp b/vpr/src/base/check_netlist.cpp index cd800003a5f..46822fe4a55 100644 --- a/vpr/src/base/check_netlist.cpp +++ b/vpr/src/base/check_netlist.cpp @@ -48,10 +48,10 @@ void check_netlist(int verbosity) { /* Check that nets fanout and have a driver. */ int global_to_non_global_connection_count = 0; for (auto net_id : cluster_ctx.clb_nlist.nets()) { - h_net_ptr = insert_in_hash_table(net_hash_table, cluster_ctx.clb_nlist.net_name(net_id).c_str(), size_t(net_id)); + h_net_ptr + = insert_in_hash_table(net_hash_table, cluster_ctx.clb_nlist.net_name(net_id).c_str(), size_t(net_id)); if (h_net_ptr->count != 1) { - VTR_LOG_ERROR("Net %s has multiple drivers.\n", - cluster_ctx.clb_nlist.net_name(net_id).c_str()); + VTR_LOG_ERROR("Net %s has multiple drivers.\n", cluster_ctx.clb_nlist.net_name(net_id).c_str()); error++; } // This function is called during packing - For the time being, we only use a flat netlist during routing @@ -61,7 +61,8 @@ void check_netlist(int verbosity) { } } free_hash_table(net_hash_table); - VTR_LOG_WARN("Netlist contains %d global net to non-global architecture pin connections\n", global_to_non_global_connection_count); + VTR_LOG_WARN("Netlist contains %d global net to non-global architecture pin connections\n", + global_to_non_global_connection_count); auto& device_ctx = g_vpr_ctx.device(); IntraLbPbPinLookup intra_lb_pb_pin_lookup(device_ctx.logical_block_types); @@ -72,16 +73,14 @@ void check_netlist(int verbosity) { error += check_clb_conn(blk_id, num_conn); error += check_clb_internal_nets(blk_id, intra_lb_pb_pin_lookup); if (error >= ERROR_THRESHOLD) { - VPR_ERROR(VPR_ERROR_OTHER, - "Too many errors in netlist, exiting.\n"); + VPR_ERROR(VPR_ERROR_OTHER, "Too many errors in netlist, exiting.\n"); } } error += check_for_duplicated_names(); if (error != 0) { - VPR_ERROR(VPR_ERROR_OTHER, - "Found %d fatal Errors in the input netlist.\n", error); + VPR_ERROR(VPR_ERROR_OTHER, "Found %d fatal Errors in the input netlist.\n", error); } } @@ -109,8 +108,7 @@ static int check_connections_to_global_clb_pins(ClusterNetId net_id, int verbosi int log_index = cluster_ctx.clb_nlist.pin_logical_index(pin_id); int pin_index = get_physical_pin(physical_type, logical_type, log_index); - if (physical_type->is_ignored_pin[pin_index] != net_is_ignored - && !is_io_type(physical_type)) { + if (physical_type->is_ignored_pin[pin_index] != net_is_ignored && !is_io_type(physical_type)) { VTR_LOGV_WARN(verbosity > 2, "Global net '%s' connects to non-global architecture pin '%s' (netlist pin '%s')\n", cluster_ctx.clb_nlist.net_name(net_id).c_str(), @@ -141,16 +139,14 @@ static int check_clb_conn(ClusterBlockId iblk, int num_conn) { VTR_LOG_WARN( "Logic block #%d (%s) has only 1 input pin '%s'" " -- the whole block is hanging logic that should be swept.\n", - iblk, clb_nlist.block_name(iblk).c_str(), - clb_nlist.pin_name(pin_id).c_str()); + iblk, clb_nlist.block_name(iblk).c_str(), clb_nlist.pin_name(pin_id).c_str()); } if (pin_type == PinType::DRIVER && !clb_nlist.block_contains_primary_input(iblk)) { //Output only and not a Primary-Input block VTR_LOG_WARN( "Logic block #%d (%s) has only 1 output pin '%s'." " It may be a constant generator.\n", - iblk, clb_nlist.block_name(iblk).c_str(), - clb_nlist.pin_name(pin_id).c_str()); + iblk, clb_nlist.block_name(iblk).c_str(), clb_nlist.pin_name(pin_id).c_str()); } break; @@ -161,8 +157,8 @@ static int check_clb_conn(ClusterBlockId iblk, int num_conn) { * just a redundant double check. */ if (num_conn > type->pb_type->num_pins) { - VTR_LOG_ERROR("logic block #%d with output %s has %d pins.\n", - iblk, cluster_ctx.clb_nlist.block_name(iblk).c_str(), num_conn); + VTR_LOG_ERROR("logic block #%d with output %s has %d pins.\n", iblk, + cluster_ctx.clb_nlist.block_name(iblk).c_str(), num_conn); error++; } @@ -180,7 +176,8 @@ static int check_clb_internal_nets(ClusterBlockId iblk, const IntraLbPbPinLookup t_logical_block_type_ptr type = cluster_ctx.clb_nlist.block_type(iblk); for (int i = 0; i < num_pins_in_block; i++) { - if (!pb_route.count(i)) continue; + if (!pb_route.count(i)) + continue; VTR_ASSERT(pb_route.count(i)); @@ -231,8 +228,7 @@ static int check_for_duplicated_names() { for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { clb_h_ptr = insert_in_hash_table(clb_hash_table, cluster_ctx.clb_nlist.block_name(blk_id).c_str(), clb_count); if (clb_h_ptr->count > 1) { - VTR_LOG_ERROR("Block %s has duplicated name.\n", - cluster_ctx.clb_nlist.block_name(blk_id).c_str()); + VTR_LOG_ERROR("Block %s has duplicated name.\n", cluster_ctx.clb_nlist.block_name(blk_id).c_str()); error++; } else { clb_count++; diff --git a/vpr/src/base/clustered_netlist.cpp b/vpr/src/base/clustered_netlist.cpp index 180b60e35bd..76001433d43 100644 --- a/vpr/src/base/clustered_netlist.cpp +++ b/vpr/src/base/clustered_netlist.cpp @@ -52,7 +52,9 @@ int ClusteredNetlist::block_pin_net_index(const ClusterBlockId blk_id, const int ClusterPinId ClusteredNetlist::block_pin(const ClusterBlockId blk, const int logical_pin_index) const { VTR_ASSERT_SAFE(valid_block_id(blk)); - VTR_ASSERT_SAFE_MSG(logical_pin_index >= 0 && logical_pin_index < static_cast(block_logical_pins_[blk].size()), "Logical pin index must be in range"); + VTR_ASSERT_SAFE_MSG( + logical_pin_index >= 0 && logical_pin_index < static_cast(block_logical_pins_[blk].size()), + "Logical pin index must be in range"); return block_logical_pins_[blk][logical_pin_index]; } @@ -124,7 +126,10 @@ ClusterBlockId ClusteredNetlist::create_block(const char* name, t_pb* pb, t_logi return blk_id; } -ClusterPortId ClusteredNetlist::create_port(const ClusterBlockId blk_id, const std::string& name, BitIndex width, PortType type) { +ClusterPortId ClusteredNetlist::create_port(const ClusterBlockId blk_id, + const std::string& name, + BitIndex width, + PortType type) { ClusterPortId port_id = find_port(blk_id, name); if (!port_id) { port_id = Netlist::create_port(blk_id, name, width, type); @@ -141,7 +146,12 @@ ClusterPortId ClusteredNetlist::create_port(const ClusterBlockId blk_id, const s return port_id; } -ClusterPinId ClusteredNetlist::create_pin(const ClusterPortId port_id, BitIndex port_bit, const ClusterNetId net_id, const PinType pin_type_, int pin_index, bool is_const) { +ClusterPinId ClusteredNetlist::create_pin(const ClusterPortId port_id, + BitIndex port_bit, + const ClusterNetId net_id, + const PinType pin_type_, + int pin_index, + bool is_const) { ClusterPinId pin_id = Netlist::create_pin(port_id, port_bit, net_id, pin_type_, is_const); pin_logical_index_.push_back(pin_index); @@ -178,17 +188,11 @@ void ClusteredNetlist::remove_block_impl(const ClusterBlockId blk_id) { block_logical_pins_.insert(blk_id, std::vector()); } -void ClusteredNetlist::remove_port_impl(const ClusterPortId port_id) { - VTR_ASSERT(port_id); -} +void ClusteredNetlist::remove_port_impl(const ClusterPortId port_id) { VTR_ASSERT(port_id); } -void ClusteredNetlist::remove_pin_impl(const ClusterPinId pin_id) { - VTR_ASSERT(pin_id); -} +void ClusteredNetlist::remove_pin_impl(const ClusterPinId pin_id) { VTR_ASSERT(pin_id); } -void ClusteredNetlist::remove_net_impl(const ClusterNetId net_id) { - VTR_ASSERT(net_id); -} +void ClusteredNetlist::remove_net_impl(const ClusterNetId net_id) { VTR_ASSERT(net_id); } void ClusteredNetlist::clean_blocks_impl(const vtr::vector_map& block_id_map) { //Update all the block values @@ -213,7 +217,8 @@ void ClusteredNetlist::clean_nets_impl(const vtr::vector_map& /*pin_id_map*/, const vtr::vector_map& /*port_id_map*/) { for (auto blk : blocks()) { - block_logical_pins_[blk] = std::vector(get_max_num_pins(block_type(blk)), ClusterPinId::INVALID()); //Reset + block_logical_pins_[blk] + = std::vector(get_max_num_pins(block_type(blk)), ClusterPinId::INVALID()); //Reset for (auto pin : block_pins(blk)) { int logical_pin_index = pin_logical_index(pin); block_logical_pins_[blk][logical_pin_index] = pin; @@ -253,8 +258,7 @@ void ClusteredNetlist::shrink_to_fit_impl() { * */ bool ClusteredNetlist::validate_block_sizes_impl(size_t num_blocks) const { - if (block_pbs_.size() != num_blocks - || block_types_.size() != num_blocks + if (block_pbs_.size() != num_blocks || block_types_.size() != num_blocks || block_logical_pins_.size() != num_blocks) { return false; } @@ -273,11 +277,11 @@ bool ClusteredNetlist::validate_pin_sizes_impl(size_t num_pins) const { return true; } -bool ClusteredNetlist::validate_net_sizes_impl(size_t /* num_nets */) const { - return true; -} +bool ClusteredNetlist::validate_net_sizes_impl(size_t /* num_nets */) const { return true; } -ClusterBlockId ClusteredNetlist::find_block_by_name_fragment(const std::string& name_pattern, const std::vector& cluster_block_candidates) const { +ClusterBlockId ClusteredNetlist::find_block_by_name_fragment( + const std::string& name_pattern, + const std::vector& cluster_block_candidates) const { ClusterBlockId blk_id = ClusterBlockId::INVALID(); std::regex name_to_match(name_pattern); diff --git a/vpr/src/base/clustered_netlist.h b/vpr/src/base/clustered_netlist.h index a32e371741c..61242a88b08 100644 --- a/vpr/src/base/clustered_netlist.h +++ b/vpr/src/base/clustered_netlist.h @@ -203,7 +203,12 @@ class ClusteredNetlist : public Netlist& cluster_block_candidates) const; + ClusterBlockId find_block_by_name_fragment(const std::string& name_pattern, + const std::vector& cluster_block_candidates) const; private: //Private Members /* @@ -312,9 +318,12 @@ class ClusteredNetlist : public Netlist& pin_id_map, const vtr::vector_map& port_id_map) override; - void rebuild_port_refs_impl(const vtr::vector_map& block_id_map, const vtr::vector_map& pin_id_map) override; - void rebuild_pin_refs_impl(const vtr::vector_map& port_id_map, const vtr::vector_map& net_id_map) override; + void rebuild_block_refs_impl(const vtr::vector_map& pin_id_map, + const vtr::vector_map& port_id_map) override; + void rebuild_port_refs_impl(const vtr::vector_map& block_id_map, + const vtr::vector_map& pin_id_map) override; + void rebuild_pin_refs_impl(const vtr::vector_map& port_id_map, + const vtr::vector_map& net_id_map) override; void rebuild_net_refs_impl(const vtr::vector_map& pin_id_map) override; /* @@ -329,10 +338,14 @@ class ClusteredNetlist : public Netlist block_pbs_; /// block_types_; ///> block_logical_pins_; ///> blocks_per_type_; /// + block_pbs_; /// + block_types_; ///> + block_logical_pins_; ///> + blocks_per_type_; /// atom_pin_range; public: - ClusteredPinAtomPinsLookup(const ClusteredNetlist& clustered_netlist, const AtomNetlist& atom_netlist, const IntraLbPbPinLookup& pb_gpin_lookup); + ClusteredPinAtomPinsLookup(const ClusteredNetlist& clustered_netlist, + const AtomNetlist& atom_netlist, + const IntraLbPbPinLookup& pb_gpin_lookup); atom_pin_range connected_atom_pins(ClusterPinId clustered_pin) const; ClusterPinId connected_clb_pin(AtomPinId atom_pin) const; private: - void init_lookup(const ClusteredNetlist& clustered_netlist, const AtomNetlist& atom_netlist, const IntraLbPbPinLookup& pb_gpin_lookup); + void init_lookup(const ClusteredNetlist& clustered_netlist, + const AtomNetlist& atom_netlist, + const IntraLbPbPinLookup& pb_gpin_lookup); private: vtr::vector> clustered_pin_connected_atom_pins_; diff --git a/vpr/src/base/constant_nets.cpp b/vpr/src/base/constant_nets.cpp index 36862e490be..68226544205 100644 --- a/vpr/src/base/constant_nets.cpp +++ b/vpr/src/base/constant_nets.cpp @@ -4,7 +4,11 @@ #include "vtr_assert.h" -void process_constant_nets(AtomNetlist& atom_nlist, const AtomLookup& atom_look_up, ClusteredNetlist& nlist, e_constant_net_method method, int verbosity) { +void process_constant_nets(AtomNetlist& atom_nlist, + const AtomLookup& atom_look_up, + ClusteredNetlist& nlist, + e_constant_net_method method, + int verbosity) { if (method == CONSTANT_NET_GLOBAL) { /* * Treat constant nets (e.g. gnd/vcc) as globals so they are not routed. @@ -27,7 +31,10 @@ void process_constant_nets(AtomNetlist& atom_nlist, const AtomLookup& atom_look_ ++constant_net_count; } } - VTR_LOG_WARN("Treated %zu constant nets as global which will not be routed (to see net names increase packer verbosity).\n", constant_net_count); + VTR_LOG_WARN( + "Treated %zu constant nets as global which will not be routed (to see net names increase packer " + "verbosity).\n", + constant_net_count); } else { VTR_ASSERT(method == CONSTANT_NET_ROUTE); /* Treat constants the same as any other net, so they will be routed. Note that this requires diff --git a/vpr/src/base/constant_nets.h b/vpr/src/base/constant_nets.h index 8bf943b8bc8..69c77058d95 100644 --- a/vpr/src/base/constant_nets.h +++ b/vpr/src/base/constant_nets.h @@ -9,6 +9,10 @@ enum e_constant_net_method { CONSTANT_NET_ROUTE /// -inline void load_add_atom(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug); +inline void load_add_atom(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug); template -inline void load_add_region(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug); -inline void load_add_region_required_attributes(const pugi::xml_node& root, int* x_high, int* x_low, int* y_high, int* y_low, const std::function* report_error); +inline void load_add_region(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug); +inline void load_add_region_required_attributes(const pugi::xml_node& root, + int* x_high, + int* x_low, + int* y_high, + int* y_low, + const std::function* report_error); template -inline void load_partition(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug); +inline void load_partition(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug); template -inline void load_partition_list(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug); +inline void load_partition_list(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug); template -inline void load_set_global_signal(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug); -inline void load_set_global_signal_required_attributes(const pugi::xml_node& root, enum_route_model_type* route_model, const std::function* report_error); +inline void load_set_global_signal(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug); +inline void load_set_global_signal_required_attributes(const pugi::xml_node& root, + enum_route_model_type* route_model, + const std::function* report_error); template -inline void load_global_route_constraints(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug); +inline void load_global_route_constraints(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug); template -inline void load_vpr_constraints(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug); +inline void load_vpr_constraints(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug); /* Declarations for internal write functions for the complex types. */ template @@ -122,9 +157,9 @@ typedef const uint64_t __attribute__((aligned(1))) triehash_uu64; static_assert(alignof(triehash_uu32) == 1, "Unaligned 32-bit access not found."); static_assert(alignof(triehash_uu64) == 1, "Unaligned 64-bit access not found."); #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ -# define onechar(c, s, l) (((uint64_t)(c)) << (s)) +#define onechar(c, s, l) (((uint64_t)(c)) << (s)) #else -# define onechar(c, s, l) (((uint64_t)(c)) << (l - 8 - s)) +#define onechar(c, s, l) (((uint64_t)(c)) << (l - 8 - s)) #endif /* Tokens for attribute and node names. */ @@ -132,17 +167,11 @@ static_assert(alignof(triehash_uu64) == 1, "Unaligned 64-bit access not found.") enum class atok_t_add_atom { NAME_PATTERN }; constexpr const char* atok_lookup_t_add_atom[] = {"name_pattern"}; -enum class atok_t_add_region { LAYER_HIGH, - LAYER_LOW, - SUBTILE, - X_HIGH, - X_LOW, - Y_HIGH, - Y_LOW }; -constexpr const char* atok_lookup_t_add_region[] = {"layer_high", "layer_low", "subtile", "x_high", "x_low", "y_high", "y_low"}; - -enum class gtok_t_partition { ADD_ATOM, - ADD_REGION }; +enum class atok_t_add_region { LAYER_HIGH, LAYER_LOW, SUBTILE, X_HIGH, X_LOW, Y_HIGH, Y_LOW }; +constexpr const char* atok_lookup_t_add_region[] + = {"layer_high", "layer_low", "subtile", "x_high", "x_low", "y_high", "y_low"}; + +enum class gtok_t_partition { ADD_ATOM, ADD_REGION }; constexpr const char* gtok_lookup_t_partition[] = {"add_atom", "add_region"}; enum class atok_t_partition { NAME }; constexpr const char* atok_lookup_t_partition[] = {"name"}; @@ -150,15 +179,12 @@ constexpr const char* atok_lookup_t_partition[] = {"name"}; enum class gtok_t_partition_list { PARTITION }; constexpr const char* gtok_lookup_t_partition_list[] = {"partition"}; -enum class atok_t_set_global_signal { NAME, - NETWORK_NAME, - ROUTE_MODEL }; +enum class atok_t_set_global_signal { NAME, NETWORK_NAME, ROUTE_MODEL }; constexpr const char* atok_lookup_t_set_global_signal[] = {"name", "network_name", "route_model"}; enum class gtok_t_global_route_constraints { SET_GLOBAL_SIGNAL }; constexpr const char* gtok_lookup_t_global_route_constraints[] = {"set_global_signal"}; -enum class gtok_t_vpr_constraints { PARTITION_LIST, - GLOBAL_ROUTE_CONSTRAINTS }; +enum class gtok_t_vpr_constraints { PARTITION_LIST, GLOBAL_ROUTE_CONSTRAINTS }; constexpr const char* gtok_lookup_t_vpr_constraints[] = {"partition_list", "global_route_constraints"}; enum class atok_t_vpr_constraints { TOOL_NAME }; constexpr const char* atok_lookup_t_vpr_constraints[] = {"tool_name"}; @@ -169,7 +195,8 @@ inline atok_t_add_atom lex_attr_t_add_atom(const char* in, const std::function.").c_str()); } -inline gtok_t_partition_list lex_node_t_partition_list(const char* in, const std::function* report_error) { +inline gtok_t_partition_list lex_node_t_partition_list(const char* in, + const std::function* report_error) { unsigned int len = strlen(in); switch (len) { case 9: switch (*((triehash_uu64*)&in[0])) { - case onechar('p', 0, 64) | onechar('a', 8, 64) | onechar('r', 16, 64) | onechar('t', 24, 64) | onechar('i', 32, 64) | onechar('t', 40, 64) | onechar('i', 48, 64) | onechar('o', 56, 64): + case onechar('p', 0, 64) | onechar('a', 8, 64) | onechar('r', 16, 64) | onechar('t', 24, 64) + | onechar('i', 32, 64) | onechar('t', 40, 64) | onechar('i', 48, 64) | onechar('o', 56, 64): switch (in[8]) { case onechar('n', 0, 8): return gtok_t_partition_list::PARTITION; @@ -400,7 +433,8 @@ inline gtok_t_partition_list lex_node_t_partition_list(const char* in, const std noreturn_report(report_error, ("Found unrecognized child " + std::string(in) + " of .").c_str()); } -inline atok_t_set_global_signal lex_attr_t_set_global_signal(const char* in, const std::function* report_error) { +inline atok_t_set_global_signal lex_attr_t_set_global_signal(const char* in, + const std::function* report_error) { unsigned int len = strlen(in); switch (len) { case 4: @@ -414,7 +448,8 @@ inline atok_t_set_global_signal lex_attr_t_set_global_signal(const char* in, con break; case 11: switch (*((triehash_uu64*)&in[0])) { - case onechar('r', 0, 64) | onechar('o', 8, 64) | onechar('u', 16, 64) | onechar('t', 24, 64) | onechar('e', 32, 64) | onechar('_', 40, 64) | onechar('m', 48, 64) | onechar('o', 56, 64): + case onechar('r', 0, 64) | onechar('o', 8, 64) | onechar('u', 16, 64) | onechar('t', 24, 64) + | onechar('e', 32, 64) | onechar('_', 40, 64) | onechar('m', 48, 64) | onechar('o', 56, 64): switch (in[8]) { case onechar('d', 0, 8): switch (in[9]) { @@ -441,7 +476,8 @@ inline atok_t_set_global_signal lex_attr_t_set_global_signal(const char* in, con break; case 12: switch (*((triehash_uu64*)&in[0])) { - case onechar('n', 0, 64) | onechar('e', 8, 64) | onechar('t', 16, 64) | onechar('w', 24, 64) | onechar('o', 32, 64) | onechar('r', 40, 64) | onechar('k', 48, 64) | onechar('_', 56, 64): + case onechar('n', 0, 64) | onechar('e', 8, 64) | onechar('t', 16, 64) | onechar('w', 24, 64) + | onechar('o', 32, 64) | onechar('r', 40, 64) | onechar('k', 48, 64) | onechar('_', 56, 64): switch (*((triehash_uu32*)&in[8])) { case onechar('n', 0, 32) | onechar('a', 8, 32) | onechar('m', 16, 32) | onechar('e', 24, 32): return atok_t_set_global_signal::NETWORK_NAME; @@ -457,17 +493,22 @@ inline atok_t_set_global_signal lex_attr_t_set_global_signal(const char* in, con default: break; } - noreturn_report(report_error, ("Found unrecognized attribute " + std::string(in) + " of .").c_str()); + noreturn_report(report_error, + ("Found unrecognized attribute " + std::string(in) + " of .").c_str()); } -inline gtok_t_global_route_constraints lex_node_t_global_route_constraints(const char* in, const std::function* report_error) { +inline gtok_t_global_route_constraints lex_node_t_global_route_constraints( + const char* in, + const std::function* report_error) { unsigned int len = strlen(in); switch (len) { case 17: switch (*((triehash_uu64*)&in[0])) { - case onechar('s', 0, 64) | onechar('e', 8, 64) | onechar('t', 16, 64) | onechar('_', 24, 64) | onechar('g', 32, 64) | onechar('l', 40, 64) | onechar('o', 48, 64) | onechar('b', 56, 64): + case onechar('s', 0, 64) | onechar('e', 8, 64) | onechar('t', 16, 64) | onechar('_', 24, 64) + | onechar('g', 32, 64) | onechar('l', 40, 64) | onechar('o', 48, 64) | onechar('b', 56, 64): switch (*((triehash_uu64*)&in[8])) { - case onechar('a', 0, 64) | onechar('l', 8, 64) | onechar('_', 16, 64) | onechar('s', 24, 64) | onechar('i', 32, 64) | onechar('g', 40, 64) | onechar('n', 48, 64) | onechar('a', 56, 64): + case onechar('a', 0, 64) | onechar('l', 8, 64) | onechar('_', 16, 64) | onechar('s', 24, 64) + | onechar('i', 32, 64) | onechar('g', 40, 64) | onechar('n', 48, 64) | onechar('a', 56, 64): switch (in[16]) { case onechar('l', 0, 8): return gtok_t_global_route_constraints::SET_GLOBAL_SIGNAL; @@ -487,15 +528,18 @@ inline gtok_t_global_route_constraints lex_node_t_global_route_constraints(const default: break; } - noreturn_report(report_error, ("Found unrecognized child " + std::string(in) + " of .").c_str()); + noreturn_report(report_error, + ("Found unrecognized child " + std::string(in) + " of .").c_str()); } -inline gtok_t_vpr_constraints lex_node_t_vpr_constraints(const char* in, const std::function* report_error) { +inline gtok_t_vpr_constraints lex_node_t_vpr_constraints(const char* in, + const std::function* report_error) { unsigned int len = strlen(in); switch (len) { case 14: switch (*((triehash_uu64*)&in[0])) { - case onechar('p', 0, 64) | onechar('a', 8, 64) | onechar('r', 16, 64) | onechar('t', 24, 64) | onechar('i', 32, 64) | onechar('t', 40, 64) | onechar('i', 48, 64) | onechar('o', 56, 64): + case onechar('p', 0, 64) | onechar('a', 8, 64) | onechar('r', 16, 64) | onechar('t', 24, 64) + | onechar('i', 32, 64) | onechar('t', 40, 64) | onechar('i', 48, 64) | onechar('o', 56, 64): switch (*((triehash_uu32*)&in[8])) { case onechar('n', 0, 32) | onechar('_', 8, 32) | onechar('l', 16, 32) | onechar('i', 24, 32): switch (in[12]) { @@ -522,11 +566,15 @@ inline gtok_t_vpr_constraints lex_node_t_vpr_constraints(const char* in, const s break; case 24: switch (*((triehash_uu64*)&in[0])) { - case onechar('g', 0, 64) | onechar('l', 8, 64) | onechar('o', 16, 64) | onechar('b', 24, 64) | onechar('a', 32, 64) | onechar('l', 40, 64) | onechar('_', 48, 64) | onechar('r', 56, 64): + case onechar('g', 0, 64) | onechar('l', 8, 64) | onechar('o', 16, 64) | onechar('b', 24, 64) + | onechar('a', 32, 64) | onechar('l', 40, 64) | onechar('_', 48, 64) | onechar('r', 56, 64): switch (*((triehash_uu64*)&in[8])) { - case onechar('o', 0, 64) | onechar('u', 8, 64) | onechar('t', 16, 64) | onechar('e', 24, 64) | onechar('_', 32, 64) | onechar('c', 40, 64) | onechar('o', 48, 64) | onechar('n', 56, 64): + case onechar('o', 0, 64) | onechar('u', 8, 64) | onechar('t', 16, 64) | onechar('e', 24, 64) + | onechar('_', 32, 64) | onechar('c', 40, 64) | onechar('o', 48, 64) | onechar('n', 56, 64): switch (*((triehash_uu64*)&in[16])) { - case onechar('s', 0, 64) | onechar('t', 8, 64) | onechar('r', 16, 64) | onechar('a', 24, 64) | onechar('i', 32, 64) | onechar('n', 40, 64) | onechar('t', 48, 64) | onechar('s', 56, 64): + case onechar('s', 0, 64) | onechar('t', 8, 64) | onechar('r', 16, 64) + | onechar('a', 24, 64) | onechar('i', 32, 64) | onechar('n', 40, 64) + | onechar('t', 48, 64) | onechar('s', 56, 64): return gtok_t_vpr_constraints::GLOBAL_ROUTE_CONSTRAINTS; break; default: @@ -546,12 +594,14 @@ inline gtok_t_vpr_constraints lex_node_t_vpr_constraints(const char* in, const s } noreturn_report(report_error, ("Found unrecognized child " + std::string(in) + " of .").c_str()); } -inline atok_t_vpr_constraints lex_attr_t_vpr_constraints(const char* in, const std::function* report_error) { +inline atok_t_vpr_constraints lex_attr_t_vpr_constraints(const char* in, + const std::function* report_error) { unsigned int len = strlen(in); switch (len) { case 9: switch (*((triehash_uu64*)&in[0])) { - case onechar('t', 0, 64) | onechar('o', 8, 64) | onechar('o', 16, 64) | onechar('l', 24, 64) | onechar('_', 32, 64) | onechar('n', 40, 64) | onechar('a', 48, 64) | onechar('m', 56, 64): + case onechar('t', 0, 64) | onechar('o', 8, 64) | onechar('o', 16, 64) | onechar('l', 24, 64) + | onechar('_', 32, 64) | onechar('n', 40, 64) | onechar('a', 48, 64) | onechar('m', 56, 64): switch (in[8]) { case onechar('e', 0, 8): return atok_t_vpr_constraints::TOOL_NAME; @@ -567,31 +617,42 @@ inline atok_t_vpr_constraints lex_attr_t_vpr_constraints(const char* in, const s default: break; } - noreturn_report(report_error, ("Found unrecognized attribute " + std::string(in) + " of .").c_str()); + noreturn_report(report_error, + ("Found unrecognized attribute " + std::string(in) + " of .").c_str()); } /** * Internal error function for xs:choice and xs:sequence validators. */ -[[noreturn]] inline void dfa_error(const char* wrong, const int* states, const char* const* lookup, int len, const std::function* report_error); +[[noreturn]] inline void dfa_error(const char* wrong, + const int* states, + const char* const* lookup, + int len, + const std::function* report_error); /** * Internal error function for xs:all validators. */ template -[[noreturn]] inline void all_error(std::bitset gstate, const char* const* lookup, const std::function* report_error); +[[noreturn]] inline void all_error(std::bitset gstate, + const char* const* lookup, + const std::function* report_error); /** * Internal error function for attribute validators. */ template -[[noreturn]] inline void attr_error(std::bitset astate, const char* const* lookup, const std::function* report_error); +[[noreturn]] inline void attr_error(std::bitset astate, + const char* const* lookup, + const std::function* report_error); /* Lookup tables for enums. */ constexpr const char* lookup_route_model_type[] = {"UXSD_INVALID", "ideal", "route", "dedicated_network"}; /* Lexers(string->token functions) for enums. */ -inline enum_route_model_type lex_enum_route_model_type(const char* in, bool throw_on_invalid, const std::function* report_error) { +inline enum_route_model_type lex_enum_route_model_type(const char* in, + bool throw_on_invalid, + const std::function* report_error) { unsigned int len = strlen(in); switch (len) { case 5: @@ -620,9 +681,11 @@ inline enum_route_model_type lex_enum_route_model_type(const char* in, bool thro break; case 17: switch (*((triehash_uu64*)&in[0])) { - case onechar('d', 0, 64) | onechar('e', 8, 64) | onechar('d', 16, 64) | onechar('i', 24, 64) | onechar('c', 32, 64) | onechar('a', 40, 64) | onechar('t', 48, 64) | onechar('e', 56, 64): + case onechar('d', 0, 64) | onechar('e', 8, 64) | onechar('d', 16, 64) | onechar('i', 24, 64) + | onechar('c', 32, 64) | onechar('a', 40, 64) | onechar('t', 48, 64) | onechar('e', 56, 64): switch (*((triehash_uu64*)&in[8])) { - case onechar('d', 0, 64) | onechar('_', 8, 64) | onechar('n', 16, 64) | onechar('e', 24, 64) | onechar('t', 32, 64) | onechar('w', 40, 64) | onechar('o', 48, 64) | onechar('r', 56, 64): + case onechar('d', 0, 64) | onechar('_', 8, 64) | onechar('n', 16, 64) | onechar('e', 24, 64) + | onechar('t', 32, 64) | onechar('w', 40, 64) | onechar('o', 48, 64) | onechar('r', 56, 64): switch (in[16]) { case onechar('k', 0, 8): return enum_route_model_type::DEDICATED_NETWORK; @@ -643,7 +706,8 @@ inline enum_route_model_type lex_enum_route_model_type(const char* in, bool thro break; } if (throw_on_invalid) - noreturn_report(report_error, ("Found unrecognized enum value " + std::string(in) + " of enum_route_model_type.").c_str()); + noreturn_report(report_error, + ("Found unrecognized enum value " + std::string(in) + " of enum_route_model_type.").c_str()); return enum_route_model_type::UXSD_INVALID; } @@ -655,14 +719,20 @@ inline int load_int(const char* in, const std::function* repo noreturn_report(report_error, ("Invalid value `" + std::string(in) + "` when loading into a int.").c_str()); return out; } -inline void load_add_region_required_attributes(const pugi::xml_node& root, int* x_high, int* x_low, int* y_high, int* y_low, const std::function* report_error) { +inline void load_add_region_required_attributes(const pugi::xml_node& root, + int* x_high, + int* x_low, + int* y_high, + int* y_low, + const std::function* report_error) { std::bitset<7> astate = 0; for (pugi::xml_attribute attr = root.first_attribute(); attr; attr = attr.next_attribute()) { atok_t_add_region in = lex_attr_t_add_region(attr.name(), report_error); if (astate[(int)in] == 0) astate[(int)in] = 1; else - noreturn_report(report_error, ("Duplicate attribute " + std::string(attr.name()) + " in .").c_str()); + noreturn_report(report_error, + ("Duplicate attribute " + std::string(attr.name()) + " in .").c_str()); switch (in) { case atok_t_add_region::LAYER_HIGH: /* Attribute layer_high set after element init */ @@ -690,17 +760,21 @@ inline void load_add_region_required_attributes(const pugi::xml_node& root, int* } } std::bitset<7> test_astate = astate | std::bitset<7>(0b0000111); - if (!test_astate.all()) attr_error(test_astate, atok_lookup_t_add_region, report_error); + if (!test_astate.all()) + attr_error(test_astate, atok_lookup_t_add_region, report_error); } -inline void load_set_global_signal_required_attributes(const pugi::xml_node& root, enum_route_model_type* route_model, const std::function* report_error) { +inline void load_set_global_signal_required_attributes(const pugi::xml_node& root, + enum_route_model_type* route_model, + const std::function* report_error) { std::bitset<3> astate = 0; for (pugi::xml_attribute attr = root.first_attribute(); attr; attr = attr.next_attribute()) { atok_t_set_global_signal in = lex_attr_t_set_global_signal(attr.name(), report_error); if (astate[(int)in] == 0) astate[(int)in] = 1; else - noreturn_report(report_error, ("Duplicate attribute " + std::string(attr.name()) + " in .").c_str()); + noreturn_report(report_error, + ("Duplicate attribute " + std::string(attr.name()) + " in .").c_str()); switch (in) { case atok_t_set_global_signal::NAME: /* Attribute name set after element init */ @@ -716,10 +790,15 @@ inline void load_set_global_signal_required_attributes(const pugi::xml_node& roo } } std::bitset<3> test_astate = astate | std::bitset<3>(0b010); - if (!test_astate.all()) attr_error(test_astate, atok_lookup_t_set_global_signal, report_error); + if (!test_astate.all()) + attr_error(test_astate, atok_lookup_t_set_global_signal, report_error); } template -inline void load_add_atom(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug) { +inline void load_add_atom(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug) { (void)root; (void)out; (void)context; @@ -743,7 +822,11 @@ inline void load_add_atom(const pugi::xml_node& root, T& out, Context& context, } template -inline void load_add_region(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug) { +inline void load_add_region(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug) { (void)root; (void)out; (void)context; @@ -791,7 +874,11 @@ constexpr int gstate_t_partition[NUM_T_PARTITION_STATES][NUM_T_PARTITION_INPUTS] {0, 0}, }; template -inline void load_partition(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug) { +inline void load_partition(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug) { (void)root; (void)out; (void)context; @@ -820,7 +907,8 @@ inline void load_partition(const pugi::xml_node& root, T& out, Context& context, gtok_t_partition in = lex_node_t_partition(node.name(), report_error); next = gstate_t_partition[state][(int)in]; if (next == -1) - dfa_error(gtok_lookup_t_partition[(int)in], gstate_t_partition[state], gtok_lookup_t_partition, 2, report_error); + dfa_error(gtok_lookup_t_partition[(int)in], gstate_t_partition[state], gtok_lookup_t_partition, 2, + report_error); state = next; switch (in) { case gtok_t_partition::ADD_ATOM: @@ -843,7 +931,8 @@ inline void load_partition(const pugi::xml_node& root, T& out, Context& context, gtok_t_partition in = lex_node_t_partition(node.name(), report_error); next = gstate_t_partition[state][(int)in]; if (next == -1) - dfa_error(gtok_lookup_t_partition[(int)in], gstate_t_partition[state], gtok_lookup_t_partition, 2, report_error); + dfa_error(gtok_lookup_t_partition[(int)in], gstate_t_partition[state], gtok_lookup_t_partition, 2, + report_error); state = next; switch (in) { case gtok_t_partition::ADD_ATOM: { @@ -860,8 +949,10 @@ inline void load_partition(const pugi::xml_node& root, T& out, Context& context, memset(&add_region_y_high, 0, sizeof(add_region_y_high)); int add_region_y_low; memset(&add_region_y_low, 0, sizeof(add_region_y_low)); - load_add_region_required_attributes(node, &add_region_x_high, &add_region_x_low, &add_region_y_high, &add_region_y_low, report_error); - auto child_context = out.add_partition_add_region(context, add_region_x_high, add_region_x_low, add_region_y_high, add_region_y_low); + load_add_region_required_attributes(node, &add_region_x_high, &add_region_x_low, &add_region_y_high, + &add_region_y_low, report_error); + auto child_context = out.add_partition_add_region(context, add_region_x_high, add_region_x_low, + add_region_y_high, add_region_y_low); load_add_region(node, out, child_context, report_error, offset_debug); out.finish_partition_add_region(child_context); } break; @@ -869,7 +960,8 @@ inline void load_partition(const pugi::xml_node& root, T& out, Context& context, break; /* Not possible. */ } } - if (state != 0) dfa_error("end of input", gstate_t_partition[state], gtok_lookup_t_partition, 2, report_error); + if (state != 0) + dfa_error("end of input", gstate_t_partition[state], gtok_lookup_t_partition, 2, report_error); } constexpr int NUM_T_PARTITION_LIST_STATES = 2; @@ -879,7 +971,11 @@ constexpr int gstate_t_partition_list[NUM_T_PARTITION_LIST_STATES][NUM_T_PARTITI {0}, }; template -inline void load_partition_list(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug) { +inline void load_partition_list(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug) { (void)root; (void)out; (void)context; @@ -899,7 +995,8 @@ inline void load_partition_list(const pugi::xml_node& root, T& out, Context& con gtok_t_partition_list in = lex_node_t_partition_list(node.name(), report_error); next = gstate_t_partition_list[state][(int)in]; if (next == -1) - dfa_error(gtok_lookup_t_partition_list[(int)in], gstate_t_partition_list[state], gtok_lookup_t_partition_list, 1, report_error); + dfa_error(gtok_lookup_t_partition_list[(int)in], gstate_t_partition_list[state], + gtok_lookup_t_partition_list, 1, report_error); state = next; switch (in) { case gtok_t_partition_list::PARTITION: @@ -918,7 +1015,8 @@ inline void load_partition_list(const pugi::xml_node& root, T& out, Context& con gtok_t_partition_list in = lex_node_t_partition_list(node.name(), report_error); next = gstate_t_partition_list[state][(int)in]; if (next == -1) - dfa_error(gtok_lookup_t_partition_list[(int)in], gstate_t_partition_list[state], gtok_lookup_t_partition_list, 1, report_error); + dfa_error(gtok_lookup_t_partition_list[(int)in], gstate_t_partition_list[state], + gtok_lookup_t_partition_list, 1, report_error); state = next; switch (in) { case gtok_t_partition_list::PARTITION: { @@ -930,11 +1028,16 @@ inline void load_partition_list(const pugi::xml_node& root, T& out, Context& con break; /* Not possible. */ } } - if (state != 0) dfa_error("end of input", gstate_t_partition_list[state], gtok_lookup_t_partition_list, 1, report_error); + if (state != 0) + dfa_error("end of input", gstate_t_partition_list[state], gtok_lookup_t_partition_list, 1, report_error); } template -inline void load_set_global_signal(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug) { +inline void load_set_global_signal(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug) { (void)root; (void)out; (void)context; @@ -965,12 +1068,18 @@ inline void load_set_global_signal(const pugi::xml_node& root, T& out, Context& constexpr int NUM_T_GLOBAL_ROUTE_CONSTRAINTS_STATES = 2; constexpr const int NUM_T_GLOBAL_ROUTE_CONSTRAINTS_INPUTS = 1; -constexpr int gstate_t_global_route_constraints[NUM_T_GLOBAL_ROUTE_CONSTRAINTS_STATES][NUM_T_GLOBAL_ROUTE_CONSTRAINTS_INPUTS] = { - {0}, - {0}, +constexpr int gstate_t_global_route_constraints[NUM_T_GLOBAL_ROUTE_CONSTRAINTS_STATES] + [NUM_T_GLOBAL_ROUTE_CONSTRAINTS_INPUTS] + = { + {0}, + {0}, }; template -inline void load_global_route_constraints(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug) { +inline void load_global_route_constraints(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug) { (void)root; (void)out; (void)context; @@ -990,7 +1099,8 @@ inline void load_global_route_constraints(const pugi::xml_node& root, T& out, Co gtok_t_global_route_constraints in = lex_node_t_global_route_constraints(node.name(), report_error); next = gstate_t_global_route_constraints[state][(int)in]; if (next == -1) - dfa_error(gtok_lookup_t_global_route_constraints[(int)in], gstate_t_global_route_constraints[state], gtok_lookup_t_global_route_constraints, 1, report_error); + dfa_error(gtok_lookup_t_global_route_constraints[(int)in], gstate_t_global_route_constraints[state], + gtok_lookup_t_global_route_constraints, 1, report_error); state = next; switch (in) { case gtok_t_global_route_constraints::SET_GLOBAL_SIGNAL: @@ -1009,14 +1119,16 @@ inline void load_global_route_constraints(const pugi::xml_node& root, T& out, Co gtok_t_global_route_constraints in = lex_node_t_global_route_constraints(node.name(), report_error); next = gstate_t_global_route_constraints[state][(int)in]; if (next == -1) - dfa_error(gtok_lookup_t_global_route_constraints[(int)in], gstate_t_global_route_constraints[state], gtok_lookup_t_global_route_constraints, 1, report_error); + dfa_error(gtok_lookup_t_global_route_constraints[(int)in], gstate_t_global_route_constraints[state], + gtok_lookup_t_global_route_constraints, 1, report_error); state = next; switch (in) { case gtok_t_global_route_constraints::SET_GLOBAL_SIGNAL: { enum_route_model_type set_global_signal_route_model; memset(&set_global_signal_route_model, 0, sizeof(set_global_signal_route_model)); load_set_global_signal_required_attributes(node, &set_global_signal_route_model, report_error); - auto child_context = out.add_global_route_constraints_set_global_signal(context, set_global_signal_route_model); + auto child_context + = out.add_global_route_constraints_set_global_signal(context, set_global_signal_route_model); load_set_global_signal(node, out, child_context, report_error, offset_debug); out.finish_global_route_constraints_set_global_signal(child_context); } break; @@ -1024,11 +1136,17 @@ inline void load_global_route_constraints(const pugi::xml_node& root, T& out, Co break; /* Not possible. */ } } - if (state != 0) dfa_error("end of input", gstate_t_global_route_constraints[state], gtok_lookup_t_global_route_constraints, 1, report_error); + if (state != 0) + dfa_error("end of input", gstate_t_global_route_constraints[state], gtok_lookup_t_global_route_constraints, 1, + report_error); } template -inline void load_vpr_constraints(const pugi::xml_node& root, T& out, Context& context, const std::function* report_error, ptrdiff_t* offset_debug) { +inline void load_vpr_constraints(const pugi::xml_node& root, + T& out, + Context& context, + const std::function* report_error, + ptrdiff_t* offset_debug) { (void)root; (void)out; (void)context; @@ -1054,7 +1172,8 @@ inline void load_vpr_constraints(const pugi::xml_node& root, T& out, Context& co if (gstate[(int)in] == 0) gstate[(int)in] = 1; else - noreturn_report(report_error, ("Duplicate element " + std::string(node.name()) + " in .").c_str()); + noreturn_report(report_error, + ("Duplicate element " + std::string(node.name()) + " in .").c_str()); switch (in) { case gtok_t_vpr_constraints::PARTITION_LIST: { auto child_context = out.init_vpr_constraints_partition_list(context); @@ -1071,7 +1190,8 @@ inline void load_vpr_constraints(const pugi::xml_node& root, T& out, Context& co } } std::bitset<2> test_gstate = gstate | std::bitset<2>(0b11); - if (!test_gstate.all()) all_error(test_gstate, gtok_lookup_t_vpr_constraints, report_error); + if (!test_gstate.all()) + all_error(test_gstate, gtok_lookup_t_vpr_constraints, report_error); } /* Internal writing functions, which uxsdcxx uses to write out a class. */ @@ -1136,7 +1256,8 @@ inline void write_global_route_constraints(T& in, std::ostream& os, Context& con os << " name=\"" << in.get_set_global_signal_name(child_context) << "\""; if ((bool)in.get_set_global_signal_network_name(child_context)) os << " network_name=\"" << in.get_set_global_signal_network_name(child_context) << "\""; - os << " route_model=\"" << lookup_route_model_type[(int)in.get_set_global_signal_route_model(child_context)] << "\""; + os << " route_model=\"" << lookup_route_model_type[(int)in.get_set_global_signal_route_model(child_context)] + << "\""; os << "/>\n"; } } @@ -1165,10 +1286,15 @@ inline void write_vpr_constraints(T& in, std::ostream& os, Context& context) { } } -inline void dfa_error(const char* wrong, const int* states, const char* const* lookup, int len, const std::function* report_error) { +inline void dfa_error(const char* wrong, + const int* states, + const char* const* lookup, + int len, + const std::function* report_error) { std::vector expected; for (int i = 0; i < len; i++) { - if (states[i] != -1) expected.push_back(lookup[i]); + if (states[i] != -1) + expected.push_back(lookup[i]); } std::string expected_or = expected[0]; @@ -1179,10 +1305,13 @@ inline void dfa_error(const char* wrong, const int* states, const char* const* l } template -inline void all_error(std::bitset gstate, const char* const* lookup, const std::function* report_error) { +inline void all_error(std::bitset gstate, + const char* const* lookup, + const std::function* report_error) { std::vector missing; for (unsigned int i = 0; i < N; i++) { - if (gstate[i] == 0) missing.push_back(lookup[i]); + if (gstate[i] == 0) + missing.push_back(lookup[i]); } std::string missing_and = missing[0]; @@ -1193,10 +1322,13 @@ inline void all_error(std::bitset gstate, const char* const* lookup, const st } template -inline void attr_error(std::bitset astate, const char* const* lookup, const std::function* report_error) { +inline void attr_error(std::bitset astate, + const char* const* lookup, + const std::function* report_error) { std::vector missing; for (unsigned int i = 0; i < N; i++) { - if (astate[i] == 0) missing.push_back(lookup[i]); + if (astate[i] == 0) + missing.push_back(lookup[i]); } std::string missing_and = missing[0]; diff --git a/vpr/src/base/gen/vpr_constraints_uxsdcxx_interface.h b/vpr/src/base/gen/vpr_constraints_uxsdcxx_interface.h index 2c3231b70a5..ba3856d5176 100644 --- a/vpr/src/base/gen/vpr_constraints_uxsdcxx_interface.h +++ b/vpr/src/base/gen/vpr_constraints_uxsdcxx_interface.h @@ -20,10 +20,7 @@ namespace uxsd { /* Enum tokens generated from XSD enumerations. */ -enum class enum_route_model_type { UXSD_INVALID = 0, - IDEAL, - ROUTE, - DEDICATED_NETWORK }; +enum class enum_route_model_type { UXSD_INVALID = 0, IDEAL, ROUTE, DEDICATED_NETWORK }; /* Base class for the schema. */ struct DefaultVprConstraintsContextTypes { @@ -58,7 +55,9 @@ class VprConstraintsBase { * */ virtual inline const char* get_add_atom_name_pattern(typename ContextTypes::AddAtomReadContext& ctx) = 0; - virtual inline void set_add_atom_name_pattern(const char* name_pattern, typename ContextTypes::AddAtomWriteContext& ctx) = 0; + virtual inline void set_add_atom_name_pattern(const char* name_pattern, + typename ContextTypes::AddAtomWriteContext& ctx) + = 0; /** Generated for complex type "add_region": * @@ -93,16 +92,32 @@ class VprConstraintsBase { */ virtual inline const char* get_partition_name(typename ContextTypes::PartitionReadContext& ctx) = 0; virtual inline void set_partition_name(const char* name, typename ContextTypes::PartitionWriteContext& ctx) = 0; - virtual inline void preallocate_partition_add_atom(typename ContextTypes::PartitionWriteContext& ctx, size_t size) = 0; - virtual inline typename ContextTypes::AddAtomWriteContext add_partition_add_atom(typename ContextTypes::PartitionWriteContext& ctx) = 0; + virtual inline void preallocate_partition_add_atom(typename ContextTypes::PartitionWriteContext& ctx, size_t size) + = 0; + virtual inline typename ContextTypes::AddAtomWriteContext add_partition_add_atom( + typename ContextTypes::PartitionWriteContext& ctx) + = 0; virtual inline void finish_partition_add_atom(typename ContextTypes::AddAtomWriteContext& ctx) = 0; virtual inline size_t num_partition_add_atom(typename ContextTypes::PartitionReadContext& ctx) = 0; - virtual inline typename ContextTypes::AddAtomReadContext get_partition_add_atom(int n, typename ContextTypes::PartitionReadContext& ctx) = 0; - virtual inline void preallocate_partition_add_region(typename ContextTypes::PartitionWriteContext& ctx, size_t size) = 0; - virtual inline typename ContextTypes::AddRegionWriteContext add_partition_add_region(typename ContextTypes::PartitionWriteContext& ctx, int x_high, int x_low, int y_high, int y_low) = 0; + virtual inline typename ContextTypes::AddAtomReadContext get_partition_add_atom( + int n, + typename ContextTypes::PartitionReadContext& ctx) + = 0; + virtual inline void preallocate_partition_add_region(typename ContextTypes::PartitionWriteContext& ctx, size_t size) + = 0; + virtual inline typename ContextTypes::AddRegionWriteContext add_partition_add_region( + typename ContextTypes::PartitionWriteContext& ctx, + int x_high, + int x_low, + int y_high, + int y_low) + = 0; virtual inline void finish_partition_add_region(typename ContextTypes::AddRegionWriteContext& ctx) = 0; virtual inline size_t num_partition_add_region(typename ContextTypes::PartitionReadContext& ctx) = 0; - virtual inline typename ContextTypes::AddRegionReadContext get_partition_add_region(int n, typename ContextTypes::PartitionReadContext& ctx) = 0; + virtual inline typename ContextTypes::AddRegionReadContext get_partition_add_region( + int n, + typename ContextTypes::PartitionReadContext& ctx) + = 0; /** Generated for complex type "partition_list": * @@ -111,11 +126,18 @@ class VprConstraintsBase { * * */ - virtual inline void preallocate_partition_list_partition(typename ContextTypes::PartitionListWriteContext& ctx, size_t size) = 0; - virtual inline typename ContextTypes::PartitionWriteContext add_partition_list_partition(typename ContextTypes::PartitionListWriteContext& ctx) = 0; + virtual inline void preallocate_partition_list_partition(typename ContextTypes::PartitionListWriteContext& ctx, + size_t size) + = 0; + virtual inline typename ContextTypes::PartitionWriteContext add_partition_list_partition( + typename ContextTypes::PartitionListWriteContext& ctx) + = 0; virtual inline void finish_partition_list_partition(typename ContextTypes::PartitionWriteContext& ctx) = 0; virtual inline size_t num_partition_list_partition(typename ContextTypes::PartitionListReadContext& ctx) = 0; - virtual inline typename ContextTypes::PartitionReadContext get_partition_list_partition(int n, typename ContextTypes::PartitionListReadContext& ctx) = 0; + virtual inline typename ContextTypes::PartitionReadContext get_partition_list_partition( + int n, + typename ContextTypes::PartitionListReadContext& ctx) + = 0; /** Generated for complex type "set_global_signal": * @@ -125,10 +147,18 @@ class VprConstraintsBase { * */ virtual inline const char* get_set_global_signal_name(typename ContextTypes::SetGlobalSignalReadContext& ctx) = 0; - virtual inline void set_set_global_signal_name(const char* name, typename ContextTypes::SetGlobalSignalWriteContext& ctx) = 0; - virtual inline const char* get_set_global_signal_network_name(typename ContextTypes::SetGlobalSignalReadContext& ctx) = 0; - virtual inline void set_set_global_signal_network_name(const char* network_name, typename ContextTypes::SetGlobalSignalWriteContext& ctx) = 0; - virtual inline enum_route_model_type get_set_global_signal_route_model(typename ContextTypes::SetGlobalSignalReadContext& ctx) = 0; + virtual inline void set_set_global_signal_name(const char* name, + typename ContextTypes::SetGlobalSignalWriteContext& ctx) + = 0; + virtual inline const char* get_set_global_signal_network_name( + typename ContextTypes::SetGlobalSignalReadContext& ctx) + = 0; + virtual inline void set_set_global_signal_network_name(const char* network_name, + typename ContextTypes::SetGlobalSignalWriteContext& ctx) + = 0; + virtual inline enum_route_model_type get_set_global_signal_route_model( + typename ContextTypes::SetGlobalSignalReadContext& ctx) + = 0; /** Generated for complex type "global_route_constraints": * @@ -137,11 +167,24 @@ class VprConstraintsBase { * * */ - virtual inline void preallocate_global_route_constraints_set_global_signal(typename ContextTypes::GlobalRouteConstraintsWriteContext& ctx, size_t size) = 0; - virtual inline typename ContextTypes::SetGlobalSignalWriteContext add_global_route_constraints_set_global_signal(typename ContextTypes::GlobalRouteConstraintsWriteContext& ctx, enum_route_model_type route_model) = 0; - virtual inline void finish_global_route_constraints_set_global_signal(typename ContextTypes::SetGlobalSignalWriteContext& ctx) = 0; - virtual inline size_t num_global_route_constraints_set_global_signal(typename ContextTypes::GlobalRouteConstraintsReadContext& ctx) = 0; - virtual inline typename ContextTypes::SetGlobalSignalReadContext get_global_route_constraints_set_global_signal(int n, typename ContextTypes::GlobalRouteConstraintsReadContext& ctx) = 0; + virtual inline void preallocate_global_route_constraints_set_global_signal( + typename ContextTypes::GlobalRouteConstraintsWriteContext& ctx, + size_t size) + = 0; + virtual inline typename ContextTypes::SetGlobalSignalWriteContext add_global_route_constraints_set_global_signal( + typename ContextTypes::GlobalRouteConstraintsWriteContext& ctx, + enum_route_model_type route_model) + = 0; + virtual inline void finish_global_route_constraints_set_global_signal( + typename ContextTypes::SetGlobalSignalWriteContext& ctx) + = 0; + virtual inline size_t num_global_route_constraints_set_global_signal( + typename ContextTypes::GlobalRouteConstraintsReadContext& ctx) + = 0; + virtual inline typename ContextTypes::SetGlobalSignalReadContext get_global_route_constraints_set_global_signal( + int n, + typename ContextTypes::GlobalRouteConstraintsReadContext& ctx) + = 0; /** Generated for complex type "vpr_constraints": * @@ -153,15 +196,30 @@ class VprConstraintsBase { * */ virtual inline const char* get_vpr_constraints_tool_name(typename ContextTypes::VprConstraintsReadContext& ctx) = 0; - virtual inline void set_vpr_constraints_tool_name(const char* tool_name, typename ContextTypes::VprConstraintsWriteContext& ctx) = 0; - virtual inline typename ContextTypes::PartitionListWriteContext init_vpr_constraints_partition_list(typename ContextTypes::VprConstraintsWriteContext& ctx) = 0; - virtual inline void finish_vpr_constraints_partition_list(typename ContextTypes::PartitionListWriteContext& ctx) = 0; - virtual inline typename ContextTypes::PartitionListReadContext get_vpr_constraints_partition_list(typename ContextTypes::VprConstraintsReadContext& ctx) = 0; + virtual inline void set_vpr_constraints_tool_name(const char* tool_name, + typename ContextTypes::VprConstraintsWriteContext& ctx) + = 0; + virtual inline typename ContextTypes::PartitionListWriteContext init_vpr_constraints_partition_list( + typename ContextTypes::VprConstraintsWriteContext& ctx) + = 0; + virtual inline void finish_vpr_constraints_partition_list(typename ContextTypes::PartitionListWriteContext& ctx) + = 0; + virtual inline typename ContextTypes::PartitionListReadContext get_vpr_constraints_partition_list( + typename ContextTypes::VprConstraintsReadContext& ctx) + = 0; virtual inline bool has_vpr_constraints_partition_list(typename ContextTypes::VprConstraintsReadContext& ctx) = 0; - virtual inline typename ContextTypes::GlobalRouteConstraintsWriteContext init_vpr_constraints_global_route_constraints(typename ContextTypes::VprConstraintsWriteContext& ctx) = 0; - virtual inline void finish_vpr_constraints_global_route_constraints(typename ContextTypes::GlobalRouteConstraintsWriteContext& ctx) = 0; - virtual inline typename ContextTypes::GlobalRouteConstraintsReadContext get_vpr_constraints_global_route_constraints(typename ContextTypes::VprConstraintsReadContext& ctx) = 0; - virtual inline bool has_vpr_constraints_global_route_constraints(typename ContextTypes::VprConstraintsReadContext& ctx) = 0; + virtual inline typename ContextTypes::GlobalRouteConstraintsWriteContext + init_vpr_constraints_global_route_constraints(typename ContextTypes::VprConstraintsWriteContext& ctx) + = 0; + virtual inline void finish_vpr_constraints_global_route_constraints( + typename ContextTypes::GlobalRouteConstraintsWriteContext& ctx) + = 0; + virtual inline typename ContextTypes::GlobalRouteConstraintsReadContext + get_vpr_constraints_global_route_constraints(typename ContextTypes::VprConstraintsReadContext& ctx) + = 0; + virtual inline bool has_vpr_constraints_global_route_constraints( + typename ContextTypes::VprConstraintsReadContext& ctx) + = 0; }; } /* namespace uxsd */ diff --git a/vpr/src/base/grid_block.cpp b/vpr/src/base/grid_block.cpp index 9053830473e..bef47a51617 100644 --- a/vpr/src/base/grid_block.cpp +++ b/vpr/src/base/grid_block.cpp @@ -55,5 +55,3 @@ int GridBlock::decrement_usage(const t_physical_tile_loc& loc) { return updated_usage; } - - diff --git a/vpr/src/base/grid_block.h b/vpr/src/base/grid_block.h index 12e934f0af9..eb1dfed67c5 100644 --- a/vpr/src/base/grid_block.h +++ b/vpr/src/base/grid_block.h @@ -25,18 +25,14 @@ struct t_grid_blocks { * occupied by a block at this grid location. The subtile id serves * as the z-dimensional offset in the grid indexing. */ - inline bool subtile_empty(size_t isubtile) const { - return blocks[isubtile] == ClusterBlockId::INVALID(); - } + inline bool subtile_empty(size_t isubtile) const { return blocks[isubtile] == ClusterBlockId::INVALID(); } }; class GridBlock { public: GridBlock() = default; - GridBlock(size_t width, size_t height, size_t layers) { - grid_blocks_.resize({layers, width, height}); - } + GridBlock(size_t width, size_t height, size_t layers) { grid_blocks_.resize({layers, width, height}); } inline void initialized_grid_block_at_location(const t_physical_tile_loc& loc, int num_sub_tiles) { grid_blocks_[loc.layer_num][loc.x][loc.y].blocks.resize(num_sub_tiles, ClusterBlockId::INVALID()); @@ -66,9 +62,7 @@ class GridBlock { return grid_blocks_[loc.layer_num][loc.x][loc.y].subtile_empty(sub_tile); } - inline void clear() { - grid_blocks_.clear(); - } + inline void clear() { grid_blocks_.clear(); } /** * @brief Initialize usage to 0 and blockID to INVALID for all grid block locations diff --git a/vpr/src/base/load_flat_place.cpp b/vpr/src/base/load_flat_place.cpp index f13b9f35167..87a83446ce8 100644 --- a/vpr/src/base/load_flat_place.cpp +++ b/vpr/src/base/load_flat_place.cpp @@ -2,13 +2,10 @@ #include "load_flat_place.h" #include "clustered_netlist_utils.h" - /* @brief Prints flat placement file entries for the atoms in one placed cluster. */ -static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, - std::vector& atoms); +static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, std::vector& atoms); -static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, - std::vector& atoms) { +static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, std::vector& atoms) { const auto& atom_ctx = g_vpr_ctx.atom(); const auto& block_locs = g_vpr_ctx.placement().block_locs(); @@ -17,18 +14,15 @@ static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, for (AtomBlockId atom : atoms) { t_pb_graph_node* atom_pbgn = atom_ctx.lookup.atom_pb(atom)->pb_graph_node; - fprintf(fp, "%s %d %d %d %d #%zu %s\n", atom_ctx.nlist.block_name(atom).c_str(), - loc.x, loc.y, loc.sub_tile, - atom_pbgn->flat_site_index, - bnum, - atom_pbgn->pb_type->name); + fprintf(fp, "%s %d %d %d %d #%zu %s\n", atom_ctx.nlist.block_name(atom).c_str(), loc.x, loc.y, loc.sub_tile, + atom_pbgn->flat_site_index, bnum, atom_pbgn->pb_type->name); } } /* prints a flat placement file */ void print_flat_placement(const char* flat_place_file) { const auto& block_locs = g_vpr_ctx.placement().block_locs(); - + FILE* fp; ClusterAtomsLookup atoms_lookup; @@ -42,7 +36,6 @@ void print_flat_placement(const char* flat_place_file) { } fclose(fp); } - } /* ingests and legalizes a flat placement file */ diff --git a/vpr/src/base/netlist.h b/vpr/src/base/netlist.h index 0eb0cb536b6..a738756e960 100644 --- a/vpr/src/base/netlist.h +++ b/vpr/src/base/netlist.h @@ -443,7 +443,10 @@ class NetlistIdRemapper { vtr::vector_map net_id_map_; }; -template +template class Netlist { public: //Public Types typedef typename vtr::vector_map::const_iterator block_iterator; @@ -926,7 +929,11 @@ class Netlist { * @param pin_type The type of the pin (driver/sink) * @param is_const Indicates whether the pin holds a constant value (e. g. vcc/gnd) */ - PinId create_pin(const PortId port_id, BitIndex port_bit, const NetId net_id, const PinType pin_type, bool is_const = false); + PinId create_pin(const PortId port_id, + BitIndex port_bit, + const NetId net_id, + const PinType pin_type, + bool is_const = false); /** * @brief Create an empty, or return an existing net in the netlist @@ -1096,9 +1103,12 @@ class Netlist { virtual void remove_pin_impl(const PinId /*pin_id*/) {} virtual void remove_net_impl(const NetId /*net_id*/) {} - virtual void rebuild_block_refs_impl(const vtr::vector_map& /*pin_id_map*/, const vtr::vector_map& /*port_id_map*/) {} - virtual void rebuild_port_refs_impl(const vtr::vector_map& /*block_id_map*/, const vtr::vector_map& /*pin_id_map*/) {} - virtual void rebuild_pin_refs_impl(const vtr::vector_map& /*port_id_map*/, const vtr::vector_map& /*net_id_map*/) {} + virtual void rebuild_block_refs_impl(const vtr::vector_map& /*pin_id_map*/, + const vtr::vector_map& /*port_id_map*/) {} + virtual void rebuild_port_refs_impl(const vtr::vector_map& /*block_id_map*/, + const vtr::vector_map& /*pin_id_map*/) {} + virtual void rebuild_pin_refs_impl(const vtr::vector_map& /*port_id_map*/, + const vtr::vector_map& /*net_id_map*/) {} virtual void rebuild_net_refs_impl(const vtr::vector_map& /*pin_id_map*/) {} protected: diff --git a/vpr/src/base/netlist.tpp b/vpr/src/base/netlist.tpp index 3987670aa63..5ecd978c863 100644 --- a/vpr/src/base/netlist.tpp +++ b/vpr/src/base/netlist.tpp @@ -88,7 +88,8 @@ void Netlist::print_stats() const { VTR_LOG("Ports %zu capacity/size: %.2f\n", port_ids_.size(), float(port_ids_.capacity()) / port_ids_.size()); VTR_LOG("Pins %zu capacity/size: %.2f\n", pin_ids_.size(), float(pin_ids_.capacity()) / pin_ids_.size()); VTR_LOG("Nets %zu capacity/size: %.2f\n", net_ids_.size(), float(net_ids_.capacity()) / net_ids_.size()); - VTR_LOG("Strings %zu capacity/size: %.2f\n", string_ids_.size(), float(string_ids_.capacity()) / string_ids_.size()); + VTR_LOG("Strings %zu capacity/size: %.2f\n", string_ids_.size(), + float(string_ids_.capacity()) / string_ids_.size()); } /* @@ -110,28 +111,32 @@ bool Netlist::block_is_combinational(const BlockI } template -typename Netlist::attr_range Netlist::block_attrs(const BlockId blk_id) const { +typename Netlist::attr_range Netlist::block_attrs( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); return vtr::make_range(block_attrs_[blk_id].begin(), block_attrs_[blk_id].end()); } template -typename Netlist::param_range Netlist::block_params(const BlockId blk_id) const { +typename Netlist::param_range Netlist::block_params( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); return vtr::make_range(block_params_[blk_id].begin(), block_params_[blk_id].end()); } template -typename Netlist::pin_range Netlist::block_pins(const BlockId blk_id) const { +typename Netlist::pin_range Netlist::block_pins( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); return vtr::make_range(block_pins_[blk_id].begin(), block_pins_[blk_id].end()); } template -typename Netlist::pin_range Netlist::block_input_pins(const BlockId blk_id) const { +typename Netlist::pin_range Netlist::block_input_pins( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); auto begin = block_pins_[blk_id].begin(); @@ -142,7 +147,8 @@ typename Netlist::pin_range Netlist -typename Netlist::pin_range Netlist::block_output_pins(const BlockId blk_id) const { +typename Netlist::pin_range Netlist::block_output_pins( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); auto begin = block_pins_[blk_id].begin() + block_num_input_pins_[blk_id]; @@ -153,12 +159,11 @@ typename Netlist::pin_range Netlist -typename Netlist::pin_range Netlist::block_clock_pins(const BlockId blk_id) const { +typename Netlist::pin_range Netlist::block_clock_pins( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); - auto begin = block_pins_[blk_id].begin() - + block_num_input_pins_[blk_id] - + block_num_output_pins_[blk_id]; + auto begin = block_pins_[blk_id].begin() + block_num_input_pins_[blk_id] + block_num_output_pins_[blk_id]; auto end = begin + block_num_clock_pins_[blk_id]; @@ -168,14 +173,16 @@ typename Netlist::pin_range Netlist -typename Netlist::port_range Netlist::block_ports(const BlockId blk_id) const { +typename Netlist::port_range Netlist::block_ports( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); return vtr::make_range(block_ports_[blk_id].begin(), block_ports_[blk_id].end()); } template -typename Netlist::port_range Netlist::block_input_ports(const BlockId blk_id) const { +typename Netlist::port_range Netlist::block_input_ports( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); auto begin = block_ports_[blk_id].begin(); @@ -186,7 +193,8 @@ typename Netlist::port_range Netlist -typename Netlist::port_range Netlist::block_output_ports(const BlockId blk_id) const { +typename Netlist::port_range Netlist::block_output_ports( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); auto begin = block_ports_[blk_id].begin() + block_num_input_ports_[blk_id]; @@ -197,12 +205,11 @@ typename Netlist::port_range Netlist -typename Netlist::port_range Netlist::block_clock_ports(const BlockId blk_id) const { +typename Netlist::port_range Netlist::block_clock_ports( + const BlockId blk_id) const { VTR_ASSERT_SAFE(valid_block_id(blk_id)); - auto begin = block_ports_[blk_id].begin() - + block_num_input_ports_[blk_id] - + block_num_output_ports_[blk_id]; + auto begin = block_ports_[blk_id].begin() + block_num_input_ports_[blk_id] + block_num_output_ports_[blk_id]; auto end = begin + block_num_clock_ports_[blk_id]; @@ -232,7 +239,8 @@ BlockId Netlist::port_block(const PortId port_id) } template -typename Netlist::pin_range Netlist::port_pins(const PortId port_id) const { +typename Netlist::pin_range Netlist::port_pins( + const PortId port_id) const { VTR_ASSERT_SAFE(valid_port_id(port_id)); return vtr::make_range(port_pins_[port_id].begin(), port_pins_[port_id].end()); @@ -369,7 +377,8 @@ const std::string& Netlist::net_name(const NetId } template -typename Netlist::pin_range Netlist::net_pins(const NetId net_id) const { +typename Netlist::pin_range Netlist::net_pins( + const NetId net_id) const { VTR_ASSERT_SAFE(valid_net_id(net_id)); return vtr::make_range(net_pins_[net_id].begin(), net_pins_[net_id].end()); @@ -378,7 +387,8 @@ typename Netlist::pin_range Netlist PinId Netlist::net_pin(const NetId net_id, int net_pin_index) const { VTR_ASSERT_SAFE(valid_net_id(net_id)); - VTR_ASSERT_SAFE_MSG(net_pin_index >= 0 && size_t(net_pin_index) < net_pins_[net_id].size(), "Pin index must be in range"); + VTR_ASSERT_SAFE_MSG(net_pin_index >= 0 && size_t(net_pin_index) < net_pins_[net_id].size(), + "Pin index must be in range"); return net_pins_[net_id][net_pin_index]; } @@ -411,7 +421,8 @@ BlockId Netlist::net_driver_block(const NetId net } template -typename Netlist::pin_range Netlist::net_sinks(const NetId net_id) const { +typename Netlist::pin_range Netlist::net_sinks( + const NetId net_id) const { VTR_ASSERT_SAFE(valid_net_id(net_id)); return vtr::make_range(++net_pins_[net_id].begin(), net_pins_[net_id].end()); @@ -520,9 +531,7 @@ PinId Netlist::find_pin(const PortId port_id, Bit //Pins are stored in ascending order of bit index, //so we can binary search for the specific bit - auto port_bit_cmp = [&](const PinId pin_id, BitIndex bit_index) { - return pin_port_bit(pin_id) < bit_index; - }; + auto port_bit_cmp = [&](const PinId pin_id, BitIndex bit_index) { return pin_port_bit(pin_id) < bit_index; }; auto pins_rng = port_pins(port_id); @@ -697,7 +706,10 @@ BlockId Netlist::create_block(const std::string n } template -PortId Netlist::create_port(const BlockId blk_id, const std::string name, BitIndex width, PortType type) { +PortId Netlist::create_port(const BlockId blk_id, + const std::string name, + BitIndex width, + PortType type) { //Check pre-conditions VTR_ASSERT_MSG(valid_block_id(blk_id), "Valid block id"); @@ -728,7 +740,11 @@ PortId Netlist::create_port(const BlockId blk_id, } template -PinId Netlist::create_pin(const PortId port_id, BitIndex port_bit, const NetId net_id, const PinType type, bool is_const) { +PinId Netlist::create_pin(const PortId port_id, + BitIndex port_bit, + const NetId net_id, + const PinType type, + bool is_const) { //Check pre-conditions (valid ids) VTR_ASSERT_MSG(valid_port_id(port_id), "Valid port id"); VTR_ASSERT_MSG(valid_port_bit(port_id, port_bit), "Valid port bit"); @@ -827,9 +843,7 @@ NetId Netlist::add_net(const std::string name, Pi //Set the driver and sinks of the net auto& dest_pins = net_pins_[net_id]; dest_pins[0] = driver; - dest_pins.insert(dest_pins.end(), - std::make_move_iterator(sinks.begin()), - std::make_move_iterator(sinks.end())); + dest_pins.insert(dest_pins.end(), std::make_move_iterator(sinks.begin()), std::make_move_iterator(sinks.end())); //Associate each pin with the net int net_index = 0; @@ -854,8 +868,9 @@ template void Netlist::set_pin_net(const PinId pin, PinType type, const NetId net) { VTR_ASSERT(valid_pin_id(pin)); - VTR_ASSERT((type == PinType::DRIVER && pin_port_type(pin) == PortType::OUTPUT) - || (type == PinType::SINK && (pin_port_type(pin) == PortType::INPUT || pin_port_type(pin) == PortType::CLOCK))); + VTR_ASSERT( + (type == PinType::DRIVER && pin_port_type(pin) == PortType::OUTPUT) + || (type == PinType::SINK && (pin_port_type(pin) == PortType::INPUT || pin_port_type(pin) == PortType::CLOCK))); NetId orig_net = pin_net(pin); if (orig_net) { @@ -881,9 +896,7 @@ void Netlist::set_block_name(const BlockId blk_id BlockId existing_blk_id = find_block(new_name); if (existing_blk_id) { VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Can not re-name block '%s' to '%s' (a block named '%s' already exists).", - block_name(blk_id).c_str(), - new_name.c_str(), - new_name.c_str()); + block_name(blk_id).c_str(), new_name.c_str(), new_name.c_str()); } //Remove old name-look-up @@ -901,14 +914,18 @@ void Netlist::set_block_name(const BlockId blk_id } template -void Netlist::set_block_attr(const BlockId blk_id, const std::string& name, const std::string& value) { +void Netlist::set_block_attr(const BlockId blk_id, + const std::string& name, + const std::string& value) { VTR_ASSERT(valid_block_id(blk_id)); block_attrs_[blk_id][name] = value; } template -void Netlist::set_block_param(const BlockId blk_id, const std::string& name, const std::string& value) { +void Netlist::set_block_param(const BlockId blk_id, + const std::string& name, + const std::string& value) { VTR_ASSERT(valid_block_id(blk_id)); block_params_[blk_id][name] = value; @@ -936,11 +953,11 @@ void Netlist::merge_nets(const NetId driver_net, //Sink net must not have a driver pin PinId sink_driver = net_driver(sink_net); if (sink_driver) { - VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Can not merge nets '%s' and '%s' (sink net '%s' should have no driver, but is driven by pin '%s')", - net_name(driver_net).c_str(), - net_name(sink_net).c_str(), - net_name(sink_net).c_str(), - pin_name(sink_driver).c_str()); + VPR_FATAL_ERROR( + VPR_ERROR_NETLIST, + "Can not merge nets '%s' and '%s' (sink net '%s' should have no driver, but is driven by pin '%s')", + net_name(driver_net).c_str(), net_name(sink_net).c_str(), net_name(sink_net).c_str(), + pin_name(sink_driver).c_str()); } //We allow the driver net to (potentially) have no driver yet, @@ -1092,7 +1109,8 @@ void Netlist::remove_net_pin(const NetId net_id, * */ template -typename Netlist::IdRemapper Netlist::remove_and_compress() { +typename Netlist::IdRemapper +Netlist::remove_and_compress() { remove_unused(); return compress(); } @@ -1146,9 +1164,7 @@ void Netlist::remove_unused() { found_unused = false; //Nets with no connected pins for (auto net_id : net_ids_) { - if (net_id - && !net_driver(net_id) - && net_sinks(net_id).size() == 0) { + if (net_id && !net_driver(net_id) && net_sinks(net_id).size() == 0) { remove_net(net_id); found_unused = true; } @@ -1267,7 +1283,8 @@ void Netlist::clean_nets(const vtr::vector_map::rebuild_block_refs(const vtr::vecto block_num_clock_pins_[blk_id] = num_clock_pins; VTR_ASSERT_SAFE_MSG(all_valid(pin_collection), "All Ids should be valid"); - VTR_ASSERT(pin_collection.size() == size_t(block_num_input_pins_[blk_id] + block_num_output_pins_[blk_id] + block_num_clock_pins_[blk_id])); + VTR_ASSERT( + pin_collection.size() + == size_t(block_num_input_pins_[blk_id] + block_num_output_pins_[blk_id] + block_num_clock_pins_[blk_id])); //Similarily for ports size_t num_input_ports = count_valid_refs(block_input_ports(blk_id), port_id_map); @@ -1337,7 +1356,9 @@ void Netlist::rebuild_block_refs(const vtr::vecto block_num_clock_ports_[blk_id] = num_clock_ports; VTR_ASSERT_SAFE_MSG(all_valid(blk_ports), "All Ids should be valid"); - VTR_ASSERT(blk_ports.size() == size_t(block_num_input_ports_[blk_id] + block_num_output_ports_[blk_id] + block_num_clock_ports_[blk_id])); + VTR_ASSERT(blk_ports.size() + == size_t(block_num_input_ports_[blk_id] + block_num_output_ports_[blk_id] + + block_num_clock_ports_[blk_id])); } rebuild_block_refs_impl(pin_id_map, port_id_map); @@ -1475,9 +1496,7 @@ void Netlist::shrink_to_fit() { */ template bool Netlist::valid_block_id(BlockId block_id) const { - if (block_id == BlockId::INVALID() - || !block_ids_.contains(block_id) - || block_ids_[block_id] != block_id) { + if (block_id == BlockId::INVALID() || !block_ids_.contains(block_id) || block_ids_[block_id] != block_id) { return false; } return true; @@ -1485,9 +1504,7 @@ bool Netlist::valid_block_id(BlockId block_id) co template bool Netlist::valid_port_id(PortId port_id) const { - if (port_id == PortId::INVALID() - || !port_ids_.contains(port_id) - || port_ids_[port_id] != port_id) { + if (port_id == PortId::INVALID() || !port_ids_.contains(port_id) || port_ids_[port_id] != port_id) { return false; } return true; @@ -1504,9 +1521,7 @@ bool Netlist::valid_port_bit(PortId port_id, BitI template bool Netlist::valid_pin_id(PinId pin_id) const { - if (pin_id == PinId::INVALID() - || !pin_ids_.contains(pin_id) - || pin_ids_[pin_id] != pin_id) { + if (pin_id == PinId::INVALID() || !pin_ids_.contains(pin_id) || pin_ids_[pin_id] != pin_id) { return false; } return true; @@ -1514,19 +1529,16 @@ bool Netlist::valid_pin_id(PinId pin_id) const { template bool Netlist::valid_net_id(NetId net_id) const { - if (net_id == NetId::INVALID() - || !net_ids_.contains(net_id) - || net_ids_[net_id] != net_id) { + if (net_id == NetId::INVALID() || !net_ids_.contains(net_id) || net_ids_[net_id] != net_id) { return false; } return true; } template -bool Netlist::valid_string_id(typename Netlist::StringId string_id) const { - if (string_id == StringId::INVALID() - || !string_ids_.contains(string_id) - || string_ids_[string_id] != string_id) { +bool Netlist::valid_string_id( + typename Netlist::StringId string_id) const { + if (string_id == StringId::INVALID() || !string_ids_.contains(string_id) || string_ids_[string_id] != string_id) { return false; } return true; @@ -1535,18 +1547,12 @@ bool Netlist::valid_string_id(typename Netlist bool Netlist::validate_block_sizes() const { size_t num_blocks = blocks().size(); - if (block_names_.size() != num_blocks - || block_pins_.size() != num_blocks - || block_num_input_pins_.size() != num_blocks - || block_num_output_pins_.size() != num_blocks - || block_num_clock_pins_.size() != num_blocks - || block_ports_.size() != num_blocks - || block_num_input_ports_.size() != num_blocks - || block_num_output_ports_.size() != num_blocks - || block_num_clock_ports_.size() != num_blocks - || block_attrs_.size() != num_blocks - || block_params_.size() != num_blocks - || !validate_block_sizes_impl(num_blocks)) { + if (block_names_.size() != num_blocks || block_pins_.size() != num_blocks + || block_num_input_pins_.size() != num_blocks || block_num_output_pins_.size() != num_blocks + || block_num_clock_pins_.size() != num_blocks || block_ports_.size() != num_blocks + || block_num_input_ports_.size() != num_blocks || block_num_output_ports_.size() != num_blocks + || block_num_clock_ports_.size() != num_blocks || block_attrs_.size() != num_blocks + || block_params_.size() != num_blocks || !validate_block_sizes_impl(num_blocks)) { VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Inconsistent block data sizes"); } return true; @@ -1555,9 +1561,7 @@ bool Netlist::validate_block_sizes() const { template bool Netlist::validate_port_sizes() const { size_t num_ports = ports().size(); - if (port_names_.size() != num_ports - || port_blocks_.size() != num_ports - || port_pins_.size() != num_ports + if (port_names_.size() != num_ports || port_blocks_.size() != num_ports || port_pins_.size() != num_ports || !validate_port_sizes_impl(num_ports)) { VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Inconsistent port data sizes"); } @@ -1567,11 +1571,8 @@ bool Netlist::validate_port_sizes() const { template bool Netlist::validate_pin_sizes() const { size_t num_pins = pins().size(); - if (pin_ports_.size() != num_pins - || pin_port_bits_.size() != num_pins - || pin_nets_.size() != num_pins - || pin_net_indices_.size() != num_pins - || pin_is_constant_.size() != num_pins + if (pin_ports_.size() != num_pins || pin_port_bits_.size() != num_pins || pin_nets_.size() != num_pins + || pin_net_indices_.size() != num_pins || pin_is_constant_.size() != num_pins || !validate_pin_sizes_impl(num_pins)) { VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Inconsistent pin data sizes"); } @@ -1581,11 +1582,8 @@ bool Netlist::validate_pin_sizes() const { template bool Netlist::validate_net_sizes() const { size_t num_nets = nets().size(); - if (net_names_.size() != num_nets - || net_pins_.size() != num_nets - || net_is_ignored_.size() != num_nets - || net_is_global_.size() != num_nets - || !validate_net_sizes_impl(num_nets)) { + if (net_names_.size() != num_nets || net_pins_.size() != num_nets || net_is_ignored_.size() != num_nets + || net_is_global_.size() != num_nets || !validate_net_sizes_impl(num_nets)) { VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Inconsistent net data sizes"); } return true; @@ -1629,9 +1627,7 @@ bool Netlist::validate_block_port_refs() const { //Check that we have neither orphaned ports (i.e. that aren't referenced by a block) //nor shared ports (i.e. referenced by multiple blocks) - auto is_one = [](unsigned val) { - return val == 1; - }; + auto is_one = [](unsigned val) { return val == 1; }; if (!std::all_of(seen_port_ids.begin(), seen_port_ids.end(), is_one)) { VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Port not referenced by a single block"); } @@ -1721,9 +1717,7 @@ bool Netlist::validate_port_pin_refs() const { //Check that we have neither orphaned pins (i.e. that aren't referenced by a port) //nor shared pins (i.e. referenced by multiple ports) - auto is_one = [](unsigned val) { - return val == 1; - }; + auto is_one = [](unsigned val) { return val == 1; }; if (!std::all_of(seen_pin_ids.begin(), seen_pin_ids.end(), is_one)) { VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Pins referenced by zero or multiple ports"); } @@ -1754,8 +1748,7 @@ bool Netlist::validate_net_pin_refs() const { if (pin_id) { VTR_ASSERT(pin_index == NET_DRIVER_INDEX); if (pin_type(pin_id) != PinType::DRIVER) { - VPR_FATAL_ERROR(VPR_ERROR_NETLIST, - "Driver pin %zu not found at expected index in net %zu", + VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Driver pin %zu not found at expected index in net %zu", size_t(pin_id), size_t(net_id)); } } @@ -1777,7 +1770,8 @@ bool Netlist::validate_net_pin_refs() const { } if (pin_net_index(pin_id) != pin_index) { - VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Pin's net index cross-reference does not match actual net index"); + VPR_FATAL_ERROR(VPR_ERROR_NETLIST, + "Pin's net index cross-reference does not match actual net index"); } //We only record valid seen pins since we may see multiple undriven nets with invalid IDs @@ -1788,9 +1782,7 @@ bool Netlist::validate_net_pin_refs() const { //Check that we have neither orphaned pins (i.e. that aren't referenced by a port) //nor shared pins (i.e. referenced by multiple ports) - auto is_one = [](unsigned val) { - return val == 1; - }; + auto is_one = [](unsigned val) { return val == 1; }; if (!std::all_of(seen_pin_ids.begin(), seen_pin_ids.end(), is_one)) { VPR_FATAL_ERROR(VPR_ERROR_NETLIST, "Found pins referenced by zero or multiple nets"); } @@ -1873,7 +1865,8 @@ bool Netlist::verify_block_invariants() const { * */ template -typename Netlist::StringId Netlist::find_string(const std::string& str) const { +typename Netlist::StringId Netlist::find_string( + const std::string& str) const { auto iter = string_to_string_id_.find(str); if (iter != string_to_string_id_.end()) { StringId str_id = iter->second; @@ -1888,7 +1881,8 @@ typename Netlist::StringId Netlist -BlockId Netlist::find_block(const typename Netlist::StringId name_id) const { +BlockId Netlist::find_block( + const typename Netlist::StringId name_id) const { VTR_ASSERT_SAFE(valid_string_id(name_id)); auto iter = block_name_to_block_id_.find(name_id); if (iter != block_name_to_block_id_.end()) { @@ -1907,7 +1901,9 @@ BlockId Netlist::find_block(const typename Netlis } template -void Netlist::associate_pin_with_block(const PinId pin_id, const PortType type, const BlockId blk_id) { +void Netlist::associate_pin_with_block(const PinId pin_id, + const PortType type, + const BlockId blk_id) { //Get an interator pointing to where we want to insert pin_iterator iter; if (type == PortType::INPUT) { @@ -1940,7 +1936,9 @@ void Netlist::associate_pin_with_block(const PinI } template -int Netlist::associate_pin_with_net(const PinId pin_id, const PinType type, const NetId net_id) { +int Netlist::associate_pin_with_net(const PinId pin_id, + const PinType type, + const NetId net_id) { //Add the pin to the net if (type == PinType::DRIVER) { VTR_ASSERT_MSG(net_pins_[net_id].size() > 0, "Must be space for net's pin"); @@ -1969,15 +1967,16 @@ void Netlist::associate_pin_with_port(const PinId //the end of the port's pins and the insertion will be efficient. Only in the (more //unusual) case where the pins are created out-of-order will we need to do a slow //insert in the middle of the vector. - auto port_bit_cmp = [&](const PinId pin, BitIndex bit_index) { - return pin_port_bit(pin) < bit_index; - }; - auto iter = std::lower_bound(port_pins_[port_id].begin(), port_pins_[port_id].end(), pin_port_bit(pin_id), port_bit_cmp); + auto port_bit_cmp = [&](const PinId pin, BitIndex bit_index) { return pin_port_bit(pin) < bit_index; }; + auto iter + = std::lower_bound(port_pins_[port_id].begin(), port_pins_[port_id].end(), pin_port_bit(pin_id), port_bit_cmp); port_pins_[port_id].insert(iter, pin_id); } template -void Netlist::associate_port_with_block(const PortId port_id, const PortType type, const BlockId blk_id) { +void Netlist::associate_port_with_block(const PortId port_id, + const PortType type, + const BlockId blk_id) { //Associate the port with the blocks inputs/outputs/clocks //Get an interator pointing to where we want to insert @@ -2012,7 +2011,8 @@ void Netlist::associate_port_with_block(const Por } template -typename Netlist::StringId Netlist::create_string(const std::string& str) { +typename Netlist::StringId Netlist::create_string( + const std::string& str) { StringId str_id = find_string(str); if (!str_id) { //Not found, create @@ -2041,7 +2041,8 @@ typename Netlist::StringId Netlist -NetId Netlist::find_net(const typename Netlist::StringId name_id) const { +NetId Netlist::find_net( + const typename Netlist::StringId name_id) const { VTR_ASSERT_SAFE(valid_string_id(name_id)); auto iter = net_name_to_net_id_.find(name_id); if (iter != net_name_to_net_id_.end()) { diff --git a/vpr/src/base/netlist_utils.h b/vpr/src/base/netlist_utils.h index f35105e6998..95264d209a0 100644 --- a/vpr/src/base/netlist_utils.h +++ b/vpr/src/base/netlist_utils.h @@ -64,7 +64,8 @@ vtr::vector_map compress_ids(const vtr::vector_map& ids) { * Otherwise the element is moved to the new ID location. */ template -vtr::vector_map clean_and_reorder_values(const vtr::vector_map& values, const vtr::vector_map& id_map) { +vtr::vector_map clean_and_reorder_values(const vtr::vector_map& values, + const vtr::vector_map& id_map) { VTR_ASSERT(values.size() == id_map.size()); //Allocate space for the values that will not be dropped diff --git a/vpr/src/base/netlist_walker.h b/vpr/src/base/netlist_walker.h index 93c807a074a..223ccef707e 100644 --- a/vpr/src/base/netlist_walker.h +++ b/vpr/src/base/netlist_walker.h @@ -33,9 +33,7 @@ class NetlistVisitor { * * This is generally used for route-through nodes. */ - void visit_route_through(const t_pb* atom) { - visit_route_through_impl(atom); - } + void visit_route_through(const t_pb* atom) { visit_route_through_impl(atom); } /** * @brief visit_all is called on all t_pb nodes that are in use for any reason. @@ -43,9 +41,7 @@ class NetlistVisitor { * @param top_pb_route the pb_route for the cluster being visited. * @param pb the current element in the cluster being visited. */ - void visit_all(const t_pb_routes& top_pb_route, const t_pb* pb) { - visit_all_impl(top_pb_route, pb); - } + void visit_all(const t_pb_routes& top_pb_route, const t_pb* pb) { visit_all_impl(top_pb_route, pb); } void finish() { finish_impl(); } protected: diff --git a/vpr/src/base/netlist_writer.cpp b/vpr/src/base/netlist_writer.cpp index 60036425bbf..59260b6f0d7 100644 --- a/vpr/src/base/netlist_writer.cpp +++ b/vpr/src/base/netlist_writer.cpp @@ -113,8 +113,18 @@ typedef std::pair sequential_port_delay_pair; std::string indent(size_t depth); double get_delay_ps(double delay_sec); -void print_blif_port(std::ostream& os, size_t& unconn_count, const std::string& port_name, const std::vector& nets, int depth); -void print_verilog_port(std::ostream& os, size_t& unconn_count, const std::string& port_name, const std::vector& nets, PortType type, int depth, struct t_analysis_opts& opts); +void print_blif_port(std::ostream& os, + size_t& unconn_count, + const std::string& port_name, + const std::vector& nets, + int depth); +void print_verilog_port(std::ostream& os, + size_t& unconn_count, + const std::string& port_name, + const std::vector& nets, + PortType type, + int depth, + struct t_analysis_opts& opts); std::string create_unconn_net(size_t& unconn_count); std::string escape_verilog_identifier(const std::string id); @@ -202,12 +212,13 @@ class Instance { ///@brief An instance representing a Look-Up Table class LutInst : public Instance { - public: ///> port_conns, /// timing_arc_values, ///> + port_conns, /// timing_arc_values, ///& timing_arcs() { return timing_arcs_; } @@ -561,16 +571,18 @@ class LatchInst : public Instance { class BlackBoxInst : public Instance { public: - BlackBoxInst(std::string type_name, /// params, /// - std::map attrs, /// - std::map> input_port_conns, /// - std::map> output_port_conns, /// - std::vector timing_arcs, /// ports_tsu, /// ports_thld, /// ports_tcq, /// params, /// + std::map attrs, /// + std::map> + input_port_conns, /// + std::map> + output_port_conns, /// + std::vector timing_arcs, /// ports_tsu, /// ports_thld, /// ports_tcq, ///second.size(); } - VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, - "Could not find port %s on %s of type %s\n", port_name.c_str(), inst_name_.c_str(), type_name_.c_str()); + VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, "Could not find port %s on %s of type %s\n", port_name.c_str(), + inst_name_.c_str(), type_name_.c_str()); return -1; //Suppress warning } @@ -790,7 +806,8 @@ class Assignment { , rval_(rval) {} void print_verilog(std::ostream& os, std::string indent) { - os << indent << "assign " << escape_verilog_identifier(lval_) << " = " << escape_verilog_identifier(rval_) << ";\n"; + os << indent << "assign " << escape_verilog_identifier(lval_) << " = " << escape_verilog_identifier(rval_) + << ";\n"; } void print_merged_verilog(std::ostream& os, std::string indent) { @@ -852,9 +869,7 @@ class NetlistWriterVisitor : public NetlistVisitor { private: //Internal types private: //NetlistVisitor interface functions - void visit_top_impl(const char* top_level_name) override { - top_module_name_ = top_level_name; - } + void visit_top_impl(const char* top_level_name) override { top_module_name_ = top_level_name; } void visit_atom_impl(const t_pb* atom) override { auto& atom_ctx = g_vpr_ctx.atom(); @@ -922,7 +937,8 @@ class NetlistWriterVisitor : public NetlistVisitor { ///@brief Writes out the verilog netlist void print_verilog(int depth = 0) { - verilog_os_ << indent(depth) << "//Verilog generated by VPR " << vtr::VERSION << " from post-place-and-route implementation\n"; + verilog_os_ << indent(depth) << "//Verilog generated by VPR " << vtr::VERSION + << " from post-place-and-route implementation\n"; verilog_os_ << indent(depth) << "module " << top_module_name_ << " (\n"; print_primary_io(depth); @@ -936,7 +952,8 @@ class NetlistWriterVisitor : public NetlistVisitor { } for (auto& kv : logical_net_sinks_) { for (auto& wire_tnode_pair : kv.second) { - verilog_os_ << indent(depth + 1) << "wire " << escape_verilog_identifier(wire_tnode_pair.first) << ";\n"; + verilog_os_ << indent(depth + 1) << "wire " << escape_verilog_identifier(wire_tnode_pair.first) + << ";\n"; } } @@ -954,9 +971,11 @@ class NetlistWriterVisitor : public NetlistVisitor { for (auto& sink_wire_tnode_pair : kv.second) { std::string inst_name = interconnect_name(driver_wire, sink_wire_tnode_pair.first); - verilog_os_ << indent(depth + 1) << "fpga_interconnect " << escape_verilog_identifier(inst_name) << " (\n"; + verilog_os_ << indent(depth + 1) << "fpga_interconnect " << escape_verilog_identifier(inst_name) + << " (\n"; verilog_os_ << indent(depth + 2) << ".datain(" << escape_verilog_identifier(driver_wire) << "),\n"; - verilog_os_ << indent(depth + 2) << ".dataout(" << escape_verilog_identifier(sink_wire_tnode_pair.first) << ")\n"; + verilog_os_ << indent(depth + 2) << ".dataout(" << escape_verilog_identifier(sink_wire_tnode_pair.first) + << ")\n"; verilog_os_ << indent(depth + 1) << ");\n\n"; } } @@ -991,7 +1010,8 @@ class NetlistWriterVisitor : public NetlistVisitor { private: //Internal Helper functions ///@brief Writes out the blif netlist void print_blif(int depth = 0) { - blif_os_ << indent(depth) << "#BLIF generated by VPR " << vtr::VERSION << " from post-place-and-route implementation\n"; + blif_os_ << indent(depth) << "#BLIF generated by VPR " << vtr::VERSION + << " from post-place-and-route implementation\n"; blif_os_ << indent(depth) << ".model " << top_module_name_ << "\n"; //Primary inputs @@ -1068,7 +1088,8 @@ class NetlistWriterVisitor : public NetlistVisitor { sdf_os_ << indent(depth + 1) << "(CELL\n"; sdf_os_ << indent(depth + 2) << "(CELLTYPE \"fpga_interconnect\")\n"; - sdf_os_ << indent(depth + 2) << "(INSTANCE " << escape_sdf_identifier(interconnect_name(driver_wire, sink_wire)) << ")\n"; + sdf_os_ << indent(depth + 2) << "(INSTANCE " + << escape_sdf_identifier(interconnect_name(driver_wire, sink_wire)) << ")\n"; sdf_os_ << indent(depth + 2) << "(DELAY\n"; sdf_os_ << indent(depth + 3) << "(ABSOLUTE\n"; @@ -1077,7 +1098,8 @@ class NetlistWriterVisitor : public NetlistVisitor { std::stringstream delay_triple; delay_triple << "(" << delay << ":" << delay << ":" << delay << ")"; - sdf_os_ << indent(depth + 4) << "(IOPATH datain dataout " << delay_triple.str() << " " << delay_triple.str() << ")\n"; + sdf_os_ << indent(depth + 4) << "(IOPATH datain dataout " << delay_triple.str() << " " + << delay_triple.str() << ")\n"; sdf_os_ << indent(depth + 3) << ")\n"; sdf_os_ << indent(depth + 2) << ")\n"; sdf_os_ << indent(depth + 1) << ")\n"; @@ -1100,8 +1122,7 @@ class NetlistWriterVisitor : public NetlistVisitor { * @param atom The implementation primitive representing the I/O * @param dir The IO direction */ - std::string make_io(const t_pb* atom, - PortType dir) { + std::string make_io(const t_pb* atom, PortType dir) { const t_pb_graph_node* pb_graph_node = atom->pb_graph_node; std::string io_name; @@ -1216,7 +1237,8 @@ class NetlistWriterVisitor : public NetlistVisitor { //Add inputs connections std::vector timing_arcs; for (int pin_idx = 0; pin_idx < pb_graph_node->num_input_pins[0]; pin_idx++) { - int cluster_pin_idx = pb_graph_node->input_pins[0][pin_idx].pin_count_in_cluster; //Unique pin index in cluster + int cluster_pin_idx + = pb_graph_node->input_pins[0][pin_idx].pin_count_in_cluster; //Unique pin index in cluster std::string net; if (!top_pb_route.count(cluster_pin_idx)) { @@ -1289,25 +1311,30 @@ class NetlistWriterVisitor : public NetlistVisitor { int input_cluster_pin_idx = pb_graph_node->input_pins[0][0].pin_count_in_cluster; //Unique pin index in cluster VTR_ASSERT(top_pb_route.count(input_cluster_pin_idx)); auto input_atom_net_id = top_pb_route[input_cluster_pin_idx].atom_net_id; //Connected net in atom netlist - std::string input_net = make_inst_wire(input_atom_net_id, find_tnode(atom, input_cluster_pin_idx), inst_name, PortType::INPUT, 0, 0); + std::string input_net = make_inst_wire(input_atom_net_id, find_tnode(atom, input_cluster_pin_idx), inst_name, + PortType::INPUT, 0, 0); port_conns["D"] = input_net; double tsu = pb_graph_node->input_pins[0][0].tsu; //Output (Q) - int output_cluster_pin_idx = pb_graph_node->output_pins[0][0].pin_count_in_cluster; //Unique pin index in cluster + int output_cluster_pin_idx + = pb_graph_node->output_pins[0][0].pin_count_in_cluster; //Unique pin index in cluster VTR_ASSERT(top_pb_route.count(output_cluster_pin_idx)); auto output_atom_net_id = top_pb_route[output_cluster_pin_idx].atom_net_id; //Connected net in atom netlist - std::string output_net = make_inst_wire(output_atom_net_id, find_tnode(atom, output_cluster_pin_idx), inst_name, PortType::OUTPUT, 0, 0); + std::string output_net = make_inst_wire(output_atom_net_id, find_tnode(atom, output_cluster_pin_idx), inst_name, + PortType::OUTPUT, 0, 0); port_conns["Q"] = output_net; double tcq = pb_graph_node->output_pins[0][0].tco_max; //Clock (control) - int control_cluster_pin_idx = pb_graph_node->clock_pins[0][0].pin_count_in_cluster; //Unique pin index in cluster + int control_cluster_pin_idx + = pb_graph_node->clock_pins[0][0].pin_count_in_cluster; //Unique pin index in cluster VTR_ASSERT(top_pb_route.count(control_cluster_pin_idx)); auto control_atom_net_id = top_pb_route[control_cluster_pin_idx].atom_net_id; //Connected net in atom netlist - std::string control_net = make_inst_wire(control_atom_net_id, find_tnode(atom, control_cluster_pin_idx), inst_name, PortType::CLOCK, 0, 0); + std::string control_net = make_inst_wire(control_atom_net_id, find_tnode(atom, control_cluster_pin_idx), + inst_name, PortType::CLOCK, 0, 0); port_conns["clock"] = control_net; //VPR currently doesn't store enough information to determine these attributes, @@ -1360,7 +1387,8 @@ class NetlistWriterVisitor : public NetlistVisitor { //Connected auto atom_net_id = top_pb_route[cluster_pin_idx].atom_net_id; VTR_ASSERT(atom_net_id); - net = make_inst_wire(atom_net_id, find_tnode(atom, cluster_pin_idx), inst_name, PortType::INPUT, iport, ipin); + net = make_inst_wire(atom_net_id, find_tnode(atom, cluster_pin_idx), inst_name, PortType::INPUT, + iport, ipin); } //RAMs use a port class specification to identify the purpose of each port @@ -1391,7 +1419,8 @@ class NetlistWriterVisitor : public NetlistVisitor { port_name = "we2"; } else { VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, - "Unrecognized input port class '%s' for primitive '%s' (%s)\n", port_class.c_str(), atom->name, pb_type->name); + "Unrecognized input port class '%s' for primitive '%s' (%s)\n", port_class.c_str(), + atom->name, pb_type->name); } input_port_conns[port_name].push_back(net); @@ -1416,7 +1445,8 @@ class NetlistWriterVisitor : public NetlistVisitor { //Connected auto atom_net_id = top_pb_route[cluster_pin_idx].atom_net_id; VTR_ASSERT(atom_net_id); - net = make_inst_wire(atom_net_id, find_tnode(atom, cluster_pin_idx), inst_name, PortType::OUTPUT, iport, ipin); + net = make_inst_wire(atom_net_id, find_tnode(atom, cluster_pin_idx), inst_name, PortType::OUTPUT, + iport, ipin); } std::string port_name; @@ -1428,7 +1458,8 @@ class NetlistWriterVisitor : public NetlistVisitor { port_name = "out2"; } else { VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, - "Unrecognized input port class '%s' for primitive '%s' (%s)\n", port_class.c_str(), atom->name, pb_type->name); + "Unrecognized input port class '%s' for primitive '%s' (%s)\n", port_class.c_str(), + atom->name, pb_type->name); } output_port_conns[port_name].push_back(net); ports_tcq[port_name] = std::make_pair(pin->tco_max, pin->associated_clock_pin->port->name); @@ -1450,19 +1481,22 @@ class NetlistWriterVisitor : public NetlistVisitor { VTR_ASSERT(atom_net_id); //Must have a clock - std::string net = make_inst_wire(atom_net_id, find_tnode(atom, cluster_pin_idx), inst_name, PortType::CLOCK, iport, ipin); + std::string net = make_inst_wire(atom_net_id, find_tnode(atom, cluster_pin_idx), inst_name, + PortType::CLOCK, iport, ipin); if (port_class == "clock") { VTR_ASSERT(pb_graph_node->num_clock_pins[iport] == 1); //Expect a single clock pin input_port_conns["clock"].push_back(net); } else { VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, - "Unrecognized input port class '%s' for primitive '%s' (%s)\n", port_class.c_str(), atom->name, pb_type->name); + "Unrecognized input port class '%s' for primitive '%s' (%s)\n", port_class.c_str(), + atom->name, pb_type->name); } } } - return std::make_shared(type, inst_name, params, attrs, input_port_conns, output_port_conns, timing_arcs, ports_tsu, ports_thld, ports_tcq, opts_); + return std::make_shared(type, inst_name, params, attrs, input_port_conns, output_port_conns, + timing_arcs, ports_tsu, ports_thld, ports_tcq, opts_); } ///@brief Returns an Instance object representing a Multiplier @@ -1558,7 +1592,8 @@ class NetlistWriterVisitor : public NetlistVisitor { VTR_ASSERT(pb_graph_node->num_clock_ports == 0); //No clocks - return std::make_shared(type_name, inst_name, params, attrs, input_port_conns, output_port_conns, timing_arcs, ports_tsu, ports_thld, ports_tcq, opts_); + return std::make_shared(type_name, inst_name, params, attrs, input_port_conns, output_port_conns, + timing_arcs, ports_tsu, ports_thld, ports_tcq, opts_); } ///@brief Returns an Instance object representing an Adder @@ -1658,7 +1693,8 @@ class NetlistWriterVisitor : public NetlistVisitor { } } - return std::make_shared(type_name, inst_name, params, attrs, input_port_conns, output_port_conns, timing_arcs, ports_tsu, ports_thld, ports_tcq, opts_); + return std::make_shared(type_name, inst_name, params, attrs, input_port_conns, output_port_conns, + timing_arcs, ports_tsu, ports_thld, ports_tcq, opts_); } std::shared_ptr make_blackbox_instance(const t_pb* atom) { @@ -1722,8 +1758,10 @@ class NetlistWriterVisitor : public NetlistVisitor { input_port_conns[port->name].push_back(net); if (pin->type == PB_PIN_SEQUENTIAL) { - if (!std::isnan(pin->tsu)) ports_tsu[port->name] = std::make_pair(pin->tsu, pin->associated_clock_pin->port->name); - if (!std::isnan(pin->thld)) ports_thld[port->name] = std::make_pair(pin->thld, pin->associated_clock_pin->port->name); + if (!std::isnan(pin->tsu)) + ports_tsu[port->name] = std::make_pair(pin->tsu, pin->associated_clock_pin->port->name); + if (!std::isnan(pin->thld)) + ports_thld[port->name] = std::make_pair(pin->thld, pin->associated_clock_pin->port->name); } } } @@ -1757,7 +1795,8 @@ class NetlistWriterVisitor : public NetlistVisitor { } output_port_conns[port->name].push_back(net); - if (pin->type == PB_PIN_SEQUENTIAL && !std::isnan(pin->tco_max)) ports_tcq[port->name] = std::make_pair(pin->tco_max, pin->associated_clock_pin->port->name); + if (pin->type == PB_PIN_SEQUENTIAL && !std::isnan(pin->tco_max)) + ports_tcq[port->name] = std::make_pair(pin->tco_max, pin->associated_clock_pin->port->name); } } @@ -1796,7 +1835,8 @@ class NetlistWriterVisitor : public NetlistVisitor { attrs[attr.first] = attr.second; } - return std::make_shared(type_name, inst_name, params, attrs, input_port_conns, output_port_conns, timing_arcs, ports_tsu, ports_thld, ports_tcq, opts_); + return std::make_shared(type_name, inst_name, params, attrs, input_port_conns, output_port_conns, + timing_arcs, ports_tsu, ports_thld, ports_tcq, opts_); } ///@brief Returns the top level pb_route associated with the given pb @@ -1905,7 +1945,8 @@ class NetlistWriterVisitor : public NetlistVisitor { AtomPortId port_id = *ports.begin(); for (size_t ipin = 0; ipin < num_inputs; ++ipin) { - AtomNetId impl_input_net_id = find_atom_input_logical_net(atom_pb, ipin); //The net currently connected to input j + AtomNetId impl_input_net_id + = find_atom_input_logical_net(atom_pb, ipin); //The net currently connected to input j //Find the original pin index const t_pb_graph_pin* gpin = &gnode->input_pins[0][ipin]; @@ -1918,12 +1959,11 @@ class NetlistWriterVisitor : public NetlistVisitor { // Fatal error should be flagged when the net marked in implementation // does not match the net marked in input netlist if (impl_input_net_id != logical_net_id) { - VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, - "Unmatch:\n\tlogical net is '%s' at pin '%lu'\n\timplmented net is '%s' at pin '%s'\n", - atom_ctx.nlist.net_name(logical_net_id).c_str(), - size_t(orig_index), - atom_ctx.nlist.net_name(impl_input_net_id).c_str(), - gpin->to_string().c_str()); + VPR_FATAL_ERROR( + VPR_ERROR_IMPL_NETLIST_WRITER, + "Unmatch:\n\tlogical net is '%s' at pin '%lu'\n\timplmented net is '%s' at pin '%s'\n", + atom_ctx.nlist.net_name(logical_net_id).c_str(), size_t(orig_index), + atom_ctx.nlist.net_name(impl_input_net_id).c_str(), gpin->to_string().c_str()); } //Mark the permutation. @@ -1997,7 +2037,8 @@ class NetlistWriterVisitor : public NetlistVisitor { encoding_on_set = false; } else { VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, - "Invalid .names truth-table character '%c'. Must be one of '1', '0' or '-'. \n", *names_first_row_output_iter); + "Invalid .names truth-table character '%c'. Must be one of '1', '0' or '-'. \n", + *names_first_row_output_iter); } } @@ -2023,8 +2064,7 @@ class NetlistWriterVisitor : public NetlistVisitor { } else if (*output_val_iter == '0') { VTR_ASSERT(!encoding_on_set); } else { - VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, - "Invalid .names encoding both ON and OFF set\n"); + VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, "Invalid .names encoding both ON and OFF set\n"); } //Extract the input values for this row @@ -2041,7 +2081,8 @@ class NetlistWriterVisitor : public NetlistVisitor { input_val = vtr::LogicValue::DONT_CARE; } else { VPR_FATAL_ERROR(VPR_ERROR_IMPL_NETLIST_WRITER, - "Invalid .names truth-table character '%c'. Must be one of '1', '0' or '-'. \n", names_row[i]); + "Invalid .names truth-table character '%c'. Must be one of '1', '0' or '-'. \n", + names_row[i]); } input_values[i] = input_val; @@ -2184,8 +2225,7 @@ class MergedNetlistWriterVisitor : public NetlistWriterVisitor { * @param dir The IO direction * @param portmap Map for keeping port names and width */ - std::string make_io(const t_pb* atom, - PortType dir) { + std::string make_io(const t_pb* atom, PortType dir) { const t_pb_graph_node* pb_graph_node = atom->pb_graph_node; std::string io_name; @@ -2209,7 +2249,8 @@ class MergedNetlistWriterVisitor : public NetlistWriterVisitor { indexed_io_name = atom->name; if (std::regex_match(name, matches, regex)) { - if (std::find(inputs_.begin(), inputs_.end(), matches[2]) == inputs_.end()) { //Skip already existing multi-bit port names + if (std::find(inputs_.begin(), inputs_.end(), matches[2]) + == inputs_.end()) { //Skip already existing multi-bit port names io_name = matches[2]; portmap[matches[2]] = 0; } else { @@ -2229,7 +2270,8 @@ class MergedNetlistWriterVisitor : public NetlistWriterVisitor { indexed_io_name = atom->name + 4; if (std::regex_search(name, matches, regex)) { - if (std::find(outputs_.begin(), outputs_.end(), matches[2]) == outputs_.end()) { //Skip already existing multi-bit port names + if (std::find(outputs_.begin(), outputs_.end(), matches[2]) + == outputs_.end()) { //Skip already existing multi-bit port names portmap[matches[2]] = 0; io_name = matches[2]; } else { @@ -2311,7 +2353,9 @@ class MergedNetlistWriterVisitor : public NetlistWriterVisitor { // ///@brief Main routine for this file. See netlist_writer.h for details. -void netlist_writer(const std::string basename, std::shared_ptr delay_calc, struct t_analysis_opts opts) { +void netlist_writer(const std::string basename, + std::shared_ptr delay_calc, + struct t_analysis_opts opts) { std::string verilog_filename = basename + "_post_synthesis.v"; std::string blif_filename = basename + "_post_synthesis.blif"; std::string sdf_filename = basename + "_post_synthesis.sdf"; @@ -2332,7 +2376,9 @@ void netlist_writer(const std::string basename, std::shared_ptr delay_calc, struct t_analysis_opts opts) { +void merged_netlist_writer(const std::string basename, + std::shared_ptr delay_calc, + struct t_analysis_opts opts) { std::string verilog_filename = basename + "_merged_post_implementation.v"; VTR_LOG("Writing Implementation Netlist: %s\n", verilog_filename.c_str()); @@ -2379,7 +2425,11 @@ std::string create_unconn_net(size_t& unconn_count) { * * Handles special cases like multi-bit and disconnected ports */ -void print_blif_port(std::ostream& os, size_t& unconn_count, const std::string& port_name, const std::vector& nets, int depth) { +void print_blif_port(std::ostream& os, + size_t& unconn_count, + const std::string& port_name, + const std::vector& nets, + int depth) { if (nets.size() == 1) { //If only a single bit port, don't include port indexing os << indent(depth) << port_name << "="; @@ -2413,7 +2463,13 @@ void print_blif_port(std::ostream& os, size_t& unconn_count, const std::string& * * Handles special cases like multi-bit and disconnected ports */ -void print_verilog_port(std::ostream& os, size_t& unconn_count, const std::string& port_name, const std::vector& nets, PortType type, int depth, struct t_analysis_opts& opts) { +void print_verilog_port(std::ostream& os, + size_t& unconn_count, + const std::string& port_name, + const std::vector& nets, + PortType type, + int depth, + struct t_analysis_opts& opts) { auto unconn_inp_name = [&]() { switch (opts.post_synth_netlist_unconn_input_handling) { case e_post_synth_netlist_unconn_handling::GND: @@ -2468,7 +2524,8 @@ void print_verilog_port(std::ostream& os, size_t& unconn_count, const std::strin //A multi-bit port, we explicitly concat the single-bit nets to build the port, //taking care to print MSB on left and LSB on right - if (all_unconnected && type == PortType::OUTPUT && opts.post_synth_netlist_unconn_output_handling == e_post_synth_netlist_unconn_handling::UNCONNECTED) { + if (all_unconnected && type == PortType::OUTPUT + && opts.post_synth_netlist_unconn_output_handling == e_post_synth_netlist_unconn_handling::UNCONNECTED) { // Empty connection } else { // Individual bits @@ -2569,6 +2626,4 @@ std::string escape_sdf_identifier(const std::string identifier) { } ///@brief Joins two identifier strings -std::string join_identifier(std::string lhs, std::string rhs) { - return lhs + '_' + rhs; -} +std::string join_identifier(std::string lhs, std::string rhs) { return lhs + '_' + rhs; } diff --git a/vpr/src/base/netlist_writer.h b/vpr/src/base/netlist_writer.h index 8a8a19976e1..58c38177f23 100644 --- a/vpr/src/base/netlist_writer.h +++ b/vpr/src/base/netlist_writer.h @@ -15,7 +15,9 @@ * All written filenames end in {basename}_post_synthesis.{fmt} where {basename} is the * basename argument and {fmt} is the file format (e.g. v, blif, sdf) */ -void netlist_writer(const std::string basename, std::shared_ptr delay_calc, struct t_analysis_opts opts); +void netlist_writer(const std::string basename, + std::shared_ptr delay_calc, + struct t_analysis_opts opts); /** * @brief Writes out the post implementation netlist in Verilog format. @@ -24,6 +26,8 @@ void netlist_writer(const std::string basename, std::shared_ptr delay_calc, struct t_analysis_opts opts); +void merged_netlist_writer(const std::string basename, + std::shared_ptr delay_calc, + struct t_analysis_opts opts); #endif diff --git a/vpr/src/base/old_traceback.cpp b/vpr/src/base/old_traceback.cpp index a1bb21be232..973fdf0cd29 100644 --- a/vpr/src/base/old_traceback.cpp +++ b/vpr/src/base/old_traceback.cpp @@ -25,7 +25,10 @@ vtr::optional TracebackCompat::traceback_to_route_tree(t_trace* head) } /* Add the path indicated by the trace to parent */ -void TracebackCompat::traceback_to_route_tree_x(t_trace* trace, RouteTree& tree, RouteTreeNode* parent, RRSwitchId parent_switch) { +void TracebackCompat::traceback_to_route_tree_x(t_trace* trace, + RouteTree& tree, + RouteTreeNode* parent, + RRSwitchId parent_switch) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; RRNodeId inode = RRNodeId(trace->index); @@ -55,7 +58,9 @@ void TracebackCompat::traceback_to_route_tree_x(t_trace* trace, RouteTree& tree, } } -std::pair traceback_from_route_tree_recurr(t_trace* head, t_trace* tail, const RouteTreeNode& node) { +std::pair traceback_from_route_tree_recurr(t_trace* head, + t_trace* tail, + const RouteTreeNode& node) { if (!node.is_leaf()) { //Recursively add children for (auto& child : node.child_nodes()) { @@ -181,16 +186,18 @@ bool validate_traceback_recurr(t_trace* trace, std::set& seen_rr_nodes) { //Verify that the switch matches int rr_iswitch = rr_graph.edge_switch(RRNodeId(trace->index), iedge); if (trace->iswitch != rr_iswitch) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Traceback mismatched switch type: traceback %d rr_graph %d (RR nodes %d -> %d)\n", - trace->iswitch, rr_iswitch, - trace->index, to_node); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "Traceback mismatched switch type: traceback %d rr_graph %d (RR nodes %d -> %d)\n", + trace->iswitch, rr_iswitch, trace->index, to_node); } break; } } if (!found) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Traceback no RR edge between RR nodes %d -> %d\n", trace->index, next->index); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Traceback no RR edge between RR nodes %d -> %d\n", trace->index, + next->index); } //Recurse @@ -202,14 +209,9 @@ bool validate_traceback_recurr(t_trace* trace, std::set& seen_rr_nodes) { return true; //End of traceback } -t_trace* -alloc_trace_data() { - return (t_trace*)malloc(sizeof(t_trace)); -} +t_trace* alloc_trace_data() { return (t_trace*)malloc(sizeof(t_trace)); } -void free_trace_data(t_trace* tptr) { - free(tptr); -} +void free_trace_data(t_trace* tptr) { free(tptr); } void free_traceback(t_trace* tptr) { while (tptr != nullptr) { diff --git a/vpr/src/base/old_traceback.h b/vpr/src/base/old_traceback.h index 6c9a9ed2581..e666d871c96 100644 --- a/vpr/src/base/old_traceback.h +++ b/vpr/src/base/old_traceback.h @@ -40,7 +40,10 @@ class TracebackCompat { static vtr::optional traceback_to_route_tree(t_trace* head); private: - static void traceback_to_route_tree_x(t_trace* trace, RouteTree& tree, RouteTreeNode* parent, RRSwitchId parent_switch); + static void traceback_to_route_tree_x(t_trace* trace, + RouteTree& tree, + RouteTreeNode* parent, + RRSwitchId parent_switch); }; t_trace* alloc_trace_data(); diff --git a/vpr/src/base/partition.cpp b/vpr/src/base/partition.cpp index bbb9d472b2c..10f0af848b3 100644 --- a/vpr/src/base/partition.cpp +++ b/vpr/src/base/partition.cpp @@ -3,25 +3,15 @@ #include #include -const std::string& Partition::get_name() const { - return name; -} +const std::string& Partition::get_name() const { return name; } -void Partition::set_name(std::string _part_name) { - name = std::move(_part_name); -} +void Partition::set_name(std::string _part_name) { name = std::move(_part_name); } -const PartitionRegion& Partition::get_part_region() const { - return part_region; -} +const PartitionRegion& Partition::get_part_region() const { return part_region; } -PartitionRegion& Partition::get_mutable_part_region() { - return part_region; -} +PartitionRegion& Partition::get_mutable_part_region() { return part_region; } -void Partition::set_part_region(PartitionRegion pr) { - part_region = std::move(pr); -} +void Partition::set_part_region(PartitionRegion pr) { part_region = std::move(pr); } void print_partition(FILE* fp, const Partition& part) { const std::string& name = part.get_name(); diff --git a/vpr/src/base/partition_region.cpp b/vpr/src/base/partition_region.cpp index 5014976eec4..4bef6b92cf5 100644 --- a/vpr/src/base/partition_region.cpp +++ b/vpr/src/base/partition_region.cpp @@ -5,25 +5,15 @@ #include -void PartitionRegion::add_to_part_region(Region region) { - regions.push_back(region); -} +void PartitionRegion::add_to_part_region(Region region) { regions.push_back(region); } -const std::vector& PartitionRegion::get_regions() const { - return regions; -} +const std::vector& PartitionRegion::get_regions() const { return regions; } -std::vector& PartitionRegion::get_mutable_regions() { - return regions; -} +std::vector& PartitionRegion::get_mutable_regions() { return regions; } -void PartitionRegion::set_partition_region(std::vector pr) { - regions = std::move(pr); -} +void PartitionRegion::set_partition_region(std::vector pr) { regions = std::move(pr); } -bool PartitionRegion::empty() const { - return regions.empty(); -} +bool PartitionRegion::empty() const { return regions.empty(); } bool PartitionRegion::is_loc_in_part_reg(const t_pl_loc& loc) const { bool is_in_pr = false; @@ -106,7 +96,7 @@ const PartitionRegion& get_device_partition_region() { VTR_ASSERT_SAFE(device_pr.get_regions().size() == 1); const auto [xmin, ymin, xmax, ymax] = device_pr.get_regions()[0].get_rect().coordinates(); - VTR_ASSERT_SAFE(xmin == 0 && ymin == 0 && xmax == width -1 && ymax == height - 1); + VTR_ASSERT_SAFE(xmin == 0 && ymin == 0 && xmax == width - 1 && ymax == height - 1); const auto [layer_low, layer_high] = device_pr.get_regions()[0].get_layer_range(); VTR_ASSERT_SAFE(layer_low == 0 && layer_high == n_layers - 1); diff --git a/vpr/src/base/partition_region.h b/vpr/src/base/partition_region.h index 9e46a1a849b..4836591b887 100644 --- a/vpr/src/base/partition_region.h +++ b/vpr/src/base/partition_region.h @@ -56,9 +56,7 @@ class PartitionRegion { * @param pr The other PartitionRegion to be compared with this object. * @return True if both PartitionRegions contain the same regions. */ - bool operator==(const PartitionRegion& pr) const { - return (regions == pr.get_regions()); - } + bool operator==(const PartitionRegion& pr) const { return (regions == pr.get_regions()); } private: std::vector regions; ///< union of rectangular regions that a partition can be placed in @@ -108,5 +106,4 @@ struct hash { }; } // namespace std - #endif /* PARTITION_REGIONS_H */ diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp index 66d0208031f..e4c7c351cb7 100644 --- a/vpr/src/base/place_and_route.cpp +++ b/vpr/src/base/place_and_route.cpp @@ -42,7 +42,11 @@ /******************* Subroutines local to this module ************************/ -static int compute_chan_width(int cfactor, t_chan chan_dist, float distance, float separation, t_graph_type graph_directionality); +static int compute_chan_width(int cfactor, + t_chan chan_dist, + float distance, + float separation, + t_graph_type graph_directionality); static float comp_width(t_chan* chan, float x, float separation); /************************* Subroutine Definitions ****************************/ @@ -133,14 +137,14 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, /* Constraints must be checked to not break rr_graph generator */ if (det_routing_arch->directionality == UNI_DIRECTIONAL) { if (current % 2 != 0) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "Tried odd chan width (%d) in uni-directional routing architecture (chan width must be even).\n", - current); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "Tried odd chan width (%d) in uni-directional routing architecture (chan width must be even).\n", + current); } } else { if (det_routing_arch->Fs % 3) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "Fs must be three in bidirectional mode.\n"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Fs must be three in bidirectional mode.\n"); } } VTR_ASSERT(current > 0); @@ -160,10 +164,11 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, * going to overflow. */ if (router_opts.fixed_channel_width != NO_FIXED_CHANNEL_WIDTH) { if (current > router_opts.fixed_channel_width * 4) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "This circuit appears to be unroutable with the current router options. Last failed at %d.\n" - "Aborting routing procedure.\n", - low); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "This circuit appears to be unroutable with the current router options. Last failed at %d.\n" + "Aborting routing procedure.\n", + low); } } else { if (current > 1000) { @@ -181,32 +186,12 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, if (placer_opts.place_freq == PLACE_ALWAYS) { placer_opts.place_chan_width = current; - try_place(placement_net_list, - placer_opts, - annealing_sched, - router_opts, - analysis_opts, - noc_opts, - arch->Chans, - det_routing_arch, - segment_inf, - arch->Directs, - arch->num_directs, - false); + try_place(placement_net_list, placer_opts, annealing_sched, router_opts, analysis_opts, noc_opts, + arch->Chans, det_routing_arch, segment_inf, arch->Directs, arch->num_directs, false); } - success = route(router_net_list, - current, - router_opts, - analysis_opts, - det_routing_arch, segment_inf, - net_delay, - timing_info, - delay_calc, - arch->Chans, - arch->Directs, - arch->num_directs, - (attempt_count == 0) ? ScreenUpdatePriority::MAJOR : ScreenUpdatePriority::MINOR, - is_flat); + success = route(router_net_list, current, router_opts, analysis_opts, det_routing_arch, segment_inf, net_delay, + timing_info, delay_calc, arch->Chans, arch->Directs, arch->num_directs, + (attempt_count == 0) ? ScreenUpdatePriority::MAJOR : ScreenUpdatePriority::MINOR, is_flat); attempt_count++; fflush(stdout); @@ -226,9 +211,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, } /* Save routing in case it is best. */ - save_routing(best_routing, - route_ctx.clb_opins_used_locally, - saved_clb_opins_used_locally); + save_routing(best_routing, route_ctx.clb_opins_used_locally, saved_clb_opins_used_locally); //If the user gave us a minW hint (and we routed successfully at that width) //make the initial guess closer to the current value instead of the standard guess. @@ -281,7 +264,8 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, current = low + 5 * udsd_multiplier; } else { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "Aborting: Wneed = f(Fs) search found exceedingly large Wneed (at least %d).\n", low); + "Aborting: Wneed = f(Fs) search found exceedingly large Wneed (at least %d).\n", + low); } } else { current = low * scale_factor; /* Haven't found upper bound yet */ @@ -329,37 +313,23 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, if (placer_opts.place_freq == PLACE_ALWAYS) { placer_opts.place_chan_width = current; try_place(placement_net_list, placer_opts, annealing_sched, router_opts, analysis_opts, noc_opts, - arch->Chans, det_routing_arch, segment_inf, - arch->Directs, arch->num_directs, - false); + arch->Chans, det_routing_arch, segment_inf, arch->Directs, arch->num_directs, false); } - success = route(router_net_list, - current, - router_opts, - analysis_opts, - det_routing_arch, - segment_inf, - net_delay, - timing_info, - delay_calc, - arch->Chans, - arch->Directs, - arch->num_directs, - ScreenUpdatePriority::MINOR, - is_flat); + success = route(router_net_list, current, router_opts, analysis_opts, det_routing_arch, segment_inf, + net_delay, timing_info, delay_calc, arch->Chans, arch->Directs, arch->num_directs, + ScreenUpdatePriority::MINOR, is_flat); if (success && !Fc_clipped) { final = current; - save_routing(best_routing, - route_ctx.clb_opins_used_locally, - saved_clb_opins_used_locally); + save_routing(best_routing, route_ctx.clb_opins_used_locally, saved_clb_opins_used_locally); if (placer_opts.place_freq == PLACE_ALWAYS) { auto& cluster_ctx = g_vpr_ctx.clustering(); // Cluster-based net_list is used for placement - std::string placement_id = print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), - filename_opts.PlaceFile.c_str(), g_vpr_ctx.placement().block_locs()); + std::string placement_id + = print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), + filename_opts.PlaceFile.c_str(), g_vpr_ctx.placement().block_locs()); g_vpr_ctx.mutable_placement().placement_id = placement_id; } } @@ -380,40 +350,24 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, free_rr_graph(); - create_rr_graph(graph_type, - device_ctx.physical_tile_types, - device_ctx.grid, - chan_width, - det_routing_arch, - segment_inf, - router_opts, - arch->Directs, arch->num_directs, - &warnings, - is_flat); + create_rr_graph(graph_type, device_ctx.physical_tile_types, device_ctx.grid, chan_width, det_routing_arch, + segment_inf, router_opts, arch->Directs, arch->num_directs, &warnings, is_flat); init_draw_coords(final, g_vpr_ctx.placement().blk_loc_registry()); /* Allocate and load additional rr_graph information needed only by the router. */ alloc_and_load_rr_node_route_structs(); - init_route_structs(router_net_list, - router_opts.bb_factor, - router_opts.has_choke_point, - is_flat); + init_route_structs(router_net_list, router_opts.bb_factor, router_opts.has_choke_point, is_flat); - restore_routing(best_routing, - route_ctx.clb_opins_used_locally, - saved_clb_opins_used_locally); + restore_routing(best_routing, route_ctx.clb_opins_used_locally, saved_clb_opins_used_locally); if (Fc_clipped) { VTR_LOG_WARN("Best routing Fc_output too high, clipped to full (maximum) connectivity.\n"); } VTR_LOG("Best routing used a channel width factor of %d.\n", final); - print_route(router_net_list, - filename_opts.PlaceFile.c_str(), - filename_opts.RouteFile.c_str(), - is_flat); + print_route(router_net_list, filename_opts.PlaceFile.c_str(), filename_opts.RouteFile.c_str(), is_flat); fflush(stdout); @@ -500,7 +454,11 @@ t_chan_width init_chan(int cfactor, const t_chan_width_dist& chan_width_dist, t_ * @param separation The distance between two channels in the 0 to 1 coordinate system. * @param graph_directionality The directionality of the graph (unidirectional or bidirectional). */ -static int compute_chan_width(int cfactor, t_chan chan_dist, float distance, float separation, t_graph_type graph_directionality) { +static int compute_chan_width(int cfactor, + t_chan chan_dist, + float distance, + float separation, + t_graph_type graph_directionality) { int computed_width; computed_width = (int)floor(cfactor * comp_width(&chan_dist, distance, separation) + 0.5); if ((GRAPH_BIDIR == graph_directionality) || computed_width % 2 == 0) { @@ -526,8 +484,7 @@ static float comp_width(t_chan* chan, float x, float separation) { break; case GAUSSIAN: - val = (x - chan->xpeak) * (x - chan->xpeak) - / (2 * chan->width * chan->width); + val = (x - chan->xpeak) * (x - chan->xpeak) / (2 * chan->width * chan->width); val = chan->peak * exp(-val); val += chan->dc; break; @@ -552,8 +509,7 @@ static float comp_width(t_chan* chan, float x, float separation) { break; default: - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in comp_width: Unknown channel type %d.\n", chan->type); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in comp_width: Unknown channel type %d.\n", chan->type); val = OPEN; break; } diff --git a/vpr/src/base/place_and_route.h b/vpr/src/base/place_and_route.h index b4735ed8af4..d157e8a7398 100644 --- a/vpr/src/base/place_and_route.h +++ b/vpr/src/base/place_and_route.h @@ -40,9 +40,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, const std::shared_ptr& delay_calc, bool is_flat); -t_chan_width init_chan(int cfactor, - const t_chan_width_dist& chan_width_dist, - t_graph_type graph_directionality); +t_chan_width init_chan(int cfactor, const t_chan_width_dist& chan_width_dist, t_graph_type graph_directionality); void post_place_sync(); diff --git a/vpr/src/base/read_activity.cpp b/vpr/src/base/read_activity.cpp index 871bdef33e0..8257fcb32f9 100644 --- a/vpr/src/base/read_activity.cpp +++ b/vpr/src/base/read_activity.cpp @@ -9,9 +9,17 @@ #include "atom_netlist.h" -static bool add_activity_to_net(const AtomNetlist& netlist, std::unordered_map& atom_net_power, char* net_name, float probability, float density); +static bool add_activity_to_net(const AtomNetlist& netlist, + std::unordered_map& atom_net_power, + char* net_name, + float probability, + float density); -static bool add_activity_to_net(const AtomNetlist& netlist, std::unordered_map& atom_net_power, char* net_name, float probability, float density) { +static bool add_activity_to_net(const AtomNetlist& netlist, + std::unordered_map& atom_net_power, + char* net_name, + float probability, + float density) { AtomNetId net_id = netlist.find_net(net_name); if (net_id) { atom_net_power[net_id].probability = probability; @@ -19,9 +27,7 @@ static bool add_activity_to_net(const AtomNetlist& netlist, std::unordered_map read_activity(const AtomNetlist& netl act_file_hdl = vtr::fopen(activity_file, "r"); if (act_file_hdl == nullptr) { - VPR_FATAL_ERROR(VPR_ERROR_BLIF_F, - "Error: could not open activity file: %s\n", activity_file); + VPR_FATAL_ERROR(VPR_ERROR_BLIF_F, "Error: could not open activity file: %s\n", activity_file); } ptr = vtr::fgets(buf, vtr::bufsize, act_file_hdl); @@ -60,10 +65,8 @@ std::unordered_map read_activity(const AtomNetlist& netl /* Make sure all nets have an activity value */ for (auto net_id : netlist.nets()) { - if (atom_net_power[net_id].probability < 0.0 - || atom_net_power[net_id].density < 0.0) { - VPR_FATAL_ERROR(VPR_ERROR_BLIF_F, - "Error: Activity file does not contain signal %s\n", + if (atom_net_power[net_id].probability < 0.0 || atom_net_power[net_id].density < 0.0) { + VPR_FATAL_ERROR(VPR_ERROR_BLIF_F, "Error: Activity file does not contain signal %s\n", netlist.net_name(net_id).c_str()); } } diff --git a/vpr/src/base/read_blif.cpp b/vpr/src/base/read_blif.cpp index 807e8c4a8c4..ff3c20f0ff3 100644 --- a/vpr/src/base/read_blif.cpp +++ b/vpr/src/base/read_blif.cpp @@ -43,14 +43,17 @@ vtr::LogicValue to_vtr_logic_value(blifparse::LogicValue); struct BlifAllocCallback : public blifparse::Callback { public: - BlifAllocCallback(e_circuit_format blif_format, AtomNetlist& main_netlist, const std::string netlist_id, const t_model* user_models, const t_model* library_models) + BlifAllocCallback(e_circuit_format blif_format, + AtomNetlist& main_netlist, + const std::string netlist_id, + const t_model* user_models, + const t_model* library_models) : main_netlist_(main_netlist) , netlist_id_(netlist_id) , user_arch_models_(user_models) , library_arch_models_(library_models) , blif_format_(blif_format) { - VTR_ASSERT(blif_format_ == e_circuit_format::BLIF - || blif_format_ == e_circuit_format::EBLIF); + VTR_ASSERT(blif_format_ == e_circuit_format::BLIF || blif_format_ == e_circuit_format::EBLIF); inpad_model_ = find_model(MODEL_INPUT); outpad_model_ = find_model(MODEL_OUTPUT); @@ -126,8 +129,9 @@ struct BlifAllocCallback : public blifparse::Callback { VTR_ASSERT_MSG(blk_model->inputs, ".names model has no input port"); VTR_ASSERT_MSG(!blk_model->inputs->next, ".names model has multiple input ports"); if (static_cast(nets.size()) - 1 > blk_model->inputs->size) { - vpr_throw(VPR_ERROR_BLIF_F, filename_.c_str(), lineno_, "BLIF .names input size (%zu) greater than .names model input size (%d)", - nets.size() - 1, blk_model->inputs->size); + vpr_throw(VPR_ERROR_BLIF_F, filename_.c_str(), lineno_, + "BLIF .names input size (%zu) greater than .names model input size (%d)", nets.size() - 1, + blk_model->inputs->size); } VTR_ASSERT_MSG(blk_model->outputs, ".names has no output port"); @@ -173,7 +177,8 @@ struct BlifAllocCallback : public blifparse::Callback { // output_is_const = true; VTR_LOG("Found constant-zero generator '%s'\n", nets[nets.size() - 1].c_str()); - } else if (truth_table.size() == 1 && truth_table[0].size() == 1 && truth_table[0][0] == vtr::LogicValue::TRUE) { + } else if (truth_table.size() == 1 && truth_table[0].size() == 1 + && truth_table[0][0] == vtr::LogicValue::TRUE) { //A single-entry truth table with value '1' in BLIF corresponds to a constant-one // e.g. // @@ -191,9 +196,14 @@ struct BlifAllocCallback : public blifparse::Callback { curr_model().create_pin(output_port_id, 0, net_id, PinType::DRIVER, output_is_const); } - void latch(std::string input, std::string output, blifparse::LatchType type, std::string control, blifparse::LogicValue init) override { + void latch(std::string input, + std::string output, + blifparse::LatchType type, + std::string control, + blifparse::LogicValue init) override { if (type == blifparse::LatchType::UNSPECIFIED) { - VTR_LOGF_WARN(filename_.c_str(), lineno_, "Treating latch '%s' of unspecified type as rising edge triggered\n", output.c_str()); + VTR_LOGF_WARN(filename_.c_str(), lineno_, + "Treating latch '%s' of unspecified type as rising edge triggered\n", output.c_str()); } else if (type != blifparse::LatchType::RISING_EDGE) { vpr_throw(VPR_ERROR_BLIF_F, filename_.c_str(), lineno_, "Only rising edge latches supported\n"); } @@ -268,8 +278,8 @@ struct BlifAllocCallback : public blifparse::Callback { //Since this is unusual, warn the user VTR_LOGF_WARN(filename_.c_str(), lineno_, - "Subckt of type '%s' at %s:%d has no output pins, and has been named '%s'\n", - blk_model->name, filename_.c_str(), lineno_, subckt_name.c_str()); + "Subckt of type '%s' at %s:%d has no output pins, and has been named '%s'\n", blk_model->name, + filename_.c_str(), lineno_, subckt_name.c_str()); } //The name for every block should be unique, check that there is no name conflict @@ -402,8 +412,8 @@ struct BlifAllocCallback : public blifparse::Callback { void lineno(int line_num) override { lineno_ = line_num; } void parse_error(const int curr_lineno, const std::string& near_text, const std::string& msg) override { - vpr_throw(VPR_ERROR_BLIF_F, filename_.c_str(), curr_lineno, - "Error in blif file near '%s': %s\n", near_text.c_str(), msg.c_str()); + vpr_throw(VPR_ERROR_BLIF_F, filename_.c_str(), curr_lineno, "Error in blif file near '%s': %s\n", + near_text.c_str(), msg.c_str()); } public: @@ -460,8 +470,8 @@ struct BlifAllocCallback : public blifparse::Callback { } } if (!arch_model) { - vpr_throw(VPR_ERROR_BLIF_F, filename_.c_str(), lineno_, "Failed to find matching architecture model for '%s'\n", - name.data()); + vpr_throw(VPR_ERROR_BLIF_F, filename_.c_str(), lineno_, + "Failed to find matching architecture model for '%s'\n", name.data()); } return arch_model; } @@ -506,8 +516,7 @@ struct BlifAllocCallback : public blifparse::Callback { //No match vpr_throw(VPR_ERROR_BLIF_F, filename_.c_str(), lineno_, - "Found no matching port '%s' on architecture model '%s'\n", - port_name.c_str(), blk_model->name); + "Found no matching port '%s' on architecture model '%s'\n", port_name.c_str(), blk_model->name); return nullptr; } @@ -597,22 +606,16 @@ struct BlifAllocCallback : public blifparse::Callback { } ///@brief Returns a different unique subck name each time it is called - std::string unique_subckt_name() { - return "unnamed_subckt" + std::to_string(unique_subckt_name_counter_++); - } + std::string unique_subckt_name() { return "unnamed_subckt" + std::to_string(unique_subckt_name_counter_++); } /** @brief Sets the current block which is being processed * * Used to determine which block a .cname, .param, .attr apply to */ - void set_curr_block(AtomBlockId blk) { - curr_block_ = blk; - } + void set_curr_block(AtomBlockId blk) { curr_block_ = blk; } ///@brief Gets the current block which is being processed - AtomBlockId curr_block() const { - return curr_block_; - } + AtomBlockId curr_block() const { return curr_block_; } /** * @brief Merges all the recorded net pairs which need to be merged diff --git a/vpr/src/base/read_circuit.cpp b/vpr/src/base/read_circuit.cpp index 4d6fab3f25d..7ad490da271 100644 --- a/vpr/src/base/read_circuit.cpp +++ b/vpr/src/base/read_circuit.cpp @@ -42,7 +42,8 @@ AtomNetlist read_and_process_circuit(e_circuit_format circuit_format, t_vpr_setu } else if (name_ext[1] == ".eblif") { circuit_format = e_circuit_format::EBLIF; } else { - VPR_FATAL_ERROR(VPR_ERROR_ATOM_NETLIST, "Failed to determine file format for '%s' expected .blif or .eblif extension", + VPR_FATAL_ERROR(VPR_ERROR_ATOM_NETLIST, + "Failed to determine file format for '%s' expected .blif or .eblif extension", circuit_file); } } @@ -60,9 +61,10 @@ AtomNetlist read_and_process_circuit(e_circuit_format circuit_format, t_vpr_setu netlist = read_interchange_netlist(circuit_file, arch); break; default: - VPR_FATAL_ERROR(VPR_ERROR_ATOM_NETLIST, - "Unable to identify circuit file format for '%s'. Expect [blif|eblif|fpga-interchange]!\n", - circuit_file); + VPR_FATAL_ERROR( + VPR_ERROR_ATOM_NETLIST, + "Unable to identify circuit file format for '%s'. Expect [blif|eblif|fpga-interchange]!\n", + circuit_file); break; } } @@ -71,13 +73,8 @@ AtomNetlist read_and_process_circuit(e_circuit_format circuit_format, t_vpr_setu print_netlist_as_blif(getEchoFileName(E_ECHO_ATOM_NETLIST_ORIG), netlist); } - process_circuit(netlist, - const_gen_inference, - should_absorb_buffers, - should_sweep_dangling_primary_ios, - should_sweep_dangling_nets, - should_sweep_dangling_blocks, - should_sweep_constant_primary_outputs, + process_circuit(netlist, const_gen_inference, should_absorb_buffers, should_sweep_dangling_primary_ios, + should_sweep_dangling_nets, should_sweep_dangling_blocks, should_sweep_constant_primary_outputs, verbosity); if (isEchoFileEnabled(E_ECHO_ATOM_NETLIST_CLEANED)) { @@ -108,24 +105,22 @@ static void process_circuit(AtomNetlist& netlist, //Remove the special 'unconn' net AtomNetId unconn_net_id = netlist.find_net("unconn"); if (unconn_net_id) { - VTR_LOGV_WARN(verbosity > 1, "Removing special net 'unconn' (assumed it represented explicitly unconnected pins)\n"); + VTR_LOGV_WARN(verbosity > 1, + "Removing special net 'unconn' (assumed it represented explicitly unconnected pins)\n"); netlist.remove_net(unconn_net_id); } //Also remove the 'unconn' block driver, if it exists AtomBlockId unconn_blk_id = netlist.find_block("unconn"); if (unconn_blk_id) { - VTR_LOGV_WARN(verbosity > 1, "Removing special block 'unconn' (assumed it represented explicitly unconnected pins)\n"); + VTR_LOGV_WARN(verbosity > 1, + "Removing special block 'unconn' (assumed it represented explicitly unconnected pins)\n"); netlist.remove_block(unconn_blk_id); } //Sweep unused logic/nets/inputs/outputs - sweep_iterative(netlist, - should_sweep_dangling_primary_ios, - should_sweep_dangling_nets, - should_sweep_dangling_blocks, - should_sweep_constant_primary_outputs, - const_gen_inference_method, + sweep_iterative(netlist, should_sweep_dangling_primary_ios, should_sweep_dangling_nets, + should_sweep_dangling_blocks, should_sweep_constant_primary_outputs, const_gen_inference_method, verbosity); } diff --git a/vpr/src/base/read_interchange_netlist.cpp b/vpr/src/base/read_interchange_netlist.cpp index c29cea8326d..80cfd0feb47 100644 --- a/vpr/src/base/read_interchange_netlist.cpp +++ b/vpr/src/base/read_interchange_netlist.cpp @@ -13,33 +13,33 @@ #ifdef VTR_ENABLE_CAPNPROTO -# include -# include -# include -# include -# include -# include -# include -# include -# include -# include - -# include "LogicalNetlist.capnp.h" -# include "capnp/serialize.h" -# include "capnp/serialize-packed.h" - -# include "vtr_assert.h" -# include "vtr_hash.h" -# include "vtr_util.h" -# include "vtr_log.h" -# include "vtr_logic.h" -# include "vtr_time.h" -# include "vtr_digest.h" - -# include "vpr_types.h" -# include "vpr_error.h" -# include "globals.h" -# include "arch_types.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "LogicalNetlist.capnp.h" +#include "capnp/serialize.h" +#include "capnp/serialize-packed.h" + +#include "vtr_assert.h" +#include "vtr_hash.h" +#include "vtr_util.h" +#include "vtr_log.h" +#include "vtr_logic.h" +#include "vtr_time.h" +#include "vtr_digest.h" + +#include "vpr_types.h" +#include "vpr_error.h" +#include "globals.h" +#include "arch_types.h" struct NetlistReader { public: @@ -85,7 +85,8 @@ struct NetlistReader { LogicalNetlist::Netlist::CellInstance::Reader top_cell_instance_; - std::unordered_map, std::string, vtr::hash_pair>> port_net_maps_; + std::unordered_map, std::string, vtr::hash_pair>> + port_net_maps_; /** @brief Preprocesses the port net maps, populating the port_net_maps_ hash map to be later accessed for faster lookups */ void prepare_port_net_maps() { @@ -337,7 +338,8 @@ struct NetlistReader { auto dir = port_list[port].getDir(); switch (dir) { case LogicalNetlist::Netlist::Direction::INPUT: - if (!output_is_const) main_netlist_.create_pin(iport_id, inum++, net_id, PinType::SINK); + if (!output_is_const) + main_netlist_.create_pin(iport_id, inum++, net_id, PinType::SINK); break; case LogicalNetlist::Netlist::Direction::OUTPUT: main_netlist_.create_pin(oport_id, 0, net_id, PinType::DRIVER, output_is_const); @@ -471,7 +473,8 @@ struct NetlistReader { if (name == model->name) return model; - vpr_throw(VPR_ERROR_IC_NETLIST_F, netlist_file_, -1, "Failed to find matching architecture model for '%s'\n", name.c_str()); + vpr_throw(VPR_ERROR_IC_NETLIST_F, netlist_file_, -1, "Failed to find matching architecture model for '%s'\n", + name.c_str()); } const t_model_ports* find_model_port(const t_model* blk_model, std::string name) { @@ -482,8 +485,7 @@ struct NetlistReader { return port; //No match - vpr_throw(VPR_ERROR_IC_NETLIST_F, netlist_file_, -1, - "Found no matching port '%s' on architecture model '%s'\n", + vpr_throw(VPR_ERROR_IC_NETLIST_F, netlist_file_, -1, "Found no matching port '%s' on architecture model '%s'\n", name.c_str(), blk_model->name); return nullptr; } @@ -526,8 +528,7 @@ struct NetlistReader { #endif // VTR_ENABLE_CAPNPROTO -AtomNetlist read_interchange_netlist(const char* ic_netlist_file, - t_arch& arch) { +AtomNetlist read_interchange_netlist(const char* ic_netlist_file, t_arch& arch) { #ifdef VTR_ENABLE_CAPNPROTO AtomNetlist netlist; std::string netlist_id = vtr::secure_digest_file(ic_netlist_file); diff --git a/vpr/src/base/read_interchange_netlist.h b/vpr/src/base/read_interchange_netlist.h index 1b17b86ea5d..68a05ad2bbf 100644 --- a/vpr/src/base/read_interchange_netlist.h +++ b/vpr/src/base/read_interchange_netlist.h @@ -4,7 +4,6 @@ #include "atom_netlist_fwd.h" #include "read_circuit.h" -AtomNetlist read_interchange_netlist(const char* ic_netlist_file, - t_arch& arch); +AtomNetlist read_interchange_netlist(const char* ic_netlist_file, t_arch& arch); #endif /*READ_INTERCHANGE_NETLIST_H*/ diff --git a/vpr/src/base/read_netlist.cpp b/vpr/src/base/read_netlist.cpp index 4f2d5f6da06..65fdc1d9747 100644 --- a/vpr/src/base/read_netlist.cpp +++ b/vpr/src/base/read_netlist.cpp @@ -37,7 +37,13 @@ static const char* netlist_file_name = nullptr; static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, const pugiutil::loc_data& loc_data); -static void processPb(pugi::xml_node Parent, const ClusterBlockId index, t_pb* pb, t_pb_routes& pb_route, int* num_primitives, const pugiutil::loc_data& loc_data, ClusteredNetlist* clb_nlist); +static void processPb(pugi::xml_node Parent, + const ClusterBlockId index, + t_pb* pb, + t_pb_routes& pb_route, + int* num_primitives, + const pugiutil::loc_data& loc_data, + ClusteredNetlist* clb_nlist); static void processComplexBlock(pugi::xml_node Parent, const ClusterBlockId index, @@ -66,10 +72,7 @@ static void load_atom_pin_mapping(const ClusteredNetlist& clb_nlist); * * @param net_file Name of the netlist file to read */ -ClusteredNetlist read_netlist(const char* net_file, - const t_arch* arch, - bool verify_file_digests, - int verbosity) { +ClusteredNetlist read_netlist(const char* net_file, const t_arch* arch, bool verify_file_digests, int verbosity) { clock_t begin = clock(); size_t bcount = 0; std::vector circuit_inputs, circuit_outputs, circuit_clocks; @@ -89,8 +92,7 @@ ClusteredNetlist read_netlist(const char* net_file, try { loc_data = pugiutil::load_xml(doc, net_file); } catch (pugiutil::XmlError& e) { - vpr_throw(VPR_ERROR_NET_F, net_file, 0, - "Failed to load netlist file '%s' (%s).\n", net_file, e.what()); + vpr_throw(VPR_ERROR_NET_F, net_file, 0, "Failed to load netlist file '%s' (%s).\n", net_file, e.what()); } try { @@ -100,15 +102,13 @@ ClusteredNetlist read_netlist(const char* net_file, /* Root node should be block */ auto top = doc.child("block"); if (!top) { - vpr_throw(VPR_ERROR_NET_F, net_file, loc_data.line(top), - "Root element must be 'block'.\n"); + vpr_throw(VPR_ERROR_NET_F, net_file, loc_data.line(top), "Root element must be 'block'.\n"); } /* Check top-level netlist attributes */ auto top_name = top.attribute("name"); if (!top_name) { - vpr_throw(VPR_ERROR_NET_F, net_file, loc_data.line(top), - "Root element must have a 'name' attribute.\n"); + vpr_throw(VPR_ERROR_NET_F, net_file, loc_data.line(top), "Root element must have a 'name' attribute.\n"); } VTR_LOG("Netlist generated from file '%s'.\n", top_name.value()); @@ -118,8 +118,7 @@ ClusteredNetlist read_netlist(const char* net_file, if (strcmp(top_instance.value(), "FPGA_packed_netlist[0]") != 0) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(top), - "Expected top instance to be \"FPGA_packed_netlist[0]\", found \"%s\".", - top_instance.value()); + "Expected top instance to be \"FPGA_packed_netlist[0]\", found \"%s\".", top_instance.value()); } auto architecture_id = top.attribute("architecture_id"); @@ -199,8 +198,7 @@ ClusteredNetlist read_netlist(const char* net_file, /* Error check */ for (auto blk_id : atom_ctx.nlist.blocks()) { if (atom_ctx.lookup.atom_pb(blk_id) == nullptr) { - VPR_FATAL_ERROR(VPR_ERROR_NET_F, - ".blif file and .net file do not match, .net file missing atom %s.\n", + VPR_FATAL_ERROR(VPR_ERROR_NET_F, ".blif file and .net file do not match, .net file missing atom %s.\n", atom_ctx.nlist.block_name(blk_id).c_str()); } } @@ -209,8 +207,7 @@ ClusteredNetlist read_netlist(const char* net_file, load_external_nets_and_cb(clb_nlist); } catch (pugiutil::XmlError& e) { - vpr_throw(VPR_ERROR_NET_F, e.filename_c_str(), e.line(), - "Error loading post-pack netlist (%s)", e.what()); + vpr_throw(VPR_ERROR_NET_F, e.filename_c_str(), e.line(), "Error loading post-pack netlist (%s)", e.what()); } /* TODO: create this function later @@ -295,13 +292,11 @@ static void processComplexBlock(pugi::xml_node clb_block, auto block_name = pugiutil::get_attribute(clb_block, "name", loc_data); auto block_inst = pugiutil::get_attribute(clb_block, "instance", loc_data); tokens = GetTokensFromString(block_inst.value(), &num_tokens); - if (num_tokens != 4 || tokens[0].type != TOKEN_STRING - || tokens[1].type != TOKEN_OPEN_SQUARE_BRACKET - || tokens[2].type != TOKEN_INT - || tokens[3].type != TOKEN_CLOSE_SQUARE_BRACKET) { + if (num_tokens != 4 || tokens[0].type != TOKEN_STRING || tokens[1].type != TOKEN_OPEN_SQUARE_BRACKET + || tokens[2].type != TOKEN_INT || tokens[3].type != TOKEN_CLOSE_SQUARE_BRACKET) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(clb_block), - "Unknown syntax for instance %s in %s. Expected pb_type[instance_number].\n", - block_inst.value(), clb_block.name()); + "Unknown syntax for instance %s in %s. Expected pb_type[instance_number].\n", block_inst.value(), + clb_block.name()); } VTR_ASSERT(ClusterBlockId(vtr::atoi(tokens[2].data)) == index); @@ -317,8 +312,8 @@ static void processComplexBlock(pugi::xml_node clb_block, } } if (!found) { - vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(clb_block), - "Unknown cb type %s for cb %s #%lu.\n", block_inst.value(), clb_nlist->block_name(index).c_str(), size_t(index)); + vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(clb_block), "Unknown cb type %s for cb %s #%lu.\n", + block_inst.value(), clb_nlist->block_name(index).c_str(), size_t(index)); } //Parse all pbs and CB internal nets @@ -337,11 +332,12 @@ static void processComplexBlock(pugi::xml_node clb_block, } } if (!found) { - vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(clb_block), - "Unknown mode %s for cb %s #%d.\n", clb_mode.value(), clb_nlist->block_name(index).c_str(), index); + vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(clb_block), "Unknown mode %s for cb %s #%d.\n", + clb_mode.value(), clb_nlist->block_name(index).c_str(), index); } - processPb(clb_block, index, clb_nlist->block_pb(index), clb_nlist->block_pb(index)->pb_route, num_primitives, loc_data, clb_nlist); + processPb(clb_block, index, clb_nlist->block_pb(index), clb_nlist->block_pb(index)->pb_route, num_primitives, + loc_data, clb_nlist); load_internal_to_block_net_nums(clb_nlist->block_type(index), clb_nlist->block_pb(index)->pb_route); //clb_nlist->block_pb(index)->pb_route.shrink_to_fit(); @@ -356,10 +352,14 @@ static void processComplexBlock(pugi::xml_node clb_block, * `attrValue ... ` */ template -void processAttrsParams(pugi::xml_node Parent, const char* child_name, T& atom_net_range, const pugiutil::loc_data& loc_data) { +void processAttrsParams(pugi::xml_node Parent, + const char* child_name, + T& atom_net_range, + const pugiutil::loc_data& loc_data) { std::map kvs; if (Parent) { - for (auto Cur = pugiutil::get_first_child(Parent, child_name, loc_data, pugiutil::OPTIONAL); Cur; Cur = Cur.next_sibling(child_name)) { + for (auto Cur = pugiutil::get_first_child(Parent, child_name, loc_data, pugiutil::OPTIONAL); Cur; + Cur = Cur.next_sibling(child_name)) { std::string cname = pugiutil::get_attribute(Cur, "name", loc_data).value(); std::string cval = Cur.text().get(); bool found = false; @@ -369,7 +369,8 @@ void processAttrsParams(pugi::xml_node Parent, const char* child_name, T& atom_n if (bitem.second != cval) { // Found in AtomNetlist range, but values don't match vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), - ".net file and .blif file do not match, %s %s set to \"%s\" in .net file but \"%s\" in .blif file.\n", + ".net file and .blif file do not match, %s %s set to \"%s\" in .net file but \"%s\" " + "in .blif file.\n", child_name, cname.c_str(), cval.c_str(), bitem.second.c_str()); } found = true; @@ -378,8 +379,8 @@ void processAttrsParams(pugi::xml_node Parent, const char* child_name, T& atom_n } if (!found) // Not found in AtomNetlist range vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), - ".net file and .blif file do not match, %s %s missing in .blif file.\n", - child_name, cname.c_str()); + ".net file and .blif file do not match, %s %s missing in .blif file.\n", child_name, + cname.c_str()); kvs[cname] = cval; } } @@ -387,8 +388,8 @@ void processAttrsParams(pugi::xml_node Parent, const char* child_name, T& atom_n for (auto bitem : atom_net_range) { if (kvs.find(bitem.first) == kvs.end()) vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Parent), - ".net file and .blif file do not match, %s %s missing in .net file.\n", - child_name, bitem.first.c_str()); + ".net file and .blif file do not match, %s %s missing in .net file.\n", child_name, + bitem.first.c_str()); } } @@ -399,7 +400,13 @@ void processAttrsParams(pugi::xml_node Parent, const char* child_name, T& atom_n * @param pb physical block to use * @param loc_data xml location info for error reporting */ -static void processPb(pugi::xml_node Parent, const ClusterBlockId index, t_pb* pb, t_pb_routes& pb_route, int* num_primitives, const pugiutil::loc_data& loc_data, ClusteredNetlist* clb_nlist) { +static void processPb(pugi::xml_node Parent, + const ClusterBlockId index, + t_pb* pb, + t_pb_routes& pb_route, + int* num_primitives, + const pugiutil::loc_data& loc_data, + ClusteredNetlist* clb_nlist) { int i, j, pb_index; bool found; const t_pb_type* pb_type; @@ -428,8 +435,7 @@ static void processPb(pugi::xml_node Parent, const ClusterBlockId index, t_pb* p int num_out_ports = 0; int num_clock_ports = 0; for (i = 0; i < pb->pb_graph_node->pb_type->num_ports; i++) { - if (pb->pb_graph_node->pb_type->ports[i].is_clock - && pb->pb_graph_node->pb_type->ports[i].type == IN_PORT) { + if (pb->pb_graph_node->pb_type->ports[i].is_clock && pb->pb_graph_node->pb_type->ports[i].type == IN_PORT) { num_clock_ports++; } else if (!pb->pb_graph_node->pb_type->ports[i].is_clock && pb->pb_graph_node->pb_type->ports[i].type == IN_PORT) { @@ -500,10 +506,8 @@ static void processPb(pugi::xml_node Parent, const ClusterBlockId index, t_pb* p auto instance_type = pugiutil::get_attribute(child, "instance", loc_data); tokens = GetTokensFromString(instance_type.value(), &num_tokens); - if (num_tokens != 4 || tokens[0].type != TOKEN_STRING - || tokens[1].type != TOKEN_OPEN_SQUARE_BRACKET - || tokens[2].type != TOKEN_INT - || tokens[3].type != TOKEN_CLOSE_SQUARE_BRACKET) { + if (num_tokens != 4 || tokens[0].type != TOKEN_STRING || tokens[1].type != TOKEN_OPEN_SQUARE_BRACKET + || tokens[2].type != TOKEN_INT || tokens[3].type != TOKEN_CLOSE_SQUARE_BRACKET) { vpr_throw(VPR_ERROR_NET_F, loc_data.filename_c_str(), loc_data.line(child), "Unknown syntax for instance %s in %s. Expected pb_type[instance_number].\n", instance_type.value(), child.name()); @@ -516,8 +520,8 @@ static void processPb(pugi::xml_node Parent, const ClusterBlockId index, t_pb* p pb_index = vtr::atoi(tokens[2].data); if (pb_index < 0) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(child), - "Instance number %d is negative instance %s in %s.\n", - pb_index, instance_type.value(), child.name()); + "Instance number %d is negative instance %s in %s.\n", pb_index, + instance_type.value(), child.name()); } if (pb_index >= pb_type->modes[pb->mode].pb_type_children[i].num_pb) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(child), @@ -526,18 +530,18 @@ static void processPb(pugi::xml_node Parent, const ClusterBlockId index, t_pb* p } if (pb->child_pbs[i][pb_index].pb_graph_node != nullptr) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(child), - "node is used by two different blocks %s and %s.\n", - instance_type.value(), + "node is used by two different blocks %s and %s.\n", instance_type.value(), pb->child_pbs[i][pb_index].name); } - pb->child_pbs[i][pb_index].pb_graph_node = &pb->pb_graph_node->child_pb_graph_nodes[pb->mode][i][pb_index]; + pb->child_pbs[i][pb_index].pb_graph_node + = &pb->pb_graph_node->child_pb_graph_nodes[pb->mode][i][pb_index]; found = true; break; } } if (!found) { - vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(child), - "Unknown pb type %s.\n", instance_type.value()); + vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(child), "Unknown pb type %s.\n", + instance_type.value()); } auto name = pugiutil::get_attribute(child, "name", loc_data); @@ -558,8 +562,8 @@ static void processPb(pugi::xml_node Parent, const ClusterBlockId index, t_pb* p } if (!found && !pb->child_pbs[i][pb_index].is_primitive()) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(child), - "Unknown mode %s for cb %s #%d.\n", mode.value(), - pb->child_pbs[i][pb_index].name, pb_index); + "Unknown mode %s for cb %s #%d.\n", mode.value(), pb->child_pbs[i][pb_index].name, + pb_index); } pb->child_pbs[i][pb_index].parent_pb = pb; @@ -577,15 +581,16 @@ static void processPb(pugi::xml_node Parent, const ClusterBlockId index, t_pb* p pb->child_pbs[i][pb_index].mode = 0; found = false; for (j = 0; j < pb->child_pbs[i][pb_index].pb_graph_node->pb_type->num_modes; j++) { - if (strcmp(mode.value(), pb->child_pbs[i][pb_index].pb_graph_node->pb_type->modes[j].name) == 0) { + if (strcmp(mode.value(), pb->child_pbs[i][pb_index].pb_graph_node->pb_type->modes[j].name) + == 0) { pb->child_pbs[i][pb_index].mode = j; found = true; } } if (!found && !pb->child_pbs[i][pb_index].is_primitive()) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(child), - "Unknown mode %s for cb %s #%d.\n", mode.value(), - pb->child_pbs[i][pb_index].name, pb_index); + "Unknown mode %s for cb %s #%d.\n", mode.value(), pb->child_pbs[i][pb_index].name, + pb_index); } pb->child_pbs[i][pb_index].parent_pb = pb; processPb(child, index, &pb->child_pbs[i][pb_index], pb_route, num_primitives, loc_data, clb_nlist); @@ -627,7 +632,8 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, auto& atom_ctx = g_vpr_ctx.atom(); - for (auto Cur = pugiutil::get_first_child(Parent, "port", loc_data, pugiutil::OPTIONAL); Cur; Cur = Cur.next_sibling("port")) { + for (auto Cur = pugiutil::get_first_child(Parent, "port", loc_data, pugiutil::OPTIONAL); Cur; + Cur = Cur.next_sibling("port")) { auto port_name = pugiutil::get_attribute(Cur, "name", loc_data); //Determine the port index on the pb @@ -642,8 +648,7 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, found = true; break; } - if (pb->pb_graph_node->pb_type->ports[i].is_clock - && pb->pb_graph_node->pb_type->ports[i].type == IN_PORT) { + if (pb->pb_graph_node->pb_type->ports[i].is_clock && pb->pb_graph_node->pb_type->ports[i].type == IN_PORT) { clock_port++; } else if (!pb->pb_graph_node->pb_type->ports[i].is_clock && pb->pb_graph_node->pb_type->ports[i].type == IN_PORT) { @@ -654,10 +659,8 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, } } if (!found) { - vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), - "Unknown port %s for pb %s[%d].\n", port_name.value(), - pb->pb_graph_node->pb_type->name, - pb->pb_graph_node->placement_index); + vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), "Unknown port %s for pb %s[%d].\n", + port_name.value(), pb->pb_graph_node->pb_type->name, pb->pb_graph_node->placement_index); } //Extract all the pins for this port @@ -668,24 +671,24 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, if (0 == strcmp(Parent.name(), "inputs")) { if (num_tokens != pb->pb_graph_node->num_input_pins[in_port]) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), - "Incorrect # pins %d found (expected %d) for input port %s for pb %s[%d].\n", - num_tokens, pb->pb_graph_node->num_input_pins[in_port], port_name.value(), pb->pb_graph_node->pb_type->name, - pb->pb_graph_node->placement_index); + "Incorrect # pins %d found (expected %d) for input port %s for pb %s[%d].\n", num_tokens, + pb->pb_graph_node->num_input_pins[in_port], port_name.value(), + pb->pb_graph_node->pb_type->name, pb->pb_graph_node->placement_index); } } else if (0 == strcmp(Parent.name(), "outputs")) { if (num_tokens != pb->pb_graph_node->num_output_pins[out_port]) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), - "Incorrect # pins %d found (expected %d) for output port %s for pb %s[%d].\n", - num_tokens, pb->pb_graph_node->num_output_pins[out_port], port_name.value(), pb->pb_graph_node->pb_type->name, - pb->pb_graph_node->placement_index); + "Incorrect # pins %d found (expected %d) for output port %s for pb %s[%d].\n", num_tokens, + pb->pb_graph_node->num_output_pins[out_port], port_name.value(), + pb->pb_graph_node->pb_type->name, pb->pb_graph_node->placement_index); } } else { VTR_ASSERT(0 == strcmp(Parent.name(), "clocks")); if (num_tokens != pb->pb_graph_node->num_clock_pins[clock_port]) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), - "Incorrect # pins %d found for clock port %s for pb %s[%d].\n", - num_tokens, pb->pb_graph_node->num_clock_pins[clock_port], port_name.value(), pb->pb_graph_node->pb_type->name, - pb->pb_graph_node->placement_index); + "Incorrect # pins %d found for clock port %s for pb %s[%d].\n", num_tokens, + pb->pb_graph_node->num_clock_pins[clock_port], port_name.value(), + pb->pb_graph_node->pb_type->name, pb->pb_graph_node->placement_index); } } @@ -742,8 +745,7 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, pb->pb_graph_node->pb_type->parent_mode->interconnect[0].line_num, pb->pb_graph_node->parent_pb_graph_node, pb->pb_graph_node->parent_pb_graph_node->child_pb_graph_nodes[pb->parent_pb->mode], - pin_name.c_str(), &num_ptrs, &num_sets, true, - true); + pin_name.c_str(), &num_ptrs, &num_sets, true, true); VTR_ASSERT(num_sets == 1 && num_ptrs[0] == 1); const t_pb_graph_pin* pb_gpin = nullptr; @@ -761,7 +763,8 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, found = false; for (j = 0; j < pin_node[0][0]->num_output_edges; j++) { - if (0 == strcmp(interconnect_name.c_str(), pin_node[0][0]->output_edges[j]->interconnect->name)) { + if (0 + == strcmp(interconnect_name.c_str(), pin_node[0][0]->output_edges[j]->interconnect->name)) { found = true; break; } @@ -773,8 +776,8 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, delete[] num_ptrs; if (!found) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), - "Unknown interconnect %s connecting to pin %s.\n", - interconnect_name.c_str(), pin_name.c_str()); + "Unknown interconnect %s connecting to pin %s.\n", interconnect_name.c_str(), + pin_name.c_str()); } } } @@ -815,10 +818,8 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, std::string interconnect_name = pins[i].substr(loc, std::string::npos); pin_node = alloc_and_load_port_pin_ptrs_from_string( - pb->pb_graph_node->pb_type->modes[pb->mode].interconnect->line_num, - pb->pb_graph_node, - pb->pb_graph_node->child_pb_graph_nodes[pb->mode], - pin_name.c_str(), &num_ptrs, &num_sets, true, + pb->pb_graph_node->pb_type->modes[pb->mode].interconnect->line_num, pb->pb_graph_node, + pb->pb_graph_node->child_pb_graph_nodes[pb->mode], pin_name.c_str(), &num_ptrs, &num_sets, true, true); VTR_ASSERT(num_sets == 1 && num_ptrs[0] == 1); int rr_node_index = pb->pb_graph_node->output_pins[out_port][i].pin_count_in_cluster; @@ -830,7 +831,8 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, found = false; for (j = 0; j < pin_node[0][0]->num_output_edges; j++) { - if (0 == strcmp(interconnect_name.c_str(), pin_node[0][0]->output_edges[j]->interconnect->name)) { + if (0 + == strcmp(interconnect_name.c_str(), pin_node[0][0]->output_edges[j]->interconnect->name)) { found = true; break; } @@ -842,8 +844,8 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, delete[] num_ptrs; if (!found) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(Cur), - "Unknown interconnect %s connecting to pin %s.\n", - interconnect_name.c_str(), pin_name.c_str()); + "Unknown interconnect %s connecting to pin %s.\n", interconnect_name.c_str(), + pin_name.c_str()); } } } @@ -852,17 +854,15 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, //Record any port rotation mappings for (auto pin_rot_map = pugiutil::get_first_child(Parent, "port_rotation_map", loc_data, pugiutil::OPTIONAL); - pin_rot_map; - pin_rot_map = pin_rot_map.next_sibling("port_rotation_map")) { + pin_rot_map; pin_rot_map = pin_rot_map.next_sibling("port_rotation_map")) { auto port_name = pugiutil::get_attribute(pin_rot_map, "name", loc_data).value(); const t_port* pb_gport = find_pb_graph_port(pb->pb_graph_node, port_name); if (pb_gport == nullptr) { vpr_throw(VPR_ERROR_NET_F, netlist_file_name, loc_data.line(pin_rot_map), - "Failed to find port with name '%s' on pb %s[%d]\n", - port_name, - pb->pb_graph_node->pb_type->name, pb->pb_graph_node->placement_index); + "Failed to find port with name '%s' on pb %s[%d]\n", port_name, pb->pb_graph_node->pb_type->name, + pb->pb_graph_node->placement_index); } auto pin_mapping = vtr::split(pin_rot_map.text().get()); @@ -875,7 +875,8 @@ static void processPorts(pugi::xml_node Parent, t_pb* pb, t_pb_routes& pb_route, } for (int ipin = 0; ipin < (int)pins.size(); ++ipin) { - if (pin_mapping[ipin] == "open") continue; //No mapping for this physical pin to atom pin + if (pin_mapping[ipin] == "open") + continue; //No mapping for this physical pin to atom pin int atom_pin_index = vtr::atoi(pin_mapping[ipin]); @@ -922,8 +923,7 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) { const t_pb* pb = clb_nlist.block_pb(blk_id); ipin = 0; - VTR_ASSERT(block_type->pb_type->num_input_pins - + block_type->pb_type->num_output_pins + VTR_ASSERT(block_type->pb_type->num_input_pins + block_type->pb_type->num_output_pins + block_type->pb_type->num_clock_pins == block_type->pb_type->num_pins); @@ -952,7 +952,8 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) { //Load the external nets connected to output ports for (j = 0; j < num_output_ports; j++) { - ClusterPortId output_port_id = clb_nlist.find_port(blk_id, block_type->pb_type->ports[j + num_input_ports].name); + ClusterPortId output_port_id + = clb_nlist.find_port(blk_id, block_type->pb_type->ports[j + num_input_ports].name); for (k = 0; k < pb->pb_graph_node->num_output_pins[j]; k++) { pb_graph_pin = &pb->pb_graph_node->output_pins[j][k]; VTR_ASSERT(pb_graph_pin->pin_count_in_cluster == ipin); @@ -966,7 +967,8 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) { AtomPinId atom_net_driver = atom_ctx.nlist.net_driver(atom_net_id); bool driver_is_constant = atom_ctx.nlist.pin_is_constant(atom_net_driver); - clb_nlist.create_pin(output_port_id, (BitIndex)k, clb_net_id, PinType::DRIVER, ipin, driver_is_constant); + clb_nlist.create_pin(output_port_id, (BitIndex)k, clb_net_id, PinType::DRIVER, ipin, + driver_is_constant); VTR_ASSERT(clb_nlist.net_is_constant(clb_net_id) == driver_is_constant); } @@ -977,7 +979,8 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) { //Load the external nets connected to clock ports for (j = 0; j < num_clock_ports; j++) { - ClusterPortId clock_port_id = clb_nlist.find_port(blk_id, block_type->pb_type->ports[j + num_input_ports + num_output_ports].name); + ClusterPortId clock_port_id + = clb_nlist.find_port(blk_id, block_type->pb_type->ports[j + num_input_ports + num_output_ports].name); for (k = 0; k < pb->pb_graph_node->num_clock_pins[j]; k++) { pb_graph_pin = &pb->pb_graph_node->clock_pins[j][k]; VTR_ASSERT(pb_graph_pin->pin_count_in_cluster == ipin); @@ -1017,15 +1020,19 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) { if (count[clb_net_id] > (int)clb_nlist.net_sinks(clb_net_id).size()) { VPR_FATAL_ERROR(VPR_ERROR_NET_F, - "net %s #%d inconsistency, expected %d terminals but encountered %d terminals, it is likely net terminal is disconnected in netlist file.\n", + "net %s #%d inconsistency, expected %d terminals but encountered %d terminals, " + "it is likely net terminal is disconnected in netlist file.\n", clb_nlist.net_name(clb_net_id).c_str(), size_t(clb_net_id), count[clb_net_id], clb_nlist.net_sinks(clb_net_id).size()); } //Asserts the ClusterBlockId is the same when ClusterNetId & pin BitIndex is provided - VTR_ASSERT(blk_id == clb_nlist.pin_block(*(clb_nlist.net_pins(clb_net_id).begin() + count[clb_net_id]))); + VTR_ASSERT(blk_id + == clb_nlist.pin_block(*(clb_nlist.net_pins(clb_net_id).begin() + count[clb_net_id]))); //Asserts the block's pin index is the same - VTR_ASSERT(j == clb_nlist.pin_logical_index(*(clb_nlist.net_pins(clb_net_id).begin() + count[clb_net_id]))); + VTR_ASSERT( + j + == clb_nlist.pin_logical_index(*(clb_nlist.net_pins(clb_net_id).begin() + count[clb_net_id]))); VTR_ASSERT(j == clb_nlist.net_pin_logical_index(clb_net_id, count[clb_net_id])); // nets connecting to global pins are marked as global nets @@ -1058,9 +1065,8 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) { int physical_pin = get_physical_pin(tile_type, block_type, logical_pin); if (tile_type->is_ignored_pin[physical_pin] != is_ignored_net) { - VTR_LOG_WARN( - "Netlist connects net %s to both global and non-global pins.\n", - clb_nlist.net_name(net_id).c_str()); + VTR_LOG_WARN("Netlist connects net %s to both global and non-global pins.\n", + clb_nlist.net_name(net_id).c_str()); } } } @@ -1071,7 +1077,8 @@ static void load_external_nets_and_cb(ClusteredNetlist& clb_nlist) { static void mark_constant_generators(const ClusteredNetlist& clb_nlist, int verbosity) { size_t const_gen_count = 0; for (auto blk_id : clb_nlist.blocks()) { - const_gen_count += mark_constant_generators_rec(clb_nlist.block_pb(blk_id), clb_nlist.block_pb(blk_id)->pb_route, verbosity); + const_gen_count += mark_constant_generators_rec(clb_nlist.block_pb(blk_id), + clb_nlist.block_pb(blk_id)->pb_route, verbosity); } VTR_LOG("Detected %zu constant generators (to see names run with higher pack verbosity)\n", const_gen_count); @@ -1100,7 +1107,8 @@ static size_t mark_constant_generators_rec(const t_pb* pb, const t_pb_routes& pb for (i = 0; i < pb->pb_graph_node->num_input_ports && const_gen == true; i++) { for (j = 0; j < pb->pb_graph_node->num_input_pins[i] && const_gen == true; j++) { int cluster_pin_idx = pb->pb_graph_node->input_pins[i][j].pin_count_in_cluster; - if (!pb_route.count(cluster_pin_idx)) continue; + if (!pb_route.count(cluster_pin_idx)) + continue; if (pb_route[cluster_pin_idx].atom_net_id) { const_gen = false; } @@ -1109,7 +1117,8 @@ static size_t mark_constant_generators_rec(const t_pb* pb, const t_pb_routes& pb for (i = 0; i < pb->pb_graph_node->num_clock_ports && const_gen == true; i++) { for (j = 0; j < pb->pb_graph_node->num_clock_pins[i] && const_gen == true; j++) { int cluster_pin_idx = pb->pb_graph_node->clock_pins[i][j].pin_count_in_cluster; - if (!pb_route.count(cluster_pin_idx)) continue; + if (!pb_route.count(cluster_pin_idx)) + continue; if (pb_route[cluster_pin_idx].atom_net_id) { const_gen = false; } @@ -1121,9 +1130,11 @@ static size_t mark_constant_generators_rec(const t_pb* pb, const t_pb_routes& pb for (i = 0; i < pb->pb_graph_node->num_output_ports; i++) { for (j = 0; j < pb->pb_graph_node->num_output_pins[i]; j++) { int cluster_pin_idx = pb->pb_graph_node->output_pins[i][j].pin_count_in_cluster; - if (!pb_route.count(cluster_pin_idx)) continue; + if (!pb_route.count(cluster_pin_idx)) + continue; if (pb_route[cluster_pin_idx].atom_net_id) { - AtomNetId net_id = pb_route[pb->pb_graph_node->output_pins[i][j].pin_count_in_cluster].atom_net_id; + AtomNetId net_id + = pb_route[pb->pb_graph_node->output_pins[i][j].pin_count_in_cluster].atom_net_id; AtomPinId driver_pin_id = atom_ctx.nlist.net_driver(net_id); VTR_ASSERT(atom_ctx.nlist.pin_is_constant(driver_pin_id)); } @@ -1150,7 +1161,8 @@ static void load_internal_to_block_net_nums(const t_logical_block_type_ptr type, int num_pins = type->pb_graph_head->total_pb_pins; for (int i = 0; i < num_pins; i++) { - if (!pb_route.count(i)) continue; + if (!pb_route.count(i)) + continue; if (pb_route[i].driver_pb_pin_id != OPEN && !pb_route[i].atom_net_id) { load_atom_index_for_pb_pin(pb_route, i); @@ -1187,14 +1199,15 @@ static void load_atom_pin_mapping(const ClusteredNetlist& clb_nlist) { VTR_ASSERT_MSG(pb, "Atom block must have a matching PB"); const t_pb_graph_node* gnode = pb->pb_graph_node; - VTR_ASSERT_MSG(gnode->pb_type->model == atom_ctx.nlist.block_model(blk), - "Atom block PB must match BLIF model"); + VTR_ASSERT_MSG(gnode->pb_type->model == atom_ctx.nlist.block_model(blk), "Atom block PB must match BLIF model"); for (int iport = 0; iport < gnode->num_input_ports; ++iport) { - if (gnode->num_input_pins[iport] <= 0) continue; + if (gnode->num_input_pins[iport] <= 0) + continue; const AtomPortId port = atom_ctx.nlist.find_atom_port(blk, gnode->input_pins[iport][0].port->model_port); - if (!port) continue; + if (!port) + continue; for (int ipin = 0; ipin < gnode->num_input_pins[iport]; ++ipin) { const t_pb_graph_pin* gpin = &gnode->input_pins[iport][ipin]; @@ -1205,10 +1218,12 @@ static void load_atom_pin_mapping(const ClusteredNetlist& clb_nlist) { } for (int iport = 0; iport < gnode->num_output_ports; ++iport) { - if (gnode->num_output_pins[iport] <= 0) continue; + if (gnode->num_output_pins[iport] <= 0) + continue; const AtomPortId port = atom_ctx.nlist.find_atom_port(blk, gnode->output_pins[iport][0].port->model_port); - if (!port) continue; + if (!port) + continue; for (int ipin = 0; ipin < gnode->num_output_pins[iport]; ++ipin) { const t_pb_graph_pin* gpin = &gnode->output_pins[iport][ipin]; @@ -1219,10 +1234,12 @@ static void load_atom_pin_mapping(const ClusteredNetlist& clb_nlist) { } for (int iport = 0; iport < gnode->num_clock_ports; ++iport) { - if (gnode->num_clock_pins[iport] <= 0) continue; + if (gnode->num_clock_pins[iport] <= 0) + continue; const AtomPortId port = atom_ctx.nlist.find_atom_port(blk, gnode->clock_pins[iport][0].port->model_port); - if (!port) continue; + if (!port) + continue; for (int ipin = 0; ipin < gnode->num_clock_pins[iport]; ++ipin) { const t_pb_graph_pin* gpin = &gnode->clock_pins[iport][ipin]; @@ -1234,7 +1251,10 @@ static void load_atom_pin_mapping(const ClusteredNetlist& clb_nlist) { } } -void set_atom_pin_mapping(const ClusteredNetlist& clb_nlist, const AtomBlockId atom_blk, const AtomPortId atom_port, const t_pb_graph_pin* gpin) { +void set_atom_pin_mapping(const ClusteredNetlist& clb_nlist, + const AtomBlockId atom_blk, + const AtomPortId atom_port, + const t_pb_graph_pin* gpin) { auto& atom_ctx = g_vpr_ctx.mutable_atom(); VTR_ASSERT(atom_ctx.nlist.port_block(atom_port) == atom_blk); diff --git a/vpr/src/base/read_netlist.h b/vpr/src/base/read_netlist.h index e430f278bd5..2fc0242d37f 100644 --- a/vpr/src/base/read_netlist.h +++ b/vpr/src/base/read_netlist.h @@ -12,10 +12,7 @@ #include "vpr_types.h" -ClusteredNetlist read_netlist(const char* net_file, - const t_arch* arch, - bool verify_file_digests, - int verbosity); +ClusteredNetlist read_netlist(const char* net_file, const t_arch* arch, bool verify_file_digests, int verbosity); void set_atom_pin_mapping(const ClusteredNetlist& clb_nlist, const AtomBlockId atom_blk, diff --git a/vpr/src/base/read_options.cpp b/vpr/src/base/read_options.cpp index 7ddaa08feff..f77b96553f6 100644 --- a/vpr/src/base/read_options.cpp +++ b/vpr/src/base/read_options.cpp @@ -38,7 +38,8 @@ struct ParseOnOff { conv_value.set_value(false); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to boolean (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to boolean (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -55,9 +56,7 @@ struct ParseOnOff { return conv_value; } - std::vector default_choices() { - return {"on", "off"}; - } + std::vector default_choices() { return {"on", "off"}; } }; struct ParseArchFormat { @@ -69,7 +68,8 @@ struct ParseArchFormat { conv_value.set_value(e_arch_format::FPGAInterchange); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_arch_format (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_arch_format (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -88,9 +88,7 @@ struct ParseArchFormat { return conv_value; } - std::vector default_choices() { - return {"vtr", "fpga-interchange"}; - } + std::vector default_choices() { return {"vtr", "fpga-interchange"}; } }; struct ParseCircuitFormat { ConvertedValue from_str(const std::string& str) { @@ -105,7 +103,8 @@ struct ParseCircuitFormat { conv_value.set_value(e_circuit_format::FPGA_INTERCHANGE); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_circuit_format (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_circuit_format (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -128,9 +127,7 @@ struct ParseCircuitFormat { return conv_value; } - std::vector default_choices() { - return {"auto", "blif", "eblif", "fpga-interchange"}; - } + std::vector default_choices() { return {"auto", "blif", "eblif", "fpga-interchange"}; } }; struct ParseRoutePredictor { ConvertedValue from_str(const std::string& str) { @@ -143,7 +140,9 @@ struct ParseRoutePredictor { conv_value.set_value(OFF); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_routing_failure_predictor (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_routing_failure_predictor (expected one of: " << argparse::join(default_choices(), ", ") + << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -163,9 +162,7 @@ struct ParseRoutePredictor { return conv_value; } - std::vector default_choices() { - return {"safe", "aggressive", "off"}; - } + std::vector default_choices() { return {"safe", "aggressive", "off"}; } }; struct ParseRouterAlgorithm { @@ -179,7 +176,8 @@ struct ParseRouterAlgorithm { conv_value.set_value(TIMING_DRIVEN); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -196,9 +194,7 @@ struct ParseRouterAlgorithm { return conv_value; } - std::vector default_choices() { - return {"parallel", "timing_driven"}; - } + std::vector default_choices() { return {"parallel", "timing_driven"}; } }; struct ParseNodeReorderAlgorithm { @@ -212,7 +208,9 @@ struct ParseNodeReorderAlgorithm { conv_value.set_value(RANDOM_SHUFFLE); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_rr_node_reorder_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_rr_node_reorder_algorithm (expected one of: " << argparse::join(default_choices(), ", ") + << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -231,9 +229,7 @@ struct ParseNodeReorderAlgorithm { return conv_value; } - std::vector default_choices() { - return {"none", "degree_bfs", "random_shuffle"}; - } + std::vector default_choices() { return {"none", "degree_bfs", "random_shuffle"}; } }; struct RouteBudgetsAlgorithm { @@ -249,7 +245,9 @@ struct RouteBudgetsAlgorithm { conv_value.set_value(DISABLE); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_routing_budget_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_routing_budget_algorithm (expected one of: " << argparse::join(default_choices(), ", ") + << ")"; conv_value.set_error(msg.str()); } @@ -271,9 +269,7 @@ struct RouteBudgetsAlgorithm { return conv_value; } - std::vector default_choices() { - return {"minimax", "yoyo", "scale_delay", "disable"}; - } + std::vector default_choices() { return {"minimax", "yoyo", "scale_delay", "disable"}; } }; struct ParseRouteType { @@ -285,7 +281,8 @@ struct ParseRouteType { conv_value.set_value(DETAILED); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -302,9 +299,7 @@ struct ParseRouteType { return conv_value; } - std::vector default_choices() { - return {"global", "detailed"}; - } + std::vector default_choices() { return {"global", "detailed"}; } }; struct ParseBaseCost { @@ -326,7 +321,8 @@ struct ParseBaseCost { conv_value.set_value(DELAY_NORMALIZED_LENGTH_BOUNDED); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -354,7 +350,13 @@ struct ParseBaseCost { } std::vector default_choices() { - return {"demand_only", "demand_only_normalized_length", "delay_normalized", "delay_normalized_length", "delay_normalized_length_bounded", "delay_normalized_frequency", "delay_normalized_length_frequency"}; + return {"demand_only", + "demand_only_normalized_length", + "delay_normalized", + "delay_normalized_length", + "delay_normalized_length_bounded", + "delay_normalized_frequency", + "delay_normalized_length_frequency"}; } }; @@ -367,7 +369,9 @@ struct ParsePlaceDeltaDelayAlgorithm { conv_value.set_value(e_place_delta_delay_algorithm::DIJKSTRA_EXPANSION); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_place_delta_delay_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_place_delta_delay_algorithm (expected one of: " << argparse::join(default_choices(), ", ") + << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -384,9 +388,7 @@ struct ParsePlaceDeltaDelayAlgorithm { return conv_value; } - std::vector default_choices() { - return {"astar", "dijkstra"}; - } + std::vector default_choices() { return {"astar", "dijkstra"}; } }; struct ParsePlaceAlgorithm { @@ -400,7 +402,8 @@ struct ParsePlaceAlgorithm { conv_value.set_value(SLACK_TIMING_PLACE); } else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_place_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_place_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; //Deprecated option: "path_timing_driven" -> PATH_DRIVEN_TIMING_PLACE //New option: "criticality_timing" -> CRITICALITY_TIMING_PLACE @@ -426,9 +429,7 @@ struct ParsePlaceAlgorithm { return conv_value; } - std::vector default_choices() { - return {"bounding_box", "criticality_timing", "slack_timing"}; - } + std::vector default_choices() { return {"bounding_box", "criticality_timing", "slack_timing"}; } }; struct ParsePlaceBoundingBox { @@ -442,7 +443,8 @@ struct ParsePlaceBoundingBox { conv_value.set_value(PER_LAYER_BB); } else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_place_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_place_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -461,9 +463,7 @@ struct ParsePlaceBoundingBox { return conv_value; } - std::vector default_choices() { - return {"auto_bb", "cube_bb", "per_layer_bb"}; - } + std::vector default_choices() { return {"auto_bb", "cube_bb", "per_layer_bb"}; } }; struct ParsePlaceAgentAlgorithm { @@ -475,7 +475,8 @@ struct ParsePlaceAgentAlgorithm { conv_value.set_value(SOFTMAX); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_agent_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_agent_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -492,9 +493,7 @@ struct ParsePlaceAgentAlgorithm { return conv_value; } - std::vector default_choices() { - return {"e_greedy", "softmax"}; - } + std::vector default_choices() { return {"e_greedy", "softmax"}; } }; struct ParsePlaceAgentSpace { @@ -506,7 +505,8 @@ struct ParsePlaceAgentSpace { conv_value.set_value(e_agent_space::MOVE_BLOCK_TYPE); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_agent_space (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_agent_space (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -523,9 +523,7 @@ struct ParsePlaceAgentSpace { return conv_value; } - std::vector default_choices() { - return {"move_type", "move_block_type"}; - } + std::vector default_choices() { return {"move_type", "move_block_type"}; } }; struct ParseFixPins { @@ -537,7 +535,8 @@ struct ParseFixPins { conv_value.set_value(e_pad_loc_type::RANDOM); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -554,9 +553,7 @@ struct ParseFixPins { return conv_value; } - std::vector default_choices() { - return {"free", "random"}; - } + std::vector default_choices() { return {"free", "random"}; } }; struct ParseClusterSeed { @@ -576,7 +573,8 @@ struct ParseClusterSeed { conv_value.set_value(e_cluster_seed::BLEND2); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -615,7 +613,8 @@ struct ParseConstantNetMethod { conv_value.set_value(CONSTANT_NET_ROUTE); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_constant_net_method (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_constant_net_method (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -632,9 +631,7 @@ struct ParseConstantNetMethod { return conv_value; } - std::vector default_choices() { - return {"global", "route"}; - } + std::vector default_choices() { return {"global", "route"}; } }; struct ParseTimingReportDetail { @@ -650,7 +647,8 @@ struct ParseTimingReportDetail { conv_value.set_value(e_timing_report_detail::DEBUG); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_timing_report_detail (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_timing_report_detail (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -672,9 +670,7 @@ struct ParseTimingReportDetail { return conv_value; } - std::vector default_choices() { - return {"netlist", "aggregated", "detailed", "debug"}; - } + std::vector default_choices() { return {"netlist", "aggregated", "detailed", "debug"}; } }; struct ParseClockModeling { @@ -688,10 +684,8 @@ struct ParseClockModeling { conv_value.set_value(DEDICATED_NETWORK); else { std::stringstream msg; - msg << "Invalid conversion from '" - << str - << "' to e_clock_modeling (expected one of: " - << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_clock_modeling (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -710,9 +704,7 @@ struct ParseClockModeling { return conv_value; } - std::vector default_choices() { - return {"ideal", "route", "dedicated_network"}; - } + std::vector default_choices() { return {"ideal", "route", "dedicated_network"}; } }; struct ParseUnrelatedClustering { @@ -726,10 +718,8 @@ struct ParseUnrelatedClustering { conv_value.set_value(e_unrelated_clustering::AUTO); else { std::stringstream msg; - msg << "Invalid conversion from '" - << str - << "' to e_unrelated_clustering (expected one of: " - << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_unrelated_clustering (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -748,9 +738,7 @@ struct ParseUnrelatedClustering { return conv_value; } - std::vector default_choices() { - return {"on", "off", "auto"}; - } + std::vector default_choices() { return {"on", "off", "auto"}; } }; struct ParseBalanceBlockTypeUtil { @@ -764,10 +752,9 @@ struct ParseBalanceBlockTypeUtil { conv_value.set_value(e_balance_block_type_util::AUTO); else { std::stringstream msg; - msg << "Invalid conversion from '" - << str - << "' to e_balance_block_type_util (expected one of: " - << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_balance_block_type_util (expected one of: " << argparse::join(default_choices(), ", ") + << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -786,9 +773,7 @@ struct ParseBalanceBlockTypeUtil { return conv_value; } - std::vector default_choices() { - return {"on", "off", "auto"}; - } + std::vector default_choices() { return {"on", "off", "auto"}; } }; struct ParseConstGenInference { @@ -802,10 +787,8 @@ struct ParseConstGenInference { conv_value.set_value(e_const_gen_inference::COMB_SEQ); else { std::stringstream msg; - msg << "Invalid conversion from '" - << str - << "' to e_const_gen_inference (expected one of: " - << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_const_gen_inference (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -824,9 +807,7 @@ struct ParseConstGenInference { return conv_value; } - std::vector default_choices() { - return {"none", "comb", "comb_seq"}; - } + std::vector default_choices() { return {"none", "comb", "comb_seq"}; } }; struct ParseIncrRerouteDelayRipup { @@ -840,10 +821,9 @@ struct ParseIncrRerouteDelayRipup { conv_value.set_value(e_incr_reroute_delay_ripup::AUTO); else { std::stringstream msg; - msg << "Invalid conversion from '" - << str - << "' to e_incr_reroute_delay_ripup (expected one of: " - << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_incr_reroute_delay_ripup (expected one of: " << argparse::join(default_choices(), ", ") + << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -862,9 +842,7 @@ struct ParseIncrRerouteDelayRipup { return conv_value; } - std::vector default_choices() { - return {"on", "off", "auto"}; - } + std::vector default_choices() { return {"on", "off", "auto"}; } }; struct ParseRouteBBUpdate { @@ -876,10 +854,8 @@ struct ParseRouteBBUpdate { conv_value.set_value(e_route_bb_update::DYNAMIC); else { std::stringstream msg; - msg << "Invalid conversion from '" - << str - << "' to e_route_bb_update (expected one of: " - << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_route_bb_update (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -896,9 +872,7 @@ struct ParseRouteBBUpdate { return conv_value; } - std::vector default_choices() { - return {"static", "dynamic"}; - } + std::vector default_choices() { return {"static", "dynamic"}; } }; struct ParseRouterLookahead { @@ -915,10 +889,8 @@ struct ParseRouterLookahead { conv_value.set_value(e_router_lookahead::EXTENDED_MAP); else { std::stringstream msg; - msg << "Invalid conversion from '" - << str - << "' to e_router_lookahead (expected one of: " - << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_router_lookahead (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -939,9 +911,7 @@ struct ParseRouterLookahead { return conv_value; } - std::vector default_choices() { - return {"classic", "map", "compressed_map", "extended_map"}; - } + std::vector default_choices() { return {"classic", "map", "compressed_map", "extended_map"}; } }; struct ParsePlaceDelayModel { @@ -955,7 +925,8 @@ struct ParsePlaceDelayModel { conv_value.set_value(PlaceDelayModelType::DELTA_OVERRIDE); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to PlaceDelayModelType (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to PlaceDelayModelType (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -977,9 +948,7 @@ struct ParsePlaceDelayModel { return conv_value; } - std::vector default_choices() { - return {"simple", "delta", "delta_override"}; - } + std::vector default_choices() { return {"simple", "delta", "delta_override"}; } }; struct ParseReducer { @@ -997,7 +966,8 @@ struct ParseReducer { conv_value.set_value(e_reducer::GEOMEAN); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_reducer (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_reducer (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -1020,9 +990,7 @@ struct ParseReducer { return conv_value; } - std::vector default_choices() { - return {"min", "max", "median", "arithmean", "geomean"}; - } + std::vector default_choices() { return {"min", "max", "median", "arithmean", "geomean"}; } }; struct ParseRouterFirstIterTiming { @@ -1034,7 +1002,8 @@ struct ParseRouterFirstIterTiming { conv_value.set_value(e_router_initial_timing::LOOKAHEAD); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_router_initial_timing (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_router_initial_timing (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -1051,9 +1020,7 @@ struct ParseRouterFirstIterTiming { return conv_value; } - std::vector default_choices() { - return {"all_critical", "lookahead"}; - } + std::vector default_choices() { return {"all_critical", "lookahead"}; } }; struct ParseRouterHeap { @@ -1065,7 +1032,8 @@ struct ParseRouterHeap { conv_value.set_value(e_heap_type::FOUR_ARY_HEAP); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_heap_type (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_heap_type (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -1082,9 +1050,7 @@ struct ParseRouterHeap { return conv_value; } - std::vector default_choices() { - return {"binary", "four_ary", "bucket"}; - } + std::vector default_choices() { return {"binary", "four_ary", "bucket"}; } }; struct ParseCheckRoute { @@ -1098,7 +1064,8 @@ struct ParseCheckRoute { conv_value.set_value(e_check_route_option::FULL); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_check_route_option (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_check_route_option (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -1117,9 +1084,7 @@ struct ParseCheckRoute { return conv_value; } - std::vector default_choices() { - return {"off", "quick", "full"}; - } + std::vector default_choices() { return {"off", "quick", "full"}; } }; struct ParsePlaceEfforScaling { @@ -1131,7 +1096,8 @@ struct ParsePlaceEfforScaling { conv_value.set_value(e_place_effort_scaling::DEVICE_CIRCUIT); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_place_effort_scaling (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_place_effort_scaling (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -1148,9 +1114,7 @@ struct ParsePlaceEfforScaling { return conv_value; } - std::vector default_choices() { - return {"circuit", "device_circuit"}; - } + std::vector default_choices() { return {"circuit", "device_circuit"}; } }; struct ParseTimingUpdateType { @@ -1164,7 +1128,8 @@ struct ParseTimingUpdateType { conv_value.set_value(e_timing_update_type::INCREMENTAL); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_timing_update_type (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str + << "' to e_timing_update_type (expected one of: " << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -1183,9 +1148,7 @@ struct ParseTimingUpdateType { return conv_value; } - std::vector default_choices() { - return {"auto", "full", "incremental"}; - } + std::vector default_choices() { return {"auto", "full", "incremental"}; } }; struct ParsePostSynthNetlistUnconnInputHandling { @@ -1201,7 +1164,8 @@ struct ParsePostSynthNetlistUnconnInputHandling { conv_value.set_value(e_post_synth_netlist_unconn_handling::VCC); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_post_synth_netlist_unconn_handling (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str << "' to e_post_synth_netlist_unconn_handling (expected one of: " + << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -1222,9 +1186,7 @@ struct ParsePostSynthNetlistUnconnInputHandling { return conv_value; } - std::vector default_choices() { - return {"unconnected", "nets", "gnd", "vcc"}; - } + std::vector default_choices() { return {"unconnected", "nets", "gnd", "vcc"}; } }; struct ParsePostSynthNetlistUnconnOutputHandling { @@ -1236,7 +1198,8 @@ struct ParsePostSynthNetlistUnconnOutputHandling { conv_value.set_value(e_post_synth_netlist_unconn_handling::NETS); else { std::stringstream msg; - msg << "Invalid conversion from '" << str << "' to e_post_synth_netlist_unconn_handling (expected one of: " << argparse::join(default_choices(), ", ") << ")"; + msg << "Invalid conversion from '" << str << "' to e_post_synth_netlist_unconn_handling (expected one of: " + << argparse::join(default_choices(), ", ") << ")"; conv_value.set_error(msg.str()); } return conv_value; @@ -1253,18 +1216,16 @@ struct ParsePostSynthNetlistUnconnOutputHandling { return conv_value; } - std::vector default_choices() { - return {"unconnected", "nets"}; - } + std::vector default_choices() { return {"unconnected", "nets"}; } }; argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_options& args) { - std::string description = - "Implements the specified circuit onto the target FPGA architecture" - " by performing packing/placement/routing, and analyzes the result.\n" - "\n" - "Attempts to find the minimum routable channel width, unless a fixed" - " channel width is specified with --route_chan_width."; + std::string description + = "Implements the specified circuit onto the target FPGA architecture" + " by performing packing/placement/routing, and analyzes the result.\n" + "\n" + "Attempts to find the minimum routable channel width, unless a fixed" + " channel width is specified with --route_chan_width."; auto parser = argparse::ArgumentParser(prog_name, description); std::string epilog = vtr::replace_all( @@ -1311,7 +1272,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("off"); stage_grp.add_argument(args.do_legalize, "--legalize") - .help("Legalize a flat placement, i.e. reconstruct and place clusters based on a flat placement file, which lists cluster and intra-cluster placement coordinates for each primitive.") + .help( + "Legalize a flat placement, i.e. reconstruct and place clusters based on a flat placement file, which " + "lists cluster and intra-cluster placement coordinates for each primitive.") .action(argparse::Action::STORE_TRUE) .default_value("off"); @@ -1321,7 +1284,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("off"); stage_grp.add_argument(args.do_analytical_placement, "--analytical_place") - .help("Run analytical placement. Analytical Placement uses an integrated packing and placement algorithm, using information from the primitive level to improve clustering and placement.") + .help( + "Run analytical placement. Analytical Placement uses an integrated packing and placement algorithm, using " + "information from the primitive level to improve clustering and placement.") .action(argparse::Action::STORE_TRUE) .default_value("off"); @@ -1488,7 +1453,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("1.0") .show_in(argparse::ShowIn::HELP_ONLY); - gen_grp.add_argument(args.constant_net_method, "--constant_net_method") + gen_grp + .add_argument(args.constant_net_method, "--constant_net_method") .help( "Specifies how constant nets (i.e. those driven to a constant\n" "value) are handled:\n" @@ -1528,8 +1494,10 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio "Controls whether VPR enforces some consistency checks strictly (as errors) or treats them as warnings." " Usually these checks indicate an issue with either the targeted architecture, or consistency issues" " with VPR's internal data structures/algorithms (possibly harming optimization quality)." - " In specific circumstances on specific architectures these checks may be too restrictive and can be turned off." - " However exercise extreme caution when turning this option off -- be sure you completely understand why the issue" + " In specific circumstances on specific architectures these checks may be too restrictive and can be " + "turned off." + " However exercise extreme caution when turning this option off -- be sure you completely understand why " + "the issue" " is being flagged, and why it is OK to treat as a warning instead of an error.") .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); @@ -1552,19 +1520,22 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio "This option should be only used for development purposes.") .default_value(""); - gen_grp.add_argument(args.allow_dangling_combinational_nodes, "--allow_dangling_combinational_nodes") + gen_grp + .add_argument(args.allow_dangling_combinational_nodes, "--allow_dangling_combinational_nodes") .help( "Option to allow dangling combinational nodes in the timing graph.\n" "This option should normally be off, as dangling combinational nodes are unusual\n" "in the timing graph and may indicate a problem in the circuit or architecture.\n" - "Unless you understand why your architecture/circuit can have valid dangling combinational nodes, this option should be off.\n" + "Unless you understand why your architecture/circuit can have valid dangling combinational nodes, this " + "option should be off.\n" "In general this is a dev-only option and should not be turned on by the end-user.") .default_value("off") .show_in(argparse::ShowIn::HELP_ONLY); gen_grp.add_argument(args.terminate_if_timing_fails, "--terminate_if_timing_fails") .help( - "During final timing analysis after routing, if a negative slack anywhere is returned and this option is set, \n" + "During final timing analysis after routing, if a negative slack anywhere is returned and this option is " + "set, \n" "VPR_FATAL_ERROR is called and processing ends.") .default_value("off"); @@ -1639,7 +1610,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); file_grp.add_argument(args.read_vpr_constraints_file, "--read_vpr_constraints") - .help("Reads the floorplanning constraints that packing and placement must respect from the specified XML file.") + .help( + "Reads the floorplanning constraints that packing and placement must respect from the specified XML file.") .show_in(argparse::ShowIn::HELP_ONLY); file_grp.add_argument(args.write_vpr_constraints_file, "--write_vpr_constraints") @@ -1648,18 +1620,21 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio file_grp.add_argument(args.write_constraints_file, "--write_fix_clusters") .help( - "Output file containing fixed locations of legalized input clusters - does not include clusters without placement coordinates; this file is used during post-legalization placement in order to hold input placement coordinates fixed while VPR places legalizer-generated orphan clusters.") + "Output file containing fixed locations of legalized input clusters - does not include clusters without " + "placement coordinates; this file is used during post-legalization placement in order to hold input " + "placement coordinates fixed while VPR places legalizer-generated orphan clusters.") .default_value("fix_clusters.out") .show_in(argparse::ShowIn::HELP_ONLY); file_grp.add_argument(args.write_flat_place_file, "--write_flat_place") .help( - "VPR's (or reconstructed external) placement solution in flat placement file format; this file lists cluster and intra-cluster placement coordinates for each atom and can be used to reconstruct a clustering and placement solution.") + "VPR's (or reconstructed external) placement solution in flat placement file format; this file lists " + "cluster and intra-cluster placement coordinates for each atom and can be used to reconstruct a clustering " + "and placement solution.") .show_in(argparse::ShowIn::HELP_ONLY); file_grp.add_argument(args.read_router_lookahead, "--read_router_lookahead") - .help( - "Reads the lookahead data from the specified file instead of computing it.") + .help("Reads the lookahead data from the specified file instead of computing it.") .show_in(argparse::ShowIn::HELP_ONLY); file_grp.add_argument(args.read_intra_cluster_router_lookahead, "--read_intra_cluster_router_lookahead") @@ -1675,8 +1650,7 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); file_grp.add_argument(args.read_placement_delay_lookup, "--read_placement_delay_lookup") - .help( - "Reads the placement delay lookup from the specified file instead of computing it.") + .help("Reads the placement delay lookup from the specified file instead of computing it.") .show_in(argparse::ShowIn::HELP_ONLY); file_grp.add_argument(args.write_placement_delay_lookup, "--write_placement_delay_lookup") @@ -1698,7 +1672,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); - netlist_grp.add_argument(args.const_gen_inference, "--const_gen_inference") + netlist_grp + .add_argument(args.const_gen_inference, "--const_gen_inference") .help( "Controls how constant generators are detected\n" " * none : No constant generator inference is performed\n" @@ -1748,10 +1723,13 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); - pack_grp.add_argument(args.allow_unrelated_clustering, "--allow_unrelated_clustering") + pack_grp + .add_argument(args.allow_unrelated_clustering, + "--allow_unrelated_clustering") .help( "Controls whether primitives with no attraction to a cluster can be packed into it.\n" - "Turning unrelated clustering on can increase packing density (fewer blocks are used), but at the cost of worse routability.\n" + "Turning unrelated clustering on can increase packing density (fewer blocks are used), but at the cost of " + "worse routability.\n" " * on : Unrelated clustering enabled\n" " * off : Unrelated clustering disabled\n" " * auto: Dynamically enabled/disabled (based on density)\n") @@ -1784,7 +1762,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio " (Default: blend2 if timing driven, max_inputs otherwise)") .show_in(argparse::ShowIn::HELP_ONLY); - pack_grp.add_argument(args.enable_clustering_pin_feasibility_filter, "--clustering_pin_feasibility_filter") + pack_grp + .add_argument(args.enable_clustering_pin_feasibility_filter, + "--clustering_pin_feasibility_filter") .help( "Controls whether the pin counting feasibility filter is used during clustering." " When enabled the clustering engine counts the number of available pins in" @@ -1795,7 +1775,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); - pack_grp.add_argument(args.balance_block_type_utilization, "--balance_block_type_utilization") + pack_grp + .add_argument(args.balance_block_type_utilization, + "--balance_block_type_utilization") .help( "If enabled, when a primitive can potentially be mapped to multiple block types the packer will\n" "pick the block type which (currently) has the lowest utilization.\n" @@ -1841,7 +1823,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value({"auto"}) .show_in(argparse::ShowIn::HELP_ONLY); - pack_grp.add_argument(args.pack_prioritize_transitive_connectivity, "--pack_prioritize_transitive_connectivity") + pack_grp + .add_argument(args.pack_prioritize_transitive_connectivity, + "--pack_prioritize_transitive_connectivity") .help("Whether transitive connectivity is prioritized over high-fanout connectivity during packing") .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); @@ -1883,18 +1867,21 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); pack_grp.add_argument(args.pack_verbosity, "--pack_verbosity") - .help("Controls how verbose clustering's output is. Higher values produce more output (useful for debugging architecture packing problems)") + .help( + "Controls how verbose clustering's output is. Higher values produce more output (useful for debugging " + "architecture packing problems)") .default_value("2") .show_in(argparse::ShowIn::HELP_ONLY); pack_grp.add_argument(args.use_attraction_groups, "--use_attraction_groups") - .help("Whether attraction groups are used to make it easier to pack primitives in the same floorplan region together.") + .help( + "Whether attraction groups are used to make it easier to pack primitives in the same floorplan region " + "together.") .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); pack_grp.add_argument(args.pack_num_moves, "--pack_num_moves") - .help( - "The number of moves that can be tried in packing stage") + .help("The number of moves that can be tried in packing stage") .default_value("100000") .show_in(argparse::ShowIn::HELP_ONLY); @@ -1912,9 +1899,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("1") .show_in(argparse::ShowIn::HELP_ONLY); - place_grp.add_argument( - args.place_delta_delay_matrix_calculation_method, - "--place_delta_delay_matrix_calculation_method") + place_grp + .add_argument( + args.place_delta_delay_matrix_calculation_method, "--place_delta_delay_matrix_calculation_method") .help( "What algorithm should be used to compute the place delta matrix.\n" "\n" @@ -1930,7 +1917,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("0.5") .show_in(argparse::ShowIn::HELP_ONLY); - place_grp.add_argument(args.place_effort_scaling, "--place_effort_scaling") + place_grp + .add_argument(args.place_effort_scaling, + "--place_effort_scaling") .help( "Controls how the number of placer moves level scales with circuit\n" " and device size:\n" @@ -1958,32 +1947,29 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.PlaceAlphaMin, "--alpha_min") - .help( - "For placement using Dusty's annealing schedule. Minimum (starting) value of alpha.") + .help("For placement using Dusty's annealing schedule. Minimum (starting) value of alpha.") .default_value("0.2") .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.PlaceAlphaMax, "--alpha_max") - .help( - "For placement using Dusty's annealing schedule. Maximum (stopping) value of alpha.") + .help("For placement using Dusty's annealing schedule. Maximum (stopping) value of alpha.") .default_value("0.9") .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.PlaceAlphaDecay, "--alpha_decay") - .help( - "For placement using Dusty's annealing schedule. The value that alpha is scaled by after reset.") + .help("For placement using Dusty's annealing schedule. The value that alpha is scaled by after reset.") .default_value("0.7") .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.PlaceSuccessMin, "--anneal_success_min") .help( - "For placement using Dusty's annealing schedule. Minimum success ratio when annealing before resetting the temperature to maintain the target success ratio.") + "For placement using Dusty's annealing schedule. Minimum success ratio when annealing before resetting the " + "temperature to maintain the target success ratio.") .default_value("0.1") .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.PlaceSuccessTarget, "--anneal_success_target") - .help( - "For placement using Dusty's annealing schedule. Target success ratio when annealing.") + .help("For placement using Dusty's annealing schedule. Target success ratio when annealing.") .default_value("0.25") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2006,20 +1992,25 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio place_grp.add_argument(args.PlaceAlgorithm, "--place_algorithm") .help( "Controls which placement algorithm is used. Valid options:\n" - " * bounding_box: Focuses purely on minimizing the bounding box wirelength of the circuit. Turns off timing analysis if specified.\n" - " * criticality_timing: Focuses on minimizing both the wirelength and the connection timing costs (criticality * delay).\n" + " * bounding_box: Focuses purely on minimizing the bounding box wirelength of the circuit. Turns off " + "timing analysis if specified.\n" + " * criticality_timing: Focuses on minimizing both the wirelength and the connection timing costs " + "(criticality * delay).\n" " * slack_timing: Focuses on improving the circuit slack values to reduce critical path delay.\n") .default_value("criticality_timing") .choices({"bounding_box", "criticality_timing", "slack_timing"}) .show_in(argparse::ShowIn::HELP_ONLY); - place_grp.add_argument(args.PlaceQuenchAlgorithm, "--place_quench_algorithm") + place_grp + .add_argument(args.PlaceQuenchAlgorithm, "--place_quench_algorithm") .help( "Controls which placement algorithm is used during placement quench.\n" "If specified, it overrides the option --place_algorithm during placement quench.\n" "Valid options:\n" - " * bounding_box: Focuses purely on minimizing the bounding box wirelength of the circuit. Turns off timing analysis if specified.\n" - " * criticality_timing: Focuses on minimizing both the wirelength and the connection timing costs (criticality * delay).\n" + " * bounding_box: Focuses purely on minimizing the bounding box wirelength of the circuit. Turns off " + "timing analysis if specified.\n" + " * criticality_timing: Focuses on minimizing both the wirelength and the connection timing costs " + "(criticality * delay).\n" " * slack_timing: Focuses on improving the circuit slack values to reduce critical path delay.\n") .default_value("criticality_timing") .choices({"bounding_box", "criticality_timing", "slack_timing"}) @@ -2041,22 +2032,24 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.place_move_stats_file, "--place_move_stats") - .help( - "File to write detailed placer move statistics to") + .help("File to write detailed placer move statistics to") .default_value("") .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.placement_saves_per_temperature, "--save_placement_per_temperature") .help( - "Controls how often VPR saves the current placement to a file per temperature (may be helpful for debugging)." - " The value specifies how many times the placement should be saved (values less than 1 disable this feature).") + "Controls how often VPR saves the current placement to a file per temperature (may be helpful for " + "debugging)." + " The value specifies how many times the placement should be saved (values less than 1 disable this " + "feature).") .default_value("0") .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.enable_analytic_placer, "--enable_analytic_placer") .help( "Enables the analytic placer. " - "Once analytic placement is done, the result is passed through the quench phase of the annealing placer for local improvement") + "Once analytic placement is done, the result is passed through the quench phase of the annealing placer " + "for local improvement") .default_value("false") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2067,30 +2060,35 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio "For timing-driven placement, all probabilities should be provided. " "When the number of provided probabilities is less then the number of move types, zero probability " "is assumed." - "The numbers listed are interpreted as the percentage probabilities of {UniformMove, MedianMove, CentroidMove, " + "The numbers listed are interpreted as the percentage probabilities of {UniformMove, MedianMove, " + "CentroidMove, " "WeightedCentroid, WeightedMedian, Critical UniformMove, Timing feasible Region(TFR)}, in that order.") .nargs('+') .default_value({"100"}) .show_in(argparse::ShowIn::HELP_ONLY); - place_grp.add_argument(args.place_high_fanout_net, "--place_high_fanout_net") .help( "Sets the assumed high fanout net during placement. " - "Any net with higher fanout would be ignored while calculating some of the directed moves: Median and WeightedMedian") + "Any net with higher fanout would be ignored while calculating some of the directed moves: Median and " + "WeightedMedian") .default_value("10") .show_in(argparse::ShowIn::HELP_ONLY); - place_grp.add_argument(args.place_bounding_box_mode, "--place_bounding_box_mode") + place_grp + .add_argument(args.place_bounding_box_mode, + "--place_bounding_box_mode") .help( "Specifies the type of bounding box to be used in 3D architectures.\n" "\n" "MODE options:\n" - " auto_bb : Automatically determine the appropriate bounding box based on the connections between layers.\n" + " auto_bb : Automatically determine the appropriate bounding box based on the connections between " + "layers.\n" " cube_bb : Use 3D bounding boxes.\n" " per_layer_bb : Use per-layer bounding boxes.\n" "\n" - "Choose one of the available modes to define the behavior of bounding boxes in your 3D architecture. The default mode is 'automatic'.") + "Choose one of the available modes to define the behavior of bounding boxes in your 3D architecture. The " + "default mode is 'automatic'.") .default_value("auto_bb") .choices({"auto_bb", "cube_bb", "per_layer_bb"}) .show_in(argparse::ShowIn::HELP_ONLY); @@ -2105,13 +2103,15 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio place_grp.add_argument(args.place_agent_multistate, "--place_agent_multistate") .help( "Enable multistate agent. " - "A second state will be activated late in the annealing and in the Quench that includes all the timing driven directed moves.") + "A second state will be activated late in the annealing and in the Quench that includes all the timing " + "driven directed moves.") .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); place_grp.add_argument(args.place_checkpointing, "--place_checkpointing") .help( - "Enable Placement checkpoints. This means saving the placement and restore it if it's better than later placements." + "Enable Placement checkpoints. This means saving the placement and restore it if it's better than later " + "placements." "Only effective if agnet's 2nd state is activated.") .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2126,7 +2126,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio place_grp.add_argument(args.place_agent_gamma, "--place_agent_gamma") .help( "Controls how quickly the agent's memory decays. " - "Values between [0., 1.] specify the fraction of weight in the exponentially weighted reward average applied to moves which occured greater than moves_per_temp moves ago." + "Values between [0., 1.] specify the fraction of weight in the exponentially weighted reward average " + "applied to moves which occured greater than moves_per_temp moves ago." "Values < 0 cause the unweighted reward sample average to be used (all samples are weighted equally)") .default_value("0.05") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2196,7 +2197,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio * .default_value("0") * .show_in(argparse::ShowIn::HELP_ONLY); */ - place_grp.add_argument(args.place_agent_algorithm, "--place_agent_algorithm") + place_grp + .add_argument(args.place_agent_algorithm, + "--place_agent_algorithm") .help("Controls which placement RL agent is used") .default_value("softmax") .choices({"e_greedy", "softmax"}) @@ -2274,7 +2277,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("8.0") .show_in(argparse::ShowIn::HELP_ONLY); - place_timing_grp.add_argument(args.place_delay_model, "--place_delay_model") + place_timing_grp + .add_argument(args.place_delay_model, "--place_delay_model") .help( "This option controls what information is considered and how" " the placement delay model is constructed.\n" @@ -2285,14 +2289,14 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("simple") .show_in(argparse::ShowIn::HELP_ONLY); - place_timing_grp.add_argument(args.place_delay_model_reducer, "--place_delay_model_reducer") + place_timing_grp + .add_argument(args.place_delay_model_reducer, "--place_delay_model_reducer") .help("When calculating delta delays for the placment delay model how are multiple values combined?") .default_value("min") .show_in(argparse::ShowIn::HELP_ONLY); place_timing_grp.add_argument(args.place_delay_offset, "--place_delay_offset") - .help( - "A constant offset (in seconds) applied to the placer's delay model.") + .help("A constant offset (in seconds) applied to the placer's delay model.") .default_value("0.0") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2304,7 +2308,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); place_timing_grp.add_argument(args.place_delay_ramp_slope, "--place_delay_ramp_slope") - .help("The slope of the ramp (in seconds per grid tile) which is applied to the placer delay model for delta distance beyond --place_delay_ramp_delta_threshold") + .help( + "The slope of the ramp (in seconds per grid tile) which is applied to the placer delay model for delta " + "distance beyond --place_delay_ramp_delta_threshold") .default_value("0.0e-9") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2374,7 +2380,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); route_grp.add_argument(args.bb_factor, "--bb_factor") - .help("Sets the distance (in channels) outside a connection's bounding box which can be explored during routing") + .help( + "Sets the distance (in channels) outside a connection's bounding box which can be explored during routing") .default_value("3") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2435,7 +2442,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio "Specifies the router algorithm to use.\n" " * timing driven: focuses on routability and circuit speed [default]\n" " * parallel: timing_driven with nets in different regions of the chip routed in parallel\n" - " * parallel_decomp: timing_driven with additional parallelism obtained by decomposing high-fanout nets, possibly reducing quality\n") + " * parallel_decomp: timing_driven with additional parallelism obtained by decomposing high-fanout nets, " + "possibly reducing quality\n") .default_value("timing_driven") .choices({"parallel", "parallel_decomp", "timing_driven"}) .show_in(argparse::ShowIn::HELP_ONLY); @@ -2445,7 +2453,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("16") .show_in(argparse::ShowIn::HELP_ONLY); - route_grp.add_argument(args.exit_after_first_routing_iteration, "--exit_after_first_routing_iteration") + route_grp + .add_argument(args.exit_after_first_routing_iteration, "--exit_after_first_routing_iteration") .help("Causes VPR to exit after the first routing iteration (useful for saving graphics)") .default_value("off") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2460,7 +2469,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("off") .show_in(argparse::ShowIn::HELP_ONLY); - route_grp.add_argument(args.reorder_rr_graph_nodes_algorithm, "--reorder_rr_graph_nodes_algorithm") + route_grp + .add_argument(args.reorder_rr_graph_nodes_algorithm, + "--reorder_rr_graph_nodes_algorithm") .help( "Specifies the node reordering algorithm to use.\n" " * none: don't reorder nodes\n" @@ -2471,14 +2482,12 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); route_grp.add_argument(args.reorder_rr_graph_nodes_threshold, "--reorder_rr_graph_nodes_threshold") - .help( - "Reorder rr_graph nodes to optimize memory layout above this number of nodes.") + .help("Reorder rr_graph nodes to optimize memory layout above this number of nodes.") .default_value("0") .show_in(argparse::ShowIn::HELP_ONLY); route_grp.add_argument(args.reorder_rr_graph_nodes_seed, "--reorder_rr_graph_nodes_seed") - .help( - "Pseudo-random number generator seed used for the random_shuffle reordering algorithm") + .help("Pseudo-random number generator seed used for the random_shuffle reordering algorithm") .default_value("1") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2490,23 +2499,26 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio route_grp.add_argument(args.router_opt_choke_points, "--router_opt_choke_points") .help( "" - "Some FPGA architectures with limited fan-out options within a cluster (e.g. fracturable LUTs with shared pins) do" - " not converge well in routing unless these fan-out choke points are discovered and optimized for during net routing." + "Some FPGA architectures with limited fan-out options within a cluster (e.g. fracturable LUTs with shared " + "pins) do" + " not converge well in routing unless these fan-out choke points are discovered and optimized for during " + "net routing." " This option helps router convergence for such architectures.") .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); - route_grp.add_argument(args.route_verbosity, "--route_verbosity") - .help("Controls the verbosity of routing's output. Higher values produce more output (useful for debugging routing problems)") + .help( + "Controls the verbosity of routing's output. Higher values produce more output (useful for debugging " + "routing problems)") .default_value("1") .show_in(argparse::ShowIn::HELP_ONLY); route_grp.add_argument(args.custom_3d_sb_fanin_fanout, "--custom_3d_sb_fanin_fanout") - .help( - "Specifies the number of tracks that can drive a 3D switch block connection" - "and the number of tracks that can be driven by a 3D switch block connection") - .default_value("1") - .show_in(argparse::ShowIn::HELP_ONLY); + .help( + "Specifies the number of tracks that can drive a 3D switch block connection" + "and the number of tracks that can be driven by a 3D switch block connection") + .default_value("1") + .show_in(argparse::ShowIn::HELP_ONLY); auto& route_timing_grp = parser.add_argument_group("timing-driven routing options"); @@ -2549,36 +2561,49 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("1.0") .show_in(argparse::ShowIn::HELP_ONLY); - route_timing_grp.add_argument(args.router_init_wirelength_abort_threshold, "--router_init_wirelength_abort_threshold") + route_timing_grp + .add_argument(args.router_init_wirelength_abort_threshold, "--router_init_wirelength_abort_threshold") .help( "The first routing iteration wirelength abort threshold." " If the first routing iteration uses more than this fraction of available wirelength routing is aborted.") .default_value("0.85") .show_in(argparse::ShowIn::HELP_ONLY); - route_timing_grp.add_argument(args.incr_reroute_delay_ripup, "--incremental_reroute_delay_ripup") - .help("Controls whether incremental net routing will rip-up (and re-route) a critical connection for delay, even if the routing is legal.") + route_timing_grp + .add_argument(args.incr_reroute_delay_ripup, + "--incremental_reroute_delay_ripup") + .help( + "Controls whether incremental net routing will rip-up (and re-route) a critical connection for delay, even " + "if the routing is legal.") .default_value("auto") .show_in(argparse::ShowIn::HELP_ONLY); - route_timing_grp.add_argument(args.routing_failure_predictor, "--routing_failure_predictor") + route_timing_grp + .add_argument(args.routing_failure_predictor, + "--routing_failure_predictor") .help( "Controls how aggressively the router will predict a routing as unsuccessful" " and give up early. This can significantly reducing the run-time required" " to find the minimum channel width.\n" " * safe: Only abort when it is extremely unlikely a routing will succeed\n" - " * aggressive: Further reduce run-time by giving up earlier. This may increase the reported minimum channel width\n" + " * aggressive: Further reduce run-time by giving up earlier. This may increase the reported minimum " + "channel width\n" " * off: Only abort when the maximum number of iterations is reached\n") .default_value("safe") .choices({"safe", "aggressive", "off"}) .show_in(argparse::ShowIn::HELP_ONLY); - route_timing_grp.add_argument(args.routing_budgets_algorithm, "--routing_budgets_algorithm") + route_timing_grp + .add_argument(args.routing_budgets_algorithm, + "--routing_budgets_algorithm") .help( "Controls how the routing budgets are created and applied.\n" - " * yoyo: Allocates budgets using minimax algorithm, and enables hold slack resolution in the router using the RCV algorithm. [EXPERIMENTAL]\n" - " * minimax: Sets the budgets depending on the amount slack between connections and the current delay values. [EXPERIMENTAL]\n" - " * scale_delay: Sets the minimum budgets to 0 and the maximum budgets as a function of delay and criticality (net delay/ pin criticality) [EXPERIMENTAL]\n" + " * yoyo: Allocates budgets using minimax algorithm, and enables hold slack resolution in the router using " + "the RCV algorithm. [EXPERIMENTAL]\n" + " * minimax: Sets the budgets depending on the amount slack between connections and the current delay " + "values. [EXPERIMENTAL]\n" + " * scale_delay: Sets the minimum budgets to 0 and the maximum budgets as a function of delay and " + "criticality (net delay/ pin criticality) [EXPERIMENTAL]\n" " * disable: Removes the routing budgets, use the default VPR and ignore hold time constraints\n") .default_value("disable") .choices({"minimax", "scale_delay", "yoyo", "disable"}) @@ -2591,7 +2616,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("off") .show_in(argparse::ShowIn::HELP_ONLY); - route_timing_grp.add_argument(args.congested_routing_iteration_threshold_frac, "--congested_routing_iteration_threshold") + route_timing_grp + .add_argument(args.congested_routing_iteration_threshold_frac, "--congested_routing_iteration_threshold") .help( "Controls when the router enters a high effort mode to resolve lingering routing congestion." " Value is the fraction of max_router_iterations beyond which the routing is deemed congested.") @@ -2621,13 +2647,15 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("0.1") .show_in(argparse::ShowIn::HELP_ONLY); - route_timing_grp.add_argument(args.router_lookahead_type, "--router_lookahead") + route_timing_grp + .add_argument(args.router_lookahead_type, "--router_lookahead") .help( "Controls what lookahead the router uses to calculate cost of completing a connection.\n" " * classic: The classic VPR lookahead (may perform better on un-buffered routing\n" " architectures)\n" " * map: An advanced lookahead which accounts for diverse wire type\n" - " * compressed_map: The algorithm is similar to map lookahead with the exception of sparse sampling of the chip" + " * compressed_map: The algorithm is similar to map lookahead with the exception of sparse sampling of the " + "chip" " to reduce the run-time to build the router lookahead and also its memory footprint\n" " * extended_map: A more advanced and extended lookahead which accounts for a more\n" " exhaustive node sampling method\n" @@ -2655,7 +2683,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("0.99") .show_in(argparse::ShowIn::HELP_ONLY); - route_timing_grp.add_argument(args.router_initial_timing, "--router_initial_timing") + route_timing_grp + .add_argument(args.router_initial_timing, + "--router_initial_timing") .help( "Controls how criticality is determined at the start of the first routing iteration.\n" " * all_critical: All connections are considered timing\n" @@ -2669,7 +2699,8 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("lookahead") .show_in(argparse::ShowIn::HELP_ONLY); - route_timing_grp.add_argument(args.router_update_lower_bound_delays, "--router_update_lower_bound_delays") + route_timing_grp + .add_argument(args.router_update_lower_bound_delays, "--router_update_lower_bound_delays") .help("Controls whether the router updates lower bound connection delays after the 1st routing iteration.") .default_value("on") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2692,7 +2723,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .show_in(argparse::ShowIn::HELP_ONLY); route_timing_grp.add_argument(args.read_rr_edge_metadata, "--read_rr_edge_metadata") - .help("Read RR edge metadata from --read_rr_graph. RR edge metadata is not used in core VPR algorithms, and is typically not read to save runtime and memory. (Default: off).") + .help( + "Read RR edge metadata from --read_rr_graph. RR edge metadata is not used in core VPR algorithms, and is " + "typically not read to save runtime and memory. (Default: off).") .default_value("off") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2756,7 +2789,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("off") .show_in(argparse::ShowIn::HELP_ONLY); - analysis_grp.add_argument(args.Generate_Post_Implementation_Merged_Netlist, "--gen_post_implementation_merged_netlist") + analysis_grp + .add_argument(args.Generate_Post_Implementation_Merged_Netlist, + "--gen_post_implementation_merged_netlist") .help( "Generates the post-implementation netlist with merged top module ports" " Used for post-implementation simulation and verification") @@ -2768,7 +2803,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("100") .show_in(argparse::ShowIn::HELP_ONLY); - analysis_grp.add_argument(args.timing_report_detail, "--timing_report_detail") + analysis_grp + .add_argument(args.timing_report_detail, + "--timing_report_detail") .help( "Controls how much detail is provided in timing reports.\n" " * netlist: Shows only netlist pins\n" @@ -2793,7 +2830,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("-1") .show_in(argparse::ShowIn::HELP_ONLY); - analysis_grp.add_argument(args.post_synth_netlist_unconn_input_handling, "--post_synth_netlist_unconn_inputs") + analysis_grp + .add_argument( + args.post_synth_netlist_unconn_input_handling, "--post_synth_netlist_unconn_inputs") .help( "Controls how unconnected input cell ports are handled in the post-synthesis netlist\n" " * unconnected: leave unconnected\n" @@ -2805,7 +2844,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .default_value("unconnected") .show_in(argparse::ShowIn::HELP_ONLY); - analysis_grp.add_argument(args.post_synth_netlist_unconn_output_handling, "--post_synth_netlist_unconn_outputs") + analysis_grp + .add_argument( + args.post_synth_netlist_unconn_output_handling, "--post_synth_netlist_unconn_outputs") .help( "Controls how unconnected output cell ports are handled in the post-synthesis netlist\n" " * unconnected: leave unconnected\n" @@ -2855,13 +2896,20 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio noc_grp.add_argument(args.noc_routing_algorithm, "--noc_routing_algorithm") .help( "Controls the algorithm used by the NoC to route packets.\n" - "* xy_routing: Uses the direction oriented routing algorithm. This is recommended to be used with mesh NoC topologies.\n" - "* bfs_routing: Uses the breadth first search algorithm. The objective is to find a route that uses a minimum number of links. " - " This algorithm is not guaranteed to generate deadlock-free traffic flow routes, but can be used with any NoC topology\n" - "* west_first_routing: Uses the west-first routing algorithm. This is recommended to be used with mesh NoC topologies.\n" - "* north_last_routing: Uses the north-last routing algorithm. This is recommended to be used with mesh NoC topologies.\n" - "* negative_first_routing: Uses the negative-first routing algorithm. This is recommended to be used with mesh NoC topologies.\n" - "* odd_even_routing: Uses the odd-even routing algorithm. This is recommended to be used with mesh NoC topologies.\n") + "* xy_routing: Uses the direction oriented routing algorithm. This is recommended to be used with mesh NoC " + "topologies.\n" + "* bfs_routing: Uses the breadth first search algorithm. The objective is to find a route that uses a " + "minimum number of links. " + " This algorithm is not guaranteed to generate deadlock-free traffic flow routes, but can be used with any " + "NoC topology\n" + "* west_first_routing: Uses the west-first routing algorithm. This is recommended to be used with mesh NoC " + "topologies.\n" + "* north_last_routing: Uses the north-last routing algorithm. This is recommended to be used with mesh NoC " + "topologies.\n" + "* negative_first_routing: Uses the negative-first routing algorithm. This is recommended to be used with " + "mesh NoC topologies.\n" + "* odd_even_routing: Uses the odd-even routing algorithm. This is recommended to be used with mesh NoC " + "topologies.\n") .default_value("bfs_routing") .choices({"xy_routing", "bfs_routing", "west_first_routing", "north_last_routing", "negative_first_routing", "odd_even_routing"}) @@ -2880,8 +2928,10 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .help( "Controls the importance of minimizing the NoC aggregate bandwidth.\n" "This value can be >=0, where 0 would mean the aggregate bandwidth has no relevance to placement.\n" - "Other positive numbers specify the importance of minimizing the NoC aggregate bandwidth to other NoC-related cost terms.\n" - "Weighting factors for NoC-related cost terms are normalized internally. Therefore, their absolute values are not important, and " + "Other positive numbers specify the importance of minimizing the NoC aggregate bandwidth to other " + "NoC-related cost terms.\n" + "Weighting factors for NoC-related cost terms are normalized internally. Therefore, their absolute values " + "are not important, and " "only their relative ratios determine the importance of each cost term.") .default_value("0.38") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2890,8 +2940,10 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .help( "Controls the importance of meeting all the NoC traffic flow latency constraints.\n" "This value can be >=0, where 0 would mean the latency constraints have no relevance to placement.\n" - "Other positive numbers specify the importance of meeting latency constraints to other NoC-related cost terms.\n" - "Weighting factors for NoC-related cost terms are normalized internally. Therefore, their absolute values are not important, and " + "Other positive numbers specify the importance of meeting latency constraints to other NoC-related cost " + "terms.\n" + "Weighting factors for NoC-related cost terms are normalized internally. Therefore, their absolute values " + "are not important, and " "only their relative ratios determine the importance of each cost term.") .default_value("0.6") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2900,8 +2952,10 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio .help( "Controls the importance of reducing the latencies of the NoC traffic flows.\n" "This value can be >=0, where 0 would mean the latencies have no relevance to placement.\n" - "Other positive numbers specify the importance of minimizing aggregate latency to other NoC-related cost terms.\n" - "Weighting factors for NoC-related cost terms are normalized internally. Therefore, their absolute values are not important, and " + "Other positive numbers specify the importance of minimizing aggregate latency to other NoC-related cost " + "terms.\n" + "Weighting factors for NoC-related cost terms are normalized internally. Therefore, their absolute values " + "are not important, and " "only their relative ratios determine the importance of each cost term.") .default_value("0.02") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2911,42 +2965,49 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio "Controls the importance of reducing the congestion of the NoC links.\n" "This value can be >=0, where 0 would mean the congestion has no relevance to placement.\n" "Other positive numbers specify the importance of minimizing congestion to other NoC-related cost terms.\n" - "Weighting factors for NoC-related cost terms are normalized internally. Therefore, their absolute values are not important, and " + "Weighting factors for NoC-related cost terms are normalized internally. Therefore, their absolute values " + "are not important, and " "only their relative ratios determine the importance of each cost term.") .default_value("0.25") .show_in(argparse::ShowIn::HELP_ONLY); - noc_grp.add_argument(args.noc_centroid_weight, "--noc_centroid_weight") + noc_grp.add_argument(args.noc_centroid_weight, "--noc_centroid_weight") .help( "Sets the minimum fraction of swaps attempted by the placer that are NoC blocks." - "This value is an integer ranging from 0-100. 0 means NoC blocks will be moved at the same rate as other blocks. 100 means all swaps attempted by the placer are NoC router blocks.") + "This value is an integer ranging from 0-100. 0 means NoC blocks will be moved at the same rate as other " + "blocks. 100 means all swaps attempted by the placer are NoC router blocks.") .default_value("0") .show_in(argparse::ShowIn::HELP_ONLY); - + noc_grp.add_argument(args.noc_swap_percentage, "--noc_swap_percentage") .help( "Sets the minimum fraction of swaps attempted by the placer that are NoC blocks. " - "This value is an integer ranging from 0-100. 0 means NoC blocks will be moved at the same rate as other blocks. 100 means all swaps attempted by the placer are NoC router blocks.") + "This value is an integer ranging from 0-100. 0 means NoC blocks will be moved at the same rate as other " + "blocks. 100 means all swaps attempted by the placer are NoC router blocks.") .default_value("0") .show_in(argparse::ShowIn::HELP_ONLY); noc_grp.add_argument(args.noc_sat_routing_bandwidth_resolution, "--noc_sat_routing_bandwidth_resolution") .help( - "Specifies the resolution by which traffic flow bandwidths are converted into integers in SAT routing algorithm.\n" - "The higher this number is, the more accurate the congestion estimation and aggregate bandwidth minimization is.\n" + "Specifies the resolution by which traffic flow bandwidths are converted into integers in SAT routing " + "algorithm.\n" + "The higher this number is, the more accurate the congestion estimation and aggregate bandwidth " + "minimization is.\n" "Higher resolution for bandwidth conversion increases the number of variables in the SAT formulation.") .default_value("128") .show_in(argparse::ShowIn::HELP_ONLY); - noc_grp.add_argument(args.noc_sat_routing_latency_overrun_weighting_factor, "--noc_sat_routing_latency_overrun_weighting_factor") - .help( - "Controls the importance of reducing traffic flow latency overrun in SAT routing.") + noc_grp + .add_argument(args.noc_sat_routing_latency_overrun_weighting_factor, + "--noc_sat_routing_latency_overrun_weighting_factor") + .help("Controls the importance of reducing traffic flow latency overrun in SAT routing.") .default_value("1024") .show_in(argparse::ShowIn::HELP_ONLY); - noc_grp.add_argument(args.noc_sat_routing_congestion_weighting_factor, "--noc_sat_routing_congestion_weighting_factor") - .help( - "Controls the importance of reducing the number of congested NoC links in SAT routing.") + noc_grp + .add_argument(args.noc_sat_routing_congestion_weighting_factor, + "--noc_sat_routing_congestion_weighting_factor") + .help("Controls the importance of reducing the number of congested NoC links in SAT routing.") .default_value("16384") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2957,9 +3018,10 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio "specified by -j command line option.") .show_in(argparse::ShowIn::HELP_ONLY); - noc_grp.add_argument(args.noc_sat_routing_log_search_progress, "--noc_sat_routing_log_search_progress") - .help( - "Print the detailed log of the SAT solver's search progress.") + noc_grp + .add_argument(args.noc_sat_routing_log_search_progress, + "--noc_sat_routing_log_search_progress") + .help("Print the detailed log of the SAT solver's search progress.") .default_value("off") .show_in(argparse::ShowIn::HELP_ONLY); @@ -2974,8 +3036,9 @@ argparse::ArgumentParser create_arg_parser(const std::string& prog_name, t_optio auto& server_grp = parser.add_argument_group("server options"); server_grp.add_argument(args.is_server_mode_enabled, "--server") - .help("Run in server mode." - "Accept client application connection and respond to requests." ) + .help( + "Run in server mode." + "Accept client application connection and respond to requests.") .action(argparse::Action::STORE_TRUE) .default_value("off"); @@ -3117,7 +3180,8 @@ void set_conditional_defaults(t_options& args) { } //Place chan width follows Route chan width if unspecified - if (args.PlaceChanWidth.provenance() != Provenance::SPECIFIED && args.RouteChanWidth.provenance() == Provenance::SPECIFIED) { + if (args.PlaceChanWidth.provenance() != Provenance::SPECIFIED + && args.RouteChanWidth.provenance() == Provenance::SPECIFIED) { args.PlaceChanWidth.set(args.RouteChanWidth.value(), Provenance::INFERRED); } @@ -3195,16 +3259,16 @@ bool verify_args(const t_options& args) { args.read_rr_graph_file.argument_name().c_str()); } - if (!args.enable_clustering_pin_feasibility_filter && (args.target_external_pin_util.provenance() == Provenance::SPECIFIED)) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "%s option must be enabled for %s to have any effect\n", + if (!args.enable_clustering_pin_feasibility_filter + && (args.target_external_pin_util.provenance() == Provenance::SPECIFIED)) { + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "%s option must be enabled for %s to have any effect\n", args.enable_clustering_pin_feasibility_filter.argument_name().c_str(), args.target_external_pin_util.argument_name().c_str()); } - if (args.router_initial_timing == e_router_initial_timing::LOOKAHEAD && args.router_lookahead_type == e_router_lookahead::CLASSIC) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "%s option value 'lookahead' is not compatible with %s 'classic'\n", + if (args.router_initial_timing == e_router_initial_timing::LOOKAHEAD + && args.router_lookahead_type == e_router_lookahead::CLASSIC) { + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "%s option value 'lookahead' is not compatible with %s 'classic'\n", args.router_initial_timing.argument_name().c_str(), args.router_lookahead_type.argument_name().c_str()); } @@ -3219,8 +3283,7 @@ bool verify_args(const t_options& args) { * */ if (args.noc.provenance() == Provenance::SPECIFIED && args.noc_flows_file.provenance() != Provenance::SPECIFIED) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "--noc_flows_file option must be specified if --noc is turned on.\n"); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "--noc_flows_file option must be specified if --noc is turned on.\n"); } return true; diff --git a/vpr/src/base/read_place.cpp b/vpr/src/base/read_place.cpp index 5813a780a26..0dd799a5b0f 100644 --- a/vpr/src/base/read_place.cpp +++ b/vpr/src/base/read_place.cpp @@ -33,9 +33,7 @@ std::string read_place(const char* net_file, const DeviceGrid& grid) { std::ifstream fstream(place_file); if (!fstream) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE_F, - "'%s' - Cannot open place file.\n", - place_file); + VPR_FATAL_ERROR(VPR_ERROR_PLACE_F, "'%s' - Cannot open place file.\n", place_file); } bool is_place_file = true; @@ -52,13 +50,10 @@ std::string read_place(const char* net_file, return placement_id; } -void read_constraints(const char* constraints_file, - BlkLocRegistry& blk_loc_registry) { +void read_constraints(const char* constraints_file, BlkLocRegistry& blk_loc_registry) { std::ifstream fstream(constraints_file); if (!fstream) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE_F, - "'%s' - Cannot open constraints file.\n", - constraints_file); + VPR_FATAL_ERROR(VPR_ERROR_PLACE_F, "'%s' - Cannot open constraints file.\n", constraints_file); } bool is_place_file = false; @@ -97,7 +92,7 @@ static void read_place_header(std::ifstream& placement_file, std::streampos file_pos = placement_file.tellg(); while (std::getline(placement_file, line) && (!seen_netlist_id || !seen_grid_dimensions)) { //Parse line-by-line - ++lineno; + ++lineno; std::vector tokens = vtr::split(line); @@ -107,9 +102,7 @@ static void read_place_header(std::ifstream& placement_file, } else if (tokens[0][0] == '#') { continue; //Skip commented lines - } else if (tokens.size() == 4 && - tokens[0] == "Netlist_File:" && - tokens[2] == "Netlist_ID:") { + } else if (tokens.size() == 4 && tokens[0] == "Netlist_File:" && tokens[2] == "Netlist_ID:") { //Check that the netlist used to generate this placement matches the one loaded // //NOTE: this is an optional check which causes no errors if this line is missing. @@ -117,8 +110,7 @@ static void read_place_header(std::ifstream& placement_file, // by VPR. if (seen_netlist_id) { - vpr_throw(VPR_ERROR_PLACE_F, place_file, lineno, - "Duplicate Netlist_File/Netlist_ID specification"); + vpr_throw(VPR_ERROR_PLACE_F, place_file, lineno, "Duplicate Netlist_File/Netlist_ID specification"); } std::string place_netlist_id = tokens[3]; @@ -128,26 +120,23 @@ static void read_place_header(std::ifstream& placement_file, auto msg = vtr::string_fmt( "The packed netlist file that generated placement (File: '%s' ID: '%s')" " does not match current netlist (File: '%s' ID: '%s')", - place_netlist_file.c_str(), place_netlist_id.c_str(), - net_file, cluster_ctx.clb_nlist.netlist_id().c_str()); + place_netlist_file.c_str(), place_netlist_id.c_str(), net_file, + cluster_ctx.clb_nlist.netlist_id().c_str()); if (verify_file_digests) { msg += " To ignore the packed netlist mismatch, use '--verify_file_digests off' command line option."; vpr_throw(VPR_ERROR_PLACE_F, place_file, lineno, msg.c_str()); } else { VTR_LOGF_WARN(place_file, lineno, "%s\n", msg.c_str()); - VTR_LOG_WARN("The packed netlist mismatch is ignored because" - "--verify_file_digests command line option is off."); + VTR_LOG_WARN( + "The packed netlist mismatch is ignored because" + "--verify_file_digests command line option is off."); } } seen_netlist_id = true; - } else if (tokens.size() == 7 && - tokens[0] == "Array" && - tokens[1] == "size:" && - tokens[3] == "x" && - tokens[5] == "logic" && - tokens[6] == "blocks") { + } else if (tokens.size() == 7 && tokens[0] == "Array" && tokens[1] == "size:" && tokens[3] == "x" + && tokens[5] == "logic" && tokens[6] == "blocks") { //Load the device grid dimensions size_t place_file_width = vtr::atou(tokens[2]); @@ -161,8 +150,9 @@ static void read_place_header(std::ifstream& placement_file, vpr_throw(VPR_ERROR_PLACE_F, place_file, lineno, msg.c_str()); } else { VTR_LOGF_WARN(place_file, lineno, "%s\n", msg.c_str()); - VTR_LOG_WARN("The FPGA size mismatch is ignored because" - "--verify_file_digests command line option is off."); + VTR_LOG_WARN( + "The FPGA size mismatch is ignored because" + "--verify_file_digests command line option is off."); } } @@ -180,12 +170,13 @@ static void read_place_header(std::ifstream& placement_file, vpr_throw(VPR_ERROR_PLACE_F, place_file, lineno, msg.c_str()); } else { VTR_LOGF_WARN(place_file, lineno, "%s\n", msg.c_str()); - VTR_LOG_WARN("Unexpected line in the placement file header is ignored because" - "--verify_file_digests command line option is off."); + VTR_LOG_WARN( + "Unexpected line in the placement file header is ignored because" + "--verify_file_digests command line option is off."); } - if ((tokens.size() == 4 || (tokens.size() > 4 && tokens[4][0] == '#')) || - (tokens.size() == 5 || (tokens.size() > 5 && tokens[5][0] == '#'))) { + if ((tokens.size() == 4 || (tokens.size() > 4 && tokens[4][0] == '#')) + || (tokens.size() == 5 || (tokens.size() > 5 && tokens[5][0] == '#'))) { placement_file.seekg(file_pos); break; } @@ -236,8 +227,8 @@ static std::string read_place_body(std::ifstream& placement_file, } else if (tokens[0][0] == '#') { continue; //Skip commented lines - } else if ((tokens.size() == 4 || (tokens.size() > 4 && tokens[4][0] == '#')) || - (tokens.size() == 5 || (tokens.size() > 5 && tokens[5][0] == '#'))) { + } else if ((tokens.size() == 4 || (tokens.size() > 4 && tokens[4][0] == '#')) + || (tokens.size() == 5 || (tokens.size() > 5 && tokens[5][0] == '#'))) { //Load the block location // // If the place file corresponds to a 3D architecture, it should contain 5 tokens of actual data, with an optional 6th (commented) token indicating VPR's internal block number. @@ -281,19 +272,20 @@ static std::string read_place_body(std::ifstream& placement_file, VTR_LOG_WARN("Block %s has an invalid name and it is going to be skipped.\n", c_block_name); continue; } else { - blk_id = atom_ctx.lookup.atom_clb(atom_blk_id); //getting the ClusterBlockId of the cluster that the atom is in + blk_id = atom_ctx.lookup.atom_clb( + atom_blk_id); //getting the ClusterBlockId of the cluster that the atom is in } } //Check if block is listed multiple times with conflicting locations in constraints file if (seen_blocks[blk_id] > 0) { - if (block_x != block_locs[blk_id].loc.x || - block_y != block_locs[blk_id].loc.y || - sub_tile_index != block_locs[blk_id].loc.sub_tile || - block_layer != block_locs[blk_id].loc.layer) { + if (block_x != block_locs[blk_id].loc.x || block_y != block_locs[blk_id].loc.y + || sub_tile_index != block_locs[blk_id].loc.sub_tile + || block_layer != block_locs[blk_id].loc.layer) { std::string cluster_name = cluster_ctx.clb_nlist.block_name(blk_id); VPR_THROW(VPR_ERROR_PLACE, - "The location of cluster %s (#%d) is specified %d times in the constraints file with conflicting locations. \n" + "The location of cluster %s (#%d) is specified %d times in the constraints file with " + "conflicting locations. \n" "Its location was last specified with block %s. \n", cluster_name.c_str(), blk_id, seen_blocks[blk_id] + 1, c_block_name); } @@ -310,8 +302,10 @@ static std::string read_place_body(std::ifstream& placement_file, const t_pl_loc& constraint_loc = block_locs[blk_id].loc; if (loc != constraint_loc) { VPR_THROW(VPR_ERROR_PLACE, - "The new location assigned to cluster #%d is (%d,%d,%d,%d), which is inconsistent with the location specified in the constraint file (%d,%d,%d,%d).", - blk_id, loc.x, loc.y, loc.layer, loc.sub_tile, constraint_loc.x, constraint_loc.y, constraint_loc.layer, constraint_loc.sub_tile); + "The new location assigned to cluster #%d is (%d,%d,%d,%d), which is inconsistent " + "with the location specified in the constraint file (%d,%d,%d,%d).", + blk_id, loc.x, loc.y, loc.layer, loc.sub_tile, constraint_loc.x, constraint_loc.y, + constraint_loc.layer, constraint_loc.sub_tile); } } blk_loc_registry.set_block_location(blk_id, loc); @@ -327,9 +321,7 @@ static std::string read_place_body(std::ifstream& placement_file, } else { //Unrecognized - vpr_throw(VPR_ERROR_PLACE_F, place_file, lineno, - "Invalid line '%s' in file", - line.c_str()); + vpr_throw(VPR_ERROR_PLACE_F, place_file, lineno, "Invalid line '%s' in file", line.c_str()); } } @@ -370,9 +362,7 @@ std::string print_place(const char* net_file, fp = fopen(place_file, "w"); if (is_place_file) { - fprintf(fp, "Netlist_File: %s Netlist_ID: %s\n", - net_file, - net_id); + fprintf(fp, "Netlist_File: %s Netlist_ID: %s\n", net_file, net_id); fprintf(fp, "Array size: %zu x %zu logic blocks\n\n", device_ctx.grid.width(), device_ctx.grid.height()); fprintf(fp, "#block name\tx\ty\tsubblk\tlayer\tblock number\n"); fprintf(fp, "#----------\t--\t--\t------\t-----\t------------\n"); @@ -388,11 +378,8 @@ std::string print_place(const char* net_file, if (strlen(cluster_ctx.clb_nlist.block_pb(blk_id)->name) < 8) fprintf(fp, "\t"); - fprintf(fp, "%d\t%d\t%d\t%d", - block_locs[blk_id].loc.x, - block_locs[blk_id].loc.y, - block_locs[blk_id].loc.sub_tile, - block_locs[blk_id].loc.layer); + fprintf(fp, "%d\t%d\t%d\t%d", block_locs[blk_id].loc.x, block_locs[blk_id].loc.y, + block_locs[blk_id].loc.sub_tile, block_locs[blk_id].loc.layer); fprintf(fp, "\t#%zu\n", size_t(blk_id)); } } diff --git a/vpr/src/base/read_place.h b/vpr/src/base/read_place.h index 088f17dd546..1f202e303be 100644 --- a/vpr/src/base/read_place.h +++ b/vpr/src/base/read_place.h @@ -5,7 +5,6 @@ #include - class PlacerState; class ClusterBlockId; struct t_block_loc; @@ -24,8 +23,7 @@ std::string read_place(const char* net_file, /** * This function is used to read a constraints file that specifies the desired locations of blocks. */ -void read_constraints(const char* constraints_file, - BlkLocRegistry& blk_loc_registry); +void read_constraints(const char* constraints_file, BlkLocRegistry& blk_loc_registry); /** * This function prints out a place file. diff --git a/vpr/src/base/read_route.cpp b/vpr/src/base/read_route.cpp index d2d3bc14d54..41b15b8d6f5 100644 --- a/vpr/src/base/read_route.cpp +++ b/vpr/src/base/read_route.cpp @@ -49,11 +49,37 @@ #include "old_traceback.h" /*************Functions local to this module*************/ -static void process_route(const Netlist<>& net_list, std::ifstream& fp, const char* filename, int& lineno, bool is_flat); -static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterNetId inet, const char* filename, int& lineno); -static void process_nets(const Netlist<>& net_list, std::ifstream& fp, ClusterNetId inet, std::string name, std::vector input_tokens, const char* filename, int& lineno, bool is_flat); -static void process_global_blocks(const Netlist<>& net_list, std::ifstream& fp, ClusterNetId inet, const char* filename, int& lineno, bool is_flat); -static void format_coordinates(int& layer_num, int& x, int& y, std::string coord, ClusterNetId net, const char* filename, const int lineno); +static void process_route(const Netlist<>& net_list, + std::ifstream& fp, + const char* filename, + int& lineno, + bool is_flat); +static void process_nodes(const Netlist<>& net_list, + std::ifstream& fp, + ClusterNetId inet, + const char* filename, + int& lineno); +static void process_nets(const Netlist<>& net_list, + std::ifstream& fp, + ClusterNetId inet, + std::string name, + std::vector input_tokens, + const char* filename, + int& lineno, + bool is_flat); +static void process_global_blocks(const Netlist<>& net_list, + std::ifstream& fp, + ClusterNetId inet, + const char* filename, + int& lineno, + bool is_flat); +static void format_coordinates(int& layer_num, + int& x, + int& y, + std::string coord, + ClusterNetId net, + const char* filename, + const int lineno); static void format_pin_info(std::string& pb_name, std::string& port_name, int& pb_pin_num, std::string input); static std::string format_name(std::string name); static bool check_rr_graph_connectivity(RRNodeId prev_node, RRNodeId node); @@ -82,8 +108,7 @@ bool read_route(const char* route_file, const t_router_opts& router_opts, bool v int lineno = 0; if (!fp.is_open()) { - vpr_throw(VPR_ERROR_ROUTE, route_file, lineno, - "Cannot open %s routing file", route_file); + vpr_throw(VPR_ERROR_ROUTE, route_file, lineno, "Cannot open %s routing file", route_file); } std::getline(fp, header_str); @@ -104,18 +129,18 @@ bool read_route(const char* route_file, const t_router_opts& router_opts, bool v /*Allocate necessary routing structures*/ alloc_and_load_rr_node_route_structs(); - const Netlist<>& router_net_list = (flat_router) ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; - init_route_structs(router_net_list, - router_opts.bb_factor, - router_opts.has_choke_point, - flat_router); + const Netlist<>& router_net_list + = (flat_router) ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; + init_route_structs(router_net_list, router_opts.bb_factor, router_opts.has_choke_point, flat_router); /*Check dimensions*/ std::getline(fp, header_str); ++lineno; header.clear(); header = vtr::split(header_str); - if (header[0] == "Array" && header[1] == "size:" && (vtr::atou(header[2].c_str()) != device_ctx.grid.width() || vtr::atou(header[4].c_str()) != device_ctx.grid.height())) { + if (header[0] == "Array" && header[1] == "size:" + && (vtr::atou(header[2].c_str()) != device_ctx.grid.width() + || vtr::atou(header[4].c_str()) != device_ctx.grid.height())) { vpr_throw(VPR_ERROR_ROUTE, route_file, lineno, "Device dimensions %sx%s specified in the routing file does not match given %dx%d ", header[2].c_str(), header[4].c_str(), device_ctx.grid.width(), device_ctx.grid.height()); @@ -130,23 +155,19 @@ bool read_route(const char* route_file, const t_router_opts& router_opts, bool v FourAryHeap small_heap; small_heap.init_heap(device_ctx.grid); if (!flat_router) { - reserve_locally_used_opins(&small_heap, router_opts.initial_pres_fac, - router_opts.acc_fac, false, flat_router); + reserve_locally_used_opins(&small_heap, router_opts.initial_pres_fac, router_opts.acc_fac, false, flat_router); } - recompute_occupancy_from_scratch(router_net_list, - flat_router); + recompute_occupancy_from_scratch(router_net_list, flat_router); /* Note: This pres_fac is not necessarily correct since it isn't the first routing iteration*/ OveruseInfo overuse_info(device_ctx.rr_graph.num_nodes()); pathfinder_update_acc_cost_and_overuse_info(router_opts.acc_fac, overuse_info); if (!flat_router) { - reserve_locally_used_opins(&small_heap, router_opts.initial_pres_fac, - router_opts.acc_fac, true, flat_router); + reserve_locally_used_opins(&small_heap, router_opts.initial_pres_fac, router_opts.acc_fac, true, flat_router); } /* Finished loading in the routing, now check it*/ - recompute_occupancy_from_scratch(router_net_list, - flat_router); + recompute_occupancy_from_scratch(router_net_list, flat_router); bool is_feasible = feasible_routing(); VTR_LOG("Finished loading route file\n"); @@ -155,7 +176,11 @@ bool read_route(const char* route_file, const t_router_opts& router_opts, bool v } ///@brief Walks through every net and add the routing appropriately -static void process_route(const Netlist<>& net_list, std::ifstream& fp, const char* filename, int& lineno, bool is_flat) { +static void process_route(const Netlist<>& net_list, + std::ifstream& fp, + const char* filename, + int& lineno, + bool is_flat) { std::string input; std::vector tokens; while (std::getline(fp, input)) { @@ -176,37 +201,48 @@ static void process_route(const Netlist<>& net_list, std::ifstream& fp, const ch } ///@brief Check if the net is global or not, and process appropriately -static void process_nets(const Netlist<>& net_list, std::ifstream& fp, ClusterNetId inet, std::string name, std::vector input_tokens, const char* filename, int& lineno, bool is_flat) { - if (input_tokens.size() > 3 && input_tokens[3] == "global" - && input_tokens[4] == "net" && input_tokens[5] == "connecting:") { +static void process_nets(const Netlist<>& net_list, + std::ifstream& fp, + ClusterNetId inet, + std::string name, + std::vector input_tokens, + const char* filename, + int& lineno, + bool is_flat) { + if (input_tokens.size() > 3 && input_tokens[3] == "global" && input_tokens[4] == "net" + && input_tokens[5] == "connecting:") { /* Global net. Never routed. */ if (!net_list.net_is_ignored(inet)) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "Net %lu should be a global net", size_t(inet)); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "Net %lu should be a global net", size_t(inet)); } /*erase an extra colon for global nets*/ name.erase(name.end() - 1); name = format_name(name); if (0 != net_list.net_name(inet).compare(name)) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "Net name %s for net number %lu specified in the routing file does not match given %s. Running without flat routing; if this file was created with flat routing, re-run vpr with the --flat_routing option", - name.c_str(), size_t(inet), net_list.net_name(inet).c_str()); + vpr_throw( + VPR_ERROR_ROUTE, filename, lineno, + "Net name %s for net number %lu specified in the routing file does not match given %s. Running without " + "flat routing; if this file was created with flat routing, re-run vpr with the --flat_routing option", + name.c_str(), size_t(inet), net_list.net_name(inet).c_str()); } process_global_blocks(net_list, fp, inet, filename, lineno, is_flat); } else { /* Not a global net */ if (net_list.net_is_ignored(inet)) { - VTR_LOG_WARN("Net %lu (%s) is marked as global in the netlist, but is non-global in the .route file\n", size_t(inet), net_list.net_name(inet).c_str()); + VTR_LOG_WARN("Net %lu (%s) is marked as global in the netlist, but is non-global in the .route file\n", + size_t(inet), net_list.net_name(inet).c_str()); } name = format_name(name); if (0 != net_list.net_name(inet).compare(name)) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "Net name %s for net number %lu specified in the routing file does not match given %s. Running without flat routing; if this file was created with flat routing, re-run vpr with the --flat_routing option", - name.c_str(), size_t(inet), net_list.net_name(inet).c_str()); + vpr_throw( + VPR_ERROR_ROUTE, filename, lineno, + "Net name %s for net number %lu specified in the routing file does not match given %s. Running without " + "flat routing; if this file was created with flat routing, re-run vpr with the --flat_routing option", + name.c_str(), size_t(inet), net_list.net_name(inet).c_str()); } process_nodes(net_list, fp, inet, filename, lineno); @@ -215,7 +251,11 @@ static void process_nets(const Netlist<>& net_list, std::ifstream& fp, ClusterNe return; } -static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterNetId inet, const char* filename, int& lineno) { +static void process_nodes(const Netlist<>& net_list, + std::ifstream& fp, + ClusterNetId inet, + const char* filename, + int& lineno) { /* Not a global net. Goes through every node and add it into trace.head*/ auto& device_ctx = g_vpr_ctx.mutable_device(); const auto& rr_graph = device_ctx.rr_graph; @@ -262,14 +302,13 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN /*First node needs to be source. It is isolated to correctly set heap head.*/ if (node_count == 0 && tokens[2] != "SOURCE") { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "First node in routing has to be a source type"); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "First node in routing has to be a source type"); } /*Check node types if match rr graph*/ if (tokens[2] != rr_graph.node_type_string(RRNodeId(inode))) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "Node %d has a type that does not match the RR graph", inode); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "Node %d has a type that does not match the RR graph", + inode); } format_coordinates(layer_num, x, y, tokens[3], inet, filename, lineno); @@ -277,7 +316,8 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN if (tokens[4] == "to") { format_coordinates(layer_num2, x2, y2, tokens[5], inet, filename, lineno); - if (rr_graph.node_xlow(rr_node) != x || rr_graph.node_xhigh(rr_node) != x2 || rr_graph.node_yhigh(rr_node) != y2 || rr_graph.node_ylow(rr_node) != y) { + if (rr_graph.node_xlow(rr_node) != x || rr_graph.node_xhigh(rr_node) != x2 + || rr_graph.node_yhigh(rr_node) != y2 || rr_graph.node_ylow(rr_node) != y) { vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "The coordinates of node %d does not match the rr graph", inode); } @@ -286,11 +326,13 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN /* Check for connectivity, this throws an exception when a dangling net is encountered in the routing file */ bool legal_node = check_rr_graph_connectivity(prev_node, rr_node); if (!legal_node) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "Dangling branch at net %lu, nodes %d -> %d: %s", inet, prev_node, inode, input.c_str()); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "Dangling branch at net %lu, nodes %d -> %d: %s", inet, + prev_node, inode, input.c_str()); } prev_node = rr_node; } else { - if (rr_graph.node_xlow(rr_node) != x || rr_graph.node_xhigh(rr_node) != x || rr_graph.node_yhigh(rr_node) != y || rr_graph.node_ylow(rr_node) != y) { + if (rr_graph.node_xlow(rr_node) != x || rr_graph.node_xhigh(rr_node) != x + || rr_graph.node_yhigh(rr_node) != y || rr_graph.node_ylow(rr_node) != y) { vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "The coordinates of node %d does not match the rr graph", inode); } @@ -299,7 +341,8 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN bool legal_node = check_rr_graph_connectivity(prev_node, rr_node); prev_node = rr_node; if (!legal_node) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "Dangling branch at net %lu, nodes %d -> %d: %s", inet, prev_node, inode, input.c_str()); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "Dangling branch at net %lu, nodes %d -> %d: %s", inet, + prev_node, inode, input.c_str()); } prev_node = rr_node; } @@ -308,13 +351,12 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN if (tokens[2] == "SOURCE" || tokens[2] == "SINK" || tokens[2] == "OPIN" || tokens[2] == "IPIN") { const auto& type = device_ctx.grid.get_physical_type({x, y, layer_num}); if (tokens[4 + offset] == "Pad:" && !is_io_type(type)) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "Node %d is of the wrong type", inode); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "Node %d is of the wrong type", inode); } } else if (tokens[2] == "CHANX" || tokens[2] == "CHANY") { if (tokens[4 + offset] != "Track:") { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "A %s node have to have track info", tokens[2].c_str()); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "A %s node have to have track info", + tokens[2].c_str()); } } @@ -338,7 +380,8 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN auto [sub_tile, sub_tile_rel_cap] = get_sub_tile_from_pin_physical_num(physical_tile, pin_num); int sub_tile_offset = sub_tile->capacity.low + sub_tile_rel_cap; - ClusterBlockId iblock = grid_blocks.block_at_location({x - width_offset, y - height_offset, sub_tile_offset, layer_num}); + ClusterBlockId iblock = grid_blocks.block_at_location( + {x - width_offset, y - height_offset, sub_tile_offset, layer_num}); VTR_ASSERT(iblock); const t_pb_graph_pin* pb_pin; @@ -356,13 +399,12 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN format_pin_info(pb_name, port_name, pb_pin_num, tokens[6 + offset]); - if (pb_name != pb_type->name || port_name != pb_pin->port->name || pb_pin_num != pb_pin->pin_number) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "%d node does not have correct pins", inode); + if (pb_name != pb_type->name || port_name != pb_pin->port->name + || pb_pin_num != pb_pin->pin_number) { + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "%d node does not have correct pins", inode); } } else { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "%d node does not have correct pins", inode); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "%d node does not have correct pins", inode); } switch_id = atoi(tokens[8 + offset].c_str()); } else { @@ -378,7 +420,9 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN net_pin_index = atoi(tokens[9 + offset].c_str()); } else { vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "%d (sink) node does not have net pin index. If you are using an old .route file without this information, please re-generate the routing.", inode); + "%d (sink) node does not have net pin index. If you are using an old .route file without " + "this information, please re-generate the routing.", + inode); } } else { net_pin_index = OPEN; // net pin index is invalid for non-SINKs @@ -417,7 +461,12 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN * @brief This function goes through all the blocks in a global net and verify * it with the clustered netlist and the placement */ -static void process_global_blocks(const Netlist<>& net_list, std::ifstream& fp, ClusterNetId inet, const char* filename, int& lineno, bool is_flat) { +static void process_global_blocks(const Netlist<>& net_list, + std::ifstream& fp, + ClusterNetId inet, + const char* filename, + int& lineno, + bool is_flat) { std::string block, bnum_str; int layer_num, x, y; std::vector tokens; @@ -457,15 +506,13 @@ static void process_global_blocks(const Netlist<>& net_list, std::ifstream& fp, if (block_loc.loc.x != x || block_loc.loc.y != y) { vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "The placement coordinates (%d,%d,%d) of %zu block does not match given (%d,%d,%d)", - x, y, layer_num, size_t(bnum), - block_loc.loc.x, block_loc.loc.y, block_loc.loc.layer); + "The placement coordinates (%d,%d,%d) of %zu block does not match given (%d,%d,%d)", x, y, + layer_num, size_t(bnum), block_loc.loc.x, block_loc.loc.y, block_loc.loc.layer); } auto pin_class = get_class_range_for_block(bnum, is_flat); if (pin_class.low > atoi(tokens[7].c_str()) || pin_class.high < atoi(tokens[7].c_str())) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "The pin class %d of %lu net does not match given ", + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "The pin class %d of %lu net does not match given ", atoi(tokens[7].c_str()), size_t(inet)); } } @@ -474,7 +521,13 @@ static void process_global_blocks(const Netlist<>& net_list, std::ifstream& fp, } ///@brief Parse coordinates in the form of (x,y) into correct x and y values -static void format_coordinates(int& layer_num, int& x, int& y, std::string coord, ClusterNetId net, const char* filename, const int lineno) { +static void format_coordinates(int& layer_num, + int& x, + int& y, + std::string coord, + ClusterNetId net, + const char* filename, + const int lineno) { coord = format_name(coord); std::stringstream coord_stream(coord); @@ -485,8 +538,8 @@ static void format_coordinates(int& layer_num, int& x, int& y, std::string coord coord_stream.ignore(1, ','); } if (coords.size() != 2 && coords.size() != 3) { - vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "Net %lu has coordinates that is not in the form (layer_num,x,y)", size_t(net)); + vpr_throw(VPR_ERROR_ROUTE, filename, lineno, "Net %lu has coordinates that is not in the form (layer_num,x,y)", + size_t(net)); } if (coords.size() == 2) { @@ -511,9 +564,7 @@ static void format_pin_info(std::string& pb_name, std::string& port_name, int& p std::getline(pb_info, port_name, '['); pb_info >> pb_pin_num; if (!pb_info) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "Format of this pin info %s is incorrect", - input.c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Format of this pin info %s is incorrect", input.c_str()); } } @@ -524,9 +575,7 @@ static std::string format_name(std::string name) { name.erase(name.end() - 1); return name; } else { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "%s should be enclosed by parenthesis", - name.c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "%s should be enclosed by parenthesis", name.c_str()); return nullptr; } } @@ -536,15 +585,18 @@ static std::string format_name(std::string name) { * @returns false if there is a discontinuity */ static bool check_rr_graph_connectivity(RRNodeId prev_node, RRNodeId node) { // Check if its the first node of the series - if (prev_node == RRNodeId(-1)) return true; + if (prev_node == RRNodeId(-1)) + return true; // Check if the nodes are the same, which is illegal - if (prev_node == node) return false; + if (prev_node == node) + return false; auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; // If it's starting a new sub branch this is ok - if (rr_graph.node_type(prev_node) == SINK) return true; + if (rr_graph.node_type(prev_node) == SINK) + return true; for (RREdgeId edge : rr_graph.edge_range(prev_node)) { //If the sink node is reachable by previous node return true @@ -554,7 +606,8 @@ static bool check_rr_graph_connectivity(RRNodeId prev_node, RRNodeId node) { // If there are any non-configurable branches return true short edge_switch = rr_graph.rr_nodes().edge_switch(edge); - if (!(rr_graph.rr_switch_inf(RRSwitchId(edge_switch)).configurable())) return true; + if (!(rr_graph.rr_switch_inf(RRSwitchId(edge_switch)).configurable())) + return true; } // If it's part of a non configurable node list, return true @@ -565,9 +618,7 @@ static bool check_rr_graph_connectivity(RRNodeId prev_node, RRNodeId node) { return false; } -void print_route(const Netlist<>& net_list, - FILE* fp, - bool is_flat) { +void print_route(const Netlist<>& net_list, FILE* fp, bool is_flat) { const auto& grid_blocks = g_vpr_ctx.placement().grid_blocks(); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -595,13 +646,12 @@ void print_route(const Netlist<>& net_list, int jlow = rr_graph.node_ylow(inode); int layer_num = rr_graph.node_layer(inode); - fprintf(fp, "Node:\t%zu\t%6s (%d,%d,%d) ", size_t(inode), - rr_graph.node_type_string(inode), ilow, jlow, layer_num); + fprintf(fp, "Node:\t%zu\t%6s (%d,%d,%d) ", size_t(inode), rr_graph.node_type_string(inode), ilow, + jlow, layer_num); - if ((ilow != rr_graph.node_xhigh(inode)) - || (jlow != rr_graph.node_yhigh(inode))) - fprintf(fp, "to (%d,%d,%d) ", rr_graph.node_xhigh(inode), - rr_graph.node_yhigh(inode), layer_num); + if ((ilow != rr_graph.node_xhigh(inode)) || (jlow != rr_graph.node_yhigh(inode))) + fprintf(fp, "to (%d,%d,%d) ", rr_graph.node_xhigh(inode), rr_graph.node_yhigh(inode), + layer_num); switch (rr_type) { case IPIN: @@ -629,8 +679,8 @@ void print_route(const Netlist<>& net_list, default: VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in print_route: Unexpected traceback element type: %d (%s).\n", - rr_type, rr_graph.node_type_string(inode)); + "in print_route: Unexpected traceback element type: %d (%s).\n", rr_type, + rr_graph.node_type_string(inode)); break; } @@ -644,8 +694,8 @@ void print_route(const Netlist<>& net_list, auto [sub_tile, sub_tile_rel_cap] = get_sub_tile_from_pin_physical_num(physical_tile, pin_num); int sub_tile_offset = sub_tile->capacity.low + sub_tile_rel_cap; - ClusterBlockId iblock = grid_blocks.block_at_location({ilow - xoffset, jlow - yoffset, - sub_tile_offset, layer_num}); + ClusterBlockId iblock = grid_blocks.block_at_location( + {ilow - xoffset, jlow - yoffset, sub_tile_offset, layer_num}); VTR_ASSERT(iblock); const t_pb_graph_pin* pb_pin; if (is_pin_on_tile(physical_tile, pin_num)) { @@ -682,23 +732,15 @@ void print_route(const Netlist<>& net_list, int iclass = get_block_pin_class_num(block_id, pin_id, is_flat); t_block_loc blk_loc; blk_loc = get_block_loc(block_id, is_flat); - fprintf(fp, "Block %s (#%zu) at (%d,%d,%d), Pin class %d.\n", - net_list.block_name(block_id).c_str(), - size_t(block_id), - blk_loc.loc.x, - blk_loc.loc.y, - blk_loc.loc.layer, - iclass); + fprintf(fp, "Block %s (#%zu) at (%d,%d,%d), Pin class %d.\n", net_list.block_name(block_id).c_str(), + size_t(block_id), blk_loc.loc.x, blk_loc.loc.y, blk_loc.loc.layer, iclass); } } } } /* Prints out the routing to file route_file. */ -void print_route(const Netlist<>& net_list, - const char* placement_file, - const char* route_file, - bool is_flat) { +void print_route(const Netlist<>& net_list, const char* placement_file, const char* route_file, bool is_flat) { FILE* fp; fp = fopen(route_file, "w"); diff --git a/vpr/src/base/region.cpp b/vpr/src/base/region.cpp index 7cc6280626b..566dc0c6bef 100644 --- a/vpr/src/base/region.cpp +++ b/vpr/src/base/region.cpp @@ -20,32 +20,23 @@ Region::Region(int x_min, int y_min, int x_max, int y_max, int layer_num_min, in Region::Region(int x_min, int y_min, int x_max, int y_max, int layer_num) : Region(x_min, y_min, x_max, y_max, layer_num, layer_num) {} -void Region::set_layer_range(std::pair layer_range) { - layer_range_ = layer_range; -} +void Region::set_layer_range(std::pair layer_range) { layer_range_ = layer_range; } -void Region::set_rect(const vtr::Rect& rect) { - rect_ = rect; -} +void Region::set_rect(const vtr::Rect& rect) { rect_ = rect; } Region::Region() - : rect_({std::numeric_limits::max(), std::numeric_limits::max(), - std::numeric_limits::min(), std::numeric_limits::min()}) + : rect_({std::numeric_limits::max(), std::numeric_limits::max(), std::numeric_limits::min(), + std::numeric_limits::min()}) , layer_range_(0, 0) , sub_tile_(NO_SUBTILE) {} -int Region::get_sub_tile() const { - return sub_tile_; -} +int Region::get_sub_tile() const { return sub_tile_; } -void Region::set_sub_tile(int sub_tile) { - sub_tile_ = sub_tile; -} +void Region::set_sub_tile(int sub_tile) { sub_tile_ = sub_tile; } bool Region::empty() const { const auto [layer_low, layer_high] = layer_range_; - return (rect_.xmax() < rect_.xmin() || rect_.ymax() < rect_.ymin() || - layer_high < layer_low); + return (rect_.xmax() < rect_.xmin() || rect_.ymax() < rect_.ymin() || layer_high < layer_low); } bool Region::is_loc_in_reg(t_pl_loc loc) const { @@ -82,8 +73,8 @@ Region intersection(const Region& r1, const Region& r2) { auto [r1_layer_low, r1_layer_high] = r1.get_layer_range(); auto [r2_layer_low, r2_layer_high] = r2.get_layer_range(); - auto [intersect_layer_begin, intersect_layer_end] = std::make_pair(std::max(r1_layer_low, r2_layer_low), - std::min(r1_layer_high, r2_layer_high)); + auto [intersect_layer_begin, intersect_layer_end] + = std::make_pair(std::max(r1_layer_low, r2_layer_low), std::min(r1_layer_high, r2_layer_high)); // check that the give layer range start from a lower layer and end at a higher or the same layer // negative layer means that the given Region object is an empty region diff --git a/vpr/src/base/region.h b/vpr/src/base/region.h index 18a179af19a..46a61e9b092 100644 --- a/vpr/src/base/region.h +++ b/vpr/src/base/region.h @@ -31,25 +31,17 @@ class Region { Region(int x_min, int y_min, int x_max, int y_max, int layer_num); - const vtr::Rect& get_rect() const { - return rect_; - } + const vtr::Rect& get_rect() const { return rect_; } void set_rect(const vtr::Rect& rect); - vtr::Rect& get_mutable_rect() { - return rect_; - } + vtr::Rect& get_mutable_rect() { return rect_; } void set_layer_range(std::pair layer_range); - std::pair get_layer_range() const { - return layer_range_; - } + std::pair get_layer_range() const { return layer_range_; } - std::pair& get_mutable_layer_range() { - return layer_range_; - } + std::pair& get_mutable_layer_range() { return layer_range_; } /** * @brief Accessor for the region's subtile @@ -77,9 +69,7 @@ class Region { bool is_loc_in_reg(t_pl_loc loc) const; bool operator==(const Region& reg) const { - return (reg.rect_ == rect_ && - reg.layer_range_ == layer_range_ && - reg.get_sub_tile() == sub_tile_); + return (reg.rect_ == rect_ && reg.layer_range_ == layer_range_ && reg.get_sub_tile() == sub_tile_); } private: @@ -99,7 +89,7 @@ class Region { */ std::pair layer_range_; - int sub_tile_; ///< users will optionally select a subtile + int sub_tile_; ///< users will optionally select a subtile }; /** diff --git a/vpr/src/base/setup_clocks.cpp b/vpr/src/base/setup_clocks.cpp index f1232005a42..ae62c278f4f 100644 --- a/vpr/src/base/setup_clocks.cpp +++ b/vpr/src/base/setup_clocks.cpp @@ -15,10 +15,9 @@ using vtr::FormulaParser; using vtr::t_formula_data; -static MetalLayer get_metal_layer_from_name( - std::string metal_layer_name, - std::unordered_map clock_metal_layers, - std::string clock_network_name); +static MetalLayer get_metal_layer_from_name(std::string metal_layer_name, + std::unordered_map clock_metal_layers, + std::string clock_network_name); static void setup_clock_network_wires(const t_arch& Arch, FormulaParser& p, std::vector& segment_inf); static void setup_clock_connections(const t_arch& Arch, FormulaParser& p); @@ -52,23 +51,18 @@ void setup_clock_network_wires(const t_arch& Arch, FormulaParser& p, std::vector spine->set_clock_name(clock_network_arch.name); spine->set_num_instance(clock_network_arch.num_inst); - spine->set_metal_layer(get_metal_layer_from_name( - clock_network_arch.metal_layer, - clock_metal_layers, - clock_network_arch.name)); - spine->set_initial_wire_location( - p.parse_formula(clock_network_arch.wire.start, vars), - p.parse_formula(clock_network_arch.wire.end, vars), - p.parse_formula(clock_network_arch.wire.position, vars)); - spine->set_wire_repeat( - p.parse_formula(clock_network_arch.repeat.x, vars), - p.parse_formula(clock_network_arch.repeat.y, vars)); + spine->set_metal_layer(get_metal_layer_from_name(clock_network_arch.metal_layer, clock_metal_layers, + clock_network_arch.name)); + spine->set_initial_wire_location(p.parse_formula(clock_network_arch.wire.start, vars), + p.parse_formula(clock_network_arch.wire.end, vars), + p.parse_formula(clock_network_arch.wire.position, vars)); + spine->set_wire_repeat(p.parse_formula(clock_network_arch.repeat.x, vars), + p.parse_formula(clock_network_arch.repeat.y, vars)); spine->set_drive_location(p.parse_formula(clock_network_arch.drive.offset, vars)); spine->set_drive_switch(clock_network_arch.drive.arch_switch_idx); spine->set_drive_name(clock_network_arch.drive.name); - spine->set_tap_locations( - p.parse_formula(clock_network_arch.tap.offset, vars), - p.parse_formula(clock_network_arch.tap.increment, vars)); + spine->set_tap_locations(p.parse_formula(clock_network_arch.tap.offset, vars), + p.parse_formula(clock_network_arch.tap.increment, vars)); spine->set_tap_name(clock_network_arch.tap.name); spine->create_segments(segment_inf); @@ -81,23 +75,18 @@ void setup_clock_network_wires(const t_arch& Arch, FormulaParser& p, std::vector rib->set_clock_name(clock_network_arch.name); rib->set_num_instance(clock_network_arch.num_inst); - rib->set_metal_layer(get_metal_layer_from_name( - clock_network_arch.metal_layer, - clock_metal_layers, - clock_network_arch.name)); - rib->set_initial_wire_location( - p.parse_formula(clock_network_arch.wire.start, vars), - p.parse_formula(clock_network_arch.wire.end, vars), - p.parse_formula(clock_network_arch.wire.position, vars)); - rib->set_wire_repeat( - p.parse_formula(clock_network_arch.repeat.x, vars), - p.parse_formula(clock_network_arch.repeat.y, vars)); + rib->set_metal_layer(get_metal_layer_from_name(clock_network_arch.metal_layer, clock_metal_layers, + clock_network_arch.name)); + rib->set_initial_wire_location(p.parse_formula(clock_network_arch.wire.start, vars), + p.parse_formula(clock_network_arch.wire.end, vars), + p.parse_formula(clock_network_arch.wire.position, vars)); + rib->set_wire_repeat(p.parse_formula(clock_network_arch.repeat.x, vars), + p.parse_formula(clock_network_arch.repeat.y, vars)); rib->set_drive_location(p.parse_formula(clock_network_arch.drive.offset, vars)); rib->set_drive_switch(clock_network_arch.drive.arch_switch_idx); rib->set_drive_name(clock_network_arch.drive.name); - rib->set_tap_locations( - p.parse_formula(clock_network_arch.tap.offset, vars), - p.parse_formula(clock_network_arch.tap.increment, vars)); + rib->set_tap_locations(p.parse_formula(clock_network_arch.tap.offset, vars), + p.parse_formula(clock_network_arch.tap.increment, vars)); rib->set_tap_name(clock_network_arch.tap.name); rib->create_segments(segment_inf); @@ -109,8 +98,7 @@ void setup_clock_network_wires(const t_arch& Arch, FormulaParser& p, std::vector break; } default: { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Found unsupported clock network type for '%s' clock network", + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Found unsupported clock network type for '%s' clock network", clock_network_arch.name.c_str()); } } @@ -133,7 +121,8 @@ void setup_clock_connections(const t_arch& Arch, FormulaParser& p) { for (auto clock_connection_arch : clock_connections_arch) { if (clock_connection_arch.from == "ROUTING") { clock_connections_device.emplace_back(new RoutingToClockConnection); - if (RoutingToClockConnection* routing_to_clock = dynamic_cast(clock_connections_device.back().get())) { + if (RoutingToClockConnection* routing_to_clock + = dynamic_cast(clock_connections_device.back().get())) { //TODO: Add error check to check that clock name and tap name exist and that only // two names are returned by the below function auto names = vtr::split(clock_connection_arch.to, "."); @@ -141,16 +130,16 @@ void setup_clock_connections(const t_arch& Arch, FormulaParser& p) { routing_to_clock->set_clock_name_to_connect_to(names[0]); routing_to_clock->set_clock_switch_point_name(names[1]); - routing_to_clock->set_switch_location( - p.parse_formula(clock_connection_arch.locationx, vars), - p.parse_formula(clock_connection_arch.locationy, vars)); + routing_to_clock->set_switch_location(p.parse_formula(clock_connection_arch.locationx, vars), + p.parse_formula(clock_connection_arch.locationy, vars)); routing_to_clock->set_switch(clock_connection_arch.arch_switch_idx); routing_to_clock->set_fc_val(clock_connection_arch.fc); } } else if (clock_connection_arch.to == "CLOCK") { clock_connections_device.emplace_back(new ClockToPinsConnection); - if (ClockToPinsConnection* clock_to_pins = dynamic_cast(clock_connections_device.back().get())) { + if (ClockToPinsConnection* clock_to_pins + = dynamic_cast(clock_connections_device.back().get())) { //TODO: Add error check to check that clock name and tap name exist and that only // two names are returned by the below function auto names = vtr::split(clock_connection_arch.from, "."); @@ -163,7 +152,8 @@ void setup_clock_connections(const t_arch& Arch, FormulaParser& p) { } } else { clock_connections_device.emplace_back(new ClockToClockConneciton); - if (ClockToClockConneciton* clock_to_clock = dynamic_cast(clock_connections_device.back().get())) { + if (ClockToClockConneciton* clock_to_clock + = dynamic_cast(clock_connections_device.back().get())) { //TODO: Add error check to check that clock name and tap name exist and that only // two names are returned by the below function auto to_names = vtr::split(clock_connection_arch.to, "."); @@ -181,18 +171,16 @@ void setup_clock_connections(const t_arch& Arch, FormulaParser& p) { } } -MetalLayer get_metal_layer_from_name( - std::string metal_layer_name, - std::unordered_map clock_metal_layers, - std::string clock_network_name) { +MetalLayer get_metal_layer_from_name(std::string metal_layer_name, + std::unordered_map clock_metal_layers, + std::string clock_network_name) { auto itter = clock_metal_layers.find(metal_layer_name); if (itter == clock_metal_layers.end()) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Metal layer '%s' for clock network '%s' not found. Check to make sure that it is" "included in the clock architecture description", - metal_layer_name.c_str(), - clock_network_name.c_str()); + metal_layer_name.c_str(), clock_network_name.c_str()); } // Metal layer was found. Copy over from arch description to proper data type diff --git a/vpr/src/base/setup_noc.cpp b/vpr/src/base/setup_noc.cpp index ff05687c414..509fd2dd900 100644 --- a/vpr/src/base/setup_noc.cpp +++ b/vpr/src/base/setup_noc.cpp @@ -26,7 +26,8 @@ void setup_noc(const t_arch& arch) { // go through the FPGA grid and find the noc router tiles // then store the position - auto noc_router_tiles = identify_and_store_noc_router_tile_positions(device_ctx.grid, arch.noc->noc_router_tile_name); + auto noc_router_tiles + = identify_and_store_noc_router_tile_positions(device_ctx.grid, arch.noc->noc_router_tile_name); // check whether the noc topology information provided uses more than the number of available routers in the FPGA if (noc_router_tiles.size() < arch.noc->router_list.size()) { @@ -38,10 +39,11 @@ void setup_noc(const t_arch& arch) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, "The Provided NoC topology information in the architecture file " "uses less number of routers than what is available in the FPGA device."); - } else if (noc_router_tiles.empty()) { // case where no physical router tiles were found - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "No physical NoC routers were found on the FPGA device. " - "Either the provided name for the physical router tile was incorrect or the FPGA device has no routers."); + } else if (noc_router_tiles.empty()) { // case where no physical router tiles were found + VPR_FATAL_ERROR( + VPR_ERROR_OTHER, + "No physical NoC routers were found on the FPGA device. " + "Either the provided name for the physical router tile was incorrect or the FPGA device has no routers."); } // store the reference to device grid with @@ -64,8 +66,9 @@ void setup_noc(const t_arch& arch) { } } -vtr::vector identify_and_store_noc_router_tile_positions(const DeviceGrid& device_grid, - std::string_view noc_router_tile_name) { +vtr::vector identify_and_store_noc_router_tile_positions( + const DeviceGrid& device_grid, + std::string_view noc_router_tile_name) { const int num_layers = device_grid.get_num_layers(); const int grid_width = (int)device_grid.width(); const int grid_height = (int)device_grid.height(); @@ -160,8 +163,9 @@ void create_noc_routers(const t_noc_inf& noc_info, } // use Euclidean distance to calculate the length between the current user described router and the physical router - float curr_calculated_distance = std::hypot(physical_router.tile_centroid_x - logical_router.device_x_position, - physical_router.tile_centroid_y - logical_router.device_y_position); + float curr_calculated_distance + = std::hypot(physical_router.tile_centroid_x - logical_router.device_x_position, + physical_router.tile_centroid_y - logical_router.device_y_position); // if the current distance is the same as the previous shortest distance if (vtr::isclose(curr_calculated_distance, shortest_distance)) { @@ -169,7 +173,7 @@ void create_noc_routers(const t_noc_inf& noc_info, error_case_physical_router_index_1 = closest_physical_router; error_case_physical_router_index_2 = curr_physical_router_index; - // case where the current logical router is closest to the physical router tile + // case where the current logical router is closest to the physical router tile } else if (curr_calculated_distance < shortest_distance) { // update the shortest distance and then the closest router shortest_distance = curr_calculated_distance; @@ -179,23 +183,30 @@ void create_noc_routers(const t_noc_inf& noc_info, // make sure that there was at least one physical router on the same layer as the logical router if (shortest_distance == std::numeric_limits::max()) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Router with ID:'%d' is located on layer %d, but no physical router was found on this layer.", - logical_router.id, logical_router.device_layer_position); + VPR_FATAL_ERROR( + VPR_ERROR_OTHER, + "Router with ID:'%d' is located on layer %d, but no physical router was found on this layer.", + logical_router.id, logical_router.device_layer_position); } // check the case where two physical router tiles have the same distance to the given logical router if (error_case_physical_router_index_1 == closest_physical_router) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Router with ID:'%d' has the same distance to physical router tiles located at position (%d,%d) and (%d,%d). Therefore, no router assignment could be made.", - logical_router.id, noc_router_tiles[error_case_physical_router_index_1].grid_width_position, noc_router_tiles[error_case_physical_router_index_1].grid_height_position, - noc_router_tiles[error_case_physical_router_index_2].grid_width_position, noc_router_tiles[error_case_physical_router_index_2].grid_height_position); + "Router with ID:'%d' has the same distance to physical router tiles located at position " + "(%d,%d) and (%d,%d). Therefore, no router assignment could be made.", + logical_router.id, noc_router_tiles[error_case_physical_router_index_1].grid_width_position, + noc_router_tiles[error_case_physical_router_index_1].grid_height_position, + noc_router_tiles[error_case_physical_router_index_2].grid_width_position, + noc_router_tiles[error_case_physical_router_index_2].grid_height_position); } // check if the current physical router was already assigned previously, if so then throw an error if (router_assignments[closest_physical_router] != PHYSICAL_ROUTER_NOT_ASSIGNED) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Routers with IDs:'%d' and '%d' are both closest to physical router tile located at (%d,%d) and the physical router could not be assigned multiple times.", - logical_router.id, router_assignments[closest_physical_router], noc_router_tiles[closest_physical_router].grid_width_position, + VPR_FATAL_ERROR(VPR_ERROR_OTHER, + "Routers with IDs:'%d' and '%d' are both closest to physical router tile located at " + "(%d,%d) and the physical router could not be assigned multiple times.", + logical_router.id, router_assignments[closest_physical_router], + noc_router_tiles[closest_physical_router].grid_width_position, noc_router_tiles[closest_physical_router].grid_height_position); } @@ -204,11 +215,9 @@ void create_noc_routers(const t_noc_inf& noc_info, // at this point, the closest user described router to the current physical router was found // so add the router to the NoC - noc_model->add_router(logical_router.id, - noc_router_tiles[closest_physical_router].grid_width_position, + noc_model->add_router(logical_router.id, noc_router_tiles[closest_physical_router].grid_width_position, noc_router_tiles[closest_physical_router].grid_height_position, - noc_router_tiles[closest_physical_router].layer_position, - router_latency); + noc_router_tiles[closest_physical_router].layer_position, router_latency); // add the new assignment to the tracker router_assignments[closest_physical_router] = logical_router.id; @@ -237,12 +246,14 @@ void create_noc_links(const t_noc_inf& noc_info, NocStorage* noc_model) { // check if this link has an overridden latency auto lat_it = noc_info.link_latency_overrides.find({router.id, conn_router_id}); // use the link-specific latency if it has an overridden latency, otherwise use the NoC-wide link latency - double link_lat = (lat_it == noc_info.link_latency_overrides.end()) ? noc_info.link_latency : lat_it->second; + double link_lat + = (lat_it == noc_info.link_latency_overrides.end()) ? noc_info.link_latency : lat_it->second; // check if this link has an overridden bandwidth auto bw_it = noc_info.link_bandwidth_overrides.find({router.id, conn_router_id}); // use the link-specific bandwidth if it has an overridden bandwidth, otherwise use the NoC-wide link bandwidth - double link_bw = (bw_it == noc_info.link_bandwidth_overrides.end()) ? noc_info.link_bandwidth : bw_it->second; + double link_bw + = (bw_it == noc_info.link_bandwidth_overrides.end()) ? noc_info.link_bandwidth : bw_it->second; // add the link to the Noc noc_model->add_link(source_router, sink_router, link_bw, link_lat); diff --git a/vpr/src/base/setup_noc.h b/vpr/src/base/setup_noc.h index 4052ec4d940..f3f7b5e0434 100644 --- a/vpr/src/base/setup_noc.h +++ b/vpr/src/base/setup_noc.h @@ -79,8 +79,9 @@ void setup_noc(const t_arch& arch); * * @return The grid position information for all NoC router tiles in the FPGA. */ -vtr::vector identify_and_store_noc_router_tile_positions(const DeviceGrid& device_grid, - std::string_view noc_router_tile_name); +vtr::vector identify_and_store_noc_router_tile_positions( + const DeviceGrid& device_grid, + std::string_view noc_router_tile_name); /** * @brief Creates NoC routers and adds them to the NoC model based diff --git a/vpr/src/base/stats.cpp b/vpr/src/base/stats.cpp index bda53d16a56..400a4f4921d 100644 --- a/vpr/src/base/stats.cpp +++ b/vpr/src/base/stats.cpp @@ -72,9 +72,7 @@ void routing_stats(const Netlist<>& net_list, auto type = device_ctx.grid.get_physical_type({i, j, layer_num}); int width_offset = device_ctx.grid.get_width_offset({i, j, layer_num}); int height_offset = device_ctx.grid.get_height_offset({i, j, layer_num}); - if (width_offset == 0 - && height_offset == 0 - && !is_io_type(type) + if (width_offset == 0 && height_offset == 0 && !is_io_type(type) && type != device_ctx.EMPTY_PHYSICAL_TILE_TYPE) { if (type->area == UNDEFINED) { area += grid_logic_tile_area * type->width * type->height; @@ -103,8 +101,8 @@ void routing_stats(const Netlist<>& net_list, VTR_LOG("\tTotal used logic block area: %g\n", used_area); if (route_type == DETAILED) { - count_routing_transistors(directionality, num_rr_switch, wire_to_ipin_switch, - segment_inf, R_minW_nmos, R_minW_pmos, is_flat); + count_routing_transistors(directionality, num_rr_switch, wire_to_ipin_switch, segment_inf, R_minW_nmos, + R_minW_pmos, is_flat); get_segment_usage_stats(segment_inf); } @@ -180,17 +178,19 @@ void length_and_bends_stats(const Netlist<>& net_list, bool is_flat) { static void get_channel_occupancy_stats(const Netlist<>& net_list, bool /***/) { auto& device_ctx = g_vpr_ctx.device(); - auto chanx_occ = vtr::Matrix({{ - device_ctx.grid.width(), //[0 .. device_ctx.grid.width() - 1] (length of x channel) - device_ctx.grid.height() - 1 //[0 .. device_ctx.grid.height() - 2] (# x channels) - }}, - 0); - - auto chany_occ = vtr::Matrix({{ - device_ctx.grid.width() - 1, //[0 .. device_ctx.grid.width() - 2] (# y channels) - device_ctx.grid.height() //[0 .. device_ctx.grid.height() - 1] (length of y channel) - }}, - 0); + auto chanx_occ + = vtr::Matrix({{ + device_ctx.grid.width(), //[0 .. device_ctx.grid.width() - 1] (length of x channel) + device_ctx.grid.height() - 1 //[0 .. device_ctx.grid.height() - 2] (# x channels) + }}, + 0); + + auto chany_occ + = vtr::Matrix({{ + device_ctx.grid.width() - 1, //[0 .. device_ctx.grid.width() - 2] (# y channels) + device_ctx.grid.height() //[0 .. device_ctx.grid.height() - 1] (length of y channel) + }}, + 0); load_channel_occupancies(net_list, chanx_occ, chany_occ); VTR_LOG("\n"); @@ -279,7 +279,11 @@ static void load_channel_occupancies(const Netlist<>& net_list, * @brief Counts and returns the number of bends, wirelength, and number of routing * resource segments in net inet's routing. */ -void get_num_bends_and_length(ParentNetId inet, int* bends_ptr, int* len_ptr, int* segments_ptr, bool* is_absorbed_ptr) { +void get_num_bends_and_length(ParentNetId inet, + int* bends_ptr, + int* len_ptr, + int* segments_ptr, + bool* is_absorbed_ptr) { auto& route_ctx = g_vpr_ctx.routing(); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -292,8 +296,7 @@ void get_num_bends_and_length(ParentNetId inet, int* bends_ptr, int* len_ptr, in const vtr::optional& tree = route_ctx.route_trees[inet]; if (!tree) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "in get_num_bends_and_length: net #%lu has no routing.\n", size_t(inet)); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "in get_num_bends_and_length: net #%lu has no routing.\n", size_t(inet)); } t_rr_type prev_type = rr_graph.node_type(tree->root().inode); @@ -358,8 +361,7 @@ void print_wirelen_prob_dist(bool is_flat) { two_point_length = (float)length / (float)(num_sinks); index = (int)two_point_length; if (index >= prob_dist_size) { - VTR_LOG_WARN("Index (%d) to prob_dist exceeds its allocated size (%d).\n", - index, prob_dist_size); + VTR_LOG_WARN("Index (%d) to prob_dist exceeds its allocated size (%d).\n", index, prob_dist_size); VTR_LOG("Realloc'ing to increase 2-pin wirelen prob distribution array.\n"); /* Resized to prob_dist + incr. Elements after old prob_dist_size set @@ -372,8 +374,7 @@ void print_wirelen_prob_dist(bool is_flat) { index++; if (index >= prob_dist_size) { - VTR_LOG_WARN("Index (%d) to prob_dist exceeds its allocated size (%d).\n", - index, prob_dist_size); + VTR_LOG_WARN("Index (%d) to prob_dist exceeds its allocated size (%d).\n", index, prob_dist_size); VTR_LOG("Realloc'ing to increase 2-pin wirelen prob distribution array.\n"); incr = index - prob_dist_size + 2; prob_dist_size += incr; diff --git a/vpr/src/base/stats.h b/vpr/src/base/stats.h index d02cae8f9a0..b401c1d29da 100644 --- a/vpr/src/base/stats.h +++ b/vpr/src/base/stats.h @@ -46,6 +46,7 @@ double linear_regression_vector(const std::vector& vals, size_t start_x = 0) denominator += (x - x_avg) * (x - x_avg); } - if (denominator == 0) return std::numeric_limits::max(); + if (denominator == 0) + return std::numeric_limits::max(); return numerator / denominator; } diff --git a/vpr/src/base/user_place_constraints.cpp b/vpr/src/base/user_place_constraints.cpp index b8a6f3bd999..becefae1f06 100644 --- a/vpr/src/base/user_place_constraints.cpp +++ b/vpr/src/base/user_place_constraints.cpp @@ -25,17 +25,11 @@ PartitionId UserPlaceConstraints::get_atom_partition(AtomBlockId blk_id) const { } } -void UserPlaceConstraints::add_partition(const Partition& part) { - partitions.push_back(part); -} +void UserPlaceConstraints::add_partition(const Partition& part) { partitions.push_back(part); } -const Partition& UserPlaceConstraints::get_partition(PartitionId part_id) const { - return partitions[part_id]; -} +const Partition& UserPlaceConstraints::get_partition(PartitionId part_id) const { return partitions[part_id]; } -Partition& UserPlaceConstraints::get_mutable_partition(PartitionId part_id) { - return partitions[part_id]; -} +Partition& UserPlaceConstraints::get_mutable_partition(PartitionId part_id) { return partitions[part_id]; } std::vector UserPlaceConstraints::get_part_atoms(PartitionId part_id) const { std::vector part_atoms; @@ -49,9 +43,7 @@ std::vector UserPlaceConstraints::get_part_atoms(PartitionId part_i return part_atoms; } -int UserPlaceConstraints::get_num_partitions() const { - return partitions.size(); -} +int UserPlaceConstraints::get_num_partitions() const { return partitions.size(); } const PartitionRegion& UserPlaceConstraints::get_partition_pr(PartitionId part_id) const { return partitions[part_id].get_part_region(); diff --git a/vpr/src/base/user_route_constraints.cpp b/vpr/src/base/user_route_constraints.cpp index 67cabe6b20e..3571df74b84 100644 --- a/vpr/src/base/user_route_constraints.cpp +++ b/vpr/src/base/user_route_constraints.cpp @@ -10,7 +10,8 @@ const std::pair UserRouteConstraints::get_route_cons // throw an error if the index is out of range if ((route_constraints_.size() == 0) || (idx > route_constraints_.size() - 1)) { VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "in get_route_constraint_by_idx: index %u is out of range. The unordered map for route constraints has a size of %u\n", + "in get_route_constraint_by_idx: index %u is out of range. The unordered map for route " + "constraints has a size of %u\n", idx, route_constraints_.size()); } @@ -70,6 +71,4 @@ const std::string UserRouteConstraints::get_routing_network_name_by_net_name(std return route_scheme.network_name(); } -int UserRouteConstraints::get_num_route_constraints(void) const { - return route_constraints_.size(); -} \ No newline at end of file +int UserRouteConstraints::get_num_route_constraints(void) const { return route_constraints_.size(); } \ No newline at end of file diff --git a/vpr/src/base/user_route_constraints.h b/vpr/src/base/user_route_constraints.h index ec925d7887d..b6bc1d035ac 100644 --- a/vpr/src/base/user_route_constraints.h +++ b/vpr/src/base/user_route_constraints.h @@ -36,22 +36,14 @@ class RoutingScheme { , route_model_(route_model) {} // Getters - std::string network_name() const { - return network_name_; - } + std::string network_name() const { return network_name_; } - e_clock_modeling route_model() const { - return route_model_; - } + e_clock_modeling route_model() const { return route_model_; } // Setters - void set_network_name(const std::string& network_name) { - network_name_ = network_name; - } + void set_network_name(const std::string& network_name) { network_name_ = network_name; } - void set_route_model(e_clock_modeling route_model) { - route_model_ = route_model; - } + void set_route_model(e_clock_modeling route_model) { route_model_ = route_model; } // Reset network_name_ and route_model_ to their default values void reset() { diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index 8f7df673b68..da310b8c78b 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -91,9 +91,9 @@ #include "load_flat_place.h" #ifdef VPR_USE_TBB -# define TBB_PREVIEW_GLOBAL_CONTROL 1 /* Needed for compatibility with old TBB versions */ -# include -# include +#define TBB_PREVIEW_GLOBAL_CONTROL 1 /* Needed for compatibility with old TBB versions */ +#include +#include #endif #ifndef NO_SERVER @@ -225,8 +225,9 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a #else //No parallel execution support if (num_workers != 1) { - VTR_LOG_WARN("VPR was compiled without parallel execution support, ignoring the specified number of workers (%zu)", - options->num_workers.value()); + VTR_LOG_WARN( + "VPR was compiled without parallel execution support, ignoring the specified number of workers (%zu)", + options->num_workers.value()); } #endif @@ -276,43 +277,19 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a } /* Read in arch and circuit */ - SetupVPR(options, - vpr_setup->TimingEnabled, - true, - &vpr_setup->FileNameOpts, - arch, - &vpr_setup->user_models, - &vpr_setup->library_models, - &vpr_setup->NetlistOpts, - &vpr_setup->PackerOpts, - &vpr_setup->PlacerOpts, - &vpr_setup->APOpts, - &vpr_setup->AnnealSched, - &vpr_setup->RouterOpts, - &vpr_setup->AnalysisOpts, - &vpr_setup->NocOpts, - &vpr_setup->ServerOpts, - &vpr_setup->RoutingArch, - &vpr_setup->PackerRRGraph, - vpr_setup->Segments, - &vpr_setup->Timing, - &vpr_setup->ShowGraphics, - &vpr_setup->GraphPause, - &vpr_setup->SaveGraphics, - &vpr_setup->GraphicsCommands, - &vpr_setup->PowerOpts, - vpr_setup); + SetupVPR(options, vpr_setup->TimingEnabled, true, &vpr_setup->FileNameOpts, arch, &vpr_setup->user_models, + &vpr_setup->library_models, &vpr_setup->NetlistOpts, &vpr_setup->PackerOpts, &vpr_setup->PlacerOpts, + &vpr_setup->APOpts, &vpr_setup->AnnealSched, &vpr_setup->RouterOpts, &vpr_setup->AnalysisOpts, + &vpr_setup->NocOpts, &vpr_setup->ServerOpts, &vpr_setup->RoutingArch, &vpr_setup->PackerRRGraph, + vpr_setup->Segments, &vpr_setup->Timing, &vpr_setup->ShowGraphics, &vpr_setup->GraphPause, + &vpr_setup->SaveGraphics, &vpr_setup->GraphicsCommands, &vpr_setup->PowerOpts, vpr_setup); /* Check inputs are reasonable */ CheckArch(*arch); /* Verify settings don't conflict or otherwise not make sense */ - CheckSetup(vpr_setup->PackerOpts, - vpr_setup->PlacerOpts, - vpr_setup->APOpts, - vpr_setup->RouterOpts, - vpr_setup->ServerOpts, - vpr_setup->RoutingArch, vpr_setup->Segments, vpr_setup->Timing, arch->Chans); + CheckSetup(vpr_setup->PackerOpts, vpr_setup->PlacerOpts, vpr_setup->APOpts, vpr_setup->RouterOpts, + vpr_setup->ServerOpts, vpr_setup->RoutingArch, vpr_setup->Segments, vpr_setup->Timing, arch->Chans); /* flush any messages to user still in stdout that hasn't gotten displayed */ fflush(stdout); @@ -333,21 +310,18 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a auto& timing_ctx = g_vpr_ctx.mutable_timing(); { vtr::ScopedStartFinishTimer t("Build Timing Graph"); - timing_ctx.graph = TimingGraphBuilder(atom_ctx.nlist, atom_ctx.lookup).timing_graph(options->allow_dangling_combinational_nodes); + timing_ctx.graph = TimingGraphBuilder(atom_ctx.nlist, atom_ctx.lookup) + .timing_graph(options->allow_dangling_combinational_nodes); VTR_LOG(" Timing Graph Nodes: %zu\n", timing_ctx.graph->nodes().size()); VTR_LOG(" Timing Graph Edges: %zu\n", timing_ctx.graph->edges().size()); VTR_LOG(" Timing Graph Levels: %zu\n", timing_ctx.graph->levels().size()); } - { - print_netlist_clock_info(atom_ctx.nlist); - } + { print_netlist_clock_info(atom_ctx.nlist); } { vtr::ScopedStartFinishTimer t("Load Timing Constraints"); timing_ctx.constraints = read_sdc(vpr_setup->Timing, atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph); } - { - set_terminate_if_timing_fails(options->terminate_if_timing_fails); - } + { set_terminate_if_timing_fails(options->terminate_if_timing_fails); } } //Initialize vpr floorplanning and routing constraints @@ -357,7 +331,8 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a // Check if there are route constraints specified, and if the clock modeling setting is explicitly specified // If both conditions are met, issue a warning that the route constraints will override the clock modeling setting. - if (g_vpr_ctx.routing().constraints.get_num_route_constraints() && options->clock_modeling.provenance() == argparse::Provenance::SPECIFIED) { + if (g_vpr_ctx.routing().constraints.get_num_route_constraints() + && options->clock_modeling.provenance() == argparse::Provenance::SPECIFIED) { VTR_LOG_WARN("Route constraint(s) detected and will override clock modeling setting.\n"); } } @@ -416,14 +391,13 @@ bool vpr_flow(t_vpr_setup& vpr_setup, t_arch& arch) { auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& block_locs = g_vpr_ctx.placement().block_locs(); auto& placement_id = g_vpr_ctx.mutable_placement().placement_id; - placement_id = print_place(filename_opts.NetFile.c_str(), - cluster_ctx.clb_nlist.netlist_id().c_str(), - filename_opts.PlaceFile.c_str(), - block_locs); + placement_id = print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), + filename_opts.PlaceFile.c_str(), block_locs); } bool is_flat = vpr_setup.RouterOpts.flat_routing; - const Netlist<>& router_net_list = is_flat ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; + const Netlist<>& router_net_list + = is_flat ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; RouteStatus route_status; { //Route route_status = vpr_route_flow(router_net_list, vpr_setup, arch, is_flat); @@ -476,7 +450,8 @@ void vpr_create_device_grid(const t_vpr_setup& vpr_setup, const t_arch& Arch) { //Build the device float target_device_utilization = vpr_setup.PackerOpts.target_device_utilization; - device_ctx.grid = create_device_grid(vpr_setup.device_layout, Arch.grid_layouts, num_type_instances, target_device_utilization); + device_ctx.grid + = create_device_grid(vpr_setup.device_layout, Arch.grid_layouts, num_type_instances, target_device_utilization); VTR_ASSERT_MSG(device_ctx.grid.get_num_layers() <= MAX_NUM_LAYERS, "Number of layers should be less than MAX_NUM_LAYERS. " @@ -486,15 +461,16 @@ void vpr_create_device_grid(const t_vpr_setup& vpr_setup, const t_arch& Arch) { *Report on the device */ size_t num_grid_tiles = count_grid_tiles(device_ctx.grid); - VTR_LOG("FPGA sized to %zu x %zu: %zu grid tiles (%s)\n", device_ctx.grid.width(), device_ctx.grid.height(), num_grid_tiles, device_ctx.grid.name().c_str()); + VTR_LOG("FPGA sized to %zu x %zu: %zu grid tiles (%s)\n", device_ctx.grid.width(), device_ctx.grid.height(), + num_grid_tiles, device_ctx.grid.name().c_str()); VTR_LOG("\n"); VTR_LOG("Resource usage...\n"); for (const auto& type : device_ctx.logical_block_types) { - if (is_empty_type(&type)) continue; + if (is_empty_type(&type)) + continue; - VTR_LOG("\tNetlist\n\t\t%d\tblocks of type: %s\n", - num_type_instances[&type], type.name); + VTR_LOG("\tNetlist\n\t\t%d\tblocks of type: %s\n", num_type_instances[&type], type.name); VTR_LOG("\tArchitecture\n"); for (const auto equivalent_tile : type.equivalent_tiles) { @@ -502,8 +478,7 @@ void vpr_create_device_grid(const t_vpr_setup& vpr_setup, const t_arch& Arch) { //get the number of equivalent tile across all layers num_instances = (int)device_ctx.grid.num_instances(equivalent_tile, -1); - VTR_LOG("\t\t%d\tblocks of type: %s\n", - num_instances, equivalent_tile->name); + VTR_LOG("\t\t%d\tblocks of type: %s\n", num_instances, equivalent_tile->name); } } VTR_LOG("\n"); @@ -592,8 +567,8 @@ void vpr_setup_noc_routing_algorithm(const std::string& noc_routing_algorithm_na // newly created routing algorithm to it auto& noc_ctx = g_vpr_ctx.mutable_noc(); - noc_ctx.noc_flows_router = NocRoutingAlgorithmCreator::create_routing_algorithm(noc_routing_algorithm_name, - noc_ctx.noc_model); + noc_ctx.noc_flows_router + = NocRoutingAlgorithmCreator::create_routing_algorithm(noc_routing_algorithm_name, noc_ctx.noc_model); } bool vpr_pack_flow(t_vpr_setup& vpr_setup, const t_arch& arch) { @@ -622,7 +597,6 @@ bool vpr_pack_flow(t_vpr_setup& vpr_setup, const t_arch& arch) { // generate a .net file by legalizing an input flat placement file if (packer_opts.load_flat_placement) { - //Load and legalizer flat placement file vpr_load_flat_placement(vpr_setup, arch); @@ -630,12 +604,9 @@ bool vpr_pack_flow(t_vpr_setup& vpr_setup, const t_arch& arch) { vpr_load_packing(vpr_setup, arch); } else { - //Load a previous packing from the .net file vpr_load_packing(vpr_setup, arch); - } - } // Load cluster_constraints data structure. @@ -664,8 +635,7 @@ bool vpr_pack(t_vpr_setup& vpr_setup, const t_arch& arch) { int wire_segment_length = 4; float inter_cluster_delay = UNDEFINED; - if (vpr_setup.PackerOpts.timing_driven - && vpr_setup.PackerOpts.auto_compute_inter_cluster_net_delay) { + if (vpr_setup.PackerOpts.timing_driven && vpr_setup.PackerOpts.auto_compute_inter_cluster_net_delay) { /* We want to determine a reasonable fan-in to the opin, wire, and ipin switches, based * on which the intercluster delays can be estimated. The fan-in of a switch influences its * delay. @@ -705,17 +675,14 @@ bool vpr_pack(t_vpr_setup& vpr_setup, const t_arch& arch) { + wtoi_switch_del); /* multiply by 4 to get a more conservative estimate */ } - return try_pack(&vpr_setup.PackerOpts, &vpr_setup.AnalysisOpts, - &arch, vpr_setup.user_models, - vpr_setup.library_models, inter_cluster_delay, - vpr_setup.PackerRRGraph); + return try_pack(&vpr_setup.PackerOpts, &vpr_setup.AnalysisOpts, &arch, vpr_setup.user_models, + vpr_setup.library_models, inter_cluster_delay, vpr_setup.PackerRRGraph); } void vpr_load_packing(t_vpr_setup& vpr_setup, const t_arch& arch) { vtr::ScopedStartFinishTimer timer("Load packing"); - VTR_ASSERT_MSG(!vpr_setup.FileNameOpts.NetFile.empty(), - "Must have valid .net filename to load packing"); + VTR_ASSERT_MSG(!vpr_setup.FileNameOpts.NetFile.empty(), "Must have valid .net filename to load packing"); auto& cluster_ctx = g_vpr_ctx.mutable_clustering(); const AtomContext& atom_ctx = g_vpr_ctx.atom(); @@ -724,19 +691,15 @@ void vpr_load_packing(t_vpr_setup& vpr_setup, const t_arch& arch) { cluster_ctx.post_routing_clb_pin_nets.clear(); cluster_ctx.pre_routing_net_pin_mapping.clear(); - cluster_ctx.clb_nlist = read_netlist(vpr_setup.FileNameOpts.NetFile.c_str(), - &arch, - vpr_setup.FileNameOpts.verify_file_digests, - vpr_setup.PackerOpts.pack_verbosity); + cluster_ctx.clb_nlist + = read_netlist(vpr_setup.FileNameOpts.NetFile.c_str(), &arch, vpr_setup.FileNameOpts.verify_file_digests, + vpr_setup.PackerOpts.pack_verbosity); /* Load the mapping between clusters and their atoms */ init_clb_atoms_lookup(cluster_ctx.atoms_lookup, atom_ctx, cluster_ctx.clb_nlist); - process_constant_nets(g_vpr_ctx.mutable_atom().nlist, - atom_ctx.lookup, - cluster_ctx.clb_nlist, - vpr_setup.constant_net_method, - vpr_setup.PackerOpts.pack_verbosity); + process_constant_nets(g_vpr_ctx.mutable_atom().nlist, atom_ctx.lookup, cluster_ctx.clb_nlist, + vpr_setup.constant_net_method, vpr_setup.PackerOpts.pack_verbosity); { std::ofstream ofs("packing_pin_util.rpt"); @@ -745,7 +708,6 @@ void vpr_load_packing(t_vpr_setup& vpr_setup, const t_arch& arch) { } bool vpr_load_flat_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { - // set up the device grid for the legalizer auto& device_ctx = g_vpr_ctx.mutable_device(); device_ctx.arch = &arch; @@ -799,8 +761,10 @@ bool vpr_place_flow(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_a //Write out a vpr floorplanning constraints file if the option is specified if (!filename_opts.write_vpr_constraints_file.empty()) { - write_vpr_floorplan_constraints(filename_opts.write_vpr_constraints_file.c_str(), placer_opts.place_constraint_expand, placer_opts.place_constraint_subtile, - placer_opts.floorplan_num_horizontal_partitions, placer_opts.floorplan_num_vertical_partitions); + write_vpr_floorplan_constraints(filename_opts.write_vpr_constraints_file.c_str(), + placer_opts.place_constraint_expand, placer_opts.place_constraint_subtile, + placer_opts.floorplan_num_horizontal_partitions, + placer_opts.floorplan_num_vertical_partitions); } // Write out a flat placement file if the option is specified @@ -819,26 +783,13 @@ void vpr_place(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_arch& // Prime lookahead cache to avoid adding lookahead computation cost to // the placer timer. // Flat_routing is disabled in placement - get_cached_router_lookahead( - vpr_setup.RoutingArch, - vpr_setup.RouterOpts.lookahead_type, - vpr_setup.RouterOpts.write_router_lookahead, - vpr_setup.RouterOpts.read_router_lookahead, - vpr_setup.Segments, - is_flat); + get_cached_router_lookahead(vpr_setup.RoutingArch, vpr_setup.RouterOpts.lookahead_type, + vpr_setup.RouterOpts.write_router_lookahead, + vpr_setup.RouterOpts.read_router_lookahead, vpr_setup.Segments, is_flat); } - try_place(net_list, - vpr_setup.PlacerOpts, - vpr_setup.AnnealSched, - vpr_setup.RouterOpts, - vpr_setup.AnalysisOpts, - vpr_setup.NocOpts, - arch.Chans, - &vpr_setup.RoutingArch, - vpr_setup.Segments, - arch.Directs, - arch.num_directs, + try_place(net_list, vpr_setup.PlacerOpts, vpr_setup.AnnealSched, vpr_setup.RouterOpts, vpr_setup.AnalysisOpts, + vpr_setup.NocOpts, arch.Chans, &vpr_setup.RoutingArch, vpr_setup.Segments, arch.Directs, arch.num_directs, is_flat); auto& filename_opts = vpr_setup.FileNameOpts; @@ -846,10 +797,8 @@ void vpr_place(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_arch& const auto& block_locs = g_vpr_ctx.placement().block_locs(); auto& placement_id = g_vpr_ctx.mutable_placement().placement_id; - placement_id = print_place(filename_opts.NetFile.c_str(), - cluster_ctx.clb_nlist.netlist_id().c_str(), - filename_opts.PlaceFile.c_str(), - block_locs); + placement_id = print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), + filename_opts.PlaceFile.c_str(), block_locs); } void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { @@ -865,18 +814,15 @@ void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { init_placement_context(block_locs, grid_blocks); //Load an existing placement from a file - place_ctx.placement_id = read_place(filename_opts.NetFile.c_str(), filename_opts.PlaceFile.c_str(), - place_ctx.mutable_blk_loc_registry(), - filename_opts.verify_file_digests, device_ctx.grid); + place_ctx.placement_id + = read_place(filename_opts.NetFile.c_str(), filename_opts.PlaceFile.c_str(), + place_ctx.mutable_blk_loc_registry(), filename_opts.verify_file_digests, device_ctx.grid); //Ensure placement macros are loaded so that they can be drawn after placement (e.g. during routing) place_ctx.pl_macros = alloc_and_load_placement_macros(arch.Directs, arch.num_directs); } -RouteStatus vpr_route_flow(const Netlist<>& net_list, - t_vpr_setup& vpr_setup, - const t_arch& arch, - bool is_flat) { +RouteStatus vpr_route_flow(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_arch& arch, bool is_flat) { VTR_LOG("\n"); RouteStatus route_status; @@ -905,7 +851,8 @@ RouteStatus vpr_route_flow(const Netlist<>& net_list, std::shared_ptr routing_delay_calc = nullptr; if (vpr_setup.Timing.timing_analysis_enabled) { auto& atom_ctx = g_vpr_ctx.atom(); - routing_delay_calc = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, net_delay, is_flat); + routing_delay_calc + = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, net_delay, is_flat); timing_info = make_setup_hold_timing_info(routing_delay_calc, router_opts.timing_update_type); #ifndef NO_SERVER if (g_vpr_ctx.server().gate_io.is_running()) { @@ -922,17 +869,16 @@ RouteStatus vpr_route_flow(const Netlist<>& net_list, //Do the actual routing if (NO_FIXED_CHANNEL_WIDTH == chan_width) { //Find minimum channel width - route_status = vpr_route_min_W(net_list, vpr_setup, arch, timing_info, routing_delay_calc, net_delay, is_flat); + route_status + = vpr_route_min_W(net_list, vpr_setup, arch, timing_info, routing_delay_calc, net_delay, is_flat); } else { //Route at specified channel width - route_status = vpr_route_fixed_W(net_list, vpr_setup, arch, chan_width, timing_info, routing_delay_calc, net_delay, is_flat); + route_status = vpr_route_fixed_W(net_list, vpr_setup, arch, chan_width, timing_info, routing_delay_calc, + net_delay, is_flat); } //Save the routing in the .route file - print_route(net_list, - filename_opts.PlaceFile.c_str(), - filename_opts.RouteFile.c_str(), - is_flat); + print_route(net_list, filename_opts.PlaceFile.c_str(), filename_opts.RouteFile.c_str(), is_flat); } else { VTR_ASSERT(router_opts.doRouting == STAGE_LOAD); //Load a previous routing @@ -943,12 +889,7 @@ RouteStatus vpr_route_flow(const Netlist<>& net_list, vpr_create_rr_graph(vpr_setup, arch, chan_width, is_flat); } - route_status = vpr_load_routing(vpr_setup, - arch, - chan_width, - timing_info, - net_delay, - is_flat); + route_status = vpr_load_routing(vpr_setup, arch, chan_width, timing_info, net_delay, is_flat); } //Post-implementation @@ -956,30 +897,29 @@ RouteStatus vpr_route_flow(const Netlist<>& net_list, std::string graphics_msg; if (route_status.success()) { //Sanity check the routing - check_route(net_list, - router_opts.route_type, - router_opts.check_route, - is_flat); + check_route(net_list, router_opts.route_type, router_opts.check_route, is_flat); get_serial_num(net_list); //Update status VTR_LOG("Circuit successfully routed with a channel width factor of %d.\n", route_status.chan_width()); - graphics_msg = vtr::string_fmt("Routing succeeded with a channel width factor of %d.\n", route_status.chan_width()); + graphics_msg + = vtr::string_fmt("Routing succeeded with a channel width factor of %d.\n", route_status.chan_width()); } else { //Update status VTR_LOG("Circuit is unroutable with a channel width factor of %d.\n", route_status.chan_width()); - graphics_msg = vtr::string_fmt("Routing failed with a channel width factor of %d. ILLEGAL routing shown.", route_status.chan_width()); + graphics_msg = vtr::string_fmt("Routing failed with a channel width factor of %d. ILLEGAL routing shown.", + route_status.chan_width()); //Generate a report on overused nodes if specified //Otherwise, remind the user of this possible report option if (router_opts.generate_rr_node_overuse_report) { VTR_LOG("See report_overused_nodes.rpt for a detailed report on the RR node overuse information.\n"); - report_overused_nodes(net_list, - rr_graph, - is_flat); + report_overused_nodes(net_list, rr_graph, is_flat); } else { - VTR_LOG("For a detailed report on the RR node overuse information (report_overused_nodes.rpt), specify --generate_rr_node_overuse_report on.\n"); + VTR_LOG( + "For a detailed report on the RR node overuse information (report_overused_nodes.rpt), specify " + "--generate_rr_node_overuse_report on.\n"); } } @@ -987,8 +927,8 @@ RouteStatus vpr_route_flow(const Netlist<>& net_list, if (vpr_setup.Timing.timing_analysis_enabled) { if (isEchoFileEnabled(E_ECHO_FINAL_ROUTING_TIMING_GRAPH)) { auto& timing_ctx = g_vpr_ctx.timing(); - tatum::write_echo(getEchoFileName(E_ECHO_FINAL_ROUTING_TIMING_GRAPH), - *timing_ctx.graph, *timing_ctx.constraints, *routing_delay_calc, timing_info->analyzer()); + tatum::write_echo(getEchoFileName(E_ECHO_FINAL_ROUTING_TIMING_GRAPH), *timing_ctx.graph, + *timing_ctx.constraints, *routing_delay_calc, timing_info->analyzer()); } if (isEchoFileEnabled(E_ECHO_ROUTING_SINK_DELAYS)) { @@ -1015,34 +955,21 @@ RouteStatus vpr_route_fixed_W(const Netlist<>& net_list, std::shared_ptr delay_calc, NetPinsMatrix& net_delay, bool is_flat) { - get_cached_router_lookahead( - vpr_setup.RoutingArch, - vpr_setup.RouterOpts.lookahead_type, - vpr_setup.RouterOpts.write_router_lookahead, - vpr_setup.RouterOpts.read_router_lookahead, - vpr_setup.Segments, - is_flat); + get_cached_router_lookahead(vpr_setup.RoutingArch, vpr_setup.RouterOpts.lookahead_type, + vpr_setup.RouterOpts.write_router_lookahead, vpr_setup.RouterOpts.read_router_lookahead, + vpr_setup.Segments, is_flat); vtr::ScopedStartFinishTimer timer("Routing"); if (NO_FIXED_CHANNEL_WIDTH == fixed_channel_width || fixed_channel_width <= 0) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Fixed channel width must be specified when routing at fixed channel width (was %d)", fixed_channel_width); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "Fixed channel width must be specified when routing at fixed channel width (was %d)", + fixed_channel_width); } bool status = false; - status = route(net_list, - fixed_channel_width, - vpr_setup.RouterOpts, - vpr_setup.AnalysisOpts, - &vpr_setup.RoutingArch, - vpr_setup.Segments, - net_delay, - timing_info, - delay_calc, - arch.Chans, - arch.Directs, - arch.num_directs, - ScreenUpdatePriority::MAJOR, - is_flat); + status = route(net_list, fixed_channel_width, vpr_setup.RouterOpts, vpr_setup.AnalysisOpts, &vpr_setup.RoutingArch, + vpr_setup.Segments, net_delay, timing_info, delay_calc, arch.Chans, arch.Directs, arch.num_directs, + ScreenUpdatePriority::MAJOR, is_flat); return RouteStatus(status, fixed_channel_width); } @@ -1061,23 +988,11 @@ RouteStatus vpr_route_min_W(const Netlist<>& net_list, auto& router_opts = vpr_setup.RouterOpts; // Placement does not use atom_net list regardless of the status of flat_routing. - int min_W = binary_search_place_and_route((const Netlist<>&)g_vpr_ctx.clustering().clb_nlist, - net_list, - vpr_setup.PlacerOpts, - vpr_setup.AnnealSched, - router_opts, - vpr_setup.AnalysisOpts, - vpr_setup.NocOpts, - vpr_setup.FileNameOpts, - &arch, - router_opts.verify_binary_search, - router_opts.min_channel_width_hint, - &vpr_setup.RoutingArch, - vpr_setup.Segments, - net_delay, - timing_info, - delay_calc, - is_flat); + int min_W = binary_search_place_and_route( + (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist, net_list, vpr_setup.PlacerOpts, vpr_setup.AnnealSched, + router_opts, vpr_setup.AnalysisOpts, vpr_setup.NocOpts, vpr_setup.FileNameOpts, &arch, + router_opts.verify_binary_search, router_opts.min_channel_width_hint, &vpr_setup.RoutingArch, + vpr_setup.Segments, net_delay, timing_info, delay_calc, is_flat); bool status = (min_W > 0); return RouteStatus(status, min_W); @@ -1091,18 +1006,20 @@ RouteStatus vpr_load_routing(t_vpr_setup& vpr_setup, bool is_flat) { vtr::ScopedStartFinishTimer timer("Load Routing"); if (NO_FIXED_CHANNEL_WIDTH == fixed_channel_width) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Fixed channel width must be specified when loading routing (was %d)", fixed_channel_width); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Fixed channel width must be specified when loading routing (was %d)", + fixed_channel_width); } auto& filename_opts = vpr_setup.FileNameOpts; //Load the routing from a file - bool is_legal = read_route(filename_opts.RouteFile.c_str(), vpr_setup.RouterOpts, filename_opts.verify_file_digests, is_flat); - const Netlist<>& router_net_list = is_flat ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; + bool is_legal + = read_route(filename_opts.RouteFile.c_str(), vpr_setup.RouterOpts, filename_opts.verify_file_digests, is_flat); + const Netlist<>& router_net_list + = is_flat ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; if (vpr_setup.Timing.timing_analysis_enabled) { //Update timing info - load_net_delay_from_routing(router_net_list, - net_delay); + load_net_delay_from_routing(router_net_list, net_delay); timing_info->update(); } init_draw_coords(fixed_channel_width, g_vpr_ctx.placement().blk_loc_registry()); @@ -1133,25 +1050,16 @@ void vpr_create_rr_graph(t_vpr_setup& vpr_setup, const t_arch& arch, int chan_wi free_rr_graph(); //Create the RR graph - create_rr_graph(graph_type, - device_ctx.physical_tile_types, - device_ctx.grid, - chan_width, - det_routing_arch, - vpr_setup.Segments, - router_opts, - arch.Directs, arch.num_directs, - &warnings, - is_flat); + create_rr_graph(graph_type, device_ctx.physical_tile_types, device_ctx.grid, chan_width, det_routing_arch, + vpr_setup.Segments, router_opts, arch.Directs, arch.num_directs, &warnings, is_flat); //Initialize drawing, now that we have an RR graph init_draw_coords(chan_width_fac, g_vpr_ctx.placement().blk_loc_registry()); } void vpr_init_graphics(const t_vpr_setup& vpr_setup, const t_arch& arch, bool is_flat) { /* Startup X graphics */ - init_graphics_state(vpr_setup.ShowGraphics, vpr_setup.GraphPause, - vpr_setup.RouterOpts.route_type, vpr_setup.SaveGraphics, - vpr_setup.GraphicsCommands, is_flat); + init_graphics_state(vpr_setup.ShowGraphics, vpr_setup.GraphPause, vpr_setup.RouterOpts.route_type, + vpr_setup.SaveGraphics, vpr_setup.GraphicsCommands, is_flat); if (vpr_setup.ShowGraphics || vpr_setup.SaveGraphics || !vpr_setup.GraphicsCommands.empty()) alloc_draw_structs(&arch); } @@ -1276,7 +1184,8 @@ void free_device(const t_det_routing_arch& /*routing_arch*/) { device_ctx.chan_width.x_list.clear(); device_ctx.chan_width.y_list.clear(); - device_ctx.chan_width.max = device_ctx.chan_width.x_max = device_ctx.chan_width.y_max = device_ctx.chan_width.x_min = device_ctx.chan_width.y_min = 0; + device_ctx.chan_width.max = device_ctx.chan_width.x_max = device_ctx.chan_width.y_max = device_ctx.chan_width.x_min + = device_ctx.chan_width.y_min = 0; device_ctx.arch_switch_inf.clear(); @@ -1331,8 +1240,7 @@ static void free_routing() { */ static void free_noc() {} -void vpr_free_vpr_data_structures(t_arch& Arch, - t_vpr_setup& vpr_setup) { +void vpr_free_vpr_data_structures(t_arch& Arch, t_vpr_setup& vpr_setup) { free_all_lb_type_rr_graph(vpr_setup.PackerRRGraph); free_circuit(); free_arch(&Arch); @@ -1344,8 +1252,7 @@ void vpr_free_vpr_data_structures(t_arch& Arch, free_noc(); } -void vpr_free_all(t_arch& Arch, - t_vpr_setup& vpr_setup) { +void vpr_free_all(t_arch& Arch, t_vpr_setup& vpr_setup) { free_rr_graph(); if (vpr_setup.RouterOpts.doRouting) { free_route_structs(); @@ -1359,9 +1266,7 @@ void vpr_free_all(t_arch& Arch, ****************************************************************************************************/ ///@brief Read in user options -void vpr_read_options(const int argc, const char** argv, t_options* options) { - *options = read_options(argc, argv); -} +void vpr_read_options(const int argc, const char** argv, t_options* options) { *options = read_options(argc, argv); } ///@brief Read in arch and circuit void vpr_setup_vpr(t_options* Options, @@ -1390,37 +1295,13 @@ void vpr_setup_vpr(t_options* Options, std::string* GraphicsCommands, t_power_opts* PowerOpts, t_vpr_setup* vpr_setup) { - SetupVPR(Options, - TimingEnabled, - readArchFile, - FileNameOpts, - Arch, - user_models, - library_models, - NetlistOpts, - PackerOpts, - PlacerOpts, - APOpts, - AnnealSched, - RouterOpts, - AnalysisOpts, - NocOpts, - ServerOpts, - RoutingArch, - PackerRRGraph, - Segments, - Timing, - ShowGraphics, - GraphPause, - SaveGraphics, - GraphicsCommands, - PowerOpts, + SetupVPR(Options, TimingEnabled, readArchFile, FileNameOpts, Arch, user_models, library_models, NetlistOpts, + PackerOpts, PlacerOpts, APOpts, AnnealSched, RouterOpts, AnalysisOpts, NocOpts, ServerOpts, RoutingArch, + PackerRRGraph, Segments, Timing, ShowGraphics, GraphPause, SaveGraphics, GraphicsCommands, PowerOpts, vpr_setup); } -void vpr_check_arch(const t_arch& Arch) { - CheckArch(Arch); -} +void vpr_check_arch(const t_arch& Arch) { CheckArch(Arch); } ///@brief Verify settings don't conflict or otherwise not make sense void vpr_check_setup(const t_packer_opts& PackerOpts, @@ -1432,21 +1313,11 @@ void vpr_check_setup(const t_packer_opts& PackerOpts, const std::vector& Segments, const t_timing_inf& Timing, const t_chan_width_dist& Chans) { - CheckSetup(PackerOpts, - PlacerOpts, - APOpts, - RouterOpts, - ServerOpts, - RoutingArch, - Segments, - Timing, - Chans); + CheckSetup(PackerOpts, PlacerOpts, APOpts, RouterOpts, ServerOpts, RoutingArch, Segments, Timing, Chans); } ///@brief Show current setup -void vpr_show_setup(const t_vpr_setup& vpr_setup) { - ShowSetup(vpr_setup); -} +void vpr_show_setup(const t_vpr_setup& vpr_setup) { ShowSetup(vpr_setup); } bool vpr_analysis_flow(const Netlist<>& net_list, t_vpr_setup& vpr_setup, @@ -1455,13 +1326,15 @@ bool vpr_analysis_flow(const Netlist<>& net_list, bool is_flat) { auto& analysis_opts = vpr_setup.AnalysisOpts; - if (analysis_opts.doAnalysis == STAGE_SKIP) return true; //Skipped + if (analysis_opts.doAnalysis == STAGE_SKIP) + return true; //Skipped - if (analysis_opts.doAnalysis == STAGE_AUTO && !route_status.success()) return false; //Not run + if (analysis_opts.doAnalysis == STAGE_AUTO && !route_status.success()) + return false; //Not run - VTR_ASSERT_MSG(analysis_opts.doAnalysis == STAGE_DO - || (analysis_opts.doAnalysis == STAGE_AUTO && route_status.success()), - "Analysis should run only if forced, or implementation legal"); + VTR_ASSERT_MSG( + analysis_opts.doAnalysis == STAGE_DO || (analysis_opts.doAnalysis == STAGE_AUTO && route_status.success()), + "Analysis should run only if forced, or implementation legal"); if (!route_status.success()) { VTR_LOG("\n"); @@ -1481,28 +1354,22 @@ bool vpr_analysis_flow(const Netlist<>& net_list, if (is_flat) { sync_netlists_to_routing_flat(); } else { - sync_netlists_to_routing(net_list, - g_vpr_ctx.device(), - g_vpr_ctx.mutable_atom(), - g_vpr_ctx.mutable_clustering(), - g_vpr_ctx.placement(), + sync_netlists_to_routing(net_list, g_vpr_ctx.device(), g_vpr_ctx.mutable_atom(), + g_vpr_ctx.mutable_clustering(), g_vpr_ctx.placement(), vpr_setup.PackerOpts.pack_verbosity > 2); } std::string post_routing_packing_output_file_name = vpr_setup.PackerOpts.output_file + ".post_routing"; - write_packing_results_to_xml(vpr_setup.PackerOpts.global_clocks, - Arch.architecture_id, - post_routing_packing_output_file_name.c_str()); + write_packing_results_to_xml(vpr_setup.PackerOpts.global_clocks, Arch.architecture_id, + post_routing_packing_output_file_name.c_str()); } else { - VTR_LOG_WARN("Synchronization between packing and routing results is not applied due to illegal circuit implementation\n"); + VTR_LOG_WARN( + "Synchronization between packing and routing results is not applied due to illegal circuit " + "implementation\n"); } VTR_LOG("\n"); - vpr_analysis(net_list, - vpr_setup, - Arch, - route_status, - is_flat); + vpr_analysis(net_list, vpr_setup, Arch, route_status, is_flat); return true; } @@ -1520,16 +1387,9 @@ void vpr_analysis(const Netlist<>& net_list, VPR_FATAL_ERROR(VPR_ERROR_ANALYSIS, "No routing loaded -- can not perform post-routing analysis"); } - routing_stats(net_list, - vpr_setup.RouterOpts.full_stats, - vpr_setup.RouterOpts.route_type, - vpr_setup.Segments, - vpr_setup.RoutingArch.R_minW_nmos, - vpr_setup.RoutingArch.R_minW_pmos, - Arch.grid_logic_tile_area, - vpr_setup.RoutingArch.directionality, - vpr_setup.RoutingArch.wire_to_rr_ipin_switch, - is_flat); + routing_stats(net_list, vpr_setup.RouterOpts.full_stats, vpr_setup.RouterOpts.route_type, vpr_setup.Segments, + vpr_setup.RoutingArch.R_minW_nmos, vpr_setup.RoutingArch.R_minW_pmos, Arch.grid_logic_tile_area, + vpr_setup.RoutingArch.directionality, vpr_setup.RoutingArch.wire_to_rr_ipin_switch, is_flat); if (vpr_setup.TimingEnabled) { //Load the net delays @@ -1538,27 +1398,27 @@ void vpr_analysis(const Netlist<>& net_list, load_net_delay_from_routing(net_list, net_delay); //Do final timing analysis - auto analysis_delay_calc = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, net_delay, vpr_setup.RouterOpts.flat_routing); + auto analysis_delay_calc = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, net_delay, + vpr_setup.RouterOpts.flat_routing); auto timing_info = make_setup_hold_timing_info(analysis_delay_calc, vpr_setup.AnalysisOpts.timing_update_type); timing_info->update(); if (isEchoFileEnabled(E_ECHO_ANALYSIS_TIMING_GRAPH)) { auto& timing_ctx = g_vpr_ctx.timing(); - tatum::write_echo(getEchoFileName(E_ECHO_ANALYSIS_TIMING_GRAPH), - *timing_ctx.graph, *timing_ctx.constraints, *analysis_delay_calc, timing_info->analyzer()); + tatum::write_echo(getEchoFileName(E_ECHO_ANALYSIS_TIMING_GRAPH), *timing_ctx.graph, *timing_ctx.constraints, + *analysis_delay_calc, timing_info->analyzer()); } //Timing stats VTR_LOG("\n"); - generate_hold_timing_stats(/*prefix=*/"", *timing_info, *analysis_delay_calc, - vpr_setup.AnalysisOpts, vpr_setup.RouterOpts.flat_routing, blk_loc_registry); - generate_setup_timing_stats(/*prefix=*/"", *timing_info, *analysis_delay_calc, - vpr_setup.AnalysisOpts, vpr_setup.RouterOpts.flat_routing, blk_loc_registry); + generate_hold_timing_stats(/*prefix=*/"", *timing_info, *analysis_delay_calc, vpr_setup.AnalysisOpts, + vpr_setup.RouterOpts.flat_routing, blk_loc_registry); + generate_setup_timing_stats(/*prefix=*/"", *timing_info, *analysis_delay_calc, vpr_setup.AnalysisOpts, + vpr_setup.RouterOpts.flat_routing, blk_loc_registry); //Write the post-synthesis netlist if (vpr_setup.AnalysisOpts.gen_post_synthesis_netlist) { - netlist_writer(atom_ctx.nlist.netlist_name(), analysis_delay_calc, - vpr_setup.AnalysisOpts); + netlist_writer(atom_ctx.nlist.netlist_name(), analysis_delay_calc, vpr_setup.AnalysisOpts); } //Write the post-implementation merged netlist @@ -1608,8 +1468,8 @@ void vpr_power_estimation(const t_vpr_setup& vpr_setup, VTR_LOG("Initializing power module\n"); /* Initialize the power module */ - bool power_error = power_init(vpr_setup.FileNameOpts.PowerFile.c_str(), - vpr_setup.FileNameOpts.CmosTechFile.c_str(), &Arch, &vpr_setup.RoutingArch); + bool power_error = power_init(vpr_setup.FileNameOpts.PowerFile.c_str(), vpr_setup.FileNameOpts.CmosTechFile.c_str(), + &Arch, &vpr_setup.RoutingArch); if (power_error) { VTR_LOG_ERROR("Power initialization failed.\n"); } @@ -1620,8 +1480,7 @@ void vpr_power_estimation(const t_vpr_setup& vpr_setup, VTR_LOG("Running power estimation\n"); /* Run power estimation */ - e_power_ret_code power_ret_code = power_total(&power_runtime_s, vpr_setup, - &Arch, &vpr_setup.RoutingArch); + e_power_ret_code power_ret_code = power_total(&power_runtime_s, vpr_setup, &Arch, &vpr_setup.RoutingArch); /* Check for errors/warnings */ if (power_ret_code == POWER_RET_CODE_ERRORS) { @@ -1706,16 +1565,13 @@ void vpr_print_error(const VprError& vpr_error) { error_type = "Unrecognized Error"; break; } - } catch (const vtr::VtrError& e) { - error_type = nullptr; - } + } catch (const vtr::VtrError& e) { error_type = nullptr; } //We can't pass std::string's through va_args functions, //so we need to copy them and pass via c_str() std::string msg = vpr_error.what(); std::string filename = vpr_error.filename(); - VTR_LOG_ERROR("\nType: %s\nFile: %s\nLine: %d\nMessage: %s\n", - error_type, filename.c_str(), vpr_error.line(), + VTR_LOG_ERROR("\nType: %s\nFile: %s\nLine: %d\nMessage: %s\n", error_type, filename.c_str(), vpr_error.line(), msg.c_str()); } diff --git a/vpr/src/base/vpr_api.h b/vpr/src/base/vpr_api.h index dca8f7441ad..dd44a0fd16c 100644 --- a/vpr/src/base/vpr_api.h +++ b/vpr/src/base/vpr_api.h @@ -82,10 +82,7 @@ void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch); /* Routing */ ///@brief Perform, load or skip the routing stage -RouteStatus vpr_route_flow(const Netlist<>& net_list, - t_vpr_setup& vpr_setup, - const t_arch& arch, - bool is_flat); +RouteStatus vpr_route_flow(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_arch& arch, bool is_flat); ///@brief Perform routing at a fixed channel width) RouteStatus vpr_route_fixed_W(const Netlist<>& net_list, @@ -152,8 +149,7 @@ void vpr_setup_noc(const t_vpr_setup& vpr_setup, const t_arch& arch); void vpr_setup_noc_routing_algorithm(const std::string& noc_routing_algorithm_name); void vpr_free_vpr_data_structures(t_arch& Arch, t_vpr_setup& vpr_setup); -void vpr_free_all(t_arch& Arch, - t_vpr_setup& vpr_setup); +void vpr_free_all(t_arch& Arch, t_vpr_setup& vpr_setup); /* Display general info to user */ void vpr_print_title(); diff --git a/vpr/src/base/vpr_constraints.cpp b/vpr/src/base/vpr_constraints.cpp index b504bb1a754..9811e5e6abe 100644 --- a/vpr/src/base/vpr_constraints.cpp +++ b/vpr/src/base/vpr_constraints.cpp @@ -1,17 +1,9 @@ #include "vpr_constraints.h" -UserPlaceConstraints& VprConstraints::mutable_place_constraints() { - return placement_constraints_; -} +UserPlaceConstraints& VprConstraints::mutable_place_constraints() { return placement_constraints_; } -UserRouteConstraints& VprConstraints::mutable_route_constraints() { - return route_constraints_; -} +UserRouteConstraints& VprConstraints::mutable_route_constraints() { return route_constraints_; } -const UserPlaceConstraints& VprConstraints::place_constraints() const { - return placement_constraints_; -} +const UserPlaceConstraints& VprConstraints::place_constraints() const { return placement_constraints_; } -const UserRouteConstraints& VprConstraints::route_constraints() const { - return route_constraints_; -} +const UserRouteConstraints& VprConstraints::route_constraints() const { return route_constraints_; } diff --git a/vpr/src/base/vpr_constraints_serializer.h b/vpr/src/base/vpr_constraints_serializer.h index 9cfd47829c2..1f2cfcd589b 100644 --- a/vpr/src/base/vpr_constraints_serializer.h +++ b/vpr/src/base/vpr_constraints_serializer.h @@ -183,17 +183,11 @@ class VprConstraintsSerializer final : public uxsd::VprConstraintsBase * */ - virtual inline int get_add_region_layer_low(Region& r) final { - return r.get_layer_range().first; - } + virtual inline int get_add_region_layer_low(Region& r) final { return r.get_layer_range().first; } - virtual inline int get_add_region_layer_high(Region& r) final { - return r.get_layer_range().second; - } + virtual inline int get_add_region_layer_high(Region& r) final { return r.get_layer_range().second; } - virtual inline int get_add_region_subtile(Region& r) final { - return r.get_sub_tile(); - } + virtual inline int get_add_region_subtile(Region& r) final { return r.get_sub_tile(); } virtual inline void set_add_region_subtile(int subtile, void*& /*ctx*/) final { loaded_region.set_sub_tile(subtile); @@ -211,21 +205,13 @@ class VprConstraintsSerializer final : public uxsd::VprConstraintsBase @@ -240,15 +226,11 @@ class VprConstraintsSerializer final : public uxsd::VprConstraintsBase& rc) final { + virtual inline uxsd::enum_route_model_type get_set_global_signal_route_model( + std::pair& rc) final { return to_uxsd_route_model(rc.second.route_model()); } - virtual inline void set_set_global_signal_route_model(uxsd::enum_route_model_type route_model, void*& /*ctx*/) final { + virtual inline void set_set_global_signal_route_model(uxsd::enum_route_model_type route_model, + void*& /*ctx*/) final { loaded_route_constraint.second.set_route_model(from_uxsd_route_model(route_model)); } virtual inline const char* get_set_global_signal_network_name(std::pair& rc) final { @@ -421,7 +399,8 @@ class VprConstraintsSerializer final : public uxsd::VprConstraintsBase */ virtual inline void preallocate_global_route_constraints_set_global_signal(void*& /*ctx*/, size_t /*size*/) final {} - virtual inline void* add_global_route_constraints_set_global_signal(void*& ctx, uxsd::enum_route_model_type route_model) final { + virtual inline void* add_global_route_constraints_set_global_signal(void*& ctx, + uxsd::enum_route_model_type route_model) final { reset_loaded_route_constrints(); set_set_global_signal_route_model(route_model, ctx); return nullptr; @@ -430,26 +409,27 @@ class VprConstraintsSerializer final : public uxsd::VprConstraintsBase get_global_route_constraints_set_global_signal(int n, void*& /*ctx*/) final { + virtual inline std::pair get_global_route_constraints_set_global_signal( + int n, + void*& /*ctx*/) final { return constraints_.route_constraints().get_route_constraint_by_idx((std::size_t)n); } - virtual inline void* init_vpr_constraints_global_route_constraints(void*& /*ctx*/) final { - return nullptr; - } + virtual inline void* init_vpr_constraints_global_route_constraints(void*& /*ctx*/) final { return nullptr; } virtual inline void finish_vpr_constraints_global_route_constraints(void*& /*ctx*/) final {} - virtual inline void* get_vpr_constraints_global_route_constraints(void*& /*ctx*/) final { - return nullptr; - } + virtual inline void* get_vpr_constraints_global_route_constraints(void*& /*ctx*/) final { return nullptr; } virtual inline bool has_vpr_constraints_global_route_constraints(void*& /*ctx*/) { if (constraints_.route_constraints().get_num_route_constraints() > 0) @@ -467,27 +447,19 @@ class VprConstraintsSerializer final : public uxsd::VprConstraintsBase * */ - virtual inline const char* get_vpr_constraints_tool_name(void*& /*ctx*/) final { - return temp_.c_str(); - } + virtual inline const char* get_vpr_constraints_tool_name(void*& /*ctx*/) final { return temp_.c_str(); } virtual inline void set_vpr_constraints_tool_name(const char* /*tool_name*/, void*& /*ctx*/) final {} - virtual inline void set_vpr_constraints_constraints_comment(const char* /*constraints_comment*/, void*& /*ctx*/) final {} + virtual inline void set_vpr_constraints_constraints_comment(const char* /*constraints_comment*/, + void*& /*ctx*/) final {} - virtual inline const char* get_vpr_constraints_constraints_comment(void*& /*ctx*/) final { - return temp_.c_str(); - } - virtual inline void* init_vpr_constraints_partition_list(void*& /*ctx*/) final { - return nullptr; - } + virtual inline const char* get_vpr_constraints_constraints_comment(void*& /*ctx*/) final { return temp_.c_str(); } + virtual inline void* init_vpr_constraints_partition_list(void*& /*ctx*/) final { return nullptr; } - virtual inline void finish_vpr_constraints_partition_list(void*& /*ctx*/) final { - } + virtual inline void finish_vpr_constraints_partition_list(void*& /*ctx*/) final {} - virtual inline void* get_vpr_constraints_partition_list(void*& /*ctx*/) final { - return nullptr; - } + virtual inline void* get_vpr_constraints_partition_list(void*& /*ctx*/) final { return nullptr; } virtual inline bool has_vpr_constraints_partition_list(void*& /*ctx*/) final { if (constraints_.place_constraints().get_num_partitions() > 0) @@ -495,8 +467,7 @@ class VprConstraintsSerializer final : public uxsd::VprConstraintsBase arch_switch_inf; // [0..(num_arch_switches-1)] std::map all_sw_inf; @@ -335,15 +342,38 @@ struct PlacementContext : public Context { BlkLocRegistry blk_loc_registry_; public: - - const vtr::vector_map& block_locs() const { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return blk_loc_registry_.block_locs(); } - vtr::vector_map& mutable_block_locs() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return blk_loc_registry_.mutable_block_locs(); } - const GridBlock& grid_blocks() const { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return blk_loc_registry_.grid_blocks(); } - GridBlock& mutable_grid_blocks() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return blk_loc_registry_.mutable_grid_blocks(); } - vtr::vector_map& mutable_physical_pins() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return blk_loc_registry_.mutable_physical_pins(); } - const vtr::vector_map& physical_pins() const { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return blk_loc_registry_.physical_pins(); } - BlkLocRegistry& mutable_blk_loc_registry() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return blk_loc_registry_; } - const BlkLocRegistry& blk_loc_registry() const { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return blk_loc_registry_; } + const vtr::vector_map& block_locs() const { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + return blk_loc_registry_.block_locs(); + } + vtr::vector_map& mutable_block_locs() { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + return blk_loc_registry_.mutable_block_locs(); + } + const GridBlock& grid_blocks() const { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + return blk_loc_registry_.grid_blocks(); + } + GridBlock& mutable_grid_blocks() { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + return blk_loc_registry_.mutable_grid_blocks(); + } + vtr::vector_map& mutable_physical_pins() { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + return blk_loc_registry_.mutable_physical_pins(); + } + const vtr::vector_map& physical_pins() const { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + return blk_loc_registry_.physical_pins(); + } + BlkLocRegistry& mutable_blk_loc_registry() { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + return blk_loc_registry_; + } + const BlkLocRegistry& blk_loc_registry() const { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + return blk_loc_registry_; + } /** * @brief Makes blk_loc_registry_ inaccessible through the getter methods. @@ -352,7 +382,10 @@ struct PlacementContext : public Context { * guarantee that the placement stage code does not access block location variables * stored in the global state. */ - void lock_loc_vars() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); loc_vars_are_accessible_ = false; } + void lock_loc_vars() { + VTR_ASSERT_SAFE(loc_vars_are_accessible_); + loc_vars_are_accessible_ = false; + } /** * @brief Makes blk_loc_registry_ accessible through the getter methods. @@ -360,7 +393,10 @@ struct PlacementContext : public Context { * This method should be called at the end of the placement stage to * make the block location information accessible for subsequent stages. */ - void unlock_loc_vars() { VTR_ASSERT_SAFE(!loc_vars_are_accessible_); loc_vars_are_accessible_ = true; } + void unlock_loc_vars() { + VTR_ASSERT_SAFE(!loc_vars_are_accessible_); + loc_vars_are_accessible_ = true; + } ///@brief The pl_macros array stores all the placement macros (usually carry chains). std::vector pl_macros; @@ -458,15 +494,14 @@ struct RoutingContext : public Context { * * Cache key: (lookahead type, read lookahead (if any), segment definitions). */ - vtr::Cache>, - RouterLookahead> + vtr::Cache>, RouterLookahead> cached_router_lookahead_; /** * @brief User specified routing constraints */ UserRouteConstraints constraints; - + /** Is flat routing enabled? */ bool is_flat; }; diff --git a/vpr/src/base/vpr_signal_handler.cpp b/vpr/src/base/vpr_signal_handler.cpp index 66cb879ff79..9be73206bd1 100644 --- a/vpr/src/base/vpr_signal_handler.cpp +++ b/vpr/src/base/vpr_signal_handler.cpp @@ -21,7 +21,7 @@ #include #ifdef VPR_USE_SIGACTION -# include +#include #endif void vpr_signal_handler(int signal); diff --git a/vpr/src/base/vpr_types.cpp b/vpr/src/base/vpr_types.cpp index ff0755b58b0..9d3a1eb7865 100644 --- a/vpr/src/base/vpr_types.cpp +++ b/vpr/src/base/vpr_types.cpp @@ -39,11 +39,14 @@ t_ext_pin_util_targets::t_ext_pin_util_targets(const std::vector& s constexpr float LOGIC_BLOCK_TYPE_AUTO_INPUT_UTIL = 0.8; constexpr float LOGIC_BLOCK_TYPE_AUTO_OUTPUT_UTIL = 1.0; - t_ext_pin_util logic_block_ext_pin_util(LOGIC_BLOCK_TYPE_AUTO_INPUT_UTIL, LOGIC_BLOCK_TYPE_AUTO_OUTPUT_UTIL); + t_ext_pin_util logic_block_ext_pin_util(LOGIC_BLOCK_TYPE_AUTO_INPUT_UTIL, + LOGIC_BLOCK_TYPE_AUTO_OUTPUT_UTIL); set_block_pin_util(logic_block_type->name, logic_block_ext_pin_util); } else { - VTR_LOG_WARN("Unable to identify logic block type to apply default pin utilization targets to; this may result in denser packing than desired\n"); + VTR_LOG_WARN( + "Unable to identify logic block type to apply default pin utilization targets to; this may result in " + "denser packing than desired\n"); } } else { @@ -65,7 +68,8 @@ t_ext_pin_util_targets::t_ext_pin_util_targets(const std::vector& s values = block_values[0]; } else { std::stringstream msg; - msg << "In valid block pin utilization specification '" << spec << "' (expected at most one ':' between block name and values"; + msg << "In valid block pin utilization specification '" << spec + << "' (expected at most one ':' between block name and values"; VPR_FATAL_ERROR(VPR_ERROR_PACK, msg.str().c_str()); } @@ -77,18 +81,22 @@ t_ext_pin_util_targets::t_ext_pin_util_targets(const std::vector& s target_ext_pin_util.output_pin_util = vtr::atof(elements[1]); } else { std::stringstream msg; - msg << "Invalid conversion from '" << spec << "' to external pin util (expected either a single float value, or two float values separted by a comma)"; + msg << "Invalid conversion from '" << spec + << "' to external pin util (expected either a single float value, or two float values separted by " + "a comma)"; VPR_FATAL_ERROR(VPR_ERROR_PACK, msg.str().c_str()); } if (target_ext_pin_util.input_pin_util < 0. || target_ext_pin_util.input_pin_util > 1.) { std::stringstream msg; - msg << "Out of range target input pin utilization '" << target_ext_pin_util.input_pin_util << "' (expected within range [0.0, 1.0])"; + msg << "Out of range target input pin utilization '" << target_ext_pin_util.input_pin_util + << "' (expected within range [0.0, 1.0])"; VPR_FATAL_ERROR(VPR_ERROR_PACK, msg.str().c_str()); } if (target_ext_pin_util.output_pin_util < 0. || target_ext_pin_util.output_pin_util > 1.) { std::stringstream msg; - msg << "Out of range target output pin utilization '" << target_ext_pin_util.output_pin_util << "' (expected within range [0.0, 1.0])"; + msg << "Out of range target output pin utilization '" << target_ext_pin_util.output_pin_util + << "' (expected within range [0.0, 1.0])"; VPR_FATAL_ERROR(VPR_ERROR_PACK, msg.str().c_str()); } @@ -137,7 +145,8 @@ std::string t_ext_pin_util_targets::to_string() const { auto& device_ctx = g_vpr_ctx.device(); for (unsigned int itype = 0; itype < device_ctx.physical_tile_types.size(); ++itype) { - if (is_empty_type(&device_ctx.physical_tile_types[itype])) continue; + if (is_empty_type(&device_ctx.physical_tile_types[itype])) + continue; auto blk_name = device_ctx.physical_tile_types[itype].name; @@ -158,9 +167,7 @@ void t_ext_pin_util_targets::set_block_pin_util(const std::string& block_type_na overrides_[block_type_name] = target; } -void t_ext_pin_util_targets::set_default_pin_util(t_ext_pin_util default_target) { - defaults_ = default_target; -} +void t_ext_pin_util_targets::set_default_pin_util(t_ext_pin_util default_target) { defaults_ = default_target; } t_pack_high_fanout_thresholds::t_pack_high_fanout_thresholds(int threshold) : default_(threshold) {} @@ -184,7 +191,9 @@ t_pack_high_fanout_thresholds::t_pack_high_fanout_thresholds(const std::vectorname, LOGIC_BLOCK_TYPE_HIGH_FANOUT_THRESHOLD); } else { - VTR_LOG_WARN("Unable to identify logic block type to apply default packer high fanout thresholds; this may result in denser packing than desired\n"); + VTR_LOG_WARN( + "Unable to identify logic block type to apply default packer high fanout thresholds; this may result " + "in denser packing than desired\n"); } } else { //Process user specified overrides @@ -203,7 +212,8 @@ t_pack_high_fanout_thresholds::t_pack_high_fanout_thresholds(const std::vectornum_pb - 1] - t_pb* parent_pb = nullptr; ///num_pb - 1] + t_pb* parent_pb = nullptr; ///abs_index; } const vtr::string_view type_name() const { - return vtr::string_view( - seg_detail_->type_name.data(), - seg_detail_->type_name.size()); + return vtr::string_view(seg_detail_->type_name.data(), seg_detail_->type_name.size()); } public: //Modifiers @@ -1647,18 +1553,10 @@ class t_routing_status { is_fixed_.resize(number_nets); is_fixed_.assign(is_routed_.size(), 0); } - void set_is_routed(NetIdType net, bool is_routed) { - is_routed_[index(net)] = is_routed; - } - bool is_routed(NetIdType net) const { - return is_routed_[index(net)]; - } - void set_is_fixed(NetIdType net, bool is_fixed) { - is_fixed_[index(net)] = is_fixed; - } - bool is_fixed(NetIdType net) const { - return is_fixed_[index(net)]; - } + void set_is_routed(NetIdType net, bool is_routed) { is_routed_[index(net)] = is_routed; } + bool is_routed(NetIdType net) const { return is_routed_[index(net)]; } + void set_is_fixed(NetIdType net, bool is_fixed) { is_fixed_[index(net)] = is_fixed; } + bool is_fixed(NetIdType net) const { return is_fixed_[index(net)]; } private: NetIdType index(NetIdType net) const { @@ -1755,9 +1653,10 @@ struct t_vpr_setup { std::string device_layout; e_constant_net_method constant_net_method; ///>> t_clb_opins_used; //[0..num_blocks-1][0..class-1][0..used_pins-1] +typedef vtr::vector>> + t_clb_opins_used; //[0..num_blocks-1][0..class-1][0..used_pins-1] typedef std::vector> t_arch_switch_fanin; diff --git a/vpr/src/draw/breakpoint.cpp b/vpr/src/draw/breakpoint.cpp index 9f0c9fe7ce6..5e589202631 100644 --- a/vpr/src/draw/breakpoint.cpp +++ b/vpr/src/draw/breakpoint.cpp @@ -66,7 +66,8 @@ bool check_for_breakpoints(bool in_placer) { return check_for_temperature_breakpoints(draw_state->list_of_breakpoints[i].bt_temps); else if (draw_state->list_of_breakpoints[i].type == BT_ROUTER_ITER && draw_state->list_of_breakpoints[i].active) return check_for_router_iter_breakpoints(draw_state->list_of_breakpoints[i].bt_router_iter); - else if (draw_state->list_of_breakpoints[i].type == BT_ROUTE_NET_ID && draw_state->list_of_breakpoints[i].active) + else if (draw_state->list_of_breakpoints[i].type == BT_ROUTE_NET_ID + && draw_state->list_of_breakpoints[i].active) return check_for_route_net_id_iter_breakpoints(draw_state->list_of_breakpoints[i].bt_route_net_id); else if (draw_state->list_of_breakpoints[i].type == BT_EXPRESSION && draw_state->list_of_breakpoints[i].active) return check_for_expression_breakpoints(draw_state->list_of_breakpoints[i].bt_expression, in_placer); @@ -89,8 +90,14 @@ void delete_breakpoint_by_index(int index) { //prints the current placer information to the terminal void print_current_info(bool in_placer) { if (in_placer) - std::cout << "\nmove_num: " << get_bp_state_globals()->get_glob_breakpoint_state()->move_num << "\ntemp_count: " << get_bp_state_globals()->get_glob_breakpoint_state()->temp_count << "\nin_blocks_affected: " << get_bp_state_globals()->get_glob_breakpoint_state()->block_affected << "\nfrom_block: " << get_bp_state_globals()->get_glob_breakpoint_state()->from_block << "\n----------------------------\n"; + std::cout << "\nmove_num: " << get_bp_state_globals()->get_glob_breakpoint_state()->move_num + << "\ntemp_count: " << get_bp_state_globals()->get_glob_breakpoint_state()->temp_count + << "\nin_blocks_affected: " << get_bp_state_globals()->get_glob_breakpoint_state()->block_affected + << "\nfrom_block: " << get_bp_state_globals()->get_glob_breakpoint_state()->from_block + << "\n----------------------------\n"; else - std::cout << "\nrouter_iter: " << get_bp_state_globals()->get_glob_breakpoint_state()->router_iter << "\nnet_id: " << get_bp_state_globals()->get_glob_breakpoint_state()->route_net_id << "\n----------------------------\n"; + std::cout << "\nrouter_iter: " << get_bp_state_globals()->get_glob_breakpoint_state()->router_iter + << "\nnet_id: " << get_bp_state_globals()->get_glob_breakpoint_state()->route_net_id + << "\n----------------------------\n"; } #endif diff --git a/vpr/src/draw/breakpoint.h b/vpr/src/draw/breakpoint.h index 612d85eb8a6..2efe5dea194 100644 --- a/vpr/src/draw/breakpoint.h +++ b/vpr/src/draw/breakpoint.h @@ -38,9 +38,10 @@ typedef enum breakpoint_types { class Breakpoint { public: bp_type type; - int bt_moves = 0; ///breaks after proceeding the indicated number of moves in placement - int bt_temps = 0; ///breaks after proceeding the indicated number of temperature changes in placement - int bt_from_block = -1; ///breaks after the first block moved in a placement perturbation matches the block id indicated by user + int bt_moves = 0; ///breaks after proceeding the indicated number of moves in placement + int bt_temps = 0; ///breaks after proceeding the indicated number of temperature changes in placement + int bt_from_block + = -1; ///breaks after the first block moved in a placement perturbation matches the block id indicated by user int bt_router_iter = 0; ///breaks when reaching the indicated router iteration int bt_route_net_id = -1; ///breaks after the indicated net is routed std::string bt_expression; ///breaks when expression returns true after parsing diff --git a/vpr/src/draw/breakpoint_state_globals.h b/vpr/src/draw/breakpoint_state_globals.h index d1bb22383d5..387aeaf1992 100644 --- a/vpr/src/draw/breakpoint_state_globals.h +++ b/vpr/src/draw/breakpoint_state_globals.h @@ -9,14 +9,15 @@ //there is also a string that holds the breakpoint description that are displayed in the UI and printed to the terminal //these values are updated in place.cpp and route.cpp and expr_eval.cpp and breakpoint.cpp use these values to look for breakpoints struct BreakpointState { - int move_num = 0; //current number of completed placer moves - int from_block = -1; //first block moved in the current placement swap - int temp_count = 0; //number of temperature changes thus far - int block_affected = -1; //the block_id that was requested to be stopped at if in blocks_affected - std::vector blocks_affected_by_move; //vector giving the clb netlist block ids of all blocks moving in the current perturbation - int route_net_id = -1; //clb netlist id of net that was just routed - int router_iter = 0; //current rip-up and re-route iteration count of router - std::string bp_description; //the breakpoint description to appear in the breakpoint list in the GUI + int move_num = 0; //current number of completed placer moves + int from_block = -1; //first block moved in the current placement swap + int temp_count = 0; //number of temperature changes thus far + int block_affected = -1; //the block_id that was requested to be stopped at if in blocks_affected + std::vector + blocks_affected_by_move; //vector giving the clb netlist block ids of all blocks moving in the current perturbation + int route_net_id = -1; //clb netlist id of net that was just routed + int router_iter = 0; //current rip-up and re-route iteration count of router + std::string bp_description; //the breakpoint description to appear in the breakpoint list in the GUI }; class BreakpointStateGlobals { @@ -25,9 +26,7 @@ class BreakpointStateGlobals { public: //accessor for glob_breakpoint_state - BreakpointState* get_glob_breakpoint_state() { - return &glob_breakpoint_state; - } + BreakpointState* get_glob_breakpoint_state() { return &glob_breakpoint_state; } }; #endif diff --git a/vpr/src/draw/buttons.cpp b/vpr/src/draw/buttons.cpp index ae48bdbc7b9..db64d45c5de 100644 --- a/vpr/src/draw/buttons.cpp +++ b/vpr/src/draw/buttons.cpp @@ -10,16 +10,16 @@ * Last updated: Aug 2019 */ -# include "draw_global.h" -# include "draw.h" -# include "draw_toggle_functions.h" -# include "buttons.h" -# include "intra_logic_block.h" -# include "clustered_netlist.h" +#include "draw_global.h" +#include "draw.h" +#include "draw_toggle_functions.h" +#include "buttons.h" +#include "intra_logic_block.h" +#include "clustered_netlist.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" //location of spin buttons, combo boxes, and labels on grid gint box_width = 1; diff --git a/vpr/src/draw/buttons.h b/vpr/src/draw/buttons.h index 853ad4cb50b..ce7d2910130 100644 --- a/vpr/src/draw/buttons.h +++ b/vpr/src/draw/buttons.h @@ -3,11 +3,11 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" void delete_button(const char* button_name); GtkWidget* find_button(const char* button_name); diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index 716647c7f36..8e5fb9ae768 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -64,37 +64,37 @@ #include "buttons.h" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif - -# include "rr_graph.h" -# include "route_utilization.h" -# include "place_macro.h" -# include "buttons.h" -# include "draw_rr.h" +#if defined(X11) && !defined(__MINGW32__) +#include +#endif + +#include "rr_graph.h" +#include "route_utilization.h" +#include "place_macro.h" +#include "buttons.h" +#include "draw_rr.h" /****************************** Define Macros *******************************/ -# define DEFAULT_RR_NODE_COLOR ezgl::BLACK -# define OLD_BLK_LOC_COLOR blk_GOLD -# define NEW_BLK_LOC_COLOR blk_GREEN +#define DEFAULT_RR_NODE_COLOR ezgl::BLACK +#define OLD_BLK_LOC_COLOR blk_GOLD +#define NEW_BLK_LOC_COLOR blk_GREEN //#define TIME_DRAWSCREEN /* Enable if want to track runtime for drawscreen() */ void act_on_key_press(ezgl::application* /*app*/, GdkEventKey* /*event*/, char* key_name); @@ -109,20 +109,12 @@ static void draw_router_expansion_costs(ezgl::renderer* g); static void draw_main_canvas(ezgl::renderer* g); static void default_setup(ezgl::application* app); -static void initial_setup_NO_PICTURE_to_PLACEMENT(ezgl::application* app, - bool is_new_window); -static void initial_setup_NO_PICTURE_to_PLACEMENT_with_crit_path( - ezgl::application* app, - bool is_new_window); -static void initial_setup_PLACEMENT_to_ROUTING(ezgl::application* app, - bool is_new_window); -static void initial_setup_ROUTING_to_PLACEMENT(ezgl::application* app, - bool is_new_window); -static void initial_setup_NO_PICTURE_to_ROUTING(ezgl::application* app, - bool is_new_window); -static void initial_setup_NO_PICTURE_to_ROUTING_with_crit_path( - ezgl::application* app, - bool is_new_window); +static void initial_setup_NO_PICTURE_to_PLACEMENT(ezgl::application* app, bool is_new_window); +static void initial_setup_NO_PICTURE_to_PLACEMENT_with_crit_path(ezgl::application* app, bool is_new_window); +static void initial_setup_PLACEMENT_to_ROUTING(ezgl::application* app, bool is_new_window); +static void initial_setup_ROUTING_to_PLACEMENT(ezgl::application* app, bool is_new_window); +static void initial_setup_NO_PICTURE_to_ROUTING(ezgl::application* app, bool is_new_window); +static void initial_setup_NO_PICTURE_to_ROUTING_with_crit_path(ezgl::application* app, bool is_new_window); static void setup_default_ezgl_callbacks(ezgl::application* app); static void set_force_pause(GtkWidget* /*widget*/, gint /*response_id*/, gpointer /*data*/); static void set_block_outline(GtkWidget* widget, gint /*response_id*/, gpointer /*data*/); @@ -163,7 +155,11 @@ const std::vector kelly_max_contrast_colors = { ezgl::color(43, 61, 38) //olive green }; -ezgl::application::settings settings("/ezgl/main.ui", "MainWindow", "MainCanvas", "org.verilogtorouting.vpr.PID" + std::to_string(vtr::get_pid()), setup_default_ezgl_callbacks); +ezgl::application::settings settings("/ezgl/main.ui", + "MainWindow", + "MainCanvas", + "org.verilogtorouting.vpr.PID" + std::to_string(vtr::get_pid()), + setup_default_ezgl_callbacks); ezgl::application application(settings); bool window_mode = false; @@ -257,7 +253,8 @@ static void draw_main_canvas(ezgl::renderer* g) { #ifndef NO_SERVER if (g_vpr_ctx.server().gate_io.is_running()) { const ServerContext& server_ctx = g_vpr_ctx.server(); // shortcut - draw_crit_path_elements(server_ctx.crit_paths, server_ctx.crit_path_element_indexes, server_ctx.draw_crit_path_contour, g); + draw_crit_path_elements(server_ctx.crit_paths, server_ctx.crit_path_element_indexes, + server_ctx.draw_crit_path_contour, g); } else { draw_crit_path(g); } @@ -311,8 +308,7 @@ static void default_setup(ezgl::application* app) { /* function below intializes the interface window with a set of buttons and links * signals to corresponding functions for situation where the window is opened from * NO_PICTURE_to_PLACEMENT */ -static void initial_setup_NO_PICTURE_to_PLACEMENT(ezgl::application* app, - bool is_new_window) { +static void initial_setup_NO_PICTURE_to_PLACEMENT(ezgl::application* app, bool is_new_window) { if (is_new_window) default_setup(app); @@ -323,9 +319,7 @@ static void initial_setup_NO_PICTURE_to_PLACEMENT(ezgl::application* app, /* function below intializes the interface window with a set of buttons and links * signals to corresponding functions for situation where the window is opened from * NO_PICTURE_to_PLACEMENT_with_crit_path */ -static void initial_setup_NO_PICTURE_to_PLACEMENT_with_crit_path( - ezgl::application* app, - bool is_new_window) { +static void initial_setup_NO_PICTURE_to_PLACEMENT_with_crit_path(ezgl::application* app, bool is_new_window) { if (is_new_window) default_setup(app); @@ -341,8 +335,7 @@ static void initial_setup_NO_PICTURE_to_PLACEMENT_with_crit_path( /* function below intializes the interface window with a set of buttons and links * signals to corresponding functions for situation where the window is opened from * PLACEMENT_to_ROUTING */ -static void initial_setup_PLACEMENT_to_ROUTING(ezgl::application* app, - bool is_new_window) { +static void initial_setup_PLACEMENT_to_ROUTING(ezgl::application* app, bool is_new_window) { if (is_new_window) default_setup(app); @@ -354,8 +347,7 @@ static void initial_setup_PLACEMENT_to_ROUTING(ezgl::application* app, /* function below intializes the interface window with a set of buttons and links * signals to corresponding functions for situation where the window is opened from * ROUTING_to_PLACEMENT */ -static void initial_setup_ROUTING_to_PLACEMENT(ezgl::application* app, - bool is_new_window) { +static void initial_setup_ROUTING_to_PLACEMENT(ezgl::application* app, bool is_new_window) { if (is_new_window) default_setup(app); @@ -368,8 +360,7 @@ static void initial_setup_ROUTING_to_PLACEMENT(ezgl::application* app, /* function below intializes the interface window with a set of buttons and links * signals to corresponding functions for situation where the window is opened from * NO_PICTURE_to_ROUTING */ -static void initial_setup_NO_PICTURE_to_ROUTING(ezgl::application* app, - bool is_new_window) { +static void initial_setup_NO_PICTURE_to_ROUTING(ezgl::application* app, bool is_new_window) { if (is_new_window) default_setup(app); @@ -381,9 +372,7 @@ static void initial_setup_NO_PICTURE_to_ROUTING(ezgl::application* app, /* function below intializes the interface window with a set of buttons and links * signals to corresponding functions for situation where the window is opened from * NO_PICTURE_to_ROUTING_with_crit_path */ -static void initial_setup_NO_PICTURE_to_ROUTING_with_crit_path( - ezgl::application* app, - bool is_new_window) { +static void initial_setup_NO_PICTURE_to_ROUTING_with_crit_path(ezgl::application* app, bool is_new_window) { if (is_new_window) default_setup(app); @@ -393,7 +382,10 @@ static void initial_setup_NO_PICTURE_to_ROUTING_with_crit_path( } #endif //NO_GRAPHICS -void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type pic_on_screen_val, std::shared_ptr setup_timing_info) { +void update_screen(ScreenUpdatePriority priority, + const char* msg, + enum pic_type pic_on_screen_val, + std::shared_ptr setup_timing_info) { #ifndef NO_GRAPHICS /* Updates the screen if the user has requested graphics. The priority * @@ -414,14 +406,12 @@ void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type if (draw_state->pic_on_screen == NO_PICTURE) { //Only add the canvas the first time we open graphics - application.add_canvas("MainCanvas", draw_main_canvas, - initial_world); + application.add_canvas("MainCanvas", draw_main_canvas, initial_world); } draw_state->setup_timing_info = setup_timing_info; - if (pic_on_screen_val == PLACEMENT - && draw_state->pic_on_screen == NO_PICTURE) { + if (pic_on_screen_val == PLACEMENT && draw_state->pic_on_screen == NO_PICTURE) { if (setup_timing_info) { init_setup = initial_setup_NO_PICTURE_to_PLACEMENT_with_crit_path; } else { @@ -429,19 +419,16 @@ void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type } draw_state->save_graphics_file_base = "vpr_placement"; - } else if (pic_on_screen_val == ROUTING - && draw_state->pic_on_screen == PLACEMENT) { + } else if (pic_on_screen_val == ROUTING && draw_state->pic_on_screen == PLACEMENT) { //Routing, opening after placement init_setup = initial_setup_PLACEMENT_to_ROUTING; draw_state->save_graphics_file_base = "vpr_routing"; - } else if (pic_on_screen_val == PLACEMENT - && draw_state->pic_on_screen == ROUTING) { + } else if (pic_on_screen_val == PLACEMENT && draw_state->pic_on_screen == ROUTING) { init_setup = initial_setup_ROUTING_to_PLACEMENT; draw_state->save_graphics_file_base = "vpr_placement"; - } else if (pic_on_screen_val == ROUTING - && draw_state->pic_on_screen == NO_PICTURE) { + } else if (pic_on_screen_val == ROUTING && draw_state->pic_on_screen == NO_PICTURE) { //Routing opening first if (setup_timing_info) { init_setup = initial_setup_NO_PICTURE_to_ROUTING_with_crit_path; @@ -477,8 +464,7 @@ void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type draw_state->forced_pause = false; //Reset pause flag } - application.run(init_setup, act_on_mouse_press, act_on_mouse_move, - act_on_key_press); + application.run(init_setup, act_on_mouse_press, act_on_mouse_move, act_on_key_press); if (!draw_state->graphics_commands.empty()) { run_graphics_commands(draw_state->graphics_commands); @@ -505,10 +491,7 @@ void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type } #ifndef NO_GRAPHICS -void toggle_window_mode(GtkWidget* /*widget*/, - ezgl::application* /*app*/) { - window_mode = true; -} +void toggle_window_mode(GtkWidget* /*widget*/, ezgl::application* /*app*/) { window_mode = true; } #endif // NO_GRAPHICS @@ -530,8 +513,7 @@ void alloc_draw_structs(const t_arch* arch) { draw_state->net_color.resize(cluster_ctx.clb_nlist.nets().size()); draw_state->block_color_.resize(cluster_ctx.clb_nlist.blocks().size()); - draw_state->use_default_block_color_.resize( - cluster_ctx.clb_nlist.blocks().size()); + draw_state->use_default_block_color_.resize(cluster_ctx.clb_nlist.blocks().size()); /* Space is allocated for draw_rr_node but not initialized because we do * * not yet know information about the routing resources. */ @@ -582,8 +564,7 @@ void init_draw_coords(float clb_width, const BlkLocRegistry& blk_loc_registry) { * the global placement state, which is inaccessible during placement.*/ draw_state->set_graphics_blk_loc_registry_ref(blk_loc_registry); - if (!draw_state->show_graphics && !draw_state->save_graphics - && draw_state->graphics_commands.empty()) + if (!draw_state->show_graphics && !draw_state->save_graphics && draw_state->graphics_commands.empty()) return; //do not initialize only if --disp off and --save_graphics off /* Each time routing is on screen, need to reallocate the color of each * @@ -600,8 +581,8 @@ void init_draw_coords(float clb_width, const BlkLocRegistry& blk_loc_registry) { for (const auto& type : device_ctx.physical_tile_types) { auto num_pins = type.num_pins; if (num_pins > 0) { - draw_coords->pin_size = std::min(draw_coords->pin_size, - (draw_coords->get_tile_width() / (4.0F * num_pins))); + draw_coords->pin_size + = std::min(draw_coords->pin_size, (draw_coords->get_tile_width() / (4.0F * num_pins))); } } @@ -610,17 +591,15 @@ void init_draw_coords(float clb_width, const BlkLocRegistry& blk_loc_registry) { draw_coords->tile_x[i] = (i * draw_coords->get_tile_width()) + j; j += device_ctx.chan_width.y_list[i] + 1; /* N wires need N+1 units of space */ } - draw_coords->tile_x[device_ctx.grid.width() - 1] = ((device_ctx.grid.width() - - 1) - * draw_coords->get_tile_width()) - + j; + draw_coords->tile_x[device_ctx.grid.width() - 1] + = ((device_ctx.grid.width() - 1) * draw_coords->get_tile_width()) + j; j = 0; for (size_t i = 0; i < (device_ctx.grid.height() - 1); ++i) { draw_coords->tile_y[i] = (i * draw_coords->get_tile_width()) + j; j += device_ctx.chan_width.x_list[i] + 1; } - draw_coords->tile_y[device_ctx.grid.height() - 1] = ((device_ctx.grid.height() - 1) * draw_coords->get_tile_width()) - + j; + draw_coords->tile_y[device_ctx.grid.height() - 1] + = ((device_ctx.grid.height() - 1) * draw_coords->get_tile_width()) + j; /* Load coordinates of sub-blocks inside the clbs */ draw_internal_init_blk(); //Margin beyond edge of the drawn device to extend the visible world @@ -628,15 +607,11 @@ void init_draw_coords(float clb_width, const BlkLocRegistry& blk_loc_registry) { //space around the device edges constexpr float VISIBLE_MARGIN = 0.01; - float draw_width = draw_coords->tile_x[device_ctx.grid.width() - 1] - + draw_coords->get_tile_width(); - float draw_height = draw_coords->tile_y[device_ctx.grid.height() - 1] - + draw_coords->get_tile_width(); + float draw_width = draw_coords->tile_x[device_ctx.grid.width() - 1] + draw_coords->get_tile_width(); + float draw_height = draw_coords->tile_y[device_ctx.grid.height() - 1] + draw_coords->get_tile_width(); - initial_world = ezgl::rectangle( - {-VISIBLE_MARGIN * draw_width, -VISIBLE_MARGIN * draw_height}, - {(1. + VISIBLE_MARGIN) * draw_width, (1. + VISIBLE_MARGIN) - * draw_height}); + initial_world = ezgl::rectangle({-VISIBLE_MARGIN * draw_width, -VISIBLE_MARGIN * draw_height}, + {(1. + VISIBLE_MARGIN) * draw_width, (1. + VISIBLE_MARGIN) * draw_height}); #else (void)clb_width; (void)blk_loc_registry; @@ -671,8 +646,7 @@ int get_track_num(int inode, const vtr::OffsetMatrix& chanx_track, const vt return (chany_track[i][j]); default: - vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in get_track_num: Unexpected node type %d for node %d.\n", + vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, "in get_track_num: Unexpected node type %d for node %d.\n", rr_type, inode); return OPEN; } @@ -721,7 +695,6 @@ void act_on_key_press(ezgl::application* app, GdkEventKey* /*event*/, char* key_ void act_on_mouse_press(ezgl::application* app, GdkEventButton* event, double x, double y) { if (event->button == 1) { - if (window_mode) { //click on any two points to form new window rectangle bound @@ -735,14 +708,10 @@ void act_on_mouse_press(ezgl::application* app, GdkEventButton* event, double x, //click on any two points to form new window rectangle bound ezgl::point2d point_2 = {x, y}; - ezgl::rectangle current_window = (app->get_canvas( - app->get_main_canvas_id())) - ->get_camera() - .get_world(); + ezgl::rectangle current_window = (app->get_canvas(app->get_main_canvas_id()))->get_camera().get_world(); //calculate a rectangle with the same ratio based on the two clicks - double window_ratio = current_window.height() - / current_window.width(); + double window_ratio = current_window.height() / current_window.width(); double new_height = abs(point_1.y - point_2.y); double new_width = new_height / window_ratio; @@ -805,7 +774,8 @@ void act_on_mouse_move(ezgl::application* app, GdkEventButton* /* event */, doub //Update message const auto& device_ctx = g_vpr_ctx.device(); - std::string info = describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, hit_node, draw_state->is_flat); + std::string info = describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, + hit_node, draw_state->is_flat); std::string msg = vtr::string_fmt("Moused over %s", info.c_str()); app->update_message(msg.c_str()); } else { @@ -826,8 +796,7 @@ ezgl::point2d atom_pin_draw_coord(AtomPinId pin) { const t_pb_graph_node* pg_gnode = atom_ctx.lookup.atom_pb_graph_node(blk); t_draw_coords* draw_coords = get_draw_coords_vars(); - ezgl::rectangle pb_bbox = draw_coords->get_absolute_pb_bbox(clb_index, - pg_gnode); + ezgl::rectangle pb_bbox = draw_coords->get_absolute_pb_bbox(clb_index, pg_gnode); //We place each atom pin inside it's pb bounding box //and distribute the pins along it's vertical centre line @@ -839,17 +808,13 @@ ezgl::point2d atom_pin_draw_coord(AtomPinId pin) { int pin_index, pin_total; find_pin_index_at_model_scope(pin, blk, &pin_index, &pin_total); - const ezgl::point2d point = {x_offset + usable_width * pin_index / ((float)pin_total), - pb_bbox.center_y()}; + const ezgl::point2d point = {x_offset + usable_width * pin_index / ((float)pin_total), pb_bbox.center_y()}; return point; } //Returns the set of rr nodes which connect driver to sink -std::vector trace_routed_connection_rr_nodes( - ClusterNetId net_id, - int driver_pin, - int sink_pin) { +std::vector trace_routed_connection_rr_nodes(ClusterNetId net_id, int driver_pin, int sink_pin) { auto& route_ctx = g_vpr_ctx.routing(); VTR_ASSERT(route_ctx.route_trees[net_id]); @@ -862,9 +827,7 @@ std::vector trace_routed_connection_rr_nodes( std::vector rr_nodes_on_path; //Collect the rr nodes - trace_routed_connection_rr_nodes_recurr(tree.root(), - sink_rr_node, - rr_nodes_on_path); + trace_routed_connection_rr_nodes_recurr(tree.root(), sink_rr_node, rr_nodes_on_path); //Traced from sink to source, but we want to draw from source to sink std::reverse(rr_nodes_on_path.begin(), rr_nodes_on_path.end()); @@ -886,8 +849,7 @@ bool trace_routed_connection_rr_nodes_recurr(const RouteTreeNode& rt_node, } for (const RouteTreeNode& child_rt_node : rt_node.child_nodes()) { - bool on_path_to_sink = trace_routed_connection_rr_nodes_recurr( - child_rt_node, sink_rr_node, rr_nodes_on_path); + bool on_path_to_sink = trace_routed_connection_rr_nodes_recurr(child_rt_node, sink_rr_node, rr_nodes_on_path); if (on_path_to_sink) { rr_nodes_on_path.push_back(rt_node.inode); return true; @@ -901,8 +863,7 @@ bool trace_routed_connection_rr_nodes_recurr(const RouteTreeNode& rt_node, t_edge_size find_edge(RRNodeId prev_inode, RRNodeId inode) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - for (t_edge_size iedge = 0; - iedge < rr_graph.num_edges(prev_inode); ++iedge) { + for (t_edge_size iedge = 0; iedge < rr_graph.num_edges(prev_inode); ++iedge) { if (rr_graph.edge_sink_node(prev_inode, iedge) == inode) { return iedge; } @@ -911,23 +872,18 @@ t_edge_size find_edge(RRNodeId prev_inode, RRNodeId inode) { return OPEN; } -ezgl::color to_ezgl_color(vtr::Color color) { - return ezgl::color(color.r * 255, color.g * 255, color.b * 255); -} +ezgl::color to_ezgl_color(vtr::Color color) { return ezgl::color(color.r * 255, color.g * 255, color.b * 255); } static float get_router_expansion_cost(const t_rr_node_route_inf node_inf, e_draw_router_expansion_cost draw_router_expansion_cost) { if (draw_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_TOTAL - || draw_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_TOTAL_WITH_EDGES) { + || draw_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_TOTAL_WITH_EDGES) { return node_inf.path_cost; } else if (draw_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_KNOWN - || draw_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_KNOWN_WITH_EDGES) { + || draw_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_KNOWN_WITH_EDGES) { return node_inf.backward_path_cost; } else if (draw_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_EXPECTED - || draw_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_EXPECTED_WITH_EDGES) { + || draw_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_EXPECTED_WITH_EDGES) { return node_inf.path_cost - node_inf.backward_path_cost; } @@ -936,8 +892,7 @@ static float get_router_expansion_cost(const t_rr_node_route_inf node_inf, static void draw_router_expansion_costs(ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); - if (draw_state->show_router_expansion_cost - == DRAW_NO_ROUTER_EXPANSION_COST) { + if (draw_state->show_router_expansion_cost == DRAW_NO_ROUTER_EXPANSION_COST) { return; } @@ -947,9 +902,8 @@ static void draw_router_expansion_costs(ezgl::renderer* g) { vtr::vector rr_costs(device_ctx.rr_graph.num_nodes()); for (RRNodeId inode : device_ctx.rr_graph.nodes()) { - float cost = get_router_expansion_cost( - routing_ctx.rr_node_route_inf[inode], - draw_state->show_router_expansion_cost); + float cost + = get_router_expansion_cost(routing_ctx.rr_node_route_inf[inode], draw_state->show_router_expansion_cost); rr_costs[inode] = cost; } @@ -965,23 +919,15 @@ static void draw_router_expansion_costs(ezgl::renderer* g) { if (!all_nan) { draw_rr_costs(g, rr_costs, false); } - if (draw_state->show_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_TOTAL - || draw_state->show_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_TOTAL_WITH_EDGES) { - application.update_message( - "Routing Expected Total Cost (known + estimate)"); - } else if (draw_state->show_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_KNOWN - || draw_state->show_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_KNOWN_WITH_EDGES) { + if (draw_state->show_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_TOTAL + || draw_state->show_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_TOTAL_WITH_EDGES) { + application.update_message("Routing Expected Total Cost (known + estimate)"); + } else if (draw_state->show_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_KNOWN + || draw_state->show_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_KNOWN_WITH_EDGES) { application.update_message("Routing Known Cost (from source to node)"); - } else if (draw_state->show_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_EXPECTED - || draw_state->show_router_expansion_cost - == DRAW_ROUTER_EXPANSION_COST_EXPECTED_WITH_EDGES) { - application.update_message( - "Routing Expected Cost (from node to target)"); + } else if (draw_state->show_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_EXPECTED + || draw_state->show_router_expansion_cost == DRAW_ROUTER_EXPANSION_COST_EXPECTED_WITH_EDGES) { + application.update_message("Routing Expected Cost (from node to target)"); } else { VPR_THROW(VPR_ERROR_DRAW, "Invalid Router RR cost drawing type"); } @@ -1009,25 +955,22 @@ static void highlight_blocks(double x, double y) { VTR_ASSERT(clb_index != ClusterBlockId::INVALID()); - ezgl::rectangle clb_bbox = draw_coords->get_absolute_clb_bbox(clb_index, cluster_ctx.clb_nlist.block_type(clb_index)); + ezgl::rectangle clb_bbox + = draw_coords->get_absolute_clb_bbox(clb_index, cluster_ctx.clb_nlist.block_type(clb_index)); // note: this will clear the selected sub-block if show_blk_internal is 0, // or if it doesn't find anything ezgl::point2d point_in_clb = ezgl::point2d(x, y) - clb_bbox.bottom_left(); - highlight_sub_block(point_in_clb, clb_index, - cluster_ctx.clb_nlist.block_pb(clb_index)); + highlight_sub_block(point_in_clb, clb_index, cluster_ctx.clb_nlist.block_pb(clb_index)); if (get_selected_sub_block_info().has_selection()) { t_pb* selected_subblock = get_selected_sub_block_info().get_selected_pb(); - sprintf(msg, "sub-block %s (a \"%s\") selected", - selected_subblock->name, + sprintf(msg, "sub-block %s (a \"%s\") selected", selected_subblock->name, selected_subblock->pb_graph_node->pb_type->name); } else { /* Highlight block and fan-in/fan-outs. */ - draw_highlight_blocks_color(cluster_ctx.clb_nlist.block_type(clb_index), - clb_index); + draw_highlight_blocks_color(cluster_ctx.clb_nlist.block_type(clb_index), clb_index); sprintf(msg, "Block #%zu (%s) at (%d, %d) selected.", size_t(clb_index), - cluster_ctx.clb_nlist.block_name(clb_index).c_str(), - block_locs[clb_index].loc.x, + cluster_ctx.clb_nlist.block_name(clb_index).c_str(), block_locs[clb_index].loc.x, block_locs[clb_index].loc.y); } @@ -1094,13 +1037,11 @@ ClusterBlockId get_cluster_block_id_from_xy_loc(double x, double y) { static void setup_default_ezgl_callbacks(ezgl::application* app) { // Connect press_proceed function to the Proceed button GObject* proceed_button = app->get_object("ProceedButton"); - g_signal_connect(proceed_button, "clicked", G_CALLBACK(ezgl::press_proceed), - app); + g_signal_connect(proceed_button, "clicked", G_CALLBACK(ezgl::press_proceed), app); // Connect press_zoom_fit function to the Zoom-fit button GObject* zoom_fit_button = app->get_object("ZoomFitButton"); - g_signal_connect(zoom_fit_button, "clicked", - G_CALLBACK(ezgl::press_zoom_fit), app); + g_signal_connect(zoom_fit_button, "clicked", G_CALLBACK(ezgl::press_zoom_fit), app); // Connect Pause button GObject* pause_button = app->get_object("PauseButton"); @@ -1108,8 +1049,7 @@ static void setup_default_ezgl_callbacks(ezgl::application* app) { // Connect Block Outline checkbox GObject* block_outline = app->get_object("blockOutline"); - g_signal_connect(block_outline, "toggled", G_CALLBACK(set_block_outline), - app); + g_signal_connect(block_outline, "toggled", G_CALLBACK(set_block_outline), app); // Connect Block Text checkbox GObject* block_text = app->get_object("blockText"); @@ -1117,8 +1057,7 @@ static void setup_default_ezgl_callbacks(ezgl::application* app) { // Connect Clip Routing Util checkbox GObject* clip_routing = app->get_object("clipRoutingUtil"); - g_signal_connect(clip_routing, "toggled", G_CALLBACK(clip_routing_util), - app); + g_signal_connect(clip_routing, "toggled", G_CALLBACK(clip_routing_util), app); // Connect Debug Button GObject* debugger = app->get_object("debugButton"); @@ -1201,13 +1140,8 @@ static void set_draw_partitions(GtkWidget* widget, gint /*response_id*/, gpointe window = application.get_object(application.get_main_window_id().c_str()); - dialog = gtk_dialog_new_with_buttons( - "Floorplanning Legend", - (GtkWindow*)window, - GTK_DIALOG_DESTROY_WITH_PARENT, - ("CLOSE"), - GTK_RESPONSE_ACCEPT, - NULL); + dialog = gtk_dialog_new_with_buttons("Floorplanning Legend", (GtkWindow*)window, GTK_DIALOG_DESTROY_WITH_PARENT, + ("CLOSE"), GTK_RESPONSE_ACCEPT, NULL); GtkWidget* content_area = gtk_dialog_get_content_area(GTK_DIALOG(dialog)); GtkWidget* content_tree = gtk_tree_view_new(); @@ -1216,20 +1150,13 @@ static void set_draw_partitions(GtkWidget* widget, gint /*response_id*/, gpointe gtk_container_add(GTK_CONTAINER(content_area), content_tree); GtkTreeSelection* selection = gtk_tree_view_get_selection(GTK_TREE_VIEW(content_tree)); - g_signal_connect(selection, - "changed", - G_CALLBACK(highlight_selected_partition), - NULL); + g_signal_connect(selection, "changed", G_CALLBACK(highlight_selected_partition), NULL); // assign corresponding bool value to draw_state->draw_partitions if (gtk_toggle_button_get_active((GtkToggleButton*)widget)) { gtk_widget_show_all(dialog); - g_signal_connect( - GTK_DIALOG(dialog), - "response", - G_CALLBACK(on_dialog_response), - NULL); + g_signal_connect(GTK_DIALOG(dialog), "response", G_CALLBACK(on_dialog_response), NULL); draw_state->draw_partitions = true; @@ -1269,77 +1196,61 @@ static void run_graphics_commands(const std::string& commands) { VTR_LOG("\n"); if (cmd[0] == "save_graphics") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect filename after 'save_graphics'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect filename after 'save_graphics'"); auto name_ext = vtr::split_ext(cmd[1]); //Replace {i} with the sequence number - std::string name = vtr::replace_all(name_ext[0], "{i}", - std::to_string(draw_state->sequence_number)); + std::string name = vtr::replace_all(name_ext[0], "{i}", std::to_string(draw_state->sequence_number)); save_graphics(/*extension=*/name_ext[1], /*filename=*/name); VTR_LOG("Saving to %s\n", std::string(name + name_ext[1]).c_str()); } else if (cmd[0] == "set_macros") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect net draw state after 'set_macro'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect net draw state after 'set_macro'"); draw_state->show_placement_macros = (e_draw_placement_macros)vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->show_placement_macros); } else if (cmd[0] == "set_nets") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect net draw state after 'set_nets'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect net draw state after 'set_nets'"); draw_state->show_nets = (e_draw_nets)vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->show_nets); } else if (cmd[0] == "set_cpd") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect cpd draw state after 'set_cpd'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect cpd draw state after 'set_cpd'"); draw_state->show_crit_path = (e_draw_crit_path)vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->show_crit_path); } else if (cmd[0] == "set_routing_util") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect routing util draw state after 'set_routing_util'"); - draw_state->show_routing_util = (e_draw_routing_util)vtr::atoi( - cmd[1]); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect routing util draw state after 'set_routing_util'"); + draw_state->show_routing_util = (e_draw_routing_util)vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->show_routing_util); } else if (cmd[0] == "set_clip_routing_util") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect routing util draw state after 'set_routing_util'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect routing util draw state after 'set_routing_util'"); draw_state->clip_routing_util = (bool)vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->clip_routing_util); } else if (cmd[0] == "set_congestion") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect congestion draw state after 'set_congestion'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect congestion draw state after 'set_congestion'"); draw_state->show_congestion = (e_draw_congestion)vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->show_congestion); } else if (cmd[0] == "set_draw_block_outlines") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect draw block outlines state after 'set_draw_block_outlines'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect draw block outlines state after 'set_draw_block_outlines'"); draw_state->draw_block_outlines = vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->draw_block_outlines); } else if (cmd[0] == "set_draw_block_text") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect draw block text state after 'set_draw_block_text'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect draw block text state after 'set_draw_block_text'"); draw_state->draw_block_text = vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->draw_block_text); } else if (cmd[0] == "set_draw_block_internals") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect draw state after 'set_draw_block_internals'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect draw state after 'set_draw_block_internals'"); draw_state->show_blk_internal = vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->show_blk_internal); } else if (cmd[0] == "set_draw_net_max_fanout") { - VTR_ASSERT_MSG(cmd.size() == 2, - "Expect maximum fanout after 'set_draw_net_max_fanout'"); + VTR_ASSERT_MSG(cmd.size() == 2, "Expect maximum fanout after 'set_draw_net_max_fanout'"); draw_state->draw_net_max_fanout = vtr::atoi(cmd[1]); VTR_LOG("%d\n", (int)draw_state->draw_net_max_fanout); } else if (cmd[0] == "exit") { VTR_ASSERT_MSG(cmd.size() == 2, "Expect exit code after 'exit'"); exit(vtr::atoi(cmd[1])); } else { - VPR_ERROR(VPR_ERROR_DRAW, - vtr::string_fmt("Unrecognized graphics command '%s'", - cmd[0].c_str()) - .c_str()); + VPR_ERROR(VPR_ERROR_DRAW, vtr::string_fmt("Unrecognized graphics command '%s'", cmd[0].c_str()).c_str()); } } @@ -1360,25 +1271,20 @@ ezgl::point2d tnode_draw_coord(tatum::NodeId node) { * It highlights the old and new locations of the moved blocks * * It also highlights the moved block input and output terminals * * Currently, it is used in placer debugger when breakpoint is reached */ -void highlight_moved_block_and_its_terminals( - const t_pl_blocks_to_be_moved& blocks_affected) { +void highlight_moved_block_and_its_terminals(const t_pl_blocks_to_be_moved& blocks_affected) { auto& cluster_ctx = g_vpr_ctx.clustering(); //clear all selected blocks deselect_all(); //highlight the input/output terminals of the moved block - draw_highlight_blocks_color( - cluster_ctx.clb_nlist.block_type( - blocks_affected.moved_blocks[0].block_num), - blocks_affected.moved_blocks[0].block_num); + draw_highlight_blocks_color(cluster_ctx.clb_nlist.block_type(blocks_affected.moved_blocks[0].block_num), + blocks_affected.moved_blocks[0].block_num); //highlight the old and new locations of the moved block clear_colored_locations(); - set_draw_loc_color(blocks_affected.moved_blocks[0].old_loc, - OLD_BLK_LOC_COLOR); - set_draw_loc_color(blocks_affected.moved_blocks[0].old_loc, - NEW_BLK_LOC_COLOR); + set_draw_loc_color(blocks_affected.moved_blocks[0].old_loc, OLD_BLK_LOC_COLOR); + set_draw_loc_color(blocks_affected.moved_blocks[0].old_loc, NEW_BLK_LOC_COLOR); } // pass in an (x,y,subtile) location and the color in which it should be drawn. @@ -1398,11 +1304,10 @@ bool highlight_loc_with_specific_color(t_pl_loc curr_loc, ezgl::color& loc_color t_draw_state* draw_state = get_draw_state_vars(); //search for the current location in the vector of colored locations - auto it = std::find_if(draw_state->colored_locations.begin(), - draw_state->colored_locations.end(), + auto it = std::find_if(draw_state->colored_locations.begin(), draw_state->colored_locations.end(), [&curr_loc](const std::pair& vec_element) { - return (vec_element.first.x == curr_loc.x - && vec_element.first.y == curr_loc.y && vec_element.first.layer == curr_loc.layer); + return (vec_element.first.x == curr_loc.x && vec_element.first.y == curr_loc.y + && vec_element.first.layer == curr_loc.layer); }); if (it != draw_state->colored_locations.end()) { @@ -1470,7 +1375,8 @@ t_draw_layer_display get_element_visibility_and_transparency(int src_layer, int bool cross_layer_enabled = draw_state->cross_layer_display.visible; //To only show elements (net flylines,noc links,etc...) that are connected to currently active layers on the screen - if (!draw_state->draw_layer_display[sink_layer].visible || !draw_state->draw_layer_display[src_layer].visible || (!cross_layer_enabled && src_layer != sink_layer)) { + if (!draw_state->draw_layer_display[sink_layer].visible || !draw_state->draw_layer_display[src_layer].visible + || (!cross_layer_enabled && src_layer != sink_layer)) { element_visibility.visible = false; /* Don't Draw */ } diff --git a/vpr/src/draw/draw.h b/vpr/src/draw/draw.h index 2bbd17d077f..a402a79c4b0 100644 --- a/vpr/src/draw/draw.h +++ b/vpr/src/draw/draw.h @@ -26,23 +26,26 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" -# include "draw_color.h" -# include "search_bar.h" -# include "draw_debug.h" -# include "manual_moves.h" -# include "vtr_ndoffsetmatrix.h" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" +#include "draw_color.h" +#include "search_bar.h" +#include "draw_debug.h" +#include "manual_moves.h" +#include "vtr_ndoffsetmatrix.h" extern ezgl::application::settings settings; extern ezgl::application application; #endif /* NO_GRAPHICS */ -void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type pic_on_screen_val, std::shared_ptr timing_info); +void update_screen(ScreenUpdatePriority priority, + const char* msg, + enum pic_type pic_on_screen_val, + std::shared_ptr timing_info); //FIXME: Currently broken if no rr-graph is loaded /** @@ -97,10 +100,7 @@ ezgl::color to_ezgl_color(vtr::Color color); * could be caused by the user clicking on a routing resource, toggled, or * fan-in/fan-out of a highlighted node. */ bool draw_if_net_highlighted(ClusterNetId inet); -std::vector trace_routed_connection_rr_nodes( - ClusterNetId net_id, - int driver_pin, - int sink_pin); +std::vector trace_routed_connection_rr_nodes(ClusterNetId net_id, int driver_pin, int sink_pin); /* Helper function for trace_routed_connection_rr_nodes * Adds the rr nodes linking rt_node to sink_rr_node to rr_nodes_on_path diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index 68379fce558..200c466c8f0 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -38,36 +38,36 @@ #include "tatum/report/TimingPathCollector.hpp" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif -# include "rr_graph.h" -# include "route_utilization.h" -# include "place_macro.h" -# include "buttons.h" +#include "rr_graph.h" +#include "route_utilization.h" +#include "place_macro.h" +#include "buttons.h" /****************************** Define Macros *******************************/ -# define DEFAULT_RR_NODE_COLOR ezgl::BLACK -# define OLD_BLK_LOC_COLOR blk_GOLD -# define NEW_BLK_LOC_COLOR blk_GREEN +#define DEFAULT_RR_NODE_COLOR ezgl::BLACK +#define OLD_BLK_LOC_COLOR blk_GOLD +#define NEW_BLK_LOC_COLOR blk_GREEN constexpr float EMPTY_BLOCK_LIGHTEN_FACTOR = 0.20; @@ -124,8 +124,7 @@ void drawplace(ezgl::renderer* g) { // 0 - opaque, 255 - transparent int transparency_factor = draw_state->draw_layer_display[layer_num].alpha; - if (width_offset > 0 - || height_offset > 0) + if (width_offset > 0 || height_offset > 0) continue; num_sub_tiles = type->capacity; @@ -153,8 +152,7 @@ void drawplace(ezgl::renderer* g) { curr_loc.x = i; curr_loc.y = j; curr_loc.layer = layer_num; - current_loc_is_highlighted = highlight_loc_with_specific_color(curr_loc, - block_color); + current_loc_is_highlighted = highlight_loc_with_specific_color(curr_loc, block_color); } // No color specified at this location; use the block color. if (!current_loc_is_highlighted) { @@ -162,8 +160,7 @@ void drawplace(ezgl::renderer* g) { block_color = draw_state->block_color(bnum); } else { block_color = get_block_type_color(type); - block_color = lighten_color(block_color, - EMPTY_BLOCK_LIGHTEN_FACTOR); + block_color = lighten_color(block_color, EMPTY_BLOCK_LIGHTEN_FACTOR); } } @@ -171,18 +168,16 @@ void drawplace(ezgl::renderer* g) { g->set_color(block_color, transparency_factor); /* Get coords of current sub_tile */ - ezgl::rectangle abs_clb_bbox = draw_coords->get_absolute_clb_bbox(layer_num, - i, - j, - k, - logical_block_type); + ezgl::rectangle abs_clb_bbox + = draw_coords->get_absolute_clb_bbox(layer_num, i, j, k, logical_block_type); ezgl::point2d center = abs_clb_bbox.center(); g->fill_rectangle(abs_clb_bbox); g->set_color(ezgl::BLACK, transparency_factor); - g->set_line_dash((bnum == ClusterBlockId::INVALID()) ? ezgl::line_dash::asymmetric_5_3 : ezgl::line_dash::none); + g->set_line_dash((bnum == ClusterBlockId::INVALID()) ? ezgl::line_dash::asymmetric_5_3 + : ezgl::line_dash::none); if (draw_state->draw_block_outlines) { g->draw_rectangle(abs_clb_bbox); } @@ -190,25 +185,18 @@ void drawplace(ezgl::renderer* g) { if (draw_state->draw_block_text) { /* Draw text if the space has parts of the netlist */ if (bnum) { - std::string name = cluster_ctx.clb_nlist.block_name( - bnum) - + vtr::string_fmt(" (#%zu)", size_t(bnum)); + std::string name + = cluster_ctx.clb_nlist.block_name(bnum) + vtr::string_fmt(" (#%zu)", size_t(bnum)); - g->draw_text(center, name.c_str(), abs_clb_bbox.width(), - abs_clb_bbox.height()); + g->draw_text(center, name.c_str(), abs_clb_bbox.width(), abs_clb_bbox.height()); } /* Draw text for block type so that user knows what block */ - if (width_offset == 0 - && height_offset == 0) { + if (width_offset == 0 && height_offset == 0) { std::string block_type_loc = type->name; block_type_loc += vtr::string_fmt(" (%d,%d)", i, j); - g->draw_text( - center - - ezgl::point2d(0, - abs_clb_bbox.height() / 4), - block_type_loc.c_str(), abs_clb_bbox.width(), - abs_clb_bbox.height()); + g->draw_text(center - ezgl::point2d(0, abs_clb_bbox.height() / 4), + block_type_loc.c_str(), abs_clb_bbox.width(), abs_clb_bbox.height()); } } } @@ -257,14 +245,16 @@ void drawnets(ezgl::renderer* g) { continue; /* Don't draw */ } - ezgl::point2d driver_center = draw_coords->get_absolute_clb_bbox(b1, cluster_ctx.clb_nlist.block_type(b1)).center(); + ezgl::point2d driver_center + = draw_coords->get_absolute_clb_bbox(b1, cluster_ctx.clb_nlist.block_type(b1)).center(); for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { ClusterBlockId b2 = cluster_ctx.clb_nlist.pin_block(pin_id); //the layer of the pin block (net sinks) - sink_block_layer_num =block_locs[b2].loc.layer; + sink_block_layer_num = block_locs[b2].loc.layer; - t_draw_layer_display element_visibility = get_element_visibility_and_transparency(driver_block_layer_num, sink_block_layer_num); + t_draw_layer_display element_visibility + = get_element_visibility_and_transparency(driver_block_layer_num, sink_block_layer_num); if (!element_visibility.visible) { continue; /* Don't Draw */ @@ -273,9 +263,11 @@ void drawnets(ezgl::renderer* g) { //Take the highest of the 2 transparency values that the user can select from the UI // Compare the current cross layer transparency to the overall Net transparency set by the user. - g->set_color(draw_state->net_color[net_id], fmin(transparency_factor, draw_state->net_color[net_id].alpha * NET_ALPHA)); + g->set_color(draw_state->net_color[net_id], + fmin(transparency_factor, draw_state->net_color[net_id].alpha * NET_ALPHA)); - ezgl::point2d sink_center = draw_coords->get_absolute_clb_bbox(b2, cluster_ctx.clb_nlist.block_type(b2)).center(); + ezgl::point2d sink_center + = draw_coords->get_absolute_clb_bbox(b2, cluster_ctx.clb_nlist.block_type(b2)).center(); g->draw_line(driver_center, sink_center); /* Uncomment to draw a chain instead of a star. */ /* driver_center = sink_center; */ @@ -313,11 +305,13 @@ void draw_congestion(ezgl::renderer* g) { sprintf(msg, "RR Node Overuse ratio range (%.2f, %.2f]", min_congestion_ratio, max_congestion_ratio); } else { VTR_ASSERT(draw_state->show_congestion == DRAW_CONGESTED_WITH_NETS); - sprintf(msg, "RR Node Overuse ratio range (%.2f, %.2f] (and congested nets)", min_congestion_ratio, max_congestion_ratio); + sprintf(msg, "RR Node Overuse ratio range (%.2f, %.2f] (and congested nets)", min_congestion_ratio, + max_congestion_ratio); } application.update_message(msg); - std::shared_ptr cmap = std::make_shared(min_congestion_ratio, max_congestion_ratio); + std::shared_ptr cmap + = std::make_shared(min_congestion_ratio, max_congestion_ratio); //Sort the nodes in ascending order of value for drawing, this ensures high //valued nodes are not overdrawn by lower value ones (e.g-> when zoomed-out far) @@ -417,32 +411,25 @@ void draw_routing_costs(ezgl::renderer* g) { for (const RRNodeId inode : device_ctx.rr_graph.nodes()) { float cost = 0.; if (draw_state->show_routing_costs == DRAW_TOTAL_ROUTING_COSTS - || draw_state->show_routing_costs - == DRAW_LOG_TOTAL_ROUTING_COSTS) { - cost = get_single_rr_cong_cost(inode, - get_draw_state_vars()->pres_fac); + || draw_state->show_routing_costs == DRAW_LOG_TOTAL_ROUTING_COSTS) { + cost = get_single_rr_cong_cost(inode, get_draw_state_vars()->pres_fac); } else if (draw_state->show_routing_costs == DRAW_BASE_ROUTING_COSTS) { cost = get_single_rr_cong_base_cost(inode); } else if (draw_state->show_routing_costs == DRAW_ACC_ROUTING_COSTS - || draw_state->show_routing_costs - == DRAW_LOG_ACC_ROUTING_COSTS) { + || draw_state->show_routing_costs == DRAW_LOG_ACC_ROUTING_COSTS) { cost = get_single_rr_cong_acc_cost(inode); } else { - VTR_ASSERT( - draw_state->show_routing_costs == DRAW_PRES_ROUTING_COSTS - || draw_state->show_routing_costs - == DRAW_LOG_PRES_ROUTING_COSTS); - cost = get_single_rr_cong_pres_cost(inode, - get_draw_state_vars()->pres_fac); + VTR_ASSERT(draw_state->show_routing_costs == DRAW_PRES_ROUTING_COSTS + || draw_state->show_routing_costs == DRAW_LOG_PRES_ROUTING_COSTS); + cost = get_single_rr_cong_pres_cost(inode, get_draw_state_vars()->pres_fac); } if (draw_state->show_routing_costs == DRAW_LOG_TOTAL_ROUTING_COSTS || draw_state->show_routing_costs == DRAW_LOG_ACC_ROUTING_COSTS - || draw_state->show_routing_costs - == DRAW_LOG_PRES_ROUTING_COSTS) { + || draw_state->show_routing_costs == DRAW_LOG_PRES_ROUTING_COSTS) { cost = std::log(cost); } rr_node_costs[inode] = cost; @@ -459,26 +446,19 @@ void draw_routing_costs(ezgl::renderer* g) { char msg[vtr::bufsize]; if (draw_state->show_routing_costs == DRAW_TOTAL_ROUTING_COSTS) { - sprintf(msg, "Total Congestion Cost Range [%g, %g]", min_cost, - max_cost); + sprintf(msg, "Total Congestion Cost Range [%g, %g]", min_cost, max_cost); } else if (draw_state->show_routing_costs == DRAW_LOG_TOTAL_ROUTING_COSTS) { - sprintf(msg, "Log Total Congestion Cost Range [%g, %g]", min_cost, - max_cost); + sprintf(msg, "Log Total Congestion Cost Range [%g, %g]", min_cost, max_cost); } else if (draw_state->show_routing_costs == DRAW_BASE_ROUTING_COSTS) { sprintf(msg, "Base Congestion Cost Range [%g, %g]", min_cost, max_cost); } else if (draw_state->show_routing_costs == DRAW_ACC_ROUTING_COSTS) { - sprintf(msg, "Accumulated (Historical) Congestion Cost Range [%g, %g]", - min_cost, max_cost); + sprintf(msg, "Accumulated (Historical) Congestion Cost Range [%g, %g]", min_cost, max_cost); } else if (draw_state->show_routing_costs == DRAW_LOG_ACC_ROUTING_COSTS) { - sprintf(msg, - "Log Accumulated (Historical) Congestion Cost Range [%g, %g]", - min_cost, max_cost); + sprintf(msg, "Log Accumulated (Historical) Congestion Cost Range [%g, %g]", min_cost, max_cost); } else if (draw_state->show_routing_costs == DRAW_PRES_ROUTING_COSTS) { - sprintf(msg, "Present Congestion Cost Range [%g, %g]", min_cost, - max_cost); + sprintf(msg, "Present Congestion Cost Range [%g, %g]", min_cost, max_cost); } else if (draw_state->show_routing_costs == DRAW_LOG_PRES_ROUTING_COSTS) { - sprintf(msg, "Log Present Congestion Cost Range [%g, %g]", min_cost, - max_cost); + sprintf(msg, "Log Present Congestion Cost Range [%g, %g]", min_cost, max_cost); } else { sprintf(msg, "Cost Range [%g, %g]", min_cost, max_cost); } @@ -522,10 +502,8 @@ void draw_routing_bb(ezgl::renderer* g) { //the drawn box contains the top/right channels double draw_xlow = draw_coords->tile_x[bb->xmin]; double draw_ylow = draw_coords->tile_y[bb->ymin]; - double draw_xhigh = draw_coords->tile_x[bb->xmax] - + 2 * draw_coords->get_tile_width(); - double draw_yhigh = draw_coords->tile_y[bb->ymax] - + 2 * draw_coords->get_tile_height(); + double draw_xhigh = draw_coords->tile_x[bb->xmax] + 2 * draw_coords->get_tile_width(); + double draw_yhigh = draw_coords->tile_y[bb->ymax] + 2 * draw_coords->get_tile_height(); g->set_color(blk_RED); g->draw_rectangle({draw_xlow, draw_ylow}, {draw_xhigh, draw_yhigh}); @@ -539,11 +517,9 @@ void draw_routing_bb(ezgl::renderer* g) { std::string msg; msg += "Showing BB"; - msg += " (" + std::to_string(bb->xmin) + ", " + std::to_string(bb->ymin) - + ", " + std::to_string(bb->xmax) + ", " + std::to_string(bb->ymax) - + ")"; - msg += " and routing for net '" + cluster_ctx.clb_nlist.net_name(convert_to_cluster_net_id(net_id)) - + "'"; + msg += " (" + std::to_string(bb->xmin) + ", " + std::to_string(bb->ymin) + ", " + std::to_string(bb->xmax) + ", " + + std::to_string(bb->ymax) + ")"; + msg += " and routing for net '" + cluster_ctx.clb_nlist.net_name(convert_to_cluster_net_id(net_id)) + "'"; msg += " (#" + std::to_string(size_t(net_id)) + ")"; application.update_message(msg.c_str()); } @@ -572,8 +548,7 @@ void drawroute(enum e_draw_net_type draw_net_type, ezgl::renderer* g) { /* Now draw each net, one by one. */ for (auto net_id : cluster_ctx.clb_nlist.nets()) { - if (draw_net_type == HIGHLIGHTED - && draw_state->net_color[net_id] == ezgl::BLACK) + if (draw_net_type == HIGHLIGHTED && draw_state->net_color[net_id] == ezgl::BLACK) continue; draw_routed_net((ParentNetId&)net_id, g); @@ -663,7 +638,8 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren int current_node_layer = rr_graph.node_layer(inode); int prev_node_layer = rr_graph.node_layer(prev_node); - t_draw_layer_display edge_visibility = get_element_visibility_and_transparency(prev_node_layer, current_node_layer); + t_draw_layer_display edge_visibility + = get_element_visibility_and_transparency(prev_node_layer, current_node_layer); //Don't draw node if the layer of the node is not set to visible on screen if (!draw_state->draw_layer_display[current_node_layer].visible) { @@ -729,13 +705,11 @@ void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::ren g->set_color(color, edge_visibility.alpha); switch (prev_type) { case CHANX: { - draw_chanx_to_chany_edge(prev_node, inode, - FROM_X_TO_Y, switch_type, g); + draw_chanx_to_chany_edge(prev_node, inode, FROM_X_TO_Y, switch_type, g); break; } case CHANY: { - draw_chany_to_chany_edge(RRNodeId(prev_node), RRNodeId(inode), - switch_type, g); + draw_chany_to_chany_edge(RRNodeId(prev_node), RRNodeId(inode), switch_type, g); break; } case OPIN: { @@ -776,7 +750,8 @@ bool is_edge_valid_to_draw(RRNodeId current_node, RRNodeId prev_node) { } if (current_node_layer != prev_node_layer) { - if (draw_state->cross_layer_display.visible && draw_state->draw_layer_display[current_node_layer].visible && draw_state->draw_layer_display[prev_node_layer].visible) { + if (draw_state->cross_layer_display.visible && draw_state->draw_layer_display[current_node_layer].visible + && draw_state->draw_layer_display[prev_node_layer].visible) { return true; //if both layers are enabled and cross layer connections are enabled } else { return false; //if cross layer connections are disabled or if either the current or prev node's layers are disabled @@ -801,7 +776,6 @@ void draw_placement_macros(ezgl::renderer* g) { const auto& block_locs = draw_state->get_graphics_blk_loc_registry_ref().block_locs(); for (const t_pl_macro& pl_macro : place_ctx.pl_macros) { - //TODO: for now we just draw the bounding box of the macro, which is incorrect for non-rectangular macros... int xlow = std::numeric_limits::max(); int ylow = std::numeric_limits::max(); @@ -835,14 +809,12 @@ void draw_placement_macros(ezgl::renderer* g) { double draw_yhigh = draw_coords->tile_y[yhigh]; g->set_color(blk_RED); - g->draw_rectangle({draw_xlow, draw_ylow}, - {draw_xhigh, draw_yhigh}); + g->draw_rectangle({draw_xlow, draw_ylow}, {draw_xhigh, draw_yhigh}); ezgl::color fill = blk_SKYBLUE; fill.alpha *= 0.3; g->set_color(fill); - g->fill_rectangle({draw_xlow, draw_ylow}, - {draw_xhigh, draw_yhigh}); + g->fill_rectangle({draw_xlow, draw_ylow}, {draw_xhigh, draw_yhigh}); } } @@ -869,10 +841,8 @@ void draw_routing_util(ezgl::renderer* g) { float max_util = -std::numeric_limits::infinity(); for (size_t x = 0; x < device_ctx.grid.width() - 1; ++x) { for (size_t y = 0; y < device_ctx.grid.height() - 1; ++y) { - max_util = std::max(max_util, - routing_util(chanx_usage[x][y], chanx_avail[x][y])); - max_util = std::max(max_util, - routing_util(chany_usage[x][y], chany_avail[x][y])); + max_util = std::max(max_util, routing_util(chanx_usage[x][y], chanx_avail[x][y])); + max_util = std::max(max_util, routing_util(chany_usage[x][y], chany_avail[x][y])); } } max_util = std::max(max_util, 1.f); @@ -904,30 +874,21 @@ void draw_routing_util(ezgl::renderer* g) { if (draw_state->clip_routing_util) { chanx_util = std::min(chanx_util, 1.f); } - ezgl::color chanx_color = to_ezgl_color( - cmap->color(chanx_util)); + ezgl::color chanx_color = to_ezgl_color(cmap->color(chanx_util)); chanx_color.alpha *= ALPHA; g->set_color(chanx_color); - ezgl::rectangle bb( - {draw_coords->tile_x[x], draw_coords->tile_y[y] - + 1 * tile_height}, - {draw_coords->tile_x[x] + 1 * tile_width, - draw_coords->tile_y[y + 1]}); + ezgl::rectangle bb({draw_coords->tile_x[x], draw_coords->tile_y[y] + 1 * tile_height}, + {draw_coords->tile_x[x] + 1 * tile_width, draw_coords->tile_y[y + 1]}); g->fill_rectangle(bb); g->set_color(ezgl::BLACK); - if (draw_state->show_routing_util - == DRAW_ROUTING_UTIL_WITH_VALUE) { - g->draw_text(bb.center(), - vtr::string_fmt("%.2f", chanx_util).c_str(), - bb.width(), bb.height()); - } else if (draw_state->show_routing_util - == DRAW_ROUTING_UTIL_WITH_FORMULA) { - g->draw_text(bb.center(), - vtr::string_fmt("%.2f = %.0f / %.0f", chanx_util, - chanx_usage[x][y], chanx_avail[x][y]) - .c_str(), - bb.width(), bb.height()); + if (draw_state->show_routing_util == DRAW_ROUTING_UTIL_WITH_VALUE) { + g->draw_text(bb.center(), vtr::string_fmt("%.2f", chanx_util).c_str(), bb.width(), bb.height()); + } else if (draw_state->show_routing_util == DRAW_ROUTING_UTIL_WITH_FORMULA) { + g->draw_text( + bb.center(), + vtr::string_fmt("%.2f = %.0f / %.0f", chanx_util, chanx_usage[x][y], chanx_avail[x][y]).c_str(), + bb.width(), bb.height()); } sb_util += chanx_util; @@ -939,29 +900,21 @@ void draw_routing_util(ezgl::renderer* g) { if (draw_state->clip_routing_util) { chany_util = std::min(chany_util, 1.f); } - ezgl::color chany_color = to_ezgl_color( - cmap->color(chany_util)); + ezgl::color chany_color = to_ezgl_color(cmap->color(chany_util)); chany_color.alpha *= ALPHA; g->set_color(chany_color); - ezgl::rectangle bb({draw_coords->tile_x[x] + 1 * tile_width, - draw_coords->tile_y[y]}, - {draw_coords->tile_x[x + 1], draw_coords->tile_y[y] - + 1 * tile_height}); + ezgl::rectangle bb({draw_coords->tile_x[x] + 1 * tile_width, draw_coords->tile_y[y]}, + {draw_coords->tile_x[x + 1], draw_coords->tile_y[y] + 1 * tile_height}); g->fill_rectangle(bb); g->set_color(ezgl::BLACK); - if (draw_state->show_routing_util - == DRAW_ROUTING_UTIL_WITH_VALUE) { - g->draw_text(bb.center(), - vtr::string_fmt("%.2f", chany_util).c_str(), - bb.width(), bb.height()); - } else if (draw_state->show_routing_util - == DRAW_ROUTING_UTIL_WITH_FORMULA) { - g->draw_text(bb.center(), - vtr::string_fmt("%.2f = %.0f / %.0f", chany_util, - chany_usage[x][y], chany_avail[x][y]) - .c_str(), - bb.width(), bb.height()); + if (draw_state->show_routing_util == DRAW_ROUTING_UTIL_WITH_VALUE) { + g->draw_text(bb.center(), vtr::string_fmt("%.2f", chany_util).c_str(), bb.width(), bb.height()); + } else if (draw_state->show_routing_util == DRAW_ROUTING_UTIL_WITH_FORMULA) { + g->draw_text( + bb.center(), + vtr::string_fmt("%.2f = %.0f / %.0f", chany_util, chany_usage[x][y], chany_avail[x][y]).c_str(), + bb.width(), bb.height()); } sb_util += chany_util; @@ -970,11 +923,9 @@ void draw_routing_util(ezgl::renderer* g) { //For now SB util is just average of surrounding channels //TODO: calculate actual usage - sb_util += routing_util(chanx_usage[x + 1][y], - chanx_avail[x + 1][y]); + sb_util += routing_util(chanx_usage[x + 1][y], chanx_avail[x + 1][y]); chan_count += 1; - sb_util += routing_util(chany_usage[x][y + 1], - chany_avail[x][y + 1]); + sb_util += routing_util(chany_usage[x][y + 1], chany_avail[x][y + 1]); chan_count += 1; VTR_ASSERT(chan_count > 0); @@ -985,31 +936,23 @@ void draw_routing_util(ezgl::renderer* g) { ezgl::color sb_color = to_ezgl_color(cmap->color(sb_util)); sb_color.alpha *= ALPHA; g->set_color(sb_color); - ezgl::rectangle bb( - {draw_coords->tile_x[x] + 1 * tile_width, - draw_coords->tile_y[y] + 1 * tile_height}, - {draw_coords->tile_x[x + 1], draw_coords->tile_y[y + 1]}); + ezgl::rectangle bb({draw_coords->tile_x[x] + 1 * tile_width, draw_coords->tile_y[y] + 1 * tile_height}, + {draw_coords->tile_x[x + 1], draw_coords->tile_y[y + 1]}); g->fill_rectangle(bb); //Draw over blocks - if (draw_state->show_routing_util - == DRAW_ROUTING_UTIL_OVER_BLOCKS) { - if (x < device_ctx.grid.width() - 2 - && y < device_ctx.grid.height() - 2) { - ezgl::rectangle bb2({draw_coords->tile_x[x + 1], - draw_coords->tile_y[y + 1]}, - {draw_coords->tile_x[x + 1] + 1 * tile_width, - draw_coords->tile_y[y + 1] + 1 * tile_width}); + if (draw_state->show_routing_util == DRAW_ROUTING_UTIL_OVER_BLOCKS) { + if (x < device_ctx.grid.width() - 2 && y < device_ctx.grid.height() - 2) { + ezgl::rectangle bb2( + {draw_coords->tile_x[x + 1], draw_coords->tile_y[y + 1]}, + {draw_coords->tile_x[x + 1] + 1 * tile_width, draw_coords->tile_y[y + 1] + 1 * tile_width}); g->fill_rectangle(bb2); } } g->set_color(ezgl::BLACK); if (draw_state->show_routing_util == DRAW_ROUTING_UTIL_WITH_VALUE - || draw_state->show_routing_util - == DRAW_ROUTING_UTIL_WITH_FORMULA) { - g->draw_text(bb.center(), - vtr::string_fmt("%.2f", sb_util).c_str(), bb.width(), - bb.height()); + || draw_state->show_routing_util == DRAW_ROUTING_UTIL_WITH_FORMULA) { + g->draw_text(bb.center(), vtr::string_fmt("%.2f", sb_util).c_str(), bb.width(), bb.height()); } } } @@ -1038,9 +981,8 @@ void draw_crit_path(ezgl::renderer* g) { } //Get the worst timing path - auto paths = path_collector.collect_worst_setup_timing_paths( - *timing_ctx.graph, - *(draw_state->setup_timing_info->setup_analyzer()), 1); + auto paths = path_collector.collect_worst_setup_timing_paths(*timing_ctx.graph, + *(draw_state->setup_timing_info->setup_analyzer()), 1); tatum::TimingPath path = paths[0]; //Walk through the timing path drawing each edge @@ -1056,26 +998,24 @@ void draw_crit_path(ezgl::renderer* g) { //any routing which corresponds to the edge // //We pick colors from the kelly max-contrast list, for long paths there may be repeats - ezgl::color color = kelly_max_contrast_colors[i++ - % kelly_max_contrast_colors.size()]; + ezgl::color color = kelly_max_contrast_colors[i++ % kelly_max_contrast_colors.size()]; float delay = arr_time - prev_arr_time; int src_block_layer = get_timing_path_node_layer_num(node); int sink_block_layer = get_timing_path_node_layer_num(prev_node); - t_draw_layer_display flyline_visibility = get_element_visibility_and_transparency(src_block_layer, sink_block_layer); + t_draw_layer_display flyline_visibility + = get_element_visibility_and_transparency(src_block_layer, sink_block_layer); if (draw_state->show_crit_path == DRAW_CRIT_PATH_FLYLINES - || draw_state->show_crit_path - == DRAW_CRIT_PATH_FLYLINES_DELAYS) { + || draw_state->show_crit_path == DRAW_CRIT_PATH_FLYLINES_DELAYS) { // FLylines for critical path are drawn based on the layer visibility of the source and sink if (flyline_visibility.visible) { g->set_color(color, flyline_visibility.alpha); g->set_line_dash(ezgl::line_dash::none); g->set_line_width(4); - draw_flyline_timing_edge(tnode_draw_coord(prev_node), - tnode_draw_coord(node), delay, g); + draw_flyline_timing_edge(tnode_draw_coord(prev_node), tnode_draw_coord(node), delay, g); g->set_line_width(0); } } else { @@ -1093,8 +1033,7 @@ void draw_crit_path(ezgl::renderer* g) { g->set_color(color, flyline_visibility.alpha); draw_flyline_timing_edge((ezgl::point2d)tnode_draw_coord(prev_node), - (ezgl::point2d)tnode_draw_coord(node), (float)delay, - (ezgl::renderer*)g); + (ezgl::point2d)tnode_draw_coord(node), (float)delay, (ezgl::renderer*)g); g->set_line_dash(ezgl::line_dash::none); g->set_line_width(0); } @@ -1111,23 +1050,27 @@ void draw_crit_path(ezgl::renderer* g) { * This function draws critical path elements based on the provided timing paths * and indexes map. It is primarily used in server mode, where items are drawn upon request. */ -void draw_crit_path_elements(const std::vector& paths, const std::map>& indexes, bool draw_crit_path_contour, ezgl::renderer* g) { +void draw_crit_path_elements(const std::vector& paths, + const std::map>& indexes, + bool draw_crit_path_contour, + ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); const ezgl::color contour_color{0, 0, 0, 40}; - auto draw_flyline_timing_edge_helper_fn = [](ezgl::renderer* renderer, const ezgl::color& color, ezgl::line_dash line_style, int line_width, float delay, - const tatum::NodeId& prev_node, const tatum::NodeId& node, bool skip_draw_delays=false) { - renderer->set_color(color); - renderer->set_line_dash(line_style); - renderer->set_line_width(line_width); - draw_flyline_timing_edge(tnode_draw_coord(prev_node), - tnode_draw_coord(node), delay, renderer, skip_draw_delays); + auto draw_flyline_timing_edge_helper_fn + = [](ezgl::renderer* renderer, const ezgl::color& color, ezgl::line_dash line_style, int line_width, + float delay, const tatum::NodeId& prev_node, const tatum::NodeId& node, bool skip_draw_delays = false) { + renderer->set_color(color); + renderer->set_line_dash(line_style); + renderer->set_line_width(line_width); + draw_flyline_timing_edge(tnode_draw_coord(prev_node), tnode_draw_coord(node), delay, renderer, + skip_draw_delays); - renderer->set_line_dash(ezgl::line_dash::none); - renderer->set_line_width(0); - }; + renderer->set_line_dash(ezgl::line_dash::none); + renderer->set_line_width(0); + }; - for (const auto& [path_index, element_indexes]: indexes) { + for (const auto& [path_index, element_indexes] : indexes) { if (path_index < paths.size()) { const tatum::TimingPath& path = paths[path_index]; @@ -1136,8 +1079,9 @@ void draw_crit_path_elements(const std::vector& paths, const float prev_arr_time = std::numeric_limits::quiet_NaN(); int element_counter = 0; for (const tatum::TimingPathElem& elem : path.data_arrival_path().elements()) { - bool draw_current_element = element_indexes.empty() || element_indexes.find(element_counter) != element_indexes.end(); - + bool draw_current_element + = element_indexes.empty() || element_indexes.find(element_counter) != element_indexes.end(); + // draw element tatum::NodeId node = elem.node(); float arr_time = elem.tag().time(); @@ -1150,11 +1094,15 @@ void draw_crit_path_elements(const std::vector& paths, const if (prev_node) { float delay = arr_time - prev_arr_time; - if ((draw_state->show_crit_path == DRAW_CRIT_PATH_FLYLINES) || (draw_state->show_crit_path == DRAW_CRIT_PATH_FLYLINES_DELAYS)) { + if ((draw_state->show_crit_path == DRAW_CRIT_PATH_FLYLINES) + || (draw_state->show_crit_path == DRAW_CRIT_PATH_FLYLINES_DELAYS)) { if (draw_current_element) { - draw_flyline_timing_edge_helper_fn(g, color, ezgl::line_dash::none, /*line_width*/4, delay, prev_node, node); + draw_flyline_timing_edge_helper_fn(g, color, ezgl::line_dash::none, /*line_width*/ 4, delay, + prev_node, node); } else if (draw_crit_path_contour) { - draw_flyline_timing_edge_helper_fn(g, contour_color, ezgl::line_dash::none, /*line_width*/1, delay, prev_node, node, /*skip_draw_delays*/true); + draw_flyline_timing_edge_helper_fn(g, contour_color, ezgl::line_dash::none, + /*line_width*/ 1, delay, prev_node, node, + /*skip_draw_delays*/ true); } } else { VTR_ASSERT(draw_state->show_crit_path != DRAW_NO_CRIT_PATH); @@ -1163,13 +1111,16 @@ void draw_crit_path_elements(const std::vector& paths, const //Draw the routed version of the timing edge draw_routed_timing_edge_connection(prev_node, node, color, g); - draw_flyline_timing_edge_helper_fn(g, color, ezgl::line_dash::asymmetric_5_3, /*line_width*/3, delay, prev_node, node); + draw_flyline_timing_edge_helper_fn(g, color, ezgl::line_dash::asymmetric_5_3, + /*line_width*/ 3, delay, prev_node, node); } else if (draw_crit_path_contour) { - draw_flyline_timing_edge_helper_fn(g, color, ezgl::line_dash::asymmetric_5_3, /*line_width*/3, delay, prev_node, node, /*skip_draw_delays*/true); + draw_flyline_timing_edge_helper_fn(g, color, ezgl::line_dash::asymmetric_5_3, + /*line_width*/ 3, delay, prev_node, node, + /*skip_draw_delays*/ true); } } } - + prev_node = node; prev_arr_time = arr_time; // end draw element @@ -1205,16 +1156,18 @@ bool is_flyline_valid_to_draw(int src_layer, int sink_layer) { } //Draws critical path shown as flylines. -void draw_flyline_timing_edge(ezgl::point2d start, ezgl::point2d end, float incr_delay, ezgl::renderer* g, bool skip_draw_delays/*=false*/) { +void draw_flyline_timing_edge(ezgl::point2d start, + ezgl::point2d end, + float incr_delay, + ezgl::renderer* g, + bool skip_draw_delays /*=false*/) { g->draw_line(start, end); draw_triangle_along_line(g, start, end, 0.95, 40 * DEFAULT_ARROW_SIZE); draw_triangle_along_line(g, start, end, 0.05, 40 * DEFAULT_ARROW_SIZE); - bool draw_delays = (get_draw_state_vars()->show_crit_path - == DRAW_CRIT_PATH_FLYLINES_DELAYS - || get_draw_state_vars()->show_crit_path - == DRAW_CRIT_PATH_ROUTING_DELAYS) - && !skip_draw_delays; + bool draw_delays = (get_draw_state_vars()->show_crit_path == DRAW_CRIT_PATH_FLYLINES_DELAYS + || get_draw_state_vars()->show_crit_path == DRAW_CRIT_PATH_ROUTING_DELAYS) + && !skip_draw_delays; if (draw_delays) { //Determine the strict bounding box based on the lines start/end float min_x = std::min(start.x, end.x); @@ -1246,8 +1199,7 @@ void draw_flyline_timing_edge(ezgl::point2d start, ezgl::point2d end, float incr std::string incr_delay_str = ss.str(); // Get the angle of line, to rotate the text - float text_angle = (180 / M_PI) - * atan((end.y - start.y) / (end.x - start.x)); + float text_angle = (180 / M_PI) * atan((end.y - start.y) / (end.x - start.x)); // Get the screen coordinates for text drawing ezgl::rectangle screen_coords = g->world_to_screen(text_bbox); @@ -1260,14 +1212,11 @@ void draw_flyline_timing_edge(ezgl::point2d start, ezgl::point2d end, float incr g->set_coordinate_system(ezgl::SCREEN); // Find an offset so it is sitting on top/below of the line - float x_offset = screen_coords.center().x - - 8 * sin(text_angle * (M_PI / 180)); - float y_offset = screen_coords.center().y - - 8 * cos(text_angle * (M_PI / 180)); + float x_offset = screen_coords.center().x - 8 * sin(text_angle * (M_PI / 180)); + float y_offset = screen_coords.center().y - 8 * cos(text_angle * (M_PI / 180)); ezgl::point2d offset_text_bbox(x_offset, y_offset); - g->draw_text(offset_text_bbox, incr_delay_str.c_str(), - text_bbox.width(), text_bbox.height()); + g->draw_text(offset_text_bbox, incr_delay_str.c_str(), text_bbox.width(), text_bbox.height()); g->set_font_size(14); @@ -1309,12 +1258,10 @@ void draw_routed_timing_edge_connection(tatum::NodeId src_tnode, ClusterBlockId clb_src_block = atom_ctx.lookup.atom_clb(atom_src_block); VTR_ASSERT(clb_src_block != ClusterBlockId::INVALID()); - ClusterBlockId clb_sink_block = atom_ctx.lookup.atom_clb( - atom_sink_block); + ClusterBlockId clb_sink_block = atom_ctx.lookup.atom_clb(atom_sink_block); VTR_ASSERT(clb_sink_block != ClusterBlockId::INVALID()); - const t_pb_graph_pin* sink_gpin = atom_ctx.lookup.atom_pin_pb_graph_pin( - atom_sink_pin); + const t_pb_graph_pin* sink_gpin = atom_ctx.lookup.atom_pin_pb_graph_pin(atom_sink_pin); VTR_ASSERT(sink_gpin); int sink_pb_route_id = sink_gpin->pin_count_in_cluster; @@ -1322,15 +1269,12 @@ void draw_routed_timing_edge_connection(tatum::NodeId src_tnode, int sink_block_pin_index = -1; int sink_net_pin_index = -1; - std::tie(net_id, sink_block_pin_index, sink_net_pin_index) = find_pb_route_clb_input_net_pin(clb_sink_block, - sink_pb_route_id); - if (net_id != ClusterNetId::INVALID() && sink_block_pin_index != -1 - && sink_net_pin_index != -1) { + std::tie(net_id, sink_block_pin_index, sink_net_pin_index) + = find_pb_route_clb_input_net_pin(clb_sink_block, sink_pb_route_id); + if (net_id != ClusterNetId::INVALID() && sink_block_pin_index != -1 && sink_net_pin_index != -1) { //Connection leaves the CLB //Now that we have the CLB source and sink pins, we need to grab all the points on the routing connecting the pins - VTR_ASSERT( - cluster_ctx.clb_nlist.net_driver_block(net_id) - == clb_src_block); + VTR_ASSERT(cluster_ctx.clb_nlist.net_driver_block(net_id) == clb_src_block); t_draw_state* draw_state = get_draw_state_vars(); @@ -1353,8 +1297,7 @@ void draw_routed_timing_edge_connection(tatum::NodeId src_tnode, points.push_back(atom_pin_draw_coord(atom_sink_pin)); } -void draw_color_map_legend(const vtr::ColorMap& cmap, - ezgl::renderer* g) { +void draw_color_map_legend(const vtr::ColorMap& cmap, ezgl::renderer* g) { constexpr float LEGEND_WIDTH_FAC = 0.075; constexpr float LEGEND_VERT_OFFSET_FAC = 0.05; constexpr float TEXT_OFFSET = 10; @@ -1362,18 +1305,13 @@ void draw_color_map_legend(const vtr::ColorMap& cmap, g->set_coordinate_system(ezgl::SCREEN); - float screen_width = application.get_canvas( - application.get_main_canvas_id()) - ->width(); - float screen_height = application.get_canvas( - application.get_main_canvas_id()) - ->height(); + float screen_width = application.get_canvas(application.get_main_canvas_id())->width(); + float screen_height = application.get_canvas(application.get_main_canvas_id())->height(); float vert_offset = screen_height * LEGEND_VERT_OFFSET_FAC; float legend_width = std::min(LEGEND_WIDTH_FAC * screen_width, 100); // In SCREEN coordinate: bottom_left is (0,0), right_top is (screen_width, screen_height) - ezgl::rectangle legend({0, vert_offset}, - {legend_width, screen_height - vert_offset}); + ezgl::rectangle legend({0, vert_offset}, {legend_width, screen_height - vert_offset}); float range = cmap.max() - cmap.min(); float height_incr = legend.height() / float(NUM_COLOR_POINTS); @@ -1382,14 +1320,14 @@ void draw_color_map_legend(const vtr::ColorMap& cmap, ezgl::color color = to_ezgl_color(cmap.color(val)); g->set_color(color); - g->fill_rectangle({legend.left(), legend.top() - i * height_incr}, {legend.right(), legend.top() - (i + 1) * height_incr}); + g->fill_rectangle({legend.left(), legend.top() - i * height_incr}, + {legend.right(), legend.top() - (i + 1) * height_incr}); } //Min mark g->set_color(blk_SKYBLUE); // set to skyblue so its easier to see std::string str = vtr::string_fmt("%.3g", cmap.min()); - g->draw_text({legend.center_x(), legend.top() - TEXT_OFFSET}, - str.c_str()); + g->draw_text({legend.center_x(), legend.top() - TEXT_OFFSET}, str.c_str()); //Mid marker g->set_color(ezgl::BLACK); @@ -1399,8 +1337,7 @@ void draw_color_map_legend(const vtr::ColorMap& cmap, //Max marker g->set_color(ezgl::BLACK); str = vtr::string_fmt("%.3g", cmap.max()); - g->draw_text({legend.center_x(), legend.bottom() + TEXT_OFFSET}, - str.c_str()); + g->draw_text({legend.center_x(), legend.bottom() + TEXT_OFFSET}, str.c_str()); g->set_color(ezgl::BLACK); g->draw_rectangle(legend); @@ -1436,22 +1373,18 @@ void draw_block_pin_util() { if (draw_state->show_blk_pin_util == DRAW_BLOCK_PIN_UTIL_TOTAL) { pin_util[blk] = cluster_ctx.clb_nlist.block_pins(blk).size() / float(total_input_pins[type] + total_output_pins[type]); - } else if (draw_state->show_blk_pin_util - == DRAW_BLOCK_PIN_UTIL_INPUTS) { + } else if (draw_state->show_blk_pin_util == DRAW_BLOCK_PIN_UTIL_INPUTS) { pin_util[blk] = (cluster_ctx.clb_nlist.block_input_pins(blk).size() + cluster_ctx.clb_nlist.block_clock_pins(blk).size()) / float(total_input_pins[type]); - } else if (draw_state->show_blk_pin_util - == DRAW_BLOCK_PIN_UTIL_OUTPUTS) { - pin_util[blk] = (cluster_ctx.clb_nlist.block_output_pins(blk).size()) - / float(total_output_pins[type]); + } else if (draw_state->show_blk_pin_util == DRAW_BLOCK_PIN_UTIL_OUTPUTS) { + pin_util[blk] = (cluster_ctx.clb_nlist.block_output_pins(blk).size()) / float(total_output_pins[type]); } else { VTR_ASSERT(false); } } - std::unique_ptr cmap = std::make_unique( - 0., 1.); + std::unique_ptr cmap = std::make_unique(0., 1.); for (auto blk : blks) { ezgl::color color = to_ezgl_color(cmap->color(pin_util[blk])); diff --git a/vpr/src/draw/draw_basic.h b/vpr/src/draw/draw_basic.h index d939b43b8ec..54fee02ddb3 100644 --- a/vpr/src/draw/draw_basic.h +++ b/vpr/src/draw/draw_basic.h @@ -34,11 +34,11 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" /* Draws the blocks placed on the proper clbs. Occupied blocks are darker colours * * while empty ones are lighter colours and have a dashed border. * @@ -70,8 +70,7 @@ void drawroute(enum e_draw_net_type draw_net_type, ezgl::renderer* g); void draw_routed_net(ParentNetId net, ezgl::renderer* g); //Draws the set of rr_nodes specified, using the colors set in draw_state -void draw_partial_route(const std::vector& rr_nodes_to_draw, - ezgl::renderer* g); +void draw_partial_route(const std::vector& rr_nodes_to_draw, ezgl::renderer* g); /** * @brief Returns the layer number of a timing path node @@ -116,7 +115,10 @@ void draw_crit_path(ezgl::renderer* g); * @param indexes The map of sets, where the map keys are path indices in std::vector, and each set contains the indices of the data_arrival_path elements ( @ref tatum::TimingPath ) to draw. * @param g Pointer to the ezgl::renderer object on which the elements will be drawn. */ -void draw_crit_path_elements(const std::vector& paths, const std::map>& indexes, bool draw_crit_path_contour, ezgl::renderer* g); +void draw_crit_path_elements(const std::vector& paths, + const std::map>& indexes, + bool draw_crit_path_contour, + ezgl::renderer* g); /** * @brief Checks whether a flyline should be drawn or not based on the layer control settings in the UI @@ -130,7 +132,11 @@ void draw_crit_path_elements(const std::vector& paths, const bool is_flyline_valid_to_draw(int src_layer, int sink_layer); /* Draws critical path shown as flylines. Takes in start and end coordinates, time delay, & renderer.*/ -void draw_flyline_timing_edge(ezgl::point2d start, ezgl::point2d end, float incr_delay, ezgl::renderer* g, bool skip_draw_delays=false); +void draw_flyline_timing_edge(ezgl::point2d start, + ezgl::point2d end, + float incr_delay, + ezgl::renderer* g, + bool skip_draw_delays = false); /* Collects all the drawing locations associated with the timing edge between start and end. * Only traces interconnect edges in detail, and treats all others as flylines. diff --git a/vpr/src/draw/draw_color.h b/vpr/src/draw/draw_color.h index f9258dadbef..4dcc5e5dbe8 100644 --- a/vpr/src/draw/draw_color.h +++ b/vpr/src/draw/draw_color.h @@ -10,9 +10,9 @@ #ifndef NO_GRAPHICS -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" static constexpr ezgl::color blk_BISQUE(0xFF, 0xE4, 0xC4); static constexpr ezgl::color blk_LIGHTGREY(0xD3, 0xD3, 0xD3); diff --git a/vpr/src/draw/draw_debug.cpp b/vpr/src/draw/draw_debug.cpp index aeee39b1501..63dac02fe60 100644 --- a/vpr/src/draw/draw_debug.cpp +++ b/vpr/src/draw/draw_debug.cpp @@ -24,9 +24,7 @@ class DrawDebuggerGlobals { open_windows openWindows; ///keeps track of all open window (related to breakpoints) //destructor clears bp_labels to avoid memory leaks - ~DrawDebuggerGlobals() { - bp_labels.clear(); - } + ~DrawDebuggerGlobals() { bp_labels.clear(); } }; //the global variable that holds all global variables realted to breakpoint graphics @@ -46,16 +44,16 @@ void draw_debug_window() { GtkWidget* mainGrid = gtk_grid_new(); gtk_widget_set_margin_top(mainGrid, 30); gtk_widget_set_margin_bottom(mainGrid, 30); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(mainGrid, 30); -# else +#else gtk_widget_set_margin_left(mainGrid, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(mainGrid, 20); -# else +#else gtk_widget_set_margin_right(mainGrid, 20); -# endif +#endif //create all labels GtkWidget* placerOpts = gtk_label_new(NULL); @@ -71,91 +69,92 @@ void draw_debug_window() { gtk_widget_set_margin_top(bplist, 30); GtkWidget* movesLabel = gtk_label_new("Number of moves to proceed"); gtk_widget_set_halign(movesLabel, GTK_ALIGN_END); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(movesLabel, 8); -# else +#else gtk_widget_set_margin_right(movesLabel, 8); -# endif +#endif GtkWidget* tempsLabel = gtk_label_new("Temperatures to proceed:"); gtk_widget_set_halign(tempsLabel, GTK_ALIGN_END); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(tempsLabel, 8); -# else +#else gtk_widget_set_margin_right(tempsLabel, 8); -# endif +#endif GtkWidget* blockLabel = gtk_label_new("Stop at from_block"); gtk_widget_set_halign(blockLabel, GTK_ALIGN_END); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(blockLabel, 8); -# else +#else gtk_widget_set_margin_right(blockLabel, 8); -# endif +#endif GtkWidget* iterLabel = gtk_label_new("Stop at router iteration"); gtk_widget_set_halign(iterLabel, GTK_ALIGN_END); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(iterLabel, 8); -# else +#else gtk_widget_set_margin_right(iterLabel, 8); -# endif +#endif GtkWidget* netLabel = gtk_label_new("Stop at route_net_id"); gtk_widget_set_halign(netLabel, GTK_ALIGN_END); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(netLabel, 8); -# else +#else gtk_widget_set_margin_right(netLabel, 8); -# endif - GtkWidget* star = gtk_label_new("*for handling multiple breakpoints at once using an expression can be more accurate"); +#endif + GtkWidget* star + = gtk_label_new("*for handling multiple breakpoints at once using an expression can be more accurate"); gtk_widget_set_margin_top(star, 15); //create all buttons GtkWidget* setM = gtk_button_new_with_label("Set"); gtk_widget_set_halign(setM, GTK_ALIGN_START); gtk_widget_set_margin_bottom(setM, 10); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(setM, 10); -# else +#else gtk_widget_set_margin_left(setM, 10); -# endif +#endif GtkWidget* setT = gtk_button_new_with_label("Set"); gtk_widget_set_halign(setT, GTK_ALIGN_START); gtk_widget_set_margin_bottom(setT, 10); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(setT, 10); -# else +#else gtk_widget_set_margin_left(setT, 10); -# endif +#endif GtkWidget* setB = gtk_button_new_with_label("Set"); gtk_widget_set_halign(setB, GTK_ALIGN_START); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(setB, 10); -# else +#else gtk_widget_set_margin_left(setB, 10); -# endif +#endif GtkWidget* setI = gtk_button_new_with_label("Set"); gtk_widget_set_halign(setI, GTK_ALIGN_START); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(setI, 10); -# else +#else gtk_widget_set_margin_left(setI, 10); -# endif +#endif GtkWidget* setN = gtk_button_new_with_label("Set"); gtk_widget_set_halign(setN, GTK_ALIGN_START); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(setN, 10); -# else +#else gtk_widget_set_margin_left(setN, 10); -# endif +#endif GtkWidget* advanced = gtk_button_new_with_label("Advanced"); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(advanced, 60); -# else +#else gtk_widget_set_margin_left(advanced, 60); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(advanced, 10); -# else +#else gtk_widget_set_margin_right(advanced, 10); -# endif +#endif gtk_widget_set_margin_top(advanced, 20); //create all entries @@ -236,7 +235,10 @@ void advanced_button_callback() { GtkWidget* set = gtk_button_new_with_label("set"); GtkWidget* entry = gtk_entry_new(); gtk_entry_set_width_chars((GtkEntry*)entry, 40); - GtkWidget* instructions = gtk_label_new("You can use % == > < <= >= && || operators with temp_count, move_num, and from_block to set your desired breakpoint. To see the full list of variables refer to the variables tab on the left\nex. move_num == 4 || from_block == 83"); + GtkWidget* instructions = gtk_label_new( + "You can use % == > < <= >= && || operators with temp_count, move_num, and from_block to set your desired " + "breakpoint. To see the full list of variables refer to the variables tab on the left\nex. move_num == 4 " + "|| from_block == 83"); gtk_label_set_justify((GtkLabel*)instructions, GTK_JUSTIFY_CENTER); gtk_label_set_line_wrap((GtkLabel*)instructions, TRUE); gtk_label_set_max_width_chars((GtkLabel*)instructions, 40); @@ -273,39 +275,39 @@ void advanced_button_callback() { gtk_widget_set_halign(expander, GTK_ALIGN_START); //set margins -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(instructions, 30); -# else +#else gtk_widget_set_margin_left(instructions, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(instructions, 30); -# else +#else gtk_widget_set_margin_right(instructions, 30); -# endif +#endif gtk_widget_set_margin_top(instructions, 30); gtk_widget_set_margin_bottom(instructions, 30); gtk_widget_set_margin_bottom(expression_here, 5); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(entry, 30); -# else +#else gtk_widget_set_margin_left(entry, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(set, 30); -# else +#else gtk_widget_set_margin_right(set, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(set, 40); -# else +#else gtk_widget_set_margin_left(set, 40); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(expander, 10); -# else +#else gtk_widget_set_margin_left(expander, 10); -# endif +#endif gtk_widget_set_margin_top(expander, 20); //grid settings @@ -350,11 +352,11 @@ void refresh_bpList() { if (draw_state->list_of_breakpoints[i].active) gtk_toggle_button_set_active((GtkToggleButton*)checkbox, TRUE); gtk_grid_attach((GtkGrid*)draw_debug_glob_vars.bpGrid, checkbox, 1, i, 1, 1); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(checkbox, 290 - draw_debug_glob_vars.bp_labels[i].size()); -# else +#else gtk_widget_set_margin_left(checkbox, 290 - draw_debug_glob_vars.bp_labels[i].size()); -# endif +#endif gtk_widget_set_halign(checkbox, GTK_ALIGN_END); gtk_widget_set_valign(checkbox, GTK_ALIGN_CENTER); @@ -368,11 +370,11 @@ void refresh_bpList() { gtk_grid_attach((GtkGrid*)draw_debug_glob_vars.bpGrid, deleteButton, 2, i, 1, 1); gtk_widget_set_halign(deleteButton, GTK_ALIGN_END); gtk_widget_set_valign(deleteButton, GTK_ALIGN_CENTER); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(deleteButton, 10); -# else +#else gtk_widget_set_margin_left(deleteButton, 10); -# endif +#endif gtk_widget_show_all(draw_debug_glob_vars.bpGrid); } @@ -393,11 +395,11 @@ void add_to_bpList(std::string bpDescription) { gtk_widget_set_name(checkbox, c.c_str()); gtk_toggle_button_set_active((GtkToggleButton*)checkbox, TRUE); gtk_grid_attach((GtkGrid*)draw_debug_glob_vars.bpGrid, checkbox, 1, draw_debug_glob_vars.bpList_row, 1, 1); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(checkbox, 290 - bpDescription.size()); -# else +#else gtk_widget_set_margin_left(checkbox, 290 - bpDescription.size()); -# endif +#endif gtk_widget_set_halign(checkbox, GTK_ALIGN_END); gtk_widget_set_valign(checkbox, GTK_ALIGN_CENTER); @@ -411,11 +413,11 @@ void add_to_bpList(std::string bpDescription) { gtk_grid_attach((GtkGrid*)draw_debug_glob_vars.bpGrid, deleteButton, 2, draw_debug_glob_vars.bpList_row, 1, 1); gtk_widget_set_halign(deleteButton, GTK_ALIGN_END); gtk_widget_set_valign(deleteButton, GTK_ALIGN_CENTER); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(deleteButton, 10); -# else +#else gtk_widget_set_margin_left(deleteButton, 10); -# endif +#endif gtk_widget_show_all(draw_debug_glob_vars.bpGrid); } @@ -539,16 +541,16 @@ void invalid_breakpoint_entry_window(std::string error) { //label settings GtkWidget* label = gtk_label_new(error.c_str()); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(label, 30); -# else +#else gtk_widget_set_margin_left(label, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(label, 30); -# else +#else gtk_widget_set_margin_right(label, 30); -# endif +#endif gtk_widget_set_margin_top(label, 30); gtk_widget_set_margin_bottom(label, 30); gtk_grid_attach((GtkGrid*)grid, label, 0, 0, 1, 1); @@ -556,16 +558,16 @@ void invalid_breakpoint_entry_window(std::string error) { //button settings GtkWidget* button = gtk_button_new_with_label("OK"); gtk_widget_set_margin_bottom(button, 30); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(button, 30); -# else +#else gtk_widget_set_margin_right(button, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(button, 30); -# else +#else gtk_widget_set_margin_left(button, 30); -# endif +#endif gtk_grid_attach((GtkGrid*)grid, button, 0, 1, 1, 1); g_signal_connect(button, "clicked", G_CALLBACK(ok_close_window), window); @@ -586,47 +588,47 @@ void breakpoint_info_window(std::string bpDescription, BreakpointState draw_brea //label settings GtkWidget* label = gtk_label_new(bpDescription.c_str()); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(label, 30); -# else +#else gtk_widget_set_margin_left(label, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(label, 30); -# else +#else gtk_widget_set_margin_right(label, 30); -# endif +#endif gtk_widget_set_margin_top(label, 30); gtk_widget_set_margin_bottom(label, 30); gtk_grid_attach((GtkGrid*)grid, label, 0, 0, 1, 1); GtkWidget* curr_info = gtk_label_new(NULL); gtk_label_set_markup((GtkLabel*)curr_info, "Current Information"); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(curr_info, 30); -# else +#else gtk_widget_set_margin_left(curr_info, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(curr_info, 30); -# else +#else gtk_widget_set_margin_right(curr_info, 30); -# endif +#endif gtk_widget_set_margin_bottom(curr_info, 15); gtk_grid_attach((GtkGrid*)grid, curr_info, 0, 1, 1, 1); //info grid GtkWidget* info_grid = gtk_grid_new(); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(info_grid, 30); -# else +#else gtk_widget_set_margin_left(info_grid, 30); -# endif -# if GTK_CHECK_VERSION(3, 12, 0) +#endif +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_end(info_grid, 30); -# else +#else gtk_widget_set_margin_right(info_grid, 30); -# endif +#endif gtk_widget_set_margin_bottom(info_grid, 20); //images @@ -634,67 +636,68 @@ void breakpoint_info_window(std::string bpDescription, BreakpointState draw_brea GtkWidget* t = gtk_image_new_from_file("src/draw/t.png"); GtkWidget* r = gtk_image_new_from_file("src/draw/r.png"); GtkWidget* n = gtk_image_new_from_file("src/draw/n.png"); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(n, 18); -# else +#else gtk_widget_set_margin_left(n, 18); -# endif +#endif GtkWidget* i = gtk_image_new_from_file("src/draw/i.png"); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(i, 16); -# else +#else gtk_widget_set_margin_left(i, 16); -# endif +#endif GtkWidget* b = gtk_image_new_from_file("src/draw/b.png"); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(b, 18); -# else +#else gtk_widget_set_margin_left(b, 18); -# endif +#endif //info grid labels std::string move_num = "move_num: " + std::to_string(draw_breakpoint_state.move_num); GtkWidget* move_info = gtk_label_new(move_num.c_str()); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(move_info, 5); -# else +#else gtk_widget_set_margin_left(move_info, 5); -# endif +#endif gtk_widget_set_halign(move_info, GTK_ALIGN_START); std::string temp_count = "temp_count: " + std::to_string(draw_breakpoint_state.temp_count); GtkWidget* temp_info = gtk_label_new(temp_count.c_str()); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(temp_info, 5); -# else +#else gtk_widget_set_margin_left(temp_info, 5); -# endif +#endif gtk_widget_set_halign(temp_info, GTK_ALIGN_START); - std::string in_blocks_affected = "in_blocks_affected: " + std::to_string(get_bp_state_globals()->get_glob_breakpoint_state()->block_affected); + std::string in_blocks_affected + = "in_blocks_affected: " + std::to_string(get_bp_state_globals()->get_glob_breakpoint_state()->block_affected); GtkWidget* ba_info = gtk_label_new(in_blocks_affected.c_str()); gtk_widget_set_halign(ba_info, GTK_ALIGN_START); std::string block_id = "from_block: " + std::to_string(draw_breakpoint_state.from_block); GtkWidget* block_info = gtk_label_new(block_id.c_str()); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(block_info, 5); -# else +#else gtk_widget_set_margin_left(block_info, 5); -# endif +#endif gtk_widget_set_halign(block_info, GTK_ALIGN_START); std::string router_iter = "router_iter: " + std::to_string(draw_breakpoint_state.router_iter); GtkWidget* ri_info = gtk_label_new(router_iter.c_str()); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(ri_info, 5); -# else +#else gtk_widget_set_margin_left(ri_info, 5); -# endif +#endif gtk_widget_set_halign(ri_info, GTK_ALIGN_START); std::string net_id = "rouet_net_id: " + std::to_string(draw_breakpoint_state.route_net_id); GtkWidget* net_info = gtk_label_new(net_id.c_str()); -# if GTK_CHECK_VERSION(3, 12, 0) +#if GTK_CHECK_VERSION(3, 12, 0) gtk_widget_set_margin_start(net_info, 5); -# else +#else gtk_widget_set_margin_left(net_info, 5); -# endif +#endif gtk_widget_set_halign(net_info, GTK_ALIGN_START); //attach to grid @@ -729,9 +732,7 @@ void breakpoint_info_window(std::string bpDescription, BreakpointState draw_brea } //closes the "invalid entry" window -void ok_close_window(GtkWidget* /*widget*/, GtkWidget* window) { - gtk_window_close((GtkWindow*)window); -} +void ok_close_window(GtkWidget* /*widget*/, GtkWidget* window) { gtk_window_close((GtkWindow*)window); } //checks if an expression is valid by checking the order of operators // i.e expression can't start or end with an operator, && and || can't be the first operators used @@ -740,7 +741,9 @@ bool valid_expression(std::string exp) { //the comparing operators are COMP_OP and bool operators are BOOL_OP std::vector ops; for (size_t i = 0; i < exp.size(); i++) { - if (exp[i + 1] != '\0' && ((exp[i] == '=' && exp[i + 1] == '=') || (exp[i] == '>' && exp[i + 1] == '=') || (exp[i] == '<' && exp[i + 1] == '=') || (exp[i] == '+' && exp[i + 1] == '='))) { + if (exp[i + 1] != '\0' + && ((exp[i] == '=' && exp[i + 1] == '=') || (exp[i] == '>' && exp[i + 1] == '=') + || (exp[i] == '<' && exp[i + 1] == '=') || (exp[i] == '+' && exp[i + 1] == '='))) { ops.push_back(COMP_OP); i++; } else if (exp[i + 1] != '\0' && ((exp[i] == '>' && exp[i + 1] != '=') || (exp[i] == '<' && exp[i + 1] != '='))) @@ -768,13 +771,9 @@ bool valid_expression(std::string exp) { } //sets boolean in openWindows to false when window closes so user can't open the same window twice -void close_debug_window() { - draw_debug_glob_vars.openWindows.debug_window = false; -} +void close_debug_window() { draw_debug_glob_vars.openWindows.debug_window = false; } //sets boolean in openWindows to false when window closes so user can't open the same window twice -void close_advanced_window() { - draw_debug_glob_vars.openWindows.advanced_window = false; -} +void close_advanced_window() { draw_debug_glob_vars.openWindows.advanced_window = false; } #endif diff --git a/vpr/src/draw/draw_debug.h b/vpr/src/draw/draw_debug.h index c88f146cdb8..f79d7740d7b 100644 --- a/vpr/src/draw/draw_debug.h +++ b/vpr/src/draw/draw_debug.h @@ -9,19 +9,19 @@ #ifndef NO_GRAPHICS -# include "breakpoint.h" -# include "draw_global.h" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "breakpoint.h" +#include "draw_global.h" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" -# include -# include -# include -# include -# include -# include -# include -# include +#include +#include +#include +#include +#include +#include +#include +#include /** debugger functions **/ void draw_debug_window(); diff --git a/vpr/src/draw/draw_floorplanning.cpp b/vpr/src/draw/draw_floorplanning.cpp index 8e93d0ca7bd..c38fdd23f83 100644 --- a/vpr/src/draw/draw_floorplanning.cpp +++ b/vpr/src/draw/draw_floorplanning.cpp @@ -24,30 +24,33 @@ #include "tatum/report/TimingPathCollector.hpp" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif -static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* current_pb, - const t_pb* pb_to_draw, const ezgl::rectangle& parent_bbox, - const t_logical_block_type_ptr type, ezgl::color color, +static void draw_internal_pb(const ClusterBlockId clb_index, + t_pb* current_pb, + const t_pb* pb_to_draw, + const ezgl::rectangle& parent_bbox, + const t_logical_block_type_ptr type, + ezgl::color color, ezgl::renderer* g); const std::vector kelly_max_contrast_colors_no_black = { @@ -75,8 +78,8 @@ const std::vector kelly_max_contrast_colors_no_black = { ezgl::color(43, 61, 38) //olive green }; -# define DEFAULT_HIGHLIGHT_ALPHA 30 -# define CLICKED_HIGHLIGHT_ALPHA 100 +#define DEFAULT_HIGHLIGHT_ALPHA 30 +#define CLICKED_HIGHLIGHT_ALPHA 100 //Keeps track of how translucent each partition should be drawn on screen. static std::vector highlight_alpha; @@ -93,7 +96,8 @@ static void highlight_partition(ezgl::renderer* g, int partitionID, int alpha) { const auto& regions = partition_region.get_regions(); bool name_drawn = false; - ezgl::color partition_color = kelly_max_contrast_colors_no_black[partitionID % (kelly_max_contrast_colors_no_black.size())]; + ezgl::color partition_color + = kelly_max_contrast_colors_no_black[partitionID % (kelly_max_contrast_colors_no_black.size())]; // The units of space in the constraints xml file will be referred to as "tile units" // The units of space that'll be used by ezgl to draw will be referred to as "on screen units" @@ -114,8 +118,10 @@ static void highlight_partition(ezgl::renderer* g, int partitionID, int alpha) { int alpha_layer_part = alpha * draw_state->draw_layer_display[layer].alpha / 255; g->set_color(partition_color, alpha_layer_part); - ezgl::rectangle top_right = draw_coords->get_absolute_clb_bbox(layer, reg_coord.xmax(), reg_coord.ymax(), 0); - ezgl::rectangle bottom_left = draw_coords->get_absolute_clb_bbox(layer, reg_coord.xmin(), reg_coord.ymin(), 0); + ezgl::rectangle top_right + = draw_coords->get_absolute_clb_bbox(layer, reg_coord.xmax(), reg_coord.ymax(), 0); + ezgl::rectangle bottom_left + = draw_coords->get_absolute_clb_bbox(layer, reg_coord.xmin(), reg_coord.ymin(), 0); ezgl::rectangle on_screen_rect(bottom_left.bottom_left(), top_right.top_right()); @@ -125,11 +131,8 @@ static void highlight_partition(ezgl::renderer* g, int partitionID, int alpha) { g->set_color(partition_color, 230); - g->draw_text( - on_screen_rect.center(), - partition_name, - on_screen_rect.width() - 10, - on_screen_rect.height() - 10); + g->draw_text(on_screen_rect.center(), partition_name, on_screen_rect.width() - 10, + on_screen_rect.height() - 10); name_drawn = true; @@ -150,8 +153,7 @@ void highlight_all_regions(ezgl::renderer* g) { //keeps track of what alpha level each partition is if (highlight_alpha.empty()) { highlight_alpha.resize(num_partitions); - std::fill(highlight_alpha.begin(), highlight_alpha.end(), - DEFAULT_HIGHLIGHT_ALPHA); + std::fill(highlight_alpha.begin(), highlight_alpha.end(), DEFAULT_HIGHLIGHT_ALPHA); } //draws the partitions @@ -174,11 +176,13 @@ void draw_constrained_atoms(ezgl::renderer* g) { for (const AtomBlockId atom_id : atoms) { if (atom_ctx.lookup.atom_pb(atom_id) != nullptr) { const t_pb* pb = atom_ctx.lookup.atom_pb(atom_id); - auto color = kelly_max_contrast_colors_no_black[partitionID % (kelly_max_contrast_colors_no_black.size())]; + auto color + = kelly_max_contrast_colors_no_black[partitionID % (kelly_max_contrast_colors_no_black.size())]; ClusterBlockId clb_index = atom_ctx.lookup.atom_clb(atom_id); auto type = cluster_ctx.clb_nlist.block_type(clb_index); - draw_internal_pb(clb_index, cluster_ctx.clb_nlist.block_pb(clb_index), pb, ezgl::rectangle({0, 0}, 0, 0), type, color, g); + draw_internal_pb(clb_index, cluster_ctx.clb_nlist.block_pb(clb_index), pb, + ezgl::rectangle({0, 0}, 0, 0), type, color, g); } } } @@ -190,7 +194,8 @@ static void draw_internal_pb(const ClusterBlockId clb_index, const t_pb* pb_to_draw, const ezgl::rectangle& parent_bbox, const t_logical_block_type_ptr type, - ezgl::color color, ezgl::renderer* g) { + ezgl::color color, + ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); t_draw_state* draw_state = get_draw_state_vars(); @@ -240,26 +245,15 @@ static void draw_internal_pb(const ClusterBlockId clb_index, std::string blk_tag = pb_name + " (" + pb_type_name + ")"; - g->draw_text( - abs_bbox.center(), - blk_tag, - abs_bbox.width() + 10, - abs_bbox.height() + 10); + g->draw_text(abs_bbox.center(), blk_tag, abs_bbox.width() + 10, abs_bbox.height() + 10); } else { - g->draw_text( - abs_bbox.center(), - pb_type->name, - abs_bbox.width() + 10, - abs_bbox.height() + 10); + g->draw_text(abs_bbox.center(), pb_type->name, abs_bbox.width() + 10, abs_bbox.height() + 10); } } } -enum { - COL_NAME = 0, - NUM_COLS -}; +enum { COL_NAME = 0, NUM_COLS }; //Highlights partition clicked on in the legend. void highlight_selected_partition(GtkWidget* widget) { @@ -319,21 +313,16 @@ static GtkTreeModel* create_and_fill_model() { auto atoms = constraints.get_part_atoms((PartitionId)partitionID); const auto& partition = constraints.get_partition((PartitionId)partitionID); - std::string partition_name(partition.get_name() - + " (" + std::to_string(atoms.size()) + " primitives)"); + std::string partition_name(partition.get_name() + " (" + std::to_string(atoms.size()) + " primitives)"); GtkTreeIter iter, child_iter; gtk_tree_store_append(store, &iter, nullptr); - gtk_tree_store_set(store, &iter, - COL_NAME, partition_name.c_str(), - -1); + gtk_tree_store_set(store, &iter, COL_NAME, partition_name.c_str(), -1); for (AtomBlockId const_atom : atoms) { std::string atom_name = (atom_ctx.lookup.atom_pb(const_atom))->name; gtk_tree_store_append(store, &child_iter, &iter); - gtk_tree_store_set(store, &child_iter, - COL_NAME, atom_name.c_str(), - -1); + gtk_tree_store_set(store, &child_iter, COL_NAME, atom_name.c_str(), -1); } } @@ -344,12 +333,8 @@ GtkWidget* setup_floorplanning_legend(GtkWidget* content_tree) { GtkCellRenderer* renderer; renderer = gtk_cell_renderer_text_new(); - gtk_tree_view_insert_column_with_attributes(GTK_TREE_VIEW(content_tree), - -1, - "Partition", - renderer, - "text", COL_NAME, - NULL); + gtk_tree_view_insert_column_with_attributes(GTK_TREE_VIEW(content_tree), -1, "Partition", renderer, "text", + COL_NAME, NULL); GtkTreeModel* model = create_and_fill_model(); diff --git a/vpr/src/draw/draw_floorplanning.h b/vpr/src/draw/draw_floorplanning.h index f45b398e4d8..feae6ec127c 100644 --- a/vpr/src/draw/draw_floorplanning.h +++ b/vpr/src/draw/draw_floorplanning.h @@ -6,11 +6,11 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" ///@brief Iterates through all partitions described in the constraints file and highlights their respective partitions void highlight_all_regions(ezgl::renderer* g); diff --git a/vpr/src/draw/draw_global.cpp b/vpr/src/draw/draw_global.cpp index 391b659bbcf..656e598b892 100644 --- a/vpr/src/draw/draw_global.cpp +++ b/vpr/src/draw/draw_global.cpp @@ -12,8 +12,8 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" -# include "draw_types.h" +#include "draw_global.h" +#include "draw_types.h" /*************************** Variables Definition ***************************/ @@ -31,13 +31,9 @@ static t_draw_coords draw_coords; /* This accessor function returns pointer to the global variable * draw_coords. Use this function to access draw_coords. */ -t_draw_coords* get_draw_coords_vars() { - return &draw_coords; -} +t_draw_coords* get_draw_coords_vars() { return &draw_coords; } /* Use this function to access draw_state. */ -t_draw_state* get_draw_state_vars() { - return &draw_state; -} +t_draw_state* get_draw_state_vars() { return &draw_state; } #endif // NO_GRAPHICS diff --git a/vpr/src/draw/draw_global.h b/vpr/src/draw/draw_global.h index f1eec3967f5..e53b628cc73 100644 --- a/vpr/src/draw/draw_global.h +++ b/vpr/src/draw/draw_global.h @@ -15,13 +15,13 @@ #ifndef NO_GRAPHICS -# include "draw_types.h" +#include "draw_types.h" constexpr float DEFAULT_ARROW_SIZE = 0.3; // a very small area, in (screen pixels)^2 // used for level of detail culling -# define MIN_VISIBLE_AREA 3.0 +#define MIN_VISIBLE_AREA 3.0 t_draw_coords* get_draw_coords_vars(); diff --git a/vpr/src/draw/draw_mux.cpp b/vpr/src/draw/draw_mux.cpp index 746af57d811..4612bbc85e9 100644 --- a/vpr/src/draw/draw_mux.cpp +++ b/vpr/src/draw/draw_mux.cpp @@ -34,58 +34,57 @@ #include "move_utils.h" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif //#define TIME_DRAWSCREEN /* Enable if want to track runtime for drawscreen() */ //Draws a mux, height/width define the bounding box, scale [0.,1.] controls the slope of the muxes sides -ezgl::rectangle draw_mux(ezgl::point2d origin, e_side orientation, float height, float width, float scale, ezgl::renderer* g) { +ezgl::rectangle draw_mux(ezgl::point2d origin, + e_side orientation, + float height, + float width, + float scale, + ezgl::renderer* g) { std::vector mux_polygon; switch (orientation) { case TOP: //Clock-wise from bottom left mux_polygon.push_back({origin.x - height / 2, origin.y - width / 2}); - mux_polygon.push_back( - {origin.x - (scale * height) / 2, origin.y + width / 2}); - mux_polygon.push_back( - {origin.x + (scale * height) / 2, origin.y + width / 2}); + mux_polygon.push_back({origin.x - (scale * height) / 2, origin.y + width / 2}); + mux_polygon.push_back({origin.x + (scale * height) / 2, origin.y + width / 2}); mux_polygon.push_back({origin.x + height / 2, origin.y - width / 2}); break; case BOTTOM: //Clock-wise from bottom left - mux_polygon.push_back( - {origin.x - (scale * height) / 2, origin.y - width / 2}); + mux_polygon.push_back({origin.x - (scale * height) / 2, origin.y - width / 2}); mux_polygon.push_back({origin.x - height / 2, origin.y + width / 2}); mux_polygon.push_back({origin.x + height / 2, origin.y + width / 2}); - mux_polygon.push_back( - {origin.x + (scale * height) / 2, origin.y - width / 2}); + mux_polygon.push_back({origin.x + (scale * height) / 2, origin.y - width / 2}); break; case LEFT: //Clock-wise from bottom left - mux_polygon.push_back( - {origin.x - width / 2, origin.y - (scale * height) / 2}); - mux_polygon.push_back( - {origin.x - width / 2, origin.y + (scale * height) / 2}); + mux_polygon.push_back({origin.x - width / 2, origin.y - (scale * height) / 2}); + mux_polygon.push_back({origin.x - width / 2, origin.y + (scale * height) / 2}); mux_polygon.push_back({origin.x + width / 2, origin.y + height / 2}); mux_polygon.push_back({origin.x + width / 2, origin.y - height / 2}); break; @@ -93,10 +92,8 @@ ezgl::rectangle draw_mux(ezgl::point2d origin, e_side orientation, float height, //Clock-wise from bottom left mux_polygon.push_back({origin.x - width / 2, origin.y - height / 2}); mux_polygon.push_back({origin.x - width / 2, origin.y + height / 2}); - mux_polygon.push_back( - {origin.x + width / 2, origin.y + (scale * height) / 2}); - mux_polygon.push_back( - {origin.x + width / 2, origin.y - (scale * height) / 2}); + mux_polygon.push_back({origin.x + width / 2, origin.y + (scale * height) / 2}); + mux_polygon.push_back({origin.x + width / 2, origin.y - (scale * height) / 2}); break; default: @@ -125,13 +122,17 @@ ezgl::rectangle draw_mux(ezgl::point2d origin, e_side orientation, float height, /* Draws a mux with width = height * 0.4 and scale (slope of the muxes sides) = 0.6, labelled with its size. */ -void draw_mux_with_size(ezgl::point2d origin, e_side orientation, float height, int size, int transparency_factor, ezgl::renderer* g) { +void draw_mux_with_size(ezgl::point2d origin, + e_side orientation, + float height, + int size, + int transparency_factor, + ezgl::renderer* g) { g->set_color(ezgl::YELLOW, transparency_factor); auto bounds = draw_mux(origin, orientation, height, g); g->set_color(ezgl::BLACK, transparency_factor); - g->draw_text(bounds.center(), std::to_string(size), bounds.width(), - bounds.height()); + g->draw_text(bounds.center(), std::to_string(size), bounds.width(), bounds.height()); } #endif diff --git a/vpr/src/draw/draw_mux.h b/vpr/src/draw/draw_mux.h index dbfcf2b4d30..9b43654ee09 100644 --- a/vpr/src/draw/draw_mux.h +++ b/vpr/src/draw/draw_mux.h @@ -31,11 +31,11 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" /** * @brief Draws a mux with width = height * 0.4 and scale (slope of the muxes sides) = 0.6, labelled with its size. @@ -43,7 +43,12 @@ * Also takes in transparency factor, based on the transparency of the layer the mux is to be drawn on * (0 is opaque and 255 is transparent). */ -void draw_mux_with_size(ezgl::point2d origin, e_side orientation, float height, int size, int transparency_factor, ezgl::renderer* g); +void draw_mux_with_size(ezgl::point2d origin, + e_side orientation, + float height, + int size, + int transparency_factor, + ezgl::renderer* g); /* Draws a mux with width = height * 0.4 and scale (slope of the muxes sides) = 0.6. * Takes in point of origin, orientation, height and renderer. @@ -51,7 +56,12 @@ void draw_mux_with_size(ezgl::point2d origin, e_side orientation, float height, ezgl::rectangle draw_mux(ezgl::point2d origin, e_side orientation, float height, ezgl::renderer* g); /* Draws a mux, height/width define the bounding box, scale [0.,1.] controls the slope of the muxes sides */ -ezgl::rectangle draw_mux(ezgl::point2d origin, e_side orientation, float height, float width, float height_scale, ezgl::renderer* g); +ezgl::rectangle draw_mux(ezgl::point2d origin, + e_side orientation, + float height, + float width, + float height_scale, + ezgl::renderer* g); #endif /* NO_GRAPHICS */ #endif /* DRAW_MUX_H */ diff --git a/vpr/src/draw/draw_noc.cpp b/vpr/src/draw/draw_noc.cpp index d112cb7cae5..bc97755d837 100644 --- a/vpr/src/draw/draw_noc.cpp +++ b/vpr/src/draw/draw_noc.cpp @@ -1,12 +1,12 @@ #ifndef NO_GRAPHICS -# include "draw_noc.h" -# include "globals.h" -# include "noc_storage.h" -# include "vpr_error.h" -# include "vtr_math.h" -# include "draw_basic.h" +#include "draw_noc.h" +#include "globals.h" +#include "noc_storage.h" +#include "vpr_error.h" +#include "vtr_math.h" +#include "draw_basic.h" void draw_noc(ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); @@ -64,7 +64,8 @@ void draw_noc(ezgl::renderer* g) { // One link will shift in one direction (knows as TOP) and the other link will shift in the opposite direction (known as BOTTOM) determine_direction_to_shift_noc_links(list_of_noc_link_shift_directions); - draw_noc_links(g, noc_router_logical_type, noc_link_colors, noc_connection_marker_bbox, list_of_noc_link_shift_directions); + draw_noc_links(g, noc_router_logical_type, noc_link_colors, noc_connection_marker_bbox, + list_of_noc_link_shift_directions); draw_noc_connection_marker(g, router_list, noc_connection_marker_bbox); } @@ -92,7 +93,6 @@ void draw_noc_usage(vtr::vector& noc_link_colors) { ezgl::color current_noc_link_color; for (const auto& [link_id, bandwidth_usage] : noc_link_bandwidth_usages.pairs()) { - // only update the color of the link if it wasn't updated previously if (noc_link_colors[link_id] == ezgl::BLACK) { // if we are here then the link was not updated previously, so assign the color here @@ -158,9 +158,11 @@ ezgl::rectangle get_noc_connection_marker_bbox(const t_logical_block_type_ptr no double half_of_connection_marker_bbox_side_length = connection_marker_bbox_side_length / 2; // calculate bottom left corner coordinate of marker - ezgl::point2d connection_marker_origin_pt(noc_router_bbox_center.x - half_of_connection_marker_bbox_side_length, noc_router_bbox_center.y - half_of_connection_marker_bbox_side_length); + ezgl::point2d connection_marker_origin_pt(noc_router_bbox_center.x - half_of_connection_marker_bbox_side_length, + noc_router_bbox_center.y - half_of_connection_marker_bbox_side_length); // calculate upper right corner coordinate of marker - ezgl::point2d connection_marker_top_right_pt(noc_router_bbox_center.x + half_of_connection_marker_bbox_side_length, noc_router_bbox_center.y + half_of_connection_marker_bbox_side_length); + ezgl::point2d connection_marker_top_right_pt(noc_router_bbox_center.x + half_of_connection_marker_bbox_side_length, + noc_router_bbox_center.y + half_of_connection_marker_bbox_side_length); ezgl::rectangle connection_marker_bbox(connection_marker_origin_pt, connection_marker_top_right_pt); @@ -170,7 +172,9 @@ ezgl::rectangle get_noc_connection_marker_bbox(const t_logical_block_type_ptr no /* * This function draws the markers inside the noc router tiles. This marker represents a connection that is an intersection points between multiple links. */ -void draw_noc_connection_marker(ezgl::renderer* g, const vtr::vector& router_list, ezgl::rectangle connection_marker_bbox) { +void draw_noc_connection_marker(ezgl::renderer* g, + const vtr::vector& router_list, + ezgl::rectangle connection_marker_bbox) { t_draw_coords* draw_coords = get_draw_coords_vars(); t_draw_state* draw_state = get_draw_state_vars(); @@ -192,7 +196,9 @@ void draw_noc_connection_marker(ezgl::renderer* g, const vtr::vectortile_x[router_grid_position_x], draw_coords->tile_y[router_grid_position_y]); + updated_connection_marker_bbox + = connection_marker_bbox + + ezgl::point2d(draw_coords->tile_x[router_grid_position_x], draw_coords->tile_y[router_grid_position_y]); // draw the marker g->fill_rectangle(updated_connection_marker_bbox); @@ -245,8 +251,10 @@ void draw_noc_links(ezgl::renderer* g, // get half the width and height of the noc connection marker // we will shift the links based on these parameters since the links will be drawn at the boundaries of connection marker instead of the center - double noc_connection_marker_quarter_width = (noc_connection_marker_bbox.center().x - noc_connection_marker_bbox.bottom_left().x) / 2; - double noc_connection_marker_quarter_height = (noc_connection_marker_bbox.center().y - noc_connection_marker_bbox.bottom_left().y) / 2; + double noc_connection_marker_quarter_width + = (noc_connection_marker_bbox.center().x - noc_connection_marker_bbox.bottom_left().x) / 2; + double noc_connection_marker_quarter_height + = (noc_connection_marker_bbox.center().y - noc_connection_marker_bbox.bottom_left().y) / 2; // loop through the links and draw them for (int link = 0; link < (int)noc_link_list.size(); link++) { @@ -262,7 +270,8 @@ void draw_noc_links(ezgl::renderer* g, sink_router_layer_position = router_list[sink_router].get_router_layer_position(); //Get visibility settings of the current NoC link based on the layer visibility settings set by the user - t_draw_layer_display noc_link_visibility = get_element_visibility_and_transparency(source_router_layer_position, sink_router_layer_position); + t_draw_layer_display noc_link_visibility + = get_element_visibility_and_transparency(source_router_layer_position, sink_router_layer_position); if (!noc_link_visibility.visible) { continue; /* Don't Draw link */ @@ -277,13 +286,20 @@ void draw_noc_links(ezgl::renderer* g, // get the initial drawing coordinates of the noc link // it will be drawn from the center of two routers it connects - link_coords.start = draw_coords->get_absolute_clb_bbox(source_router_layer_position, source_router_x_position, source_router_y_position, 0, noc_router_logical_block_type).center(); - link_coords.end = draw_coords->get_absolute_clb_bbox(sink_router_layer_position, sink_router_x_position, sink_router_y_position, 0, noc_router_logical_block_type).center(); + link_coords.start = draw_coords + ->get_absolute_clb_bbox(source_router_layer_position, source_router_x_position, + source_router_y_position, 0, noc_router_logical_block_type) + .center(); + link_coords.end = draw_coords + ->get_absolute_clb_bbox(sink_router_layer_position, sink_router_x_position, + sink_router_y_position, 0, noc_router_logical_block_type) + .center(); // determine the current noc link type link_type = determine_noc_link_type(link_coords.start, link_coords.end); - shift_noc_link(link_coords, list_of_noc_link_shift_directions[link_id], link_type, noc_connection_marker_quarter_width, noc_connection_marker_quarter_height); + shift_noc_link(link_coords, list_of_noc_link_shift_directions[link_id], link_type, + noc_connection_marker_quarter_width, noc_connection_marker_quarter_height); // set the color to draw the current link g->set_color(noc_link_colors[link_id], noc_link_visibility.alpha); @@ -366,7 +382,9 @@ NocLinkType determine_noc_link_type(ezgl::point2d link_start_point, ezgl::point2 // get the magnitude of the link double link_magnitude = sqrt(pow(x_coord_end - x_coord_start, 2.0) + pow(y_coord_end - y_coord_start, 2.0)); // get the dot product of the two connecting line - double dot_product_of_link_and_horizontal_line = (x_coord_end - x_coord_start) * (x_coord_horizontal_end - x_coord_horizontal_start) + (y_coord_end - y_coord_start) * (y_coord_horizontal_end - y_coord_horizontal_start); + double dot_product_of_link_and_horizontal_line + = (x_coord_end - x_coord_start) * (x_coord_horizontal_end - x_coord_horizontal_start) + + (y_coord_end - y_coord_start) * (y_coord_horizontal_end - y_coord_horizontal_start); // calculate the angle double angle = acos(dot_product_of_link_and_horizontal_line / (link_magnitude * HORIZONTAL_LINE_LENGTH)); @@ -394,7 +412,11 @@ NocLinkType determine_noc_link_type(ezgl::point2d link_start_point, ezgl::point2 return result; } -void shift_noc_link(noc_link_draw_coords& link_coords, NocLinkShift link_shift_direction, NocLinkType link_type, double noc_connection_marker_quarter_width, double noc_connection_marker_quarter_height) { +void shift_noc_link(noc_link_draw_coords& link_coords, + NocLinkShift link_shift_direction, + NocLinkType link_type, + double noc_connection_marker_quarter_width, + double noc_connection_marker_quarter_height) { // determine the type of link and based on that shift the link accordingly /* * Vertical line: shift the link left and right and the distance is equal to half the width of the connection marker diff --git a/vpr/src/draw/draw_noc.h b/vpr/src/draw/draw_noc.h index f3de82a3e3b..546716f911f 100644 --- a/vpr/src/draw/draw_noc.h +++ b/vpr/src/draw/draw_noc.h @@ -29,7 +29,7 @@ #ifndef NO_GRAPHICS -# include "draw.h" +#include "draw.h" // defines the area of the marker that represents connection points between links // area is equivalent to the %x of the area of the router @@ -153,7 +153,9 @@ ezgl::rectangle get_noc_connection_marker_bbox(const t_logical_block_type_ptr no * @param connection_marker_bbox The coordinates of the marker to draw within * the center of a NoC router tile. */ -void draw_noc_connection_marker(ezgl::renderer* g, const vtr::vector& router_list, ezgl::rectangle connection_marker_bbox); +void draw_noc_connection_marker(ezgl::renderer* g, + const vtr::vector& router_list, + ezgl::rectangle connection_marker_bbox); /** * @brief Displays the NoC links on the drawing canvas. The links are @@ -239,7 +241,11 @@ NocLinkType determine_noc_link_type(ezgl::point2d link_start_point, ezgl::point2 * @param noc_connection_marker_quarter_height The distance to shift the NoC * link in the vertical direction. */ -void shift_noc_link(noc_link_draw_coords& link_coords, NocLinkShift link_shift_direction, NocLinkType link_type, double noc_connection_marker_quarter_width, double noc_connection_marker_quarter_height); +void shift_noc_link(noc_link_draw_coords& link_coords, + NocLinkShift link_shift_direction, + NocLinkType link_type, + double noc_connection_marker_quarter_width, + double noc_connection_marker_quarter_height); #endif diff --git a/vpr/src/draw/draw_rr.cpp b/vpr/src/draw/draw_rr.cpp index 02645f6baf5..ec923c0158f 100644 --- a/vpr/src/draw/draw_rr.cpp +++ b/vpr/src/draw/draw_rr.cpp @@ -35,29 +35,29 @@ #include "move_utils.h" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif /****************************** Define Macros *******************************/ -# define DEFAULT_RR_NODE_COLOR ezgl::BLACK +#define DEFAULT_RR_NODE_COLOR ezgl::BLACK //The arrow head position for turning/straight-thru connections in a switch box constexpr float SB_EDGE_TURN_ARROW_POSITION = 0.2; @@ -143,8 +143,8 @@ void draw_rr(ezgl::renderer* g) { break; default: - vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in draw_rr: Unexpected rr_node type: %d.\n", rr_graph.node_type(inode)); + vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, "in draw_rr: Unexpected rr_node type: %d.\n", + rr_graph.node_type(inode)); } } @@ -243,7 +243,8 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { if (switchpoint_min == 0) { if (dir != Direction::BIDIR) { //Draw a mux at the start of each wire, labelled with it's size (#inputs) - draw_mux_with_size(start, mux_dir, WIRE_DRAWING_WIDTH, rr_graph.node_fan_in(inode), transparency_factor, g); + draw_mux_with_size(start, mux_dir, WIRE_DRAWING_WIDTH, rr_graph.node_fan_in(inode), transparency_factor, + g); } } else { //Draw arrows and label with switch point @@ -255,8 +256,9 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { draw_triangle_along_line(g, arrow_loc_min, start, end); g->set_color(text_color, transparency_factor); - ezgl::rectangle bbox(ezgl::point2d(arrow_loc_min.x - DEFAULT_ARROW_SIZE / 2, arrow_loc_min.y - DEFAULT_ARROW_SIZE / 4), - ezgl::point2d(arrow_loc_min.x + DEFAULT_ARROW_SIZE / 2, arrow_loc_min.y + DEFAULT_ARROW_SIZE / 4)); + ezgl::rectangle bbox( + ezgl::point2d(arrow_loc_min.x - DEFAULT_ARROW_SIZE / 2, arrow_loc_min.y - DEFAULT_ARROW_SIZE / 4), + ezgl::point2d(arrow_loc_min.x + DEFAULT_ARROW_SIZE / 2, arrow_loc_min.y + DEFAULT_ARROW_SIZE / 4)); ezgl::point2d center = bbox.center(); g->draw_text(center, std::to_string(switchpoint_min), bbox.width(), bbox.height()); @@ -269,7 +271,8 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { if (switchpoint_max == 0) { if (dir != Direction::BIDIR) { //Draw a mux at the start of each wire, labelled with it's size (#inputs) - draw_mux_with_size(start, mux_dir, WIRE_DRAWING_WIDTH, rr_graph.node_fan_in(inode), transparency_factor, g); + draw_mux_with_size(start, mux_dir, WIRE_DRAWING_WIDTH, rr_graph.node_fan_in(inode), transparency_factor, + g); } } else { //Draw arrows and label with switch point @@ -281,8 +284,9 @@ void draw_rr_chan(RRNodeId inode, const ezgl::color color, ezgl::renderer* g) { draw_triangle_along_line(g, arrow_loc_max, start, end); g->set_color(text_color, transparency_factor); - ezgl::rectangle bbox(ezgl::point2d(arrow_loc_max.x - DEFAULT_ARROW_SIZE / 2, arrow_loc_max.y - DEFAULT_ARROW_SIZE / 4), - ezgl::point2d(arrow_loc_max.x + DEFAULT_ARROW_SIZE / 2, arrow_loc_max.y + DEFAULT_ARROW_SIZE / 4)); + ezgl::rectangle bbox( + ezgl::point2d(arrow_loc_max.x - DEFAULT_ARROW_SIZE / 2, arrow_loc_max.y - DEFAULT_ARROW_SIZE / 4), + ezgl::point2d(arrow_loc_max.x + DEFAULT_ARROW_SIZE / 2, arrow_loc_max.y + DEFAULT_ARROW_SIZE / 4)); ezgl::point2d center = bbox.center(); g->draw_text(center, std::to_string(switchpoint_max), bbox.width(), bbox.height()); @@ -311,7 +315,8 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { from_type = rr_graph.node_type(rr_node); if ((draw_state->draw_rr_toggle == DRAW_NODES_RR) - || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR && (from_type == OPIN || from_type == SOURCE || from_type == IPIN)) + || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_RR + && (from_type == OPIN || from_type == SOURCE || from_type == IPIN)) || (draw_state->draw_rr_toggle == DRAW_NODES_SBOX_CBOX_RR && (from_type == SOURCE || from_type == IPIN))) { return; /* Nothing to draw. */ } @@ -356,8 +361,8 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { break; default: vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", - inode, from_type, to_node, to_type); + "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", inode, + from_type, to_node, to_type); break; } break; @@ -369,7 +374,8 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { break; } - if (draw_state->draw_rr_node[to_node].node_highlighted && draw_state->draw_rr_node[inode].color == DEFAULT_RR_NODE_COLOR) { + if (draw_state->draw_rr_node[to_node].node_highlighted + && draw_state->draw_rr_node[inode].color == DEFAULT_RR_NODE_COLOR) { // If the IPIN is clicked on, draw connection to all the CHANX // wire segments fanning into the pin. If a CHANX wire is clicked // on, draw only the connection between that wire and the IPIN, with @@ -403,8 +409,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { g->set_color(blk_DARKGREEN, transparency_factor); } switch_type = rr_graph.edge_switch(rr_node, iedge); - draw_chanx_to_chanx_edge(rr_node, RRNodeId(to_node), - switch_type, g); + draw_chanx_to_chanx_edge(rr_node, RRNodeId(to_node), switch_type, g); break; case CHANY: @@ -420,14 +425,13 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { g->set_color(blk_DARKGREEN, transparency_factor); } switch_type = rr_graph.edge_switch(rr_node, iedge); - draw_chanx_to_chany_edge(inode, to_node, - FROM_X_TO_Y, switch_type, g); + draw_chanx_to_chany_edge(inode, to_node, FROM_X_TO_Y, switch_type, g); break; default: vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", - inode, from_type, to_node, to_type); + "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", inode, + from_type, to_node, to_type); break; } break; @@ -439,7 +443,8 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { break; } - if (draw_state->draw_rr_node[to_node].node_highlighted && draw_state->draw_rr_node[inode].color == DEFAULT_RR_NODE_COLOR) { + if (draw_state->draw_rr_node[to_node].node_highlighted + && draw_state->draw_rr_node[inode].color == DEFAULT_RR_NODE_COLOR) { // If the IPIN is clicked on, draw connection to all the CHANY // wire segments fanning into the pin. If a CHANY wire is clicked // on, draw only the connection between that wire and the IPIN, with @@ -473,8 +478,7 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { g->set_color(blk_DARKGREEN, transparency_factor); } switch_type = rr_graph.edge_switch(rr_node, iedge); - draw_chanx_to_chany_edge(to_node, inode, - FROM_Y_TO_X, switch_type, g); + draw_chanx_to_chany_edge(to_node, inode, FROM_Y_TO_X, switch_type, g); break; case CHANY: @@ -491,14 +495,13 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { g->set_color(blk_DARKGREEN, transparency_factor); } switch_type = rr_graph.edge_switch(rr_node, iedge); - draw_chany_to_chany_edge(rr_node, RRNodeId(to_node), - switch_type, g); + draw_chany_to_chany_edge(rr_node, RRNodeId(to_node), switch_type, g); break; default: vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", - inode, from_type, to_node, to_type); + "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", inode, + from_type, to_node, to_type); break; } break; @@ -511,8 +514,8 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { default: vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", - inode, from_type, to_node, to_type); + "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", inode, + from_type, to_node, to_type); break; } break; @@ -525,15 +528,14 @@ void draw_rr_edges(RRNodeId inode, ezgl::renderer* g) { default: vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", - inode, from_type, to_node, to_type); + "in draw_rr_edges: node %d (type: %d) connects to node %d (type: %d).\n", inode, + from_type, to_node, to_type); break; } break; default: /* from_type */ - vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "draw_rr_edges called with node %d of type %d.\n", - inode, from_type); + vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, "draw_rr_edges called with node %d of type %d.\n", inode, + from_type); break; } } /* End of for each edge loop */ @@ -568,13 +570,11 @@ void draw_rr_pin(RRNodeId inode, const ezgl::color& color, ezgl::renderer* g) { continue; } draw_get_rr_pin_coords(inode, &xcen, &ycen, pin_side); - g->fill_rectangle( - {xcen - draw_coords->pin_size, ycen - draw_coords->pin_size}, - {xcen + draw_coords->pin_size, ycen + draw_coords->pin_size}); + g->fill_rectangle({xcen - draw_coords->pin_size, ycen - draw_coords->pin_size}, + {xcen + draw_coords->pin_size, ycen + draw_coords->pin_size}); sprintf(str, "%d", ipin); g->set_color(ezgl::BLACK, transparency_factor); - g->draw_text({xcen, ycen}, str, 2 * draw_coords->pin_size, - 2 * draw_coords->pin_size); + g->draw_text({xcen, ycen}, str, 2 * draw_coords->pin_size, 2 * draw_coords->pin_size); g->set_color(color, transparency_factor); } } @@ -595,15 +595,12 @@ void draw_rr_src_sink(RRNodeId inode, ezgl::color color, ezgl::renderer* g) { g->set_color(color, transparency_factor); - g->fill_rectangle( - {xcen - draw_coords->pin_size, ycen - draw_coords->pin_size}, - {xcen + draw_coords->pin_size, ycen + draw_coords->pin_size}); + g->fill_rectangle({xcen - draw_coords->pin_size, ycen - draw_coords->pin_size}, + {xcen + draw_coords->pin_size, ycen + draw_coords->pin_size}); - std::string str = vtr::string_fmt("%d", - rr_graph.node_class_num(inode)); + std::string str = vtr::string_fmt("%d", rr_graph.node_class_num(inode)); g->set_color(ezgl::BLACK, transparency_factor); - g->draw_text({xcen, ycen}, str.c_str(), 2 * draw_coords->pin_size, - 2 * draw_coords->pin_size); + g->draw_text({xcen, ycen}, str.c_str(), 2 * draw_coords->pin_size, 2 * draw_coords->pin_size); g->set_color(color, transparency_factor); } @@ -613,9 +610,8 @@ void draw_get_rr_src_sink_coords(const t_rr_node& node, float* xcen, float* ycen auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; RRNodeId rr_node = node.id(); - t_physical_tile_type_ptr tile_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(rr_node), - rr_graph.node_ylow(rr_node), - rr_graph.node_layer(rr_node)}); + t_physical_tile_type_ptr tile_type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), rr_graph.node_layer(rr_node)}); //Number of classes (i.e. src/sinks) we need to draw float num_class = tile_type->class_inf.size(); @@ -642,7 +638,13 @@ void draw_get_rr_src_sink_coords(const t_rr_node& node, float* xcen, float* ycen *ycen = yc + ypos * draw_coords->get_tile_height(); } -void draw_rr_switch(float from_x, float from_y, float to_x, float to_y, bool buffered, bool configurable, ezgl::renderer* g) { +void draw_rr_switch(float from_x, + float from_y, + float to_x, + float to_y, + bool buffered, + bool configurable, + ezgl::renderer* g) { /* Draws a buffer (triangle) or pass transistor (circle) on the edge * * connecting from to to, depending on the status of buffered. The drawing * * is closest to the from_node, since it reflects the switch type of from. */ @@ -659,18 +661,15 @@ void draw_rr_switch(float from_x, float from_y, float to_x, float to_y, bool buf } else { /* Buffer */ if (from_x == to_x || from_y == to_y) { //Straight connection - draw_triangle_along_line(g, {from_x, from_y}, {to_x, to_y}, - SB_EDGE_STRAIGHT_ARROW_POSITION); + draw_triangle_along_line(g, {from_x, from_y}, {to_x, to_y}, SB_EDGE_STRAIGHT_ARROW_POSITION); } else { //Turn connection - draw_triangle_along_line(g, {from_x, from_y}, {to_x, to_y}, - SB_EDGE_TURN_ARROW_POSITION); + draw_triangle_along_line(g, {from_x, from_y}, {to_x, to_y}, SB_EDGE_TURN_ARROW_POSITION); } } } -void draw_expand_non_configurable_rr_nodes_recurr(RRNodeId from_node, - std::set& expanded_nodes) { +void draw_expand_non_configurable_rr_nodes_recurr(RRNodeId from_node, std::set& expanded_nodes) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; expanded_nodes.insert(from_node); @@ -680,8 +679,7 @@ void draw_expand_non_configurable_rr_nodes_recurr(RRNodeId from_node, RRNodeId to_node = rr_graph.edge_sink_node(from_node, iedge); if (!edge_configurable && !expanded_nodes.count(to_node)) { - draw_expand_non_configurable_rr_nodes_recurr(to_node, - expanded_nodes); + draw_expand_non_configurable_rr_nodes_recurr(to_node, expanded_nodes); } } } @@ -725,7 +723,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { draw_get_rr_pin_coords(inode, &xcen, &ycen, iside); // Now check if we clicked on this pin - if (click_x >= xcen - draw_coords->pin_size && click_x <= xcen + draw_coords->pin_size && click_y >= ycen - draw_coords->pin_size && click_y <= ycen + draw_coords->pin_size) { + if (click_x >= xcen - draw_coords->pin_size && click_x <= xcen + draw_coords->pin_size + && click_y >= ycen - draw_coords->pin_size && click_y <= ycen + draw_coords->pin_size) { hit_node = inode; return hit_node; } @@ -739,7 +738,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { draw_get_rr_src_sink_coords(rr_graph.rr_nodes()[size_t(inode)], &xcen, &ycen); // Now check if we clicked on this pin - if (click_x >= xcen - draw_coords->pin_size && click_x <= xcen + draw_coords->pin_size && click_y >= ycen - draw_coords->pin_size && click_y <= ycen + draw_coords->pin_size) { + if (click_x >= xcen - draw_coords->pin_size && click_x <= xcen + draw_coords->pin_size + && click_y >= ycen - draw_coords->pin_size && click_y <= ycen + draw_coords->pin_size) { hit_node = inode; return hit_node; } @@ -752,7 +752,8 @@ RRNodeId draw_check_rr_node_hit(float click_x, float click_y) { // Check if we clicked on this wire, with 30% // tolerance outside its boundary const float tolerance = 0.3; - if (click_x >= bound_box.left() - tolerance && click_x <= bound_box.right() + tolerance && click_y >= bound_box.bottom() - tolerance && click_y <= bound_box.top() + tolerance) { + if (click_x >= bound_box.left() - tolerance && click_x <= bound_box.right() + tolerance + && click_y >= bound_box.bottom() - tolerance && click_y <= bound_box.top() + tolerance) { hit_node = inode; return hit_node; } @@ -804,13 +805,16 @@ void draw_rr_costs(ezgl::renderer* g, const vtr::vector& rr_cos float min_cost = std::numeric_limits::infinity(); float max_cost = -min_cost; for (RRNodeId inode : rr_graph.nodes()) { - if (std::isnan(rr_costs[inode])) continue; + if (std::isnan(rr_costs[inode])) + continue; min_cost = std::min(min_cost, rr_costs[inode]); max_cost = std::max(max_cost, rr_costs[inode]); } - if (min_cost == std::numeric_limits::infinity()) min_cost = 0; - if (max_cost == -std::numeric_limits::infinity()) max_cost = 0; + if (min_cost == std::numeric_limits::infinity()) + min_cost = 0; + if (max_cost == -std::numeric_limits::infinity()) + max_cost = 0; std::unique_ptr cmap = std::make_unique(min_cost, max_cost); //Draw the nodes in ascending order of value, this ensures high valued nodes @@ -826,7 +830,8 @@ void draw_rr_costs(ezgl::renderer* g, const vtr::vector& rr_cos for (RRNodeId inode : nodes) { float cost = rr_costs[inode]; - if (std::isnan(cost)) continue; + if (std::isnan(cost)) + continue; int transparency_factor = get_rr_node_transparency(inode); @@ -842,22 +847,26 @@ void draw_rr_costs(ezgl::renderer* g, const vtr::vector& rr_cos case CHANX: //fallthrough case CHANY: draw_rr_chan(inode, color, g); - if (with_edges) draw_rr_edges(inode, g); + if (with_edges) + draw_rr_edges(inode, g); break; case IPIN: //fallthrough draw_rr_pin(inode, color, g); - if (with_edges) draw_rr_edges(inode, g); + if (with_edges) + draw_rr_edges(inode, g); break; case OPIN: draw_rr_pin(inode, color, g); - if (with_edges) draw_rr_edges(inode, g); + if (with_edges) + draw_rr_edges(inode, g); break; case SOURCE: case SINK: color.alpha *= 0.8; draw_rr_src_sink(inode, color, g); - if (with_edges) draw_rr_edges(inode, g); + if (with_edges) + draw_rr_edges(inode, g); break; default: break; @@ -901,8 +910,7 @@ void draw_get_rr_pin_coords(const t_rr_node& node, float* xcen, float* ycen, con * we can treat as a block box for this step */ /* For each sub_tile we need and extra padding space */ - step = (float)(draw_coords->get_tile_width()) - / (float)(type->num_pins + type->capacity); + step = (float)(draw_coords->get_tile_width()) / (float)(type->num_pins + type->capacity); offset = (ipin + k + 1) * step; switch (pin_side) { @@ -925,8 +933,7 @@ void draw_get_rr_pin_coords(const t_rr_node& node, float* xcen, float* ycen, con break; default: - vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in draw_get_rr_pin_coords: Unexpected side %s.\n", + vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, "in draw_get_rr_pin_coords: Unexpected side %s.\n", TOTAL_2D_SIDE_STRINGS[pin_side]); break; } diff --git a/vpr/src/draw/draw_rr.h b/vpr/src/draw/draw_rr.h index 7ed40ffd61b..74a3b570170 100644 --- a/vpr/src/draw/draw_rr.h +++ b/vpr/src/draw/draw_rr.h @@ -32,20 +32,20 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" -# include "draw_color.h" -# include "search_bar.h" -# include "draw_debug.h" -# include "manual_moves.h" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" +#include "draw_color.h" +#include "search_bar.h" +#include "draw_debug.h" +#include "manual_moves.h" -# include "rr_graph.h" -# include "route_utilization.h" -# include "place_macro.h" -# include "buttons.h" +#include "rr_graph.h" +#include "route_utilization.h" +#include "place_macro.h" +#include "buttons.h" /* Draws the routing resources that exist in the FPGA, if the user wants * * them drawn. */ @@ -68,9 +68,14 @@ void draw_get_rr_src_sink_coords(const t_rr_node& node, float* xcen, float* ycen /* Draws a buffer (triangle) or pass transistor (circle) on the edge * connecting from to to, depending on the status of buffered. The drawing * is closest to the from_node, since it reflects the switch type of from. */ -void draw_rr_switch(float from_x, float from_y, float to_x, float to_y, bool buffered, bool switch_configurable, ezgl::renderer* g); -void draw_expand_non_configurable_rr_nodes_recurr(RRNodeId from_node, - std::set& expanded_nodes); +void draw_rr_switch(float from_x, + float from_y, + float to_x, + float to_y, + bool buffered, + bool switch_configurable, + ezgl::renderer* g); +void draw_expand_non_configurable_rr_nodes_recurr(RRNodeId from_node, std::set& expanded_nodes); /* This is a helper function for highlight_rr_nodes(). It determines whether * a routing resource has been clicked on by computing a bounding box for that diff --git a/vpr/src/draw/draw_rr_edges.cpp b/vpr/src/draw/draw_rr_edges.cpp index 274e02e0fb3..d46eaeaa6a6 100644 --- a/vpr/src/draw/draw_rr_edges.cpp +++ b/vpr/src/draw/draw_rr_edges.cpp @@ -33,26 +33,26 @@ #include "move_utils.h" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif void draw_chany_to_chany_edge(RRNodeId from_node, RRNodeId to_node, short switch_type, ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); @@ -104,8 +104,7 @@ void draw_chany_to_chany_edge(RRNodeId from_node, RRNodeId to_node, short switch y2 = to_chan.bottom(); /* since no U-turns from_tracks must be INC as well */ - y1 = draw_coords->tile_y[to_ylow - 1] - + draw_coords->get_tile_width(); + y1 = draw_coords->tile_y[to_ylow - 1] + draw_coords->get_tile_width(); } else { /* DEC wire starts at top edge */ y2 = to_chan.top(); @@ -114,11 +113,9 @@ void draw_chany_to_chany_edge(RRNodeId from_node, RRNodeId to_node, short switch } else { if (to_ylow < from_ylow) { /* Draw from bottom edge of one to other. */ y1 = from_chan.bottom(); - y2 = draw_coords->tile_y[from_ylow - 1] - + draw_coords->get_tile_width(); + y2 = draw_coords->tile_y[from_ylow - 1] + draw_coords->get_tile_width(); } else if (from_ylow < to_ylow) { - y1 = draw_coords->tile_y[to_ylow - 1] - + draw_coords->get_tile_width(); + y1 = draw_coords->tile_y[to_ylow - 1] + draw_coords->get_tile_width(); y2 = to_chan.bottom(); } else if (to_yhigh > from_yhigh) { /* Draw from top edge of one to other. */ y1 = from_chan.top(); @@ -136,10 +133,8 @@ void draw_chany_to_chany_edge(RRNodeId from_node, RRNodeId to_node, short switch /* UDSD Modification by WMF End */ g->draw_line({x1, y1}, {x2, y2}); - if (draw_state->draw_rr_toggle == DRAW_ALL_RR - || draw_state->draw_rr_node[from_node].node_highlighted) { - draw_rr_switch(x1, y1, x2, y2, - rr_graph.rr_switch_inf(RRSwitchId(switch_type)).buffered(), + if (draw_state->draw_rr_toggle == DRAW_ALL_RR || draw_state->draw_rr_node[from_node].node_highlighted) { + draw_rr_switch(x1, y1, x2, y2, rr_graph.rr_switch_inf(RRSwitchId(switch_type)).buffered(), rr_graph.rr_switch_inf(RRSwitchId(switch_type)).configurable(), g); } } @@ -195,8 +190,7 @@ void draw_chanx_to_chanx_edge(RRNodeId from_node, RRNodeId to_node, short switch VTR_ASSERT(from_xlow < to_xlow); x2 = to_chan.left(); /* since no U-turns from_tracks must be INC as well */ - x1 = draw_coords->tile_x[to_xlow - 1] - + draw_coords->get_tile_width(); + x1 = draw_coords->tile_x[to_xlow - 1] + draw_coords->get_tile_width(); } else { /* DEC wire starts at rightmost edge */ VTR_ASSERT(from_xhigh > to_xhigh); x2 = to_chan.right(); @@ -205,11 +199,9 @@ void draw_chanx_to_chanx_edge(RRNodeId from_node, RRNodeId to_node, short switch } else { if (to_xlow < from_xlow) { /* Draw from left edge of one to other */ x1 = from_chan.left(); - x2 = draw_coords->tile_x[from_xlow - 1] - + draw_coords->get_tile_width(); + x2 = draw_coords->tile_x[from_xlow - 1] + draw_coords->get_tile_width(); } else if (from_xlow < to_xlow) { - x1 = draw_coords->tile_x[to_xlow - 1] - + draw_coords->get_tile_width(); + x1 = draw_coords->tile_x[to_xlow - 1] + draw_coords->get_tile_width(); x2 = to_chan.left(); } /* The following then is executed when from_xlow == to_xlow */ @@ -228,15 +220,17 @@ void draw_chanx_to_chanx_edge(RRNodeId from_node, RRNodeId to_node, short switch g->draw_line({x1, y1}, {x2, y2}); - if (draw_state->draw_rr_toggle == DRAW_ALL_RR - || draw_state->draw_rr_node[from_node].node_highlighted) { - draw_rr_switch(x1, y1, x2, y2, - rr_graph.rr_switch_inf(RRSwitchId(switch_type)).buffered(), + if (draw_state->draw_rr_toggle == DRAW_ALL_RR || draw_state->draw_rr_node[from_node].node_highlighted) { + draw_rr_switch(x1, y1, x2, y2, rr_graph.rr_switch_inf(RRSwitchId(switch_type)).buffered(), rr_graph.rr_switch_inf(RRSwitchId(switch_type)).configurable(), g); } } -void draw_chanx_to_chany_edge(RRNodeId chanx_node, RRNodeId chany_node, enum e_edge_dir edge_dir, short switch_type, ezgl::renderer* g) { +void draw_chanx_to_chany_edge(RRNodeId chanx_node, + RRNodeId chany_node, + enum e_edge_dir edge_dir, + short switch_type, + ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); t_draw_coords* draw_coords = get_draw_coords_vars(); auto& device_ctx = g_vpr_ctx.device(); @@ -296,15 +290,12 @@ void draw_chanx_to_chany_edge(RRNodeId chanx_node, RRNodeId chany_node, enum e_e g->draw_line({x1, y1}, {x2, y2}); - if (draw_state->draw_rr_toggle == DRAW_ALL_RR - || draw_state->draw_rr_node[chanx_node].node_highlighted) { + if (draw_state->draw_rr_toggle == DRAW_ALL_RR || draw_state->draw_rr_node[chanx_node].node_highlighted) { if (edge_dir == FROM_X_TO_Y) { - draw_rr_switch(x1, y1, x2, y2, - rr_graph.rr_switch_inf(RRSwitchId(switch_type)).buffered(), + draw_rr_switch(x1, y1, x2, y2, rr_graph.rr_switch_inf(RRSwitchId(switch_type)).buffered(), rr_graph.rr_switch_inf(RRSwitchId(switch_type)).configurable(), g); } else { - draw_rr_switch(x2, y2, x1, y1, - rr_graph.rr_switch_inf(RRSwitchId(switch_type)).buffered(), + draw_rr_switch(x2, y2, x1, y1, rr_graph.rr_switch_inf(RRSwitchId(switch_type)).buffered(), rr_graph.rr_switch_inf(RRSwitchId(switch_type)).configurable(), g); } } @@ -408,10 +399,8 @@ void draw_pin_to_chan_edge(RRNodeId pin_node, RRNodeId chan_node, ezgl::renderer auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - t_physical_tile_loc tile_loc = { - rr_graph.node_xlow(pin_node), - rr_graph.node_ylow(pin_node), - rr_graph.node_layer(pin_node)}; + t_physical_tile_loc tile_loc + = {rr_graph.node_xlow(pin_node), rr_graph.node_ylow(pin_node), rr_graph.node_layer(pin_node)}; const auto& grid_type = device_ctx.grid.get_physical_type(tile_loc); int width_offset = device_ctx.grid.get_width_offset(tile_loc); @@ -480,7 +469,8 @@ void draw_pin_to_chan_edge(RRNodeId pin_node, RRNodeId chan_node, ezgl::renderer pin_side = LEFT; } /* The inferred side must be in the list of sides of the pin rr_node!!! */ - VTR_ASSERT(pin_candidate_sides.end() != std::find(pin_candidate_sides.begin(), pin_candidate_sides.end(), pin_side)); + VTR_ASSERT(pin_candidate_sides.end() + != std::find(pin_candidate_sides.begin(), pin_candidate_sides.end(), pin_side)); } /* Sanity check */ VTR_ASSERT(NUM_2D_SIDES != pin_side); @@ -552,8 +542,8 @@ void draw_pin_to_chan_edge(RRNodeId pin_node, RRNodeId chan_node, ezgl::renderer break; } default: { - vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, - "in draw_pin_to_chan_edge: Invalid channel node %d.\n", chan_node); + vpr_throw(VPR_ERROR_OTHER, __FILE__, __LINE__, "in draw_pin_to_chan_edge: Invalid channel node %d.\n", + chan_node); } } g->draw_line({x1, y1}, {x2, y2}); diff --git a/vpr/src/draw/draw_rr_edges.h b/vpr/src/draw/draw_rr_edges.h index 9068b31b4fe..96b2feb8855 100644 --- a/vpr/src/draw/draw_rr_edges.h +++ b/vpr/src/draw/draw_rr_edges.h @@ -32,24 +32,28 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" -# include "draw_color.h" -# include "search_bar.h" -# include "draw_debug.h" -# include "manual_moves.h" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" +#include "draw_color.h" +#include "search_bar.h" +#include "draw_debug.h" +#include "manual_moves.h" -# include "rr_graph.h" -# include "route_utilization.h" -# include "place_macro.h" -# include "buttons.h" +#include "rr_graph.h" +#include "route_utilization.h" +#include "place_macro.h" +#include "buttons.h" void draw_chany_to_chany_edge(RRNodeId from_node, RRNodeId to_node, short switch_type, ezgl::renderer* g); void draw_chanx_to_chanx_edge(RRNodeId from_node, RRNodeId to_node, short switch_type, ezgl::renderer* g); -void draw_chanx_to_chany_edge(RRNodeId chanx_node, RRNodeId chany_node, enum e_edge_dir edge_dir, short switch_type, ezgl::renderer* g); +void draw_chanx_to_chany_edge(RRNodeId chanx_node, + RRNodeId chany_node, + enum e_edge_dir edge_dir, + short switch_type, + ezgl::renderer* g); void draw_pin_to_pin(RRNodeId opin, RRNodeId ipin, ezgl::renderer* g); void draw_pin_to_sink(RRNodeId ipin_node, RRNodeId sink_node, ezgl::renderer* g); void draw_source_to_pin(RRNodeId source_node, RRNodeId opin_node, ezgl::renderer* g); diff --git a/vpr/src/draw/draw_searchbar.cpp b/vpr/src/draw/draw_searchbar.cpp index 00a1208bcba..6fe7eaf8e9e 100644 --- a/vpr/src/draw/draw_searchbar.cpp +++ b/vpr/src/draw/draw_searchbar.cpp @@ -35,30 +35,30 @@ #include "move_utils.h" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif /****************************** Define Macros *******************************/ -# define DEFAULT_RR_NODE_COLOR ezgl::BLACK +#define DEFAULT_RR_NODE_COLOR ezgl::BLACK /* This function computes and returns the boundary coordinates of a channel * wire segment. This can be used for drawing a wire or determining if a @@ -74,25 +74,19 @@ ezgl::rectangle draw_get_rr_chan_bbox(RRNodeId inode) { switch (rr_graph.node_type(inode)) { case CHANX: left = draw_coords->tile_x[rr_graph.node_xlow(inode)]; - right = draw_coords->tile_x[rr_graph.node_xhigh(inode)] - + draw_coords->get_tile_width(); - bottom = draw_coords->tile_y[rr_graph.node_ylow(inode)] - + draw_coords->get_tile_width() + right = draw_coords->tile_x[rr_graph.node_xhigh(inode)] + draw_coords->get_tile_width(); + bottom = draw_coords->tile_y[rr_graph.node_ylow(inode)] + draw_coords->get_tile_width() + (1. + rr_graph.node_track_num(inode)); - top = draw_coords->tile_y[rr_graph.node_ylow(inode)] - + draw_coords->get_tile_width() + top = draw_coords->tile_y[rr_graph.node_ylow(inode)] + draw_coords->get_tile_width() + (1. + rr_graph.node_track_num(inode)); break; case CHANY: - left = draw_coords->tile_x[rr_graph.node_xlow(inode)] - + draw_coords->get_tile_width() + left = draw_coords->tile_x[rr_graph.node_xlow(inode)] + draw_coords->get_tile_width() + (1. + rr_graph.node_track_num(inode)); - right = draw_coords->tile_x[rr_graph.node_xlow(inode)] - + draw_coords->get_tile_width() + right = draw_coords->tile_x[rr_graph.node_xlow(inode)] + draw_coords->get_tile_width() + (1. + rr_graph.node_track_num(inode)); bottom = draw_coords->tile_y[rr_graph.node_ylow(inode)]; - top = draw_coords->tile_y[rr_graph.node_yhigh(inode)] - + draw_coords->get_tile_width(); + top = draw_coords->tile_y[rr_graph.node_yhigh(inode)] + draw_coords->get_tile_width(); break; default: // a problem. leave at default value (ie. zeros) @@ -103,8 +97,7 @@ ezgl::rectangle draw_get_rr_chan_bbox(RRNodeId inode) { return bound_box; } -void draw_highlight_blocks_color(t_logical_block_type_ptr type, - ClusterBlockId blk_id) { +void draw_highlight_blocks_color(t_logical_block_type_ptr type, ClusterBlockId blk_id) { t_draw_state* draw_state = get_draw_state_vars(); const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& block_locs = draw_state->get_graphics_blk_loc_registry_ref().block_locs(); @@ -186,12 +179,10 @@ void highlight_nets(char* message, RRNodeId hit_node, bool is_flat) { draw_state->net_color[net_id] = draw_state->draw_rr_node[inode].color; if (inode == hit_node) { std::string orig_msg(message); - sprintf(message, "%s || Net: %zu (%s)", orig_msg.c_str(), - size_t(net_id), + sprintf(message, "%s || Net: %zu (%s)", orig_msg.c_str(), size_t(net_id), cluster_ctx.clb_nlist.net_name(net_id).c_str()); } - } else if (draw_state->draw_rr_node[inode].color - == ezgl::WHITE) { + } else if (draw_state->draw_rr_node[inode].color == ezgl::WHITE) { // If node is de-selected. draw_state->net_color[net_id] = ezgl::BLACK; break; @@ -213,13 +204,11 @@ void draw_highlight_fan_in_fan_out(const std::set& nodes) { for (auto node : nodes) { /* Highlight the fanout nodes in red. */ - for (t_edge_size iedge = 0, l = rr_graph.num_edges(node); - iedge < l; iedge++) { + for (t_edge_size iedge = 0, l = rr_graph.num_edges(node); iedge < l; iedge++) { RRNodeId fanout_node = rr_graph.edge_sink_node(node, iedge); if (draw_state->draw_rr_node[node].color == ezgl::MAGENTA - && draw_state->draw_rr_node[fanout_node].color - != ezgl::MAGENTA) { + && draw_state->draw_rr_node[fanout_node].color != ezgl::MAGENTA) { // If node is highlighted, highlight its fanout draw_state->draw_rr_node[fanout_node].color = DRIVES_IT_COLOR; draw_state->draw_rr_node[fanout_node].node_highlighted = true; @@ -236,13 +225,11 @@ void draw_highlight_fan_in_fan_out(const std::set& nodes) { RRNodeId fanout_node = rr_graph.edge_sink_node(inode, iedge); if (fanout_node == node) { if (draw_state->draw_rr_node[node].color == ezgl::MAGENTA - && draw_state->draw_rr_node[inode].color - != ezgl::MAGENTA) { + && draw_state->draw_rr_node[inode].color != ezgl::MAGENTA) { // If node is highlighted, highlight its fanin draw_state->draw_rr_node[inode].color = ezgl::BLUE; draw_state->draw_rr_node[inode].node_highlighted = true; - } else if (draw_state->draw_rr_node[node].color - == ezgl::WHITE) { + } else if (draw_state->draw_rr_node[node].color == ezgl::WHITE) { // If node is de-highlighted, de-highlight its fanin draw_state->draw_rr_node[inode].color = DEFAULT_RR_NODE_COLOR; draw_state->draw_rr_node[inode].node_highlighted = false; diff --git a/vpr/src/draw/draw_searchbar.h b/vpr/src/draw/draw_searchbar.h index e4dade9bb58..25a135be153 100644 --- a/vpr/src/draw/draw_searchbar.h +++ b/vpr/src/draw/draw_searchbar.h @@ -33,20 +33,20 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" - -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" -# include "draw_color.h" -# include "search_bar.h" -# include "draw_debug.h" -# include "manual_moves.h" - -# include "rr_graph.h" -# include "route_utilization.h" -# include "place_macro.h" -# include "buttons.h" +#include "draw_global.h" + +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" +#include "draw_color.h" +#include "search_bar.h" +#include "draw_debug.h" +#include "manual_moves.h" + +#include "rr_graph.h" +#include "route_utilization.h" +#include "place_macro.h" +#include "buttons.h" /* This function computes and returns the boundary coordinates of a channel * wire segment. This can be used for drawing a wire or determining if a diff --git a/vpr/src/draw/draw_toggle_functions.cpp b/vpr/src/draw/draw_toggle_functions.cpp index 0f69b4c6087..c3da346a7e0 100644 --- a/vpr/src/draw/draw_toggle_functions.cpp +++ b/vpr/src/draw/draw_toggle_functions.cpp @@ -36,26 +36,26 @@ #include "intra_logic_block.h" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif //The arrow head position for turning/straight-thru connections in a switch box constexpr float SB_EDGE_TURN_ARROW_POSITION = 0.2; @@ -74,8 +74,7 @@ void toggle_nets_cbk(GtkComboBox* self, ezgl::application* app) { enum e_draw_nets new_state; t_draw_state* draw_state = get_draw_state_vars(); std::cout << draw_state << std::endl; - gchar* setting = gtk_combo_box_text_get_active_text( - GTK_COMBO_BOX_TEXT(self)); + gchar* setting = gtk_combo_box_text_get_active_text(GTK_COMBO_BOX_TEXT(self)); std::cout << setting << std::endl; // assign corresponding enum value to draw_state->show_nets if (strcmp(setting, "None") == 0) @@ -228,8 +227,7 @@ void toggle_routing_bbox_cbk(GtkSpinButton* self, ezgl::application* app) { draw_state->show_routing_bb = new_value; //redraw - if ((int)(draw_state->show_routing_bb) - == (int)((int)(route_ctx.route_bb.size()) - 1)) { + if ((int)(draw_state->show_routing_bb) == (int)((int)(route_ctx.route_bb.size()) - 1)) { app->update_message(draw_state->default_message); } app->refresh_drawing(); @@ -390,8 +388,7 @@ void toggle_expansion_cost_cbk(GtkComboBoxText* self, ezgl::application* app) { g_free(combo_box_content); draw_state->show_router_expansion_cost = new_state; - if (draw_state->show_router_expansion_cost - == DRAW_NO_ROUTER_EXPANSION_COST) { + if (draw_state->show_router_expansion_cost == DRAW_NO_ROUTER_EXPANSION_COST) { app->update_message(draw_state->default_message); } app->refresh_drawing(); diff --git a/vpr/src/draw/draw_toggle_functions.h b/vpr/src/draw/draw_toggle_functions.h index 7b8330396b7..e6c9114900e 100644 --- a/vpr/src/draw/draw_toggle_functions.h +++ b/vpr/src/draw/draw_toggle_functions.h @@ -38,20 +38,20 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" - -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" -# include "draw_color.h" -# include "search_bar.h" -# include "draw_debug.h" -# include "manual_moves.h" - -# include "rr_graph.h" -# include "route_utilization.h" -# include "place_macro.h" -# include "buttons.h" +#include "draw_global.h" + +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" +#include "draw_color.h" +#include "search_bar.h" +#include "draw_debug.h" +#include "manual_moves.h" + +#include "rr_graph.h" +#include "route_utilization.h" +#include "place_macro.h" +#include "buttons.h" /* Callback function for main.ui created toggle_nets button in ui_setup.cpp. Controls whether or not nets are visualized. * Toggles value of draw_state->show_nets.*/ diff --git a/vpr/src/draw/draw_triangle.cpp b/vpr/src/draw/draw_triangle.cpp index 370868efbbc..8b3af41e4e3 100644 --- a/vpr/src/draw/draw_triangle.cpp +++ b/vpr/src/draw/draw_triangle.cpp @@ -33,26 +33,26 @@ #include "move_utils.h" #ifdef VTR_ENABLE_DEBUG_LOGGING -# include "move_utils.h" +#include "move_utils.h" #endif #ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * * track CPU runtime. */ -# include +#include #else /* For X11. The clock() function in time.h will not output correct time difference * * for X11, because the graphics is processed by the Xserver rather than local CPU, * * which means tracking CPU time will not be the same as the actual wall clock time. * * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include +#include #endif #ifndef NO_GRAPHICS //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif /** * Retrieves the current zoom level based on the visible world and screen dimensions. @@ -88,7 +88,11 @@ double get_scaling_factor_from_zoom(ezgl::renderer* g) { * 'relative_position' is the position of the triangle along the line, * and 'arrow_size' is the size of the triangle. */ -void draw_triangle_along_line(ezgl::renderer* g, ezgl::point2d start, ezgl::point2d end, float relative_position, float arrow_size) { +void draw_triangle_along_line(ezgl::renderer* g, + ezgl::point2d start, + ezgl::point2d end, + float relative_position, + float arrow_size) { VTR_ASSERT(relative_position >= 0. && relative_position <= 1.); float xdelta = end.x - start.x; float ydelta = end.y - start.y; @@ -110,7 +114,11 @@ void draw_triangle_along_line(ezgl::renderer* g, ezgl::point2d start, ezgl::poin * 'g' is the renderer object, 'loc' is the center of the triangle, * 'start' and 'end' are the line segment points, and 'arrow_size' is the size of the triangle. */ -void draw_triangle_along_line(ezgl::renderer* g, ezgl::point2d loc, ezgl::point2d start, ezgl::point2d end, float arrow_size) { +void draw_triangle_along_line(ezgl::renderer* g, + ezgl::point2d loc, + ezgl::point2d start, + ezgl::point2d end, + float arrow_size) { double scaling_factor = get_scaling_factor_from_zoom(g); // Get the current zoom level float scaled_arrow_size = arrow_size / scaling_factor; // Scale arrow size based on zoom level draw_triangle_along_line(g, loc.x, loc.y, start.x, end.x, start.y, end.y, scaled_arrow_size); @@ -128,7 +136,14 @@ void draw_triangle_along_line(ezgl::renderer* g, ezgl::point2d loc, ezgl::point2 * 'y1' and 'y2' are the y-coordinates of the line segment points, * 'arrow_size' is the size of the triangle. */ -void draw_triangle_along_line(ezgl::renderer* g, float xend, float yend, float x1, float x2, float y1, float y2, float arrow_size) { +void draw_triangle_along_line(ezgl::renderer* g, + float xend, + float yend, + float x1, + float x2, + float y1, + float y2, + float arrow_size) { double scaling_factor = get_scaling_factor_from_zoom(g); // Get the current zoom level float switch_rad = arrow_size / 2 / scaling_factor; // Scale switch_rad based on zoom level diff --git a/vpr/src/draw/draw_triangle.h b/vpr/src/draw/draw_triangle.h index 0ddf12218ec..9615fe7f00e 100644 --- a/vpr/src/draw/draw_triangle.h +++ b/vpr/src/draw/draw_triangle.h @@ -33,20 +33,20 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" -# include "draw_color.h" -# include "search_bar.h" -# include "draw_debug.h" -# include "manual_moves.h" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" +#include "draw_color.h" +#include "search_bar.h" +#include "draw_debug.h" +#include "manual_moves.h" -# include "rr_graph.h" -# include "route_utilization.h" -# include "place_macro.h" -# include "buttons.h" +#include "rr_graph.h" +#include "route_utilization.h" +#include "place_macro.h" +#include "buttons.h" /** * Retrieves the current zoom level based on the visible world and screen dimensions. @@ -68,19 +68,34 @@ double get_scaling_factor_from_zoom(ezgl::renderer* g); * A 'relative_position' of 1. draws the triangle centered at 'end'. * Fractional values draw the triangle along the line */ -void draw_triangle_along_line(ezgl::renderer* g, ezgl::point2d start, ezgl::point2d end, float relative_position = 1., float arrow_size = DEFAULT_ARROW_SIZE); +void draw_triangle_along_line(ezgl::renderer* g, + ezgl::point2d start, + ezgl::point2d end, + float relative_position = 1., + float arrow_size = DEFAULT_ARROW_SIZE); /* Draws a triangle with it's center at loc, and of length & width arrow_size, * rotated such that it points in the direction of the directed line segment start -> end. */ -void draw_triangle_along_line(ezgl::renderer* g, ezgl::point2d loc, ezgl::point2d start, ezgl::point2d end, float arrow_size = DEFAULT_ARROW_SIZE); +void draw_triangle_along_line(ezgl::renderer* g, + ezgl::point2d loc, + ezgl::point2d start, + ezgl::point2d end, + float arrow_size = DEFAULT_ARROW_SIZE); /** * Draws a triangle with it's center at (xend, yend), and of length & width arrow_size, * rotated such that it points in the direction of the directed line segment (x1, y1) -> (x2, y2). * Note parameter order. */ -void draw_triangle_along_line(ezgl::renderer* g, float xend, float yend, float x1, float x2, float y1, float y2, float arrow_size = DEFAULT_ARROW_SIZE); +void draw_triangle_along_line(ezgl::renderer* g, + float xend, + float yend, + float x1, + float x2, + float y1, + float y2, + float arrow_size = DEFAULT_ARROW_SIZE); #endif /* NO_GRAPHICS */ #endif /* DRAW_TRIANGLE_H */ diff --git a/vpr/src/draw/draw_types.cpp b/vpr/src/draw/draw_types.cpp index b3909c5fd7c..a1753f393a2 100644 --- a/vpr/src/draw/draw_types.cpp +++ b/vpr/src/draw/draw_types.cpp @@ -1,12 +1,12 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" -# include "draw_types.h" -# include "draw_toggle_functions.h" -# include "globals.h" -# include "vpr_utils.h" -# include "draw.h" -# include +#include "draw_global.h" +#include "draw_types.h" +#include "draw_toggle_functions.h" +#include "globals.h" +#include "vpr_utils.h" +#include "draw.h" +#include /******************************************* * begin t_draw_state function definitions * @@ -35,13 +35,9 @@ void t_draw_state::set_block_color(ClusterBlockId blk, ezgl::color color) { use_default_block_color_[blk] = false; } -void t_draw_state::reset_block_color(ClusterBlockId blk) { - use_default_block_color_[blk] = true; -} +void t_draw_state::reset_block_color(ClusterBlockId blk) { use_default_block_color_[blk] = true; } void t_draw_state::reset_block_colors() { - std::fill(use_default_block_color_.begin(), - use_default_block_color_.end(), - true); + std::fill(use_default_block_color_.begin(), use_default_block_color_.end(), true); } void t_draw_state::reset_nets_congestion_and_rr() { @@ -50,17 +46,13 @@ void t_draw_state::reset_nets_congestion_and_rr() { show_congestion = DRAW_NO_CONGEST; } -bool t_draw_state::showing_sub_blocks() { - return show_blk_internal > 0; -} +bool t_draw_state::showing_sub_blocks() { return show_blk_internal > 0; } /************************************************** * begin t_draw_pb_type_info function definitions * **************************************************/ -ezgl::rectangle t_draw_pb_type_info::get_pb_bbox(const t_pb_graph_node& pb_gnode) { - return get_pb_bbox_ref(pb_gnode); -} +ezgl::rectangle t_draw_pb_type_info::get_pb_bbox(const t_pb_graph_node& pb_gnode) { return get_pb_bbox_ref(pb_gnode); } ezgl::rectangle& t_draw_pb_type_info::get_pb_bbox_ref(const t_pb_graph_node& pb_gnode) { const int pb_gnode_id = get_unique_pb_graph_node_id(&pb_gnode); @@ -77,9 +69,7 @@ t_draw_coords::t_draw_coords() { tile_y = nullptr; } -float t_draw_coords::get_tile_width() { - return tile_width; -} +float t_draw_coords::get_tile_width() { return tile_width; } float t_draw_coords::get_tile_height() { //For now, same as width @@ -91,15 +81,16 @@ ezgl::rectangle t_draw_coords::get_pb_bbox(ClusterBlockId clb_index, const t_pb_ const auto& block_locs = draw_state->get_graphics_blk_loc_registry_ref().block_locs(); const auto& cluster_ctx = g_vpr_ctx.clustering(); - return get_pb_bbox(block_locs[clb_index].loc.layer, - block_locs[clb_index].loc.x, - block_locs[clb_index].loc.y, - block_locs[clb_index].loc.sub_tile, - cluster_ctx.clb_nlist.block_type(clb_index), - pb_gnode); + return get_pb_bbox(block_locs[clb_index].loc.layer, block_locs[clb_index].loc.x, block_locs[clb_index].loc.y, + block_locs[clb_index].loc.sub_tile, cluster_ctx.clb_nlist.block_type(clb_index), pb_gnode); } -ezgl::rectangle t_draw_coords::get_pb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr logical_block_type, const t_pb_graph_node& pb_gnode) { +ezgl::rectangle t_draw_coords::get_pb_bbox(int grid_layer, + int grid_x, + int grid_y, + int sub_block_index, + const t_logical_block_type_ptr logical_block_type, + const t_pb_graph_node& pb_gnode) { const auto& device_ctx = g_vpr_ctx.device(); t_draw_pb_type_info& blk_type_info = this->blk_info.at(logical_block_type->index); @@ -118,7 +109,11 @@ ezgl::rectangle t_draw_coords::get_pb_bbox(int grid_layer, int grid_x, int grid_ return result; } -ezgl::rectangle t_draw_coords::get_pb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr logical_block_type) { +ezgl::rectangle t_draw_coords::get_pb_bbox(int grid_layer, + int grid_x, + int grid_y, + int sub_block_index, + const t_logical_block_type_ptr logical_block_type) { const auto& device_ctx = g_vpr_ctx.device(); t_draw_pb_type_info& blk_type_info = this->blk_info.at(logical_block_type->index); @@ -152,7 +147,8 @@ ezgl::rectangle t_draw_coords::get_absolute_pb_bbox(const ClusterBlockId clb_ind return result; } -ezgl::rectangle t_draw_coords::get_absolute_clb_bbox(const ClusterBlockId clb_index, const t_logical_block_type_ptr block_type) { +ezgl::rectangle t_draw_coords::get_absolute_clb_bbox(const ClusterBlockId clb_index, + const t_logical_block_type_ptr block_type) { t_draw_state* draw_state = get_draw_state_vars(); const auto& block_locs = draw_state->get_graphics_blk_loc_registry_ref().block_locs(); @@ -166,7 +162,11 @@ ezgl::rectangle t_draw_coords::get_absolute_clb_bbox(int grid_layer, int grid_x, return get_pb_bbox(grid_layer, grid_x, grid_y, sub_block_index, pick_logical_type(type)); } -ezgl::rectangle t_draw_coords::get_absolute_clb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr logical_block_type) { +ezgl::rectangle t_draw_coords::get_absolute_clb_bbox(int grid_layer, + int grid_x, + int grid_y, + int sub_block_index, + const t_logical_block_type_ptr logical_block_type) { return get_pb_bbox(grid_layer, grid_x, grid_y, sub_block_index, logical_block_type); } diff --git a/vpr/src/draw/draw_types.h b/vpr/src/draw/draw_types.h index 1f6689e63f4..4bfd9bc159c 100644 --- a/vpr/src/draw/draw_types.h +++ b/vpr/src/draw/draw_types.h @@ -20,20 +20,20 @@ #ifndef NO_GRAPHICS -# include -# include -# include "clustered_netlist.h" -# include "timing_info_fwd.h" -# include "vtr_util.h" -# include "vpr_types.h" -# include "vtr_color_map.h" -# include "vtr_vector.h" -# include "breakpoint.h" -# include "manual_moves.h" - -# include "ezgl/point.hpp" -# include "ezgl/rectangle.hpp" -# include "ezgl/color.hpp" +#include +#include +#include "clustered_netlist.h" +#include "timing_info_fwd.h" +#include "vtr_util.h" +#include "vpr_types.h" +#include "vtr_color_map.h" +#include "vtr_vector.h" +#include "breakpoint.h" +#include "manual_moves.h" + +#include "ezgl/point.hpp" +#include "ezgl/rectangle.hpp" +#include "ezgl/color.hpp" enum e_draw_crit_path { DRAW_NO_CRIT_PATH, @@ -43,11 +43,7 @@ enum e_draw_crit_path { DRAW_CRIT_PATH_ROUTING_DELAYS }; -enum e_draw_nets { - DRAW_NO_NETS = 0, - DRAW_CLUSTER_NETS, - DRAW_PRIMITIVE_NETS -}; +enum e_draw_nets { DRAW_NO_NETS = 0, DRAW_CLUSTER_NETS, DRAW_PRIMITIVE_NETS }; /* Draw rr_graph from less detailed to more detailed * in order to speed up drawing when toggle_rr is clicked @@ -109,16 +105,10 @@ enum e_draw_placement_macros { DRAW_PLACEMENT_MACROS, }; -enum e_draw_net_type { - ALL_NETS, - HIGHLIGHTED -}; +enum e_draw_net_type { ALL_NETS, HIGHLIGHTED }; /* Chanx to chany or vice versa? */ -enum e_edge_dir { - FROM_X_TO_Y, - FROM_Y_TO_X -}; +enum e_edge_dir { FROM_X_TO_Y, FROM_Y_TO_X }; /* * Defines the type of drawings that can be generated for the NoC. @@ -126,11 +116,7 @@ enum e_edge_dir { * DRAW_NOC_LINKS -> display the NoC links and how they are connected to each other * DRAW_NOC_LINK_USAGE -> Display the NoC links (same as DRAW_NOC_LINKS) and color the links based on their bandwidth usage */ -enum e_draw_noc { - DRAW_NO_NOC = 0, - DRAW_NOC_LINKS, - DRAW_NOC_LINK_USAGE -}; +enum e_draw_noc { DRAW_NO_NOC = 0, DRAW_NOC_LINKS, DRAW_NOC_LINK_USAGE }; /* Structure which stores state information of a rr_node. Used * for controling the drawing each rr_node when ROUTING is on screen. @@ -279,7 +265,8 @@ struct t_draw_state { ///@brief Draw state for NOC drawing e_draw_noc draw_noc = DRAW_NO_NOC; - std::shared_ptr noc_usage_color_map = nullptr; // color map used to display noc link bandwidth usage + std::shared_ptr noc_usage_color_map + = nullptr; // color map used to display noc link bandwidth usage ///Tracks autocomplete enabling. bool justEnabled = false; @@ -328,9 +315,7 @@ struct t_draw_state { * @brief Returns the reference to placement block location variables. * @return A const reference to placement block location variables. */ - const BlkLocRegistry& get_graphics_blk_loc_registry_ref() const { - return blk_loc_registry_ref_->get(); - } + const BlkLocRegistry& get_graphics_blk_loc_registry_ref() const { return blk_loc_registry_ref_->get(); } /** * @brief Set the internal reference to NoC link bandwidth utilization array. @@ -420,10 +405,19 @@ struct t_draw_coords { ezgl::rectangle get_pb_bbox(ClusterBlockId clb_index, const t_pb_graph_node& pb_gnode); ///@brief returns bounding box of sub block at given location of given type w. given pb - ezgl::rectangle get_pb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr type, const t_pb_graph_node& pb_gnode); + ezgl::rectangle get_pb_bbox(int grid_layer, + int grid_x, + int grid_y, + int sub_block_index, + const t_logical_block_type_ptr type, + const t_pb_graph_node& pb_gnode); ///@brief returns pb of sub block of given idx/given type at location - ezgl::rectangle get_pb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr type); + ezgl::rectangle get_pb_bbox(int grid_layer, + int grid_x, + int grid_y, + int sub_block_index, + const t_logical_block_type_ptr type); /** * @brief returns a bounding box for the given pb in the given @@ -444,7 +438,11 @@ struct t_draw_coords { * @brief Returns a bounding box for the clb at device_ctx.grid[grid_x][grid_y].blocks[sub_block_index], * of given type even if it is empty. */ - ezgl::rectangle get_absolute_clb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr block_type); + ezgl::rectangle get_absolute_clb_bbox(int grid_layer, + int grid_x, + int grid_y, + int sub_block_index, + const t_logical_block_type_ptr block_type); private: float tile_width; diff --git a/vpr/src/draw/hsl.cpp b/vpr/src/draw/hsl.cpp index b5f8403e724..912dec20ab3 100644 --- a/vpr/src/draw/hsl.cpp +++ b/vpr/src/draw/hsl.cpp @@ -1,8 +1,8 @@ #ifndef NO_GRAPHICS -# include +#include -# include "hsl.h" +#include "hsl.h" float hue2rgb(float v1, float v2, float vH); @@ -42,8 +42,10 @@ hsl color2hsl(ezgl::color color) { else if (b == xmax) H = (2. / 3.) + delta_g - delta_r; - if (H < 0) H += 1; - if (H > 1) H -= 1; + if (H < 0) + H += 1; + if (H > 1) + H -= 1; } hsl val; @@ -82,11 +84,16 @@ ezgl::color hsl2color(hsl in) { } float hue2rgb(float v1, float v2, float vH) { - if (vH < 0) vH += 1.; - if (vH > 1) vH -= 1.; - if ((6 * vH) < 1) return v1 + (v2 - v1) * 6 * vH; - if ((2 * vH) < 1) return v2; - if ((3 * vH) < 2) return v1 + (v2 - v1) * ((2. / 3.) - vH) * 6; + if (vH < 0) + vH += 1.; + if (vH > 1) + vH -= 1.; + if ((6 * vH) < 1) + return v1 + (v2 - v1) * 6 * vH; + if ((2 * vH) < 1) + return v2; + if ((3 * vH) < 2) + return v1 + (v2 - v1) * ((2. / 3.) - vH) * 6; return (v1); } diff --git a/vpr/src/draw/hsl.h b/vpr/src/draw/hsl.h index e7d6d4508d2..589266bc6e4 100644 --- a/vpr/src/draw/hsl.h +++ b/vpr/src/draw/hsl.h @@ -9,7 +9,7 @@ #ifndef NO_GRAPHICS -# include "ezgl/color.hpp" +#include "ezgl/color.hpp" struct hsl { double h; // hue a fraction between 0 and 1 diff --git a/vpr/src/draw/intra_logic_block.cpp b/vpr/src/draw/intra_logic_block.cpp index c1ee67c7590..01bcc441f16 100644 --- a/vpr/src/draw/intra_logic_block.cpp +++ b/vpr/src/draw/intra_logic_block.cpp @@ -20,37 +20,56 @@ #ifndef NO_GRAPHICS -# include -# include -# include - -# include "vtr_assert.h" -# include "vtr_memory.h" - -# include "intra_logic_block.h" -# include "globals.h" -# include "atom_netlist.h" -# include "vpr_utils.h" -# include "draw_global.h" -# include "draw.h" -# include "draw_triangle.h" -# include "draw_color.h" +#include +#include +#include + +#include "vtr_assert.h" +#include "vtr_memory.h" + +#include "intra_logic_block.h" +#include "globals.h" +#include "atom_netlist.h" +#include "vpr_utils.h" +#include "draw_global.h" +#include "draw.h" +#include "draw_triangle.h" +#include "draw_color.h" /************************* Subroutines local to this file. *******************************/ -static void draw_internal_load_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node, float parent_width, float parent_height); +static void draw_internal_load_coords(int type_descrip_index, + t_pb_graph_node* pb_graph_node, + float parent_width, + float parent_height); static int draw_internal_find_max_lvl(const t_pb_type& pb_type); -static void draw_internal_calc_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node, int num_pb_types, int type_index, int num_pb, int pb_index, float parent_width, float parent_height, float* blk_width, float* blk_height); +static void draw_internal_calc_coords(int type_descrip_index, + t_pb_graph_node* pb_graph_node, + int num_pb_types, + int type_index, + int num_pb, + int pb_index, + float parent_width, + float parent_height, + float* blk_width, + float* blk_height); std::vector collect_pb_atoms(const t_pb* pb); void collect_pb_atoms_recurr(const t_pb* pb, std::vector& atoms); -t_pb* highlight_sub_block_helper(const ClusterBlockId clb_index, t_pb* pb, const ezgl::point2d& local_pt, int max_depth); +t_pb* highlight_sub_block_helper(const ClusterBlockId clb_index, + t_pb* pb, + const ezgl::point2d& local_pt, + int max_depth); -# ifndef NO_GRAPHICS -static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* pb, const ezgl::rectangle& parent_bbox, const t_logical_block_type_ptr type, ezgl::renderer* g); +#ifndef NO_GRAPHICS +static void draw_internal_pb(const ClusterBlockId clb_index, + t_pb* pb, + const ezgl::rectangle& parent_bbox, + const t_logical_block_type_ptr type, + ezgl::renderer* g); void draw_atoms_fanin_fanout_flylines(const std::vector& atoms, ezgl::renderer* g); void draw_selected_pb_flylines(ezgl::renderer* g); void draw_one_logical_connection(const AtomPinId src_pin, const AtomPinId sink_pin, ezgl::renderer* g); -# endif /* NO_GRAPHICS */ +#endif /* NO_GRAPHICS */ /************************* Subroutine definitions begin *********************************/ @@ -118,30 +137,23 @@ void draw_internal_init_blk() { // in this case, the clb certainly wont't fit, but this prevents // an out-of-bounds access, and provides some sort of (probably right) // value - top_right = ezgl::point2d( - (draw_coords->tile_x[1] - draw_coords->tile_x[0]) * (width - 1), - (draw_coords->tile_y[1] - draw_coords->tile_y[0]) * (height - 1)); + top_right = ezgl::point2d((draw_coords->tile_x[1] - draw_coords->tile_x[0]) * (width - 1), + (draw_coords->tile_y[1] - draw_coords->tile_y[0]) * (height - 1)); } else { - top_right = ezgl::point2d( - draw_coords->tile_x[width - 1], - draw_coords->tile_y[height - 1]); + top_right = ezgl::point2d(draw_coords->tile_x[width - 1], draw_coords->tile_y[height - 1]); } - top_right += ezgl::point2d( - draw_coords->get_tile_width() / num_sub_tiles, - draw_coords->get_tile_width()); + top_right += ezgl::point2d(draw_coords->get_tile_width() / num_sub_tiles, draw_coords->get_tile_width()); clb_bbox = ezgl::rectangle(bot_left, top_right); - draw_internal_load_coords(type_descriptor_index, pb_graph_head_node, - clb_bbox.width(), clb_bbox.height()); + draw_internal_load_coords(type_descriptor_index, pb_graph_head_node, clb_bbox.width(), clb_bbox.height()); /* Determine the max number of sub_block levels in the FPGA */ - draw_state->max_sub_blk_lvl = std::max(draw_internal_find_max_lvl(*type.pb_type), - draw_state->max_sub_blk_lvl); + draw_state->max_sub_blk_lvl = std::max(draw_internal_find_max_lvl(*type.pb_type), draw_state->max_sub_blk_lvl); } //draw_state->max_sub_blk_lvl -= 1; } -# ifndef NO_GRAPHICS +#ifndef NO_GRAPHICS void draw_internal_draw_subblk(ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); if (!draw_state->show_blk_internal) { @@ -182,7 +194,8 @@ void draw_internal_draw_subblk(ezgl::renderer* g) { if (cluster_ctx.clb_nlist.block_pb(bnum) == nullptr) { continue; } - draw_internal_pb(bnum, cluster_ctx.clb_nlist.block_pb(bnum), ezgl::rectangle({0, 0}, 0, 0), cluster_ctx.clb_nlist.block_type(bnum), g); + draw_internal_pb(bnum, cluster_ctx.clb_nlist.block_pb(bnum), ezgl::rectangle({0, 0}, 0, 0), + cluster_ctx.clb_nlist.block_type(bnum), g); } } } @@ -192,7 +205,7 @@ void draw_internal_draw_subblk(ezgl::renderer* g) { //(inputs: blue, outputs: red, internal: orange) draw_selected_pb_flylines(g); } -# endif /* NO_GRAPHICS */ +#endif /* NO_GRAPHICS */ /* This function traverses through the pb_graph of a certain physical block type and * finds the maximum sub-block levels for that type. @@ -220,7 +233,10 @@ static int draw_internal_find_max_lvl(const t_pb_type& pb_type) { * traverses through the pb_graph for a descriptor_type (given by type_descrip_index), and * calls helper function to compute bounding box values. */ -static void draw_internal_load_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node, float parent_width, float parent_height) { +static void draw_internal_load_coords(int type_descrip_index, + t_pb_graph_node* pb_graph_node, + float parent_width, + float parent_height) { int i, j, k; t_pb_type* pb_type; int num_modes, num_children, num_pb; @@ -246,16 +262,13 @@ static void draw_internal_load_coords(int type_descrip_index, t_pb_graph_node* p for (k = 0; k < num_pb; ++k) { /* Compute bound box for block. Don't call if pb_type is root-level pb. */ - draw_internal_calc_coords(type_descrip_index, - &pb_graph_node->child_pb_graph_nodes[i][j][k], - num_children, j, num_pb, k, - parent_width, parent_height, - &blk_width, &blk_height); + draw_internal_calc_coords(type_descrip_index, &pb_graph_node->child_pb_graph_nodes[i][j][k], + num_children, j, num_pb, k, parent_width, parent_height, &blk_width, + &blk_height); /* Traverse to next level in the pb_graph */ - draw_internal_load_coords(type_descrip_index, - &pb_graph_node->child_pb_graph_nodes[i][j][k], - blk_width, blk_height); + draw_internal_load_coords(type_descrip_index, &pb_graph_node->child_pb_graph_nodes[i][j][k], blk_width, + blk_height); } } } @@ -264,8 +277,16 @@ static void draw_internal_load_coords(int type_descrip_index, t_pb_graph_node* p /* Helper function which computes bounding box values for a sub-block. The coordinates * are relative to the left and bottom corner of the parent block. */ -static void -draw_internal_calc_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node, int num_pb_types, int type_index, int num_pb, int pb_index, float parent_width, float parent_height, float* blk_width, float* blk_height) { +static void draw_internal_calc_coords(int type_descrip_index, + t_pb_graph_node* pb_graph_node, + int num_pb_types, + int type_index, + int num_pb, + int pb_index, + float parent_width, + float parent_height, + float* blk_width, + float* blk_height) { t_draw_state* draw_state = get_draw_state_vars(); const auto& device_ctx = g_vpr_ctx.device(); const auto& grid_blocks = draw_state->get_graphics_blk_loc_registry_ref().grid_blocks(); @@ -285,8 +306,8 @@ draw_internal_calc_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node int capacity = device_ctx.physical_tile_types[type_descrip_index].capacity; // TODO: this is a hack - should be fixed for the layer_num const auto& type = device_ctx.grid.get_physical_type({1, 0, 0}); - if (capacity > 1 && device_ctx.grid.width() > 0 && device_ctx.grid.height() > 0 && grid_blocks.get_usage({1, 0, 0}) != 0 - && type_descrip_index == type->index) { + if (capacity > 1 && device_ctx.grid.width() > 0 && device_ctx.grid.height() > 0 + && grid_blocks.get_usage({1, 0, 0}) != 0 && type_descrip_index == type->index) { // that should test for io blocks, and setting capacity_divisor > 1 // will squish every thing down capacity_divisor = capacity - 1; @@ -326,12 +347,16 @@ draw_internal_calc_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node *blk_height = child_height; } -# ifndef NO_GRAPHICS +#ifndef NO_GRAPHICS /* Helper subroutine to draw all sub-blocks. This function traverses through the pb_graph * which a netlist block can map to, and draws each sub-block inside its parent block. With * each click on the "Blk Internal" button, a new level is shown. */ -static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* pb, const ezgl::rectangle& parent_bbox, const t_logical_block_type_ptr type, ezgl::renderer* g) { +static void draw_internal_pb(const ClusterBlockId clb_index, + t_pb* pb, + const ezgl::rectangle& parent_bbox, + const t_logical_block_type_ptr type, + ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); t_draw_state* draw_state = get_draw_state_vars(); const auto& block_locs = draw_state->get_graphics_blk_loc_registry_ref().block_locs(); @@ -394,33 +419,21 @@ static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* pb, const ezg std::string blk_tag = pb_type_name + pb_name; if (draw_state->draw_block_text) { - g->draw_text( - abs_bbox.center(), - blk_tag.c_str(), - abs_bbox.width(), - abs_bbox.height()); + g->draw_text(abs_bbox.center(), blk_tag.c_str(), abs_bbox.width(), abs_bbox.height()); } } else { // else (ie. has chilren, and isn't at the lowest displayed level) // just label its type, and put it up at the top so we can see it if (draw_state->draw_block_text) { - g->draw_text( - ezgl::point2d(abs_bbox.center_x(), - abs_bbox.top() - (abs_bbox.height()) / 15.0), - pb_type->name, - abs_bbox.width(), - abs_bbox.height()); + g->draw_text(ezgl::point2d(abs_bbox.center_x(), abs_bbox.top() - (abs_bbox.height()) / 15.0), + pb_type->name, abs_bbox.width(), abs_bbox.height()); } } } else { // If child block is not used, label it only by its type if (draw_state->draw_block_text) { - g->draw_text( - abs_bbox.center(), - pb_type->name, - abs_bbox.width(), - abs_bbox.height()); + g->draw_text(abs_bbox.center(), pb_type->name, abs_bbox.width(), abs_bbox.height()); } } @@ -428,8 +441,7 @@ static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* pb, const ezg // return if no children, or this is an unusused pb, // or if going down will be too far down (this one is redundant, but for optimazition) - if (pb->child_pbs == nullptr || pb->name == nullptr - || pb_type->depth == draw_state->show_blk_internal) { + if (pb->child_pbs == nullptr || pb->name == nullptr || pb_type->depth == draw_state->show_blk_internal) { return; } @@ -517,7 +529,7 @@ void draw_atoms_fanin_fanout_flylines(const std::vector& atoms, ezg } } } -# endif /* NO_GRAPHICS */ +#endif /* NO_GRAPHICS */ std::vector collect_pb_atoms(const t_pb* pb) { std::vector atoms; @@ -546,7 +558,7 @@ void collect_pb_atoms_recurr(const t_pb* pb, std::vector& atoms) { } } -# ifndef NO_GRAPHICS +#ifndef NO_GRAPHICS void draw_logical_connections(ezgl::renderer* g) { const t_selected_sub_block_info& sel_subblk_info = get_selected_sub_block_info(); t_draw_state* draw_state = get_draw_state_vars(); @@ -586,7 +598,8 @@ void draw_logical_connections(ezgl::renderer* g) { ClusterBlockId sink_clb = atom_ctx.lookup.atom_clb(sink_blk_id); int sink_layer_num = block_locs[sink_clb].loc.layer; - t_draw_layer_display element_visibility = get_element_visibility_and_transparency(src_layer_num, sink_layer_num); + t_draw_layer_display element_visibility + = get_element_visibility_and_transparency(src_layer_num, sink_layer_num); if (!element_visibility.visible) { continue; /* Don't Draw */ @@ -600,8 +613,11 @@ void draw_logical_connections(ezgl::renderer* g) { g->set_color(DRIVES_IT_COLOR, fmin(transparency_factor, DRIVES_IT_COLOR.alpha * NET_ALPHA)); } else if (src_is_src_of_selected && sel_subblk_info.is_in_selected_subtree(sink_pb_gnode, sink_clb)) { g->set_color(DRIVEN_BY_IT_COLOR, fmin(transparency_factor, DRIVEN_BY_IT_COLOR.alpha * NET_ALPHA)); - } else if (draw_state->show_nets == DRAW_PRIMITIVE_NETS && (draw_state->showing_sub_blocks() || src_clb != sink_clb)) { - g->set_color(ezgl::BLACK, fmin(transparency_factor, ezgl::BLACK.alpha * NET_ALPHA)); // if showing all, draw the other ones in black + } else if (draw_state->show_nets == DRAW_PRIMITIVE_NETS + && (draw_state->showing_sub_blocks() || src_clb != sink_clb)) { + g->set_color(ezgl::BLACK, + fmin(transparency_factor, + ezgl::BLACK.alpha * NET_ALPHA)); // if showing all, draw the other ones in black } else { continue; // not showing all, and not the specified block, so skip } @@ -610,7 +626,7 @@ void draw_logical_connections(ezgl::renderer* g) { } } } -# endif /* NO_GRAPHICS */ +#endif /* NO_GRAPHICS */ /** * Helper function for draw_one_logical_connection(...). @@ -660,7 +676,7 @@ void find_pin_index_at_model_scope(const AtomPinId pin_id, const AtomBlockId blk *total_pins = pin_cnt; } -# ifndef NO_GRAPHICS +#ifndef NO_GRAPHICS /** * Draws ONE logical connection from src_pin in src_lblk to sink_pin in sink_lblk. * The *_abs_bbox parameters are for mild optimization, as the absolute bbox can be calculated @@ -674,22 +690,20 @@ void draw_one_logical_connection(const AtomPinId src_pin, const AtomPinId sink_p g->draw_line(src_point, sink_point); const auto& atom_ctx = g_vpr_ctx.atom(); - if (atom_ctx.lookup.atom_clb(atom_ctx.nlist.pin_block(src_pin)) == atom_ctx.lookup.atom_clb(atom_ctx.nlist.pin_block(sink_pin))) { + if (atom_ctx.lookup.atom_clb(atom_ctx.nlist.pin_block(src_pin)) + == atom_ctx.lookup.atom_clb(atom_ctx.nlist.pin_block(sink_pin))) { // if they are in the same clb, put one arrow in the center float center_x = (src_point.x + sink_point.x) / 2; float center_y = (src_point.y + sink_point.y) / 2; - draw_triangle_along_line(g, - center_x, center_y, - src_point.x, sink_point.x, - src_point.y, sink_point.y); + draw_triangle_along_line(g, center_x, center_y, src_point.x, sink_point.x, src_point.y, sink_point.y); } else { // if they are not, put 2 near each end draw_triangle_along_line(g, src_point, sink_point, 0.05); draw_triangle_along_line(g, src_point, sink_point, 0.95); } } -# endif /* NO_GRAPHICS */ +#endif /* NO_GRAPHICS */ int highlight_sub_block(const ezgl::point2d& point_in_clb, ClusterBlockId clb_index, t_pb* pb) { t_draw_state* draw_state = get_draw_state_vars(); @@ -711,16 +725,17 @@ int highlight_sub_block(const ezgl::point2d& point_in_clb, ClusterBlockId clb_in * the given location. local_pt is relative to the given pb, and pb should * be in clb. */ -t_pb* highlight_sub_block_helper(const ClusterBlockId clb_index, t_pb* pb, const ezgl::point2d& local_pt, int max_depth) { +t_pb* highlight_sub_block_helper(const ClusterBlockId clb_index, + t_pb* pb, + const ezgl::point2d& local_pt, + int max_depth) { t_draw_coords* draw_coords = get_draw_coords_vars(); t_pb_type* pb_type = pb->pb_graph_node->pb_type; // check to see if we are past the displayed level, // if pb has children, // and if pb is dud - if (pb_type->depth + 1 > max_depth - || pb->child_pbs == nullptr - || pb_type->num_modes == 0) { + if (pb_type->depth + 1 > max_depth || pb->child_pbs == nullptr || pb_type->num_modes == 0) { return nullptr; } @@ -745,8 +760,8 @@ t_pb* highlight_sub_block_helper(const ClusterBlockId clb_index, t_pb* pb, const if (child_pb->name != nullptr && bbox.contains(local_pt)) { // check farther down the graph, see if we can find // something more specific. - t_pb* subtree_result = highlight_sub_block_helper( - clb_index, child_pb, local_pt - bbox.bottom_left(), max_depth); + t_pb* subtree_result + = highlight_sub_block_helper(clb_index, child_pb, local_pt - bbox.bottom_left(), max_depth); if (subtree_result != nullptr) { // we found something more specific. return subtree_result; @@ -770,13 +785,13 @@ t_selected_sub_block_info& get_selected_sub_block_info() { * Begin definition of t_selected_sub_block_info functions. */ -t_selected_sub_block_info::t_selected_sub_block_info() { - clear(); -} +t_selected_sub_block_info::t_selected_sub_block_info() { clear(); } template -void add_all_children(const t_pb* pb, const ClusterBlockId clb_index, std::unordered_set& set) { +void add_all_children(const t_pb* pb, + const ClusterBlockId clb_index, + std::unordered_set& set) { if (pb == nullptr) { return; } @@ -840,9 +855,7 @@ void t_selected_sub_block_info::set(t_pb* new_selected_sub_block, const ClusterB } } -void t_selected_sub_block_info::clear() { - set(nullptr, ClusterBlockId::INVALID()); -} +void t_selected_sub_block_info::clear() { set(nullptr, ClusterBlockId::INVALID()); } t_pb* t_selected_sub_block_info::get_selected_pb() const { return selected_pb; } @@ -862,11 +875,13 @@ bool t_selected_sub_block_info::is_sink_of_selected(const t_pb_graph_node* test, return sinks.find(gnode_clb_pair(test, clb_index)) != sinks.end(); } -bool t_selected_sub_block_info::is_source_of_selected(const t_pb_graph_node* test, const ClusterBlockId clb_index) const { +bool t_selected_sub_block_info::is_source_of_selected(const t_pb_graph_node* test, + const ClusterBlockId clb_index) const { return sources.find(gnode_clb_pair(test, clb_index)) != sources.end(); } -bool t_selected_sub_block_info::is_in_selected_subtree(const t_pb_graph_node* test, const ClusterBlockId clb_index) const { +bool t_selected_sub_block_info::is_in_selected_subtree(const t_pb_graph_node* test, + const ClusterBlockId clb_index) const { return in_selected_subtree.find(gnode_clb_pair(test, clb_index)) != in_selected_subtree.end(); } @@ -876,8 +891,7 @@ bool t_selected_sub_block_info::is_in_selected_subtree(const t_pb_graph_node* te t_selected_sub_block_info::clb_pin_tuple::clb_pin_tuple(ClusterBlockId clb_index_, const t_pb_graph_node* pb_gnode_) : clb_index(clb_index_) - , pb_gnode(pb_gnode_) { -} + , pb_gnode(pb_gnode_) {} t_selected_sub_block_info::clb_pin_tuple::clb_pin_tuple(const AtomPinId atom_pin) { auto& atom_ctx = g_vpr_ctx.atom(); @@ -893,14 +907,13 @@ bool t_selected_sub_block_info::clb_pin_tuple::operator==(const clb_pin_tuple& r * Begin definition of t_selected_sub_block_info::gnode_clb_pair functions */ -t_selected_sub_block_info::gnode_clb_pair::gnode_clb_pair(const t_pb_graph_node* pb_gnode_, const ClusterBlockId clb_index_) +t_selected_sub_block_info::gnode_clb_pair::gnode_clb_pair(const t_pb_graph_node* pb_gnode_, + const ClusterBlockId clb_index_) : pb_gnode(pb_gnode_) - , clb_index(clb_index_) { -} + , clb_index(clb_index_) {} bool t_selected_sub_block_info::gnode_clb_pair::operator==(const gnode_clb_pair& rhs) const { - return clb_index == rhs.clb_index - && pb_gnode == rhs.pb_gnode; + return clb_index == rhs.clb_index && pb_gnode == rhs.pb_gnode; } /** @@ -921,7 +934,8 @@ t_pb* find_atom_block_in_pb(const std::string& name, t_pb* pb) { int num_child_types = pb->get_num_child_types(); //Iterating through all child types for (int i = 0; i < num_child_types; ++i) { - if (pb->child_pbs[i] == nullptr) continue; + if (pb->child_pbs[i] == nullptr) + continue; int num_children_of_type = pb->get_num_children_of_type(i); //Iterating through all of pb's children of given type for (int j = 0; j < num_children_of_type; ++j) { diff --git a/vpr/src/draw/intra_logic_block.h b/vpr/src/draw/intra_logic_block.h index 320a3c9f406..96af9994e7b 100644 --- a/vpr/src/draw/intra_logic_block.h +++ b/vpr/src/draw/intra_logic_block.h @@ -20,17 +20,17 @@ #ifndef NO_GRAPHICS -# include "vpr_types.h" -# include "draw_types.h" -# include "atom_netlist_fwd.h" -# include +#include "vpr_types.h" +#include "draw_types.h" +#include "atom_netlist_fwd.h" +#include -# include "ezgl/point.hpp" +#include "ezgl/point.hpp" -# ifndef NO_GRAPHICS -# include "ezgl/graphics.hpp" -# include "ezgl/application.hpp" -# endif /* NO_GRAPHICS */ +#ifndef NO_GRAPHICS +#include "ezgl/graphics.hpp" +#include "ezgl/application.hpp" +#endif /* NO_GRAPHICS */ struct t_selected_sub_block_info { struct clb_pin_tuple { @@ -63,8 +63,7 @@ struct t_selected_sub_block_info { inline std::size_t operator()(const clb_pin_tuple& v) const { std::hash int_hasher; std::hash ptr_hasher; - return int_hasher(size_t(v.clb_index)) - ^ ptr_hasher((const void*)v.pb_gnode); + return int_hasher(size_t(v.clb_index)) ^ ptr_hasher((const void*)v.pb_gnode); } }; @@ -112,9 +111,9 @@ void draw_internal_init_blk(); /* Top-level drawing routine for internal sub-blocks. The function traverses through all * grid tiles and calls helper function to draw inside each block. */ -# ifndef NO_GRAPHICS +#ifndef NO_GRAPHICS void draw_internal_draw_subblk(ezgl::renderer* g); -# endif /* NO_GRAPHICS */ +#endif /* NO_GRAPHICS */ /* Determines which part of a block to highlight, and stores it, * so that the other subblock drawing functions will obey it. diff --git a/vpr/src/draw/manual_moves.cpp b/vpr/src/draw/manual_moves.cpp index 0becc4917a9..9d39b8a0904 100644 --- a/vpr/src/draw/manual_moves.cpp +++ b/vpr/src/draw/manual_moves.cpp @@ -77,7 +77,8 @@ void draw_manual_moves_window(const std::string& block_id) { //connect signals g_signal_connect(calculate_cost_button, "clicked", G_CALLBACK(calculate_cost_callback), grid); - g_signal_connect(G_OBJECT(draw_state->manual_moves_state.manual_move_window), "destroy", G_CALLBACK(close_manual_moves_window), NULL); + g_signal_connect(G_OBJECT(draw_state->manual_moves_state.manual_move_window), "destroy", + G_CALLBACK(close_manual_moves_window), NULL); gtk_container_add(GTK_CONTAINER(draw_state->manual_moves_state.manual_move_window), grid); gtk_widget_show_all(draw_state->manual_moves_state.manual_move_window); @@ -114,7 +115,10 @@ void calculate_cost_callback(GtkWidget* /*widget*/, GtkWidget* grid) { y_location = std::atoi(gtk_entry_get_text((GtkEntry*)y_position_entry)); subtile_location = std::atoi(gtk_entry_get_text((GtkEntry*)subtile_position_entry)); - if (std::string(gtk_entry_get_text((GtkEntry*)block_entry)).empty() || std::string(gtk_entry_get_text((GtkEntry*)x_position_entry)).empty() || std::string(gtk_entry_get_text((GtkEntry*)y_position_entry)).empty() || std::string(gtk_entry_get_text((GtkEntry*)subtile_position_entry)).empty()) { + if (std::string(gtk_entry_get_text((GtkEntry*)block_entry)).empty() + || std::string(gtk_entry_get_text((GtkEntry*)x_position_entry)).empty() + || std::string(gtk_entry_get_text((GtkEntry*)y_position_entry)).empty() + || std::string(gtk_entry_get_text((GtkEntry*)subtile_position_entry)).empty()) { invalid_breakpoint_entry_window("Not all fields are complete"); valid_input = false; } @@ -160,8 +164,7 @@ bool is_manual_move_legal(ClusterBlockId block_id, t_pl_loc to) { } //If the dimensions are out of bounds - if (to.x < 0 || to.x >= int(device_ctx.grid.width()) - || to.y < 0 || to.y >= int(device_ctx.grid.height())) { + if (to.x < 0 || to.x >= int(device_ctx.grid.width()) || to.y < 0 || to.y >= int(device_ctx.grid.height())) { invalid_breakpoint_entry_window("Dimensions are out of bounds"); return false; } @@ -169,7 +172,8 @@ bool is_manual_move_legal(ClusterBlockId block_id, t_pl_loc to) { //If the block s not compatible auto physical_tile = device_ctx.grid.get_physical_type({to.x, to.y, to.layer}); auto logical_block = cluster_ctx.clb_nlist.block_type(block_id); - if (to.sub_tile < 0 || to.sub_tile >= physical_tile->capacity || !is_sub_tile_compatible(physical_tile, logical_block, to.sub_tile)) { + if (to.sub_tile < 0 || to.sub_tile >= physical_tile->capacity + || !is_sub_tile_compatible(physical_tile, logical_block, to.sub_tile)) { invalid_breakpoint_entry_window("Blocks are not compatible"); return false; } @@ -206,25 +210,24 @@ void manual_move_cost_summary_dialog() { GtkWidget* content_area; //Creating the dialog window - dialog = gtk_dialog_new_with_buttons("Move Costs", - (GtkWindow*)draw_state->manual_moves_state.manual_move_window, - GTK_DIALOG_DESTROY_WITH_PARENT, - ("Accept"), - GTK_RESPONSE_ACCEPT, - ("Reject"), - GTK_RESPONSE_REJECT, - NULL); + dialog = gtk_dialog_new_with_buttons("Move Costs", (GtkWindow*)draw_state->manual_moves_state.manual_move_window, + GTK_DIALOG_DESTROY_WITH_PARENT, ("Accept"), GTK_RESPONSE_ACCEPT, ("Reject"), + GTK_RESPONSE_REJECT, NULL); gtk_window_set_transient_for((GtkWindow*)dialog, (GtkWindow*)draw_state->manual_moves_state.manual_move_window); //Create elements for the dialog and printing costs to the user. GtkWidget* title_label = gtk_label_new(nullptr); gtk_label_set_markup((GtkLabel*)title_label, "Move Costs and Outcomes"); - std::string delta_cost = "Delta Cost: " + std::to_string(draw_state->manual_moves_state.manual_move_info.delta_cost) + " "; + std::string delta_cost + = "Delta Cost: " + std::to_string(draw_state->manual_moves_state.manual_move_info.delta_cost) + " "; GtkWidget* delta_cost_label = gtk_label_new(delta_cost.c_str()); - std::string delta_timing = " Delta Timing: " + std::to_string(draw_state->manual_moves_state.manual_move_info.delta_timing) + " "; + std::string delta_timing + = " Delta Timing: " + std::to_string(draw_state->manual_moves_state.manual_move_info.delta_timing) + " "; GtkWidget* delta_timing_label = gtk_label_new(delta_timing.c_str()); - std::string delta_bounding_box = " Delta Bounding Box Cost: " + std::to_string(draw_state->manual_moves_state.manual_move_info.delta_bounding_box) + " "; + std::string delta_bounding_box + = " Delta Bounding Box Cost: " + + std::to_string(draw_state->manual_moves_state.manual_move_info.delta_bounding_box) + " "; GtkWidget* delta_bounding_box_label = gtk_label_new(delta_bounding_box.c_str()); std::string outcome = e_move_result_to_string(draw_state->manual_moves_state.manual_move_info.placer_move_outcome); std::string move_outcome = " Annealing Decision: " + outcome + " "; @@ -246,8 +249,10 @@ void manual_move_cost_summary_dialog() { gtk_widget_show_all(dialog); //Update message if user accepts the move. - std::string msg = "Manual move accepted. Block #" + std::to_string(draw_state->manual_moves_state.manual_move_info.blockID); - msg += " to location (" + std::to_string(draw_state->manual_moves_state.manual_move_info.x_pos) + ", " + std::to_string(draw_state->manual_moves_state.manual_move_info.y_pos) + ")"; + std::string msg + = "Manual move accepted. Block #" + std::to_string(draw_state->manual_moves_state.manual_move_info.blockID); + msg += " to location (" + std::to_string(draw_state->manual_moves_state.manual_move_info.x_pos) + ", " + + std::to_string(draw_state->manual_moves_state.manual_move_info.y_pos) + ")"; //Waiting for the user to respond to return to try_swa function. int result = gtk_dialog_run(GTK_DIALOG(dialog)); @@ -288,9 +293,7 @@ void close_manual_moves_window() { draw_state->manual_moves_state.manual_move_window_is_open = false; } -bool string_is_a_number(const std::string& block_id) { - return std::all_of(block_id.begin(), block_id.end(), isdigit); -} +bool string_is_a_number(const std::string& block_id) { return std::all_of(block_id.begin(), block_id.end(), isdigit); } //Updates ManualMovesInfo cost and placer move outcome variables. User_move_outcome is also updated. e_move_result pl_do_manual_move(double d_cost, double d_timing, double d_bounding_box, e_move_result& move_outcome) { @@ -316,7 +319,8 @@ e_create_move manual_move_display_and_propose(ManualMoveGenerator& manual_move_g draw_manual_moves_window(""); update_screen(ScreenUpdatePriority::MAJOR, " ", PLACEMENT, nullptr); move_type = e_move_type::MANUAL_MOVE; - t_propose_action proposed_action{move_type, -1}; //no need to specify block type in manual move "propose_move" function + t_propose_action proposed_action{move_type, + -1}; //no need to specify block type in manual move "propose_move" function return manual_move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); } diff --git a/vpr/src/draw/manual_moves.h b/vpr/src/draw/manual_moves.h index 7f78ff0e876..8c2944db1b4 100644 --- a/vpr/src/draw/manual_moves.h +++ b/vpr/src/draw/manual_moves.h @@ -13,17 +13,17 @@ /** This file contains all functions for manual moves **/ #ifndef NO_GRAPHICS -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" -# include "manual_move_generator.h" - -# include "move_utils.h" -# include -# include -# include -# include -# include -# include +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" +#include "manual_move_generator.h" + +#include "move_utils.h" +#include +#include +#include +#include +#include +#include /** * @brief ManualMovesInfo struct diff --git a/vpr/src/draw/save_graphics.cpp b/vpr/src/draw/save_graphics.cpp index 84b1599f30f..96f5768b388 100644 --- a/vpr/src/draw/save_graphics.cpp +++ b/vpr/src/draw/save_graphics.cpp @@ -1,14 +1,14 @@ #ifndef NO_GRAPHICS -# include -# include +#include +#include -# include "globals.h" -# include "draw.h" -# include "draw_global.h" -# include "save_graphics.h" -# include "vtr_path.h" -# include "search_bar.h" +#include "globals.h" +#include "draw.h" +#include "draw_global.h" +#include "save_graphics.h" +#include "vtr_path.h" +#include "search_bar.h" extern ezgl::rectangle initial_world; @@ -33,7 +33,8 @@ void save_graphics_from_button(GtkWidget* /*widget*/, gint response_id, gpointer if (strcmp(gtk_widget_get_name(static_cast(current->data)), "file_name_text_entry") == 0) { // found text entry text_entry = static_cast(current->data); - } else if (strcmp(gtk_widget_get_name(static_cast(current->data)), "file_name_combo_box") == 0) { + } else if (strcmp(gtk_widget_get_name(static_cast(current->data)), "file_name_combo_box") + == 0) { // found combo box combo_box = static_cast(current->data); } @@ -95,14 +96,9 @@ void save_graphics_dialog_box(GtkWidget* /*widget*/, ezgl::application* /*app*/) main_window = application.get_object(application.get_main_window_id().c_str()); // create a dialog window modal - dialog = gtk_dialog_new_with_buttons("Save Graphics Contents", - GTK_WINDOW(main_window), - GTK_DIALOG_DESTROY_WITH_PARENT, - ("_Save"), - GTK_RESPONSE_ACCEPT, - ("_Cancel"), - GTK_RESPONSE_REJECT, - NULL); + dialog + = gtk_dialog_new_with_buttons("Save Graphics Contents", GTK_WINDOW(main_window), GTK_DIALOG_DESTROY_WITH_PARENT, + ("_Save"), GTK_RESPONSE_ACCEPT, ("_Cancel"), GTK_RESPONSE_REJECT, NULL); // create elements name_label = gtk_label_new("File name:"); @@ -132,10 +128,7 @@ void save_graphics_dialog_box(GtkWidget* /*widget*/, ezgl::application* /*app*/) // show the label & child widget of the dialog gtk_widget_show_all(dialog); - g_signal_connect_swapped(GTK_DIALOG(dialog), - "response", - G_CALLBACK(save_graphics_from_button), - GTK_DIALOG(dialog)); + g_signal_connect_swapped(GTK_DIALOG(dialog), "response", G_CALLBACK(save_graphics_from_button), GTK_DIALOG(dialog)); return; } diff --git a/vpr/src/draw/save_graphics.h b/vpr/src/draw/save_graphics.h index 0ea5b183de0..f9a6ec2fbb1 100644 --- a/vpr/src/draw/save_graphics.h +++ b/vpr/src/draw/save_graphics.h @@ -9,11 +9,11 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" void save_graphics(std::string extension, std::string file_name); void save_graphics_dialog_box(GtkWidget* /*widget*/, ezgl::application* /*app*/); diff --git a/vpr/src/draw/search_bar.cpp b/vpr/src/draw/search_bar.cpp index b557b27d5ca..d2cb12aa2e8 100644 --- a/vpr/src/draw/search_bar.cpp +++ b/vpr/src/draw/search_bar.cpp @@ -15,52 +15,52 @@ #include "physical_types.h" #ifndef NO_GRAPHICS -# include -# include - -# include "vtr_assert.h" -# include "vtr_ndoffsetmatrix.h" -# include "vtr_memory.h" -# include "vtr_log.h" -# include "vtr_color_map.h" - -# include "vpr_utils.h" -# include "vpr_error.h" - -# include "globals.h" -# include "draw_color.h" -# include "draw.h" -# include "draw_basic.h" -# include "draw_rr.h" -# include "draw_searchbar.h" -# include "read_xml_arch_file.h" -# include "draw_global.h" -# include "intra_logic_block.h" -# include "atom_netlist.h" -# include "tatum/report/TimingPathCollector.hpp" -# include "hsl.h" -# include "route_export.h" -# include "search_bar.h" - -# ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * - * track CPU runtime. */ -# include -# else /* For X11. The clock() function in time.h will not output correct time difference * - * for X11, because the graphics is processed by the Xserver rather than local CPU, * - * which means tracking CPU time will not be the same as the actual wall clock time. * - * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ -# include -# endif +#include +#include + +#include "vtr_assert.h" +#include "vtr_ndoffsetmatrix.h" +#include "vtr_memory.h" +#include "vtr_log.h" +#include "vtr_color_map.h" + +#include "vpr_utils.h" +#include "vpr_error.h" + +#include "globals.h" +#include "draw_color.h" +#include "draw.h" +#include "draw_basic.h" +#include "draw_rr.h" +#include "draw_searchbar.h" +#include "read_xml_arch_file.h" +#include "draw_global.h" +#include "intra_logic_block.h" +#include "atom_netlist.h" +#include "tatum/report/TimingPathCollector.hpp" +#include "hsl.h" +#include "route_export.h" +#include "search_bar.h" + +#ifdef WIN32 /* For runtime tracking in WIN32. The clock() function defined in time.h will * + * track CPU runtime. */ +#include +#else /* For X11. The clock() function in time.h will not output correct time difference * + * for X11, because the graphics is processed by the Xserver rather than local CPU, * + * which means tracking CPU time will not be the same as the actual wall clock time. * + * Thus, so use gettimeofday() in sys/time.h to track actual calendar time. */ +#include +#endif //To process key presses we need the X11 keysym definitions, //which are unavailable when building with MINGW -# if defined(X11) && !defined(__MINGW32__) -# include -# endif +#if defined(X11) && !defined(__MINGW32__) +#include +#endif -# include "rr_graph.h" -# include "route_utilization.h" -# include "place_macro.h" +#include "rr_graph.h" +#include "route_utilization.h" +#include "place_macro.h" extern std::string rr_highlight_message; @@ -167,7 +167,7 @@ void search_and_highlight(GtkWidget* /*widget*/, ezgl::application* app) { warning_dialog_box("Invalid Net Name"); return; //name not exist } - for(auto clb_net_id: atom_ctx.lookup.clb_nets(atom_net_id).value()){ + for (auto clb_net_id : atom_ctx.lookup.clb_nets(atom_net_id).value()) { highlight_nets(clb_net_id); } } @@ -201,11 +201,14 @@ bool highlight_rr_nodes(RRNodeId hit_node) { draw_state->draw_rr_node[node].node_highlighted = false; } //Print info about all nodes to terminal - VTR_LOG("%s\n", describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, node, draw_state->is_flat).c_str()); + VTR_LOG("%s\n", describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, node, + draw_state->is_flat) + .c_str()); } //Show info about *only* hit node to graphics - std::string info = describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, hit_node, draw_state->is_flat); + std::string info = describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, hit_node, + draw_state->is_flat); sprintf(message, "Selected %s", info.c_str()); rr_highlight_message = message; @@ -241,10 +244,8 @@ void auto_zoom_rr_node(RRNodeId rr_node_id) { switch (rr_graph.node_type(rr_node_id)) { case IPIN: case OPIN: { - t_physical_tile_loc tile_loc = { - rr_graph.node_xlow(rr_node_id), - rr_graph.node_ylow(rr_node_id), - rr_graph.node_layer(rr_node_id)}; + t_physical_tile_loc tile_loc + = {rr_graph.node_xlow(rr_node_id), rr_graph.node_ylow(rr_node_id), rr_graph.node_layer(rr_node_id)}; t_physical_tile_type_ptr type = device_ctx.grid.get_physical_type(tile_loc); int width_offset = device_ctx.grid.get_width_offset(tile_loc); int height_offset = device_ctx.grid.get_height_offset(tile_loc); @@ -297,14 +298,14 @@ void highlight_cluster_block(ClusterBlockId clb_index) { if (get_selected_sub_block_info().has_selection()) { t_pb* selected_subblock = get_selected_sub_block_info().get_selected_pb(); - sprintf(msg, "sub-block %s (a \"%s\") selected", - selected_subblock->name, selected_subblock->pb_graph_node->pb_type->name); + sprintf(msg, "sub-block %s (a \"%s\") selected", selected_subblock->name, + selected_subblock->pb_graph_node->pb_type->name); } else { /* Highlight block and fan-in/fan-outs. */ draw_highlight_blocks_color(cluster_ctx.clb_nlist.block_type(clb_index), clb_index); - sprintf(msg, "Block #%zu (%s) at (%d, %d) selected.", - size_t(clb_index), cluster_ctx.clb_nlist.block_name(clb_index).c_str(), - block_locs[clb_index].loc.x, block_locs[clb_index].loc.y); + sprintf(msg, "Block #%zu (%s) at (%d, %d) selected.", size_t(clb_index), + cluster_ctx.clb_nlist.block_name(clb_index).c_str(), block_locs[clb_index].loc.x, + block_locs[clb_index].loc.y); } application.update_message(msg); @@ -328,13 +329,15 @@ bool highlight_atom_block(AtomBlockId atom_blk, ClusterBlockId cl_blk, ezgl::app //Getting the pb* for the atom block auto atom_block_pb = find_atom_block_in_pb(atom_ctx.nlist.block_name(atom_blk), pb); - if (!atom_block_pb) return false; //If no block found, returning false + if (!atom_block_pb) + return false; //If no block found, returning false //Ensuring that block is drawn at current zoom lvl, returning false if not auto atom_block_depth = atom_block_pb->pb_graph_node->pb_type->depth; t_draw_state* draw_state = get_draw_state_vars(); int max_depth = draw_state->show_blk_internal; - if (atom_block_depth > max_depth) return false; + if (atom_block_depth > max_depth) + return false; //Highlighting block get_selected_sub_block_info().set(atom_block_pb, cl_blk); @@ -348,7 +351,8 @@ void highlight_nets(ClusterNetId net_id) { t_draw_state* draw_state = get_draw_state_vars(); //If routing does not exist return - if (route_ctx.route_trees.empty()) return; + if (route_ctx.route_trees.empty()) + return; draw_state->net_color[net_id] = ezgl::MAGENTA; } @@ -360,11 +364,8 @@ void warning_dialog_box(const char* message) { // get a pointer to the main window main_window = application.get_object(application.get_main_window_id().c_str()); // create a dialog window modal with no button - dialog = gtk_message_dialog_new(GTK_WINDOW(main_window), - GTK_DIALOG_DESTROY_WITH_PARENT, - GTK_MESSAGE_INFO, - GTK_BUTTONS_NONE, - "Error"); + dialog = gtk_message_dialog_new(GTK_WINDOW(main_window), GTK_DIALOG_DESTROY_WITH_PARENT, GTK_MESSAGE_INFO, + GTK_BUTTONS_NONE, "Error"); // create a label and attach it to content area of the dialog content_area = gtk_message_dialog_get_message_area(GTK_MESSAGE_DIALOG(dialog)); label = gtk_label_new(message); @@ -372,10 +373,7 @@ void warning_dialog_box(const char* message) { // show the label & child widget of the dialog gtk_widget_show_all(dialog); - g_signal_connect_swapped(dialog, - "response", - G_CALLBACK(gtk_widget_destroy), - dialog); + g_signal_connect_swapped(dialog, "response", G_CALLBACK(gtk_widget_destroy), dialog); return; } @@ -397,8 +395,10 @@ void search_type_changed(GtkComboBox* self, ezgl::application* app) { GtkTreeModel* netNames = GTK_TREE_MODEL(app->get_object("NetNames")); GtkTreeModel* blockNames = GTK_TREE_MODEL(app->get_object("BlockNames")); //Ensuring a valid type was selected - if (!type) return; - if (type[0] == '\0') return; + if (!type) + return; + if (type[0] == '\0') + return; std::string searchType(type); /* @@ -427,11 +427,10 @@ void search_type_changed(GtkComboBox* self, ezgl::application* app) { * @return true | if the string pointed to by iter contains key (case-insensitive) * @return false | if the string pointed to does not contain key */ -gboolean customMatchingFunction( - GtkEntryCompletion* completer, - const gchar* key, - GtkTreeIter* iter, - gpointer /*user data*/ +gboolean customMatchingFunction(GtkEntryCompletion* completer, + const gchar* key, + GtkTreeIter* iter, + gpointer /*user data*/ ) { GtkTreeModel* model = gtk_entry_completion_get_model(completer); const gchar* text; @@ -527,7 +526,8 @@ void enable_autocomplete(ezgl::application* app) { draw_state->justEnabled = true; //If string len is 0, reutrning - if (oldText.length() == 0) return; + if (oldText.length() == 0) + return; gtk_widget_grab_focus(GTK_WIDGET(searchBar)); std::string newText = (oldText.length() > 1) ? oldText.substr(0, oldText.length() - 1) : ""; diff --git a/vpr/src/draw/search_bar.h b/vpr/src/draw/search_bar.h index 8108bfa8c4a..1306002c339 100644 --- a/vpr/src/draw/search_bar.h +++ b/vpr/src/draw/search_bar.h @@ -12,12 +12,12 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" -# include "draw_color.h" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" +#include "draw_color.h" void search_and_highlight(GtkWidget* /*widget*/, ezgl::application* app); bool highlight_rr_nodes(RRNodeId hit_node); @@ -28,11 +28,7 @@ void highlight_nets(std::string net_name); void highlight_atom_block(AtomBlockId block_id); -gboolean customMatchingFunction( - GtkEntryCompletion* completer, - const gchar* key, - GtkTreeIter* iter, - gpointer user_data); +gboolean customMatchingFunction(GtkEntryCompletion* completer, const gchar* key, GtkTreeIter* iter, gpointer user_data); //Function to manage entry completions when search type is changed void search_type_changed(GtkComboBox* /*self*/, ezgl::application* app); diff --git a/vpr/src/draw/ui_setup.cpp b/vpr/src/draw/ui_setup.cpp index 61e05c9be3e..88043c0503c 100644 --- a/vpr/src/draw/ui_setup.cpp +++ b/vpr/src/draw/ui_setup.cpp @@ -10,18 +10,18 @@ * Each function here initializes a different set of ui buttons, connecting their callback functions */ -# include "draw_global.h" -# include "draw.h" -# include "draw_toggle_functions.h" -# include "buttons.h" -# include "intra_logic_block.h" -# include "clustered_netlist.h" -# include "ui_setup.h" -# include "save_graphics.h" - -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "draw_global.h" +#include "draw.h" +#include "draw_toggle_functions.h" +#include "buttons.h" +#include "intra_logic_block.h" +#include "clustered_netlist.h" +#include "ui_setup.h" +#include "save_graphics.h" + +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" void basic_button_setup(ezgl::application* app) { //button to enter window_mode, created in main.ui GtkButton* window = (GtkButton*)app->get_object("Window"); @@ -35,8 +35,7 @@ void basic_button_setup(ezgl::application* app) { //button for save graphcis, created in main.ui GtkButton* save = (GtkButton*)app->get_object("SaveGraphics"); - g_signal_connect(save, "clicked", G_CALLBACK(save_graphics_dialog_box), - app); + g_signal_connect(save, "clicked", G_CALLBACK(save_graphics_dialog_box), app); //combo box for search type, created in main.ui GObject* search_type = (GObject*)app->get_object("SearchType"); @@ -272,14 +271,12 @@ void load_block_names(ezgl::application* app) { int i = 0; for (ClusterBlockId id : cluster_ctx.clb_nlist.blocks()) { gtk_list_store_append(blockStorage, &iter); - gtk_list_store_set(blockStorage, &iter, - 0, (cluster_ctx.clb_nlist.block_name(id)).c_str(), -1); + gtk_list_store_set(blockStorage, &iter, 0, (cluster_ctx.clb_nlist.block_name(id)).c_str(), -1); i++; } for (AtomBlockId id : atom_ctx.nlist.blocks()) { gtk_list_store_append(blockStorage, &iter); - gtk_list_store_set(blockStorage, &iter, - 0, (atom_ctx.nlist.block_name(id)).c_str(), -1); + gtk_list_store_set(blockStorage, &iter, 0, (atom_ctx.nlist.block_name(id)).c_str(), -1); i++; } } @@ -297,8 +294,7 @@ void load_net_names(ezgl::application* app) { int i = 0; for (AtomNetId id : atom_ctx.nlist.nets()) { gtk_list_store_append(netStorage, &iter); - gtk_list_store_set(netStorage, &iter, - 0, (atom_ctx.nlist.net_name(id)).c_str(), -1); + gtk_list_store_set(netStorage, &iter, 0, (atom_ctx.nlist.net_name(id)).c_str(), -1); i++; } } diff --git a/vpr/src/draw/ui_setup.h b/vpr/src/draw/ui_setup.h index 40f2045ed91..4c045fae08c 100644 --- a/vpr/src/draw/ui_setup.h +++ b/vpr/src/draw/ui_setup.h @@ -14,11 +14,11 @@ #ifndef NO_GRAPHICS -# include "draw_global.h" +#include "draw_global.h" -# include "ezgl/point.hpp" -# include "ezgl/application.hpp" -# include "ezgl/graphics.hpp" +#include "ezgl/point.hpp" +#include "ezgl/application.hpp" +#include "ezgl/graphics.hpp" /** * @brief configures basic buttons diff --git a/vpr/src/noc/bfs_routing.cpp b/vpr/src/noc/bfs_routing.cpp index a72ec6b29e4..1049f4ec8fd 100644 --- a/vpr/src/noc/bfs_routing.cpp +++ b/vpr/src/noc/bfs_routing.cpp @@ -93,11 +93,11 @@ void BFSRouting::route_flow(NocRouterId src_router_id, generate_route(sink_router_id, flow_route, noc_model, router_parent_link); } else { // a path was not found so throw an error to the user - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "No route could be found from starting router with id:'%d' and the destination router with id:'%d' " - "using the breadth-first search routing algorithm.", - src_router.get_router_user_id(), - sink_router.get_router_user_id()); + VPR_FATAL_ERROR( + VPR_ERROR_OTHER, + "No route could be found from starting router with id:'%d' and the destination router with id:'%d' " + "using the breadth-first search routing algorithm.", + src_router.get_router_user_id(), sink_router.get_router_user_id()); } } @@ -125,7 +125,8 @@ void BFSRouting::generate_route(NocRouterId start_router_id, route_beginning = flow_route.begin(); // now move to the next intermediate router in the path. This will be the source router of the parent link - curr_intermediate_router = noc_model.get_single_noc_link(curr_intermediate_router_parent_link->second).get_source_router(); + curr_intermediate_router + = noc_model.get_single_noc_link(curr_intermediate_router_parent_link->second).get_source_router(); // now get the parent of the router we moved to curr_intermediate_router_parent_link = router_parent_link.find(curr_intermediate_router); } diff --git a/vpr/src/noc/channel_dependency_graph.cpp b/vpr/src/noc/channel_dependency_graph.cpp index 31bd4052485..d8fb1ba2db2 100644 --- a/vpr/src/noc/channel_dependency_graph.cpp +++ b/vpr/src/noc/channel_dependency_graph.cpp @@ -4,10 +4,11 @@ #include -ChannelDependencyGraph::ChannelDependencyGraph(const NocStorage& noc_model, - const NocTrafficFlows& traffic_flow_storage, - const vtr::vector>& traffic_flow_routes, - const vtr::vector_map& block_locs) { +ChannelDependencyGraph::ChannelDependencyGraph( + const NocStorage& noc_model, + const NocTrafficFlows& traffic_flow_storage, + const vtr::vector>& traffic_flow_routes, + const vtr::vector_map& block_locs) { VTR_ASSERT((size_t)traffic_flow_storage.get_number_of_traffic_flows() == traffic_flow_routes.size()); for (auto traffic_flow_id : traffic_flow_storage.get_all_traffic_flow_id()) { @@ -19,7 +20,8 @@ ChannelDependencyGraph::ChannelDependencyGraph(const NocStorage& noc_model, ClusterBlockId logical_sink_router_block_id = traffic_flow.sink_router_cluster_id; // get the ids of the hard router blocks where the logical router cluster blocks have been placed - NocRouterId src_router_id = noc_model.get_router_at_grid_location(block_locs[logical_source_router_block_id].loc); + NocRouterId src_router_id + = noc_model.get_router_at_grid_location(block_locs[logical_source_router_block_id].loc); NocRouterId dst_router_id = noc_model.get_router_at_grid_location(block_locs[logical_sink_router_block_id].loc); const NocLink& first_link = noc_model.get_single_noc_link(traffic_flow_route.front()); diff --git a/vpr/src/noc/negative_first_routing.cpp b/vpr/src/noc/negative_first_routing.cpp index e45df009122..b7d783dfc26 100644 --- a/vpr/src/noc/negative_first_routing.cpp +++ b/vpr/src/noc/negative_first_routing.cpp @@ -3,11 +3,12 @@ NegativeFirstRouting::~NegativeFirstRouting() = default; -const std::vector& NegativeFirstRouting::get_legal_directions(NocRouterId /*src_router_id*/, - NocRouterId curr_router_id, - NocRouterId dst_router_id, - TurnModelRouting::Direction /*prev_dir*/, - const NocStorage& noc_model) { +const std::vector& NegativeFirstRouting::get_legal_directions( + NocRouterId /*src_router_id*/, + NocRouterId curr_router_id, + NocRouterId dst_router_id, + TurnModelRouting::Direction /*prev_dir*/, + const NocStorage& noc_model) { // get current and destination NoC routers const auto& curr_router = noc_model.get_single_noc_router(curr_router_id); const auto& dst_router = noc_model.get_single_noc_router(dst_router_id); @@ -74,9 +75,9 @@ const std::vector& NegativeFirstRouting::get_legal_ bool NegativeFirstRouting::is_turn_legal(const std::array, 3>& noc_routers, const NocStorage& noc_model) const { - const auto[x1, y1, z1] = noc_routers[0].get().get_router_physical_location(); - const auto[x2, y2, z2] = noc_routers[1].get().get_router_physical_location(); - const auto[x3, y3, z3] = noc_routers[2].get().get_router_physical_location(); + const auto [x1, y1, z1] = noc_routers[0].get().get_router_physical_location(); + const auto [x2, y2, z2] = noc_routers[1].get().get_router_physical_location(); + const auto [x3, y3, z3] = noc_routers[2].get().get_router_physical_location(); // check if the given routers can be traversed one after another VTR_ASSERT(vtr::exactly_k_conditions(2, x1 == x2, y1 == y2, z1 == z2)); @@ -89,8 +90,8 @@ bool NegativeFirstRouting::is_turn_legal(const std::array x1 && y3 < y2) || (y2 > y1 && x3 < x2) || (z2 > z1 && x3 < x2) || - (x2 > x1 && z3 < z2) || (z2 > z1 && y3 < y2) || (y2 > y1 && z3 < z2)) { + if ((x2 > x1 && y3 < y2) || (y2 > y1 && x3 < x2) || (z2 > z1 && x3 < x2) || (x2 > x1 && z3 < z2) + || (z2 > z1 && y3 < y2) || (y2 > y1 && z3 < z2)) { return false; } } else { diff --git a/vpr/src/noc/noc_link.cpp b/vpr/src/noc/noc_link.cpp index f272023dbfc..c26573e0f81 100644 --- a/vpr/src/noc/noc_link.cpp +++ b/vpr/src/noc/noc_link.cpp @@ -1,49 +1,29 @@ #include "noc_link.h" // constructor -NocLink::NocLink(NocLinkId link_id, NocRouterId source, NocRouterId sink, - double bw, double lat) +NocLink::NocLink(NocLinkId link_id, NocRouterId source, NocRouterId sink, double bw, double lat) : id(link_id) , source_router(source) , sink_router(sink) , bandwidth(bw) - , latency(lat) { } + , latency(lat) {} // getters -NocRouterId NocLink::get_source_router() const { - return source_router; -} +NocRouterId NocLink::get_source_router() const { return source_router; } -NocRouterId NocLink::get_sink_router() const { - return sink_router; -} +NocRouterId NocLink::get_sink_router() const { return sink_router; } //setters -void NocLink::set_source_router(NocRouterId source) { - source_router = source; -} +void NocLink::set_source_router(NocRouterId source) { source_router = source; } -void NocLink::set_sink_router(NocRouterId sink) { - sink_router = sink; -} +void NocLink::set_sink_router(NocRouterId sink) { sink_router = sink; } -void NocLink::set_bandwidth(double new_bandwidth) { - bandwidth = new_bandwidth; -} +void NocLink::set_bandwidth(double new_bandwidth) { bandwidth = new_bandwidth; } -double NocLink::get_bandwidth() const { - return bandwidth; -} +double NocLink::get_bandwidth() const { return bandwidth; } -double NocLink::get_latency() const { - return latency; -} +double NocLink::get_latency() const { return latency; } -NocLinkId NocLink::get_link_id() const { - return id; -} - -NocLink::operator NocLinkId() const { - return get_link_id(); -} +NocLinkId NocLink::get_link_id() const { return id; } +NocLink::operator NocLinkId() const { return get_link_id(); } diff --git a/vpr/src/noc/noc_link.h b/vpr/src/noc/noc_link.h index 3f56e763726..80f8993c8b8 100644 --- a/vpr/src/noc/noc_link.h +++ b/vpr/src/noc/noc_link.h @@ -49,12 +49,12 @@ class NocLink { NocRouterId source_router; /*!< The router which uses this link as an outgoing edge*/ NocRouterId sink_router; /*!< The router which uses this link as an incoming edge*/ - double bandwidth; /*!< Represents the maximum bits per second that can be transmitted over the link without causing congestion*/ + double + bandwidth; /*!< Represents the maximum bits per second that can be transmitted over the link without causing congestion*/ double latency; /*!< The zero-load latency of this link in seconds.*/ public: - NocLink(NocLinkId link_id, NocRouterId source_router, NocRouterId sink_router, - double bw, double lat); + NocLink(NocLinkId link_id, NocRouterId source_router, NocRouterId sink_router, double bw, double lat); // getters diff --git a/vpr/src/noc/noc_router.cpp b/vpr/src/noc/noc_router.cpp index 4af296c02ef..42ed538eb33 100644 --- a/vpr/src/noc/noc_router.cpp +++ b/vpr/src/noc/noc_router.cpp @@ -1,48 +1,32 @@ #include "noc_router.h" // constructor -NocRouter::NocRouter(int id, - int grid_position_x, int grid_position_y, int layer_position, - double latency) +NocRouter::NocRouter(int id, int grid_position_x, int grid_position_y, int layer_position, double latency) : router_user_id(id) , router_grid_position_x(grid_position_x) , router_grid_position_y(grid_position_y) , router_layer_position(layer_position) - , router_latency(latency){ + , router_latency(latency) { // initialize variables router_block_ref = ClusterBlockId(0); } // getters -int NocRouter::get_router_user_id() const { - return router_user_id; -} +int NocRouter::get_router_user_id() const { return router_user_id; } -int NocRouter::get_router_grid_position_x() const { - return router_grid_position_x; -} +int NocRouter::get_router_grid_position_x() const { return router_grid_position_x; } -int NocRouter::get_router_grid_position_y() const { - return router_grid_position_y; -} +int NocRouter::get_router_grid_position_y() const { return router_grid_position_y; } -int NocRouter::get_router_layer_position() const { - return router_layer_position; -} +int NocRouter::get_router_layer_position() const { return router_layer_position; } t_physical_tile_loc NocRouter::get_router_physical_location() const { return {router_grid_position_x, router_grid_position_y, router_layer_position}; } -double NocRouter::get_latency() const { - return router_latency; -} +double NocRouter::get_latency() const { return router_latency; } -ClusterBlockId NocRouter::get_router_block_ref() const { - return router_block_ref; -} +ClusterBlockId NocRouter::get_router_block_ref() const { return router_block_ref; } // setters -void NocRouter::set_router_block_ref(ClusterBlockId router_block_ref_id) { - router_block_ref = router_block_ref_id; -} \ No newline at end of file +void NocRouter::set_router_block_ref(ClusterBlockId router_block_ref_id) { router_block_ref = router_block_ref_id; } \ No newline at end of file diff --git a/vpr/src/noc/noc_router.h b/vpr/src/noc/noc_router.h index 968ff5206b7..86f3c93b019 100644 --- a/vpr/src/noc/noc_router.h +++ b/vpr/src/noc/noc_router.h @@ -61,9 +61,7 @@ class NocRouter { ClusterBlockId router_block_ref; public: - NocRouter(int id, - int grid_position_x, int grid_position_y, int layer_position, - double latency); + NocRouter(int id, int grid_position_x, int grid_position_y, int layer_position, double latency); // getters diff --git a/vpr/src/noc/noc_routing.h b/vpr/src/noc/noc_routing.h index 4804af6fa8c..fab7b873fe6 100644 --- a/vpr/src/noc/noc_routing.h +++ b/vpr/src/noc/noc_routing.h @@ -60,7 +60,8 @@ class NocRouting { NocRouterId sink_router_id, NocTrafficFlowId traffic_flow_id, std::vector& flow_route, - const NocStorage& noc_model) = 0; + const NocStorage& noc_model) + = 0; }; #endif diff --git a/vpr/src/noc/noc_routing_algorithm_creator.cpp b/vpr/src/noc/noc_routing_algorithm_creator.cpp index e52be823ae3..cbf63569ec8 100644 --- a/vpr/src/noc/noc_routing_algorithm_creator.cpp +++ b/vpr/src/noc/noc_routing_algorithm_creator.cpp @@ -8,9 +8,9 @@ #include "odd_even_routing.h" #include "vpr_error.h" - -std::unique_ptr NocRoutingAlgorithmCreator::create_routing_algorithm(const std::string& routing_algorithm_name, - const NocStorage& noc_model) { +std::unique_ptr NocRoutingAlgorithmCreator::create_routing_algorithm( + const std::string& routing_algorithm_name, + const NocStorage& noc_model) { std::unique_ptr noc_routing_algorithm; if (routing_algorithm_name == "xy_routing") { @@ -26,7 +26,8 @@ std::unique_ptr NocRoutingAlgorithmCreator::create_routing_algorithm } else if (routing_algorithm_name == "odd_even_routing") { noc_routing_algorithm = std::make_unique(noc_model); } else { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "The provided NoC routing algorithm '%s' is not supported.", routing_algorithm_name.c_str()); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "The provided NoC routing algorithm '%s' is not supported.", + routing_algorithm_name.c_str()); } return noc_routing_algorithm; diff --git a/vpr/src/noc/noc_storage.cpp b/vpr/src/noc/noc_storage.cpp index 58e79d46b03..2f10f8bff2a 100644 --- a/vpr/src/noc/noc_storage.cpp +++ b/vpr/src/noc/noc_storage.cpp @@ -3,12 +3,9 @@ #include "vtr_assert.h" #include "vpr_error.h" - #include -NocStorage::NocStorage() { - clear_noc(); -} +NocStorage::NocStorage() { clear_noc(); } // getters for the NoC const std::vector& NocStorage::get_noc_router_outgoing_links(NocRouterId id) const { @@ -19,54 +16,30 @@ const std::vector& NocStorage::get_noc_router_incoming_links(NocRoute return router_incoming_links_list[id]; } -const vtr::vector& NocStorage::get_noc_routers() const { - return router_storage; -} +const vtr::vector& NocStorage::get_noc_routers() const { return router_storage; } -int NocStorage::get_number_of_noc_routers() const { - return router_storage.size(); -} +int NocStorage::get_number_of_noc_routers() const { return router_storage.size(); } -const vtr::vector& NocStorage::get_noc_links() const { - return link_storage; -} +const vtr::vector& NocStorage::get_noc_links() const { return link_storage; } -vtr::vector& NocStorage::get_mutable_noc_links() { - return link_storage; -} +vtr::vector& NocStorage::get_mutable_noc_links() { return link_storage; } -int NocStorage::get_number_of_noc_links() const { - return link_storage.size(); -} +int NocStorage::get_number_of_noc_links() const { return link_storage.size(); } -double NocStorage::get_noc_link_latency() const { - return noc_link_latency; -} +double NocStorage::get_noc_link_latency() const { return noc_link_latency; } -double NocStorage::get_noc_router_latency() const { - return noc_router_latency; -} +double NocStorage::get_noc_router_latency() const { return noc_router_latency; } -bool NocStorage::get_detailed_router_latency() const { - return detailed_router_latency_; -} +bool NocStorage::get_detailed_router_latency() const { return detailed_router_latency_; } -bool NocStorage::get_detailed_link_latency() const { - return detailed_link_latency_; -} +bool NocStorage::get_detailed_link_latency() const { return detailed_link_latency_; } -const NocRouter& NocStorage::get_single_noc_router(NocRouterId id) const { - return router_storage[id]; -} +const NocRouter& NocStorage::get_single_noc_router(NocRouterId id) const { return router_storage[id]; } -NocRouter& NocStorage::get_single_mutable_noc_router(NocRouterId id) { - return router_storage[id]; -} +NocRouter& NocStorage::get_single_mutable_noc_router(NocRouterId id) { return router_storage[id]; } // get link properties -const NocLink& NocStorage::get_single_noc_link(NocLinkId id) const { - return link_storage[id]; -} +const NocLink& NocStorage::get_single_noc_link(NocLinkId id) const { return link_storage[id]; } NocLinkId NocStorage::get_single_noc_link_id(NocRouterId src_router, NocRouterId dst_router) const { NocLinkId link_id = NocLinkId::INVALID(); @@ -81,14 +54,11 @@ NocLinkId NocStorage::get_single_noc_link_id(NocRouterId src_router, NocRouterId return link_id; } -NocLink& NocStorage::get_single_mutable_noc_link(NocLinkId id) { - return link_storage[id]; -} +NocLink& NocStorage::get_single_mutable_noc_link(NocLinkId id) { return link_storage[id]; } NocRouterId NocStorage::get_router_at_grid_location(const t_pl_loc& hard_router_location) const { // get the key to identify the corresponding hard router block at the provided grid location - int router_key = generate_router_key_from_grid_location(hard_router_location.x, - hard_router_location.y, + int router_key = generate_router_key_from_grid_location(hard_router_location.x, hard_router_location.y, hard_router_location.layer); // get the hard router block id at the given grid location @@ -99,15 +69,11 @@ NocRouterId NocStorage::get_router_at_grid_location(const t_pl_loc& hard_router_ return hard_router_block->second; } -bool NocStorage::is_noc_3d() const { - return multi_layer_noc_; -} +bool NocStorage::is_noc_3d() const { return multi_layer_noc_; } // setters for the NoC -void NocStorage::add_router(int id, - int grid_position_x, int grid_position_y, int layer_position, - double latency) { +void NocStorage::add_router(int id, int grid_position_x, int grid_position_y, int layer_position, double latency) { VTR_ASSERT_MSG(!built_noc, "NoC already built, cannot modify further."); router_storage.emplace_back(id, grid_position_x, grid_position_y, layer_position, latency); @@ -147,17 +113,11 @@ void NocStorage::set_noc_link_bandwidth(double link_bandwidth) { } } -void NocStorage::set_noc_link_latency(double link_latency) { - noc_link_latency = link_latency; -} +void NocStorage::set_noc_link_latency(double link_latency) { noc_link_latency = link_latency; } -void NocStorage::set_noc_router_latency(double router_latency) { - noc_router_latency = router_latency; -} +void NocStorage::set_noc_router_latency(double router_latency) { noc_router_latency = router_latency; } -void NocStorage::set_device_grid_width(int grid_width) { - device_grid_width = grid_width; -} +void NocStorage::set_device_grid_width(int grid_width) { device_grid_width = grid_width; } void NocStorage::set_device_grid_spec(int grid_width, int grid_height) { device_grid_width = grid_width; @@ -177,28 +137,25 @@ bool NocStorage::remove_link(NocRouterId src_router_id, NocRouterId sink_router_ const NocLinkId link_to_be_removed_id = get_single_noc_link_id(src_router_id, sink_router_id); link_removed_status = (link_to_be_removed_id != NocLinkId::INVALID()); - auto it = std::remove(source_router_outgoing_links.begin(), - source_router_outgoing_links.end(), + auto it = std::remove(source_router_outgoing_links.begin(), source_router_outgoing_links.end(), link_to_be_removed_id); if (it == source_router_outgoing_links.end()) { - VTR_LOG_WARN("No link could be found among outgoing links of source router with id(%d) " + VTR_LOG_WARN( + "No link could be found among outgoing links of source router with id(%d) " "that that connects to the sink router with id (%d).\n", - (size_t)src_router_id, - (size_t)sink_router_id); + (size_t)src_router_id, (size_t)sink_router_id); } source_router_outgoing_links.erase(it, source_router_outgoing_links.end()); - it = std::remove(sink_router_incoming_links.begin(), - sink_router_incoming_links.end(), - link_to_be_removed_id); + it = std::remove(sink_router_incoming_links.begin(), sink_router_incoming_links.end(), link_to_be_removed_id); if (it == sink_router_incoming_links.end()) { - VTR_LOG_WARN("No link could be found among incoming links of sink router with id(%d) " + VTR_LOG_WARN( + "No link could be found among incoming links of sink router with id(%d) " "that that connects to the source router with id (%d).\n", - (size_t)sink_router_id, - (size_t)src_router_id); + (size_t)sink_router_id, (size_t)src_router_id); } sink_router_incoming_links.erase(it, sink_router_incoming_links.end()); @@ -210,8 +167,7 @@ bool NocStorage::remove_link(NocRouterId src_router_id, NocRouterId sink_router_ // if a link was not removed then throw warning message if (!link_removed_status) { VTR_LOG_WARN("No link could be found that has a source router with id: '%d' and sink router with id:'%d'.\n", - (size_t)src_router_id, - (size_t)sink_router_id); + (size_t)src_router_id, (size_t)sink_router_id); } return link_removed_status; @@ -231,16 +187,14 @@ void NocStorage::finished_building_noc() { * in a similar way. */ - auto router_latency_it = std::adjacent_find(router_storage.begin(), router_storage.end(), - [](const NocRouter& a, const NocRouter& b) -> bool { - return a.get_latency() != b.get_latency(); - }); + auto router_latency_it = std::adjacent_find( + router_storage.begin(), router_storage.end(), + [](const NocRouter& a, const NocRouter& b) -> bool { return a.get_latency() != b.get_latency(); }); detailed_router_latency_ = (router_latency_it != router_storage.end()); - auto link_latency_it = std::adjacent_find(link_storage.begin(), link_storage.end(), - [](const NocLink& a, const NocLink& b) -> bool { - return a.get_latency() != b.get_latency(); - }); + auto link_latency_it = std::adjacent_find( + link_storage.begin(), link_storage.end(), + [](const NocLink& a, const NocLink& b) -> bool { return a.get_latency() != b.get_latency(); }); detailed_link_latency_ = (link_latency_it != link_storage.end()); auto router_layer_it = std::adjacent_find(router_storage.begin(), router_storage.end(), @@ -265,7 +219,8 @@ NocRouterId NocStorage::convert_router_id(int id) const { auto result = router_id_conversion_table.find(id); if (result == router_id_conversion_table.end()) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Cannot convert router with id:%d. The router was not found within the NoC.", id); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Cannot convert router with id:%d. The router was not found within the NoC.", + id); } return result->second; @@ -308,7 +263,9 @@ NocLinkId NocStorage::get_parallel_link(NocLinkId current_link) const { return parallel_link; } -int NocStorage::generate_router_key_from_grid_location(int grid_position_x, int grid_position_y, int layer_position) const { +int NocStorage::generate_router_key_from_grid_location(int grid_position_x, + int grid_position_y, + int layer_position) const { // calculate the key value return (layer_num_grid_locs * layer_position + device_grid_width * grid_position_y + grid_position_x); } @@ -340,20 +297,20 @@ void NocStorage::echo_noc(char* file_name) const { for (const auto& router : router_storage) { fprintf(fp, "Router %d:\n", router.get_router_user_id()); // if the router tile is larger than a single grid, the position represents the bottom left corner of the tile - fprintf(fp, "Equivalent Physical Tile Grid Position -> (%d,%d)\n", router.get_router_grid_position_x(), router.get_router_grid_position_y()); + fprintf(fp, "Equivalent Physical Tile Grid Position -> (%d,%d)\n", router.get_router_grid_position_x(), + router.get_router_grid_position_y()); fprintf(fp, "Router Connections (destination router id, link bandwidth, link latency) ->"); - auto& router_connections = this->get_noc_router_outgoing_links(this->convert_router_id(router.get_router_user_id())); + auto& router_connections + = this->get_noc_router_outgoing_links(this->convert_router_id(router.get_router_user_id())); // go through the outgoing links of the current router and print the connecting router for (auto router_connection : router_connections) { const auto& link = get_single_noc_link(router_connection); const NocRouterId connecting_router_id = link.get_sink_router(); - fprintf(fp, " (%d, %g, %g)", - get_single_noc_router(connecting_router_id).get_router_user_id(), - link.get_bandwidth(), - link.get_latency()); + fprintf(fp, " (%d, %g, %g)", get_single_noc_router(connecting_router_id).get_router_user_id(), + link.get_bandwidth(), link.get_latency()); } fprintf(fp, "\n\n"); diff --git a/vpr/src/noc/noc_storage.h b/vpr/src/noc/noc_storage.h index 89dcf87bbac..929aa7a1c4f 100644 --- a/vpr/src/noc/noc_storage.h +++ b/vpr/src/noc/noc_storage.h @@ -317,9 +317,9 @@ class NocStorage { * requested NoC links * @return A const */ - template class Container, typename... Ts> - const std::vector>& get_noc_links(const Container& noc_link_ids) const; - + template class Container, typename... Ts> + const std::vector>& get_noc_links( + const Container& noc_link_ids) const; /** * @brief Given source and sink router identifiers, this function @@ -384,9 +384,7 @@ class NocStorage { * @param latency The zero-load latency that a traffic flow will experience * when it is routed through this router. */ - void add_router(int id, - int grid_position_x, int grid_position_y, int layer_position, - double latency); + void add_router(int id, int grid_position_x, int grid_position_y, int layer_position, double latency); /** * @brief Creates a new link and adds it to the NoC. The newly created @@ -560,18 +558,16 @@ class NocStorage { void echo_noc(char* file_name) const; }; - -template class Container, typename... Ts> -const std::vector>& NocStorage::get_noc_links(const Container& noc_link_ids) const { +template class Container, typename... Ts> +const std::vector>& NocStorage::get_noc_links( + const Container& noc_link_ids) const { returnable_noc_link_const_refs_.clear(); - std::transform(noc_link_ids.begin(), noc_link_ids.end(), std::back_inserter(returnable_noc_link_const_refs_), - [this](const NocLinkId lid) { - return std::reference_wrapper(this->get_single_noc_link(lid)); - }); + std::transform( + noc_link_ids.begin(), noc_link_ids.end(), std::back_inserter(returnable_noc_link_const_refs_), + [this](const NocLinkId lid) { return std::reference_wrapper(this->get_single_noc_link(lid)); }); return returnable_noc_link_const_refs_; } #endif - diff --git a/vpr/src/noc/noc_traffic_flows.cpp b/vpr/src/noc/noc_traffic_flows.cpp index 310eacd2f16..9bcff72906f 100644 --- a/vpr/src/noc/noc_traffic_flows.cpp +++ b/vpr/src/noc/noc_traffic_flows.cpp @@ -3,21 +3,18 @@ #include "vpr_error.h" // constructor indicates that the class has not been properly initialized yet as the user supplied traffic flows have not been added. -NocTrafficFlows::NocTrafficFlows() { - built_traffic_flows = false; -} +NocTrafficFlows::NocTrafficFlows() { built_traffic_flows = false; } // getters for the traffic flows -int NocTrafficFlows::get_number_of_traffic_flows() const { - return noc_traffic_flows.size(); -} +int NocTrafficFlows::get_number_of_traffic_flows() const { return noc_traffic_flows.size(); } const t_noc_traffic_flow& NocTrafficFlows::get_single_noc_traffic_flow(NocTrafficFlowId traffic_flow_id) const { return noc_traffic_flows[traffic_flow_id]; } -const std::vector& NocTrafficFlows::get_traffic_flows_associated_to_router_block(ClusterBlockId router_block_id) const { +const std::vector& NocTrafficFlows::get_traffic_flows_associated_to_router_block( + ClusterBlockId router_block_id) const { // to be returned in the given router does not have any associated traffic flows static const std::vector empty_vector; @@ -41,15 +38,12 @@ const std::vector& NocTrafficFlows::get_router_clusters_in_netli return router_cluster_in_netlist; } -const std::vector& NocTrafficFlows::get_all_traffic_flow_id() const { - return noc_traffic_flows_ids; -} +const std::vector& NocTrafficFlows::get_all_traffic_flow_id() const { return noc_traffic_flows_ids; } const vtr::vector& NocTrafficFlows::get_all_traffic_flows() const { return noc_traffic_flows; } - // setters for the traffic flows void NocTrafficFlows::create_noc_traffic_flow(const std::string& source_router_module_name, @@ -62,12 +56,8 @@ void NocTrafficFlows::create_noc_traffic_flow(const std::string& source_router_m VTR_ASSERT_MSG(!built_traffic_flows, "NoC traffic flows have already been added, cannot modify further."); // create and add the new traffic flow to the vector - noc_traffic_flows.emplace_back(source_router_module_name, - sink_router_module_name, - source_router_cluster_id, - sink_router_cluster_id, - traffic_flow_bandwidth, - traffic_flow_latency, + noc_traffic_flows.emplace_back(source_router_module_name, sink_router_module_name, source_router_cluster_id, + sink_router_cluster_id, traffic_flow_bandwidth, traffic_flow_latency, traffic_flow_priority); //since the new traffic flow was added to the back of the vector, its id will be the index of the last element @@ -114,14 +104,16 @@ bool NocTrafficFlows::check_if_cluster_block_has_traffic_flows(ClusterBlockId bl // private functions used internally -void NocTrafficFlows::add_traffic_flow_to_associated_routers(NocTrafficFlowId traffic_flow_id, ClusterBlockId associated_router_id) { +void NocTrafficFlows::add_traffic_flow_to_associated_routers(NocTrafficFlowId traffic_flow_id, + ClusterBlockId associated_router_id) { // get a reference to the traffic flows associated with the current router auto router_traffic_flows = traffic_flows_associated_to_router_blocks.find(associated_router_id); // check if a vector associated traffic flows exists if (router_traffic_flows == traffic_flows_associated_to_router_blocks.end()) { // there exists no associated traffic flows for this router, so we add it with the newly created traffic flow id - traffic_flows_associated_to_router_blocks.insert(std::pair>(associated_router_id, {traffic_flow_id})); + traffic_flows_associated_to_router_blocks.insert( + std::pair>(associated_router_id, {traffic_flow_id})); } else { // there already is a vector associated of traffic flows for the current router, so add it router_traffic_flows->second.emplace_back(traffic_flow_id); @@ -150,7 +142,8 @@ void NocTrafficFlows::echo_noc_traffic_flows(char* file_name) { // print the current traffic flows data fprintf(fp, "Traffic flow ID: %d\n", traffic_flow_id); fprintf(fp, "Traffic flow source router block name: %s\n", traffic_flow.source_router_module_name.c_str()); - fprintf(fp, "Traffic flow source router block cluster ID: %lu\n", (size_t)traffic_flow.source_router_cluster_id); + fprintf(fp, "Traffic flow source router block cluster ID: %lu\n", + (size_t)traffic_flow.source_router_cluster_id); fprintf(fp, "Traffic flow sink router block name: %s\n", traffic_flow.sink_router_module_name.c_str()); fprintf(fp, "Traffic flow sink router block cluster ID: %lu\n", (size_t)traffic_flow.sink_router_cluster_id); fprintf(fp, "Traffic flow bandwidth: %f bps\n", traffic_flow.traffic_flow_bandwidth); @@ -189,4 +182,3 @@ void NocTrafficFlows::echo_noc_traffic_flows(char* file_name) { vtr::fclose(fp); } - diff --git a/vpr/src/noc/noc_traffic_flows.h b/vpr/src/noc/noc_traffic_flows.h index 53aa62709a3..4e88c8f513a 100644 --- a/vpr/src/noc/noc_traffic_flows.h +++ b/vpr/src/noc/noc_traffic_flows.h @@ -68,7 +68,13 @@ struct t_noc_traffic_flow { int traffic_flow_priority; /** Constructor initializes all variables*/ - t_noc_traffic_flow(std::string source_router_name, std::string sink_router_name, ClusterBlockId source_router_id, ClusterBlockId sink_router_id, double flow_bandwidth, double max_flow_latency, int flow_priority) + t_noc_traffic_flow(std::string source_router_name, + std::string sink_router_name, + ClusterBlockId source_router_id, + ClusterBlockId sink_router_id, + double flow_bandwidth, + double max_flow_latency, + int flow_priority) : source_router_module_name(std::move(source_router_name)) , sink_router_module_name(std::move(sink_router_name)) , source_router_cluster_id(source_router_id) @@ -171,7 +177,8 @@ class NocTrafficFlows { * flows that have the input router block parameter as the source or sink * in the flow. */ - const std::vector& get_traffic_flows_associated_to_router_block(ClusterBlockId router_block_id) const; + const std::vector& get_traffic_flows_associated_to_router_block( + ClusterBlockId router_block_id) const; /** * @brief Gets the number of unique router blocks in the @@ -295,7 +302,6 @@ class NocTrafficFlows { */ void echo_noc_traffic_flows(char* file_name); - /** * @brief Defines the latency constraint of a traffic flow * when not provided by the user. diff --git a/vpr/src/noc/north_last_routing.cpp b/vpr/src/noc/north_last_routing.cpp index fd3c1183201..95c90b22d35 100644 --- a/vpr/src/noc/north_last_routing.cpp +++ b/vpr/src/noc/north_last_routing.cpp @@ -3,11 +3,12 @@ NorthLastRouting::~NorthLastRouting() = default; -const std::vector& NorthLastRouting::get_legal_directions(NocRouterId /*src_router_id*/, - NocRouterId curr_router_id, - NocRouterId dst_router_id, - TurnModelRouting::Direction /*prev_dir*/, - const NocStorage& noc_model) { +const std::vector& NorthLastRouting::get_legal_directions( + NocRouterId /*src_router_id*/, + NocRouterId curr_router_id, + NocRouterId dst_router_id, + TurnModelRouting::Direction /*prev_dir*/, + const NocStorage& noc_model) { // get current and destination NoC routers const auto& curr_router = noc_model.get_single_noc_router(curr_router_id); const auto& dst_router = noc_model.get_single_noc_router(dst_router_id); @@ -72,7 +73,6 @@ bool NorthLastRouting::is_turn_legal(const std::array z1 && x3 < x2) || (z2 > z1 && x3 > x2) || (z2 > z1 && y3 < y2) || - (y2 > y1 && z3 < z2) || (y2 > y1 && x3 < x2) || (y2 > y1 && x3 > x2)) { + if ((z2 > z1 && x3 < x2) || (z2 > z1 && x3 > x2) || (z2 > z1 && y3 < y2) || (y2 > y1 && z3 < z2) + || (y2 > y1 && x3 < x2) || (y2 > y1 && x3 > x2)) { return false; } } else { @@ -90,6 +90,5 @@ bool NorthLastRouting::is_turn_legal(const std::array& OddEvenRouting::get_legal_directions(NocRouterId src_router_id, - NocRouterId curr_router_id, - NocRouterId dst_router_id, - TurnModelRouting::Direction prev_dir, - const NocStorage& noc_model) { +const std::vector& OddEvenRouting::get_legal_directions( + NocRouterId src_router_id, + NocRouterId curr_router_id, + NocRouterId dst_router_id, + TurnModelRouting::Direction prev_dir, + const NocStorage& noc_model) { /* get the compressed location for source, current, and destination NoC routers * Odd-even routing algorithm restricts turn based on whether the current NoC router * in an odd or even NoC column. This information can be extracted from the NoC compressed grid. @@ -65,20 +65,16 @@ const std::vector& OddEvenRouting::get_legal_direct if (noc_model.is_noc_3d()) { determine_legal_directions_3d(compressed_src_loc, compressed_curr_loc, compressed_dst_loc, prev_dir); - } else { // 2D NoC + } else { // 2D NoC determine_legal_directions_2d(compressed_src_loc, compressed_curr_loc, compressed_dst_loc, prev_dir); } return returned_legal_direction; } -bool OddEvenRouting::is_odd(int number) { - return (number % 2) == 1; -} +bool OddEvenRouting::is_odd(int number) { return (number % 2) == 1; } -bool OddEvenRouting::is_even(int number) { - return (number % 2) == 0; -} +bool OddEvenRouting::is_even(int number) { return (number % 2) == 0; } bool OddEvenRouting::is_turn_legal(const std::array, 3>& noc_routers, const NocStorage& noc_model) const { @@ -120,7 +116,6 @@ bool OddEvenRouting::is_turn_legal(const std::array z1 && y3 < y2) || (z2 < z1 && y3 < y2)) { @@ -131,7 +126,7 @@ bool OddEvenRouting::is_turn_legal(const std::array 0) { returned_legal_direction.push_back(TurnModelRouting::Direction::NORTH); } else { @@ -194,8 +189,6 @@ void OddEvenRouting::determine_legal_directions_2d(t_physical_tile_loc comp_src_ } } } - - } void OddEvenRouting::determine_legal_directions_3d(t_physical_tile_loc comp_src_loc, @@ -208,7 +201,6 @@ void OddEvenRouting::determine_legal_directions_3d(t_physical_tile_loc comp_src_ const int diff_z = comp_dst_loc.layer_num - comp_curr_loc.layer_num; if (diff_x > 0) { - if (diff_y == 0 && diff_z == 0) { returned_legal_direction.push_back(TurnModelRouting::Direction::EAST); return; @@ -218,7 +210,8 @@ void OddEvenRouting::determine_legal_directions_3d(t_physical_tile_loc comp_src_ returned_legal_direction.push_back(TurnModelRouting::Direction::EAST); } - if (is_odd(comp_curr_loc.x) || comp_curr_loc.x == comp_src_loc.x || prev_dir != TurnModelRouting::Direction::EAST) { + if (is_odd(comp_curr_loc.x) || comp_curr_loc.x == comp_src_loc.x + || prev_dir != TurnModelRouting::Direction::EAST) { goto route_in_yz_plane; } else { return; @@ -234,8 +227,7 @@ void OddEvenRouting::determine_legal_directions_3d(t_physical_tile_loc comp_src_ } } - - route_in_yz_plane : +route_in_yz_plane: if (diff_y == 0) { // the same column as the destination. Only north or south are allowed if (diff_z > 0) { @@ -249,7 +241,8 @@ void OddEvenRouting::determine_legal_directions_3d(t_physical_tile_loc comp_src_ } else { /* Since EN and ES turns are forbidden in even columns, we move along the vertical * direction only in we are in an odd column. */ - if (is_odd(comp_curr_loc.y) || comp_curr_loc.y == comp_src_loc.y || prev_dir != TurnModelRouting::Direction::NORTH) { + if (is_odd(comp_curr_loc.y) || comp_curr_loc.y == comp_src_loc.y + || prev_dir != TurnModelRouting::Direction::NORTH) { if (diff_z > 0) { returned_legal_direction.push_back(TurnModelRouting::Direction::UP); } else { diff --git a/vpr/src/noc/odd_even_routing.h b/vpr/src/noc/odd_even_routing.h index ce84c74c264..da61c5f3e9b 100644 --- a/vpr/src/noc/odd_even_routing.h +++ b/vpr/src/noc/odd_even_routing.h @@ -25,7 +25,6 @@ class OddEvenRouting : public TurnModelRouting { ~OddEvenRouting() override; private: - const std::vector& get_legal_directions(NocRouterId src_router_id, NocRouterId curr_router_id, NocRouterId dst_router_id, diff --git a/vpr/src/noc/read_xml_noc_traffic_flows_file.cpp b/vpr/src/noc/read_xml_noc_traffic_flows_file.cpp index 3f12c02ed2d..cb21c1a1645 100644 --- a/vpr/src/noc/read_xml_noc_traffic_flows_file.cpp +++ b/vpr/src/noc/read_xml_noc_traffic_flows_file.cpp @@ -4,7 +4,10 @@ void read_xml_noc_traffic_flows_file(const char* noc_flows_file) { // start by checking that the provided file is a ".flows" file if (!vtr::check_file_name_extension(noc_flows_file, ".flows")) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "NoC traffic flows file '%s' has an unknown extension. Expecting .flows for NoC traffic flow files.", noc_flows_file); + VPR_FATAL_ERROR( + VPR_ERROR_OTHER, + "NoC traffic flows file '%s' has an unknown extension. Expecting .flows for NoC traffic flow files.", + noc_flows_file); } const ClusteringContext& cluster_ctx = g_vpr_ctx.clustering(); @@ -28,7 +31,8 @@ void read_xml_noc_traffic_flows_file(const char* noc_flows_file) { * time-consuming, so instead we can compare to only blocks that are * compatible to physical NoC router tiles. */ - std::vector cluster_blocks_compatible_with_noc_router_tiles = get_cluster_blocks_compatible_with_noc_router_tiles(cluster_ctx, noc_router_tile_type); + std::vector cluster_blocks_compatible_with_noc_router_tiles + = get_cluster_blocks_compatible_with_noc_router_tiles(cluster_ctx, noc_router_tile_type); /* variable used when parsing the file. * Stores xml related information while parsing the file, such as current @@ -52,11 +56,13 @@ void read_xml_noc_traffic_flows_file(const char* noc_flows_file) { // process the individual traffic flows below for (pugi::xml_node single_flow : traffic_flows_tag.children()) { // current tag is a valid "flow" so process it - process_single_flow(single_flow, loc_data, cluster_ctx, noc_ctx, noc_router_tile_type, cluster_blocks_compatible_with_noc_router_tiles); + process_single_flow(single_flow, loc_data, cluster_ctx, noc_ctx, noc_router_tile_type, + cluster_blocks_compatible_with_noc_router_tiles); } // insert the clusters to the local collection of all router clusters in the netlist - noc_ctx.noc_traffic_flows_storage.set_router_cluster_in_netlist(cluster_blocks_compatible_with_noc_router_tiles); + noc_ctx.noc_traffic_flows_storage.set_router_cluster_in_netlist( + cluster_blocks_compatible_with_noc_router_tiles); } catch (pugiutil::XmlError& e) { // used for identifying any of the xml parsing library errors @@ -91,20 +97,28 @@ void process_single_flow(pugi::xml_node single_flow_tag, // store the names of the routers part of this traffic flow // These names should regex match to a logical router within the clustered netlist - std::string source_router_module_name = pugiutil::get_attribute(single_flow_tag, "src", loc_data, pugiutil::REQUIRED).as_string(); + std::string source_router_module_name + = pugiutil::get_attribute(single_flow_tag, "src", loc_data, pugiutil::REQUIRED).as_string(); - std::string sink_router_module_name = pugiutil::get_attribute(single_flow_tag, "dst", loc_data, pugiutil::REQUIRED).as_string(); + std::string sink_router_module_name + = pugiutil::get_attribute(single_flow_tag, "dst", loc_data, pugiutil::REQUIRED).as_string(); //verify whether the router module names are valid non-empty strings verify_traffic_flow_router_modules(source_router_module_name, sink_router_module_name, single_flow_tag, loc_data); // assign the unique block ids of the two router modules after clustering - ClusterBlockId source_router_id = get_router_module_cluster_id(source_router_module_name, cluster_ctx, single_flow_tag, loc_data, cluster_blocks_compatible_with_noc_router_tiles); - ClusterBlockId sink_router_id = get_router_module_cluster_id(sink_router_module_name, cluster_ctx, single_flow_tag, loc_data, cluster_blocks_compatible_with_noc_router_tiles); + ClusterBlockId source_router_id + = get_router_module_cluster_id(source_router_module_name, cluster_ctx, single_flow_tag, loc_data, + cluster_blocks_compatible_with_noc_router_tiles); + ClusterBlockId sink_router_id + = get_router_module_cluster_id(sink_router_module_name, cluster_ctx, single_flow_tag, loc_data, + cluster_blocks_compatible_with_noc_router_tiles); // verify that the source and sink modules are actually noc routers - check_traffic_flow_router_module_type(source_router_module_name, source_router_id, single_flow_tag, loc_data, cluster_ctx, noc_router_tile_type); - check_traffic_flow_router_module_type(sink_router_module_name, sink_router_id, single_flow_tag, loc_data, cluster_ctx, noc_router_tile_type); + check_traffic_flow_router_module_type(source_router_module_name, source_router_id, single_flow_tag, loc_data, + cluster_ctx, noc_router_tile_type); + check_traffic_flow_router_module_type(sink_router_module_name, sink_router_id, single_flow_tag, loc_data, + cluster_ctx, noc_router_tile_type); // store the properties of the traffic flow double traffic_flow_bandwidth = get_traffic_flow_bandwidth(single_flow_tag, loc_data); @@ -113,16 +127,13 @@ void process_single_flow(pugi::xml_node single_flow_tag, int traffic_flow_priority = get_traffic_flow_priority(single_flow_tag, loc_data); - verify_traffic_flow_properties(traffic_flow_bandwidth, max_traffic_flow_latency, traffic_flow_priority, single_flow_tag, loc_data); + verify_traffic_flow_properties(traffic_flow_bandwidth, max_traffic_flow_latency, traffic_flow_priority, + single_flow_tag, loc_data); // The current flow information is legal, so store it - noc_traffic_flow_storage->create_noc_traffic_flow(source_router_module_name, - sink_router_module_name, - source_router_id, - sink_router_id, - traffic_flow_bandwidth, - max_traffic_flow_latency, - traffic_flow_priority); + noc_traffic_flow_storage->create_noc_traffic_flow(source_router_module_name, sink_router_module_name, + source_router_id, sink_router_id, traffic_flow_bandwidth, + max_traffic_flow_latency, traffic_flow_priority); } double get_traffic_flow_bandwidth(pugi::xml_node single_flow_tag, const pugiutil::loc_data& loc_data) { @@ -130,7 +141,8 @@ double get_traffic_flow_bandwidth(pugi::xml_node single_flow_tag, const pugiutil // holds the bandwidth value as a string so that it can be used to convert to a floating point value (this is done so that scientific notation is supported) // there is no default value since this is a required attribute // Either it is provided or an error is thrown is not provided or it is an illegal value - std::string traffic_flow_bandwidth_intermediate_val = pugiutil::get_attribute(single_flow_tag, "bandwidth", loc_data, pugiutil::REQUIRED).as_string(); + std::string traffic_flow_bandwidth_intermediate_val + = pugiutil::get_attribute(single_flow_tag, "bandwidth", loc_data, pugiutil::REQUIRED).as_string(); // now convert the value to double traffic_flow_bandwidth = std::atof(traffic_flow_bandwidth_intermediate_val.c_str()); @@ -146,7 +158,8 @@ double get_max_traffic_flow_latency(pugi::xml_node single_flow_tag, const pugiut std::string max_traffic_flow_latency_intermediate_val; // get the corresponding attribute where the latency constraint is stored - pugi::xml_attribute max_traffic_flow_latency_attribute = pugiutil::get_attribute(single_flow_tag, "latency_cons", loc_data, pugiutil::OPTIONAL); + pugi::xml_attribute max_traffic_flow_latency_attribute + = pugiutil::get_attribute(single_flow_tag, "latency_cons", loc_data, pugiutil::OPTIONAL); // check if the attribute value was provided if (max_traffic_flow_latency_attribute) { @@ -165,7 +178,8 @@ int get_traffic_flow_priority(pugi::xml_node single_flow_tag, const pugiutil::lo int traffic_flow_priority = 1; // get the corresponding attribute where the priority is stored - pugi::xml_attribute traffic_flow_priority_attribute = pugiutil::get_attribute(single_flow_tag, "priority", loc_data, pugiutil::OPTIONAL); + pugi::xml_attribute traffic_flow_priority_attribute + = pugiutil::get_attribute(single_flow_tag, "priority", loc_data, pugiutil::OPTIONAL); // check if the attribute value was provided if (traffic_flow_priority_attribute) { @@ -176,49 +190,65 @@ int get_traffic_flow_priority(pugi::xml_node single_flow_tag, const pugiutil::lo return traffic_flow_priority; } -void verify_traffic_flow_router_modules(const std::string& source_router_name, const std::string& sink_router_name, pugi::xml_node single_flow_tag, const pugiutil::loc_data& loc_data) { +void verify_traffic_flow_router_modules(const std::string& source_router_name, + const std::string& sink_router_name, + pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data) { // check that the source router module name is not empty if (source_router_name == "") { - vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), "Invalid name for the source NoC router module."); + vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), + "Invalid name for the source NoC router module."); } // check that the sink router module name is not empty if (sink_router_name == "") { - vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), "Invalid name for the sink NoC router module."); + vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), + "Invalid name for the sink NoC router module."); } // check if the source and sink routers have the same name if (source_router_name == sink_router_name) { // Cannot have the source and sink routers have the same name (they need to be different). A flow cant go to a single router. - vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), "Source and sink NoC routers cannot be the same modules."); + vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), + "Source and sink NoC routers cannot be the same modules."); } } -void verify_traffic_flow_properties(double traffic_flow_bandwidth, double max_traffic_flow_latency, int traffic_flow_priority, pugi::xml_node single_flow_tag, const pugiutil::loc_data& loc_data) { +void verify_traffic_flow_properties(double traffic_flow_bandwidth, + double max_traffic_flow_latency, + int traffic_flow_priority, + pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data) { // check that the bandwidth is a positive value if (traffic_flow_bandwidth <= 0.) { - vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), "The traffic flow bandwidths are expected to be a non-zero positive floating point or integer values."); + vpr_throw( + VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), + "The traffic flow bandwidths are expected to be a non-zero positive floating point or integer values."); } // check that the latency constraint is also a positive value if (max_traffic_flow_latency <= 0.) { - vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), "The latency constraints need to be a non-zero positive floating point or integer values."); + vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), + "The latency constraints need to be a non-zero positive floating point or integer values."); } // check that the priority is a positive non-zero value if (traffic_flow_priority <= 0) { - vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), "The traffic flow priorities expected to be positive, non-zero integer values."); + vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), + "The traffic flow priorities expected to be positive, non-zero integer values."); } } -ClusterBlockId get_router_module_cluster_id(const std::string& router_module_name, - const ClusteringContext& cluster_ctx, - pugi::xml_node single_flow_tag, - const pugiutil::loc_data& loc_data, - const std::vector& cluster_blocks_compatible_with_noc_router_tiles) { +ClusterBlockId get_router_module_cluster_id( + const std::string& router_module_name, + const ClusteringContext& cluster_ctx, + pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data, + const std::vector& cluster_blocks_compatible_with_noc_router_tiles) { ClusterBlockId router_module_id = ClusterBlockId::INVALID(); // Given a regex pattern, use it to match a name of a cluster router block within the clustered netlist. If a matching cluster block is found, then return its cluster block id. try { - router_module_id = cluster_ctx.clb_nlist.find_block_by_name_fragment(router_module_name, cluster_blocks_compatible_with_noc_router_tiles); + router_module_id = cluster_ctx.clb_nlist.find_block_by_name_fragment( + router_module_name, cluster_blocks_compatible_with_noc_router_tiles); } catch (const std::regex_error& error) { // if there was an error with matching the regex string,report it to the user here vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), error.what()); @@ -227,13 +257,19 @@ ClusterBlockId get_router_module_cluster_id(const std::string& router_module_nam // check if a valid block id was found if (router_module_id == ClusterBlockId::INVALID()) { // if here then the module did not exist in the design, so throw an error - vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), "The router module '%s' does not exist in the design.", router_module_name.c_str()); + vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), + "The router module '%s' does not exist in the design.", router_module_name.c_str()); } return router_module_id; } -void check_traffic_flow_router_module_type(const std::string& router_module_name, ClusterBlockId router_module_id, pugi::xml_node single_flow_tag, const pugiutil::loc_data& loc_data, const ClusteringContext& cluster_ctx, t_physical_tile_type_ptr noc_router_tile_type) { +void check_traffic_flow_router_module_type(const std::string& router_module_name, + ClusterBlockId router_module_id, + pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data, + const ClusteringContext& cluster_ctx, + t_physical_tile_type_ptr noc_router_tile_type) { // get the logical type of the provided router module t_logical_block_type_ptr router_module_logical_type = cluster_ctx.clb_nlist.block_type(router_module_id); @@ -244,7 +280,8 @@ void check_traffic_flow_router_module_type(const std::string& router_module_name * router so throw an error. */ if (!is_tile_compatible(noc_router_tile_type, router_module_logical_type)) { - vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), "The supplied module name '%s' is not a NoC router.", router_module_name.c_str()); + vpr_throw(VPR_ERROR_OTHER, loc_data.filename_c_str(), loc_data.line(single_flow_tag), + "The supplied module name '%s' is not a NoC router.", router_module_name.c_str()); } } @@ -262,7 +299,9 @@ t_physical_tile_type_ptr get_physical_type_of_noc_router_tile(const DeviceContex physical_noc_router->get_router_layer_position()}); } -bool check_that_all_router_blocks_have_an_associated_traffic_flow(NocContext& noc_ctx, t_physical_tile_type_ptr noc_router_tile_type, const std::string& noc_flows_file) { +bool check_that_all_router_blocks_have_an_associated_traffic_flow(NocContext& noc_ctx, + t_physical_tile_type_ptr noc_router_tile_type, + const std::string& noc_flows_file) { bool result = true; // contains the number of all the noc router blocks in the design @@ -274,7 +313,7 @@ bool check_that_all_router_blocks_have_an_associated_traffic_flow(NocContext& no /* * Go through the router subtiles and get the router logical block types the subtiles support. Then determine how many of each router logical block types there are in the clustered netlist. The accumulated sum of all these clusters is the total number of router blocks in the design. */ - for (const auto & noc_router_subtile : *noc_router_subtiles) { + for (const auto& noc_router_subtile : *noc_router_subtiles) { for (auto router_logical_block : noc_router_subtile.equivalent_sites) { // get the number of logical blocks in the design of the current logical block type number_of_router_blocks_in_design += clustered_netlist_stats.num_blocks_type[router_logical_block->index]; @@ -288,8 +327,13 @@ bool check_that_all_router_blocks_have_an_associated_traffic_flow(NocContext& no * otherwise throw a warning to let the user know. If there aren't * any traffic flows for any routers then the NoC is not being used. */ - if (noc_ctx.noc_traffic_flows_storage.get_number_of_routers_used_in_traffic_flows() != number_of_router_blocks_in_design) { - VTR_LOG_WARN("NoC traffic flows file '%s' does not contain all router modules in the design. Every router module in the design must be part of a traffic flow (communicating to another router). Otherwise the router is unused.\n", noc_flows_file.c_str()); + if (noc_ctx.noc_traffic_flows_storage.get_number_of_routers_used_in_traffic_flows() + != number_of_router_blocks_in_design) { + VTR_LOG_WARN( + "NoC traffic flows file '%s' does not contain all router modules in the design. Every router module in the " + "design must be part of a traffic flow (communicating to another router). Otherwise the router is " + "unused.\n", + noc_flows_file.c_str()); result = false; } @@ -297,7 +341,9 @@ bool check_that_all_router_blocks_have_an_associated_traffic_flow(NocContext& no return result; } -std::vector get_cluster_blocks_compatible_with_noc_router_tiles(const ClusteringContext& cluster_ctx, t_physical_tile_type_ptr noc_router_tile_type) { +std::vector get_cluster_blocks_compatible_with_noc_router_tiles( + const ClusteringContext& cluster_ctx, + t_physical_tile_type_ptr noc_router_tile_type) { // get the ids of all cluster blocks in the netlist auto cluster_netlist_blocks = cluster_ctx.clb_nlist.blocks(); diff --git a/vpr/src/noc/read_xml_noc_traffic_flows_file.h b/vpr/src/noc/read_xml_noc_traffic_flows_file.h index 2d8b348ad71..624561189d0 100644 --- a/vpr/src/noc/read_xml_noc_traffic_flows_file.h +++ b/vpr/src/noc/read_xml_noc_traffic_flows_file.h @@ -77,7 +77,12 @@ void read_xml_noc_traffic_flows_file(const char* noc_flows_file); * blocks in the netlist that are * compatible with a noc router tile. */ -void process_single_flow(pugi::xml_node single_flow_tag, const pugiutil::loc_data& loc_data, const ClusteringContext& cluster_ctx, NocContext& noc_ctx, t_physical_tile_type_ptr noc_router_tile_type, const std::vector& cluster_blocks_compatible_with_noc_router_tiles); +void process_single_flow(pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data, + const ClusteringContext& cluster_ctx, + NocContext& noc_ctx, + t_physical_tile_type_ptr noc_router_tile_type, + const std::vector& cluster_blocks_compatible_with_noc_router_tiles); /** * @brief Retrieves the user provided bandwidth for the traffic @@ -137,7 +142,10 @@ int get_traffic_flow_priority(pugi::xml_node single_flow_tag, const pugiutil::lo * @param loc_data Contains location data about the current line in the xml * file. Passed in for error logging. */ -void verify_traffic_flow_router_modules(const std::string& source_router_name, const std::string& sink_router_name, pugi::xml_node single_flow_tag, const pugiutil::loc_data& loc_data); +void verify_traffic_flow_router_modules(const std::string& source_router_name, + const std::string& sink_router_name, + pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data); /** * @brief Ensures the traffic flow's bandwidth, latency constraint and @@ -154,7 +162,11 @@ void verify_traffic_flow_router_modules(const std::string& source_router_name, c * @param loc_data Contains location data about the current line in the xml * file. Passed in for error logging. */ -void verify_traffic_flow_properties(double traffic_flow_bandwidth, double max_traffic_flow_latency, int traffic_flow_priority, pugi::xml_node single_flow_tag, const pugiutil::loc_data& loc_data); +void verify_traffic_flow_properties(double traffic_flow_bandwidth, + double max_traffic_flow_latency, + int traffic_flow_priority, + pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data); /** * @brief Given a router module name in the design, retrieve the @@ -176,11 +188,12 @@ void verify_traffic_flow_properties(double traffic_flow_bandwidth, double max_tr * @return ClusterBlockId The corresponding router block id of the provided * router module name. */ -ClusterBlockId get_router_module_cluster_id(const std::string& router_module_name, - const ClusteringContext& cluster_ctx, - pugi::xml_node single_flow_tag, - const pugiutil::loc_data& loc_data, - const std::vector& cluster_blocks_compatible_with_noc_router_tiles); +ClusterBlockId get_router_module_cluster_id( + const std::string& router_module_name, + const ClusteringContext& cluster_ctx, + pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data, + const std::vector& cluster_blocks_compatible_with_noc_router_tiles); /** * @brief Checks to see whether a given router block is compatible with a NoC @@ -203,7 +216,12 @@ ClusterBlockId get_router_module_cluster_id(const std::string& router_module_nam * FPGA. Used to check if the router block is * compatible with a router tile. */ -void check_traffic_flow_router_module_type(const std::string& router_module_name, ClusterBlockId router_module_id, pugi::xml_node single_flow_tag, const pugiutil::loc_data& loc_data, const ClusteringContext& cluster_ctx, t_physical_tile_type_ptr noc_router_tile_type); +void check_traffic_flow_router_module_type(const std::string& router_module_name, + ClusterBlockId router_module_id, + pugi::xml_node single_flow_tag, + const pugiutil::loc_data& loc_data, + const ClusteringContext& cluster_ctx, + t_physical_tile_type_ptr noc_router_tile_type); /** * @brief Retrieves the physical type of a noc router tile. @@ -236,7 +254,9 @@ t_physical_tile_type_ptr get_physical_type_of_noc_router_tile(const DeviceContex * associated traffic flow. False means there are some router * blocks that do not have a an associated traffic flow. */ -bool check_that_all_router_blocks_have_an_associated_traffic_flow(NocContext& noc_ctx, t_physical_tile_type_ptr noc_router_tile_type, const std::string& noc_flows_file); +bool check_that_all_router_blocks_have_an_associated_traffic_flow(NocContext& noc_ctx, + t_physical_tile_type_ptr noc_router_tile_type, + const std::string& noc_flows_file); /** * @brief Goes through the blocks within the clustered netlist and identifies @@ -255,6 +275,8 @@ bool check_that_all_router_blocks_have_an_associated_traffic_flow(NocContext& no * clusters within the netlist that * are compatible with a NoC router tile. */ -std::vector get_cluster_blocks_compatible_with_noc_router_tiles(const ClusteringContext& cluster_ctx, t_physical_tile_type_ptr noc_router_tile_type); +std::vector get_cluster_blocks_compatible_with_noc_router_tiles( + const ClusteringContext& cluster_ctx, + t_physical_tile_type_ptr noc_router_tile_type); #endif \ No newline at end of file diff --git a/vpr/src/noc/sat_routing.cpp b/vpr/src/noc/sat_routing.cpp index 354620c6cfa..bc9dccfe63c 100644 --- a/vpr/src/noc/sat_routing.cpp +++ b/vpr/src/noc/sat_routing.cpp @@ -1,6 +1,5 @@ #ifdef ENABLE_NOC_SAT_ROUTING - #include "sat_routing.h" #include "turn_model_routing.h" @@ -22,7 +21,6 @@ namespace orsat = operations_research::sat; */ typedef std::unordered_map, orsat::BoolVar> t_flow_link_var_map; - /** * @brief Creates a boolean variable for each (traffic flow, link) pair. * It also create integer variables for latency-constrained traffic flows. @@ -38,7 +36,7 @@ typedef std::unordered_map, orsat::BoolVa */ static void create_flow_link_vars(orsat::CpModelBuilder& cp_model, t_flow_link_var_map& flow_link_vars, - std::map& latency_overrun_vars); + std::map& latency_overrun_vars); /** * @brief Translates a latency constraint for a traffic flow to the maximum number @@ -84,7 +82,7 @@ static std::vector get_flow_link_vars(const t_flow_link_var_map& */ static void constrain_latency_overrun_vars(orsat::CpModelBuilder& cp_model, t_flow_link_var_map& flow_link_vars, - std::map& latency_overrun_vars); + std::map& latency_overrun_vars); /** * @brief Forbids specific turns that traffic flows can take. @@ -98,8 +96,7 @@ static void constrain_latency_overrun_vars(orsat::CpModelBuilder& cp_model, * @param cp_model The CP model builder object. New constraints are added * to this model builder object. */ -static void forbid_illegal_turns(t_flow_link_var_map& flow_link_vars, - orsat::CpModelBuilder& cp_model); +static void forbid_illegal_turns(t_flow_link_var_map& flow_link_vars, orsat::CpModelBuilder& cp_model); /** * @brief Creates a boolean variable for each link to indicate @@ -118,7 +115,7 @@ static void forbid_illegal_turns(t_flow_link_var_map& flow_link_vars, * @param bandwidth_resolution Specifies the resolution by which bandwidth * values are quantized. */ -static void create_congested_link_vars(vtr::vector& congested_link_vars, +static void create_congested_link_vars(vtr::vector& congested_link_vars, t_flow_link_var_map& flow_link_vars, orsat::CpModelBuilder& cp_model, int bandwidth_resolution); @@ -143,8 +140,7 @@ static vtr::vector quantize_traffic_flow_bandwidths(int b * @param cp_model The CP model builder object. New constraints are added * to this model builder object. */ -static void add_continuity_constraints(t_flow_link_var_map& flow_link_vars, - orsat::CpModelBuilder& cp_model); +static void add_continuity_constraints(t_flow_link_var_map& flow_link_vars, orsat::CpModelBuilder& cp_model); /** * @brief Creates a linear expression to be minimized by the SAT solver. @@ -172,8 +168,8 @@ static void add_continuity_constraints(t_flow_link_var_map& flow_link_vars, */ static orsat::LinearExpr create_objective(orsat::CpModelBuilder& cp_model, t_flow_link_var_map& flow_link_vars, - std::map& latency_overrun_vars, - vtr::vector& congested_link_vars, + std::map& latency_overrun_vars, + vtr::vector& congested_link_vars, int bandwidth_resolution, int latency_overrun_weight, int congestion_weight, @@ -193,8 +189,9 @@ static orsat::LinearExpr create_objective(orsat::CpModelBuilder& cp_model, * of (traffic flow, link) variables. * @return Traffic flow routes. NoC links may not be stored in the route traversal order. */ -static vtr::vector> convert_vars_to_routes(t_flow_link_var_map& flow_link_vars, - const orsat::CpSolverResponse& response); +static vtr::vector> convert_vars_to_routes( + t_flow_link_var_map& flow_link_vars, + const orsat::CpSolverResponse& response); /** * @brief Sorts the given NoC links so that they can traversed one after another. @@ -211,7 +208,6 @@ static vtr::vector> convert_vars_to_rou */ static std::vector sort_noc_links_in_chain_order(const std::vector& links); - static std::vector get_flow_link_vars(const t_flow_link_var_map& map, const std::vector& traffic_flow_ids, const std::vector& noc_link_ids) { @@ -228,12 +224,11 @@ static std::vector get_flow_link_vars(const t_flow_link_var_map& return results; } -static void forbid_illegal_turns(t_flow_link_var_map& flow_link_vars, - orsat::CpModelBuilder& cp_model) { +static void forbid_illegal_turns(t_flow_link_var_map& flow_link_vars, orsat::CpModelBuilder& cp_model) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& traffic_flow_storage = noc_ctx.noc_traffic_flows_storage; - auto noc_routing_alg = dynamic_cast (noc_ctx.noc_flows_router.get()); + auto noc_routing_alg = dynamic_cast(noc_ctx.noc_flows_router.get()); // ensure that the routing algorithm is a turn model algorithm VTR_ASSERT(noc_routing_alg != nullptr); @@ -256,7 +251,7 @@ static vtr::vector quantize_traffic_flow_bandwidths(int b //TODO: support heterogeneous bandwidth const auto& noc_links = noc_ctx.noc_model.get_noc_links(); const double link_bandwidth = noc_links.front().get_bandwidth(); - auto it = std::adjacent_find(noc_links.begin(), noc_links.end(), [](const NocLink& a, const NocLink& b){ + auto it = std::adjacent_find(noc_links.begin(), noc_links.end(), [](const NocLink& a, const NocLink& b) { return a.get_bandwidth() != b.get_bandwidth(); }); @@ -266,8 +261,8 @@ static vtr::vector quantize_traffic_flow_bandwidths(int b VTR_LOG_ERROR( "SAT router assumes all NoC links have the same bandwidth. " "NoC links %d and %d have different bandwidth: %g and %g", - (size_t)first_link.get_link_id(), (size_t)second_link.get_link_id(), - first_link.get_bandwidth(), second_link.get_bandwidth()); + (size_t)first_link.get_link_id(), (size_t)second_link.get_link_id(), first_link.get_bandwidth(), + second_link.get_bandwidth()); } vtr::vector rescaled_traffic_flow_bandwidths; @@ -281,10 +276,10 @@ static vtr::vector quantize_traffic_flow_bandwidths(int b rescaled_traffic_flow_bandwidths[traffic_flow_id] = rescaled_bandwidth; } - return rescaled_traffic_flow_bandwidths; + return rescaled_traffic_flow_bandwidths; } -static void create_congested_link_vars(vtr::vector& congested_link_vars, +static void create_congested_link_vars(vtr::vector& congested_link_vars, t_flow_link_var_map& flow_link_vars, orsat::CpModelBuilder& cp_model, int bandwidth_resolution) { @@ -292,7 +287,8 @@ static void create_congested_link_vars(vtr::vector& const auto& traffic_flow_storage = noc_ctx.noc_traffic_flows_storage; // quantize traffic flow bandwidth - vtr::vector rescaled_traffic_flow_bandwidths = quantize_traffic_flow_bandwidths(bandwidth_resolution); + vtr::vector rescaled_traffic_flow_bandwidths + = quantize_traffic_flow_bandwidths(bandwidth_resolution); // go over all NoC links and create a boolean variable for each one to indicate if it is congested for (const auto& noc_link : noc_ctx.noc_model.get_noc_links()) { @@ -312,8 +308,7 @@ static void create_congested_link_vars(vtr::vector& } } -static void add_continuity_constraints(t_flow_link_var_map& flow_link_vars, - orsat::CpModelBuilder& cp_model) { +static void add_continuity_constraints(t_flow_link_var_map& flow_link_vars, orsat::CpModelBuilder& cp_model) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& traffic_flow_storage = noc_ctx.noc_traffic_flows_storage; const auto& place_ctx = g_vpr_ctx.placement(); @@ -328,8 +323,10 @@ static void add_continuity_constraints(t_flow_link_var_map& flow_link_vars, ClusterBlockId logical_sink_router_block_id = traffic_flow.sink_router_cluster_id; // get the ids of the hard router blocks where the logical router cluster blocks have been placed - NocRouterId source_router_id = noc_ctx.noc_model.get_router_at_grid_location(place_ctx.block_locs[logical_source_router_block_id].loc); - NocRouterId sink_router_id = noc_ctx.noc_model.get_router_at_grid_location(place_ctx.block_locs[logical_sink_router_block_id].loc); + NocRouterId source_router_id + = noc_ctx.noc_model.get_router_at_grid_location(place_ctx.block_locs[logical_source_router_block_id].loc); + NocRouterId sink_router_id + = noc_ctx.noc_model.get_router_at_grid_location(place_ctx.block_locs[logical_sink_router_block_id].loc); // exactly one outgoing link of the source must be selected const auto& src_outgoing_link_ids = noc_ctx.noc_model.get_noc_router_outgoing_links(source_router_id); @@ -351,7 +348,6 @@ static void add_continuity_constraints(t_flow_link_var_map& flow_link_vars, continue; } - // for each intermediate router, at most one incoming link can be activated to route this traffic flow const auto& incoming_links = noc_ctx.noc_model.get_noc_router_incoming_links(noc_router_id); auto incoming_vars = get_flow_link_vars(flow_link_vars, {traffic_flow_id}, incoming_links); @@ -386,8 +382,8 @@ static std::vector sort_noc_links_in_chain_order(const std::vector src_map; - std::unordered_map is_dst; + std::unordered_map src_map; + std::unordered_map is_dst; for (const auto l : links) { NocRouterId src_router_id = noc_model.get_single_noc_link(l).get_source_router(); NocRouterId dst_router_id = noc_model.get_single_noc_link(l).get_sink_router(); @@ -421,13 +417,14 @@ static std::vector sort_noc_links_in_chain_order(const std::vector> convert_vars_to_routes(t_flow_link_var_map& flow_link_vars, - const orsat::CpSolverResponse& response) { +static vtr::vector> convert_vars_to_routes( + t_flow_link_var_map& flow_link_vars, + const orsat::CpSolverResponse& response) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& traffic_flow_storage = noc_ctx.noc_traffic_flows_storage; - VTR_ASSERT(response.status() == orsat::CpSolverStatus::FEASIBLE || - response.status() == orsat::CpSolverStatus::OPTIMAL); + VTR_ASSERT(response.status() == orsat::CpSolverStatus::FEASIBLE + || response.status() == orsat::CpSolverStatus::OPTIMAL); vtr::vector> routes; routes.resize(traffic_flow_storage.get_number_of_traffic_flows()); @@ -449,7 +446,7 @@ static vtr::vector> convert_vars_to_rou static void create_flow_link_vars(orsat::CpModelBuilder& cp_model, t_flow_link_var_map& flow_link_vars, - std::map& latency_overrun_vars) { + std::map& latency_overrun_vars) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& noc_model = noc_ctx.noc_model; const auto& traffic_flow_storage = noc_ctx.noc_traffic_flows_storage; @@ -459,20 +456,23 @@ static void create_flow_link_vars(orsat::CpModelBuilder& cp_model, const auto& cluster_ctx = g_vpr_ctx.clustering(); // Get the logical block type for router - const auto router_block_type = cluster_ctx.clb_nlist.block_type(noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist()[0]); + const auto router_block_type + = cluster_ctx.clb_nlist.block_type(noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist()[0]); // Get the compressed grid for NoC const auto& compressed_noc_grid = place_ctx.compressed_block_grids[router_block_type->index]; - size_t max_n_cols = std::max_element(compressed_noc_grid.compressed_to_grid_x.begin(), compressed_noc_grid.compressed_to_grid_x.end(), - [](const std::vector& a, const std::vector& b) { - return a.size() < b.size(); - })->size(); + size_t max_n_cols + = std::max_element(compressed_noc_grid.compressed_to_grid_x.begin(), + compressed_noc_grid.compressed_to_grid_x.end(), + [](const std::vector& a, const std::vector& b) { return a.size() < b.size(); }) + ->size(); - size_t max_n_rows = std::max_element(compressed_noc_grid.compressed_to_grid_y.begin(), compressed_noc_grid.compressed_to_grid_y.end(), - [](const std::vector& a, const std::vector& b) { - return a.size() < b.size(); - })->size(); + size_t max_n_rows + = std::max_element(compressed_noc_grid.compressed_to_grid_y.begin(), + compressed_noc_grid.compressed_to_grid_y.end(), + [](const std::vector& a, const std::vector& b) { return a.size() < b.size(); }) + ->size(); /* For specifying the domain, assume that the longest traffic flow route starts from * one corner and terminates at the opposite corner. Assuming minimal routing, such a @@ -522,9 +522,8 @@ static int comp_max_number_of_traversed_links(NocTrafficFlowId traffic_flow_id) router_it->get_router_user_id(), router_it->get_latency()); } - auto link_it = std::find_if(noc_links.begin(), noc_links.end(), [noc_link_latency](const NocLink& l) { - return (noc_link_latency != l.get_latency()); - }); + auto link_it = std::find_if(noc_links.begin(), noc_links.end(), + [noc_link_latency](const NocLink& l) { return (noc_link_latency != l.get_latency()); }); if (link_it != noc_links.end()) { VTR_LOG_ERROR( @@ -537,22 +536,24 @@ static int comp_max_number_of_traversed_links(NocTrafficFlowId traffic_flow_id) VTR_ASSERT(traffic_flow_latency_constraint < NocTrafficFlows::DEFAULT_MAX_TRAFFIC_FLOW_LATENCY); - int n_max_links = std::floor((traffic_flow_latency_constraint - noc_router_latency) / (noc_link_latency + noc_router_latency)); + int n_max_links + = std::floor((traffic_flow_latency_constraint - noc_router_latency) / (noc_link_latency + noc_router_latency)); return n_max_links; } static void constrain_latency_overrun_vars(orsat::CpModelBuilder& cp_model, t_flow_link_var_map& flow_link_vars, - std::map& latency_overrun_vars) { + std::map& latency_overrun_vars) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& noc_model = noc_ctx.noc_model; for (auto& [traffic_flow_id, latency_overrun_var] : latency_overrun_vars) { int n_max_links = comp_max_number_of_traversed_links(traffic_flow_id); // get all boolean variables for this traffic flow - auto link_vars = get_flow_link_vars(flow_link_vars, {traffic_flow_id}, - {noc_model.get_noc_links().keys().begin(), noc_model.get_noc_links().keys().end()}); + auto link_vars + = get_flow_link_vars(flow_link_vars, {traffic_flow_id}, + {noc_model.get_noc_links().keys().begin(), noc_model.get_noc_links().keys().end()}); orsat::LinearExpr latency_overrun_expr; // count the number of activated links for this traffic flow @@ -569,8 +570,8 @@ static void constrain_latency_overrun_vars(orsat::CpModelBuilder& cp_model, static orsat::LinearExpr create_objective(orsat::CpModelBuilder& cp_model, t_flow_link_var_map& flow_link_vars, - std::map& latency_overrun_vars, - vtr::vector& congested_link_vars, + std::map& latency_overrun_vars, + vtr::vector& congested_link_vars, int bandwidth_resolution, int latency_overrun_weight, int congestion_weight, @@ -603,7 +604,6 @@ static orsat::LinearExpr create_objective(orsat::CpModelBuilder& cp_model, agg_bw_expr = 0; } - orsat::LinearExpr congested_link_sum = orsat::LinearExpr::Sum(congested_link_vars); congested_link_sum *= congestion_weight; @@ -611,7 +611,6 @@ static orsat::LinearExpr create_objective(orsat::CpModelBuilder& cp_model, return objective; } - vtr::vector> noc_sat_route(bool minimize_aggregate_bandwidth, const t_noc_opts& noc_opts, int seed) { @@ -642,15 +641,15 @@ vtr::vector> noc_sat_route(bool minimiz forbid_illegal_turns(flow_link_vars, cp_model); - create_congested_link_vars(link_congested_vars, flow_link_vars, cp_model, noc_opts.noc_sat_routing_bandwidth_resolution); + create_congested_link_vars(link_congested_vars, flow_link_vars, cp_model, + noc_opts.noc_sat_routing_bandwidth_resolution); add_continuity_constraints(flow_link_vars, cp_model); auto objective = create_objective(cp_model, flow_link_vars, latency_overrun_vars, link_congested_vars, noc_opts.noc_sat_routing_bandwidth_resolution, noc_opts.noc_sat_routing_latency_overrun_weighting, - noc_opts.noc_sat_routing_congestion_weighting, - minimize_aggregate_bandwidth); + noc_opts.noc_sat_routing_congestion_weighting, minimize_aggregate_bandwidth); cp_model.Minimize(objective); @@ -666,8 +665,7 @@ vtr::vector> noc_sat_route(bool minimiz orsat::CpSolverResponse response = orsat::SolveCpModel(cp_model.Build(), &model); - if (response.status() == orsat::CpSolverStatus::FEASIBLE || - response.status() == orsat::CpSolverStatus::OPTIMAL) { + if (response.status() == orsat::CpSolverStatus::FEASIBLE || response.status() == orsat::CpSolverStatus::OPTIMAL) { auto routes = convert_vars_to_routes(flow_link_vars, response); return routes; } diff --git a/vpr/src/noc/sat_routing.h b/vpr/src/noc/sat_routing.h index 945b5a0aabe..7abf5b965ff 100644 --- a/vpr/src/noc/sat_routing.h +++ b/vpr/src/noc/sat_routing.h @@ -66,6 +66,5 @@ struct hash> { }; } // namespace std - #endif #endif \ No newline at end of file diff --git a/vpr/src/noc/turn_model_routing.cpp b/vpr/src/noc/turn_model_routing.cpp index d9b169a0896..59f4461d58c 100644 --- a/vpr/src/noc/turn_model_routing.cpp +++ b/vpr/src/noc/turn_model_routing.cpp @@ -11,9 +11,7 @@ size_t TurnModelRouting::get_hash_value(NocRouterId src_router_id, inputs_to_murmur3_hasher.clear(); // used to cast vtr::StrongId types to uint32_t - auto cast_to_uint32 = [](const auto& input) { - return static_cast(static_cast(input)); - }; + auto cast_to_uint32 = [](const auto& input) { return static_cast(static_cast(input)); }; // insert IDs into the vector inputs_to_murmur3_hasher.push_back(cast_to_uint32(src_router_id)); @@ -62,28 +60,25 @@ void TurnModelRouting::route_flow(NocRouterId src_router_id, t_physical_tile_loc curr_router_pos = curr_router.get_router_physical_location(); // get all directions that moves us closer to the destination router - const auto& legal_directions = get_legal_directions(src_router_id, curr_router_id, dst_router_id, prev_dir, noc_model); + const auto& legal_directions + = get_legal_directions(src_router_id, curr_router_id, dst_router_id, prev_dir, noc_model); // select the next direction from the available options - TurnModelRouting::Direction next_step_direction = select_next_direction(legal_directions, - src_router_id, - dst_router_id, - curr_router_id, - traffic_flow_id, - noc_model); + TurnModelRouting::Direction next_step_direction = select_next_direction( + legal_directions, src_router_id, dst_router_id, curr_router_id, traffic_flow_id, noc_model); - NocLinkId next_link = move_to_next_router(curr_router_id, curr_router_pos, next_step_direction, visited_routers, noc_model); + NocLinkId next_link + = move_to_next_router(curr_router_id, curr_router_pos, next_step_direction, visited_routers, noc_model); if (next_link) { flow_route.push_back(next_link); prev_dir = next_step_direction; } else { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "No route could be found from starting router with ID:'%d' " + VPR_FATAL_ERROR(VPR_ERROR_OTHER, + "No route could be found from starting router with ID:'%d' " "and the destination router with ID:'%d' using the XY-Routing algorithm.", - src_router.get_router_user_id(), - dst_router.get_router_user_id()); + src_router.get_router_user_id(), dst_router.get_router_user_id()); } - } } @@ -200,7 +195,7 @@ uint32_t TurnModelRouting::murmur3_32(const std::vector& key, uint32_t // A swap is *not* necessary here because the preceding loop already // places the low bytes in the low places according to whatever endianness // we use. Swaps only apply when the memory is copied in a chunk. -// h ^= murmur_32_scramble(0); + // h ^= murmur_32_scramble(0); /* Finalize. */ h ^= key.size() * 4; h ^= h >> 16; @@ -211,7 +206,8 @@ uint32_t TurnModelRouting::murmur3_32(const std::vector& key, uint32_t return h; } -TurnModelRouting::Direction TurnModelRouting::select_y_direction(const std::vector& directions) { +TurnModelRouting::Direction TurnModelRouting::select_y_direction( + const std::vector& directions) { // iterate over the given iterations and return the first vertical one for (const auto& direction : directions) { if (direction == TurnModelRouting::Direction::SOUTH || direction == TurnModelRouting::Direction::NORTH) { @@ -223,7 +219,8 @@ TurnModelRouting::Direction TurnModelRouting::select_y_direction(const std::vect return TurnModelRouting::Direction::INVALID; } -TurnModelRouting::Direction TurnModelRouting::select_x_direction(const std::vector& directions) { +TurnModelRouting::Direction TurnModelRouting::select_x_direction( + const std::vector& directions) { // iterate over the given iterations and return the first horizontal one for (const auto& direction : directions) { if (direction == TurnModelRouting::Direction::EAST || direction == TurnModelRouting::Direction::WEST) { @@ -235,7 +232,8 @@ TurnModelRouting::Direction TurnModelRouting::select_x_direction(const std::vect return TurnModelRouting::Direction::INVALID; } -TurnModelRouting::Direction TurnModelRouting::select_z_direction(const std::vector& directions) { +TurnModelRouting::Direction TurnModelRouting::select_z_direction( + const std::vector& directions) { // iterate over the given iterations and return the first one along the z axis for (const auto& direction : directions) { if (direction == TurnModelRouting::Direction::UP || direction == TurnModelRouting::Direction::DOWN) { @@ -247,8 +245,9 @@ TurnModelRouting::Direction TurnModelRouting::select_z_direction(const std::vect return TurnModelRouting::Direction::INVALID; } -TurnModelRouting::Direction TurnModelRouting::select_direction_other_than(const std::vector& directions, - TurnModelRouting::Direction other_than) { +TurnModelRouting::Direction TurnModelRouting::select_direction_other_than( + const std::vector& directions, + TurnModelRouting::Direction other_than) { // Iterate over all given directions and return the first one which is not "other_than" for (const auto& direction : directions) { if (direction != other_than) { @@ -260,7 +259,8 @@ TurnModelRouting::Direction TurnModelRouting::select_direction_other_than(const return TurnModelRouting::Direction::INVALID; } -std::vector> TurnModelRouting::get_all_illegal_turns(const NocStorage& noc_model) const { +std::vector> TurnModelRouting::get_all_illegal_turns( + const NocStorage& noc_model) const { std::vector> illegal_turns; /* Iterate over all sets of three routers that can be traversed in sequence. @@ -295,12 +295,13 @@ std::vector> TurnModelRouting::get_all_illegal_t return illegal_turns; } -TurnModelRouting::Direction TurnModelRouting::select_next_direction(const std::vector& legal_directions, - NocRouterId src_router_id, - NocRouterId dst_router_id, - NocRouterId curr_router_id, - NocTrafficFlowId traffic_flow_id, - const NocStorage& noc_model) { +TurnModelRouting::Direction TurnModelRouting::select_next_direction( + const std::vector& legal_directions, + NocRouterId src_router_id, + NocRouterId dst_router_id, + NocRouterId curr_router_id, + NocTrafficFlowId traffic_flow_id, + const NocStorage& noc_model) { // get current and destination NoC routers const auto& curr_router = noc_model.get_single_noc_router(curr_router_id); const auto& dst_router = noc_model.get_single_noc_router(dst_router_id); @@ -325,7 +326,6 @@ TurnModelRouting::Direction TurnModelRouting::select_next_direction(const std::v int hash_val_remainder = hash_val % manhattan_dist; - TurnModelRouting::Direction selected_direction = TurnModelRouting::Direction::INVALID; if (hash_val_remainder < delta_x) { diff --git a/vpr/src/noc/turn_model_routing.h b/vpr/src/noc/turn_model_routing.h index ce061a56eed..3fc178540e8 100644 --- a/vpr/src/noc/turn_model_routing.h +++ b/vpr/src/noc/turn_model_routing.h @@ -122,14 +122,14 @@ class TurnModelRouting : public NocRouting { * choose to travel. */ enum class Direction { - WEST, /*!< Moving towards the negative X-axis*/ - EAST, /*!< Moving towards the positive X-axis*/ - NORTH, /*!< Moving towards the positive Y-axis*/ - SOUTH, /*!< Moving towards the negative Y-axis*/ - UP, /*!< Moving towards the positive Z-axis*/ - DOWN, /*!< Moving towards the negative Z-axis*/ + WEST, /*!< Moving towards the negative X-axis*/ + EAST, /*!< Moving towards the positive X-axis*/ + NORTH, /*!< Moving towards the positive Y-axis*/ + SOUTH, /*!< Moving towards the negative Y-axis*/ + UP, /*!< Moving towards the positive Z-axis*/ + DOWN, /*!< Moving towards the negative Z-axis*/ N_DIRECTIONS, - INVALID /*!< Invalid direction*/ + INVALID /*!< Invalid direction*/ }; /** @@ -209,7 +209,6 @@ class TurnModelRouting : public NocRouting { std::unordered_set& visited_routers, const NocStorage& noc_model); - /** * @brief Computes MurmurHash3 for an array of 32-bit words initialized * with seed. As discussed in the comment at the top of this file, @@ -243,7 +242,8 @@ class TurnModelRouting : public NocRouting { NocRouterId curr_router_id, NocRouterId dst_router_id, TurnModelRouting::Direction prev_dir, - const NocStorage& noc_model) = 0; + const NocStorage& noc_model) + = 0; /** * @brief Selects a direction from legal directions. The traffic flow @@ -260,12 +260,13 @@ class TurnModelRouting : public NocRouting { * * @return Direction The direction to travel next */ - virtual TurnModelRouting::Direction select_next_direction(const std::vector& legal_directions, - NocRouterId src_router_id, - NocRouterId dst_router_id, - NocRouterId curr_router_id, - NocTrafficFlowId traffic_flow_id, - const NocStorage& noc_model); + virtual TurnModelRouting::Direction select_next_direction( + const std::vector& legal_directions, + NocRouterId src_router_id, + NocRouterId dst_router_id, + NocRouterId curr_router_id, + NocTrafficFlowId traffic_flow_id, + const NocStorage& noc_model); protected: // get_legal_directions() return a reference to this vector to avoid allocating a new vector @@ -274,7 +275,6 @@ class TurnModelRouting : public NocRouting { private: std::vector inputs_to_murmur3_hasher{4}; - }; #endif //VTR_TURN_MODEL_ROUTING_H diff --git a/vpr/src/noc/west_first_routing.cpp b/vpr/src/noc/west_first_routing.cpp index 95853c7e0c0..0301fa35fcc 100644 --- a/vpr/src/noc/west_first_routing.cpp +++ b/vpr/src/noc/west_first_routing.cpp @@ -2,11 +2,12 @@ WestFirstRouting::~WestFirstRouting() = default; -const std::vector& WestFirstRouting::get_legal_directions(NocRouterId /*src_router_id*/, - NocRouterId curr_router_id, - NocRouterId dst_router_id, - TurnModelRouting::Direction /*prev_dir*/, - const NocStorage& noc_model) { +const std::vector& WestFirstRouting::get_legal_directions( + NocRouterId /*src_router_id*/, + NocRouterId curr_router_id, + NocRouterId dst_router_id, + TurnModelRouting::Direction /*prev_dir*/, + const NocStorage& noc_model) { // get current and destination NoC routers const auto& curr_router = noc_model.get_single_noc_router(curr_router_id); const auto& dst_router = noc_model.get_single_noc_router(dst_router_id); @@ -48,10 +49,10 @@ const std::vector& WestFirstRouting::get_legal_dire returned_legal_direction.push_back(TurnModelRouting::Direction::DOWN); } } - } else { // 2D NoC + } else { // 2D NoC if (dst_router_pos.x < curr_router_pos.x) { returned_legal_direction.push_back(TurnModelRouting::Direction::WEST); - } else { // to the east or the same column + } else { // to the east or the same column if (dst_router_pos.x > curr_router_pos.x) { // not the same column returned_legal_direction.push_back(TurnModelRouting::Direction::EAST); } @@ -82,13 +83,12 @@ bool WestFirstRouting::is_turn_legal(const std::array z1 && x3 < x2) || (z2 < z1 && x3 < x2) || (z2 > z1 && y3 < y2) || - (z2 < z1 && y3 < y2) || (y2 > y1 && x3 < x2) || (x2 > x1 && y3 > y2)) { + if ((z2 > z1 && x3 < x2) || (z2 < z1 && x3 < x2) || (z2 > z1 && y3 < y2) || (z2 < z1 && y3 < y2) + || (y2 > y1 && x3 < x2) || (x2 > x1 && y3 > y2)) { return false; } - } else { // 2D NoC + } else { // 2D NoC /* In the west-first routing algorithm, once the traffic flow * moved in a vertical direction, it is no longer allowed to move * towards west. Therefore, if the first link was travelling in a @@ -99,6 +99,5 @@ bool WestFirstRouting::is_turn_legal(const std::array& XYRouting::get_legal_directions(NocRouterId /*src_router_id*/, - NocRouterId curr_router_id, - NocRouterId dst_router_id, - TurnModelRouting::Direction /*prev_dir*/, - const NocStorage& noc_model) { +const std::vector& XYRouting::get_legal_directions( + NocRouterId /*src_router_id*/, + NocRouterId curr_router_id, + NocRouterId dst_router_id, + TurnModelRouting::Direction /*prev_dir*/, + const NocStorage& noc_model) { // get current and destination NoC routers const auto& curr_router = noc_model.get_single_noc_router(curr_router_id); const auto& dst_router = noc_model.get_single_noc_router(dst_router_id); @@ -23,7 +24,7 @@ const std::vector& XYRouting::get_legal_directions( * the current router has the same x-coordinate as the * destination. Then we start moving along the y-axis. * Finally, we move along the z-axis. - */ + */ if (dst_router_pos.x > curr_router_pos.x) { return east_direction; @@ -42,13 +43,13 @@ const std::vector& XYRouting::get_legal_directions( } } -TurnModelRouting::Direction XYRouting::select_next_direction(const std::vector& legal_directions, - NocRouterId /*src_router_id*/, - NocRouterId /*dst_router_id*/, - NocRouterId /*curr_router_id*/, - NocTrafficFlowId /*traffic_flow_id*/, - const NocStorage& /*noc_model*/) { - +TurnModelRouting::Direction XYRouting::select_next_direction( + const std::vector& legal_directions, + NocRouterId /*src_router_id*/, + NocRouterId /*dst_router_id*/, + NocRouterId /*curr_router_id*/, + NocTrafficFlowId /*traffic_flow_id*/, + const NocStorage& /*noc_model*/) { if (legal_directions.size() == 1) { return legal_directions[0]; } diff --git a/vpr/src/noc/xy_routing.h b/vpr/src/noc/xy_routing.h index 7dee55b437c..de4ba554f78 100644 --- a/vpr/src/noc/xy_routing.h +++ b/vpr/src/noc/xy_routing.h @@ -87,7 +87,6 @@ #include "turn_model_routing.h" - class XYRouting : public TurnModelRouting { public: ~XYRouting() override; @@ -111,13 +110,12 @@ class XYRouting : public TurnModelRouting { private: const std::vector east_direction{TurnModelRouting::Direction::EAST}; - const std::vector west_direction {TurnModelRouting::Direction::WEST}; - const std::vector north_direction {TurnModelRouting::Direction::NORTH}; - const std::vector south_direction {TurnModelRouting::Direction::SOUTH}; - const std::vector up_direction {TurnModelRouting::Direction::UP}; - const std::vector down_direction {TurnModelRouting::Direction::DOWN}; - const std::vector no_direction {}; - + const std::vector west_direction{TurnModelRouting::Direction::WEST}; + const std::vector north_direction{TurnModelRouting::Direction::NORTH}; + const std::vector south_direction{TurnModelRouting::Direction::SOUTH}; + const std::vector up_direction{TurnModelRouting::Direction::UP}; + const std::vector down_direction{TurnModelRouting::Direction::DOWN}; + const std::vector no_direction{}; }; #endif \ No newline at end of file diff --git a/vpr/src/pack/attraction_groups.h b/vpr/src/pack/attraction_groups.h index 813d6e0fb1b..793694ba5a9 100644 --- a/vpr/src/pack/attraction_groups.h +++ b/vpr/src/pack/attraction_groups.h @@ -101,13 +101,9 @@ class AttractionInfo { int att_group_pulls = 1; }; -inline int AttractionInfo::get_att_group_pulls() const { - return att_group_pulls; -} +inline int AttractionInfo::get_att_group_pulls() const { return att_group_pulls; } -inline void AttractionInfo::set_att_group_pulls(int num_pulls) { - att_group_pulls = num_pulls; -} +inline void AttractionInfo::set_att_group_pulls(int num_pulls) { att_group_pulls = num_pulls; } inline AttractGroupId AttractionInfo::get_atom_attraction_group(const AtomBlockId atom_id) { return atom_attraction_group[atom_id]; @@ -118,9 +114,7 @@ inline void AttractionInfo::set_atom_attraction_group(const AtomBlockId atom_id, attraction_groups[group_id].group_atoms.push_back(atom_id); } -inline int AttractionInfo::num_attraction_groups() { - return attraction_groups.size(); -} +inline int AttractionInfo::num_attraction_groups() { return attraction_groups.size(); } inline float AttractionInfo::get_attraction_group_gain(const AttractGroupId group_id) { return attraction_groups[group_id].gain; diff --git a/vpr/src/pack/cluster.cpp b/vpr/src/pack/cluster.cpp index 93683858f3f..7c38ca77747 100644 --- a/vpr/src/pack/cluster.cpp +++ b/vpr/src/pack/cluster.cpp @@ -162,9 +162,7 @@ std::map do_clustering(const t_packer_opts& pa check_for_duplicate_inputs (); #endif - alloc_and_init_clustering(max_molecule_stats, - prepacker, - clustering_data, net_output_feeds_driving_block_input, + alloc_and_init_clustering(max_molecule_stats, prepacker, clustering_data, net_output_feeds_driving_block_input, unclustered_list_head_size, cluster_stats.num_molecules); auto primitive_candidate_block_types = identify_primitive_candidate_block_types(); @@ -180,22 +178,17 @@ std::map do_clustering(const t_packer_opts& pa vtr::vector atom_criticality(atom_ctx.nlist.blocks().size(), 0.); if (packer_opts.timing_driven) { - calc_init_packing_timing(packer_opts, analysis_opts, prepacker, - clustering_delay_calc, timing_info, atom_criticality); + calc_init_packing_timing(packer_opts, analysis_opts, prepacker, clustering_delay_calc, timing_info, + atom_criticality); } // Assign gain scores to atoms and sort them based on the scores. - auto seed_atoms = initialize_seed_atoms(packer_opts.cluster_seed_type, - max_molecule_stats, - prepacker, - atom_criticality); + auto seed_atoms + = initialize_seed_atoms(packer_opts.cluster_seed_type, max_molecule_stats, prepacker, atom_criticality); /* index of next most timing critical block */ int seed_index = 0; - istart = get_highest_gain_seed_molecule(seed_index, - seed_atoms, - prepacker, - cluster_legalizer); + istart = get_highest_gain_seed_molecule(seed_index, seed_atoms, prepacker, cluster_legalizer); print_pack_status_header(); @@ -211,8 +204,8 @@ std::map do_clustering(const t_packer_opts& pa // full intra-lb route. Then do full legalization at the end. // 2) If the legalization at the end fails, try again, but this time // do full legalization for each molecule added to the cluster. - const ClusterLegalizationStrategy legalization_strategies[] = {ClusterLegalizationStrategy::SKIP_INTRA_LB_ROUTE, - ClusterLegalizationStrategy::FULL}; + const ClusterLegalizationStrategy legalization_strategies[] + = {ClusterLegalizationStrategy::SKIP_INTRA_LB_ROUTE, ClusterLegalizationStrategy::FULL}; for (const ClusterLegalizationStrategy strategy : legalization_strategies) { // If the cluster is legal, no need to try a stronger cluster legalizer // mode. @@ -225,48 +218,32 @@ std::map do_clustering(const t_packer_opts& pa VTR_LOGV(verbosity > 2, "Complex block %d:\n", total_clb_num); - start_new_cluster(cluster_legalizer, - legalization_cluster_id, - istart, - num_used_type_instances, - packer_opts.target_device_utilization, - arch, packer_opts.device_layout, - primitive_candidate_block_types, - verbosity, - balance_block_type_utilization); + start_new_cluster(cluster_legalizer, legalization_cluster_id, istart, num_used_type_instances, + packer_opts.target_device_utilization, arch, packer_opts.device_layout, + primitive_candidate_block_types, verbosity, balance_block_type_utilization); //initial molecule in cluster has been processed cluster_stats.num_molecules_processed++; cluster_stats.mols_since_last_print++; - print_pack_status(total_clb_num, - cluster_stats.num_molecules, - cluster_stats.num_molecules_processed, - cluster_stats.mols_since_last_print, - device_ctx.grid.width(), - device_ctx.grid.height(), - attraction_groups, - cluster_legalizer); - - VTR_LOGV(verbosity > 2, - "Complex block %d: '%s' (%s) ", total_clb_num, + print_pack_status(total_clb_num, cluster_stats.num_molecules, cluster_stats.num_molecules_processed, + cluster_stats.mols_since_last_print, device_ctx.grid.width(), device_ctx.grid.height(), + attraction_groups, cluster_legalizer); + + VTR_LOGV(verbosity > 2, "Complex block %d: '%s' (%s) ", total_clb_num, cluster_legalizer.get_cluster_pb(legalization_cluster_id)->name, cluster_legalizer.get_cluster_type(legalization_cluster_id)->name); VTR_LOGV(verbosity > 2, "."); //Progress dot for seed-block fflush(stdout); - int high_fanout_threshold = high_fanout_thresholds.get_threshold(cluster_legalizer.get_cluster_type(legalization_cluster_id)->name); - update_cluster_stats(istart, - cluster_legalizer, + int high_fanout_threshold = high_fanout_thresholds.get_threshold( + cluster_legalizer.get_cluster_type(legalization_cluster_id)->name); + update_cluster_stats(istart, cluster_legalizer, is_clock, //Set of clock nets is_global, //Set of global nets (currently all clocks) - packer_opts.global_clocks, - packer_opts.alpha, packer_opts.beta, - packer_opts.timing_driven, packer_opts.connection_driven, - high_fanout_threshold, - *timing_info, - attraction_groups, - net_output_feeds_driving_block_input); + packer_opts.global_clocks, packer_opts.alpha, packer_opts.beta, + packer_opts.timing_driven, packer_opts.connection_driven, high_fanout_threshold, + *timing_info, attraction_groups, net_output_feeds_driving_block_input); total_clb_num++; if (packer_opts.timing_driven) { @@ -275,21 +252,13 @@ std::map do_clustering(const t_packer_opts& pa *is only one atom block clustered it would not change anything */ } cluster_stats.num_unrelated_clustering_attempts = 0; - next_molecule = get_molecule_for_cluster(cluster_legalizer.get_cluster_pb(legalization_cluster_id), - attraction_groups, - allow_unrelated_clustering, - packer_opts.prioritize_transitive_connectivity, - packer_opts.transitive_fanout_threshold, - packer_opts.feasible_block_array_size, - &cluster_stats.num_unrelated_clustering_attempts, - prepacker, - cluster_legalizer, - clb_inter_blk_nets, - legalization_cluster_id, - verbosity, - clustering_data.unclustered_list_head, - unclustered_list_head_size, - primitive_candidate_block_types); + next_molecule = get_molecule_for_cluster( + cluster_legalizer.get_cluster_pb(legalization_cluster_id), attraction_groups, + allow_unrelated_clustering, packer_opts.prioritize_transitive_connectivity, + packer_opts.transitive_fanout_threshold, packer_opts.feasible_block_array_size, + &cluster_stats.num_unrelated_clustering_attempts, prepacker, cluster_legalizer, clb_inter_blk_nets, + legalization_cluster_id, verbosity, clustering_data.unclustered_list_head, unclustered_list_head_size, + primitive_candidate_block_types); prev_molecule = istart; /* @@ -311,27 +280,12 @@ std::map do_clustering(const t_packer_opts& pa while (next_molecule != nullptr && num_repeated_molecules < max_num_repeated_molecules) { prev_molecule = next_molecule; - try_fill_cluster(cluster_legalizer, - prepacker, - packer_opts, - prev_molecule, - next_molecule, - num_repeated_molecules, - cluster_stats, - total_clb_num, - legalization_cluster_id, - attraction_groups, - clb_inter_blk_nets, - allow_unrelated_clustering, - high_fanout_threshold, - is_clock, - is_global, - timing_info, - block_pack_status, - clustering_data.unclustered_list_head, - unclustered_list_head_size, - net_output_feeds_driving_block_input, - primitive_candidate_block_types); + try_fill_cluster(cluster_legalizer, prepacker, packer_opts, prev_molecule, next_molecule, + num_repeated_molecules, cluster_stats, total_clb_num, legalization_cluster_id, + attraction_groups, clb_inter_blk_nets, allow_unrelated_clustering, + high_fanout_threshold, is_clock, is_global, timing_info, block_pack_status, + clustering_data.unclustered_list_head, unclustered_list_head_size, + net_output_feeds_driving_block_input, primitive_candidate_block_types); } if (strategy == ClusterLegalizationStrategy::FULL) { @@ -347,15 +301,13 @@ std::map do_clustering(const t_packer_opts& pa if (is_cluster_legal) { // Pick new seed. - istart = get_highest_gain_seed_molecule(seed_index, - seed_atoms, - prepacker, - cluster_legalizer); + istart = get_highest_gain_seed_molecule(seed_index, seed_atoms, prepacker, cluster_legalizer); // Update cluster stats. if (packer_opts.timing_driven && num_blocks_hill_added > 0) cluster_stats.blocks_since_last_analysis += num_blocks_hill_added; - store_cluster_info_and_free(packer_opts, legalization_cluster_id, logic_block_type, le_pb_type, le_count, cluster_legalizer, clb_inter_blk_nets); + store_cluster_info_and_free(packer_opts, legalization_cluster_id, logic_block_type, le_pb_type, + le_count, cluster_legalizer, clb_inter_blk_nets); // Since the cluster will no longer be added to beyond this point, // clean the cluster of any data not strictly necessary for // creating the clustered netlist. @@ -410,7 +362,8 @@ void print_pb_type_count(const ClusteredNetlist& clb_nlist) { VTR_LOG("\nPb types usage...\n"); for (const auto& logical_block_type : device_ctx.logical_block_types) { - if (!logical_block_type.pb_type) continue; + if (!logical_block_type.pb_type) + continue; print_pb_type_count_recurr(logical_block_type.pb_type, max_pb_type_name_chars + max_depth, 0, pb_type_count); } diff --git a/vpr/src/pack/cluster_feasibility_filter.cpp b/vpr/src/pack/cluster_feasibility_filter.cpp index c8ecb987f00..59beb0ee2a8 100644 --- a/vpr/src/pack/cluster_feasibility_filter.cpp +++ b/vpr/src/pack/cluster_feasibility_filter.cpp @@ -105,8 +105,10 @@ static void alloc_pin_classes_in_pb_graph_node(t_pb_graph_node* pb_graph_node) { for (i = 0; i < pb_graph_node->num_output_ports; i++) { for (j = 0; j < pb_graph_node->num_output_pins[i]; j++) { pb_graph_node->output_pins[i][j].parent_pin_class = new int[pb_graph_node->pb_type->depth]; - pb_graph_node->output_pins[i][j].list_of_connectable_input_pin_ptrs = new t_pb_graph_pin**[pb_graph_node->pb_type->depth]; - pb_graph_node->output_pins[i][j].num_connectable_primitive_input_pins = new int[pb_graph_node->pb_type->depth]; + pb_graph_node->output_pins[i][j].list_of_connectable_input_pin_ptrs + = new t_pb_graph_pin**[pb_graph_node->pb_type->depth]; + pb_graph_node->output_pins[i][j].num_connectable_primitive_input_pins + = new int[pb_graph_node->pb_type->depth]; for (k = 0; k < pb_graph_node->pb_type->depth; k++) { pb_graph_node->output_pins[i][j].list_of_connectable_input_pin_ptrs[k] = nullptr; pb_graph_node->output_pins[i][j].num_connectable_primitive_input_pins[k] = 0; @@ -255,19 +257,23 @@ static void load_pin_class_by_depth(t_pb_graph_node* pb_graph_node, for (i = 0; i < pb_graph_node->pb_type->num_modes; i++) { for (j = 0; j < pb_graph_node->pb_type->modes[i].num_pb_type_children; j++) { for (k = 0; k < pb_graph_node->pb_type->modes[i].pb_type_children[j].num_pb; k++) { - load_pin_class_by_depth(&pb_graph_node->child_pb_graph_nodes[i][j][k], depth, - input_count, output_count); + load_pin_class_by_depth(&pb_graph_node->child_pb_graph_nodes[i][j][k], depth, input_count, + output_count); } } } if (pb_graph_node->pb_type->depth == depth && !pb_graph_node->is_primitive()) { /* Record pin class information for cluster */ - pb_graph_node->num_input_pin_class = *input_count + 1; /* number of input pin classes discovered + 1 for primitive inputs not reachable from cluster input pins */ + pb_graph_node->num_input_pin_class + = *input_count + + 1; /* number of input pin classes discovered + 1 for primitive inputs not reachable from cluster input pins */ pb_graph_node->input_pin_class_size = new int[*input_count + 1]; for (i = 0; i < *input_count + 1; i++) /* zero-initializing */ pb_graph_node->input_pin_class_size[i] = 0; - pb_graph_node->num_output_pin_class = *output_count + 1; /* number of output pin classes discovered + 1 for primitive inputs not reachable from cluster input pins */ + pb_graph_node->num_output_pin_class + = *output_count + + 1; /* number of output pin classes discovered + 1 for primitive inputs not reachable from cluster input pins */ pb_graph_node->output_pin_class_size = new int[*output_count + 1]; for (i = 0; i < *output_count + 1; i++) /* zero-initializing */ pb_graph_node->output_pin_class_size[i] = 0; @@ -311,37 +317,40 @@ static void expand_pb_graph_node_and_load_output_to_input_connections(t_pb_graph const int depth) { int i; - if (current_pb_graph_pin->scratch_pad == OPEN - && current_pb_graph_pin->parent_node->pb_type->depth > depth) { + if (current_pb_graph_pin->scratch_pad == OPEN && current_pb_graph_pin->parent_node->pb_type->depth > depth) { current_pb_graph_pin->scratch_pad = 1; for (i = 0; i < current_pb_graph_pin->num_output_edges; i++) { VTR_ASSERT(current_pb_graph_pin->output_edges[i]->num_output_pins == 1); - expand_pb_graph_node_and_load_output_to_input_connections(current_pb_graph_pin->output_edges[i]->output_pins[0], - reference_pin, depth); + expand_pb_graph_node_and_load_output_to_input_connections( + current_pb_graph_pin->output_edges[i]->output_pins[0], reference_pin, depth); } - if (current_pb_graph_pin->is_primitive_pin() - && current_pb_graph_pin->port->type == IN_PORT) { + if (current_pb_graph_pin->is_primitive_pin() && current_pb_graph_pin->port->type == IN_PORT) { reference_pin->num_connectable_primitive_input_pins[depth]++; if (reference_pin->num_connectable_primitive_input_pins[depth] - 1 > 0) { std::vector temp(reference_pin->list_of_connectable_input_pin_ptrs[depth], - reference_pin->list_of_connectable_input_pin_ptrs[depth] + reference_pin->num_connectable_primitive_input_pins[depth] - 1); + reference_pin->list_of_connectable_input_pin_ptrs[depth] + + reference_pin->num_connectable_primitive_input_pins[depth] - 1); delete[] reference_pin->list_of_connectable_input_pin_ptrs[depth]; - reference_pin->list_of_connectable_input_pin_ptrs[depth] = new t_pb_graph_pin*[reference_pin->num_connectable_primitive_input_pins[depth]]; + reference_pin->list_of_connectable_input_pin_ptrs[depth] + = new t_pb_graph_pin*[reference_pin->num_connectable_primitive_input_pins[depth]]; for (i = 0; i < reference_pin->num_connectable_primitive_input_pins[depth] - 1; i++) reference_pin->list_of_connectable_input_pin_ptrs[depth][i] = temp[i]; - reference_pin->list_of_connectable_input_pin_ptrs[depth][reference_pin->num_connectable_primitive_input_pins[depth] - - 1] + reference_pin + ->list_of_connectable_input_pin_ptrs[depth] + [reference_pin->num_connectable_primitive_input_pins[depth] - 1] = current_pb_graph_pin; } else { - reference_pin->list_of_connectable_input_pin_ptrs[depth] = new t_pb_graph_pin*[reference_pin->num_connectable_primitive_input_pins[depth]]; + reference_pin->list_of_connectable_input_pin_ptrs[depth] + = new t_pb_graph_pin*[reference_pin->num_connectable_primitive_input_pins[depth]]; } - reference_pin->list_of_connectable_input_pin_ptrs[depth][reference_pin->num_connectable_primitive_input_pins[depth] - - 1] + reference_pin + ->list_of_connectable_input_pin_ptrs[depth] + [reference_pin->num_connectable_primitive_input_pins[depth] - 1] = current_pb_graph_pin; } } @@ -413,9 +422,9 @@ static void expand_pb_graph_node_and_load_pin_class_by_depth(t_pb_graph_pin* cur } for (i = 0; i < current_pb_graph_pin->num_input_edges; i++) { VTR_ASSERT(current_pb_graph_pin->input_edges[i]->num_input_pins == 1); - expand_pb_graph_node_and_load_pin_class_by_depth(current_pb_graph_pin->input_edges[i]->input_pins[0], - reference_pb_graph_pin, depth, input_count, - output_count); + expand_pb_graph_node_and_load_pin_class_by_depth( + current_pb_graph_pin->input_edges[i]->input_pins[0], reference_pb_graph_pin, depth, input_count, + output_count); } } if (current_pb_graph_pin->port->type == IN_PORT) { @@ -425,9 +434,9 @@ static void expand_pb_graph_node_and_load_pin_class_by_depth(t_pb_graph_pin* cur } for (i = 0; i < current_pb_graph_pin->num_output_edges; i++) { VTR_ASSERT(current_pb_graph_pin->output_edges[i]->num_output_pins == 1); - expand_pb_graph_node_and_load_pin_class_by_depth(current_pb_graph_pin->output_edges[i]->output_pins[0], - reference_pb_graph_pin, depth, input_count, - output_count); + expand_pb_graph_node_and_load_pin_class_by_depth( + current_pb_graph_pin->output_edges[i]->output_pins[0], reference_pb_graph_pin, depth, + input_count, output_count); } } } else if (current_pb_graph_pin->parent_node->pb_type->depth > depth) { @@ -458,10 +467,8 @@ static void sum_pin_class(t_pb_graph_node* pb_graph_node) { for (j = 0; j < pb_graph_node->num_input_pins[i]; j++) { VTR_ASSERT(pb_graph_node->input_pins[i][j].pin_class < pb_graph_node->num_input_pin_class); if (pb_graph_node->input_pins[i][j].pin_class == OPEN) { - VTR_LOG_WARN("%s[%d].%s[%d] unconnected pin in architecture.\n", - pb_graph_node->pb_type->name, - pb_graph_node->placement_index, - pb_graph_node->input_pins[i][j].port->name, + VTR_LOG_WARN("%s[%d].%s[%d] unconnected pin in architecture.\n", pb_graph_node->pb_type->name, + pb_graph_node->placement_index, pb_graph_node->input_pins[i][j].port->name, pb_graph_node->input_pins[i][j].pin_number); continue; } @@ -472,10 +479,8 @@ static void sum_pin_class(t_pb_graph_node* pb_graph_node) { for (j = 0; j < pb_graph_node->num_output_pins[i]; j++) { VTR_ASSERT(pb_graph_node->output_pins[i][j].pin_class < pb_graph_node->num_output_pin_class); if (pb_graph_node->output_pins[i][j].pin_class == OPEN) { - VTR_LOG_WARN("%s[%d].%s[%d] unconnected pin in architecture.\n", - pb_graph_node->pb_type->name, - pb_graph_node->placement_index, - pb_graph_node->output_pins[i][j].port->name, + VTR_LOG_WARN("%s[%d].%s[%d] unconnected pin in architecture.\n", pb_graph_node->pb_type->name, + pb_graph_node->placement_index, pb_graph_node->output_pins[i][j].port->name, pb_graph_node->output_pins[i][j].pin_number); continue; } @@ -486,10 +491,8 @@ static void sum_pin_class(t_pb_graph_node* pb_graph_node) { for (j = 0; j < pb_graph_node->num_clock_pins[i]; j++) { VTR_ASSERT(pb_graph_node->clock_pins[i][j].pin_class < pb_graph_node->num_input_pin_class); if (pb_graph_node->clock_pins[i][j].pin_class == OPEN) { - VTR_LOG_WARN("%s[%d].%s[%d] unconnected pin in architecture.\n", - pb_graph_node->pb_type->name, - pb_graph_node->placement_index, - pb_graph_node->clock_pins[i][j].port->name, + VTR_LOG_WARN("%s[%d].%s[%d] unconnected pin in architecture.\n", pb_graph_node->pb_type->name, + pb_graph_node->placement_index, pb_graph_node->clock_pins[i][j].port->name, pb_graph_node->clock_pins[i][j].pin_number); continue; } @@ -508,7 +511,8 @@ static void discover_all_forced_connections(t_pb_graph_node* pb_graph_node) { if (pb_graph_node->is_primitive()) { for (i = 0; i < pb_graph_node->num_output_ports; i++) { for (j = 0; j < pb_graph_node->num_output_pins[i]; j++) { - pb_graph_node->output_pins[i][j].is_forced_connection = is_forced_connection(&pb_graph_node->output_pins[i][j]); + pb_graph_node->output_pins[i][j].is_forced_connection + = is_forced_connection(&pb_graph_node->output_pins[i][j]); } } } else { diff --git a/vpr/src/pack/cluster_legalizer.cpp b/vpr/src/pack/cluster_legalizer.cpp index ec722822fea..064c198cede 100644 --- a/vpr/src/pack/cluster_legalizer.cpp +++ b/vpr/src/pack/cluster_legalizer.cpp @@ -86,10 +86,14 @@ static void alloc_and_load_pb_stats(t_pb* pb, const int feasible_block_array_siz pb->pb_stats = new t_pb_stats; - pb->pb_stats->input_pins_used = std::vector>(pb->pb_graph_node->num_input_pin_class); - pb->pb_stats->output_pins_used = std::vector>(pb->pb_graph_node->num_output_pin_class); - pb->pb_stats->lookahead_input_pins_used = std::vector>(pb->pb_graph_node->num_input_pin_class); - pb->pb_stats->lookahead_output_pins_used = std::vector>(pb->pb_graph_node->num_output_pin_class); + pb->pb_stats->input_pins_used + = std::vector>(pb->pb_graph_node->num_input_pin_class); + pb->pb_stats->output_pins_used + = std::vector>(pb->pb_graph_node->num_output_pin_class); + pb->pb_stats->lookahead_input_pins_used + = std::vector>(pb->pb_graph_node->num_input_pin_class); + pb->pb_stats->lookahead_output_pins_used + = std::vector>(pb->pb_graph_node->num_output_pin_class); pb->pb_stats->num_feasible_blocks = NOT_VALID; pb->pb_stats->feasible_blocks = new t_pack_molecule*[feasible_block_array_size]; @@ -134,8 +138,7 @@ static void check_cluster_atom_blocks(t_pb* pb, std::unordered_set& } blocks_checked.insert(blk_id); if (pb != atom_ctx.lookup.atom_pb(blk_id)) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "pb %s contains atom block %s but atom block does not link to pb.\n", + VPR_FATAL_ERROR(VPR_ERROR_PACK, "pb %s contains atom block %s but atom block does not link to pb.\n", pb->name, atom_ctx.nlist.block_name(blk_id).c_str()); } } @@ -223,9 +226,7 @@ static bool check_cluster_floorplanning(AtomBlockId atom_blk_id, // regardless of what the cluster's PartitionRegion is since it is not // constrained. if (!part_id.is_valid()) { - VTR_LOGV(log_verbosity > 3, - "\t\t\t Intersect: Atom block %d has no floorplanning constraints\n", - atom_blk_id); + VTR_LOGV(log_verbosity > 3, "\t\t\t Intersect: Atom block %d has no floorplanning constraints\n", atom_blk_id); cluster_pr_needs_update = false; return true; } @@ -236,9 +237,7 @@ static bool check_cluster_floorplanning(AtomBlockId atom_blk_id, // If the Cluster's PartitionRegion is empty, then this atom's PR becomes // the Cluster's new PartitionRegion. if (cluster_pr.empty()) { - VTR_LOGV(log_verbosity > 3, - "\t\t\t Intersect: Atom block %d has floorplanning constraints\n", - atom_blk_id); + VTR_LOGV(log_verbosity > 3, "\t\t\t Intersect: Atom block %d has floorplanning constraints\n", atom_blk_id); cluster_pr = atom_pr; cluster_pr_needs_update = true; return true; @@ -251,9 +250,8 @@ static bool check_cluster_floorplanning(AtomBlockId atom_blk_id, // If the intersection is empty, then the atom cannot be placed in this // Cluster due to floorplanning constraints. if (cluster_pr.empty()) { - VTR_LOGV(log_verbosity > 3, - "\t\t\t Intersect: Atom block %d failed floorplanning check for cluster\n", - atom_blk_id); + VTR_LOGV(log_verbosity > 3, "\t\t\t Intersect: Atom block %d failed floorplanning check for cluster\n", + atom_blk_id); cluster_pr_needs_update = false; return false; } @@ -298,7 +296,8 @@ static bool check_cluster_noc_group(AtomBlockId atom_blk_id, // If the cluster does not have a NoC group, assign the atom's NoC group // to the cluster. VTR_LOGV(log_verbosity > 3, - "\t\t\t NoC Group: Atom block %d passed cluster, cluster's NoC group was updated with the atom's group %d\n", + "\t\t\t NoC Group: Atom block %d passed cluster, cluster's NoC group was updated with the atom's " + "group %d\n", atom_blk_id, (size_t)atom_noc_grp_id); cluster_noc_grp_id = atom_noc_grp_id; return true; @@ -308,7 +307,8 @@ static bool check_cluster_noc_group(AtomBlockId atom_blk_id, // If the cluster has the same NoC group ID as the atom, they are // compatible. VTR_LOGV(log_verbosity > 3, - "\t\t\t NoC Group: Atom block %d passed cluster, cluster's NoC group was compatible with the atom's group %d\n", + "\t\t\t NoC Group: Atom block %d passed cluster, cluster's NoC group was compatible with the atom's " + "group %d\n", atom_blk_id, (size_t)atom_noc_grp_id); return true; } @@ -316,7 +316,8 @@ static bool check_cluster_noc_group(AtomBlockId atom_blk_id, // If the cluster belongs to a different NoC group than the atom's group, // they are incompatible. VTR_LOGV(log_verbosity > 3, - "\t\t\t NoC Group: Atom block %d failed NoC group check for cluster. Cluster's NoC group: %d, atom's NoC group: %d\n", + "\t\t\t NoC Group: Atom block %d failed NoC group check for cluster. Cluster's NoC group: %d, atom's NoC " + "group: %d\n", atom_blk_id, (size_t)cluster_noc_grp_id, (size_t)atom_noc_grp_id); return false; } @@ -328,8 +329,8 @@ static bool check_cluster_noc_group(AtomBlockId atom_blk_id, * outside the cluster) and returns the status of the placement accordingly. */ static enum e_block_pack_status check_chain_root_placement_feasibility(const t_pb_graph_node* pb_graph_node, - const t_pack_molecule* molecule, - const AtomBlockId blk_id) { + const t_pack_molecule* molecule, + const AtomBlockId blk_id) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); enum e_block_pack_status block_pack_status = e_block_pack_status::BLK_PASSED; @@ -375,7 +376,8 @@ static enum e_block_pack_status check_chain_root_placement_feasibility(const t_p break; } // long chains should only be placed at the top of the chain tieOff = 0 - if (is_long_chain) break; + if (is_long_chain) + break; } } } @@ -393,7 +395,9 @@ static enum e_block_pack_status check_chain_root_placement_feasibility(const t_p * Note that this routine does not check pin feasibility against the cur_pb_type; so * primitive_type_feasible() should also be called on blk_id before concluding it is feasible. */ -static bool primitive_memory_sibling_feasible(const AtomBlockId blk_id, const t_pb_type* cur_pb_type, const AtomBlockId sibling_blk_id) { +static bool primitive_memory_sibling_feasible(const AtomBlockId blk_id, + const t_pb_type* cur_pb_type, + const AtomBlockId sibling_blk_id) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); VTR_ASSERT(cur_pb_type->class_type == MEMORY_CLASS); @@ -500,20 +504,20 @@ static bool primitive_feasible(const AtomBlockId blk_id, t_pb* cur_pb) { /** * @brief Try to place atom block into current primitive location */ -static enum e_block_pack_status -try_place_atom_block_rec(const t_pb_graph_node* pb_graph_node, - const AtomBlockId blk_id, - t_pb* cb, - t_pb** parent, - const int max_models, - const int max_cluster_size, - const LegalizationClusterId cluster_id, - vtr::vector_map& atom_cluster, - const t_intra_cluster_placement_stats* cluster_placement_stats_ptr, - const t_pack_molecule* molecule, - t_lb_router_data* router_data, - int verbosity, - const int feasible_block_array_size) { +static enum e_block_pack_status try_place_atom_block_rec( + const t_pb_graph_node* pb_graph_node, + const AtomBlockId blk_id, + t_pb* cb, + t_pb** parent, + const int max_models, + const int max_cluster_size, + const LegalizationClusterId cluster_id, + vtr::vector_map& atom_cluster, + const t_intra_cluster_placement_stats* cluster_placement_stats_ptr, + const t_pack_molecule* molecule, + t_lb_router_data* router_data, + int verbosity, + const int feasible_block_array_size) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); AtomContext& mutable_atom_ctx = g_vpr_ctx.mutable_atom(); @@ -524,11 +528,9 @@ try_place_atom_block_rec(const t_pb_graph_node* pb_graph_node, t_pb* parent_pb = nullptr; if (pb_graph_node->parent_pb_graph_node != cb->pb_graph_node) { t_pb* my_parent = nullptr; - block_pack_status = try_place_atom_block_rec(pb_graph_node->parent_pb_graph_node, blk_id, cb, - &my_parent, max_models, max_cluster_size, cluster_id, - atom_cluster, - cluster_placement_stats_ptr, molecule, router_data, - verbosity, feasible_block_array_size); + block_pack_status = try_place_atom_block_rec( + pb_graph_node->parent_pb_graph_node, blk_id, cb, &my_parent, max_models, max_cluster_size, cluster_id, + atom_cluster, cluster_placement_stats_ptr, molecule, router_data, verbosity, feasible_block_array_size); parent_pb = my_parent; } else { parent_pb = cb; @@ -549,7 +551,8 @@ try_place_atom_block_rec(const t_pb_graph_node* pb_graph_node, for (int j = 0; j < mode->pb_type_children[i].num_pb; j++) { parent_pb->child_pbs[i][j].parent_pb = parent_pb; - parent_pb->child_pbs[i][j].pb_graph_node = &(parent_pb->pb_graph_node->child_pb_graph_nodes[parent_pb->mode][i][j]); + parent_pb->child_pbs[i][j].pb_graph_node + = &(parent_pb->pb_graph_node->child_pb_graph_nodes[parent_pb->mode][i][j]); } } } else { @@ -586,8 +589,7 @@ try_place_atom_block_rec(const t_pb_graph_node* pb_graph_node, bool is_primitive = (pb_type->num_modes == 0); if (is_primitive) { - VTR_ASSERT(!atom_ctx.lookup.pb_atom(pb) - && atom_ctx.lookup.atom_pb(blk_id) == nullptr + VTR_ASSERT(!atom_ctx.lookup.pb_atom(pb) && atom_ctx.lookup.atom_pb(blk_id) == nullptr && atom_cluster[blk_id] == LegalizationClusterId::INVALID()); /* try pack to location */ VTR_ASSERT(pb->name == nullptr); @@ -618,10 +620,8 @@ try_place_atom_block_rec(const t_pb_graph_node* pb_graph_node, } VTR_LOGV(verbosity > 4 && block_pack_status == e_block_pack_status::BLK_PASSED, - "\t\t\tPlaced atom '%s' (%s) at %s\n", - atom_ctx.nlist.block_name(blk_id).c_str(), - atom_ctx.nlist.block_model(blk_id)->name, - pb->hierarchical_type_name().c_str()); + "\t\t\tPlaced atom '%s' (%s) at %s\n", atom_ctx.nlist.block_name(blk_id).c_str(), + atom_ctx.nlist.block_model(blk_id)->name, pb->hierarchical_type_name().c_str()); } if (block_pack_status != e_block_pack_status::BLK_PASSED) { @@ -666,7 +666,9 @@ static void reset_lookahead_pins_used(t_pb* cur_pb) { * @brief Checks if the sinks of the given net are reachable from the driver * pb gpin. */ -static int net_sinks_reachable_in_cluster(const t_pb_graph_pin* driver_pb_gpin, const int depth, const AtomNetId net_id) { +static int net_sinks_reachable_in_cluster(const t_pb_graph_pin* driver_pb_gpin, + const int depth, + const AtomNetId net_id) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); //Record the sink pb graph pins we are looking for @@ -711,7 +713,8 @@ static t_pb_graph_pin* get_driver_pb_graph_pin(const t_pb* driver_pb, const Atom if (prim_port.type == OUT_PORT) { if (prim_port.model_port == driver_model_port) { // get the output pb_graph_pin driving this input net - return &(driver_pb->pb_graph_node->output_pins[output_port][atom_ctx.nlist.pin_port_bit(driver_pin_id)]); + return &( + driver_pb->pb_graph_node->output_pins[output_port][atom_ctx.nlist.pin_port_bit(driver_pin_id)]); } output_port++; } @@ -729,10 +732,11 @@ static t_pb_graph_pin* get_driver_pb_graph_pin(const t_pb* driver_pb, const Atom * required add this net to the pin class (to increment the number of used * pins from this class) that should be used to leave the pb_block. */ -static void compute_and_mark_lookahead_pins_used_for_pin(const t_pb_graph_pin* pb_graph_pin, - const t_pb* primitive_pb, - const AtomNetId net_id, - const vtr::vector_map& atom_cluster) { +static void compute_and_mark_lookahead_pins_used_for_pin( + const t_pb_graph_pin* pb_graph_pin, + const t_pb* primitive_pb, + const AtomNetId net_id, + const vtr::vector_map& atom_cluster) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); // starting from the parent pb of the input primitive go up in the hierarchy till the root block @@ -854,12 +858,12 @@ static void compute_and_mark_lookahead_pins_used_for_pin(const t_pb_graph_pin* p } } - /* * @brief Determine if pins of speculatively packed pb are legal */ -static void compute_and_mark_lookahead_pins_used(const AtomBlockId blk_id, - const vtr::vector_map& atom_cluster) { +static void compute_and_mark_lookahead_pins_used( + const AtomBlockId blk_id, + const vtr::vector_map& atom_cluster) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); const t_pb* cur_pb = atom_ctx.lookup.atom_pb(blk_id); @@ -1030,8 +1034,7 @@ static void revert_place_atom_block(const AtomBlockId blk_id, */ next = pb->parent_pb; - if (pb->child_pbs != nullptr && pb->pb_stats != nullptr - && pb->pb_stats->num_child_blocks_in_pb == 0) { + if (pb->child_pbs != nullptr && pb->pb_stats != nullptr && pb->pb_stats->num_child_blocks_in_pb == 0) { set_reset_pb_modes(router_data, pb, false); if (next != nullptr) { /* If the code gets here, then that means that placing the initial seed molecule @@ -1058,7 +1061,8 @@ static void commit_lookahead_pins_used(t_pb* cur_pb) { if (pb_type->num_modes > 0 && cur_pb->name) { for (int i = 0; i < cur_pb->pb_graph_node->num_input_pin_class; i++) { - VTR_ASSERT(cur_pb->pb_stats->lookahead_input_pins_used[i].size() <= (unsigned int)cur_pb->pb_graph_node->input_pin_class_size[i]); + VTR_ASSERT(cur_pb->pb_stats->lookahead_input_pins_used[i].size() + <= (unsigned int)cur_pb->pb_graph_node->input_pin_class_size[i]); for (size_t j = 0; j < cur_pb->pb_stats->lookahead_input_pins_used[i].size(); j++) { VTR_ASSERT(cur_pb->pb_stats->lookahead_input_pins_used[i][j]); cur_pb->pb_stats->input_pins_used[i].insert({j, cur_pb->pb_stats->lookahead_input_pins_used[i][j]}); @@ -1066,7 +1070,8 @@ static void commit_lookahead_pins_used(t_pb* cur_pb) { } for (int i = 0; i < cur_pb->pb_graph_node->num_output_pin_class; i++) { - VTR_ASSERT(cur_pb->pb_stats->lookahead_output_pins_used[i].size() <= (unsigned int)cur_pb->pb_graph_node->output_pin_class_size[i]); + VTR_ASSERT(cur_pb->pb_stats->lookahead_output_pins_used[i].size() + <= (unsigned int)cur_pb->pb_graph_node->output_pin_class_size[i]); for (size_t j = 0; j < cur_pb->pb_stats->lookahead_output_pins_used[i].size(); j++) { VTR_ASSERT(cur_pb->pb_stats->lookahead_output_pins_used[i][j]); cur_pb->pb_stats->output_pins_used[i].insert({j, cur_pb->pb_stats->lookahead_output_pins_used[i][j]}); @@ -1177,12 +1182,9 @@ e_block_pack_status ClusterLegalizer::try_pack_molecule(t_pack_molecule* molecul const FloorplanningContext& floorplanning_ctx = g_vpr_ctx.floorplanning(); if (log_verbosity_ > 3) { AtomBlockId root_atom = molecule->atom_block_ids[molecule->root]; - VTR_LOG("\t\tTry pack molecule: '%s' (%s)", - atom_ctx.nlist.block_name(root_atom).c_str(), + VTR_LOG("\t\tTry pack molecule: '%s' (%s)", atom_ctx.nlist.block_name(root_atom).c_str(), atom_ctx.nlist.block_model(root_atom)->name); - VTR_LOGV(molecule->pack_pattern, - " molecule_type %s molecule_size %zu", - molecule->pack_pattern->name, + VTR_LOGV(molecule->pack_pattern, " molecule_type %s molecule_size %zu", molecule->pack_pattern->name, molecule->atom_block_ids.size()); VTR_LOG("\n"); } @@ -1193,7 +1195,8 @@ e_block_pack_status ClusterLegalizer::try_pack_molecule(t_pack_molecule* molecul // blocks that have incompatible placement constraints or form very long placement // macros that limit placement flexibility. if (cluster.placement_stats->has_long_chain && molecule->is_chain() && molecule->chain_info->is_long_chain) { - VTR_LOGV(log_verbosity_ > 4, "\t\t\tFAILED Placement Feasibility Filter: Only one long chain per cluster is allowed\n"); + VTR_LOGV(log_verbosity_ > 4, + "\t\t\tFAILED Placement Feasibility Filter: Only one long chain per cluster is allowed\n"); //Record the failure of this molecule in the current pb stats record_molecule_failure(molecule, cluster.pb); // Free the allocated data. @@ -1212,11 +1215,8 @@ e_block_pack_status ClusterLegalizer::try_pack_molecule(t_pack_molecule* molecul AtomBlockId atom_blk_id = molecule->atom_block_ids[i_mol]; if (atom_blk_id) { bool cluster_pr_needs_update = false; - bool block_pack_floorplan_status = check_cluster_floorplanning(atom_blk_id, - new_cluster_pr, - floorplanning_ctx.constraints, - log_verbosity_, - cluster_pr_needs_update); + bool block_pack_floorplan_status = check_cluster_floorplanning( + atom_blk_id, new_cluster_pr, floorplanning_ctx.constraints, log_verbosity_, cluster_pr_needs_update); if (!block_pack_floorplan_status) { // Record the failure of this molecule in the current pb stats record_molecule_failure(molecule, cluster.pb); @@ -1235,10 +1235,8 @@ e_block_pack_status ClusterLegalizer::try_pack_molecule(t_pack_molecule* molecul for (int i_mol = 0; i_mol < molecule_size; i_mol++) { AtomBlockId atom_blk_id = molecule->atom_block_ids[i_mol]; if (atom_blk_id) { - bool block_pack_noc_grp_status = check_cluster_noc_group(atom_blk_id, - new_cluster_noc_grp_id, - atom_noc_grp_id_, - log_verbosity_); + bool block_pack_noc_grp_status + = check_cluster_noc_group(atom_blk_id, new_cluster_noc_grp_id, atom_noc_grp_id_, log_verbosity_); if (!block_pack_noc_grp_status) { // Record the failure of this molecule in the current pb stats record_molecule_failure(molecule, cluster.pb); @@ -1250,9 +1248,7 @@ e_block_pack_status ClusterLegalizer::try_pack_molecule(t_pack_molecule* molecul std::vector primitives_list(max_molecule_size_, nullptr); e_block_pack_status block_pack_status = e_block_pack_status::BLK_STATUS_UNDEFINED; while (block_pack_status != e_block_pack_status::BLK_PASSED) { - if (!get_next_primitive_list(cluster.placement_stats, - molecule, - primitives_list.data())) { + if (!get_next_primitive_list(cluster.placement_stats, molecule, primitives_list.data())) { VTR_LOGV(log_verbosity_ > 3, "\t\tFAILED No candidate primitives available\n"); block_pack_status = e_block_pack_status::BLK_FAILED_FEASIBLE; break; /* no more candidate primitives available, this molecule will not pack, return fail */ @@ -1269,19 +1265,10 @@ e_block_pack_status ClusterLegalizer::try_pack_molecule(t_pack_molecule* molecul // NOTE: This parent variable is only used in the recursion of this // function. t_pb* parent = nullptr; - block_pack_status = try_place_atom_block_rec(primitives_list[i_mol], - atom_blk_id, - cluster.pb, - &parent, - num_models_, - max_cluster_size_, - cluster_id, - atom_cluster_, - cluster.placement_stats, - molecule, - cluster.router_data, - log_verbosity_, - feasible_block_array_size_); + block_pack_status + = try_place_atom_block_rec(primitives_list[i_mol], atom_blk_id, cluster.pb, &parent, num_models_, + max_cluster_size_, cluster_id, atom_cluster_, cluster.placement_stats, + molecule, cluster.router_data, log_verbosity_, feasible_block_array_size_); } if (enable_pin_feasibility_filter_ && block_pack_status == e_block_pack_status::BLK_PASSED) { @@ -1348,7 +1335,8 @@ e_block_pack_status ClusterLegalizer::try_pack_molecule(t_pack_molecule* molecul if (molecule->is_chain()) { /* Chained molecules often take up lots of area and are important, * if a chain is packed in, want to rename logic block to match chain name */ - AtomBlockId chain_root_blk_id = molecule->atom_block_ids[molecule->pack_pattern->root_block->block_id]; + AtomBlockId chain_root_blk_id + = molecule->atom_block_ids[molecule->pack_pattern->root_block->block_id]; t_pb* cur_pb = atom_ctx.lookup.atom_pb(chain_root_blk_id)->parent_pb; while (cur_pb != nullptr) { free(cur_pb->name); @@ -1447,17 +1435,17 @@ e_block_pack_status ClusterLegalizer::try_pack_molecule(t_pack_molecule* molecul return block_pack_status; } -std::tuple -ClusterLegalizer::start_new_cluster(t_pack_molecule* molecule, - t_logical_block_type_ptr cluster_type, - int cluster_mode) { +std::tuple ClusterLegalizer::start_new_cluster( + t_pack_molecule* molecule, + t_logical_block_type_ptr cluster_type, + int cluster_mode) { // Safety asserts to ensure the API is being called with valid arguments. VTR_ASSERT_DEBUG(molecule != nullptr); VTR_ASSERT_DEBUG(cluster_type != nullptr); VTR_ASSERT_DEBUG(cluster_mode < cluster_type->pb_graph_head->pb_type->num_modes); // Ensure that the molecule has not already been placed. - VTR_ASSERT_SAFE(molecule_cluster_.find(molecule) == molecule_cluster_.end() || - !molecule_cluster_[molecule].is_valid()); + VTR_ASSERT_SAFE(molecule_cluster_.find(molecule) == molecule_cluster_.end() + || !molecule_cluster_[molecule].is_valid()); // Safety asserts to ensure that the API was initialized properly. VTR_ASSERT_DEBUG(lb_type_rr_graphs_ != nullptr); @@ -1471,11 +1459,11 @@ ClusterLegalizer::start_new_cluster(t_pack_molecule* molecule, cluster_pb->mode = cluster_mode; // Allocate and load the LB router data - t_lb_router_data* router_data = alloc_and_load_router_data(&lb_type_rr_graphs_[cluster_type->index], - cluster_type); + t_lb_router_data* router_data = alloc_and_load_router_data(&lb_type_rr_graphs_[cluster_type->index], cluster_type); // Allocate and load the cluster's placement stats - t_intra_cluster_placement_stats* cluster_placement_stats = alloc_and_load_cluster_placement_stats(cluster_type, cluster_mode); + t_intra_cluster_placement_stats* cluster_placement_stats + = alloc_and_load_cluster_placement_stats(cluster_type, cluster_mode); // Create the new cluster LegalizationCluster new_cluster; @@ -1491,10 +1479,7 @@ ClusterLegalizer::start_new_cluster(t_pack_molecule* molecule, // (meaning all cluster pins are allowed to be used). const t_ext_pin_util FULL_EXTERNAL_PIN_UTIL(1., 1.); LegalizationClusterId new_cluster_id = LegalizationClusterId(legalization_cluster_ids_.size()); - e_block_pack_status pack_status = try_pack_molecule(molecule, - new_cluster, - new_cluster_id, - FULL_EXTERNAL_PIN_UTIL); + e_block_pack_status pack_status = try_pack_molecule(molecule, new_cluster, new_cluster_id, FULL_EXTERNAL_PIN_UTIL); if (pack_status == e_block_pack_status::BLK_PASSED) { // Give the new cluster pb a name. The current convention is to name the @@ -1521,28 +1506,23 @@ ClusterLegalizer::start_new_cluster(t_pack_molecule* molecule, return {pack_status, new_cluster_id}; } -e_block_pack_status ClusterLegalizer::add_mol_to_cluster(t_pack_molecule* molecule, - LegalizationClusterId cluster_id) { +e_block_pack_status ClusterLegalizer::add_mol_to_cluster(t_pack_molecule* molecule, LegalizationClusterId cluster_id) { // Safety asserts to make sure the inputs are valid. VTR_ASSERT_SAFE(cluster_id.is_valid() && (size_t)cluster_id < legalization_clusters_.size()); VTR_ASSERT(legalization_cluster_ids_[cluster_id].is_valid() && "Cannot add to a destroyed cluster"); // Ensure that the molecule has not already been placed. - VTR_ASSERT(molecule_cluster_.find(molecule) == molecule_cluster_.end() || - !molecule_cluster_[molecule].is_valid()); + VTR_ASSERT(molecule_cluster_.find(molecule) == molecule_cluster_.end() || !molecule_cluster_[molecule].is_valid()); // Safety asserts to ensure that the API was initialized properly. VTR_ASSERT_DEBUG(lb_type_rr_graphs_ != nullptr); // Get the cluster. LegalizationCluster& cluster = legalization_clusters_[cluster_id]; VTR_ASSERT(cluster.router_data != nullptr && cluster.placement_stats != nullptr - && "Cannot add molecule to cleaned cluster!"); + && "Cannot add molecule to cleaned cluster!"); // Set the target_external_pin_util. t_ext_pin_util target_ext_pin_util = target_external_pin_util_.get_pin_util(cluster.type->name); // Try to pack the molecule into the cluster. - e_block_pack_status pack_status = try_pack_molecule(molecule, - cluster, - cluster_id, - target_ext_pin_util); + e_block_pack_status pack_status = try_pack_molecule(molecule, cluster, cluster_id, target_ext_pin_util); // If the packing was successful, set the molecules' cluster to this one. if (pack_status == e_block_pack_status::BLK_PASSED) @@ -1559,8 +1539,7 @@ void ClusterLegalizer::destroy_cluster(LegalizationClusterId cluster_id) { LegalizationCluster& cluster = legalization_clusters_[cluster_id]; // Remove all molecules from the cluster. for (t_pack_molecule* mol : cluster.molecules) { - VTR_ASSERT_SAFE(molecule_cluster_.find(mol) != molecule_cluster_.end() && - molecule_cluster_[mol] == cluster_id); + VTR_ASSERT_SAFE(molecule_cluster_.find(mol) != molecule_cluster_.end() && molecule_cluster_[mol] == cluster_id); molecule_cluster_[mol] = LegalizationClusterId::INVALID(); // The overall clustering algorithm uses this valid flag to indicate // that a molecule has not been packed (clustered) yet. Since we are @@ -1624,7 +1603,7 @@ void ClusterLegalizer::clean_cluster(LegalizationClusterId cluster_id) { // Get the cluster. LegalizationCluster& cluster = legalization_clusters_[cluster_id]; VTR_ASSERT(cluster.router_data != nullptr && cluster.placement_stats != nullptr - && "Should not clean an already cleaned cluster!"); + && "Should not clean an already cleaned cluster!"); // Free the pb stats. free_pb_stats_recursive(cluster.pb); // Load the pb_route so we can free the cluster router data. @@ -1664,7 +1643,8 @@ ClusterLegalizer::ClusterLegalizer(const AtomNetlist& atom_netlist, ClusterLegalizationStrategy cluster_legalization_strategy, bool enable_pin_feasibility_filter, int feasible_block_array_size, - int log_verbosity) : prepacker_(prepacker) { + int log_verbosity) + : prepacker_(prepacker) { // Verify that the inputs are valid. VTR_ASSERT_SAFE(lb_type_rr_graphs != nullptr); @@ -1686,10 +1666,7 @@ ClusterLegalizer::ClusterLegalizer(const AtomNetlist& atom_netlist, num_models_ = count_models(user_models) + count_models(library_models); // Find all NoC router atoms. std::vector noc_atoms = find_noc_router_atoms(atom_netlist); - update_noc_reachability_partitions(noc_atoms, - atom_netlist, - high_fanout_thresholds, - atom_noc_grp_id_); + update_noc_reachability_partitions(noc_atoms, atom_netlist, high_fanout_thresholds, atom_noc_grp_id_); // Copy the options passed by the user cluster_legalization_strategy_ = cluster_legalization_strategy; enable_pin_feasibility_filter_ = enable_pin_feasibility_filter; @@ -1724,17 +1701,14 @@ void ClusterLegalizer::verify() { //Each atom should be part of a pb const t_pb* atom_pb = atom_ctx.lookup.atom_pb(blk_id); if (!atom_pb) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Atom block %s is not mapped to a pb\n", + VPR_FATAL_ERROR(VPR_ERROR_PACK, "Atom block %s is not mapped to a pb\n", atom_ctx.nlist.block_name(blk_id).c_str()); } //Check the reverse mapping is consistent if (atom_ctx.lookup.pb_atom(atom_pb) != blk_id) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "pb %s does not contain atom block %s but atom block %s maps to pb.\n", - atom_pb->name, - atom_ctx.nlist.block_name(blk_id).c_str(), + VPR_FATAL_ERROR(VPR_ERROR_PACK, "pb %s does not contain atom block %s but atom block %s maps to pb.\n", + atom_pb->name, atom_ctx.nlist.block_name(blk_id).c_str(), atom_ctx.nlist.block_name(blk_id).c_str()); } @@ -1748,15 +1722,13 @@ void ClusterLegalizer::verify() { LegalizationClusterId cluster_id = get_atom_cluster(blk_id); if (cluster_id == LegalizationClusterId::INVALID()) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Atom %s is not mapped to a CLB\n", + VPR_FATAL_ERROR(VPR_ERROR_PACK, "Atom %s is not mapped to a CLB\n", atom_ctx.nlist.block_name(blk_id).c_str()); } if (cur_pb != get_cluster_pb(cluster_id)) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "CLB %s does not match CLB contained by pb %s.\n", - cur_pb->name, atom_pb->name); + VPR_FATAL_ERROR(VPR_ERROR_PACK, "CLB %s does not match CLB contained by pb %s.\n", cur_pb->name, + atom_pb->name); } } @@ -1764,21 +1736,18 @@ void ClusterLegalizer::verify() { for (LegalizationClusterId cluster_id : clusters()) { if (!cluster_id.is_valid()) continue; - check_cluster_atom_blocks(get_cluster_pb(cluster_id), - atoms_checked); + check_cluster_atom_blocks(get_cluster_pb(cluster_id), atoms_checked); } for (auto blk_id : atom_ctx.nlist.blocks()) { if (!atoms_checked.count(blk_id)) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Atom block %s not found in any cluster.\n", + VPR_FATAL_ERROR(VPR_ERROR_PACK, "Atom block %s not found in any cluster.\n", atom_ctx.nlist.block_name(blk_id).c_str()); } } } -bool ClusterLegalizer::is_molecule_compatible(t_pack_molecule* molecule, - LegalizationClusterId cluster_id) const { +bool ClusterLegalizer::is_molecule_compatible(t_pack_molecule* molecule, LegalizationClusterId cluster_id) const { VTR_ASSERT_SAFE(molecule != nullptr); VTR_ASSERT_SAFE(cluster_id.is_valid() && (size_t)cluster_id < legalization_clusters_.size()); // Go through each atom in the molecule and check if there exists a free @@ -1798,8 +1767,7 @@ bool ClusterLegalizer::is_molecule_compatible(t_pack_molecule* molecule, // FIXME: This assert does not make sense. Can still check this even // if the atom was clustered. VTR_ASSERT(!is_atom_clustered(atom_blk_id)); - if (!exists_free_primitive_for_atom_block(cluster.placement_stats, - atom_blk_id)) { + if (!exists_free_primitive_for_atom_block(cluster.placement_stats, atom_blk_id)) { return false; } } @@ -1830,4 +1798,3 @@ ClusterLegalizer::~ClusterLegalizer() { destroy_cluster(cluster_id); } } - diff --git a/vpr/src/pack/cluster_legalizer.h b/vpr/src/pack/cluster_legalizer.h index 5be2404cfd1..79db27db2a5 100644 --- a/vpr/src/pack/cluster_legalizer.h +++ b/vpr/src/pack/cluster_legalizer.h @@ -39,18 +39,18 @@ typedef vtr::StrongId LegalizationClusterId /// Allows the user of the API to select how thorough the legalizer should be /// when adding molecules into clusters. enum class ClusterLegalizationStrategy { - FULL, // Run the full legalizer (including intra-lb routing) - SKIP_INTRA_LB_ROUTE // Do all legality checks except intra-lb routing + FULL, // Run the full legalizer (including intra-lb routing) + SKIP_INTRA_LB_ROUTE // Do all legality checks except intra-lb routing }; /// @brief The status of the cluster legalization. enum class e_block_pack_status { - BLK_PASSED, // Passed legalization. - BLK_FAILED_FEASIBLE, // Failed due to block not feasibly being able to go in the cluster. - BLK_FAILED_ROUTE, // Failed due to intra-lb routing failure. - BLK_FAILED_FLOORPLANNING, // Failed due to not being compatible with the cluster's current PartitionRegion. - BLK_FAILED_NOC_GROUP, // Failed due to not being compatible with the cluster's NoC group. - BLK_STATUS_UNDEFINED // Undefined status. Something went wrong. + BLK_PASSED, // Passed legalization. + BLK_FAILED_FEASIBLE, // Failed due to block not feasibly being able to go in the cluster. + BLK_FAILED_ROUTE, // Failed due to intra-lb routing failure. + BLK_FAILED_FLOORPLANNING, // Failed due to not being compatible with the cluster's current PartitionRegion. + BLK_FAILED_NOC_GROUP, // Failed due to not being compatible with the cluster's NoC group. + BLK_STATUS_UNDEFINED // Undefined status. Something went wrong. }; /* @@ -164,15 +164,14 @@ struct LegalizationCluster { * // new_cluster_id now contains a fully legalized cluster. */ class ClusterLegalizer { -public: + public: // Iterator for the legalization cluster IDs typedef typename vtr::vector_map::const_iterator cluster_iterator; // Range for the legalization cluster IDs typedef typename vtr::Range cluster_range; -private: - + private: /* * @brief Helper method that tries to pack the given molecule into a cluster. * @@ -191,8 +190,7 @@ class ClusterLegalizer { LegalizationClusterId cluster_id, const t_ext_pin_util& max_external_pin_util); -public: - + public: // Explicitly deleted default constructor. Need to use other constructor to // initialize state correctly. ClusterLegalizer() = delete; @@ -271,10 +269,9 @@ class ClusterLegalizer { * cluster. If the new cluster could not be created, the pack * status will return the reason and the ID would be invalid. */ - std::tuple - start_new_cluster(t_pack_molecule* molecule, - t_logical_block_type_ptr cluster_type, - int cluster_mode); + std::tuple start_new_cluster(t_pack_molecule* molecule, + t_logical_block_type_ptr cluster_type, + int cluster_mode); /* * @brief Add an unclustered molecule to the given legalization cluster. @@ -292,8 +289,7 @@ class ClusterLegalizer { * @return The status of the pack (if the addition was successful and * if not why). */ - e_block_pack_status add_mol_to_cluster(t_pack_molecule* molecule, - LegalizationClusterId cluster_id); + e_block_pack_status add_mol_to_cluster(t_pack_molecule* molecule, LegalizationClusterId cluster_id); /* * @brief Destroy the given cluster. @@ -396,8 +392,7 @@ class ClusterLegalizer { * go in a cluster. By calling it you can save runtime for impossible cases * vs. calling the full checks. */ - bool is_molecule_compatible(t_pack_molecule* molecule, - LegalizationClusterId cluster_id) const; + bool is_molecule_compatible(t_pack_molecule* molecule, LegalizationClusterId cluster_id) const; /// @brief Gets the top-level pb of the given cluster. inline t_pb* get_cluster_pb(LegalizationClusterId cluster_id) const { @@ -436,17 +431,13 @@ class ClusterLegalizer { /// @brief Returns a reference to the target_external_pin_util object. This /// allows the user to modify the external pin utilization if needed. - inline t_ext_pin_util_targets& get_target_external_pin_util() { - return target_external_pin_util_; - } + inline t_ext_pin_util_targets& get_target_external_pin_util() { return target_external_pin_util_; } /// @bried Gets the max size a cluster could physically be. /// /// This is the maximum number of primitives any cluster could ever have /// in the architecture. - inline size_t get_max_cluster_size() const { - return max_cluster_size_; - } + inline size_t get_max_cluster_size() const { return max_cluster_size_; } /* * @brief Set the legalization strategy of the cluster legalizer. @@ -474,14 +465,12 @@ class ClusterLegalizer { * * @param verbosity The value to set the verbosity to. */ - inline void set_log_verbosity(int verbosity) { - log_verbosity_ = verbosity; - } + inline void set_log_verbosity(int verbosity) { log_verbosity_ = verbosity; } /// @brief Destructor of the class. Frees allocated data. ~ClusterLegalizer(); -private: + private: /// @brief A vector of the legalization cluster IDs. If any of them are /// invalid, then that means that the cluster has been destroyed. vtr::vector_map legalization_cluster_ids_; @@ -556,4 +545,3 @@ class ClusterLegalizer { /// legalized into clusters. const Prepacker& prepacker_; }; - diff --git a/vpr/src/pack/cluster_placement.cpp b/vpr/src/pack/cluster_placement.cpp index 917545cd3ba..8099eba7d2c 100644 --- a/vpr/src/pack/cluster_placement.cpp +++ b/vpr/src/pack/cluster_placement.cpp @@ -53,9 +53,7 @@ static bool expand_forced_pack_molecule_placement(t_intra_cluster_placement_stat t_pb_graph_node** primitives_list, float* cost); -static t_pb_graph_pin* expand_pack_molecule_pin_edge(int pattern_id, - const t_pb_graph_pin* cur_pin, - bool forward); +static t_pb_graph_pin* expand_pack_molecule_pin_edge(int pattern_id, const t_pb_graph_pin* cur_pin, bool forward); /****************************************/ /*Function Definitions */ @@ -66,12 +64,16 @@ void t_intra_cluster_placement_stats::move_inflight_to_tried() { in_flight.clear(); } -void t_intra_cluster_placement_stats::invalidate_primitive_and_increment_iterator(int pb_type_index, std::unordered_multimap::iterator& it) { +void t_intra_cluster_placement_stats::invalidate_primitive_and_increment_iterator( + int pb_type_index, + std::unordered_multimap::iterator& it) { invalid.insert(*it); valid_primitives[pb_type_index].erase(it++); } -void t_intra_cluster_placement_stats::move_primitive_to_inflight(int pb_type_index, std::unordered_multimap::iterator& it) { +void t_intra_cluster_placement_stats::move_primitive_to_inflight( + int pb_type_index, + std::unordered_multimap::iterator& it) { in_flight.insert(*it); valid_primitives[pb_type_index].erase(it); } @@ -81,7 +83,8 @@ void t_intra_cluster_placement_stats::move_primitive_to_inflight(int pb_type_ind * * @note that valid status is not changed because if the primitive is not valid, it will get properly collected later */ -void t_intra_cluster_placement_stats::insert_primitive_in_valid_primitives(std::pair cluster_placement_primitive) { +void t_intra_cluster_placement_stats::insert_primitive_in_valid_primitives( + std::pair cluster_placement_primitive) { int i; bool success = false; int null_index = OPEN; @@ -117,13 +120,9 @@ void t_intra_cluster_placement_stats::flush_intermediate_queues() { flush_queue(tried); } -void t_intra_cluster_placement_stats::flush_invalid_queue() { - flush_queue(invalid); -} +void t_intra_cluster_placement_stats::flush_invalid_queue() { flush_queue(invalid); } -bool t_intra_cluster_placement_stats::in_flight_empty() { - return in_flight.empty(); -} +bool t_intra_cluster_placement_stats::in_flight_empty() { return in_flight.empty(); } t_pb_type* t_intra_cluster_placement_stats::in_flight_type() { return in_flight.begin()->second->pb_graph_node->pb_type; @@ -147,7 +146,7 @@ void t_intra_cluster_placement_stats::free_primitives() { } t_intra_cluster_placement_stats* alloc_and_load_cluster_placement_stats(t_logical_block_type_ptr cluster_type, - int cluster_mode) { + int cluster_mode) { t_intra_cluster_placement_stats* cluster_placement_stats = new t_intra_cluster_placement_stats; *cluster_placement_stats = t_intra_cluster_placement_stats(); // TODO: This initialization may be able to be made more efficient. @@ -155,13 +154,10 @@ t_intra_cluster_placement_stats* alloc_and_load_cluster_placement_stats(t_logica // stats. if (!is_empty_type(cluster_type)) { cluster_placement_stats->curr_molecule = nullptr; - load_cluster_placement_stats_for_pb_graph_node(cluster_placement_stats, - cluster_type->pb_graph_head); + load_cluster_placement_stats_for_pb_graph_node(cluster_placement_stats, cluster_type->pb_graph_head); } reset_cluster_placement_stats(cluster_placement_stats); - set_mode_cluster_placement_stats(cluster_placement_stats, - cluster_type->pb_graph_head, - cluster_mode); + set_mode_cluster_placement_stats(cluster_placement_stats, cluster_type->pb_graph_head, cluster_mode); return cluster_placement_stats; } @@ -212,13 +208,18 @@ bool get_next_primitive_list(t_intra_cluster_placement_stats* cluster_placement_ // Iterate over each primitive block type in the current cluster_placement_stats for (i = 0; i < cluster_placement_stats->num_pb_types; i++) { if (!cluster_placement_stats->valid_primitives[i].empty()) { - t_cluster_placement_primitive* cur_cluster_placement_primitive = cluster_placement_stats->valid_primitives[i].begin()->second; - if (primitive_type_feasible(molecule->atom_block_ids[molecule->root], cur_cluster_placement_primitive->pb_graph_node->pb_type)) { + t_cluster_placement_primitive* cur_cluster_placement_primitive + = cluster_placement_stats->valid_primitives[i].begin()->second; + if (primitive_type_feasible(molecule->atom_block_ids[molecule->root], + cur_cluster_placement_primitive->pb_graph_node->pb_type)) { // Iterate over the unordered_multimap of the valid primitives of a specific pb primitive type - for (auto it = cluster_placement_stats->valid_primitives[i].begin(); it != cluster_placement_stats->valid_primitives[i].end(); /*loop increment is done inside the loop*/) { + for (auto it = cluster_placement_stats->valid_primitives[i].begin(); + it != cluster_placement_stats->valid_primitives[i].end(); + /*loop increment is done inside the loop*/) { //Lazily remove invalid primitives if (!it->second->valid) { - cluster_placement_stats->invalidate_primitive_and_increment_iterator(i, it); //iterator is incremented here + cluster_placement_stats->invalidate_primitive_and_increment_iterator( + i, it); //iterator is incremented here continue; } @@ -227,14 +228,12 @@ bool get_next_primitive_list(t_intra_cluster_placement_stats* cluster_placement_ /* check that the forced site index is within the available range */ int max_site = it->second->pb_graph_node->total_primitive_count - 1; if (force_site > max_site) { - VTR_LOG("The specified primitive site (%d) is out of range (max %d)\n", - force_site, max_site); + VTR_LOG("The specified primitive site (%d) is out of range (max %d)\n", force_site, + max_site); break; } if (force_site == it->second->pb_graph_node->flat_site_index) { - cost = try_place_molecule(cluster_placement_stats, - molecule, - it->second->pb_graph_node, + cost = try_place_molecule(cluster_placement_stats, molecule, it->second->pb_graph_node, primitives_list); if (cost < HUGE_POSITIVE_FLOAT) { cluster_placement_stats->move_primitive_to_inflight(i, it); @@ -249,14 +248,15 @@ bool get_next_primitive_list(t_intra_cluster_placement_stats* cluster_placement_ } /* try place molecule at root location cur */ - cost = try_place_molecule(cluster_placement_stats, - molecule, - it->second->pb_graph_node, + cost = try_place_molecule(cluster_placement_stats, molecule, it->second->pb_graph_node, primitives_list); // if the cost is lower than the best, or is equal to the best but this // primitive is more available in the cluster mark it as the best primitive - if (cost < lowest_cost || (found_best && best->second && cost == lowest_cost && it->second->pb_graph_node->total_primitive_count > best->second->pb_graph_node->total_primitive_count)) { + if (cost < lowest_cost + || (found_best && best->second && cost == lowest_cost + && it->second->pb_graph_node->total_primitive_count + > best->second->pb_graph_node->total_primitive_count)) { lowest_cost = cost; best = it; best_pb_type_index = i; @@ -280,10 +280,7 @@ bool get_next_primitive_list(t_intra_cluster_placement_stats* cluster_placement_ } } else { /* populate primitive list with best */ - cost = try_place_molecule(cluster_placement_stats, - molecule, - best->second->pb_graph_node, - primitives_list); + cost = try_place_molecule(cluster_placement_stats, molecule, best->second->pb_graph_node, primitives_list); VTR_ASSERT(cost == lowest_cost); /* take out best node and put it in flight */ @@ -345,7 +342,8 @@ static void load_cluster_placement_stats_for_pb_graph_node(t_intra_cluster_place */ for (auto& type_primitives : cluster_placement_stats->valid_primitives) { auto first_elem = type_primitives.find(0); - if (first_elem != type_primitives.end() && first_elem->second->pb_graph_node->pb_type == pb_graph_node->pb_type) { + if (first_elem != type_primitives.end() + && first_elem->second->pb_graph_node->pb_type == pb_graph_node->pb_type) { type_primitives.insert({type_primitives.size(), placement_primitive}); success = true; break; @@ -358,15 +356,15 @@ static void load_cluster_placement_stats_for_pb_graph_node(t_intra_cluster_place */ if (!success) { cluster_placement_stats->valid_primitives.emplace_back(); - cluster_placement_stats->valid_primitives[cluster_placement_stats->valid_primitives.size() - 1].insert({0, placement_primitive}); + cluster_placement_stats->valid_primitives[cluster_placement_stats->valid_primitives.size() - 1].insert( + {0, placement_primitive}); cluster_placement_stats->num_pb_types++; } } else { // not a primitive, recursively call the function for all its children for (i = 0; i < pb_type->num_modes; i++) { for (j = 0; j < pb_type->modes[i].num_pb_type_children; j++) { - for (k = 0; k < pb_type->modes[i].pb_type_children[j].num_pb; - k++) { + for (k = 0; k < pb_type->modes[i].pb_type_children[j].num_pb; k++) { load_cluster_placement_stats_for_pb_graph_node(cluster_placement_stats, &pb_graph_node->child_pb_graph_nodes[i][j][k]); } @@ -375,8 +373,7 @@ static void load_cluster_placement_stats_for_pb_graph_node(t_intra_cluster_place } } -void commit_primitive(t_intra_cluster_placement_stats* cluster_placement_stats, - const t_pb_graph_node* primitive) { +void commit_primitive(t_intra_cluster_placement_stats* cluster_placement_stats, const t_pb_graph_node* primitive) { t_pb_graph_node *pb_graph_node, *skip; float incr_cost; int i, j, k; @@ -391,7 +388,8 @@ void commit_primitive(t_intra_cluster_placement_stats* cluster_placement_stats, VTR_ASSERT(cur->valid == true); cur->valid = false; - incr_cost = -0.01; /* cost of using a node drops as its neighbours are used, this drop should be small compared to scarcity values */ + incr_cost + = -0.01; /* cost of using a node drops as its neighbours are used, this drop should be small compared to scarcity values */ pb_graph_node = cur->pb_graph_node; /* walk up pb_graph_node and update primitives of children */ @@ -404,13 +402,14 @@ void commit_primitive(t_intra_cluster_placement_stats* cluster_placement_stats, for (k = 0; k < pb_graph_node->pb_type->modes[i].pb_type_children[j].num_pb; k++) { if (&pb_graph_node->child_pb_graph_nodes[i][j][k] != skip) { update_primitive_cost_or_status(cluster_placement_stats, - &pb_graph_node->child_pb_graph_nodes[i][j][k], - incr_cost, (bool)(i == valid_mode)); + &pb_graph_node->child_pb_graph_nodes[i][j][k], incr_cost, + (bool)(i == valid_mode)); } } } } - incr_cost /= 10; /* blocks whose ancestor is further away in tree should be affected less than blocks closer in tree */ + incr_cost + /= 10; /* blocks whose ancestor is further away in tree should be affected less than blocks closer in tree */ } } @@ -426,9 +425,7 @@ static void set_mode_cluster_placement_stats(t_intra_cluster_placement_stats* cl for (j = 0; j < pb_graph_node->pb_type->modes[i].num_pb_type_children; j++) { for (k = 0; k < pb_graph_node->pb_type->modes[i].pb_type_children[j].num_pb; k++) { update_primitive_cost_or_status(cluster_placement_stats, - &pb_graph_node->child_pb_graph_nodes[i][j][k], - 0, - false); + &pb_graph_node->child_pb_graph_nodes[i][j][k], 0, false); } } } @@ -459,8 +456,8 @@ static void update_primitive_cost_or_status(t_intra_cluster_placement_stats* clu for (j = 0; j < pb_graph_node->pb_type->modes[i].num_pb_type_children; j++) { for (k = 0; k < pb_graph_node->pb_type->modes[i].pb_type_children[j].num_pb; k++) { update_primitive_cost_or_status(cluster_placement_stats, - &pb_graph_node->child_pb_graph_nodes[i][j][k], - incremental_cost, valid); + &pb_graph_node->child_pb_graph_nodes[i][j][k], incremental_cost, + valid); } } } @@ -478,21 +475,18 @@ static float try_place_molecule(t_intra_cluster_placement_stats* cluster_placeme float cost = HUGE_POSITIVE_FLOAT; list_size = get_array_size_of_molecule(molecule); - if (primitive_type_feasible(molecule->atom_block_ids[molecule->root], - root->pb_type)) { - t_cluster_placement_primitive* root_placement_primitive = cluster_placement_stats->get_pb_graph_node_placement_primitive(root); + if (primitive_type_feasible(molecule->atom_block_ids[molecule->root], root->pb_type)) { + t_cluster_placement_primitive* root_placement_primitive + = cluster_placement_stats->get_pb_graph_node_placement_primitive(root); if (root_placement_primitive->valid) { for (i = 0; i < list_size; i++) { primitives_list[i] = nullptr; } - cost = root_placement_primitive->base_cost - + root_placement_primitive->incremental_cost; + cost = root_placement_primitive->base_cost + root_placement_primitive->incremental_cost; primitives_list[molecule->root] = root; if (molecule->type == MOLECULE_FORCED_PACK) { - if (!expand_forced_pack_molecule_placement(cluster_placement_stats, - molecule, - molecule->pack_pattern->root_block, - primitives_list, + if (!expand_forced_pack_molecule_placement(cluster_placement_stats, molecule, + molecule->pack_pattern->root_block, primitives_list, &cost)) { return HUGE_POSITIVE_FLOAT; } @@ -563,12 +557,17 @@ static bool expand_forced_pack_molecule_placement(t_intra_cluster_placement_stat if (next_pin != nullptr) { next_primitive = next_pin->parent_node; /* Check for legality of placement, if legal, expand from legal placement, if not, return false */ - if (molecule->atom_block_ids[next_block->block_id] && primitives_list[next_block->block_id] == nullptr) { - t_cluster_placement_primitive* next_placement_primitive = cluster_placement_stats->get_pb_graph_node_placement_primitive(next_primitive); - if (next_placement_primitive->valid && primitive_type_feasible(molecule->atom_block_ids[next_block->block_id], next_primitive->pb_type)) { + if (molecule->atom_block_ids[next_block->block_id] + && primitives_list[next_block->block_id] == nullptr) { + t_cluster_placement_primitive* next_placement_primitive + = cluster_placement_stats->get_pb_graph_node_placement_primitive(next_primitive); + if (next_placement_primitive->valid + && primitive_type_feasible(molecule->atom_block_ids[next_block->block_id], + next_primitive->pb_type)) { primitives_list[next_block->block_id] = next_primitive; *cost += next_placement_primitive->base_cost + next_placement_primitive->incremental_cost; - if (!expand_forced_pack_molecule_placement(cluster_placement_stats, molecule, next_block, primitives_list, cost)) { + if (!expand_forced_pack_molecule_placement(cluster_placement_stats, molecule, next_block, + primitives_list, cost)) { return false; } } else { @@ -599,14 +598,11 @@ static t_pb_graph_pin* expand_pack_molecule_pin_edge(const int pattern_id, for (i = 0; i < cur_pin->num_output_edges; i++) { /* one fanout assumption */ if (cur_pin->output_edges[i]->infer_pattern) { - for (k = 0; k < cur_pin->output_edges[i]->num_output_pins; - k++) { - if (cur_pin->output_edges[i]->output_pins[k]->parent_node->pb_type->num_modes - == 0) { + for (k = 0; k < cur_pin->output_edges[i]->num_output_pins; k++) { + if (cur_pin->output_edges[i]->output_pins[k]->parent_node->pb_type->num_modes == 0) { temp_pin = cur_pin->output_edges[i]->output_pins[k]; } else { - temp_pin = expand_pack_molecule_pin_edge(pattern_id, - cur_pin->output_edges[i]->output_pins[k], + temp_pin = expand_pack_molecule_pin_edge(pattern_id, cur_pin->output_edges[i]->output_pins[k], forward); } } @@ -615,20 +611,14 @@ static t_pb_graph_pin* expand_pack_molecule_pin_edge(const int pattern_id, dest_pin = temp_pin; } } else { - for (j = 0; j < cur_pin->output_edges[i]->num_pack_patterns; - j++) { - if (cur_pin->output_edges[i]->pack_pattern_indices[j] - == pattern_id) { - for (k = 0; - k < cur_pin->output_edges[i]->num_output_pins; - k++) { - if (cur_pin->output_edges[i]->output_pins[k]->parent_node->pb_type->num_modes - == 0) { + for (j = 0; j < cur_pin->output_edges[i]->num_pack_patterns; j++) { + if (cur_pin->output_edges[i]->pack_pattern_indices[j] == pattern_id) { + for (k = 0; k < cur_pin->output_edges[i]->num_output_pins; k++) { + if (cur_pin->output_edges[i]->output_pins[k]->parent_node->pb_type->num_modes == 0) { temp_pin = cur_pin->output_edges[i]->output_pins[k]; } else { - temp_pin = expand_pack_molecule_pin_edge(pattern_id, - cur_pin->output_edges[i]->output_pins[k], - forward); + temp_pin = expand_pack_molecule_pin_edge( + pattern_id, cur_pin->output_edges[i]->output_pins[k], forward); } } if (temp_pin != nullptr) { @@ -644,12 +634,10 @@ static t_pb_graph_pin* expand_pack_molecule_pin_edge(const int pattern_id, /* one fanout assumption */ if (cur_pin->input_edges[i]->infer_pattern) { for (k = 0; k < cur_pin->input_edges[i]->num_input_pins; k++) { - if (cur_pin->input_edges[i]->input_pins[k]->parent_node->pb_type->num_modes - == 0) { + if (cur_pin->input_edges[i]->input_pins[k]->parent_node->pb_type->num_modes == 0) { temp_pin = cur_pin->input_edges[i]->input_pins[k]; } else { - temp_pin = expand_pack_molecule_pin_edge(pattern_id, - cur_pin->input_edges[i]->input_pins[k], + temp_pin = expand_pack_molecule_pin_edge(pattern_id, cur_pin->input_edges[i]->input_pins[k], forward); } } @@ -658,19 +646,14 @@ static t_pb_graph_pin* expand_pack_molecule_pin_edge(const int pattern_id, dest_pin = temp_pin; } } else { - for (j = 0; j < cur_pin->input_edges[i]->num_pack_patterns; - j++) { - if (cur_pin->input_edges[i]->pack_pattern_indices[j] - == pattern_id) { - for (k = 0; k < cur_pin->input_edges[i]->num_input_pins; - k++) { - if (cur_pin->input_edges[i]->input_pins[k]->parent_node->pb_type->num_modes - == 0) { + for (j = 0; j < cur_pin->input_edges[i]->num_pack_patterns; j++) { + if (cur_pin->input_edges[i]->pack_pattern_indices[j] == pattern_id) { + for (k = 0; k < cur_pin->input_edges[i]->num_input_pins; k++) { + if (cur_pin->input_edges[i]->input_pins[k]->parent_node->pb_type->num_modes == 0) { temp_pin = cur_pin->input_edges[i]->input_pins[k]; } else { - temp_pin = expand_pack_molecule_pin_edge(pattern_id, - cur_pin->input_edges[i]->input_pins[k], - forward); + temp_pin = expand_pack_molecule_pin_edge( + pattern_id, cur_pin->input_edges[i]->input_pins[k], forward); } } if (temp_pin != nullptr) { @@ -701,8 +684,7 @@ bool exists_free_primitive_for_atom_block(t_intra_cluster_placement_stats* clust /* might have a primitive in flight that's still valid */ if (!cluster_placement_stats->in_flight_empty()) { - if (primitive_type_feasible(blk_id, - cluster_placement_stats->in_flight_type())) { + if (primitive_type_feasible(blk_id, cluster_placement_stats->in_flight_type())) { return true; } } @@ -710,8 +692,11 @@ bool exists_free_primitive_for_atom_block(t_intra_cluster_placement_stats* clust /* Look through list of available primitives to see if any valid */ for (i = 0; i < cluster_placement_stats->num_pb_types; i++) { //for (auto& primitive : cluster_placement_stats->valid_primitives[i]) { - if (!cluster_placement_stats->valid_primitives[i].empty() && primitive_type_feasible(blk_id, cluster_placement_stats->valid_primitives[i].begin()->second->pb_graph_node->pb_type)) { - for (auto it = cluster_placement_stats->valid_primitives[i].begin(); it != cluster_placement_stats->valid_primitives[i].end();) { + if (!cluster_placement_stats->valid_primitives[i].empty() + && primitive_type_feasible( + blk_id, cluster_placement_stats->valid_primitives[i].begin()->second->pb_graph_node->pb_type)) { + for (auto it = cluster_placement_stats->valid_primitives[i].begin(); + it != cluster_placement_stats->valid_primitives[i].end();) { if (it->second->valid) return true; else { diff --git a/vpr/src/pack/cluster_placement.h b/vpr/src/pack/cluster_placement.h index f3d840457ca..a0361c57292 100644 --- a/vpr/src/pack/cluster_placement.h +++ b/vpr/src/pack/cluster_placement.h @@ -18,8 +18,9 @@ */ class t_intra_cluster_placement_stats { public: - int num_pb_types; ///::iterator& it); + void move_primitive_to_inflight(int pb_type_index, + std::unordered_multimap::iterator& it); /** * @brief Move the primitive at (it) to invalid and increment the current iterator @@ -48,14 +50,17 @@ class t_intra_cluster_placement_stats { * @param pb_type_index: is the index of this pb_type in valid_primitives vector * @param it: is the iterator pointing at the element that needs to be moved to invalid */ - void invalidate_primitive_and_increment_iterator(int pb_type_index, std::unordered_multimap::iterator& it); + void invalidate_primitive_and_increment_iterator( + int pb_type_index, + std::unordered_multimap::iterator& it); /** * @brief Add a primitive in its correct location in valid_primitives vector based on its pb_type * * @param cluster_placement_primitive: a pair of the cluster_placement_primtive and its corresponding index(for reference in pb_graph_node) */ - void insert_primitive_in_valid_primitives(std::pair cluster_placement_primitive); + void insert_primitive_in_valid_primitives( + std::pair cluster_placement_primitive); /** * @brief Move all the primitives from (in_flight and tried) maps to valid primitives and clear (in_flight and tried) @@ -107,9 +112,12 @@ class t_intra_cluster_placement_stats { void free_primitives(); private: - std::unordered_multimap in_flight; /// tried; /// invalid; /// + in_flight; /// + tried; /// + invalid; ///* mode_map, t_mode_selection_status* mode_status); +static void commit_remove_rt(t_lb_trace* rt, + t_lb_router_data* router_data, + e_commit_remove op, + std::unordered_map* mode_map, + t_mode_selection_status* mode_status); static bool is_skip_route_net(t_lb_trace* rt, t_lb_router_data* router_data); static void add_source_to_rt(t_lb_router_data* router_data, int inet); -static void expand_rt(t_lb_router_data* router_data, int inet, reservable_pq, compare_expansion_node>& pq, int irt_net); -static void expand_rt_rec(t_lb_trace* rt, int prev_index, t_explored_node_tb* explored_node_tb, reservable_pq, compare_expansion_node>& pq, int irt_net, int explore_id_index); +static void expand_rt(t_lb_router_data* router_data, + int inet, + reservable_pq, compare_expansion_node>& pq, + int irt_net); +static void expand_rt_rec(t_lb_trace* rt, + int prev_index, + t_explored_node_tb* explored_node_tb, + reservable_pq, compare_expansion_node>& pq, + int irt_net, + int explore_id_index); static bool try_expand_nodes(t_lb_router_data* router_data, t_intra_lb_net* lb_net, t_expansion_node* exp_node, @@ -99,18 +110,28 @@ static void expand_edges(t_lb_router_data* router_data, int net_fanout, reservable_pq, compare_expansion_node>& pq); -static void expand_node(t_lb_router_data* router_data, t_expansion_node exp_node, reservable_pq, compare_expansion_node>& pq, int net_fanout); -static void expand_node_all_modes(t_lb_router_data* router_data, t_expansion_node exp_node, reservable_pq, compare_expansion_node>& pq, int net_fanout); +static void expand_node(t_lb_router_data* router_data, + t_expansion_node exp_node, + reservable_pq, compare_expansion_node>& pq, + int net_fanout); +static void expand_node_all_modes( + t_lb_router_data* router_data, + t_expansion_node exp_node, + reservable_pq, compare_expansion_node>& pq, + int net_fanout); static bool add_to_rt(t_lb_trace* rt, int node_index, t_lb_router_data* router_data, int irt_net); static bool is_route_success(t_lb_router_data* router_data); static t_lb_trace* find_node_in_rt(t_lb_trace* rt, int rt_index); static void reset_explored_node_tb(t_lb_router_data* router_data); static void save_and_reset_lb_route(t_lb_router_data* router_data); -static void load_trace_to_pb_route(t_pb_routes& pb_route, const int total_pins, const AtomNetId net_id, const int prev_pin_id, const t_lb_trace* trace); +static void load_trace_to_pb_route(t_pb_routes& pb_route, + const int total_pins, + const AtomNetId net_id, + const int prev_pin_id, + const t_lb_trace* trace); -static std::string describe_lb_type_rr_node(int inode, - const t_lb_router_data* router_data); +static std::string describe_lb_type_rr_node(int inode, const t_lb_router_data* router_data); static std::vector find_congested_rr_nodes(const std::vector& lb_type_graph, const t_lb_rr_node_stats* lb_rr_node_stats); @@ -133,7 +154,8 @@ static void print_trace(FILE* fp, t_lb_trace* trace, t_lb_router_data* router_da /** * Build data structures used by intra-logic block router */ -t_lb_router_data* alloc_and_load_router_data(std::vector* lb_type_graph, t_logical_block_type_ptr type) { +t_lb_router_data* alloc_and_load_router_data(std::vector* lb_type_graph, + t_logical_block_type_ptr type) { t_lb_router_data* router_data = new t_lb_router_data; int size; @@ -170,8 +192,7 @@ static bool route_has_conflict(t_lb_trace* rt, t_lb_router_data* router_data) { int cur_mode = -1; for (unsigned int i = 0; i < rt->next_nodes.size(); i++) { - int new_mode = get_lb_type_rr_graph_edge_mode(lb_type_graph, - rt->current_node, rt->next_nodes[i].current_node); + int new_mode = get_lb_type_rr_graph_edge_mode(lb_type_graph, rt->current_node, rt->next_nodes[i].current_node); if (cur_mode != -1 && cur_mode != new_mode) { return true; } @@ -211,7 +232,8 @@ static bool check_edge_for_route_conflicts(std::unordered_mapdisable_packing) { - if (std::find(pb_graph_node->illegal_modes.begin(), pb_graph_node->illegal_modes.end(), mode->index) == pb_graph_node->illegal_modes.end()) { + if (std::find(pb_graph_node->illegal_modes.begin(), pb_graph_node->illegal_modes.end(), mode->index) + == pb_graph_node->illegal_modes.end()) { pb_graph_node->illegal_modes.push_back(mode->index); } return true; @@ -219,14 +241,16 @@ static bool check_edge_for_route_conflicts(std::unordered_mapsecond != mode) { - std::cout << vtr::string_fmt("Differing modes for block. Got %s mode, while previously was %s for interconnect %s.", - mode->name, result.first->second->name, - edge->interconnect->name) + std::cout << vtr::string_fmt( + "Differing modes for block. Got %s mode, while previously was %s for interconnect %s.", mode->name, + result.first->second->name, edge->interconnect->name) << std::endl; // The illegal mode is added to the pb_graph_node as it resulted in a conflict during atom-to-atom routing. This mode cannot be used in the consequent cluster // generation try. - if (std::find(pb_graph_node->illegal_modes.begin(), pb_graph_node->illegal_modes.end(), result.first->second->index) == pb_graph_node->illegal_modes.end()) { + if (std::find(pb_graph_node->illegal_modes.begin(), pb_graph_node->illegal_modes.end(), + result.first->second->index) + == pb_graph_node->illegal_modes.end()) { pb_graph_node->illegal_modes.push_back(result.first->second->index); } @@ -366,8 +390,7 @@ static bool try_expand_nodes(t_lb_router_data* router_data, VTR_LOG("\t\t\tNo possible routing path from %s to %s: needed for net '%s' from net pin '%s'", describe_lb_type_rr_node(driver_rr_node, router_data).c_str(), describe_lb_type_rr_node(sink_rr_node, router_data).c_str(), - atom_nlist.net_name(net_id).c_str(), - atom_nlist.pin_name(driver_pin).c_str()); + atom_nlist.net_name(net_id).c_str(), atom_nlist.pin_name(driver_pin).c_str()); VTR_LOGV(sink_pin, " to net pin '%s'", atom_nlist.pin_name(sink_pin).c_str()); VTR_LOG("\n"); } @@ -400,9 +423,7 @@ static bool try_expand_nodes(t_lb_router_data* router_data, /* Attempt to route routing driver/targets on the current architecture * Follows pathfinder negotiated congestion algorithm */ -bool try_intra_lb_route(t_lb_router_data* router_data, - int verbosity, - t_mode_selection_status* mode_status) { +bool try_intra_lb_route(t_lb_router_data* router_data, int verbosity, t_mode_selection_status* mode_status) { std::vector& lb_nets = *router_data->intra_lb_nets; std::vector& lb_type_graph = *router_data->lb_type_graph; bool is_routed = false; @@ -453,7 +474,8 @@ bool try_intra_lb_route(t_lb_router_data* router_data, expand_rt(router_data, idx, pq, idx); - is_impossible = try_expand_nodes(router_data, &lb_nets[idx], &exp_node, pq, itarget, mode_status->expand_all_modes, verbosity); + is_impossible = try_expand_nodes(router_data, &lb_nets[idx], &exp_node, pq, itarget, + mode_status->expand_all_modes, verbosity); if (is_impossible && !mode_status->expand_all_modes) { mode_status->try_expand_all_modes = true; @@ -581,7 +603,11 @@ void free_intra_lb_nets(std::vector* intra_lb_nets) { ****************************************************************************/ /* Recurse through route tree trace to populate pb pin to atom net lookup array */ -static void load_trace_to_pb_route(t_pb_routes& pb_route, const int total_pins, const AtomNetId net_id, const int prev_pin_id, const t_lb_trace* trace) { +static void load_trace_to_pb_route(t_pb_routes& pb_route, + const int total_pins, + const AtomNetId net_id, + const int prev_pin_id, + const t_lb_trace* trace) { int ipin = trace->current_node; int driver_pb_pin_id = prev_pin_id; int cur_pin_id = OPEN; @@ -685,7 +711,8 @@ static void add_pin_to_rt_terminals(t_lb_router_data* router_data, const AtomPin if (atom_ctx.nlist.port_type(port_id) == PortType::OUTPUT) { //The current pin is the net driver, overwrite the default driver at index 0 - VTR_ASSERT_MSG(lb_nets[ipos].terminals[0] == get_lb_type_rr_graph_ext_source_index(lb_type), "Default driver must be external source"); + VTR_ASSERT_MSG(lb_nets[ipos].terminals[0] == get_lb_type_rr_graph_ext_source_index(lb_type), + "Default driver must be external source"); VTR_ASSERT(atom_ctx.nlist.pin_type(pin_id) == PinType::DRIVER); @@ -738,7 +765,8 @@ static void add_pin_to_rt_terminals(t_lb_router_data* router_data, const AtomPin int sink_index = lb_type_graph[pin_index].outedges[0][0].node_index; VTR_ASSERT(lb_type_graph[sink_index].type == LB_SINK); - if (lb_nets[ipos].terminals.size() == atom_ctx.nlist.net_pins(net_id).size() && lb_nets[ipos].terminals[1] == get_lb_type_rr_graph_ext_sink_index(lb_type)) { + if (lb_nets[ipos].terminals.size() == atom_ctx.nlist.net_pins(net_id).size() + && lb_nets[ipos].terminals[1] == get_lb_type_rr_graph_ext_sink_index(lb_type)) { /* If all sinks of net are all contained in the logic block, then the net does * not need to route out of the logic block, so can replace the external sink * with this last sink terminal */ @@ -767,7 +795,8 @@ static void add_pin_to_rt_terminals(t_lb_router_data* router_data, const AtomPin //Net driver VTR_ASSERT_SAFE_MSG(lb_type_graph[inode].type == LB_SOURCE, "Driver must be a source RR node"); VTR_ASSERT_SAFE_MSG(atom_pin, "Driver have an associated atom pin"); - VTR_ASSERT_SAFE_MSG(atom_ctx.nlist.pin_type(atom_pin) == PinType::DRIVER, "Source RR must be associated with a driver pin in atom netlist"); + VTR_ASSERT_SAFE_MSG(atom_ctx.nlist.pin_type(atom_pin) == PinType::DRIVER, + "Source RR must be associated with a driver pin in atom netlist"); if (inode == get_lb_type_rr_graph_ext_source_index(lb_type)) { ++num_extern_sources; } @@ -781,12 +810,14 @@ static void add_pin_to_rt_terminals(t_lb_router_data* router_data, const AtomPin ++num_extern_sinks; } else { VTR_ASSERT_SAFE_MSG(atom_pin, "Intra-cluster sink must have an associated atom pin"); - VTR_ASSERT_SAFE_MSG(atom_ctx.nlist.pin_type(atom_pin) == PinType::SINK, "Intra-cluster Sink RR must be associated with a sink pin in atom netlist"); + VTR_ASSERT_SAFE_MSG(atom_ctx.nlist.pin_type(atom_pin) == PinType::SINK, + "Intra-cluster Sink RR must be associated with a sink pin in atom netlist"); } } } VTR_ASSERT_SAFE_MSG(num_extern_sinks >= 0 && num_extern_sinks <= 1, "Net must have at most one external sink"); - VTR_ASSERT_SAFE_MSG(num_extern_sources >= 0 && num_extern_sources <= 1, "Net must have at most one external source"); + VTR_ASSERT_SAFE_MSG(num_extern_sources >= 0 && num_extern_sources <= 1, + "Net must have at most one external source"); #endif } @@ -884,13 +915,16 @@ static void remove_pin_from_rt_terminals(t_lb_router_data* router_data, const At lb_nets[ipos].atom_pins[iterm] = lb_nets[ipos].atom_pins.back(); lb_nets[ipos].atom_pins.pop_back(); - if (lb_nets[ipos].terminals.size() == 1 && lb_nets[ipos].terminals[0] != get_lb_type_rr_graph_ext_source_index(lb_type)) { + if (lb_nets[ipos].terminals.size() == 1 + && lb_nets[ipos].terminals[0] != get_lb_type_rr_graph_ext_source_index(lb_type)) { /* The removed sink must be driven by an atom found in the cluster, add in special sink outside of cluster to represent this */ lb_nets[ipos].terminals.push_back(get_lb_type_rr_graph_ext_sink_index(lb_type)); lb_nets[ipos].atom_pins.push_back(AtomPinId::INVALID()); } - if (lb_nets[ipos].terminals.size() > 1 && lb_nets[ipos].terminals[1] != get_lb_type_rr_graph_ext_sink_index(lb_type) && lb_nets[ipos].terminals[0] != get_lb_type_rr_graph_ext_source_index(lb_type)) { + if (lb_nets[ipos].terminals.size() > 1 + && lb_nets[ipos].terminals[1] != get_lb_type_rr_graph_ext_sink_index(lb_type) + && lb_nets[ipos].terminals[0] != get_lb_type_rr_graph_ext_source_index(lb_type)) { /* The removed sink must be driven by an atom found in the cluster, add in special sink outside of cluster to represent this */ int terminal = lb_nets[ipos].terminals[1]; lb_nets[ipos].terminals.push_back(terminal); @@ -903,7 +937,8 @@ static void remove_pin_from_rt_terminals(t_lb_router_data* router_data, const At } VTR_ASSERT(lb_nets[ipos].atom_pins.size() == lb_nets[ipos].terminals.size()); - if (lb_nets[ipos].terminals.size() == 1 && lb_nets[ipos].terminals[0] == get_lb_type_rr_graph_ext_source_index(lb_type)) { + if (lb_nets[ipos].terminals.size() == 1 + && lb_nets[ipos].terminals[0] == get_lb_type_rr_graph_ext_source_index(lb_type)) { /* This net is not routed, remove from list of nets in lb */ lb_nets[ipos] = lb_nets.back(); lb_nets.pop_back(); @@ -933,7 +968,8 @@ static void fix_duplicate_equivalent_pins(t_lb_router_data* router_data) { } for (auto kv : duplicate_terminals) { - if (kv.second.size() < 2) continue; //Only process duplicates + if (kv.second.size() < 2) + continue; //Only process duplicates //Remap all the duplicate terminals so they target the pin instead of the sink for (size_t idup_term = 0; idup_term < kv.second.size(); ++idup_term) { @@ -946,7 +982,8 @@ static void fix_duplicate_equivalent_pins(t_lb_router_data* router_data) { const t_pb_graph_pin* pb_graph_pin = find_pb_graph_pin(atom_ctx.nlist, atom_ctx.lookup, atom_pin); VTR_ASSERT(pb_graph_pin); - if (pb_graph_pin->port->equivalent == PortEquivalence::NONE) continue; //Only need to remap equivalent ports + if (pb_graph_pin->port->equivalent == PortEquivalence::NONE) + continue; //Only need to remap equivalent ports //Remap this terminal to an explicit pin instead of the common sink int pin_index = pb_graph_pin->pin_count_in_cluster; @@ -955,14 +992,15 @@ static void fix_duplicate_equivalent_pins(t_lb_router_data* router_data) { "Found duplicate nets connected to logically equivalent pins. " "Remapping intra lb net %d (atom net %zu '%s') from common sink " "pb_route %d to fixed pin pb_route %d\n", - ilb_net, size_t(lb_nets[ilb_net].atom_net_id), atom_ctx.nlist.net_name(lb_nets[ilb_net].atom_net_id).c_str(), - kv.first, pin_index); + ilb_net, size_t(lb_nets[ilb_net].atom_net_id), + atom_ctx.nlist.net_name(lb_nets[ilb_net].atom_net_id).c_str(), kv.first, pin_index); VTR_ASSERT(lb_type_graph[pin_index].type == LB_INTERMEDIATE); VTR_ASSERT(lb_type_graph[pin_index].num_fanout[0] == 1); int sink_index = lb_type_graph[pin_index].outedges[0][0].node_index; VTR_ASSERT(lb_type_graph[sink_index].type == LB_SINK); - VTR_ASSERT_MSG(sink_index == lb_nets[ilb_net].terminals[iterm], "Remapped pin must be connected to original sink"); + VTR_ASSERT_MSG(sink_index == lb_nets[ilb_net].terminals[iterm], + "Remapped pin must be connected to original sink"); //Change the target lb_nets[ilb_net].terminals[iterm] = pin_index; @@ -972,7 +1010,11 @@ static void fix_duplicate_equivalent_pins(t_lb_router_data* router_data) { } /* Commit or remove route tree from currently routed solution */ -static void commit_remove_rt(t_lb_trace* rt, t_lb_router_data* router_data, e_commit_remove op, std::unordered_map* mode_map, t_mode_selection_status* mode_status) { +static void commit_remove_rt(t_lb_trace* rt, + t_lb_router_data* router_data, + e_commit_remove op, + std::unordered_map* mode_map, + t_mode_selection_status* mode_status) { t_lb_rr_node_stats* lb_rr_node_stats; t_explored_node_tb* explored_node_tb; std::vector& lb_type_graph = *router_data->lb_type_graph; @@ -992,7 +1034,8 @@ static void commit_remove_rt(t_lb_trace* rt, t_lb_router_data* router_data, e_co if (op == RT_COMMIT) { incr = 1; if (lb_rr_node_stats[inode].occ >= lb_type_graph[inode].capacity) { - lb_rr_node_stats[inode].historical_usage += (lb_rr_node_stats[inode].occ - lb_type_graph[inode].capacity + 1); /* store historical overuse */ + lb_rr_node_stats[inode].historical_usage + += (lb_rr_node_stats[inode].occ - lb_type_graph[inode].capacity + 1); /* store historical overuse */ } } else { incr = -1; @@ -1062,16 +1105,25 @@ static void add_source_to_rt(t_lb_router_data* router_data, int inet) { } /* Expand all nodes found in route tree into priority queue */ -static void expand_rt(t_lb_router_data* router_data, int inet, reservable_pq, compare_expansion_node>& pq, int irt_net) { +static void expand_rt(t_lb_router_data* router_data, + int inet, + reservable_pq, compare_expansion_node>& pq, + int irt_net) { std::vector& lb_nets = *router_data->intra_lb_nets; VTR_ASSERT(pq.empty()); - expand_rt_rec(lb_nets[inet].rt_tree, OPEN, router_data->explored_node_tb, pq, irt_net, router_data->explore_id_index); + expand_rt_rec(lb_nets[inet].rt_tree, OPEN, router_data->explored_node_tb, pq, irt_net, + router_data->explore_id_index); } /* Expand all nodes found in route tree into priority queue recursively */ -static void expand_rt_rec(t_lb_trace* rt, int prev_index, t_explored_node_tb* explored_node_tb, reservable_pq, compare_expansion_node>& pq, int irt_net, int explore_id_index) { +static void expand_rt_rec(t_lb_trace* rt, + int prev_index, + t_explored_node_tb* explored_node_tb, + reservable_pq, compare_expansion_node>& pq, + int irt_net, + int explore_id_index) { t_expansion_node enode; /* Perhaps should use a cost other than zero */ @@ -1149,7 +1201,10 @@ static void expand_edges(t_lb_router_data* router_data, } /* Expand all nodes found in route tree into priority queue */ -static void expand_node(t_lb_router_data* router_data, t_expansion_node exp_node, reservable_pq, compare_expansion_node>& pq, int net_fanout) { +static void expand_node(t_lb_router_data* router_data, + t_expansion_node exp_node, + reservable_pq, compare_expansion_node>& pq, + int net_fanout) { int cur_node; float cur_cost; int mode; @@ -1167,7 +1222,11 @@ static void expand_node(t_lb_router_data* router_data, t_expansion_node exp_node } /* Expand all nodes using all possible modes found in route tree into priority queue */ -static void expand_node_all_modes(t_lb_router_data* router_data, t_expansion_node exp_node, reservable_pq, compare_expansion_node>& pq, int net_fanout) { +static void expand_node_all_modes( + t_lb_router_data* router_data, + t_expansion_node exp_node, + reservable_pq, compare_expansion_node>& pq, + int net_fanout) { std::vector& lb_type_graph = *router_data->lb_type_graph; t_lb_rr_node_stats* lb_rr_node_stats = router_data->lb_rr_node_stats; @@ -1275,7 +1334,8 @@ static void print_route(const char* filename, t_lb_router_data* router_data) { fp = fopen(filename, "w"); for (unsigned int inode = 0; inode < lb_type_graph.size(); inode++) { - fprintf(fp, "node %d occ %d cap %d\n", inode, router_data->lb_rr_node_stats[inode].occ, lb_type_graph[inode].capacity); + fprintf(fp, "node %d occ %d cap %d\n", inode, router_data->lb_rr_node_stats[inode].occ, + lb_type_graph[inode].capacity); } print_route(fp, router_data); @@ -1290,7 +1350,8 @@ static void print_route(FILE* fp, t_lb_router_data* router_data) { for (unsigned int inet = 0; inet < lb_nets.size(); inet++) { AtomNetId net_id = lb_nets[inet].atom_net_id; - fprintf(fp, "net %s num targets %d \n", atom_ctx.nlist.net_name(net_id).c_str(), (int)lb_nets[inet].terminals.size()); + fprintf(fp, "net %s num targets %d \n", atom_ctx.nlist.net_name(net_id).c_str(), + (int)lb_nets[inet].terminals.size()); fprintf(fp, "\tS"); print_trace(fp, lb_nets[inet].rt_tree, router_data); fprintf(fp, "\n\n"); @@ -1371,8 +1432,7 @@ static std::vector find_congested_rr_nodes(const std::vectorlb_type_graph)[inode]; @@ -1477,16 +1537,13 @@ static std::string describe_congested_rr_nodes(const std::vector& congested for (int inode : congested_rr_nodes) { const t_lb_type_rr_node& rr_node = lb_type_graph[inode]; const t_lb_rr_node_stats& rr_node_stats = lb_rr_node_stats[inode]; - description += vtr::string_fmt("RR Node %d (%s) is congested (occ: %d > capacity: %d) with the following nets:\n", - inode, - describe_lb_type_rr_node(inode, router_data).c_str(), - rr_node_stats.occ, - rr_node.capacity); + description += vtr::string_fmt( + "RR Node %d (%s) is congested (occ: %d > capacity: %d) with the following nets:\n", inode, + describe_lb_type_rr_node(inode, router_data).c_str(), rr_node_stats.occ, rr_node.capacity); auto range = congested_rr_node_to_nets.equal_range(inode); for (auto itr = range.first; itr != range.second; ++itr) { AtomNetId net = itr->second; - description += vtr::string_fmt("\tNet: %s\n", - atom_ctx.nlist.net_name(net).c_str()); + description += vtr::string_fmt("\tNet: %s\n", atom_ctx.nlist.net_name(net).c_str()); } } diff --git a/vpr/src/pack/cluster_router.h b/vpr/src/pack/cluster_router.h index 4f88f1c0b6a..c4af9c90c3d 100644 --- a/vpr/src/pack/cluster_router.h +++ b/vpr/src/pack/cluster_router.h @@ -11,7 +11,8 @@ #include "pack_types.h" /* Constructors/Destructors */ -t_lb_router_data* alloc_and_load_router_data(std::vector* lb_type_graph, t_logical_block_type_ptr type); +t_lb_router_data* alloc_and_load_router_data(std::vector* lb_type_graph, + t_logical_block_type_ptr type); void free_router_data(t_lb_router_data* router_data); void free_intra_lb_nets(std::vector* intra_lb_nets); diff --git a/vpr/src/pack/cluster_util.cpp b/vpr/src/pack/cluster_util.cpp index 25b4af68441..cca0e528f21 100644 --- a/vpr/src/pack/cluster_util.cpp +++ b/vpr/src/pack/cluster_util.cpp @@ -84,7 +84,8 @@ void calc_init_packing_timing(const t_packer_opts& packer_opts, /* * Initialize the timing analyzer */ - clustering_delay_calc = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, packer_opts.inter_cluster_net_delay, prepacker); + clustering_delay_calc = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, + packer_opts.inter_cluster_net_delay, prepacker); timing_info = make_setup_timing_info(clustering_delay_calc, packer_opts.timing_update_type); //Calculate the initial timing @@ -92,8 +93,8 @@ void calc_init_packing_timing(const t_packer_opts& packer_opts, if (isEchoFileEnabled(E_ECHO_PRE_PACKING_TIMING_GRAPH)) { auto& timing_ctx = g_vpr_ctx.timing(); - tatum::write_echo(getEchoFileName(E_ECHO_PRE_PACKING_TIMING_GRAPH), - *timing_ctx.graph, *timing_ctx.constraints, *clustering_delay_calc, timing_info->analyzer()); + tatum::write_echo(getEchoFileName(E_ECHO_PRE_PACKING_TIMING_GRAPH), *timing_ctx.graph, *timing_ctx.constraints, + *clustering_delay_calc, timing_info->analyzer()); tatum::NodeId debug_tnode = id_or_pin_name_to_tnode(analysis_opts.echo_dot_timing_graph_node); write_setup_timing_graph_dot(getEchoFileName(E_ECHO_PRE_PACKING_TIMING_GRAPH) + std::string(".dot"), @@ -102,17 +103,14 @@ void calc_init_packing_timing(const t_packer_opts& packer_opts, { auto& timing_ctx = g_vpr_ctx.timing(); - PreClusterTimingGraphResolver resolver(atom_ctx.nlist, - atom_ctx.lookup, *timing_ctx.graph, *clustering_delay_calc); + PreClusterTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, + *clustering_delay_calc); resolver.set_detail_level(analysis_opts.timing_report_detail); - tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, - *timing_ctx.constraints); + tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, *timing_ctx.constraints); - timing_reporter.report_timing_setup( - "pre_pack.report_timing.setup.rpt", - *timing_info->setup_analyzer(), - analysis_opts.timing_report_npaths); + timing_reporter.report_timing_setup("pre_pack.report_timing.setup.rpt", *timing_info->setup_analyzer(), + analysis_opts.timing_report_npaths); } //Calculate true criticalities of each block @@ -125,9 +123,7 @@ void calc_init_packing_timing(const t_packer_opts& packer_opts, } } -void free_clustering_data(const t_packer_opts& packer_opts, - t_clustering_data& clustering_data) { - +void free_clustering_data(const t_packer_opts& packer_opts, t_clustering_data& clustering_data) { if (packer_opts.hill_climbing_flag) delete[] clustering_data.hill_climbing_inputs_avail; @@ -145,12 +141,8 @@ void check_and_output_clustering(ClusterLegalizer& cluster_legalizer, echo_clusters(getEchoFileName(E_ECHO_CLUSTERS), cluster_legalizer); } - output_clustering(&cluster_legalizer, - packer_opts.global_clocks, - is_clock, - arch->architecture_id, - packer_opts.output_file.c_str(), - false, /*skip_clustering*/ + output_clustering(&cluster_legalizer, packer_opts.global_clocks, is_clock, arch->architecture_id, + packer_opts.output_file.c_str(), false, /*skip_clustering*/ true /*from_legalizer*/); } @@ -183,12 +175,7 @@ void print_pack_status(int num_clb, "%6d/%-6d %3d%% " "%26d " "%3d x %-3d ", - num_molecules_processed, - tot_num_molecules, - int_percentage, - num_clb, - device_width, - device_height); + num_molecules_processed, tot_num_molecules, int_percentage, num_clb, device_width, device_height); VTR_LOG("\n"); fflush(stdout); @@ -199,9 +186,7 @@ void print_pack_status(int num_clb, } } -void rebuild_attraction_groups(AttractionInfo& attraction_groups, - const ClusterLegalizer& cluster_legalizer) { - +void rebuild_attraction_groups(AttractionInfo& attraction_groups, const ClusterLegalizer& cluster_legalizer) { for (int igroup = 0; igroup < attraction_groups.num_attraction_groups(); igroup++) { AttractGroupId group_id(igroup); AttractionGroup& group = attraction_groups.get_attraction_group_info(group_id); @@ -230,8 +215,7 @@ bool is_atom_blk_in_pb(const AtomBlockId blk_id, const t_pb* pb) { return false; } -void remove_molecule_from_pb_stats_candidates(t_pack_molecule* molecule, - t_pb* pb) { +void remove_molecule_from_pb_stats_candidates(t_pack_molecule* molecule, t_pb* pb) { int molecule_index; bool found_molecule = false; @@ -291,10 +275,14 @@ void add_molecule_to_pb_stats_candidates(t_pack_molecule* molecule, if (pb->pb_stats->num_feasible_blocks >= max_queue_size - 1) { /* maximum size for array, remove smallest gain element and sort */ - if (get_molecule_gain(molecule, gain, cluster_att_grp, attraction_groups, num_molecule_failures) > get_molecule_gain(pb->pb_stats->feasible_blocks[0], gain, cluster_att_grp, attraction_groups, num_molecule_failures)) { + if (get_molecule_gain(molecule, gain, cluster_att_grp, attraction_groups, num_molecule_failures) + > get_molecule_gain(pb->pb_stats->feasible_blocks[0], gain, cluster_att_grp, attraction_groups, + num_molecule_failures)) { /* single loop insertion sort */ for (j = 0; j < pb->pb_stats->num_feasible_blocks - 1; j++) { - if (get_molecule_gain(molecule, gain, cluster_att_grp, attraction_groups, num_molecule_failures) <= get_molecule_gain(pb->pb_stats->feasible_blocks[j + 1], gain, cluster_att_grp, attraction_groups, num_molecule_failures)) { + if (get_molecule_gain(molecule, gain, cluster_att_grp, attraction_groups, num_molecule_failures) + <= get_molecule_gain(pb->pb_stats->feasible_blocks[j + 1], gain, cluster_att_grp, attraction_groups, + num_molecule_failures)) { pb->pb_stats->feasible_blocks[j] = molecule; break; } else { @@ -308,7 +296,9 @@ void add_molecule_to_pb_stats_candidates(t_pack_molecule* molecule, } else { /* Expand array and single loop insertion sort */ for (j = pb->pb_stats->num_feasible_blocks - 1; j >= 0; j--) { - if (get_molecule_gain(pb->pb_stats->feasible_blocks[j], gain, cluster_att_grp, attraction_groups, num_molecule_failures) > get_molecule_gain(molecule, gain, cluster_att_grp, attraction_groups, num_molecule_failures)) { + if (get_molecule_gain(pb->pb_stats->feasible_blocks[j], gain, cluster_att_grp, attraction_groups, + num_molecule_failures) + > get_molecule_gain(molecule, gain, cluster_att_grp, attraction_groups, num_molecule_failures)) { pb->pb_stats->feasible_blocks[j + 1] = pb->pb_stats->feasible_blocks[j]; } else { pb->pb_stats->feasible_blocks[j + 1] = molecule; @@ -345,11 +335,8 @@ void alloc_and_init_clustering(const t_molecule_stats& max_molecule_stats, // Create a sorted list of molecules, sorted on increasing molecule base gain. std::vector molecules_vector = prepacker.get_molecules_vector(); VTR_ASSERT(molecules_vector.size() == (size_t)num_molecules); - std::stable_sort(molecules_vector.begin(), - molecules_vector.end(), - [](t_pack_molecule* a, t_pack_molecule* b) { - return a->base_gain < b->base_gain; - }); + std::stable_sort(molecules_vector.begin(), molecules_vector.end(), + [](t_pack_molecule* a, t_pack_molecule* b) { return a->base_gain < b->base_gain; }); clustering_data.memory_pool = new t_molecule_link[num_molecules]; t_molecule_link* next_ptr = clustering_data.memory_pool; @@ -389,7 +376,6 @@ t_pack_molecule* get_molecule_by_num_ext_inputs(const int ext_inps, t_molecule_link* unclustered_list_head, LegalizationClusterId legalization_cluster_id, const ClusterLegalizer& cluster_legalizer) { - t_molecule_link* prev_ptr = &unclustered_list_head[ext_inps]; t_molecule_link* ptr = unclustered_list_head[ext_inps].next; while (ptr != nullptr) { @@ -438,11 +424,8 @@ t_pack_molecule* get_free_molecule_with_most_ext_inputs_for_cluster(t_pb* cur_pb } for (int ext_inps = inputs_avail; ext_inps >= 0; ext_inps--) { - molecule = get_molecule_by_num_ext_inputs(ext_inps, - LEAVE_CLUSTERED, - unclustered_list_head, - legalization_cluster_id, - cluster_legalizer); + molecule = get_molecule_by_num_ext_inputs(ext_inps, LEAVE_CLUSTERED, unclustered_list_head, + legalization_cluster_id, cluster_legalizer); if (molecule != nullptr) { break; } @@ -495,9 +478,11 @@ void update_connection_gain_values(const AtomNetId net_id, } if (num_internal_connections > 1) { - cur_pb->pb_stats->connectiongain[blk_id] -= 1 / (float)(num_open_connections + 1.5 * num_stuck_connections + 1 + 0.1); + cur_pb->pb_stats->connectiongain[blk_id] + -= 1 / (float)(num_open_connections + 1.5 * num_stuck_connections + 1 + 0.1); } - cur_pb->pb_stats->connectiongain[blk_id] += 1 / (float)(num_open_connections + 1.5 * num_stuck_connections + 0.1); + cur_pb->pb_stats->connectiongain[blk_id] + += 1 / (float)(num_open_connections + 1.5 * num_stuck_connections + 0.1); } } } @@ -514,39 +499,41 @@ void update_connection_gain_values(const AtomNetId net_id, cur_pb->pb_stats->connectiongain[blk_id] = 0; } if (num_internal_connections > 1) { - cur_pb->pb_stats->connectiongain[blk_id] -= 1 / (float)(num_open_connections + 1.5 * num_stuck_connections + 0.1 + 1); + cur_pb->pb_stats->connectiongain[blk_id] + -= 1 / (float)(num_open_connections + 1.5 * num_stuck_connections + 0.1 + 1); } - cur_pb->pb_stats->connectiongain[blk_id] += 1 / (float)(num_open_connections + 1.5 * num_stuck_connections + 0.1); + cur_pb->pb_stats->connectiongain[blk_id] + += 1 / (float)(num_open_connections + 1.5 * num_stuck_connections + 0.1); } } } -void try_fill_cluster(ClusterLegalizer& cluster_legalizer, - const Prepacker& prepacker, - const t_packer_opts& packer_opts, - t_pack_molecule*& prev_molecule, - t_pack_molecule*& next_molecule, - int& num_same_molecules, - t_cluster_progress_stats& cluster_stats, - int num_clb, - const LegalizationClusterId legalization_cluster_id, - AttractionInfo& attraction_groups, - vtr::vector>& clb_inter_blk_nets, - bool allow_unrelated_clustering, - const int& high_fanout_threshold, - const std::unordered_set& is_clock, - const std::unordered_set& is_global, - const std::shared_ptr& timing_info, - e_block_pack_status& block_pack_status, - t_molecule_link* unclustered_list_head, - const int& unclustered_list_head_size, - std::unordered_map& net_output_feeds_driving_block_input, - std::map>& primitive_candidate_block_types) { +void try_fill_cluster( + ClusterLegalizer& cluster_legalizer, + const Prepacker& prepacker, + const t_packer_opts& packer_opts, + t_pack_molecule*& prev_molecule, + t_pack_molecule*& next_molecule, + int& num_same_molecules, + t_cluster_progress_stats& cluster_stats, + int num_clb, + const LegalizationClusterId legalization_cluster_id, + AttractionInfo& attraction_groups, + vtr::vector>& clb_inter_blk_nets, + bool allow_unrelated_clustering, + const int& high_fanout_threshold, + const std::unordered_set& is_clock, + const std::unordered_set& is_global, + const std::shared_ptr& timing_info, + e_block_pack_status& block_pack_status, + t_molecule_link* unclustered_list_head, + const int& unclustered_list_head_size, + std::unordered_map& net_output_feeds_driving_block_input, + std::map>& primitive_candidate_block_types) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); const DeviceContext& device_ctx = g_vpr_ctx.device(); - block_pack_status = cluster_legalizer.add_mol_to_cluster(next_molecule, - legalization_cluster_id); + block_pack_status = cluster_legalizer.add_mol_to_cluster(next_molecule, legalization_cluster_id); auto blk_id = next_molecule->atom_block_ids[next_molecule->root]; VTR_ASSERT(blk_id); @@ -574,21 +561,12 @@ void try_fill_cluster(ClusterLegalizer& cluster_legalizer, } } - next_molecule = get_molecule_for_cluster(cluster_legalizer.get_cluster_pb(legalization_cluster_id), - attraction_groups, - allow_unrelated_clustering, - packer_opts.prioritize_transitive_connectivity, - packer_opts.transitive_fanout_threshold, - packer_opts.feasible_block_array_size, - &cluster_stats.num_unrelated_clustering_attempts, - prepacker, - cluster_legalizer, - clb_inter_blk_nets, - legalization_cluster_id, - packer_opts.pack_verbosity, - unclustered_list_head, - unclustered_list_head_size, - primitive_candidate_block_types); + next_molecule = get_molecule_for_cluster( + cluster_legalizer.get_cluster_pb(legalization_cluster_id), attraction_groups, allow_unrelated_clustering, + packer_opts.prioritize_transitive_connectivity, packer_opts.transitive_fanout_threshold, + packer_opts.feasible_block_array_size, &cluster_stats.num_unrelated_clustering_attempts, prepacker, + cluster_legalizer, clb_inter_blk_nets, legalization_cluster_id, packer_opts.pack_verbosity, + unclustered_list_head, unclustered_list_head_size, primitive_candidate_block_types); if (prev_molecule == next_molecule) { num_same_molecules++; } @@ -598,8 +576,8 @@ void try_fill_cluster(ClusterLegalizer& cluster_legalizer, /* Continue packing by filling smallest cluster */ if (packer_opts.pack_verbosity > 2) { VTR_LOG("\tPASSED: '%s' (%s)", blk_name.c_str(), blk_model->name); - VTR_LOGV(next_molecule->pack_pattern, " molecule %s molecule_size %zu", - next_molecule->pack_pattern->name, next_molecule->atom_block_ids.size()); + VTR_LOGV(next_molecule->pack_pattern, " molecule %s molecule_size %zu", next_molecule->pack_pattern->name, + next_molecule->atom_block_ids.size()); VTR_LOG("\n"); } @@ -608,44 +586,28 @@ void try_fill_cluster(ClusterLegalizer& cluster_legalizer, //Since molecule passed, update num_molecules_processed cluster_stats.num_molecules_processed++; cluster_stats.mols_since_last_print++; - print_pack_status(num_clb, cluster_stats.num_molecules, - cluster_stats.num_molecules_processed, - cluster_stats.mols_since_last_print, - device_ctx.grid.width(), - device_ctx.grid.height(), - attraction_groups, - cluster_legalizer); - - update_cluster_stats(next_molecule, - cluster_legalizer, + print_pack_status(num_clb, cluster_stats.num_molecules, cluster_stats.num_molecules_processed, + cluster_stats.mols_since_last_print, device_ctx.grid.width(), device_ctx.grid.height(), + attraction_groups, cluster_legalizer); + + update_cluster_stats(next_molecule, cluster_legalizer, is_clock, //Set of all clocks is_global, //Set of all global signals (currently clocks) packer_opts.global_clocks, packer_opts.alpha, packer_opts.beta, packer_opts.timing_driven, - packer_opts.connection_driven, - high_fanout_threshold, - *timing_info, - attraction_groups, + packer_opts.connection_driven, high_fanout_threshold, *timing_info, attraction_groups, net_output_feeds_driving_block_input); cluster_stats.num_unrelated_clustering_attempts = 0; if (packer_opts.timing_driven) { - cluster_stats.blocks_since_last_analysis++; /* historically, timing slacks were recomputed after X number of blocks were packed, but this doesn't significantly alter results so I (jluu) did not port the code */ - } - next_molecule = get_molecule_for_cluster(cluster_legalizer.get_cluster_pb(legalization_cluster_id), - attraction_groups, - allow_unrelated_clustering, - packer_opts.prioritize_transitive_connectivity, - packer_opts.transitive_fanout_threshold, - packer_opts.feasible_block_array_size, - &cluster_stats.num_unrelated_clustering_attempts, - prepacker, - cluster_legalizer, - clb_inter_blk_nets, - legalization_cluster_id, - packer_opts.pack_verbosity, - unclustered_list_head, - unclustered_list_head_size, - primitive_candidate_block_types); + cluster_stats + .blocks_since_last_analysis++; /* historically, timing slacks were recomputed after X number of blocks were packed, but this doesn't significantly alter results so I (jluu) did not port the code */ + } + next_molecule = get_molecule_for_cluster( + cluster_legalizer.get_cluster_pb(legalization_cluster_id), attraction_groups, allow_unrelated_clustering, + packer_opts.prioritize_transitive_connectivity, packer_opts.transitive_fanout_threshold, + packer_opts.feasible_block_array_size, &cluster_stats.num_unrelated_clustering_attempts, prepacker, + cluster_legalizer, clb_inter_blk_nets, legalization_cluster_id, packer_opts.pack_verbosity, + unclustered_list_head, unclustered_list_head_size, primitive_candidate_block_types); if (prev_molecule == next_molecule) { num_same_molecules++; @@ -699,8 +661,7 @@ void update_timing_gain_values(const AtomNetId net_id, if (net_output_feeds_driving_block_input[net_id] != 0) pins = atom_ctx.nlist.net_sinks(net_id); - if (net_relation_to_clustered_block == OUTPUT - && !is_global.count(net_id)) { + if (net_relation_to_clustered_block == OUTPUT && !is_global.count(net_id)) { for (auto pin_id : pins) { auto blk_id = atom_ctx.nlist.pin_block(pin_id); if (!cluster_legalizer.is_atom_clustered(blk_id)) { @@ -715,8 +676,7 @@ void update_timing_gain_values(const AtomNetId net_id, } } - if (net_relation_to_clustered_block == INPUT - && !is_global.count(net_id)) { + if (net_relation_to_clustered_block == INPUT && !is_global.count(net_id)) { /*Calculate the timing gain for the atom block which is driving * *the atom net that is an input to a atom block in the cluster */ auto driver_pin = atom_ctx.nlist.net_driver(net_id); @@ -748,7 +708,6 @@ void mark_and_update_partial_gain(const AtomNetId net_id, const std::unordered_set& is_global, const int high_fanout_net_threshold, std::unordered_map& net_output_feeds_driving_block_input) { - const AtomContext& atom_ctx = g_vpr_ctx.atom(); t_pb* cur_pb = atom_ctx.lookup.atom_pb(clustered_blk_id)->parent_pb; cur_pb = get_top_level_pb(cur_pb); @@ -803,17 +762,13 @@ void mark_and_update_partial_gain(const AtomNetId net_id, } if (connection_driven) { - update_connection_gain_values(net_id, clustered_blk_id, cur_pb, - cluster_legalizer, + update_connection_gain_values(net_id, clustered_blk_id, cur_pb, cluster_legalizer, net_relation_to_clustered_block); } if (timing_driven) { - update_timing_gain_values(net_id, cur_pb, cluster_legalizer, - net_relation_to_clustered_block, - timing_info, - is_global, - net_output_feeds_driving_block_input); + update_timing_gain_values(net_id, cur_pb, cluster_legalizer, net_relation_to_clustered_block, timing_info, + is_global, net_output_feeds_driving_block_input); } } if (cur_pb->pb_stats->num_pins_of_net_in_pb.count(net_id) == 0) { @@ -823,7 +778,12 @@ void mark_and_update_partial_gain(const AtomNetId net_id, } /*****************************************/ -void update_total_gain(float alpha, float beta, bool timing_driven, bool connection_driven, t_pb* pb, AttractionInfo& attraction_groups) { +void update_total_gain(float alpha, + float beta, + bool timing_driven, + bool connection_driven, + t_pb* pb, + AttractionInfo& attraction_groups) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); t_pb* cur_pb = pb; @@ -860,20 +820,17 @@ void update_total_gain(float alpha, float beta, bool timing_driven, bool connect VTR_ASSERT(num_used_pins > 0); if (connection_driven) { /*try to absorb as many connections as possible*/ - cur_pb->pb_stats->gain[blk_id] = ((1 - beta) - * (float)cur_pb->pb_stats->sharinggain[blk_id] + cur_pb->pb_stats->gain[blk_id] = ((1 - beta) * (float)cur_pb->pb_stats->sharinggain[blk_id] + beta * (float)cur_pb->pb_stats->connectiongain[blk_id]) / (num_used_pins); } else { - cur_pb->pb_stats->gain[blk_id] = ((float)cur_pb->pb_stats->sharinggain[blk_id]) - / (num_used_pins); + cur_pb->pb_stats->gain[blk_id] = ((float)cur_pb->pb_stats->sharinggain[blk_id]) / (num_used_pins); } /* Add in timing driven cost into cost function */ if (timing_driven) { - cur_pb->pb_stats->gain[blk_id] = alpha - * cur_pb->pb_stats->timinggain[blk_id] - + (1.0 - alpha) * (float)cur_pb->pb_stats->gain[blk_id]; + cur_pb->pb_stats->gain[blk_id] + = alpha * cur_pb->pb_stats->timinggain[blk_id] + (1.0 - alpha) * (float)cur_pb->pb_stats->gain[blk_id]; } } } @@ -892,7 +849,6 @@ void update_cluster_stats(const t_pack_molecule* molecule, const SetupTimingInfo& timing_info, AttractionInfo& attraction_groups, std::unordered_map& net_output_feeds_driving_block_input) { - int molecule_size; int iblock; t_pb *cur_pb, *cb; @@ -934,33 +890,21 @@ void update_cluster_stats(const t_pack_molecule* molecule, for (auto pin_id : atom_ctx.nlist.block_output_pins(blk_id)) { auto net_id = atom_ctx.nlist.pin_net(pin_id); if (!is_clock.count(net_id) || !global_clocks) { - mark_and_update_partial_gain(net_id, GAIN, blk_id, cluster_legalizer, - timing_driven, - connection_driven, OUTPUT, - timing_info, - is_global, - high_fanout_net_threshold, + mark_and_update_partial_gain(net_id, GAIN, blk_id, cluster_legalizer, timing_driven, connection_driven, + OUTPUT, timing_info, is_global, high_fanout_net_threshold, net_output_feeds_driving_block_input); } else { - mark_and_update_partial_gain(net_id, NO_GAIN, blk_id, cluster_legalizer, - timing_driven, - connection_driven, OUTPUT, - timing_info, - is_global, - high_fanout_net_threshold, - net_output_feeds_driving_block_input); + mark_and_update_partial_gain(net_id, NO_GAIN, blk_id, cluster_legalizer, timing_driven, + connection_driven, OUTPUT, timing_info, is_global, + high_fanout_net_threshold, net_output_feeds_driving_block_input); } } /* Next Inputs */ for (auto pin_id : atom_ctx.nlist.block_input_pins(blk_id)) { auto net_id = atom_ctx.nlist.pin_net(pin_id); - mark_and_update_partial_gain(net_id, GAIN, blk_id, cluster_legalizer, - timing_driven, connection_driven, - INPUT, - timing_info, - is_global, - high_fanout_net_threshold, + mark_and_update_partial_gain(net_id, GAIN, blk_id, cluster_legalizer, timing_driven, connection_driven, + INPUT, timing_info, is_global, high_fanout_net_threshold, net_output_feeds_driving_block_input); } @@ -968,24 +912,17 @@ void update_cluster_stats(const t_pack_molecule* molecule, for (auto pin_id : atom_ctx.nlist.block_clock_pins(blk_id)) { auto net_id = atom_ctx.nlist.pin_net(pin_id); if (global_clocks) { - mark_and_update_partial_gain(net_id, NO_GAIN, blk_id, cluster_legalizer, - timing_driven, connection_driven, INPUT, - timing_info, - is_global, - high_fanout_net_threshold, - net_output_feeds_driving_block_input); + mark_and_update_partial_gain(net_id, NO_GAIN, blk_id, cluster_legalizer, timing_driven, + connection_driven, INPUT, timing_info, is_global, + high_fanout_net_threshold, net_output_feeds_driving_block_input); } else { - mark_and_update_partial_gain(net_id, GAIN, blk_id, cluster_legalizer, - timing_driven, connection_driven, INPUT, - timing_info, - is_global, - high_fanout_net_threshold, + mark_and_update_partial_gain(net_id, GAIN, blk_id, cluster_legalizer, timing_driven, connection_driven, + INPUT, timing_info, is_global, high_fanout_net_threshold, net_output_feeds_driving_block_input); } } - update_total_gain(alpha, beta, timing_driven, connection_driven, - atom_pb->parent_pb, attraction_groups); + update_total_gain(alpha, beta, timing_driven, connection_driven, atom_pb->parent_pb, attraction_groups); } // if this molecule came from the transitive fanout candidates remove it @@ -995,17 +932,17 @@ void update_cluster_stats(const t_pack_molecule* molecule, } } -void start_new_cluster(ClusterLegalizer& cluster_legalizer, - LegalizationClusterId& legalization_cluster_id, - t_pack_molecule* molecule, - std::map& num_used_type_instances, - const float target_device_utilization, - const t_arch* arch, - const std::string& device_layout_name, - const std::map>& primitive_candidate_block_types, - int verbosity, - bool balance_block_type_utilization) { - +void start_new_cluster( + ClusterLegalizer& cluster_legalizer, + LegalizationClusterId& legalization_cluster_id, + t_pack_molecule* molecule, + std::map& num_used_type_instances, + const float target_device_utilization, + const t_arch* arch, + const std::string& device_layout_name, + const std::map>& primitive_candidate_block_types, + int verbosity, + bool balance_block_type_utilization) { const AtomContext& atom_ctx = g_vpr_ctx.atom(); DeviceContext& mutable_device_ctx = g_vpr_ctx.mutable_device(); const DeviceContext& device_ctx = g_vpr_ctx.mutable_device(); @@ -1043,8 +980,8 @@ void start_new_cluster(ClusterLegalizer& cluster_legalizer, if (verbosity > 2) { VTR_LOG("\tSeed: '%s' (%s)", root_atom_name.c_str(), root_model->name); - VTR_LOGV(molecule->pack_pattern, " molecule_type %s molecule_size %zu", - molecule->pack_pattern->name, molecule->atom_block_ids.size()); + VTR_LOGV(molecule->pack_pattern, " molecule_type %s molecule_size %zu", molecule->pack_pattern->name, + molecule->atom_block_ids.size()); VTR_LOG("\n"); } @@ -1077,8 +1014,7 @@ void start_new_cluster(ClusterLegalizer& cluster_legalizer, VPR_FATAL_ERROR(VPR_ERROR_PACK, "Can not find any logic block that can implement molecule.\n" "\tPattern %s %s\n", - molecule->pack_pattern->name, - root_atom_name.c_str()); + molecule->pack_pattern->name, root_atom_name.c_str()); } else { VPR_FATAL_ERROR(VPR_ERROR_PACK, "Can not find any logic block that can implement molecule.\n" @@ -1100,95 +1036,73 @@ void start_new_cluster(ClusterLegalizer& cluster_legalizer, } if (num_used_type_instances[block_type] > num_instances) { - mutable_device_ctx.grid = create_device_grid(device_layout_name, arch->grid_layouts, num_used_type_instances, target_device_utilization); + mutable_device_ctx.grid = create_device_grid(device_layout_name, arch->grid_layouts, num_used_type_instances, + target_device_utilization); } } -t_pack_molecule* get_highest_gain_molecule(t_pb* cur_pb, - AttractionInfo& attraction_groups, - const enum e_gain_type gain_mode, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer, - vtr::vector>& clb_inter_blk_nets, - const LegalizationClusterId legalization_cluster_id, - bool prioritize_transitive_connectivity, - int transitive_fanout_threshold, - const int feasible_block_array_size, - std::map>& primitive_candidate_block_types) { +t_pack_molecule* get_highest_gain_molecule( + t_pb* cur_pb, + AttractionInfo& attraction_groups, + const enum e_gain_type gain_mode, + const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer, + vtr::vector>& clb_inter_blk_nets, + const LegalizationClusterId legalization_cluster_id, + bool prioritize_transitive_connectivity, + int transitive_fanout_threshold, + const int feasible_block_array_size, + std::map>& primitive_candidate_block_types) { /* * This routine populates a list of feasible blocks outside the cluster, then returns the best candidate for the cluster. * If there are no feasible blocks it returns a nullptr. */ if (gain_mode == HILL_CLIMBING) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Hill climbing not supported yet, error out.\n"); + VPR_FATAL_ERROR(VPR_ERROR_PACK, "Hill climbing not supported yet, error out.\n"); } // 1. Find unpacked molecules based on criticality and strong connectedness (connected by low fanout nets) with current cluster if (cur_pb->pb_stats->num_feasible_blocks == NOT_VALID) { - add_cluster_molecule_candidates_by_connectivity_and_timing(cur_pb, - legalization_cluster_id, - prepacker, - cluster_legalizer, - feasible_block_array_size, + add_cluster_molecule_candidates_by_connectivity_and_timing(cur_pb, legalization_cluster_id, prepacker, + cluster_legalizer, feasible_block_array_size, attraction_groups); } if (prioritize_transitive_connectivity) { // 2. Find unpacked molecules based on transitive connections (eg. 2 hops away) with current cluster if (cur_pb->pb_stats->num_feasible_blocks == 0 && cur_pb->pb_stats->explore_transitive_fanout) { - add_cluster_molecule_candidates_by_transitive_connectivity(cur_pb, - prepacker, - cluster_legalizer, - clb_inter_blk_nets, - legalization_cluster_id, - transitive_fanout_threshold, - feasible_block_array_size, - attraction_groups); + add_cluster_molecule_candidates_by_transitive_connectivity( + cur_pb, prepacker, cluster_legalizer, clb_inter_blk_nets, legalization_cluster_id, + transitive_fanout_threshold, feasible_block_array_size, attraction_groups); } // 3. Find unpacked molecules based on weak connectedness (connected by high fanout nets) with current cluster if (cur_pb->pb_stats->num_feasible_blocks == 0 && cur_pb->pb_stats->tie_break_high_fanout_net) { - add_cluster_molecule_candidates_by_highfanout_connectivity(cur_pb, - legalization_cluster_id, - prepacker, - cluster_legalizer, - feasible_block_array_size, + add_cluster_molecule_candidates_by_highfanout_connectivity(cur_pb, legalization_cluster_id, prepacker, + cluster_legalizer, feasible_block_array_size, attraction_groups); } } else { //Reverse order // 3. Find unpacked molecules based on weak connectedness (connected by high fanout nets) with current cluster if (cur_pb->pb_stats->num_feasible_blocks == 0 && cur_pb->pb_stats->tie_break_high_fanout_net) { - add_cluster_molecule_candidates_by_highfanout_connectivity(cur_pb, - legalization_cluster_id, - prepacker, - cluster_legalizer, - feasible_block_array_size, + add_cluster_molecule_candidates_by_highfanout_connectivity(cur_pb, legalization_cluster_id, prepacker, + cluster_legalizer, feasible_block_array_size, attraction_groups); } // 2. Find unpacked molecules based on transitive connections (eg. 2 hops away) with current cluster if (cur_pb->pb_stats->num_feasible_blocks == 0 && cur_pb->pb_stats->explore_transitive_fanout) { - add_cluster_molecule_candidates_by_transitive_connectivity(cur_pb, - prepacker, - cluster_legalizer, - clb_inter_blk_nets, - legalization_cluster_id, - transitive_fanout_threshold, - feasible_block_array_size, - attraction_groups); + add_cluster_molecule_candidates_by_transitive_connectivity( + cur_pb, prepacker, cluster_legalizer, clb_inter_blk_nets, legalization_cluster_id, + transitive_fanout_threshold, feasible_block_array_size, attraction_groups); } } // 4. Find unpacked molecules based on attraction group of the current cluster (if the cluster has an attraction group) if (cur_pb->pb_stats->num_feasible_blocks == 0) { - add_cluster_molecule_candidates_by_attraction_group(cur_pb, - prepacker, - cluster_legalizer, - attraction_groups, - feasible_block_array_size, - legalization_cluster_id, + add_cluster_molecule_candidates_by_attraction_group(cur_pb, prepacker, cluster_legalizer, attraction_groups, + feasible_block_array_size, legalization_cluster_id, primitive_candidate_block_types); } /* Grab highest gain molecule */ @@ -1213,15 +1127,16 @@ void add_cluster_molecule_candidates_by_connectivity_and_timing(t_pb* cur_pb, VTR_ASSERT(cur_pb->pb_stats->num_feasible_blocks == NOT_VALID); cur_pb->pb_stats->num_feasible_blocks = 0; - cur_pb->pb_stats->explore_transitive_fanout = true; /* If no legal molecules found, enable exploration of molecules two hops away */ + cur_pb->pb_stats->explore_transitive_fanout + = true; /* If no legal molecules found, enable exploration of molecules two hops away */ for (AtomBlockId blk_id : cur_pb->pb_stats->marked_blocks) { if (!cluster_legalizer.is_atom_clustered(blk_id)) { t_pack_molecule* molecule = prepacker.get_atom_molecule(blk_id); if (molecule->valid) { if (cluster_legalizer.is_molecule_compatible(molecule, legalization_cluster_id)) { - add_molecule_to_pb_stats_candidates(molecule, - cur_pb->pb_stats->gain, cur_pb, feasible_block_array_size, attraction_groups); + add_molecule_to_pb_stats_candidates(molecule, cur_pb->pb_stats->gain, cur_pb, + feasible_block_array_size, attraction_groups); } } } @@ -1253,23 +1168,26 @@ void add_cluster_molecule_candidates_by_highfanout_connectivity(t_pb* cur_pb, t_pack_molecule* molecule = prepacker.get_atom_molecule(blk_id); if (molecule->valid) { if (cluster_legalizer.is_molecule_compatible(molecule, legalization_cluster_id)) { - add_molecule_to_pb_stats_candidates(molecule, - cur_pb->pb_stats->gain, cur_pb, std::min(feasible_block_array_size, AAPACK_MAX_HIGH_FANOUT_EXPLORE), attraction_groups); + add_molecule_to_pb_stats_candidates( + molecule, cur_pb->pb_stats->gain, cur_pb, + std::min(feasible_block_array_size, AAPACK_MAX_HIGH_FANOUT_EXPLORE), attraction_groups); count++; } } } } - cur_pb->pb_stats->tie_break_high_fanout_net = AtomNetId::INVALID(); /* Mark off that this high fanout net has been considered */ + cur_pb->pb_stats->tie_break_high_fanout_net + = AtomNetId::INVALID(); /* Mark off that this high fanout net has been considered */ } -void add_cluster_molecule_candidates_by_attraction_group(t_pb* cur_pb, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer, - AttractionInfo& attraction_groups, - const int feasible_block_array_size, - LegalizationClusterId legalization_cluster_id, - std::map>& primitive_candidate_block_types) { +void add_cluster_molecule_candidates_by_attraction_group( + t_pb* cur_pb, + const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer, + AttractionInfo& attraction_groups, + const int feasible_block_array_size, + LegalizationClusterId legalization_cluster_id, + std::map>& primitive_candidate_block_types) { const AtomNetlist& atom_nlist = g_vpr_ctx.atom().nlist; auto cluster_type = cluster_legalizer.get_cluster_type(legalization_cluster_id); @@ -1330,8 +1248,8 @@ void add_cluster_molecule_candidates_by_attraction_group(t_pb* cur_pb, t_pack_molecule* molecule = prepacker.get_atom_molecule(atom_id); if (molecule->valid) { if (cluster_legalizer.is_molecule_compatible(molecule, legalization_cluster_id)) { - add_molecule_to_pb_stats_candidates(molecule, - cur_pb->pb_stats->gain, cur_pb, feasible_block_array_size, attraction_groups); + add_molecule_to_pb_stats_candidates(molecule, cur_pb->pb_stats->gain, cur_pb, + feasible_block_array_size, attraction_groups); } } } @@ -1361,60 +1279,59 @@ void add_cluster_molecule_candidates_by_attraction_group(t_pb* cur_pb, t_pack_molecule* molecule = prepacker.get_atom_molecule(blk_id); if (molecule->valid) { if (cluster_legalizer.is_molecule_compatible(molecule, legalization_cluster_id)) { - add_molecule_to_pb_stats_candidates(molecule, - cur_pb->pb_stats->gain, cur_pb, feasible_block_array_size, attraction_groups); + add_molecule_to_pb_stats_candidates(molecule, cur_pb->pb_stats->gain, cur_pb, + feasible_block_array_size, attraction_groups); } } } } } -void add_cluster_molecule_candidates_by_transitive_connectivity(t_pb* cur_pb, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer, - vtr::vector>& clb_inter_blk_nets, - const LegalizationClusterId legalization_cluster_id, - int transitive_fanout_threshold, - const int feasible_block_array_size, - AttractionInfo& attraction_groups) { +void add_cluster_molecule_candidates_by_transitive_connectivity( + t_pb* cur_pb, + const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer, + vtr::vector>& clb_inter_blk_nets, + const LegalizationClusterId legalization_cluster_id, + int transitive_fanout_threshold, + const int feasible_block_array_size, + AttractionInfo& attraction_groups) { //TODO: For now, only done by fan-out; should also consider fan-in cur_pb->pb_stats->explore_transitive_fanout = false; /* First time finding transitive fanout candidates therefore alloc and load them */ - load_transitive_fanout_candidates(legalization_cluster_id, - cur_pb->pb_stats, - prepacker, - cluster_legalizer, - clb_inter_blk_nets, - transitive_fanout_threshold); + load_transitive_fanout_candidates(legalization_cluster_id, cur_pb->pb_stats, prepacker, cluster_legalizer, + clb_inter_blk_nets, transitive_fanout_threshold); /* Only consider candidates that pass a very simple legality check */ for (const auto& transitive_candidate : cur_pb->pb_stats->transitive_fanout_candidates) { t_pack_molecule* molecule = transitive_candidate.second; if (molecule->valid) { if (cluster_legalizer.is_molecule_compatible(molecule, legalization_cluster_id)) { - add_molecule_to_pb_stats_candidates(molecule, - cur_pb->pb_stats->gain, cur_pb, std::min(feasible_block_array_size, AAPACK_MAX_TRANSITIVE_EXPLORE), attraction_groups); + add_molecule_to_pb_stats_candidates(molecule, cur_pb->pb_stats->gain, cur_pb, + std::min(feasible_block_array_size, AAPACK_MAX_TRANSITIVE_EXPLORE), + attraction_groups); } } } } /*****************************************/ -t_pack_molecule* get_molecule_for_cluster(t_pb* cur_pb, - AttractionInfo& attraction_groups, - const bool allow_unrelated_clustering, - const bool prioritize_transitive_connectivity, - const int transitive_fanout_threshold, - const int feasible_block_array_size, - int* num_unrelated_clustering_attempts, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer, - vtr::vector>& clb_inter_blk_nets, - LegalizationClusterId legalization_cluster_id, - int verbosity, - t_molecule_link* unclustered_list_head, - const int& unclustered_list_head_size, - std::map>& primitive_candidate_block_types) { +t_pack_molecule* get_molecule_for_cluster( + t_pb* cur_pb, + AttractionInfo& attraction_groups, + const bool allow_unrelated_clustering, + const bool prioritize_transitive_connectivity, + const int transitive_fanout_threshold, + const int feasible_block_array_size, + int* num_unrelated_clustering_attempts, + const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer, + vtr::vector>& clb_inter_blk_nets, + LegalizationClusterId legalization_cluster_id, + int verbosity, + t_molecule_link* unclustered_list_head, + const int& unclustered_list_head_size, + std::map>& primitive_candidate_block_types) { /* Finds the block with the greatest gain that satisfies the * input, clock and capacity constraints of a cluster that are * passed in. If no suitable block is found it returns nullptr. @@ -1424,11 +1341,10 @@ t_pack_molecule* get_molecule_for_cluster(t_pb* cur_pb, /* If cannot pack into primitive, try packing into cluster */ - auto best_molecule = get_highest_gain_molecule(cur_pb, attraction_groups, - NOT_HILL_CLIMBING, - prepacker, cluster_legalizer, clb_inter_blk_nets, - legalization_cluster_id, prioritize_transitive_connectivity, - transitive_fanout_threshold, feasible_block_array_size, primitive_candidate_block_types); + auto best_molecule = get_highest_gain_molecule(cur_pb, attraction_groups, NOT_HILL_CLIMBING, prepacker, + cluster_legalizer, clb_inter_blk_nets, legalization_cluster_id, + prioritize_transitive_connectivity, transitive_fanout_threshold, + feasible_block_array_size, primitive_candidate_block_types); /* If no blocks have any gain to the current cluster, the code above * * will not find anything. However, another atom block with no inputs in * @@ -1437,11 +1353,9 @@ t_pack_molecule* get_molecule_for_cluster(t_pb* cur_pb, if (allow_unrelated_clustering) { if (best_molecule == nullptr) { if (*num_unrelated_clustering_attempts == 0) { - best_molecule = get_free_molecule_with_most_ext_inputs_for_cluster(cur_pb, - unclustered_list_head, - unclustered_list_head_size, - legalization_cluster_id, - cluster_legalizer); + best_molecule = get_free_molecule_with_most_ext_inputs_for_cluster( + cur_pb, unclustered_list_head, unclustered_list_head_size, legalization_cluster_id, + cluster_legalizer); (*num_unrelated_clustering_attempts)++; VTR_LOGV(best_molecule && verbosity > 2, "\tFound unrelated molecule to cluster\n"); } @@ -1460,7 +1374,8 @@ t_molecule_stats calc_molecule_stats(const t_pack_molecule* molecule, const Atom //Calculate the number of available pins on primitives within the molecule for (auto blk : molecule->atom_block_ids) { - if (!blk) continue; + if (!blk) + continue; ++molecule_stats.num_blocks; //Record number of valid blocks in molecule @@ -1470,7 +1385,8 @@ t_molecule_stats calc_molecule_stats(const t_pack_molecule* molecule, const Atom molecule_stats.num_input_pins += input_port->size; } - for (const t_model_ports* output_port = model->outputs; output_port != nullptr; output_port = output_port->next) { + for (const t_model_ports* output_port = model->outputs; output_port != nullptr; + output_port = output_port->next) { molecule_stats.num_output_pins += output_port->size; } } @@ -1479,7 +1395,8 @@ t_molecule_stats calc_molecule_stats(const t_pack_molecule* molecule, const Atom //Calculate the number of externally used pins std::set molecule_atoms(molecule->atom_block_ids.begin(), molecule->atom_block_ids.end()); for (auto blk : molecule->atom_block_ids) { - if (!blk) continue; + if (!blk) + continue; for (auto pin : atom_nlist.block_pins(blk)) { auto net = atom_nlist.pin_net(pin); @@ -1561,7 +1478,8 @@ std::vector initialize_seed_atoms(const e_cluster_seed seed_type, VTR_ASSERT(max_molecule_stats.num_used_ext_inputs > 0); float blend_gain = (seed_blend_fac * atom_criticality[blk] - + (1 - seed_blend_fac) * (molecule_stats.num_used_ext_inputs / max_molecule_stats.num_used_ext_inputs)); + + (1 - seed_blend_fac) + * (molecule_stats.num_used_ext_inputs / max_molecule_stats.num_used_ext_inputs)); blend_gain *= (1 + 0.2 * (molecule_stats.num_blocks - 1)); atom_gains[blk] = blend_gain; } @@ -1592,11 +1510,16 @@ std::vector initialize_seed_atoms(const e_cluster_seed seed_type, const t_molecule_stats molecule_stats = calc_molecule_stats(mol, atom_nlist); float pin_ratio = vtr::safe_ratio(molecule_stats.num_pins, max_molecule_stats.num_pins); - float input_pin_ratio = vtr::safe_ratio(molecule_stats.num_input_pins, max_molecule_stats.num_input_pins); - float output_pin_ratio = vtr::safe_ratio(molecule_stats.num_output_pins, max_molecule_stats.num_output_pins); - float used_ext_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_pins, max_molecule_stats.num_used_ext_pins); - float used_ext_input_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_inputs, max_molecule_stats.num_used_ext_inputs); - float used_ext_output_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_outputs, max_molecule_stats.num_used_ext_outputs); + float input_pin_ratio + = vtr::safe_ratio(molecule_stats.num_input_pins, max_molecule_stats.num_input_pins); + float output_pin_ratio + = vtr::safe_ratio(molecule_stats.num_output_pins, max_molecule_stats.num_output_pins); + float used_ext_pin_ratio + = vtr::safe_ratio(molecule_stats.num_used_ext_pins, max_molecule_stats.num_used_ext_pins); + float used_ext_input_pin_ratio + = vtr::safe_ratio(molecule_stats.num_used_ext_inputs, max_molecule_stats.num_used_ext_inputs); + float used_ext_output_pin_ratio + = vtr::safe_ratio(molecule_stats.num_used_ext_outputs, max_molecule_stats.num_used_ext_outputs); float num_blocks_ratio = vtr::safe_ratio(molecule_stats.num_blocks, max_molecule_stats.num_blocks); float criticality = atom_criticality[blk]; @@ -1609,16 +1532,13 @@ std::vector initialize_seed_atoms(const e_cluster_seed seed_type, constexpr float BLOCKS_WEIGHT = 0.2; constexpr float CRITICALITY_WEIGHT = 0.1; - float gain = PIN_WEIGHT * pin_ratio - + INPUT_PIN_WEIGHT * input_pin_ratio + float gain = PIN_WEIGHT * pin_ratio + INPUT_PIN_WEIGHT * input_pin_ratio + OUTPUT_PIN_WEIGHT * output_pin_ratio - + USED_PIN_WEIGHT * used_ext_pin_ratio - + USED_INPUT_PIN_WEIGHT * used_ext_input_pin_ratio + + USED_PIN_WEIGHT * used_ext_pin_ratio + USED_INPUT_PIN_WEIGHT * used_ext_input_pin_ratio + USED_OUTPUT_PIN_WEIGHT * used_ext_output_pin_ratio - + BLOCKS_WEIGHT * num_blocks_ratio - + CRITICALITY_WEIGHT * criticality; + + BLOCKS_WEIGHT * num_blocks_ratio + CRITICALITY_WEIGHT * criticality; atom_gains[blk] = gain; } @@ -1635,13 +1555,13 @@ std::vector initialize_seed_atoms(const e_cluster_seed seed_type, // std::sort which does not specify how equal values are handled). Using a stable // sort ensures that regardless of the underlying sorting algorithm the same seed // order is produced regardless of compiler. - auto by_descending_gain = [&](const AtomBlockId lhs, const AtomBlockId rhs) { - return atom_gains[lhs] > atom_gains[rhs]; - }; + auto by_descending_gain + = [&](const AtomBlockId lhs, const AtomBlockId rhs) { return atom_gains[lhs] > atom_gains[rhs]; }; std::stable_sort(seed_atoms.begin(), seed_atoms.end(), by_descending_gain); if (getEchoEnabled() && isEchoFileEnabled(E_ECHO_CLUSTERING_BLOCK_CRITICALITIES)) { - print_seed_gains(getEchoFileName(E_ECHO_CLUSTERING_BLOCK_CRITICALITIES), seed_atoms, atom_gains, atom_criticality); + print_seed_gains(getEchoFileName(E_ECHO_CLUSTERING_BLOCK_CRITICALITIES), seed_atoms, atom_gains, + atom_criticality); } return seed_atoms; @@ -1673,7 +1593,11 @@ t_pack_molecule* get_highest_gain_seed_molecule(int& seed_index, return nullptr; } -float get_molecule_gain(t_pack_molecule* molecule, std::map& blk_gain, AttractGroupId cluster_attraction_group_id, AttractionInfo& attraction_groups, int num_molecule_failures) { +float get_molecule_gain(t_pack_molecule* molecule, + std::map& blk_gain, + AttractGroupId cluster_attraction_group_id, + AttractionInfo& attraction_groups, + int num_molecule_failures) { float gain; int i; int num_introduced_inputs_of_indirectly_related_block; @@ -1711,16 +1635,19 @@ float get_molecule_gain(t_pack_molecule* molecule, std::map& } } AttractGroupId atom_grp_id = attraction_groups.get_atom_attraction_group(blk_id); - if (atom_grp_id == cluster_attraction_group_id && cluster_attraction_group_id != AttractGroupId::INVALID()) { + if (atom_grp_id == cluster_attraction_group_id + && cluster_attraction_group_id != AttractGroupId::INVALID()) { float att_grp_gain = attraction_groups.get_attraction_group_gain(atom_grp_id); gain += att_grp_gain; - } else if (cluster_attraction_group_id != AttractGroupId::INVALID() && atom_grp_id != cluster_attraction_group_id) { + } else if (cluster_attraction_group_id != AttractGroupId::INVALID() + && atom_grp_id != cluster_attraction_group_id) { gain -= attraction_group_penalty; } } } - gain += molecule->base_gain * 0.0001; /* Use base gain as tie breaker TODO: need to sweep this value and perhaps normalize */ + gain += molecule->base_gain + * 0.0001; /* Use base gain as tie breaker TODO: need to sweep this value and perhaps normalize */ gain -= num_introduced_inputs_of_indirectly_related_block * (0.001); if (num_molecule_failures > 0 && attraction_groups.num_attraction_groups() > 0) { @@ -1765,7 +1692,8 @@ void load_transitive_fanout_candidates(LegalizationClusterId legalization_cluste } t_pack_molecule* molecule = prepacker.get_atom_molecule(blk_id); if (molecule->valid) { - transitive_fanout_candidates.insert({molecule->atom_block_ids[molecule->root], molecule}); + transitive_fanout_candidates.insert( + {molecule->atom_block_ids[molecule->root], molecule}); } } } @@ -1804,7 +1732,10 @@ std::map> identify_primiti return model_candidates; } -void print_seed_gains(const char* fname, const std::vector& seed_atoms, const vtr::vector& atom_gain, const vtr::vector& atom_criticality) { +void print_seed_gains(const char* fname, + const std::vector& seed_atoms, + const vtr::vector& atom_gain, + const vtr::vector& atom_criticality) { FILE* fp = vtr::fopen(fname, "w"); const AtomContext& atom_ctx = g_vpr_ctx.atom(); @@ -1819,7 +1750,8 @@ void print_seed_gains(const char* fname, const std::vector& seed_at max_type_len = std::max(max_type_len, (int)strlen(model->name)); } - fprintf(fp, "%-*s %-*s %8s %8s\n", max_name_len, "atom_block_name", max_type_len, "atom_block_type", "gain", "criticality"); + fprintf(fp, "%-*s %-*s %8s %8s\n", max_name_len, "atom_block_name", max_type_len, "atom_block_type", "gain", + "criticality"); fprintf(fp, "\n"); for (auto blk_id : seed_atoms) { std::string name = atom_ctx.nlist.block_name(blk_id); @@ -1860,7 +1792,10 @@ size_t update_pb_type_count(const t_pb* pb, std::map& pb_type_c return max_depth; } -void print_pb_type_count_recurr(t_pb_type* pb_type, size_t max_name_chars, size_t curr_depth, std::map& pb_type_count) { +void print_pb_type_count_recurr(t_pb_type* pb_type, + size_t max_name_chars, + size_t curr_depth, + std::map& pb_type_count) { std::string display_name(curr_depth, ' '); //Indent by depth display_name += pb_type->name; @@ -1879,7 +1814,8 @@ void print_pb_type_count_recurr(t_pb_type* pb_type, size_t max_name_chars, size_ } } -t_logical_block_type_ptr identify_logic_block_type(std::map>& primitive_candidate_block_types) { +t_logical_block_type_ptr identify_logic_block_type( + std::map>& primitive_candidate_block_types) { std::string lut_name = ".names"; for (auto& model : primitive_candidate_block_types) { @@ -1915,7 +1851,10 @@ t_pb_type* identify_le_block_type(t_logical_block_type_ptr logic_block_type) { return nullptr; } -void update_le_count(const t_pb* pb, const t_logical_block_type_ptr logic_block_type, const t_pb_type* le_pb_type, std::vector& le_count) { +void update_le_count(const t_pb* pb, + const t_logical_block_type_ptr logic_block_type, + const t_pb_type* le_pb_type, + std::vector& le_count) { // if this cluster doesn't contain LEs or there // are no les in this architecture, ignore it if (!logic_block_type || pb->pb_graph_node != logic_block_type->pb_graph_head || !le_pb_type) diff --git a/vpr/src/pack/cluster_util.h b/vpr/src/pack/cluster_util.h index c55dcab2922..d0eb2059272 100644 --- a/vpr/src/pack/cluster_util.h +++ b/vpr/src/pack/cluster_util.h @@ -20,30 +20,17 @@ struct AtomContext; * @brief This file includes useful structs and functions for building and modifying clustering */ -constexpr int AAPACK_MAX_HIGH_FANOUT_EXPLORE = 10; /* For high-fanout nets that are ignored, consider a maximum of this many sinks, must be less than packer_opts.feasible_block_array_size */ -constexpr int AAPACK_MAX_TRANSITIVE_EXPLORE = 40; /* When investigating transitive fanout connections in packing, consider a maximum of this many molecules, must be less than packer_opts.feasible_block_array_size */ - -enum e_gain_update { - GAIN, - NO_GAIN -}; -enum e_feasibility { - FEASIBLE, - INFEASIBLE -}; -enum e_gain_type { - HILL_CLIMBING, - NOT_HILL_CLIMBING -}; -enum e_removal_policy { - REMOVE_CLUSTERED, - LEAVE_CLUSTERED -}; +constexpr int AAPACK_MAX_HIGH_FANOUT_EXPLORE + = 10; /* For high-fanout nets that are ignored, consider a maximum of this many sinks, must be less than packer_opts.feasible_block_array_size */ +constexpr int AAPACK_MAX_TRANSITIVE_EXPLORE + = 40; /* When investigating transitive fanout connections in packing, consider a maximum of this many molecules, must be less than packer_opts.feasible_block_array_size */ + +enum e_gain_update { GAIN, NO_GAIN }; +enum e_feasibility { FEASIBLE, INFEASIBLE }; +enum e_gain_type { HILL_CLIMBING, NOT_HILL_CLIMBING }; +enum e_removal_policy { REMOVE_CLUSTERED, LEAVE_CLUSTERED }; /* TODO: REMOVE_CLUSTERED no longer used, remove */ -enum e_net_relation_to_clustered_block { - INPUT, - OUTPUT -}; +enum e_net_relation_to_clustered_block { INPUT, OUTPUT }; /* Linked list structure. Stores one integer (iblk). */ struct t_molecule_link { @@ -112,8 +99,7 @@ void calc_init_packing_timing(const t_packer_opts& packer_opts, /* * @brief Free the clustering data structures. */ -void free_clustering_data(const t_packer_opts& packer_opts, - t_clustering_data& clustering_data); +void free_clustering_data(const t_packer_opts& packer_opts, t_clustering_data& clustering_data); /* * @brief Check clustering legality and output it. @@ -143,8 +129,7 @@ void add_molecule_to_pb_stats_candidates(t_pack_molecule* molecule, * Useful for removing blocks that are repeatedly failing. If a block * has been found to be illegal, we don't repeatedly consider it. */ -void remove_molecule_from_pb_stats_candidates(t_pack_molecule* molecule, - t_pb* pb); +void remove_molecule_from_pb_stats_candidates(t_pack_molecule* molecule, t_pb* pb); /* * @brief Allocates and inits the data structures used for clustering. * @@ -209,8 +194,7 @@ void print_pack_status(int num_clb, * them are still available for new clusters (i.e. remove the atoms that * have already been packed from the attraction group). */ -void rebuild_attraction_groups(AttractionInfo& attraction_groups, - const ClusterLegalizer& cluster_legalizer); +void rebuild_attraction_groups(AttractionInfo& attraction_groups, const ClusterLegalizer& cluster_legalizer); /* * @brief Try to pack next_molecule into the given cluster. If this succeeds @@ -288,7 +272,12 @@ void mark_and_update_partial_gain(const AtomNetId net_id, * input sharing (sharinggain) and path_length minimization (timinggain) * input each time a new molecule is added to the cluster. */ -void update_total_gain(float alpha, float beta, bool timing_driven, bool connection_driven, t_pb* pb, AttractionInfo& attraction_groups); +void update_total_gain(float alpha, + float beta, + bool timing_driven, + bool connection_driven, + t_pb* pb, + AttractionInfo& attraction_groups); /* * @brief Routine that is called each time a new molecule is added to the cluster. @@ -317,16 +306,17 @@ void update_cluster_stats(const t_pack_molecule* molecule, * * It expands the FPGA if it cannot find a legal cluster for the atom block */ -void start_new_cluster(ClusterLegalizer& cluster_legalizer, - LegalizationClusterId& legalization_cluster_id, - t_pack_molecule* molecule, - std::map& num_used_type_instances, - const float target_device_utilization, - const t_arch* arch, - const std::string& device_layout_name, - const std::map>& primitive_candidate_block_types, - int verbosity, - bool balance_block_type_utilization); +void start_new_cluster( + ClusterLegalizer& cluster_legalizer, + LegalizationClusterId& legalization_cluster_id, + t_pack_molecule* molecule, + std::map& num_used_type_instances, + const float target_device_utilization, + const t_arch* arch, + const std::string& device_layout_name, + const std::map>& primitive_candidate_block_types, + int verbosity, + bool balance_block_type_utilization); /* * @brief Get candidate molecule to pack into currently open cluster @@ -341,17 +331,18 @@ void start_new_cluster(ClusterLegalizer& cluster_legalizer, * 4. Find unpacked molecules based on attraction group of the current cluster * (if the cluster has an attraction group). */ -t_pack_molecule* get_highest_gain_molecule(t_pb* cur_pb, - AttractionInfo& attraction_groups, - const enum e_gain_type gain_mode, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer, - vtr::vector>& clb_inter_blk_nets, - const LegalizationClusterId cluster_index, - bool prioritize_transitive_connectivity, - int transitive_fanout_threshold, - const int feasible_block_array_size, - std::map>& primitive_candidate_block_types); +t_pack_molecule* get_highest_gain_molecule( + t_pb* cur_pb, + AttractionInfo& attraction_groups, + const enum e_gain_type gain_mode, + const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer, + vtr::vector>& clb_inter_blk_nets, + const LegalizationClusterId cluster_index, + bool prioritize_transitive_connectivity, + int transitive_fanout_threshold, + const int feasible_block_array_size, + std::map>& primitive_candidate_block_types); /* * @brief Add molecules with strong connectedness to the current cluster to the @@ -386,42 +377,45 @@ void add_cluster_molecule_candidates_by_highfanout_connectivity(t_pb* cur_pb, * 500. Therefore, the molecules added to the candidates will vary each time you * call this function. */ -void add_cluster_molecule_candidates_by_attraction_group(t_pb* cur_pb, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer, - AttractionInfo& attraction_groups, - const int feasible_block_array_size, - LegalizationClusterId clb_index, - std::map>& primitive_candidate_block_types); +void add_cluster_molecule_candidates_by_attraction_group( + t_pb* cur_pb, + const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer, + AttractionInfo& attraction_groups, + const int feasible_block_array_size, + LegalizationClusterId clb_index, + std::map>& primitive_candidate_block_types); /* * @brief Add molecules based on transitive connections (eg. 2 hops away) with * current cluster. */ -void add_cluster_molecule_candidates_by_transitive_connectivity(t_pb* cur_pb, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer, - vtr::vector>& clb_inter_blk_nets, - const LegalizationClusterId cluster_index, - int transitive_fanout_threshold, - const int feasible_block_array_size, - AttractionInfo& attraction_groups); - -t_pack_molecule* get_molecule_for_cluster(t_pb* cur_pb, - AttractionInfo& attraction_groups, - const bool allow_unrelated_clustering, - const bool prioritize_transitive_connectivity, - const int transitive_fanout_threshold, - const int feasible_block_array_size, - int* num_unrelated_clustering_attempts, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer, - vtr::vector>& clb_inter_blk_nets, - LegalizationClusterId cluster_index, - int verbosity, - t_molecule_link* unclustered_list_head, - const int& unclustered_list_head_size, - std::map>& primitive_candidate_block_types); +void add_cluster_molecule_candidates_by_transitive_connectivity( + t_pb* cur_pb, + const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer, + vtr::vector>& clb_inter_blk_nets, + const LegalizationClusterId cluster_index, + int transitive_fanout_threshold, + const int feasible_block_array_size, + AttractionInfo& attraction_groups); + +t_pack_molecule* get_molecule_for_cluster( + t_pb* cur_pb, + AttractionInfo& attraction_groups, + const bool allow_unrelated_clustering, + const bool prioritize_transitive_connectivity, + const int transitive_fanout_threshold, + const int feasible_block_array_size, + int* num_unrelated_clustering_attempts, + const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer, + vtr::vector>& clb_inter_blk_nets, + LegalizationClusterId cluster_index, + int verbosity, + t_molecule_link* unclustered_list_head, + const int& unclustered_list_head_size, + std::map>& primitive_candidate_block_types); /* * @brief Calculates molecule statistics for a single molecule. @@ -446,9 +440,16 @@ t_pack_molecule* get_highest_gain_seed_molecule(int& seed_index, * + molecule_base_gain*some_factor * - introduced_input_nets_of_unrelated_blocks_pulled_in_by_molecule*some_other_factor */ -float get_molecule_gain(t_pack_molecule* molecule, std::map& blk_gain, AttractGroupId cluster_attraction_group_id, AttractionInfo& attraction_groups, int num_molecule_failures); +float get_molecule_gain(t_pack_molecule* molecule, + std::map& blk_gain, + AttractGroupId cluster_attraction_group_id, + AttractionInfo& attraction_groups, + int num_molecule_failures); -void print_seed_gains(const char* fname, const std::vector& seed_atoms, const vtr::vector& atom_gain, const vtr::vector& atom_criticality); +void print_seed_gains(const char* fname, + const std::vector& seed_atoms, + const vtr::vector& atom_gain, + const vtr::vector& atom_criticality); /** * @brief Score unclustered atoms that are two hops away from current cluster @@ -477,15 +478,22 @@ size_t update_pb_type_count(const t_pb* pb, std::map& pb_type_c * @brief This function updates the le_count data structure from the given * packed cluster. */ -void update_le_count(const t_pb* pb, const t_logical_block_type_ptr logic_block_type, const t_pb_type* le_pb_type, std::vector& le_count); +void update_le_count(const t_pb* pb, + const t_logical_block_type_ptr logic_block_type, + const t_pb_type* le_pb_type, + std::vector& le_count); -void print_pb_type_count_recurr(t_pb_type* type, size_t max_name_chars, size_t curr_depth, std::map& pb_type_count); +void print_pb_type_count_recurr(t_pb_type* type, + size_t max_name_chars, + size_t curr_depth, + std::map& pb_type_count); /* * @brief This function identifies the logic block type which is defined by the * block type which has a lut primitive. */ -t_logical_block_type_ptr identify_logic_block_type(std::map>& primitive_candidate_block_types); +t_logical_block_type_ptr identify_logic_block_type( + std::map>& primitive_candidate_block_types); /* * @brief This function returns the pb_type that is similar to Logic Element (LE) diff --git a/vpr/src/pack/constraints_report.cpp b/vpr/src/pack/constraints_report.cpp index 6b671331c74..c7f9059a3f5 100644 --- a/vpr/src/pack/constraints_report.cpp +++ b/vpr/src/pack/constraints_report.cpp @@ -37,25 +37,24 @@ bool floorplan_constraints_regions_overfull(const ClusterLegalizer& cluster_lega for (const t_logical_block_type& block_type : block_types) { int num_assigned_blocks = block_type_counts[block_type.index]; - int num_tiles = std::accumulate(regions.begin(), regions.end(), 0, [&grid_tiles, &block_type](int acc, const Region& reg) -> int { - return acc + grid_tiles.region_tile_count(reg, &block_type); - }); + int num_tiles = std::accumulate(regions.begin(), regions.end(), 0, + [&grid_tiles, &block_type](int acc, const Region& reg) -> int { + return acc + grid_tiles.region_tile_count(reg, &block_type); + }); if (num_assigned_blocks > num_tiles) { floorplan_regions_overfull = true; floorplanning_ctx.overfull_partition_regions.push_back(pr); - VTR_LOG("\n\nA partition including the following regions has been assigned %d blocks of type %s, " - "but only has %d tiles of that type\n", - num_assigned_blocks, block_type.name, num_tiles); + VTR_LOG( + "\n\nA partition including the following regions has been assigned %d blocks of type %s, " + "but only has %d tiles of that type\n", + num_assigned_blocks, block_type.name, num_tiles); for (const Region& reg : regions) { const vtr::Rect& rect = reg.get_rect(); const auto [layer_low, layer_high] = reg.get_layer_range(); - VTR_LOG("\tRegion (%d, %d, %d) to (%d, %d, %d) st %d \n", - rect.xmin(), rect.ymin(), layer_low, - rect.xmax(), rect.ymax(), layer_high, - reg.get_sub_tile()); + VTR_LOG("\tRegion (%d, %d, %d) to (%d, %d, %d) st %d \n", rect.xmin(), rect.ymin(), layer_low, + rect.xmax(), rect.ymax(), layer_high, reg.get_sub_tile()); } - } } } diff --git a/vpr/src/pack/lb_type_rr_graph.cpp b/vpr/src/pack/lb_type_rr_graph.cpp index 81a9437ef10..27bbaa6dbf7 100644 --- a/vpr/src/pack/lb_type_rr_graph.cpp +++ b/vpr/src/pack/lb_type_rr_graph.cpp @@ -183,7 +183,8 @@ static void alloc_and_load_lb_type_rr_graph_for_type(const t_logical_block_type_ ext_sink_index = pb_graph_head->total_pb_pins + 1; ext_rr_index = pb_graph_head->total_pb_pins + 2; - VTR_ASSERT(lb_type_rr_node_graph[ext_source_index].type == NUM_LB_RR_TYPES && lb_type_rr_node_graph[ext_sink_index].type == NUM_LB_RR_TYPES); + VTR_ASSERT(lb_type_rr_node_graph[ext_source_index].type == NUM_LB_RR_TYPES + && lb_type_rr_node_graph[ext_sink_index].type == NUM_LB_RR_TYPES); /******************************************************************************* * Build logic block source node @@ -197,7 +198,8 @@ static void alloc_and_load_lb_type_rr_graph_for_type(const t_logical_block_type_ lb_type_rr_node_graph[ext_source_index].outedges = new t_lb_type_rr_node_edge*[1]; lb_type_rr_node_graph[ext_source_index].outedges[0] = nullptr; if (lb_type_rr_node_graph[ext_source_index].num_fanout[0] > 0) { - lb_type_rr_node_graph[ext_source_index].outedges[0] = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[ext_source_index].num_fanout[0]]; + lb_type_rr_node_graph[ext_source_index].outedges[0] + = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[ext_source_index].num_fanout[0]]; for (int i = 0; i < lb_type_rr_node_graph[ext_source_index].num_fanout[0]; i++) lb_type_rr_node_graph[ext_source_index].outedges[0][i] = t_lb_type_rr_node_edge(); } @@ -208,7 +210,8 @@ static void alloc_and_load_lb_type_rr_graph_for_type(const t_logical_block_type_ for (int iport = 0; iport < pb_graph_head->num_input_ports; iport++) { for (int ipin = 0; ipin < pb_graph_head->num_input_pins[iport]; ipin++) { - lb_type_rr_node_graph[ext_source_index].outedges[0][ioutedges].node_index = pb_graph_head->input_pins[iport][ipin].pin_count_in_cluster; + lb_type_rr_node_graph[ext_source_index].outedges[0][ioutedges].node_index + = pb_graph_head->input_pins[iport][ipin].pin_count_in_cluster; lb_type_rr_node_graph[ext_source_index].outedges[0][ioutedges].intrinsic_cost = 1; ioutedges++; } @@ -216,7 +219,8 @@ static void alloc_and_load_lb_type_rr_graph_for_type(const t_logical_block_type_ for (int iport = 0; iport < pb_graph_head->num_clock_ports; iport++) { for (int ipin = 0; ipin < pb_graph_head->num_clock_pins[iport]; ipin++) { - lb_type_rr_node_graph[ext_source_index].outedges[0][ioutedges].node_index = pb_graph_head->clock_pins[iport][ipin].pin_count_in_cluster; + lb_type_rr_node_graph[ext_source_index].outedges[0][ioutedges].node_index + = pb_graph_head->clock_pins[iport][ipin].pin_count_in_cluster; lb_type_rr_node_graph[ext_source_index].outedges[0][ioutedges].intrinsic_cost = 1; ioutedges++; } @@ -249,7 +253,8 @@ static void alloc_and_load_lb_type_rr_graph_for_type(const t_logical_block_type_ lb_type_rr_node_graph[ext_rr_index].outedges = new t_lb_type_rr_node_edge*[1]; lb_type_rr_node_graph[ext_rr_index].outedges[0] = nullptr; if (lb_type_rr_node_graph[ext_rr_index].num_fanout[0] > 0) { - lb_type_rr_node_graph[ext_rr_index].outedges[0] = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[ext_rr_index].num_fanout[0]]; + lb_type_rr_node_graph[ext_rr_index].outedges[0] + = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[ext_rr_index].num_fanout[0]]; for (int i = 0; i < lb_type_rr_node_graph[ext_rr_index].num_fanout[0]; i++) lb_type_rr_node_graph[ext_rr_index].outedges[0][i] = t_lb_type_rr_node_edge(); } @@ -263,15 +268,19 @@ static void alloc_and_load_lb_type_rr_graph_for_type(const t_logical_block_type_ ioutedges = 1; for (int iport = 0; iport < pb_graph_head->num_input_ports; iport++) { for (int ipin = 0; ipin < pb_graph_head->num_input_pins[iport]; ipin++) { - lb_type_rr_node_graph[ext_rr_index].outedges[0][ioutedges].node_index = pb_graph_head->input_pins[iport][ipin].pin_count_in_cluster; - lb_type_rr_node_graph[ext_rr_index].outedges[0][ioutedges].intrinsic_cost = 1000; /* set cost high to avoid using external interconnect unless necessary */ + lb_type_rr_node_graph[ext_rr_index].outedges[0][ioutedges].node_index + = pb_graph_head->input_pins[iport][ipin].pin_count_in_cluster; + lb_type_rr_node_graph[ext_rr_index].outedges[0][ioutedges].intrinsic_cost + = 1000; /* set cost high to avoid using external interconnect unless necessary */ ioutedges++; } } for (int iport = 0; iport < pb_graph_head->num_clock_ports; iport++) { for (int ipin = 0; ipin < pb_graph_head->num_clock_pins[iport]; ipin++) { - lb_type_rr_node_graph[ext_rr_index].outedges[0][ioutedges].node_index = pb_graph_head->clock_pins[iport][ipin].pin_count_in_cluster; - lb_type_rr_node_graph[ext_rr_index].outedges[0][ioutedges].intrinsic_cost = 1000; /* set cost high to avoid using external interconnect unless necessary */ + lb_type_rr_node_graph[ext_rr_index].outedges[0][ioutedges].node_index + = pb_graph_head->clock_pins[iport][ipin].pin_count_in_cluster; + lb_type_rr_node_graph[ext_rr_index].outedges[0][ioutedges].intrinsic_cost + = 1000; /* set cost high to avoid using external interconnect unless necessary */ ioutedges++; } } @@ -369,10 +378,12 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n /* Allocate space based on fanout */ for (int imode = 0; imode < num_modes; imode++) { - lb_type_rr_node_graph[pin_index].outedges[imode] = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[imode]]; + lb_type_rr_node_graph[pin_index].outedges[imode] + = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[imode]]; for (int i = 0; i < lb_type_rr_node_graph[pin_index].num_fanout[imode]; i++) lb_type_rr_node_graph[pin_index].outedges[imode][i] = t_lb_type_rr_node_edge(); - lb_type_rr_node_graph[pin_index].num_fanout[imode] = 0; /* reset to 0 so that we can reuse this variable to populate fanout stats */ + lb_type_rr_node_graph[pin_index].num_fanout[imode] + = 0; /* reset to 0 so that we can reuse this variable to populate fanout stats */ } /* Load edges */ @@ -382,8 +393,10 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n int ioutedges; pmode = pb_pin->output_edges[iedge]->interconnect->parent_mode->index; ioutedges = lb_type_rr_node_graph[pin_index].num_fanout[pmode]; - lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].node_index = pb_pin->output_edges[iedge]->output_pins[0]->pin_count_in_cluster; - lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].intrinsic_cost = get_cost_of_pb_edge(pb_pin->output_edges[iedge]); + lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].node_index + = pb_pin->output_edges[iedge]->output_pins[0]->pin_count_in_cluster; + lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].intrinsic_cost + = get_cost_of_pb_edge(pb_pin->output_edges[iedge]); lb_type_rr_node_graph[pin_index].num_fanout[pmode]++; } @@ -434,7 +447,9 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n for (int imode = 0; imode < pb_type->num_modes; imode++) { for (int ipb_type = 0; ipb_type < pb_type->modes[imode].num_pb_type_children; ipb_type++) { for (int ipb = 0; ipb < pb_type->modes[imode].pb_type_children[ipb_type].num_pb; ipb++) { - alloc_and_load_lb_type_rr_graph_for_pb_graph_node(&pb_graph_node->child_pb_graph_nodes[imode][ipb_type][ipb], lb_type_rr_node_graph, ext_rr_index); + alloc_and_load_lb_type_rr_graph_for_pb_graph_node( + &pb_graph_node->child_pb_graph_nodes[imode][ipb_type][ipb], lb_type_rr_node_graph, + ext_rr_index); } } } @@ -468,11 +483,13 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n /* Allocate space based on fanout */ for (int imode = 0; imode < num_modes; imode++) { - lb_type_rr_node_graph[pin_index].outedges[imode] = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[imode]]; + lb_type_rr_node_graph[pin_index].outedges[imode] + = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[imode]]; for (int i = 0; i < lb_type_rr_node_graph[pin_index].num_fanout[imode]; i++) { lb_type_rr_node_graph[pin_index].outedges[imode][i] = t_lb_type_rr_node_edge(); } - lb_type_rr_node_graph[pin_index].num_fanout[imode] = 0; /* reset to 0 so that we can reuse this variable to populate fanout stats */ + lb_type_rr_node_graph[pin_index].num_fanout[imode] + = 0; /* reset to 0 so that we can reuse this variable to populate fanout stats */ } /* Load edges */ @@ -482,8 +499,10 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n int ioutedges; pmode = pb_pin->output_edges[iedge]->interconnect->parent_mode->index; ioutedges = lb_type_rr_node_graph[pin_index].num_fanout[pmode]; - lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].node_index = pb_pin->output_edges[iedge]->output_pins[0]->pin_count_in_cluster; - lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].intrinsic_cost = get_cost_of_pb_edge(pb_pin->output_edges[iedge]); + lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].node_index + = pb_pin->output_edges[iedge]->output_pins[0]->pin_count_in_cluster; + lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].intrinsic_cost + = get_cost_of_pb_edge(pb_pin->output_edges[iedge]); lb_type_rr_node_graph[pin_index].num_fanout[pmode]++; } @@ -517,7 +536,8 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n lb_type_rr_node_graph[pin_index].num_fanout[0] = 1; /* Allocate space based on fanout */ - lb_type_rr_node_graph[pin_index].outedges[0] = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[0]]; + lb_type_rr_node_graph[pin_index].outedges[0] + = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[0]]; for (int i = 0; i < lb_type_rr_node_graph[pin_index].num_fanout[0]; i++) lb_type_rr_node_graph[pin_index].outedges[0][i] = t_lb_type_rr_node_edge(); @@ -556,10 +576,12 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n /* Allocate space based on fanout */ for (int imode = 0; imode < num_modes; imode++) { - lb_type_rr_node_graph[pin_index].outedges[imode] = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[imode]]; + lb_type_rr_node_graph[pin_index].outedges[imode] + = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[imode]]; for (int i = 0; i < lb_type_rr_node_graph[pin_index].num_fanout[imode]; i++) lb_type_rr_node_graph[pin_index].outedges[imode][i] = t_lb_type_rr_node_edge(); - lb_type_rr_node_graph[pin_index].num_fanout[imode] = 0; /* reset to 0 so that we can reuse this variable to populate fanout stats */ + lb_type_rr_node_graph[pin_index].num_fanout[imode] + = 0; /* reset to 0 so that we can reuse this variable to populate fanout stats */ } /* Load edges */ @@ -569,8 +591,10 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n int ioutedges; pmode = pb_pin->output_edges[iedge]->interconnect->parent_mode->index; ioutedges = lb_type_rr_node_graph[pin_index].num_fanout[pmode]; - lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].node_index = pb_pin->output_edges[iedge]->output_pins[0]->pin_count_in_cluster; - lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].intrinsic_cost = get_cost_of_pb_edge(pb_pin->output_edges[iedge]); + lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].node_index + = pb_pin->output_edges[iedge]->output_pins[0]->pin_count_in_cluster; + lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].intrinsic_cost + = get_cost_of_pb_edge(pb_pin->output_edges[iedge]); lb_type_rr_node_graph[pin_index].num_fanout[pmode]++; } @@ -608,10 +632,12 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n /* Allocate space based on fanout */ for (int imode = 0; imode < num_modes; imode++) { - lb_type_rr_node_graph[pin_index].outedges[imode] = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[imode]]; + lb_type_rr_node_graph[pin_index].outedges[imode] + = new t_lb_type_rr_node_edge[lb_type_rr_node_graph[pin_index].num_fanout[imode]]; for (int i = 0; i < lb_type_rr_node_graph[pin_index].num_fanout[imode]; i++) lb_type_rr_node_graph[pin_index].outedges[imode][i] = t_lb_type_rr_node_edge(); - lb_type_rr_node_graph[pin_index].num_fanout[imode] = 0; /* reset to 0 so that we can reuse this variable to populate fanout stats */ + lb_type_rr_node_graph[pin_index].num_fanout[imode] + = 0; /* reset to 0 so that we can reuse this variable to populate fanout stats */ } /* Load edges */ @@ -621,8 +647,10 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n int ioutedges; pmode = pb_pin->output_edges[iedge]->interconnect->parent_mode->index; ioutedges = lb_type_rr_node_graph[pin_index].num_fanout[pmode]; - lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].node_index = pb_pin->output_edges[iedge]->output_pins[0]->pin_count_in_cluster; - lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].intrinsic_cost = get_cost_of_pb_edge(pb_pin->output_edges[iedge]); + lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].node_index + = pb_pin->output_edges[iedge]->output_pins[0]->pin_count_in_cluster; + lb_type_rr_node_graph[pin_index].outedges[pmode][ioutedges].intrinsic_cost + = get_cost_of_pb_edge(pb_pin->output_edges[iedge]); lb_type_rr_node_graph[pin_index].num_fanout[pmode]++; } @@ -633,9 +661,7 @@ static void alloc_and_load_lb_type_rr_graph_for_pb_graph_node(const t_pb_graph_n } /* Determine intrinsic cost of an edge that joins two pb_graph_pins */ -static float get_cost_of_pb_edge(t_pb_graph_edge* /*edge*/) { - return 1; -} +static float get_cost_of_pb_edge(t_pb_graph_edge* /*edge*/) { return 1; } /* Print logic block type routing resource graph */ static void print_lb_type_rr_graph(FILE* fp, const std::vector& lb_type_rr_graph) { @@ -643,10 +669,8 @@ static void print_lb_type_rr_graph(FILE* fp, const std::vectorparent_node; - fprintf(fp, "\t%s[%d].%s[%d]\n", pb_graph_node->pb_type->name, - pb_graph_node->placement_index, - lb_type_rr_graph[inode].pb_graph_pin->port->name, - lb_type_rr_graph[inode].pb_graph_pin->pin_number); + fprintf(fp, "\t%s[%d].%s[%d]\n", pb_graph_node->pb_type->name, pb_graph_node->placement_index, + lb_type_rr_graph[inode].pb_graph_pin->port->name, lb_type_rr_graph[inode].pb_graph_pin->pin_number); } fprintf(fp, "\tType: %s\n", lb_rr_type_str[(int)lb_type_rr_graph[inode].type]); fprintf(fp, "\tCapacity: %d\n", lb_type_rr_graph[inode].capacity); diff --git a/vpr/src/pack/noc_aware_cluster_util.cpp b/vpr/src/pack/noc_aware_cluster_util.cpp index 87f981605de..a760c8480e5 100644 --- a/vpr/src/pack/noc_aware_cluster_util.cpp +++ b/vpr/src/pack/noc_aware_cluster_util.cpp @@ -70,7 +70,7 @@ void update_noc_reachability_partitions(const std::vector& noc_atom atom_noc_grp_id[current_atom] = noc_grp_id; - for(auto pin : atom_netlist.block_pins(current_atom)) { + for (auto pin : atom_netlist.block_pins(current_atom)) { AtomNetId net_id = atom_netlist.pin_net(pin); size_t net_fanout = atom_netlist.net_sinks(net_id).size(); @@ -91,9 +91,7 @@ void update_noc_reachability_partitions(const std::vector& noc_atom atom_visited[sink_atom_id] = true; } } - } } - } } diff --git a/vpr/src/pack/noc_aware_cluster_util.h b/vpr/src/pack/noc_aware_cluster_util.h index 6f930a21944..a414d147bcf 100644 --- a/vpr/src/pack/noc_aware_cluster_util.h +++ b/vpr/src/pack/noc_aware_cluster_util.h @@ -32,7 +32,6 @@ class t_pack_high_fanout_thresholds; */ std::vector find_noc_router_atoms(const AtomNetlist& atom_netlist); - /** * @brief Runs BFS starting from NoC routers to find all connected * components that include a NoC router. Each connected component diff --git a/vpr/src/pack/output_clustering.cpp b/vpr/src/pack/output_clustering.cpp index c659837c5fb..78d10278be8 100644 --- a/vpr/src/pack/output_clustering.cpp +++ b/vpr/src/pack/output_clustering.cpp @@ -75,17 +75,11 @@ static void count_stats_from_legalizer(const ClusterLegalizer& cluster_legalizer const t_pb* pb = cluster_legalizer.get_cluster_pb(cluster_id); if (pb->pb_route.empty()) continue; - count_clb_inputs_and_outputs_from_pb_route(pb, - logical_block, - ipin, - pin_type, - nets_absorbed, - num_clb_inputs_used, - num_clb_outputs_used); + count_clb_inputs_and_outputs_from_pb_route(pb, logical_block, ipin, pin_type, nets_absorbed, + num_clb_inputs_used, num_clb_outputs_used); } num_clb_types[logical_block->index]++; } - } static void count_stats_from_netlist(std::unordered_map& nets_absorbed, @@ -103,13 +97,8 @@ static void count_stats_from_netlist(std::unordered_map& nets_a e_pin_type pin_type = get_pin_type_from_pin_physical_num(physical_tile, physical_pin); if (!clb_nlist.block_pb(blk_id)->pb_route.empty()) { - count_clb_inputs_and_outputs_from_pb_route(clb_nlist.block_pb(blk_id), - logical_block, - ipin, - pin_type, - nets_absorbed, - num_clb_inputs_used, - num_clb_outputs_used); + count_clb_inputs_and_outputs_from_pb_route(clb_nlist.block_pb(blk_id), logical_block, ipin, pin_type, + nets_absorbed, num_clb_inputs_used, num_clb_outputs_used); } else { ClusterNetId clb_net_id = clb_nlist.block_net(blk_id, ipin); if (clb_net_id != ClusterNetId::INVALID()) { @@ -153,7 +142,8 @@ static void print_stats(const ClusterLegalizer* cluster_legalizer_ptr, bool from /* Counters used only for statistics purposes. */ if (from_legalizer) { VTR_ASSERT(cluster_legalizer_ptr != nullptr); - count_stats_from_legalizer(*cluster_legalizer_ptr, nets_absorbed, num_clb_types, num_clb_inputs_used, num_clb_outputs_used); + count_stats_from_legalizer(*cluster_legalizer_ptr, nets_absorbed, num_clb_types, num_clb_inputs_used, + num_clb_outputs_used); } else { VTR_ASSERT(cluster_legalizer_ptr == nullptr); count_stats_from_netlist(nets_absorbed, num_clb_types, num_clb_inputs_used, num_clb_outputs_used); @@ -177,8 +167,8 @@ static void print_stats(const ClusterLegalizer* cluster_legalizer_ptr, bool from total_nets_absorbed++; } } - VTR_LOG("Absorbed logical nets %d out of %d nets, %d nets not absorbed.\n", - total_nets_absorbed, (int)atom_nlist.nets().size(), (int)atom_nlist.nets().size() - total_nets_absorbed); + VTR_LOG("Absorbed logical nets %d out of %d nets, %d nets not absorbed.\n", total_nets_absorbed, + (int)atom_nlist.nets().size(), (int)atom_nlist.nets().size() - total_nets_absorbed); delete[] num_clb_types; delete[] num_clb_inputs_used; delete[] num_clb_outputs_used; @@ -198,10 +188,7 @@ static void print_clustering_stats(char* block_name, int num_block_type, float n "%8d " "%36g " "%26g ", - block_name, - num_block_type, - num_inputs_clocks, - num_outputs); + block_name, num_block_type, num_inputs_clocks, num_outputs); VTR_LOG("\n"); @@ -221,7 +208,10 @@ static const char* clustering_xml_net_text(AtomNetId net_id) { } } -static std::string clustering_xml_interconnect_text(t_logical_block_type_ptr type, const IntraLbPbPinLookup& pb_graph_pin_lookup_from_index_by_type, int inode, const t_pb_routes& pb_route) { +static std::string clustering_xml_interconnect_text(t_logical_block_type_ptr type, + const IntraLbPbPinLookup& pb_graph_pin_lookup_from_index_by_type, + int inode, + const t_pb_routes& pb_route) { if (!pb_route.count(inode) || !pb_route[inode].atom_net_id) { return "open"; } @@ -231,7 +221,8 @@ static std::string clustering_xml_interconnect_text(t_logical_block_type_ptr typ if (prev_node == OPEN) { /* No previous driver implies that this is either a top-level input pin or a primitive output pin */ const t_pb_graph_pin* cur_pin = pb_graph_pin_lookup_from_index_by_type.pb_gpin(type->index, inode); - VTR_ASSERT(cur_pin->parent_node->pb_type->parent_mode == nullptr || (cur_pin->is_primitive_pin() && cur_pin->port->type == OUT_PORT)); + VTR_ASSERT(cur_pin->parent_node->pb_type->parent_mode == nullptr + || (cur_pin->is_primitive_pin() && cur_pin->port->type == OUT_PORT)); return clustering_xml_net_text(pb_route[inode].atom_net_id); } else { const t_pb_graph_pin* cur_pin = pb_graph_pin_lookup_from_index_by_type.pb_gpin(type->index, inode); @@ -246,18 +237,13 @@ static std::string clustering_xml_interconnect_text(t_logical_block_type_ptr typ VTR_ASSERT(prev_edge < prev_pin->num_output_edges); char* name = prev_pin->output_edges[prev_edge]->interconnect->name; - if (prev_pin->port->parent_pb_type->depth - >= cur_pin->port->parent_pb_type->depth) { + if (prev_pin->port->parent_pb_type->depth >= cur_pin->port->parent_pb_type->depth) { /* Connections from siblings or children should have an explicit index, connections from parent does not need an explicit index */ - return vtr::string_fmt("%s[%d].%s[%d]->%s", - prev_pin->parent_node->pb_type->name, - prev_pin->parent_node->placement_index, - prev_pin->port->name, - prev_pin->pin_number, name); + return vtr::string_fmt("%s[%d].%s[%d]->%s", prev_pin->parent_node->pb_type->name, + prev_pin->parent_node->placement_index, prev_pin->port->name, prev_pin->pin_number, + name); } else { - return vtr::string_fmt("%s.%s[%d]->%s", - prev_pin->parent_node->pb_type->name, - prev_pin->port->name, + return vtr::string_fmt("%s.%s[%d]->%s", prev_pin->parent_node->pb_type->name, prev_pin->port->name, prev_pin->pin_number, name); } } @@ -268,7 +254,13 @@ static std::string clustering_xml_interconnect_text(t_logical_block_type_ptr typ * cannot simply be marked open as that would lose the routing information. Instead, a block must be * output that reflects the routing resources used. This function handles both cases. */ -static void clustering_xml_open_block(pugi::xml_node& parent_node, t_logical_block_type_ptr type, const IntraLbPbPinLookup& pb_graph_pin_lookup_from_index_by_type, t_pb_graph_node* pb_graph_node, int pb_index, bool is_used, const t_pb_routes& pb_route) { +static void clustering_xml_open_block(pugi::xml_node& parent_node, + t_logical_block_type_ptr type, + const IntraLbPbPinLookup& pb_graph_pin_lookup_from_index_by_type, + t_pb_graph_node* pb_graph_node, + int pb_index, + bool is_used, + const t_pb_routes& pb_route) { int i, j, k, m; const t_pb_type *pb_type, *child_pb_type; t_mode* mode = nullptr; @@ -295,17 +287,17 @@ static void clustering_xml_open_block(pugi::xml_node& parent_node, t_logical_blo node_index = pin->pin_count_in_cluster; if (pb_type->num_modes > 0 && pb_route.count(node_index) && pb_route[node_index].atom_net_id) { prev_node = pb_route[node_index].driver_pb_pin_id; - const t_pb_graph_pin* prev_pin = pb_graph_pin_lookup_from_index_by_type.pb_gpin(type->index, prev_node); + const t_pb_graph_pin* prev_pin + = pb_graph_pin_lookup_from_index_by_type.pb_gpin(type->index, prev_node); const t_pb_graph_edge* edge = get_edge_between_pins(prev_pin, pin); VTR_ASSERT(edge != nullptr); mode_of_edge = edge->interconnect->parent_mode_index; if (mode != nullptr && &pb_type->modes[mode_of_edge] != mode) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Differing modes for block. Got %s previously and %s for edge %d (interconnect %s).", - mode->name, pb_type->modes[mode_of_edge].name, - port_index, - edge->interconnect->name); + VPR_FATAL_ERROR( + VPR_ERROR_PACK, + "Differing modes for block. Got %s previously and %s for edge %d (interconnect %s).", + mode->name, pb_type->modes[mode_of_edge].name, port_index, edge->interconnect->name); } VTR_ASSERT(mode == nullptr || &pb_type->modes[mode_of_edge] == mode); mode = &pb_type->modes[mode_of_edge]; @@ -335,7 +327,8 @@ static void clustering_xml_open_block(pugi::xml_node& parent_node, t_logical_blo if (pb_type->parent_mode == nullptr) { pins.push_back(clustering_xml_net_text(pb_route[node_index].atom_net_id)); } else { - pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, node_index, pb_route)); + pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, + node_index, pb_route)); } } port_node.text().set(vtr::join(pins.begin(), pins.end(), " ").c_str()); @@ -355,7 +348,8 @@ static void clustering_xml_open_block(pugi::xml_node& parent_node, t_logical_blo std::vector pins; for (j = 0; j < pb_type->ports[i].num_pins; j++) { node_index = pb_graph_node->output_pins[port_index][j].pin_count_in_cluster; - pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, node_index, pb_route)); + pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, + node_index, pb_route)); } port_node.text().set(vtr::join(pins.begin(), pins.end(), " ").c_str()); port_index++; @@ -376,7 +370,8 @@ static void clustering_xml_open_block(pugi::xml_node& parent_node, t_logical_blo if (pb_type->parent_mode == nullptr) { pins.push_back(clustering_xml_net_text(pb_route[node_index].atom_net_id)); } else { - pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, node_index, pb_route)); + pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, + node_index, pb_route)); } } port_node.text().set(vtr::join(pins.begin(), pins.end(), " ").c_str()); @@ -393,7 +388,9 @@ static void clustering_xml_open_block(pugi::xml_node& parent_node, t_logical_blo for (k = 0; k < child_pb_type->num_ports && !is_used; k++) { if (child_pb_type->ports[k].type == OUT_PORT) { for (m = 0; m < child_pb_type->ports[k].num_pins; m++) { - node_index = pb_graph_node->child_pb_graph_nodes[mode_of_edge][i][j].output_pins[port_index][m].pin_count_in_cluster; + node_index = pb_graph_node->child_pb_graph_nodes[mode_of_edge][i][j] + .output_pins[port_index][m] + .pin_count_in_cluster; if (pb_route.count(node_index) && pb_route[node_index].atom_net_id) { is_used = true; break; @@ -403,8 +400,8 @@ static void clustering_xml_open_block(pugi::xml_node& parent_node, t_logical_blo } } clustering_xml_open_block(block_node, type, pb_graph_pin_lookup_from_index_by_type, - &pb_graph_node->child_pb_graph_nodes[mode_of_edge][i][j], - j, is_used, pb_route); + &pb_graph_node->child_pb_graph_nodes[mode_of_edge][i][j], j, is_used, + pb_route); } } } @@ -412,7 +409,12 @@ static void clustering_xml_open_block(pugi::xml_node& parent_node, t_logical_blo } /* outputs a block that is used (i.e. has configuration) and all of its child blocks */ -static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_type_ptr type, const IntraLbPbPinLookup& pb_graph_pin_lookup_from_index_by_type, t_pb* pb, int pb_index, const t_pb_routes& pb_route) { +static void clustering_xml_block(pugi::xml_node& parent_node, + t_logical_block_type_ptr type, + const IntraLbPbPinLookup& pb_graph_pin_lookup_from_index_by_type, + t_pb* pb, + int pb_index, + const t_pb_routes& pb_route) { int i, j, k, m; const t_pb_type *pb_type, *child_pb_type; t_pb_graph_node* pb_graph_node; @@ -469,7 +471,8 @@ static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_ty pins.push_back(clustering_xml_net_text(AtomNetId::INVALID())); } } else { - pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, node_index, pb_route)); + pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, + node_index, pb_route)); } } port_node.text().set(vtr::join(pins.begin(), pins.end(), " ").c_str()); @@ -477,7 +480,8 @@ static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_ty //The cluster router may have rotated equivalent pins (e.g. LUT inputs), //record the resulting rotation here so it can be unambigously mapped //back to the atom netlist - if (pb_type->ports[i].equivalent != PortEquivalence::NONE && pb_type->parent_mode != nullptr && pb_type->num_modes == 0) { + if (pb_type->ports[i].equivalent != PortEquivalence::NONE && pb_type->parent_mode != nullptr + && pb_type->num_modes == 0) { //This is a primitive with equivalent inputs auto& atom_ctx = g_vpr_ctx.atom(); @@ -505,7 +509,8 @@ static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_ty //This physical pin is in use, find the original pin in the atom netlist AtomPinId orig_pin; for (AtomPinId atom_pin : atom_ctx.nlist.port_pins(atom_port)) { - if (recorded_pins.count(atom_pin)) continue; //Don't add pins twice + if (recorded_pins.count(atom_pin)) + continue; //Don't add pins twice AtomNetId atom_pin_net = atom_ctx.nlist.pin_net(atom_pin); @@ -544,7 +549,8 @@ static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_ty std::vector pins; for (j = 0; j < pb_type->ports[i].num_pins; j++) { node_index = pb->pb_graph_node->output_pins[port_index][j].pin_count_in_cluster; - pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, node_index, pb_route)); + pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, + node_index, pb_route)); } port_node.text().set(vtr::join(pins.begin(), pins.end(), " ").c_str()); port_index++; @@ -569,7 +575,8 @@ static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_ty pins.push_back(clustering_xml_net_text(AtomNetId::INVALID())); } } else { - pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, node_index, pb_route)); + pins.push_back(clustering_xml_interconnect_text(type, pb_graph_pin_lookup_from_index_by_type, + node_index, pb_route)); } } port_node.text().set(vtr::join(pins.begin(), pins.end(), " ").c_str()); @@ -582,7 +589,8 @@ static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_ty for (j = 0; j < mode->pb_type_children[i].num_pb; j++) { /* If child pb is not used but routing is used, I must print things differently */ if ((pb->child_pbs[i] != nullptr) && (pb->child_pbs[i][j].name != nullptr)) { - clustering_xml_block(block_node, type, pb_graph_pin_lookup_from_index_by_type, &pb->child_pbs[i][j], j, pb_route); + clustering_xml_block(block_node, type, pb_graph_pin_lookup_from_index_by_type, &pb->child_pbs[i][j], + j, pb_route); } else { is_used = false; child_pb_type = &mode->pb_type_children[i]; @@ -591,7 +599,9 @@ static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_ty for (k = 0; k < child_pb_type->num_ports && !is_used; k++) { if (child_pb_type->ports[k].type == OUT_PORT) { for (m = 0; m < child_pb_type->ports[k].num_pins; m++) { - node_index = pb_graph_node->child_pb_graph_nodes[pb->mode][i][j].output_pins[port_index][m].pin_count_in_cluster; + node_index = pb_graph_node->child_pb_graph_nodes[pb->mode][i][j] + .output_pins[port_index][m] + .pin_count_in_cluster; if (pb_route.count(node_index) && pb_route[node_index].atom_net_id) { is_used = true; break; @@ -601,8 +611,8 @@ static void clustering_xml_block(pugi::xml_node& parent_node, t_logical_block_ty } } clustering_xml_open_block(block_node, type, pb_graph_pin_lookup_from_index_by_type, - &pb_graph_node->child_pb_graph_nodes[pb->mode][i][j], - j, is_used, pb_route); + &pb_graph_node->child_pb_graph_nodes[pb->mode][i][j], j, is_used, + pb_route); } } } @@ -616,12 +626,9 @@ static void clustering_xml_blocks_from_legalizer(pugi::xml_node& block_node, // its pb_route calculated. cluster_legalizer.finalize(); for (LegalizationClusterId cluster_id : cluster_legalizer.clusters()) { - clustering_xml_block(block_node, - cluster_legalizer.get_cluster_type(cluster_id), - pb_graph_pin_lookup_from_index_by_type, - cluster_legalizer.get_cluster_pb(cluster_id), - size_t(cluster_id), - cluster_legalizer.get_cluster_pb(cluster_id)->pb_route); + clustering_xml_block(block_node, cluster_legalizer.get_cluster_type(cluster_id), + pb_graph_pin_lookup_from_index_by_type, cluster_legalizer.get_cluster_pb(cluster_id), + size_t(cluster_id), cluster_legalizer.get_cluster_pb(cluster_id)->pb_route); } } @@ -630,19 +637,21 @@ static void clustering_xml_blocks_from_netlist(pugi::xml_node& block_node, const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; for (auto blk_id : clb_nlist.blocks()) { /* TODO: Must do check that total CLB pins match top-level pb pins, perhaps check this earlier? */ - clustering_xml_block(block_node, - clb_nlist.block_type(blk_id), - pb_graph_pin_lookup_from_index_by_type, - clb_nlist.block_pb(blk_id), - size_t(blk_id), - clb_nlist.block_pb(blk_id)->pb_route); + clustering_xml_block(block_node, clb_nlist.block_type(blk_id), pb_graph_pin_lookup_from_index_by_type, + clb_nlist.block_pb(blk_id), size_t(blk_id), clb_nlist.block_pb(blk_id)->pb_route); } } /* This routine dumps out the output netlist in a format suitable for * * input to vpr. This routine also dumps out the internal structure of * * the cluster, in essentially a graph based format. */ -void output_clustering(ClusterLegalizer* cluster_legalizer_ptr, bool global_clocks, const std::unordered_set& is_clock, const std::string& architecture_id, const char* out_fname, bool skip_clustering, bool from_legalizer) { +void output_clustering(ClusterLegalizer* cluster_legalizer_ptr, + bool global_clocks, + const std::unordered_set& is_clock, + const std::string& architecture_id, + const char* out_fname, + bool skip_clustering, + bool from_legalizer) { const DeviceContext& device_ctx = g_vpr_ctx.device(); const AtomNetlist& atom_nlist = g_vpr_ctx.atom().nlist; @@ -683,8 +692,8 @@ void output_clustering(ClusterLegalizer* cluster_legalizer_ptr, bool global_cloc break; default: - VTR_LOG_ERROR("in output_netlist: Unexpected type %d for atom block %s.\n", - type, atom_nlist.block_name(blk_id).c_str()); + VTR_LOG_ERROR("in output_netlist: Unexpected type %d for atom block %s.\n", type, + atom_nlist.block_name(blk_id).c_str()); } } @@ -705,7 +714,8 @@ void output_clustering(ClusterLegalizer* cluster_legalizer_ptr, bool global_cloc if (skip_clustering == false) { if (from_legalizer) { VTR_ASSERT(cluster_legalizer_ptr != nullptr); - clustering_xml_blocks_from_legalizer(block_node, pb_graph_pin_lookup_from_index_by_type, *cluster_legalizer_ptr); + clustering_xml_blocks_from_legalizer(block_node, pb_graph_pin_lookup_from_index_by_type, + *cluster_legalizer_ptr); } else { VTR_ASSERT(cluster_legalizer_ptr == nullptr); clustering_xml_blocks_from_netlist(block_node, pb_graph_pin_lookup_from_index_by_type); @@ -733,11 +743,6 @@ void write_packing_results_to_xml(const bool& global_clocks, // Since the cluster legalizer is not being used to output the clustering // (from_legalizer is false), passing in nullptr. - output_clustering(nullptr, - global_clocks, - is_clock, - architecture_id, - out_fname, - false, /*skip_clustering*/ + output_clustering(nullptr, global_clocks, is_clock, architecture_id, out_fname, false, /*skip_clustering*/ false /*from_legalizer*/); } diff --git a/vpr/src/pack/output_clustering.h b/vpr/src/pack/output_clustering.h index 92d734248d1..59636d2b99d 100644 --- a/vpr/src/pack/output_clustering.h +++ b/vpr/src/pack/output_clustering.h @@ -24,8 +24,6 @@ void output_clustering(ClusterLegalizer* cluster_legalizer_ptr, bool skip_clustering, bool from_legalizer); -void write_packing_results_to_xml(const bool& global_clocks, - const std::string& architecture_id, - const char* out_fname); +void write_packing_results_to_xml(const bool& global_clocks, const std::string& architecture_id, const char* out_fname); #endif diff --git a/vpr/src/pack/pack.cpp b/vpr/src/pack/pack.cpp index 566ca03e3ae..b558b7da1fb 100644 --- a/vpr/src/pack/pack.cpp +++ b/vpr/src/pack/pack.cpp @@ -94,52 +94,38 @@ bool try_pack(t_packer_opts* packer_opts, bool floorplan_regions_overfull = false; // Initialize the cluster legalizer. - ClusterLegalizer cluster_legalizer(atom_ctx.nlist, - prepacker, - device_ctx.logical_block_types, - lb_type_rr_graphs, - user_models, - library_models, - packer_opts->target_external_pin_util, - high_fanout_thresholds, - ClusterLegalizationStrategy::SKIP_INTRA_LB_ROUTE, + ClusterLegalizer cluster_legalizer(atom_ctx.nlist, prepacker, device_ctx.logical_block_types, lb_type_rr_graphs, + user_models, library_models, packer_opts->target_external_pin_util, + high_fanout_thresholds, ClusterLegalizationStrategy::SKIP_INTRA_LB_ROUTE, packer_opts->enable_pin_feasibility_filter, - packer_opts->feasible_block_array_size, - packer_opts->pack_verbosity); + packer_opts->feasible_block_array_size, packer_opts->pack_verbosity); - VTR_LOG("Packing with pin utilization targets: %s\n", cluster_legalizer.get_target_external_pin_util().to_string().c_str()); + VTR_LOG("Packing with pin utilization targets: %s\n", + cluster_legalizer.get_target_external_pin_util().to_string().c_str()); VTR_LOG("Packing with high fanout thresholds: %s\n", high_fanout_thresholds.to_string().c_str()); while (true) { free_clustering_data(*packer_opts, clustering_data); - //Cluster the netlist // num_used_type_instances: A map used to save the number of used // instances from each logical block type. std::map num_used_type_instances; - num_used_type_instances = do_clustering(*packer_opts, - *analysis_opts, - arch, - prepacker, - cluster_legalizer, - is_clock, - is_global, - allow_unrelated_clustering, - balance_block_type_util, - attraction_groups, - floorplan_regions_overfull, - high_fanout_thresholds, - clustering_data); + num_used_type_instances + = do_clustering(*packer_opts, *analysis_opts, arch, prepacker, cluster_legalizer, is_clock, is_global, + allow_unrelated_clustering, balance_block_type_util, attraction_groups, + floorplan_regions_overfull, high_fanout_thresholds, clustering_data); //Try to size/find a device - bool fits_on_device = try_size_device_grid(*arch, num_used_type_instances, packer_opts->target_device_utilization, packer_opts->device_layout); + bool fits_on_device = try_size_device_grid(*arch, num_used_type_instances, + packer_opts->target_device_utilization, packer_opts->device_layout); /* We use this bool to determine the cause for the clustering not being dense enough. If the clustering * is not dense enough and there are floorplan constraints, it is presumed that the constraints are the cause * of the floorplan not fitting, so attraction groups are turned on for later iterations. */ - bool floorplan_not_fitting = (floorplan_regions_overfull || g_vpr_ctx.floorplanning().constraints.get_num_partitions() > 0); + bool floorplan_not_fitting + = (floorplan_regions_overfull || g_vpr_ctx.floorplanning().constraints.get_num_partitions() > 0); if (fits_on_device && !floorplan_regions_overfull) { break; //Done @@ -155,9 +141,10 @@ bool try_pack(t_packer_opts* packer_opts, VTR_ASSERT(balance_block_type_util == false); balance_block_type_util = true; } - VTR_LOG("Packing failed to fit on device. Re-packing with: unrelated_logic_clustering=%s balance_block_type_util=%s\n", - (allow_unrelated_clustering ? "true" : "false"), - (balance_block_type_util ? "true" : "false")); + VTR_LOG( + "Packing failed to fit on device. Re-packing with: unrelated_logic_clustering=%s " + "balance_block_type_util=%s\n", + (allow_unrelated_clustering ? "true" : "false"), (balance_block_type_util ? "true" : "false")); /* * When running with tight floorplan constraints, some regions may become overfull with clusters (i.e. * the number of blocks assigned to the region exceeds the number of blocks available). When this occurs, we @@ -175,16 +162,20 @@ bool try_pack(t_packer_opts* packer_opts, } else if (pack_iteration >= 2 && pack_iteration < 5 && floorplan_not_fitting) { if (pack_iteration == 2) { - VTR_LOG("Floorplan regions are overfull: trying to pack again with more attraction groups exploration. \n"); + VTR_LOG( + "Floorplan regions are overfull: trying to pack again with more attraction groups exploration. \n"); attraction_groups.create_att_groups_for_overfull_regions(); VTR_LOG("Pack iteration is %d\n", pack_iteration); } else if (pack_iteration == 3) { attraction_groups.create_att_groups_for_all_regions(); - VTR_LOG("Floorplan regions are overfull: trying to pack again with more attraction groups exploration. \n"); + VTR_LOG( + "Floorplan regions are overfull: trying to pack again with more attraction groups exploration. \n"); VTR_LOG("Pack iteration is %d\n", pack_iteration); } else if (pack_iteration == 4) { attraction_groups.create_att_groups_for_all_regions(); - VTR_LOG("Floorplan regions are overfull: trying to pack again with more attraction groups exploration and higher target pin utilization. \n"); + VTR_LOG( + "Floorplan regions are overfull: trying to pack again with more attraction groups exploration and " + "higher target pin utilization. \n"); VTR_LOG("Pack iteration is %d\n", pack_iteration); attraction_groups.set_att_group_pulls(4); t_ext_pin_util pin_util(1.0, 1.0); @@ -199,9 +190,10 @@ bool try_pack(t_packer_opts* packer_opts, } else { //Unable to pack densely enough: Give Up if (floorplan_regions_overfull) { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, - "Failed to find pack clusters densely enough to fit in the designated floorplan regions.\n" - "The floorplan regions may need to be expanded to run successfully. \n"); + VPR_FATAL_ERROR( + VPR_ERROR_OTHER, + "Failed to find pack clusters densely enough to fit in the designated floorplan regions.\n" + "The floorplan regions may need to be expanded to run successfully. \n"); } //No suitable device found @@ -223,7 +215,9 @@ bool try_pack(t_packer_opts* packer_opts, resource_avail += std::string(iter->first->name) + ": " + std::to_string(num_instances); } - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Failed to find device which satisfies resource requirements required: %s (available %s)", resource_reqs.c_str(), resource_avail.c_str()); + VPR_FATAL_ERROR(VPR_ERROR_OTHER, + "Failed to find device which satisfies resource requirements required: %s (available %s)", + resource_reqs.c_str(), resource_avail.c_str()); } //Reset clustering for re-packing @@ -271,7 +265,11 @@ bool try_pack(t_packer_opts* packer_opts, return true; } -float get_arch_switch_info(short switch_index, int switch_fanin, float& Tdel_switch, float& R_switch, float& Cout_switch) { +float get_arch_switch_info(short switch_index, + int switch_fanin, + float& Tdel_switch, + float& R_switch, + float& Cout_switch) { /* Fetches delay, resistance and output capacitance of the architecture switch at switch_index. * Returns the total delay through the switch. Used to calculate inter-cluster net delay. */ @@ -318,7 +316,8 @@ static bool try_size_device_grid(const t_arch& arch, auto& device_ctx = g_vpr_ctx.mutable_device(); //Build the device - auto grid = create_device_grid(device_layout_name, arch.grid_layouts, num_type_instances, target_device_utilization); + auto grid + = create_device_grid(device_layout_name, arch.grid_layouts, num_type_instances, target_device_utilization); /* *Report on the device @@ -331,10 +330,12 @@ static bool try_size_device_grid(const t_arch& arch, VTR_LOG("Device Utilization: %.2f (target %.2f)\n", device_utilization, target_device_utilization); std::map type_util; for (const auto& type : device_ctx.logical_block_types) { - if (is_empty_type(&type)) continue; + if (is_empty_type(&type)) + continue; auto itr = num_type_instances.find(&type); - if (itr == num_type_instances.end()) continue; + if (itr == num_type_instances.end()) + continue; float num_instances = itr->second; float util = 0.; @@ -358,4 +359,3 @@ static bool try_size_device_grid(const t_arch& arch, return fits_on_device; } - diff --git a/vpr/src/pack/pack.h b/vpr/src/pack/pack.h index 842feb0aacd..f06c7937ba1 100644 --- a/vpr/src/pack/pack.h +++ b/vpr/src/pack/pack.h @@ -19,7 +19,11 @@ bool try_pack(t_packer_opts* packer_opts, float interc_delay, std::vector* lb_type_rr_graphs); -float get_arch_switch_info(short switch_index, int switch_fanin, float& Tdel_switch, float& R_switch, float& Cout_switch); +float get_arch_switch_info(short switch_index, + int switch_fanin, + float& Tdel_switch, + float& R_switch, + float& Cout_switch); std::unordered_set alloc_and_load_is_clock(); diff --git a/vpr/src/pack/pack_report.cpp b/vpr/src/pack/pack_report.cpp index c571a2737d9..52a4c3d1519 100644 --- a/vpr/src/pack/pack_report.cpp +++ b/vpr/src/pack/pack_report.cpp @@ -18,7 +18,8 @@ void report_packing_pin_usage(std::ostream& os, const VprContext& ctx) { std::map total_input_pins; std::map total_output_pins; for (auto const& type : device_ctx.logical_block_types) { - if (is_empty_type(&type)) continue; + if (is_empty_type(&type)) + continue; t_pb_type* pb_type = type.pb_type; @@ -32,7 +33,8 @@ void report_packing_pin_usage(std::ostream& os, const VprContext& ctx) { for (auto blk : cluster_ctx.clb_nlist.blocks()) { t_logical_block_type_ptr type = cluster_ctx.clb_nlist.block_type(blk); - inputs_used[type].push_back(cluster_ctx.clb_nlist.block_input_pins(blk).size() + cluster_ctx.clb_nlist.block_clock_pins(blk).size()); + inputs_used[type].push_back(cluster_ctx.clb_nlist.block_input_pins(blk).size() + + cluster_ctx.clb_nlist.block_clock_pins(blk).size()); outputs_used[type].push_back(cluster_ctx.clb_nlist.block_output_pins(blk).size()); } @@ -42,16 +44,20 @@ void report_packing_pin_usage(std::ostream& os, const VprContext& ctx) { for (auto const& logical_type : device_ctx.logical_block_types) { auto type = &logical_type; - if (is_empty_type(type)) continue; - if (!inputs_used.count(type)) continue; + if (is_empty_type(type)) + continue; + if (!inputs_used.count(type)) + continue; float max_inputs = *std::max_element(inputs_used[type].begin(), inputs_used[type].end()); float min_inputs = *std::min_element(inputs_used[type].begin(), inputs_used[type].end()); - float avg_inputs = std::accumulate(inputs_used[type].begin(), inputs_used[type].end(), 0) / float(inputs_used[type].size()); + float avg_inputs + = std::accumulate(inputs_used[type].begin(), inputs_used[type].end(), 0) / float(inputs_used[type].size()); float max_outputs = *std::max_element(outputs_used[type].begin(), outputs_used[type].end()); float min_outputs = *std::min_element(outputs_used[type].begin(), outputs_used[type].end()); - float avg_outputs = std::accumulate(outputs_used[type].begin(), outputs_used[type].end(), 0) / float(outputs_used[type].size()); + float avg_outputs = std::accumulate(outputs_used[type].begin(), outputs_used[type].end(), 0) + / float(outputs_used[type].size()); os << "Type: " << type->name << "\n"; diff --git a/vpr/src/pack/pack_types.h b/vpr/src/pack/pack_types.h index 3c587bcb464..111e6f98180 100644 --- a/vpr/src/pack/pack_types.h +++ b/vpr/src/pack/pack_types.h @@ -19,14 +19,8 @@ ***************************************************************************/ /* Describes different types of intra-logic cluster_ctx.blocks routing resource nodes */ -enum e_lb_rr_type { - LB_SOURCE = 0, - LB_SINK, - LB_INTERMEDIATE, - NUM_LB_RR_TYPES -}; -const std::vector lb_rr_type_str{ - "LB_SOURCE", "LB_SINK", "LB_INTERMEDIATE", "INVALID"}; +enum e_lb_rr_type { LB_SOURCE = 0, LB_SINK, LB_INTERMEDIATE, NUM_LB_RR_TYPES }; +const std::vector lb_rr_type_str{"LB_SOURCE", "LB_SINK", "LB_INTERMEDIATE", "INVALID"}; /************************************************************************** * Packing Algorithm Data Structures @@ -42,7 +36,8 @@ struct t_pb_stats { * between this atom cluster_ctx.blocks and any atom cluster_ctx.blocks in * the current pb */ std::map connectiongain; /* Weighted sum of connections to attraction function */ - std::map sharinggain; /* How many nets on an atom cluster_ctx.blocks are already in the pb under consideration */ + std::map + sharinggain; /* How many nets on an atom cluster_ctx.blocks are already in the pb under consideration */ /* This is the gain used for hill-climbing. It stores* * the reduction in the number of pins that adding this atom cluster_ctx.blocks to the the* @@ -68,23 +63,29 @@ struct t_pb_stats { int num_child_blocks_in_pb; - AtomNetId tie_break_high_fanout_net; /* If no marked candidate molecules, use - * this high fanout net to determine the - * next candidate atom */ - bool explore_transitive_fanout; /* If no marked candidate molecules and no high fanout nets to determine next candidate molecule then explore molecules on transitive fanout */ - std::map transitive_fanout_candidates; // Holding trasitive fanout candidates key: root block id of the molecule, value: pointer to the molecule + AtomNetId tie_break_high_fanout_net; /* If no marked candidate molecules, use + * this high fanout net to determine the + * next candidate atom */ + bool + explore_transitive_fanout; /* If no marked candidate molecules and no high fanout nets to determine next candidate molecule then explore molecules on transitive fanout */ + std::map + transitive_fanout_candidates; // Holding trasitive fanout candidates key: root block id of the molecule, value: pointer to the molecule /* How many pins of each atom net are contained in the * * currently open pb? */ std::map num_pins_of_net_in_pb; /* Record of pins of class used */ - std::vector> input_pins_used; /* [0..pb_graph_node->num_pin_classes-1] nets using this input pin class */ - std::vector> output_pins_used; /* [0..pb_graph_node->num_pin_classes-1] nets using this output pin class */ + std::vector> + input_pins_used; /* [0..pb_graph_node->num_pin_classes-1] nets using this input pin class */ + std::vector> + output_pins_used; /* [0..pb_graph_node->num_pin_classes-1] nets using this output pin class */ /* Use vector because array size is expected to be small so runtime should be faster using vector than map despite the O(N) vs O(log(n)) behaviour.*/ - std::vector> lookahead_input_pins_used; /* [0..pb_graph_node->num_pin_classes-1] vector of input pins of this class that are speculatively used */ - std::vector> lookahead_output_pins_used; /* [0..pb_graph_node->num_pin_classes-1] vector of input pins of this class that are speculatively used */ + std::vector> + lookahead_input_pins_used; /* [0..pb_graph_node->num_pin_classes-1] vector of input pins of this class that are speculatively used */ + std::vector> + lookahead_output_pins_used; /* [0..pb_graph_node->num_pin_classes-1] vector of input pins of this class that are speculatively used */ //The attraction group associated with the cluster. //Will be AttractGroupId::INVALID() if no attraction group is associated with the cluster. @@ -174,8 +175,8 @@ struct t_lb_trace { /* Represents a net used inside a logic cluster_ctx.blocks and the physical nodes used by the net */ struct t_intra_lb_net { - AtomNetId atom_net_id; /* index of atom net this intra_lb_net represents */ - std::vector terminals; /* endpoints of the intra_lb_net, 0th position is the source, all others are sinks */ + AtomNetId atom_net_id; /* index of atom net this intra_lb_net represents */ + std::vector terminals; /* endpoints of the intra_lb_net, 0th position is the source, all others are sinks */ std::vector atom_pins; /* AtomPin's associated with each terminal */ std::vector fixed_terminals; /* Marks a terminal as having a fixed target (i.e. a pin not a sink) */ t_lb_trace* rt_tree; /* Route tree head */ @@ -238,23 +239,28 @@ struct t_explored_node_tb { /* Stores all data needed by intra-logic cluster_ctx.blocks router */ struct t_lb_router_data { /* Physical Architecture Info */ - std::vector* lb_type_graph; /* Pointer to physical intra-logic cluster_ctx.blocks type rr graph */ + std::vector* + lb_type_graph; /* Pointer to physical intra-logic cluster_ctx.blocks type rr graph */ /* Logical Netlist Info */ - std::vector* intra_lb_nets; /* Pointer to vector of intra logic cluster_ctx.blocks nets and their connections */ + std::vector* + intra_lb_nets; /* Pointer to vector of intra logic cluster_ctx.blocks nets and their connections */ /* Saved nets */ - std::vector* saved_lb_nets; /* Save vector of intra logic cluster_ctx.blocks nets and their connections */ + std::vector* + saved_lb_nets; /* Save vector of intra logic cluster_ctx.blocks nets and their connections */ std::map* atoms_added; /* map that records which atoms are added to cluster router */ /* Logical-to-physical mapping info */ - t_lb_rr_node_stats* lb_rr_node_stats; /* [0..lb_type_graph->size()-1] Stats for each logic cluster_ctx.blocks rr node instance */ - bool is_routed; /* Stores whether or not the current logical-to-physical mapping has a routed solution */ + t_lb_rr_node_stats* + lb_rr_node_stats; /* [0..lb_type_graph->size()-1] Stats for each logic cluster_ctx.blocks rr node instance */ + bool is_routed; /* Stores whether or not the current logical-to-physical mapping has a routed solution */ /* Stores state info during Pathfinder iterative routing */ - t_explored_node_tb* explored_node_tb; /* [0..lb_type_graph->size()-1] Stores mode exploration and lb_traceback info for nodes */ - int explore_id_index; /* used in conjunction with node_traceback to determine whether or not a location has been explored. By using a unique identifier every route, I don't have to clear the previous route exploration */ + t_explored_node_tb* + explored_node_tb; /* [0..lb_type_graph->size()-1] Stores mode exploration and lb_traceback info for nodes */ + int explore_id_index; /* used in conjunction with node_traceback to determine whether or not a location has been explored. By using a unique identifier every route, I don't have to clear the previous route exploration */ /* Current type */ t_logical_block_type_ptr lb_type; @@ -291,9 +297,7 @@ struct t_mode_selection_status { bool try_expand_all_modes = false; bool expand_all_modes = false; - bool is_mode_issue() { - return is_mode_conflict || try_expand_all_modes; - } + bool is_mode_issue() { return is_mode_conflict || try_expand_all_modes; } }; #endif diff --git a/vpr/src/pack/pb_type_graph.cpp b/vpr/src/pack/pb_type_graph.cpp index 3b7c272cfc4..3a382e6b48b 100644 --- a/vpr/src/pack/pb_type_graph.cpp +++ b/vpr/src/pack/pb_type_graph.cpp @@ -87,9 +87,7 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, int* num_pins, t_pb_graph_pin*** pb_graph_pins); -static t_pb_graph_pin* get_pb_graph_pin_from_name(const char* port_name, - const t_pb_graph_node* pb, - const int pin); +static t_pb_graph_pin* get_pb_graph_pin_from_name(const char* port_name, const t_pb_graph_node* pb, const int pin); static void alloc_and_load_complete_interc_edges(t_interconnect* interconnect, t_pb_graph_pin*** input_pb_graph_node_pin_ptrs, @@ -129,17 +127,14 @@ static void alloc_and_load_interconnect_pins(t_interconnect_pins* interc_pins, static void check_pb_node_rec(const t_pb_graph_node* pb_graph_node); static void check_repeated_edges_at_pb_pin(t_pb_graph_pin* cur_pin); -static bool operator<(const t_pb_graph_edge_comparator& edge1, - const t_pb_graph_edge_comparator& edge2); +static bool operator<(const t_pb_graph_edge_comparator& edge1, const t_pb_graph_edge_comparator& edge2); static bool check_input_pins_equivalence(const t_pb_graph_pin* cur_pin, const int i_pin, std::map& edges_map, int* line_num); /* computes the index of a pb graph node at its level of the pb hierarchy */ -static int compute_flat_index_for_child_node(int num_children_of_type, - int parent_flat_index, - int child_index); +static int compute_flat_index_for_child_node(int num_children_of_type, int parent_flat_index, int child_index); /** * Allocate memory into types and load the pb graph with interconnect edges @@ -155,14 +150,8 @@ void alloc_and_load_all_pb_graphs(bool load_power_structures, bool is_flat) { type.pb_graph_head = new t_pb_graph_node(); int pin_count_in_cluster = 0; int primitive_num = 0; - alloc_and_load_pb_graph(type.pb_graph_head, - nullptr, - type.pb_type, - 0, - 0, - load_power_structures, - pin_count_in_cluster, - primitive_num); + alloc_and_load_pb_graph(type.pb_graph_head, nullptr, type.pb_type, 0, 0, load_power_structures, + pin_count_in_cluster, primitive_num); type.pb_graph_head->total_pb_pins = pin_count_in_cluster; load_pin_classes_in_pb_graph_head(type.pb_graph_head); if (is_flat) { @@ -361,24 +350,21 @@ static void alloc_and_load_pb_graph(t_pb_graph_node* pb_graph_node, /* Allocate and load child nodes for each mode and create interconnect in each mode */ - pb_graph_node->child_pb_graph_nodes = (t_pb_graph_node***)vtr::calloc(pb_type->num_modes, sizeof(t_pb_graph_node**)); + pb_graph_node->child_pb_graph_nodes + = (t_pb_graph_node***)vtr::calloc(pb_type->num_modes, sizeof(t_pb_graph_node**)); for (i = 0; i < pb_type->num_modes; i++) { - pb_graph_node->child_pb_graph_nodes[i] = (t_pb_graph_node**)vtr::calloc(pb_type->modes[i].num_pb_type_children, - sizeof(t_pb_graph_node*)); + pb_graph_node->child_pb_graph_nodes[i] + = (t_pb_graph_node**)vtr::calloc(pb_type->modes[i].num_pb_type_children, sizeof(t_pb_graph_node*)); for (j = 0; j < pb_type->modes[i].num_pb_type_children; j++) { - pb_graph_node->child_pb_graph_nodes[i][j] = (t_pb_graph_node*)vtr::calloc(pb_type->modes[i].pb_type_children[j].num_pb, sizeof(t_pb_graph_node)); + pb_graph_node->child_pb_graph_nodes[i][j] + = (t_pb_graph_node*)vtr::calloc(pb_type->modes[i].pb_type_children[j].num_pb, sizeof(t_pb_graph_node)); int num_children_of_type = pb_type->modes[i].pb_type_children[j].num_pb; for (k = 0; k < num_children_of_type; k++) { int child_flat_index = compute_flat_index_for_child_node(num_children_of_type, flat_index, k); - alloc_and_load_pb_graph(&pb_graph_node->child_pb_graph_nodes[i][j][k], - pb_graph_node, - &pb_type->modes[i].pb_type_children[j], - k, - child_flat_index, - load_power_structures, - pin_count_in_cluster, - primitive_num); + alloc_and_load_pb_graph(&pb_graph_node->child_pb_graph_nodes[i][j][k], pb_graph_node, + &pb_type->modes[i].pb_type_children[j], k, child_flat_index, + load_power_structures, pin_count_in_cluster, primitive_num); } } } @@ -388,13 +374,10 @@ static void alloc_and_load_pb_graph(t_pb_graph_node* pb_graph_node, for (i = 0; i < pb_type->num_modes; i++) { pb_graph_node->interconnect_pins[i] = nullptr; /* Create interconnect for mode */ - alloc_and_load_mode_interconnect(pb_graph_node, - pb_graph_node->child_pb_graph_nodes[i], - &pb_type->modes[i], + alloc_and_load_mode_interconnect(pb_graph_node, pb_graph_node->child_pb_graph_nodes[i], &pb_type->modes[i], load_power_structures); } - // update the total number of primitives of that type if (pb_graph_node->is_primitive()) { int total_count = 1; @@ -422,9 +405,15 @@ static void alloc_and_load_pb_graph_pin_sinks(t_pb_graph_node* pb_graph_node) { store_pin_sinks_edge_id(curr_pb_graph_node); for (int mode_num = 0; mode_num < curr_pb_graph_node->pb_type->num_modes; mode_num++) { - for (int child_pb_type_num = 0; child_pb_type_num < curr_pb_graph_node->pb_type->modes[mode_num].num_pb_type_children; child_pb_type_num++) { - for (int child_pb_num = 0; child_pb_num < curr_pb_graph_node->pb_type->modes[mode_num].pb_type_children[child_pb_type_num].num_pb; child_pb_num++) { - pb_graph_node_list.push_back(&curr_pb_graph_node->child_pb_graph_nodes[mode_num][child_pb_type_num][child_pb_num]); + for (int child_pb_type_num = 0; + child_pb_type_num < curr_pb_graph_node->pb_type->modes[mode_num].num_pb_type_children; + child_pb_type_num++) { + for (int child_pb_num = 0; + child_pb_num + < curr_pb_graph_node->pb_type->modes[mode_num].pb_type_children[child_pb_type_num].num_pb; + child_pb_num++) { + pb_graph_node_list.push_back( + &curr_pb_graph_node->child_pb_graph_nodes[mode_num][child_pb_type_num][child_pb_num]); } } } @@ -490,7 +479,8 @@ static void set_pins_logical_num(t_logical_block_type* logical_block) { for (int pb_type_idx = 0; pb_type_idx < curr_mode->num_pb_type_children; pb_type_idx++) { int num_pb = curr_mode->pb_type_children[pb_type_idx].num_pb; for (int pb_idx = 0; pb_idx < num_pb; pb_idx++) { - auto child_pb_graph_node = &(curr_pb_graph_node->child_pb_graph_nodes[mode_idx][pb_type_idx][pb_idx]); + auto child_pb_graph_node + = &(curr_pb_graph_node->child_pb_graph_nodes[mode_idx][pb_type_idx][pb_idx]); pb_graph_node_to_set_pin_index_q.push(child_pb_graph_node); } } @@ -519,7 +509,8 @@ static std::vector get_primitive_pb_graph_nodes(t_logica int num_pb = pb_type->modes[mode_idx].pb_type_children[pb_type_idx].num_pb; /* Iterating over blocks of the given type and mode */ for (int pb_idx = 0; pb_idx < num_pb; pb_idx++) { - const t_pb_graph_node* child_pb_graph_node = &(pb_graph_node->child_pb_graph_nodes[mode_idx][pb_type_idx][pb_idx]); + const t_pb_graph_node* child_pb_graph_node + = &(pb_graph_node->child_pb_graph_nodes[mode_idx][pb_type_idx][pb_idx]); /* Add the child pb_pb_graph_node to the queue, so that this block and its children get added pb_graph_nodes later */ pb_graph_node_q.push_back(child_pb_graph_node); } @@ -560,8 +551,8 @@ static void add_primitive_logical_classes(t_logical_block_type* logical_block) { } num_added_classes += add_port_logical_classes(logical_block, pb_graph_pins, num_ports, num_pins); } - logical_block->primitive_pb_graph_node_class_range.insert(std::make_pair(pb_graph_node, t_class_range(first_class_num, - first_class_num + num_added_classes - 1))); + logical_block->primitive_pb_graph_node_class_range.insert( + std::make_pair(pb_graph_node, t_class_range(first_class_num, first_class_num + num_added_classes - 1))); } } @@ -592,7 +583,8 @@ static int add_port_logical_classes(t_logical_block_type* logical_block, for (int pin_idx = 0; pin_idx < num_pins[port_idx]; pin_idx++) { auto pb_graph_pin = &(pb_graph_pins[port_idx][pin_idx]); class_inf.pinlist.push_back(pb_graph_pin->pin_count_in_cluster); - logical_block->primitive_pb_pin_to_logical_class_num_mapping.insert(std::make_pair(pb_graph_pin, class_num)); + logical_block->primitive_pb_pin_to_logical_class_num_mapping.insert( + std::make_pair(pb_graph_pin, class_num)); } primitive_logical_class_inf.push_back(class_inf); num_added_classes++; @@ -612,7 +604,8 @@ static int add_port_logical_classes(t_logical_block_type* logical_block, auto pb_graph_pin = &(pb_graph_pins[port_idx][pin_idx]); class_inf.pinlist.push_back(pb_graph_pin->pin_count_in_cluster); - logical_block->primitive_pb_pin_to_logical_class_num_mapping.insert(std::make_pair(pb_graph_pin, class_num)); + logical_block->primitive_pb_pin_to_logical_class_num_mapping.insert( + std::make_pair(pb_graph_pin, class_num)); primitive_logical_class_inf.push_back(class_inf); num_added_classes++; } @@ -696,7 +689,8 @@ static void alloc_and_load_interconnect_pins(t_interconnect_pins* interc_pins, interc_pins->input_pins = new t_pb_graph_pin**[num_input_sets]; for (set_idx = 0; set_idx < num_input_sets; set_idx++) { - interc_pins->input_pins[set_idx] = new t_pb_graph_pin*[interconnect->interconnect_power->num_pins_per_port]; + interc_pins->input_pins[set_idx] + = new t_pb_graph_pin*[interconnect->interconnect_power->num_pins_per_port]; } interc_pins->output_pins = new t_pb_graph_pin**[1]; @@ -747,7 +741,8 @@ static void alloc_and_load_interconnect_pins(t_interconnect_pins* interc_pins, /* Input Pins */ interc_pins->input_pins = new t_pb_graph_pin**[interconnect->interconnect_power->num_input_ports]; for (port_idx = 0; port_idx < interconnect->interconnect_power->num_input_ports; port_idx++) { - interc_pins->input_pins[port_idx] = new t_pb_graph_pin*[interconnect->interconnect_power->num_pins_per_port]; + interc_pins->input_pins[port_idx] + = new t_pb_graph_pin*[interconnect->interconnect_power->num_pins_per_port]; } num_ports = 0; for (set_idx = 0; set_idx < num_input_sets; set_idx++) { @@ -759,7 +754,8 @@ static void alloc_and_load_interconnect_pins(t_interconnect_pins* interc_pins, /* Output Pins */ interc_pins->output_pins = new t_pb_graph_pin**[interconnect->interconnect_power->num_output_ports]; for (port_idx = 0; port_idx < interconnect->interconnect_power->num_output_ports; port_idx++) { - interc_pins->output_pins[port_idx] = new t_pb_graph_pin*[interconnect->interconnect_power->num_pins_per_port]; + interc_pins->output_pins[port_idx] + = new t_pb_graph_pin*[interconnect->interconnect_power->num_pins_per_port]; } num_ports = 0; for (set_idx = 0; set_idx < num_output_sets; set_idx++) { @@ -788,7 +784,8 @@ static void alloc_and_load_mode_interconnect(t_pb_graph_node* pb_graph_parent_no int *num_input_pb_graph_node_pins, *num_output_pb_graph_node_pins; /* number of pins in a set [0..num_sets-1] */ int num_input_pb_graph_node_sets, num_output_pb_graph_node_sets; /* Points to pins specified in the port string, later used to insert edges */ - t_pb_graph_pin ***input_pb_graph_node_pins, ***output_pb_graph_node_pins; /* [0..num_sets_in_port - 1][0..num_ptrs - 1] */ + t_pb_graph_pin ***input_pb_graph_node_pins, + ***output_pb_graph_node_pins; /* [0..num_sets_in_port - 1][0..num_ptrs - 1] */ if (load_power_structures) { VTR_ASSERT(pb_graph_parent_node->interconnect_pins[mode->index] == nullptr); @@ -801,48 +798,44 @@ static void alloc_and_load_mode_interconnect(t_pb_graph_node* pb_graph_parent_no for (i = 0; i < mode->num_interconnect; i++) { /* determine the interconnect input and output pins */ - input_pb_graph_node_pins = alloc_and_load_port_pin_ptrs_from_string(mode->interconnect[i].line_num, pb_graph_parent_node, - pb_graph_children_nodes, mode->interconnect[i].input_string, - &num_input_pb_graph_node_pins, &num_input_pb_graph_node_sets, - true, true); + input_pb_graph_node_pins = alloc_and_load_port_pin_ptrs_from_string( + mode->interconnect[i].line_num, pb_graph_parent_node, pb_graph_children_nodes, + mode->interconnect[i].input_string, &num_input_pb_graph_node_pins, &num_input_pb_graph_node_sets, true, + true); - output_pb_graph_node_pins = alloc_and_load_port_pin_ptrs_from_string(mode->interconnect[i].line_num, pb_graph_parent_node, - pb_graph_children_nodes, mode->interconnect[i].output_string, - &num_output_pb_graph_node_pins, &num_output_pb_graph_node_sets, - false, true); + output_pb_graph_node_pins = alloc_and_load_port_pin_ptrs_from_string( + mode->interconnect[i].line_num, pb_graph_parent_node, pb_graph_children_nodes, + mode->interconnect[i].output_string, &num_output_pb_graph_node_pins, &num_output_pb_graph_node_sets, false, + true); if (load_power_structures) { - alloc_and_load_interconnect_pins(&pb_graph_parent_node->interconnect_pins[mode->index][i], - &mode->interconnect[i], input_pb_graph_node_pins, - num_input_pb_graph_node_sets, num_input_pb_graph_node_pins, - output_pb_graph_node_pins, num_output_pb_graph_node_sets, - num_output_pb_graph_node_pins); + alloc_and_load_interconnect_pins( + &pb_graph_parent_node->interconnect_pins[mode->index][i], &mode->interconnect[i], + input_pb_graph_node_pins, num_input_pb_graph_node_sets, num_input_pb_graph_node_pins, + output_pb_graph_node_pins, num_output_pb_graph_node_sets, num_output_pb_graph_node_pins); } /* process the interconnect based on its type */ switch (mode->interconnect[i].type) { case COMPLETE_INTERC: - alloc_and_load_complete_interc_edges(&mode->interconnect[i], - input_pb_graph_node_pins, num_input_pb_graph_node_sets, - num_input_pb_graph_node_pins, output_pb_graph_node_pins, - num_output_pb_graph_node_sets, + alloc_and_load_complete_interc_edges(&mode->interconnect[i], input_pb_graph_node_pins, + num_input_pb_graph_node_sets, num_input_pb_graph_node_pins, + output_pb_graph_node_pins, num_output_pb_graph_node_sets, num_output_pb_graph_node_pins); break; case DIRECT_INTERC: - alloc_and_load_direct_interc_edges(&mode->interconnect[i], - input_pb_graph_node_pins, num_input_pb_graph_node_sets, - num_input_pb_graph_node_pins, output_pb_graph_node_pins, - num_output_pb_graph_node_sets, + alloc_and_load_direct_interc_edges(&mode->interconnect[i], input_pb_graph_node_pins, + num_input_pb_graph_node_sets, num_input_pb_graph_node_pins, + output_pb_graph_node_pins, num_output_pb_graph_node_sets, num_output_pb_graph_node_pins); break; case MUX_INTERC: - alloc_and_load_mux_interc_edges(&mode->interconnect[i], - input_pb_graph_node_pins, num_input_pb_graph_node_sets, - num_input_pb_graph_node_pins, output_pb_graph_node_pins, - num_output_pb_graph_node_sets, + alloc_and_load_mux_interc_edges(&mode->interconnect[i], input_pb_graph_node_pins, + num_input_pb_graph_node_sets, num_input_pb_graph_node_pins, + output_pb_graph_node_pins, num_output_pb_graph_node_sets, num_output_pb_graph_node_pins); break; @@ -850,9 +843,8 @@ static void alloc_and_load_mode_interconnect(t_pb_graph_node* pb_graph_parent_no default: vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), mode->interconnect[i].line_num, "Unknown interconnect %d for mode %s in pb_type %s, input %s, output %s\n", - mode->interconnect[i].type, mode->name, - pb_graph_parent_node->pb_type->name, mode->interconnect[i].input_string, - mode->interconnect[i].output_string); + mode->interconnect[i].type, mode->name, pb_graph_parent_node->pb_type->name, + mode->interconnect[i].input_string, mode->interconnect[i].output_string); } for (j = 0; j < num_input_pb_graph_node_sets; j++) { delete[] input_pb_graph_node_pins[j]; @@ -900,7 +892,8 @@ static void store_pin_sinks_edge_id(t_pb_graph_node* pb_graph_node) { for (int edge_idx = 0; edge_idx < pb_pin.num_output_edges; ++edge_idx) { auto& output_edge = pb_pin.output_edges[edge_idx]; int num_edge_output_pin = output_edge->num_output_pins; - for (int edge_output_pin_idx = 0; edge_output_pin_idx < num_edge_output_pin; ++edge_output_pin_idx) { + for (int edge_output_pin_idx = 0; edge_output_pin_idx < num_edge_output_pin; + ++edge_output_pin_idx) { t_pb_graph_pin* edge_output_pin = output_edge->output_pins[edge_output_pin_idx]; pb_pin.sink_pin_edge_idx_map.insert(std::make_pair(edge_output_pin, edge_idx)); } @@ -939,14 +932,13 @@ t_pb_graph_pin*** alloc_and_load_port_pin_ptrs_from_string(const int line_num, VTR_ASSERT(tokens[i].type != TOKEN_NULL); if (tokens[i].type == TOKEN_OPEN_SQUIG_BRACKET) { if (in_squig_bracket) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "{ inside { in port %s\n", port_string); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "{ inside { in port %s\n", port_string); } in_squig_bracket = true; } else if (tokens[i].type == TOKEN_CLOSE_SQUIG_BRACKET) { if (!in_squig_bracket) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "No matching '{' for '}' in port %s\n", port_string); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "No matching '{' for '}' in port %s\n", + port_string); } (*num_sets)++; in_squig_bracket = false; @@ -959,8 +951,7 @@ t_pb_graph_pin*** alloc_and_load_port_pin_ptrs_from_string(const int line_num, if (in_squig_bracket) { (*num_sets)++; - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "No matching '{' for '}' in port %s\n", port_string); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "No matching '{' for '}' in port %s\n", port_string); } pb_graph_pins = new t_pb_graph_pin**[*num_sets]; @@ -975,27 +966,25 @@ t_pb_graph_pin*** alloc_and_load_port_pin_ptrs_from_string(const int line_num, VTR_ASSERT(tokens[i].type != TOKEN_NULL); if (tokens[i].type == TOKEN_OPEN_SQUIG_BRACKET) { if (in_squig_bracket) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "{ inside { in port %s\n", port_string); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "{ inside { in port %s\n", port_string); } in_squig_bracket = true; } else if (tokens[i].type == TOKEN_CLOSE_SQUIG_BRACKET) { if ((*num_ptrs)[curr_set] == 0) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "No data contained in {} in port %s\n", port_string); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "No data contained in {} in port %s\n", + port_string); } if (!in_squig_bracket) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "No matching '{' for '}' in port %s\n", port_string); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "No matching '{' for '}' in port %s\n", + port_string); } curr_set++; in_squig_bracket = false; } else if (tokens[i].type == TOKEN_STRING) { try { - success = realloc_and_load_pb_graph_pin_ptrs_at_var(line_num, - pb_graph_parent_node, pb_graph_children_nodes, - interconnect_error_check, is_input_to_interc, tokens, &i, - &((*num_ptrs)[curr_set]), &pb_graph_pins[curr_set]); + success = realloc_and_load_pb_graph_pin_ptrs_at_var( + line_num, pb_graph_parent_node, pb_graph_children_nodes, interconnect_error_check, + is_input_to_interc, tokens, &i, &((*num_ptrs)[curr_set]), &pb_graph_pins[curr_set]); } catch (VprError& e) { vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Syntax error processing port string '%s' (%s)\n", port_string, e.what()); @@ -1054,13 +1043,15 @@ static void alloc_and_load_complete_interc_edges(t_interconnect* interconnect, for (i_inset = 0; i_inset < num_input_sets; i_inset++) { for (i_inpin = 0; i_inpin < num_input_ptrs[i_inset]; i_inpin++) { - input_pb_graph_node_pin_ptrs[i_inset][i_inpin]->output_edges.resize(input_pb_graph_node_pin_ptrs[i_inset][i_inpin]->num_output_edges + out_count); + input_pb_graph_node_pin_ptrs[i_inset][i_inpin]->output_edges.resize( + input_pb_graph_node_pin_ptrs[i_inset][i_inpin]->num_output_edges + out_count); } } for (i_outset = 0; i_outset < num_output_sets; i_outset++) { for (i_outpin = 0; i_outpin < num_output_ptrs[i_outset]; i_outpin++) { - output_pb_graph_node_pin_ptrs[i_outset][i_outpin]->input_edges.resize(output_pb_graph_node_pin_ptrs[i_outset][i_outpin]->num_input_edges + in_count); + output_pb_graph_node_pin_ptrs[i_outset][i_outpin]->input_edges.resize( + output_pb_graph_node_pin_ptrs[i_outset][i_outpin]->num_input_edges + in_count); } } @@ -1202,8 +1193,7 @@ static void alloc_and_load_mux_interc_edges(t_interconnect* interconnect, /* Allocate memory for edges, and reallocate more memory for pins connecting to those edges */ if (num_output_sets != 1) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), interconnect->line_num, - "Mux must have one output\n"); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), interconnect->line_num, "Mux must have one output\n"); } edges = new t_pb_graph_edge[num_input_sets]; @@ -1220,13 +1210,14 @@ static void alloc_and_load_mux_interc_edges(t_interconnect* interconnect, for (i_inset = 0; i_inset < num_input_sets; i_inset++) { for (i_inpin = 0; i_inpin < num_input_ptrs[i_inset]; i_inpin++) { - input_pb_graph_node_pin_ptrs[i_inset][i_inpin]->output_edges.resize(input_pb_graph_node_pin_ptrs[i_inset][i_inpin]->num_output_edges + 1); + input_pb_graph_node_pin_ptrs[i_inset][i_inpin]->output_edges.resize( + input_pb_graph_node_pin_ptrs[i_inset][i_inpin]->num_output_edges + 1); } } for (i_outpin = 0; i_outpin < num_output_ptrs[0]; i_outpin++) { - output_pb_graph_node_pin_ptrs[0][i_outpin]->input_edges.resize(output_pb_graph_node_pin_ptrs[0][i_outpin]->num_input_edges - + num_input_sets); + output_pb_graph_node_pin_ptrs[0][i_outpin]->input_edges.resize( + output_pb_graph_node_pin_ptrs[0][i_outpin]->num_input_edges + num_input_sets); } /* Load connections between pins and record these updates in the edges */ @@ -1321,8 +1312,7 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, VTR_ASSERT_MSG(pb_msb >= 0, "Pin most-significant-bit must be non-negative"); (*token_index)++; if (!checkTokenType(tokens[*token_index], TOKEN_COLON)) { - if (!checkTokenType(tokens[*token_index], - TOKEN_CLOSE_SQUARE_BRACKET)) { + if (!checkTokenType(tokens[*token_index], TOKEN_CLOSE_SQUARE_BRACKET)) { return false; //clb[9abc } pb_lsb = pb_msb; @@ -1335,23 +1325,21 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, pb_lsb = vtr::atoi(tokens[*token_index].data); VTR_ASSERT_MSG(pb_lsb >= 0, "Pin most-significant-bit must be non-negative"); (*token_index)++; - if (!checkTokenType(tokens[*token_index], - TOKEN_CLOSE_SQUARE_BRACKET)) { + if (!checkTokenType(tokens[*token_index], TOKEN_CLOSE_SQUARE_BRACKET)) { return false; //clb[9:0abc } (*token_index)++; } /* Check to make sure indices from user match internal data structures for the indices of the parent */ - if ((pb_lsb != pb_msb) - && (pb_lsb != pb_graph_parent_node->placement_index)) { + if ((pb_lsb != pb_msb) && (pb_lsb != pb_graph_parent_node->placement_index)) { vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Incorrect placement index for %s, expected index %d", tokens[0].data, pb_graph_parent_node->placement_index); } if ((pb_lsb != pb_msb)) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Cannot specify range for a parent pb: '%s'", tokens[0].data); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Cannot specify range for a parent pb: '%s'", + tokens[0].data); } pb_lsb = pb_msb = 0; /* Internal representation of parent is always 0 */ @@ -1376,8 +1364,7 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, VTR_ASSERT_MSG(pb_msb >= 0, "Pin most-significant-bit must be non-negative"); (*token_index)++; if (!checkTokenType(tokens[*token_index], TOKEN_COLON)) { - if (!checkTokenType(tokens[*token_index], - TOKEN_CLOSE_SQUARE_BRACKET)) { + if (!checkTokenType(tokens[*token_index], TOKEN_CLOSE_SQUARE_BRACKET)) { return false; } pb_lsb = pb_msb; @@ -1390,8 +1377,7 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, pb_lsb = vtr::atoi(tokens[*token_index].data); VTR_ASSERT_MSG(pb_lsb >= 0, "Pin most-significant-bit must be non-negative"); (*token_index)++; - if (!checkTokenType(tokens[*token_index], - TOKEN_CLOSE_SQUARE_BRACKET)) { + if (!checkTokenType(tokens[*token_index], TOKEN_CLOSE_SQUARE_BRACKET)) { return false; } (*token_index)++; @@ -1410,15 +1396,14 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, } } } else { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Parent pb node '%s' missing", pb_graph_parent_node->pb_type->name); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Parent pb node '%s' missing", + pb_graph_parent_node->pb_type->name); } } if (!found) { vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Unknown pb_type name %s, not defined in namespace of mode %s", - pb_name, mode->name); + "Unknown pb_type name %s, not defined in namespace of mode %s", pb_name, mode->name); } found = false; @@ -1438,11 +1423,8 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, port_name = tokens[*token_index].data; (*token_index)++; - if (get_pb_graph_pin_from_name(port_name, &pb_node_array[pb_lsb], - 0) - == nullptr) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Failed to find port name %s", port_name); + if (get_pb_graph_pin_from_name(port_name, &pb_node_array[pb_lsb], 0) == nullptr) { + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Failed to find port name %s", port_name); } if (tokens[*token_index].type == TOKEN_OPEN_SQUARE_BRACKET) { @@ -1454,8 +1436,7 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, VTR_ASSERT_MSG(pin_msb >= 0, "Pin most-significant-bit must be non-negative"); (*token_index)++; if (!checkTokenType(tokens[*token_index], TOKEN_COLON)) { - if (!checkTokenType(tokens[*token_index], - TOKEN_CLOSE_SQUARE_BRACKET)) { + if (!checkTokenType(tokens[*token_index], TOKEN_CLOSE_SQUARE_BRACKET)) { return false; } pin_lsb = pin_msb; @@ -1468,8 +1449,7 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, pin_lsb = vtr::atoi(tokens[*token_index].data); VTR_ASSERT_MSG(pin_lsb >= 0, "Pin most-significant-bit must be non-negative"); (*token_index)++; - if (!checkTokenType(tokens[*token_index], - TOKEN_CLOSE_SQUARE_BRACKET)) { + if (!checkTokenType(tokens[*token_index], TOKEN_CLOSE_SQUARE_BRACKET)) { return false; } (*token_index)++; @@ -1517,8 +1497,7 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, int idx = prev_num_pins + i * (abs(pin_msb - pin_lsb) + 1) + j; (*pb_graph_pins)[idx] = get_pb_graph_pin_from_name(port_name, &pb_node_array[ipb], ipin); if ((*pb_graph_pins)[idx] == nullptr) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Pin %s.%s[%d] cannot be found", + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Pin %s.%s[%d] cannot be found", pb_node_array[ipb].pb_type->name, port_name, ipin); } iport = (*pb_graph_pins)[idx]->port; @@ -1569,9 +1548,7 @@ static bool realloc_and_load_pb_graph_pin_ptrs_at_var(const int line_num, return true; } -static t_pb_graph_pin* get_pb_graph_pin_from_name(const char* port_name, - const t_pb_graph_node* pb, - const int pin) { +static t_pb_graph_pin* get_pb_graph_pin_from_name(const char* port_name, const t_pb_graph_node* pb, const int pin) { int i; for (i = 0; i < pb->num_input_ports; i++) { @@ -1608,42 +1585,32 @@ static void echo_pb_rec(const t_pb_graph_node* pb_graph_node, const int level, F int i, j, k; print_tabs(fp, level); - fprintf(fp, "Physical Block: type \"%s\" index %d num_children %d\n", - pb_graph_node->pb_type->name, pb_graph_node->placement_index, - pb_graph_node->pb_type->num_pb); + fprintf(fp, "Physical Block: type \"%s\" index %d num_children %d\n", pb_graph_node->pb_type->name, + pb_graph_node->placement_index, pb_graph_node->pb_type->num_pb); if (pb_graph_node->parent_pb_graph_node) { print_tabs(fp, level + 1); - fprintf(fp, "Parent Block: type \"%s\" index %d \n", - pb_graph_node->parent_pb_graph_node->pb_type->name, + fprintf(fp, "Parent Block: type \"%s\" index %d \n", pb_graph_node->parent_pb_graph_node->pb_type->name, pb_graph_node->parent_pb_graph_node->placement_index); } print_tabs(fp, level); - fprintf(fp, "Input Ports: total ports %d\n", - pb_graph_node->num_input_ports); - echo_pb_pins(pb_graph_node->input_pins, pb_graph_node->num_input_ports, - level, fp); + fprintf(fp, "Input Ports: total ports %d\n", pb_graph_node->num_input_ports); + echo_pb_pins(pb_graph_node->input_pins, pb_graph_node->num_input_ports, level, fp); print_tabs(fp, level); - fprintf(fp, "Output Ports: total ports %d\n", - pb_graph_node->num_output_ports); - echo_pb_pins(pb_graph_node->output_pins, pb_graph_node->num_output_ports, - level, fp); + fprintf(fp, "Output Ports: total ports %d\n", pb_graph_node->num_output_ports); + echo_pb_pins(pb_graph_node->output_pins, pb_graph_node->num_output_ports, level, fp); print_tabs(fp, level); - fprintf(fp, "Clock Ports: total ports %d\n", - pb_graph_node->num_clock_ports); - echo_pb_pins(pb_graph_node->clock_pins, pb_graph_node->num_clock_ports, - level, fp); + fprintf(fp, "Clock Ports: total ports %d\n", pb_graph_node->num_clock_ports); + echo_pb_pins(pb_graph_node->clock_pins, pb_graph_node->num_clock_ports, level, fp); print_tabs(fp, level); for (i = 0; i < pb_graph_node->num_input_pin_class; i++) { - fprintf(fp, "Input class %d: %d pins, ", i, - pb_graph_node->input_pin_class_size[i]); + fprintf(fp, "Input class %d: %d pins, ", i, pb_graph_node->input_pin_class_size[i]); } fprintf(fp, "\n"); print_tabs(fp, level); for (i = 0; i < pb_graph_node->num_output_pin_class; i++) { - fprintf(fp, "Output class %d: %d pins, ", i, - pb_graph_node->output_pin_class_size[i]); + fprintf(fp, "Output class %d: %d pins, ", i, pb_graph_node->output_pin_class_size[i]); } fprintf(fp, "\n"); @@ -1654,8 +1621,7 @@ static void echo_pb_rec(const t_pb_graph_node* pb_graph_node, const int level, F for (i = 0; i < pb_graph_node->pb_type->num_modes; i++) { for (j = 0; j < pb_graph_node->pb_type->modes[i].num_pb_type_children; j++) { for (k = 0; k < pb_graph_node->pb_type->modes[i].pb_type_children[j].num_pb; k++) { - echo_pb_rec(&pb_graph_node->child_pb_graph_nodes[i][j][k], - level + 1, fp); + echo_pb_rec(&pb_graph_node->child_pb_graph_nodes[i][j][k], level + 1, fp); } } } @@ -1670,40 +1636,40 @@ static void echo_pb_pins(t_pb_graph_pin** pb_graph_pins, const int num_ports, co for (i = 0; i < num_ports; i++) { port = pb_graph_pins[i][0].port; print_tabs(fp, level); - fprintf(fp, "Port \"%s\": num_pins %d type %d parent name \"%s\"\n", - port->name, port->num_pins, port->type, + fprintf(fp, "Port \"%s\": num_pins %d type %d parent name \"%s\"\n", port->name, port->num_pins, port->type, port->parent_pb_type->name); for (j = 0; j < port->num_pins; j++) { print_tabs(fp, level + 1); VTR_ASSERT(j == pb_graph_pins[i][j].pin_number); VTR_ASSERT(pb_graph_pins[i][j].port == port); - fprintf(fp, - "Pin %d port name \"%s\" num input edges %d num output edges %d parent type \"%s\" parent index %d\n", - pb_graph_pins[i][j].pin_number, - pb_graph_pins[i][j].port->name, - pb_graph_pins[i][j].num_input_edges, - pb_graph_pins[i][j].num_output_edges, - pb_graph_pins[i][j].parent_node->pb_type->name, - pb_graph_pins[i][j].parent_node->placement_index); + fprintf( + fp, + "Pin %d port name \"%s\" num input edges %d num output edges %d parent type \"%s\" parent index %d\n", + pb_graph_pins[i][j].pin_number, pb_graph_pins[i][j].port->name, pb_graph_pins[i][j].num_input_edges, + pb_graph_pins[i][j].num_output_edges, pb_graph_pins[i][j].parent_node->pb_type->name, + pb_graph_pins[i][j].parent_node->placement_index); print_tabs(fp, level + 2); if (pb_graph_pins[i][j].is_primitive_pin()) { fprintf(fp, "pin class (depth, pin class): "); for (k = 0; k < pb_graph_pins[i][j].parent_node->pb_type->depth; k++) { - fprintf(fp, "(%d %d), ", k, - pb_graph_pins[i][j].parent_pin_class[k]); + fprintf(fp, "(%d %d), ", k, pb_graph_pins[i][j].parent_pin_class[k]); } fprintf(fp, "\n"); if (pb_graph_pins[i][j].port->type == OUT_PORT) { for (k = 0; k < pb_graph_pins[i][j].parent_node->pb_type->depth; k++) { print_tabs(fp, level + 2); - fprintf(fp, "connectable input pins within depth %d: %d\n", - k, pb_graph_pins[i][j].num_connectable_primitive_input_pins[k]); + fprintf(fp, "connectable input pins within depth %d: %d\n", k, + pb_graph_pins[i][j].num_connectable_primitive_input_pins[k]); for (m = 0; m < pb_graph_pins[i][j].num_connectable_primitive_input_pins[k]; m++) { print_tabs(fp, level + 3); fprintf(fp, "pb_graph_node %s[%d].%s[%d] \n", - pb_graph_pins[i][j].list_of_connectable_input_pin_ptrs[k][m]->parent_node->pb_type->name, - pb_graph_pins[i][j].list_of_connectable_input_pin_ptrs[k][m]->parent_node->placement_index, + pb_graph_pins[i][j] + .list_of_connectable_input_pin_ptrs[k][m] + ->parent_node->pb_type->name, + pb_graph_pins[i][j] + .list_of_connectable_input_pin_ptrs[k][m] + ->parent_node->placement_index, pb_graph_pins[i][j].list_of_connectable_input_pin_ptrs[k][m]->port->name, pb_graph_pins[i][j].list_of_connectable_input_pin_ptrs[k][m]->pin_number); } @@ -1729,8 +1695,7 @@ static void echo_pb_pins(t_pb_graph_pin** pb_graph_pins, const int num_ports, co fprintf(fp, "Input edge outputs\n"); for (m = 0; m < pb_graph_pins[i][j].input_edges[k]->num_output_pins; m++) { print_tabs(fp, level + 3); - fprintf(fp, - "pin number %d port_name \"%s\" parent type \"%s\" parent index %d\n", + fprintf(fp, "pin number %d port_name \"%s\" parent type \"%s\" parent index %d\n", pb_graph_pins[i][j].input_edges[k]->output_pins[m]->pin_number, pb_graph_pins[i][j].input_edges[k]->output_pins[m]->port->name, pb_graph_pins[i][j].input_edges[k]->output_pins[m]->parent_node->pb_type->name, @@ -1782,11 +1747,10 @@ static void check_pb_node_rec(const t_pb_graph_node* pb_graph_node) { check_repeated_edges_at_pb_pin(&pb_graph_node->input_pins[i][j]); // Checks the equivalency of pins of an input port if (pb_graph_node->input_pins[i][j].port->equivalent != PortEquivalence::NONE) { - if (!check_input_pins_equivalence(&pb_graph_node->input_pins[i][j], - j, logic_equivalent_pins_map, &line_num)) { - VTR_LOG_WARN("[LINE %d] false logically-equivalent pin %s[%d].%s[%d].\n", - line_num, pb_graph_node->pb_type->name, - pb_graph_node->placement_index, + if (!check_input_pins_equivalence(&pb_graph_node->input_pins[i][j], j, logic_equivalent_pins_map, + &line_num)) { + VTR_LOG_WARN("[LINE %d] false logically-equivalent pin %s[%d].%s[%d].\n", line_num, + pb_graph_node->pb_type->name, pb_graph_node->placement_index, pb_graph_node->input_pins[i][j].port->name, pb_graph_node->input_pins[i][j].pin_number); } @@ -1845,20 +1809,19 @@ static void check_repeated_edges_at_pb_pin(t_pb_graph_pin* cur_pin) { if (!ret_edges_map.second) { // Print out the connection that already exists in the map and then the new one // we are trying to insert into the map. - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), cur_edge->interconnect->line_num, - "Duplicate edges detected between: \n" - "%s[%d].%s[%d]--->%s[%d].%s[%d] \n" - "Found edges on line %d and %d.\n", - ret_edges_map.first->first.input_pin->parent_node->pb_type->name, - ret_edges_map.first->first.input_pin->parent_node->placement_index, - ret_edges_map.first->first.input_pin->port->name, - ret_edges_map.first->first.input_pin->pin_number, - ret_edges_map.first->first.output_pin->parent_node->pb_type->name, - ret_edges_map.first->first.output_pin->parent_node->placement_index, - ret_edges_map.first->first.output_pin->port->name, - ret_edges_map.first->first.output_pin->pin_number, - ret_edges_map.first->first.parent_edge->interconnect->line_num, - cur_edge->interconnect->line_num); + vpr_throw( + VPR_ERROR_ARCH, get_arch_file_name(), cur_edge->interconnect->line_num, + "Duplicate edges detected between: \n" + "%s[%d].%s[%d]--->%s[%d].%s[%d] \n" + "Found edges on line %d and %d.\n", + ret_edges_map.first->first.input_pin->parent_node->pb_type->name, + ret_edges_map.first->first.input_pin->parent_node->placement_index, + ret_edges_map.first->first.input_pin->port->name, ret_edges_map.first->first.input_pin->pin_number, + ret_edges_map.first->first.output_pin->parent_node->pb_type->name, + ret_edges_map.first->first.output_pin->parent_node->placement_index, + ret_edges_map.first->first.output_pin->port->name, + ret_edges_map.first->first.output_pin->pin_number, + ret_edges_map.first->first.parent_edge->interconnect->line_num, cur_edge->interconnect->line_num); } } } @@ -1872,9 +1835,9 @@ static void check_repeated_edges_at_pb_pin(t_pb_graph_pin* cur_pin) { * used for comparing key types in edges_map that * checks for repeated edges in the pb_graph */ -static bool operator<(const t_pb_graph_edge_comparator& edge1, - const t_pb_graph_edge_comparator& edge2) { - return (edge1.input_pin_id_in_cluster < edge2.input_pin_id_in_cluster) || (edge1.output_pin_id_in_cluster < edge2.output_pin_id_in_cluster); +static bool operator<(const t_pb_graph_edge_comparator& edge1, const t_pb_graph_edge_comparator& edge2) { + return (edge1.input_pin_id_in_cluster < edge2.input_pin_id_in_cluster) + || (edge1.output_pin_id_in_cluster < edge2.output_pin_id_in_cluster); } /* Date:July 19th, 2013 @@ -1903,11 +1866,13 @@ static bool check_input_pins_equivalence(const t_pb_graph_pin* cur_pin, for (j = 0; j < cur_edge->num_output_pins; j++) { if (i_pin == 0) { // First pin of an equivalent port, populate edges_map first - logic_equivalent_pins_map.insert(std::pair(cur_edge->output_pins[j]->pin_count_in_cluster, 0)); + logic_equivalent_pins_map.insert( + std::pair(cur_edge->output_pins[j]->pin_count_in_cluster, 0)); } else { // Rest of the pins of an equivalent port, they should connect to the // same set of pins - if (logic_equivalent_pins_map.find(cur_edge->output_pins[j]->pin_count_in_cluster) == logic_equivalent_pins_map.end()) { + if (logic_equivalent_pins_map.find(cur_edge->output_pins[j]->pin_count_in_cluster) + == logic_equivalent_pins_map.end()) { // Could not find the outpin that cur_pin connects to pins_equivalent = false; } @@ -1946,18 +1911,16 @@ const t_pb_graph_edge* get_edge_between_pins(const t_pb_graph_pin* driver_pin, c /* Date:June 8th, 2024 * Author: Kate Thurmer * Purpose: This subroutine computes the index of a pb graph node at its - level of the pb hierarchy; it is computed by the parent and - passed to each child of each child pb type. When the child is - a primitive, the computed indes is its flat site index. - For example, if there are 10 ALMs, each with 2 FFs and 2 LUTs, - then the ALM at index N, when calling this function for - its FF child at index M, would compute the child's index as: - N*(FFs per ALM) + M - e.g. for FF[1] in ALM[5], this returns - 5*(2 FFS per ALM) + 1 = 11 + * level of the pb hierarchy; it is computed by the parent and + * passed to each child of each child pb type. When the child is + * a primitive, the computed indes is its flat site index. + * For example, if there are 10 ALMs, each with 2 FFs and 2 LUTs, + * then the ALM at index N, when calling this function for + * its FF child at index M, would compute the child's index as: + * N*(FFs per ALM) + M + * e.g. for FF[1] in ALM[5], this returns + * 5*(2 FFS per ALM) + 1 = 11 */ -static int compute_flat_index_for_child_node(int num_children_of_type, - int parent_flat_index, - int child_index) { - return parent_flat_index*num_children_of_type + child_index; +static int compute_flat_index_for_child_node(int num_children_of_type, int parent_flat_index, int child_index) { + return parent_flat_index * num_children_of_type + child_index; } diff --git a/vpr/src/pack/pb_type_graph.h b/vpr/src/pack/pb_type_graph.h index f2d8cdeb5d9..6ca74f9e38b 100644 --- a/vpr/src/pack/pb_type_graph.h +++ b/vpr/src/pack/pb_type_graph.h @@ -12,9 +12,7 @@ struct t_pb_graph_edge_comparator { // Find the edge between driver_pin and pin. // // Returns nullptr on invalid input or error. -const t_pb_graph_edge* get_edge_between_pins( - const t_pb_graph_pin* driver_pin, - const t_pb_graph_pin* pin); +const t_pb_graph_edge* get_edge_between_pins(const t_pb_graph_pin* driver_pin, const t_pb_graph_pin* pin); void alloc_and_load_all_pb_graphs(bool load_power_structures, bool is_flat); void echo_pb_graph(char* filename); diff --git a/vpr/src/pack/pb_type_graph_annotations.cpp b/vpr/src/pack/pb_type_graph_annotations.cpp index 63a60188f20..0cf6ba5f382 100644 --- a/vpr/src/pack/pb_type_graph_annotations.cpp +++ b/vpr/src/pack/pb_type_graph_annotations.cpp @@ -21,7 +21,12 @@ #include "pb_type_graph_annotations.h" #include "read_xml_arch_file.h" -static void load_pack_pattern_annotations(const int line_num, t_pb_graph_node* pb_graph_node, const int mode, const char* annot_in_pins, const char* annot_out_pins, const char* value); +static void load_pack_pattern_annotations(const int line_num, + t_pb_graph_node* pb_graph_node, + const int mode, + const char* annot_in_pins, + const char* annot_out_pins, + const char* value); static void load_delay_annotations(const int line_num, t_pb_graph_node* pb_graph_node, @@ -58,12 +63,10 @@ void load_pb_graph_pin_to_pin_annotations(t_pb_graph_node* pb_graph_node) { || annotations[i].prop[j] == E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN || annotations[i].prop[j] == E_ANNOT_PIN_TO_PIN_DELAY_TSETUP || annotations[i].prop[j] == E_ANNOT_PIN_TO_PIN_DELAY_THOLD) { - load_delay_annotations(annotations[i].line_num, pb_graph_node, OPEN, - annotations[i].format, (enum e_pin_to_pin_delay_annotations)annotations[i].prop[j], - annotations[i].input_pins, - annotations[i].output_pins, - annotations[i].clock, - annotations[i].value[j]); + load_delay_annotations(annotations[i].line_num, pb_graph_node, OPEN, annotations[i].format, + (enum e_pin_to_pin_delay_annotations)annotations[i].prop[j], + annotations[i].input_pins, annotations[i].output_pins, + annotations[i].clock, annotations[i].value[j]); } else { VTR_ASSERT(false); } @@ -84,13 +87,10 @@ void load_pb_graph_pin_to_pin_annotations(t_pb_graph_node* pb_graph_node) { || annotations[k].prop[m] == E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN || annotations[k].prop[m] == E_ANNOT_PIN_TO_PIN_DELAY_TSETUP || annotations[k].prop[m] == E_ANNOT_PIN_TO_PIN_DELAY_THOLD) { - load_delay_annotations(annotations[k].line_num, pb_graph_node, i, - annotations[k].format, + load_delay_annotations(annotations[k].line_num, pb_graph_node, i, annotations[k].format, (enum e_pin_to_pin_delay_annotations)annotations[k].prop[m], - annotations[k].input_pins, - annotations[k].output_pins, - annotations[k].clock, - annotations[k].value[m]); + annotations[k].input_pins, annotations[k].output_pins, + annotations[k].clock, annotations[k].value[m]); } else { VTR_ASSERT(false); } @@ -98,8 +98,7 @@ void load_pb_graph_pin_to_pin_annotations(t_pb_graph_node* pb_graph_node) { } else if (annotations[k].type == E_ANNOT_PIN_TO_PIN_PACK_PATTERN) { VTR_ASSERT(annotations[k].num_value_prop_pairs == 1); load_pack_pattern_annotations(annotations[k].line_num, pb_graph_node, i, - annotations[k].input_pins, - annotations[k].output_pins, + annotations[k].input_pins, annotations[k].output_pins, annotations[k].value[0]); } else { /* Todo: @@ -126,17 +125,22 @@ void load_pb_graph_pin_to_pin_annotations(t_pb_graph_node* pb_graph_node) { /* * Add the pattern name to the pack_pattern field for each pb_graph_edge that is used in a pack pattern */ -static void load_pack_pattern_annotations(const int line_num, t_pb_graph_node* pb_graph_node, const int mode, const char* annot_in_pins, const char* annot_out_pins, const char* value) { +static void load_pack_pattern_annotations(const int line_num, + t_pb_graph_node* pb_graph_node, + const int mode, + const char* annot_in_pins, + const char* annot_out_pins, + const char* value) { int i, j, k, m, n, p, iedge; t_pb_graph_pin ***in_port, ***out_port; int *num_in_ptrs, *num_out_ptrs, num_in_sets, num_out_sets; t_pb_graph_node** children = nullptr; children = pb_graph_node->child_pb_graph_nodes[mode]; - in_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, children, - annot_in_pins, &num_in_ptrs, &num_in_sets, false, false); - out_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, children, - annot_out_pins, &num_out_ptrs, &num_out_sets, false, false); + in_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, children, annot_in_pins, &num_in_ptrs, + &num_in_sets, false, false); + out_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, children, annot_out_pins, + &num_out_ptrs, &num_out_sets, false, false); /* Discover edge then annotate edge with name of pack pattern */ k = 0; @@ -154,8 +158,12 @@ static void load_pack_pattern_annotations(const int line_num, t_pb_graph_node* p * can use this info to only annotate existing edges */ if (iedge != in_port[i][j]->num_output_edges) { in_port[i][j]->output_edges[iedge]->num_pack_patterns++; - in_port[i][j]->output_edges[iedge]->pack_pattern_names.resize(in_port[i][j]->output_edges[iedge]->num_pack_patterns); - in_port[i][j]->output_edges[iedge]->pack_pattern_names[in_port[i][j]->output_edges[iedge]->num_pack_patterns - 1] = value; + in_port[i][j]->output_edges[iedge]->pack_pattern_names.resize( + in_port[i][j]->output_edges[iedge]->num_pack_patterns); + in_port[i][j] + ->output_edges[iedge] + ->pack_pattern_names[in_port[i][j]->output_edges[iedge]->num_pack_patterns - 1] + = value; } p++; } @@ -225,23 +233,18 @@ static void load_delay_annotations(const int line_num, } else { children = pb_graph_node->child_pb_graph_nodes[mode]; } - if (delay_type == E_ANNOT_PIN_TO_PIN_DELAY_TSETUP - || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_THOLD + if (delay_type == E_ANNOT_PIN_TO_PIN_DELAY_TSETUP || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_THOLD || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MAX) { VTR_ASSERT(pb_graph_node->pb_type->blif_model != nullptr); - in_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, - children, annot_in_pins, &num_in_ptrs, &num_in_sets, false, - false); + in_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, children, annot_in_pins, + &num_in_ptrs, &num_in_sets, false, false); } else { - VTR_ASSERT(delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MAX - || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MIN); - in_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, - children, annot_in_pins, &num_in_ptrs, &num_in_sets, false, - false); - out_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, - children, annot_out_pins, &num_out_ptrs, &num_out_sets, false, - false); + VTR_ASSERT(delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MAX || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MIN); + in_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, children, annot_in_pins, + &num_in_ptrs, &num_in_sets, false, false); + out_port = alloc_and_load_port_pin_ptrs_from_string(line_num, pb_graph_node, children, annot_out_pins, + &num_out_ptrs, &num_out_sets, false, false); } num_inputs = 0; @@ -282,8 +285,7 @@ static void load_delay_annotations(const int line_num, } } - if (delay_type == E_ANNOT_PIN_TO_PIN_DELAY_TSETUP - || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_THOLD + if (delay_type == E_ANNOT_PIN_TO_PIN_DELAY_TSETUP || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_THOLD || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MIN || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_CLOCK_TO_Q_MAX) { //Annotate primitive sequential timing information @@ -305,8 +307,7 @@ static void load_delay_annotations(const int line_num, } } } else { - VTR_ASSERT(delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MAX - || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MIN); + VTR_ASSERT(delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MAX || delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MIN); if (!pb_graph_node->is_primitive()) { /* Not a primitive, annotate pb interconnect delay */ @@ -414,34 +415,38 @@ static void load_delay_annotations(const int line_num, if (delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MAX) { if (src_pin->num_pin_timing_del_max_annotated >= src_pin->num_pin_timing) { vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Max delay already appears annotated on '%s' port '%s' (duplicate delay annotations?)", - src_pin->parent_node->pb_type->name, - src_pin->port->name); + "Max delay already appears annotated on '%s' port '%s' (duplicate delay " + "annotations?)", + src_pin->parent_node->pb_type->name, src_pin->port->name); } - if (!std::isnan(src_pin->pin_timing_del_max[src_pin->num_pin_timing_del_max_annotated])) { + if (!std::isnan( + src_pin->pin_timing_del_max[src_pin->num_pin_timing_del_max_annotated])) { vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Multiple max delay values specified"); } - src_pin->pin_timing_del_max[src_pin->num_pin_timing_del_max_annotated] = delay_matrix[k][p]; + src_pin->pin_timing_del_max[src_pin->num_pin_timing_del_max_annotated] + = delay_matrix[k][p]; src_pin->num_pin_timing_del_max_annotated++; } else { VTR_ASSERT(delay_type == E_ANNOT_PIN_TO_PIN_DELAY_MIN); if (src_pin->num_pin_timing_del_min_annotated >= src_pin->num_pin_timing) { vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Min delay already appears annotated on '%s' port '%s' (duplicate delay annotations?)", - src_pin->parent_node->pb_type->name, - src_pin->port->name); + "Min delay already appears annotated on '%s' port '%s' (duplicate delay " + "annotations?)", + src_pin->parent_node->pb_type->name, src_pin->port->name); } - if (!std::isnan(src_pin->pin_timing_del_min[src_pin->num_pin_timing_del_min_annotated])) { + if (!std::isnan( + src_pin->pin_timing_del_min[src_pin->num_pin_timing_del_min_annotated])) { vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Multiple min delay values specified"); } - src_pin->pin_timing_del_min[src_pin->num_pin_timing_del_min_annotated] = delay_matrix[k][p]; + src_pin->pin_timing_del_min[src_pin->num_pin_timing_del_min_annotated] + = delay_matrix[k][p]; src_pin->num_pin_timing_del_min_annotated++; } p++; @@ -527,10 +532,12 @@ static void inferr_unspecified_pb_graph_pin_delays(t_pb_graph_pin* pb_graph_pin) * Combinational delays (i.e. pin_timing) */ for (int ipin_timing = 0; ipin_timing < pb_graph_pin->num_pin_timing; ++ipin_timing) { - if (std::isnan(pb_graph_pin->pin_timing_del_min[ipin_timing]) && !std::isnan(pb_graph_pin->pin_timing_del_max[ipin_timing])) { + if (std::isnan(pb_graph_pin->pin_timing_del_min[ipin_timing]) + && !std::isnan(pb_graph_pin->pin_timing_del_max[ipin_timing])) { //min missing, inferr from max pb_graph_pin->pin_timing_del_min[ipin_timing] = pb_graph_pin->pin_timing_del_max[ipin_timing]; - } else if (!std::isnan(pb_graph_pin->pin_timing_del_min[ipin_timing]) && std::isnan(pb_graph_pin->pin_timing_del_max[ipin_timing])) { + } else if (!std::isnan(pb_graph_pin->pin_timing_del_min[ipin_timing]) + && std::isnan(pb_graph_pin->pin_timing_del_max[ipin_timing])) { //max missing, inferr from min pb_graph_pin->pin_timing_del_max[ipin_timing] = pb_graph_pin->pin_timing_del_min[ipin_timing]; } @@ -566,16 +573,14 @@ static t_pb_graph_pin* find_clock_pin(t_pb_graph_node* gnode, const char* clock, if (strcmp(clock, gnode->clock_pins[iport][0].port->name) == 0) { VTR_ASSERT(!clock_pin); if (clock_pin) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Found duplicate clock-pin match"); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Found duplicate clock-pin match"); } clock_pin = &gnode->clock_pins[iport][0]; } } if (!clock_pin) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, - "Failed to find associated clock pin"); + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), line_num, "Failed to find associated clock pin"); } return clock_pin; } diff --git a/vpr/src/pack/post_routing_pb_pin_fixup.cpp b/vpr/src/pack/post_routing_pb_pin_fixup.cpp index 78084d56df3..f713d2c8145 100644 --- a/vpr/src/pack/post_routing_pb_pin_fixup.cpp +++ b/vpr/src/pack/post_routing_pb_pin_fixup.cpp @@ -156,7 +156,8 @@ static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_li short valid_routing_net_cnt = 0; for (const e_side& pin_side : pin_sides) { /* Find the net mapped to this pin in routing results */ - RRNodeId rr_node = node_lookup.find_node(coord_layer, coord_x, coord_y, rr_node_type, physical_pin, pin_side); + RRNodeId rr_node + = node_lookup.find_node(coord_layer, coord_x, coord_y, rr_node_type, physical_pin, pin_side); /* Bypass invalid nodes, after that we must have a valid rr_node id */ if (!rr_node) { @@ -165,7 +166,8 @@ static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_li VTR_ASSERT((size_t)rr_node < device_ctx.rr_graph.num_nodes()); /* If the node has been visited on the other side, we just skip it */ - if (visited_rr_nodes.end() != std::find(visited_rr_nodes.begin(), visited_rr_nodes.end(), RRNodeId(rr_node))) { + if (visited_rr_nodes.end() + != std::find(visited_rr_nodes.begin(), visited_rr_nodes.end(), RRNodeId(rr_node))) { continue; } @@ -185,8 +187,7 @@ static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_li if (routing_net_id) { if (routing_net_id != rr_node_nets[rr_node]) { VTR_LOG_ERROR("Pin '%s' is mapped to two nets: '%s' and '%s'\n", - pb_graph_pin->to_string().c_str(), - net_list.net_name(routing_net_id).c_str(), + pb_graph_pin->to_string().c_str(), net_list.net_name(routing_net_id).c_str(), net_list.net_name(rr_node_nets[rr_node]).c_str()); } VTR_ASSERT(routing_net_id == rr_node_nets[rr_node]); @@ -218,7 +219,8 @@ static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_li } /* Update the clustering context with net modification */ - clustering_ctx.post_routing_clb_pin_nets[blk_id][pb_graph_pin->pin_count_in_cluster] = cluster_equivalent_net_id; + clustering_ctx.post_routing_clb_pin_nets[blk_id][pb_graph_pin->pin_count_in_cluster] + = cluster_equivalent_net_id; std::string routing_net_name("unmapped"); if (clustering_ctx.clb_nlist.valid_net_id(cluster_equivalent_net_id)) { @@ -231,14 +233,12 @@ static void update_cluster_pin_with_post_routing_results(const Netlist<>& net_li } VTR_LOGV(verbose, - "Fixed up net '%s' mapping mismatch at clustered block '%s' pin 'grid[%ld][%ld].%s.%s[%d] - layer %d' (was net '%s')\n", - routing_net_name.c_str(), - clustering_ctx.clb_nlist.block_pb(blk_id)->name, - coord_x, coord_y, + "Fixed up net '%s' mapping mismatch at clustered block '%s' pin 'grid[%ld][%ld].%s.%s[%d] - layer %d' " + "(was net '%s')\n", + routing_net_name.c_str(), clustering_ctx.clb_nlist.block_pb(blk_id)->name, coord_x, coord_y, clustering_ctx.clb_nlist.block_pb(blk_id)->pb_graph_node->pb_type->name, get_pb_graph_node_pin_from_block_pin(blk_id, physical_pin)->port->name, - get_pb_graph_node_pin_from_block_pin(blk_id, physical_pin)->pin_number, - coord_layer, + get_pb_graph_node_pin_from_block_pin(blk_id, physical_pin)->pin_number, coord_layer, cluster_net_name.c_str()); /* Update counter */ @@ -314,12 +314,9 @@ static int find_target_pb_route_from_equivalent_pins(const AtomContext& atom_ctx } } - VTR_LOGV(verbose, - "Found %lu candidates to remap net '%s' at clustered block '%s' pin '%s'\n", - pb_route_indices.size(), - atom_ctx.nlist.net_name(target_net).c_str(), - clustering_ctx.clb_nlist.block_pb(blk_id)->name, - source_pb_graph_pin->to_string().c_str()); + VTR_LOGV(verbose, "Found %lu candidates to remap net '%s' at clustered block '%s' pin '%s'\n", + pb_route_indices.size(), atom_ctx.nlist.net_name(target_net).c_str(), + clustering_ctx.clb_nlist.block_pb(blk_id)->name, source_pb_graph_pin->to_string().c_str()); /* Should find at least 1 candidate */ VTR_ASSERT(!pb_route_indices.empty()); @@ -342,7 +339,8 @@ static const t_pb_graph_pin* find_unused_pb_graph_pin_in_the_same_port(const t_p /* Otherwise, we have to find an unused pin from the same port */ for (int ipin = 0; ipin < pb_graph_pin->port->num_pins; ++ipin) { - const t_pb_graph_pin* candidate_pb_graph_pin = find_pb_graph_pin(pb_graph_pin->parent_node, std::string(pb_graph_pin->port->name), ipin); + const t_pb_graph_pin* candidate_pb_graph_pin + = find_pb_graph_pin(pb_graph_pin->parent_node, std::string(pb_graph_pin->port->name), ipin); int cand_pb_route_id = candidate_pb_graph_pin->pin_count_in_cluster; /* If unused, we find it */ @@ -357,11 +355,11 @@ static const t_pb_graph_pin* find_unused_pb_graph_pin_in_the_same_port(const t_p /* Not found: Print debugging information */ for (int ipin = 0; ipin < pb_graph_pin->port->num_pins; ++ipin) { - const t_pb_graph_pin* candidate_pb_graph_pin = find_pb_graph_pin(pb_graph_pin->parent_node, std::string(pb_graph_pin->port->name), ipin); + const t_pb_graph_pin* candidate_pb_graph_pin + = find_pb_graph_pin(pb_graph_pin->parent_node, std::string(pb_graph_pin->port->name), ipin); int cand_pb_route_id = candidate_pb_graph_pin->pin_count_in_cluster; - VTR_LOG("\tCandidate pin: '%s'", - candidate_pb_graph_pin->to_string().c_str()); + VTR_LOG("\tCandidate pin: '%s'", candidate_pb_graph_pin->to_string().c_str()); if (0 == pb_routes.count(cand_pb_route_id)) { VTR_LOG("\tUnused\n"); @@ -385,8 +383,7 @@ static bool is_single_fanout_pb_pin(const t_pb_graph_pin* pb_pin) { * Find the sink pb_graph_pin from a driver pb_graph_pin * which is the only one used in the fan-outs of the driver pb_graph_pin! *******************************************************************/ -static t_pb_graph_pin* find_used_sink_pb_pin(t_pb_graph_pin* driver_pb_pin, - const int& mode) { +static t_pb_graph_pin* find_used_sink_pb_pin(t_pb_graph_pin* driver_pb_pin, const int& mode) { t_pb_graph_pin* sink_pb_pin = nullptr; int num_cand_pins = 0; @@ -451,7 +448,8 @@ static AtomPinId find_mapped_atom_pin(const AtomContext& atom_ctx, const t_pb_graph_pin* sink_pb_pin = intra_lb_pb_pin_lookup.pb_gpin(logical_type->index, sink_pb_route_id); const t_pb* leaf_pb = pb->find_pb(sink_pb_pin->parent_node); - const AtomPortId& atom_port = atom_ctx.nlist.find_atom_port(atom_ctx.lookup.pb_atom(leaf_pb), sink_pb_pin->port->model_port); + const AtomPortId& atom_port + = atom_ctx.nlist.find_atom_port(atom_ctx.lookup.pb_atom(leaf_pb), sink_pb_pin->port->model_port); BitIndex atom_pin_bit_index = leaf_pb->atom_pin_bit_index(sink_pb_pin); AtomPinId mapped_atom_pin = atom_ctx.nlist.port_pin(atom_port, atom_pin_bit_index); @@ -478,12 +476,13 @@ static AtomPinId find_mapped_atom_pin(const AtomContext& atom_ctx, * * Anything violates the assumption will be NOT be cached!!! *******************************************************************/ -static std::map> cache_atom_pin_to_pb_pin_mapping(const AtomContext& atom_ctx, - const IntraLbPbPinLookup& intra_lb_pb_pin_lookup, - const ClusteringContext& clustering_ctx, - const ClusterBlockId& blk_id, - t_pb* pb, - t_logical_block_type_ptr logical_block) { +static std::map> cache_atom_pin_to_pb_pin_mapping( + const AtomContext& atom_ctx, + const IntraLbPbPinLookup& intra_lb_pb_pin_lookup, + const ClusteringContext& clustering_ctx, + const ClusterBlockId& blk_id, + t_pb* pb, + t_logical_block_type_ptr logical_block) { std::map> atom_pin_to_pb_pin_mapping; for (int pb_type_pin = 0; pb_type_pin < logical_block->pb_type->num_pins; ++pb_type_pin) { /* Skip non-equivalent ports, no need to do fix-up */ @@ -500,7 +499,8 @@ static std::map> cache_atom_pin VTR_ASSERT(pb_graph_pin->parent_node == pb->pb_graph_node); VTR_ASSERT(pb_graph_pin->parent_node->is_root()); - auto remapped_result = clustering_ctx.post_routing_clb_pin_nets.at(blk_id).find(pb_graph_pin->pin_count_in_cluster); + auto remapped_result + = clustering_ctx.post_routing_clb_pin_nets.at(blk_id).find(pb_graph_pin->pin_count_in_cluster); /* Skip this pin: it is consistent in pre- and post- routing results */ if (remapped_result == clustering_ctx.post_routing_clb_pin_nets.at(blk_id).end()) { @@ -518,11 +518,13 @@ static std::map> cache_atom_pin continue; } - const AtomPinId& orig_mapped_atom_pin = find_mapped_atom_pin(atom_ctx, intra_lb_pb_pin_lookup, logical_block, pb, pb_route_id); + const AtomPinId& orig_mapped_atom_pin + = find_mapped_atom_pin(atom_ctx, intra_lb_pb_pin_lookup, logical_block, pb, pb_route_id); /* Sometimes the routing traces is not what we target, skip caching */ if (orig_mapped_atom_pin) { - atom_pin_to_pb_pin_mapping[pb_route_id] = std::make_pair(orig_mapped_atom_pin, atom_ctx.lookup.atom_pin_pb_graph_pin(orig_mapped_atom_pin)); + atom_pin_to_pb_pin_mapping[pb_route_id] + = std::make_pair(orig_mapped_atom_pin, atom_ctx.lookup.atom_pin_pb_graph_pin(orig_mapped_atom_pin)); } } @@ -565,8 +567,7 @@ static const t_pb_graph_pin* find_mapped_equivalent_pb_pin_by_net(t_pb* pb, * Recursively remove all the downstream pb_routes with a given starting point * until reach the primitive nodes *******************************************************************/ -static void rec_remove_downstream_pb_routes(t_pb_routes& curr_pb_routes, - const int& src_pb_route_id) { +static void rec_remove_downstream_pb_routes(t_pb_routes& curr_pb_routes, const int& src_pb_route_id) { for (const auto& sink_pb_route : curr_pb_routes.at(src_pb_route_id).sink_pb_pin_ids) { /* Go recursively if this is not the end */ rec_remove_downstream_pb_routes(curr_pb_routes, sink_pb_route); @@ -583,15 +584,16 @@ static void rec_remove_downstream_pb_routes(t_pb_routes& curr_pb_routes, * - modify any routing traces for global nets, * which should be handled in another function!!! *******************************************************************/ -static void update_cluster_regular_routing_traces_with_post_routing_results(AtomContext& atom_ctx, - const std::map>& previous_atom_pin_to_pb_pin_mapping, - ClusteringContext& clustering_ctx, - const ClusterBlockId& blk_id, - t_pb* pb, - t_logical_block_type_ptr logical_block, - t_pb_routes& new_pb_routes, - size_t& num_fixup, - const bool& verbose) { +static void update_cluster_regular_routing_traces_with_post_routing_results( + AtomContext& atom_ctx, + const std::map>& previous_atom_pin_to_pb_pin_mapping, + ClusteringContext& clustering_ctx, + const ClusterBlockId& blk_id, + t_pb* pb, + t_logical_block_type_ptr logical_block, + t_pb_routes& new_pb_routes, + size_t& num_fixup, + const bool& verbose) { /* Go through each pb_graph pin at the top level * and build the new routing traces */ @@ -615,7 +617,8 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom VTR_ASSERT(pb_graph_pin->parent_node == pb->pb_graph_node); VTR_ASSERT(pb_graph_pin->parent_node->is_root()); - auto remapped_result = clustering_ctx.post_routing_clb_pin_nets.at(blk_id).find(pb_graph_pin->pin_count_in_cluster); + auto remapped_result + = clustering_ctx.post_routing_clb_pin_nets.at(blk_id).find(pb_graph_pin->pin_count_in_cluster); /* Skip this pin: it is consistent in pre- and post- routing results */ if (remapped_result == clustering_ctx.post_routing_clb_pin_nets.at(blk_id).end()) { @@ -646,9 +649,7 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom continue; } - VTR_LOGV(verbose, - "Remapping routing trace for net '%s'\n", - atom_ctx.nlist.net_name(remapped_net).c_str()); + VTR_LOGV(verbose, "Remapping routing trace for net '%s'\n", atom_ctx.nlist.net_name(remapped_net).c_str()); /* Spot the routing trace * Two conditions could happen: @@ -659,13 +660,8 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom * in the same port (every pin in this port should be logic equivalent) * Rename the net id and pb_graph_node pins */ - int pb_route_id = find_target_pb_route_from_equivalent_pins(atom_ctx, - clustering_ctx, - blk_id, - pb, - pb_graph_pin, - remapped_net, - verbose); + int pb_route_id = find_target_pb_route_from_equivalent_pins(atom_ctx, clustering_ctx, blk_id, pb, pb_graph_pin, + remapped_net, verbose); /* Record the previous pin mapping for finding the correct pin index during timing analysis */ clustering_ctx.pre_routing_net_pin_mapping[blk_id][pb_graph_pin->pin_count_in_cluster] = pb_route_id; @@ -714,7 +710,8 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom for (int iedge = 0; iedge < pb_graph_pin->num_output_edges; ++iedge) { for (int ipin = 0; ipin < pb_graph_pin->output_edges[iedge]->num_output_pins; ++ipin) { - sink_pb_pin_accessibility[pb_graph_pin->output_edges[iedge]->output_pins[ipin]->pin_count_in_cluster] = true; + sink_pb_pin_accessibility[pb_graph_pin->output_edges[iedge]->output_pins[ipin]->pin_count_in_cluster] + = true; } } @@ -729,8 +726,7 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom } /* Add the directly connected pin ONLY when there is no pin to add */ - if ((sink_pb_pin_to_add) - && (new_pb_route.sink_pb_pin_ids.empty())) { + if ((sink_pb_pin_to_add) && (new_pb_route.sink_pb_pin_ids.empty())) { new_pb_route.sink_pb_pin_ids.push_back(sink_pb_pin_to_add->pin_count_in_cluster); } @@ -768,16 +764,16 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom /* Go to the next level */ const t_pb* sink_pb = pb->find_pb(new_sink_pb_pin_to_add->parent_node); VTR_ASSERT(sink_pb); - t_pb_graph_pin* next_sink_pb_pin_to_add = find_used_sink_pb_pin(new_sink_pb_pin_to_add, sink_pb->mode); + t_pb_graph_pin* next_sink_pb_pin_to_add + = find_used_sink_pb_pin(new_sink_pb_pin_to_add, sink_pb->mode); VTR_ASSERT(next_sink_pb_pin_to_add); /* Assign sinks */ - new_pb_routes[new_sink_pb_route_id].sink_pb_pin_ids.push_back(next_sink_pb_pin_to_add->pin_count_in_cluster); + new_pb_routes[new_sink_pb_route_id].sink_pb_pin_ids.push_back( + next_sink_pb_pin_to_add->pin_count_in_cluster); /* Print verbose outputs */ - VTR_LOGV(verbose, - "Add a new trace '%d' linked to pin '%s' for net '%s'.\n", - new_sink_pb_route_id, + VTR_LOGV(verbose, "Add a new trace '%d' linked to pin '%s' for net '%s'.\n", new_sink_pb_route_id, new_sink_pb_pin_to_add->to_string().c_str(), atom_ctx.nlist.net_name(remapped_net).c_str()); @@ -792,12 +788,10 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom const AtomPinId& orig_mapped_atom_pin = previous_atom_pin_to_pb_pin_mapping.at(pb_route_id).first; /* Print verbose outputs */ - VTR_LOGV(verbose, - "Redirect atom pin '%lu' mapping from '%s' to '%s' for net '%s'.\n", + VTR_LOGV(verbose, "Redirect atom pin '%lu' mapping from '%s' to '%s' for net '%s'.\n", size_t(orig_mapped_atom_pin), atom_ctx.lookup.atom_pin_pb_graph_pin(orig_mapped_atom_pin)->to_string().c_str(), - new_sink_pb_pin_to_add->to_string().c_str(), - atom_ctx.nlist.net_name(remapped_net).c_str()); + new_sink_pb_pin_to_add->to_string().c_str(), atom_ctx.nlist.net_name(remapped_net).c_str()); /* Update the pin binding in atom netlist fast look-up */ atom_ctx.lookup.set_atom_pin_pb_graph_pin(orig_mapped_atom_pin, new_sink_pb_pin_to_add); @@ -805,7 +799,8 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom /* Update the pin rotation map */ t_pb* atom_pb = pb->find_mutable_pb(new_sink_pb_pin_to_add->parent_node); - atom_pb->set_atom_pin_bit_index(new_sink_pb_pin_to_add, atom_ctx.nlist.pin_port_bit(orig_mapped_atom_pin)); + atom_pb->set_atom_pin_bit_index(new_sink_pb_pin_to_add, + atom_ctx.nlist.pin_port_bit(orig_mapped_atom_pin)); } else { new_pb_routes[sink_pb_route].driver_pb_pin_id = pb_graph_pin->pin_count_in_cluster; @@ -833,17 +828,18 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom * to this net (from the other equivalent pins in this port) * Then we can find out the atom pin that is linked to the remapped net */ - const t_pb_graph_pin* orig_mapped_top_level_pb_pin = find_mapped_equivalent_pb_pin_by_net(pb, pb_graph_pin, remapped_net); + const t_pb_graph_pin* orig_mapped_top_level_pb_pin + = find_mapped_equivalent_pb_pin_by_net(pb, pb_graph_pin, remapped_net); VTR_ASSERT(orig_mapped_top_level_pb_pin); - const AtomPinId& orig_mapped_atom_pin = previous_atom_pin_to_pb_pin_mapping.at(orig_mapped_top_level_pb_pin->pin_count_in_cluster).first; + const AtomPinId& orig_mapped_atom_pin + = previous_atom_pin_to_pb_pin_mapping.at(orig_mapped_top_level_pb_pin->pin_count_in_cluster) + .first; /* Print verbose outputs */ - VTR_LOGV(verbose, - "Redirect atom pin '%lu' mapping from '%s' to '%s' for net '%s'.\n", + VTR_LOGV(verbose, "Redirect atom pin '%lu' mapping from '%s' to '%s' for net '%s'.\n", size_t(orig_mapped_atom_pin), atom_ctx.lookup.atom_pin_pb_graph_pin(orig_mapped_atom_pin)->to_string().c_str(), - next_pb_pin->to_string().c_str(), - atom_ctx.nlist.net_name(remapped_net).c_str()); + next_pb_pin->to_string().c_str(), atom_ctx.nlist.net_name(remapped_net).c_str()); /* Update the pin binding in atom netlist fast look-up */ atom_ctx.lookup.set_atom_pin_pb_graph_pin(orig_mapped_atom_pin, next_pb_pin); @@ -857,10 +853,8 @@ static void update_cluster_regular_routing_traces_with_post_routing_results(Atom } } - VTR_LOGV(verbose, - "Remap clustered block '%s' routing trace[%d] to net '%s'\n", - clustering_ctx.clb_nlist.block_pb(blk_id)->name, - pb_graph_pin->pin_count_in_cluster, + VTR_LOGV(verbose, "Remap clustered block '%s' routing trace[%d] to net '%s'\n", + clustering_ctx.clb_nlist.block_pb(blk_id)->name, pb_graph_pin->pin_count_in_cluster, atom_ctx.nlist.net_name(remapped_net).c_str()); /* Update fixup counter */ @@ -915,7 +909,8 @@ static void update_cluster_global_routing_traces_with_post_routing_results(const AtomNetId global_atom_net_id = atom_ctx.lookup.atom_net(global_net_id); - auto remapped_result = clustering_ctx.post_routing_clb_pin_nets.at(blk_id).find(pb_graph_pin->pin_count_in_cluster); + auto remapped_result + = clustering_ctx.post_routing_clb_pin_nets.at(blk_id).find(pb_graph_pin->pin_count_in_cluster); /* Skip this pin: it is consistent in pre- and post- routing results */ if (remapped_result == clustering_ctx.post_routing_clb_pin_nets.at(blk_id).end()) { @@ -925,13 +920,12 @@ static void update_cluster_global_routing_traces_with_post_routing_results(const /* Update only when there is a remapping! */ VTR_ASSERT_SAFE(remapped_result != clustering_ctx.post_routing_clb_pin_nets[blk_id].end()); - VTR_LOGV(verbose, - "Remapping clustered block '%s' global net '%s' to unused pin as %s\r", - clustering_ctx.clb_nlist.block_pb(blk_id)->name, - atom_ctx.nlist.net_name(global_atom_net_id).c_str(), + VTR_LOGV(verbose, "Remapping clustered block '%s' global net '%s' to unused pin as %s\r", + clustering_ctx.clb_nlist.block_pb(blk_id)->name, atom_ctx.nlist.net_name(global_atom_net_id).c_str(), pb_graph_pin->to_string().c_str()); - const t_pb_graph_pin* unused_pb_graph_pin = find_unused_pb_graph_pin_in_the_same_port(pb_graph_pin, new_pb_routes, global_atom_net_id); + const t_pb_graph_pin* unused_pb_graph_pin + = find_unused_pb_graph_pin_in_the_same_port(pb_graph_pin, new_pb_routes, global_atom_net_id); /* Must find one */ VTR_ASSERT(nullptr != unused_pb_graph_pin); /* Create a new pb_route and update sink pb_route */ @@ -956,10 +950,8 @@ static void update_cluster_global_routing_traces_with_post_routing_results(const clustering_ctx.post_routing_clb_pin_nets[blk_id][unused_pb_graph_pin->pin_count_in_cluster] = global_net_id; clustering_ctx.pre_routing_net_pin_mapping[blk_id][unused_pb_graph_pin->pin_count_in_cluster] = pb_route_id; - VTR_LOGV(verbose, - "Remap clustered block '%s' global net '%s' to pin '%s'\n", - clustering_ctx.clb_nlist.block_pb(blk_id)->name, - atom_ctx.nlist.net_name(global_atom_net_id).c_str(), + VTR_LOGV(verbose, "Remap clustered block '%s' global net '%s' to pin '%s'\n", + clustering_ctx.clb_nlist.block_pb(blk_id)->name, atom_ctx.nlist.net_name(global_atom_net_id).c_str(), unused_pb_graph_pin->to_string().c_str()); /* Update fixup counter */ @@ -994,26 +986,18 @@ static void update_cluster_routing_traces_with_post_routing_results(AtomContext& t_pb_routes new_pb_routes = pb->pb_route; /* Cache the current mapping between atom pin to pb_graph pin in this block */ - std::map> previous_atom_pin_to_pb_pin_mapping = cache_atom_pin_to_pb_pin_mapping(const_cast(atom_ctx), intra_lb_pb_pin_lookup, const_cast(clustering_ctx), blk_id, pb, logical_block); - - update_cluster_regular_routing_traces_with_post_routing_results(atom_ctx, - previous_atom_pin_to_pb_pin_mapping, - clustering_ctx, - blk_id, - pb, - logical_block, - new_pb_routes, - num_fixup, - verbose); + std::map> previous_atom_pin_to_pb_pin_mapping + = cache_atom_pin_to_pb_pin_mapping(const_cast(atom_ctx), intra_lb_pb_pin_lookup, + const_cast(clustering_ctx), blk_id, pb, + logical_block); + + update_cluster_regular_routing_traces_with_post_routing_results(atom_ctx, previous_atom_pin_to_pb_pin_mapping, + clustering_ctx, blk_id, pb, logical_block, + new_pb_routes, num_fixup, verbose); update_cluster_global_routing_traces_with_post_routing_results(const_cast(atom_ctx), - clustering_ctx, - blk_id, - pb, - logical_block, - new_pb_routes, - num_fixup, - verbose); + clustering_ctx, blk_id, pb, logical_block, + new_pb_routes, num_fixup, verbose); /* Replace old pb_routes with the new one */ pb->pb_route = new_pb_routes; @@ -1032,9 +1016,7 @@ void sync_netlists_to_routing(const Netlist<>& net_list, clustering_ctx.pre_routing_net_pin_mapping.clear(); /* Create net-to-rr_node mapping */ - vtr::vector rr_node_nets = annotate_rr_node_nets(clustering_ctx, - device_ctx, - verbose); + vtr::vector rr_node_nets = annotate_rr_node_nets(clustering_ctx, device_ctx, verbose); IntraLbPbPinLookup intra_lb_pb_pin_lookup(device_ctx.logical_block_types); @@ -1051,27 +1033,16 @@ void sync_netlists_to_routing(const Netlist<>& net_list, VTR_ASSERT(clb_blk_id != ClusterBlockId::INVALID()); if (seen_block_ids.insert(clb_blk_id).second) { - update_cluster_pin_with_post_routing_results(net_list, - device_ctx, - clustering_ctx, - rr_node_nets, - placement_ctx.block_locs()[clb_blk_id].loc, - clb_blk_id, - num_mismatches, - verbose); - - update_cluster_routing_traces_with_post_routing_results(atom_ctx, - intra_lb_pb_pin_lookup, - clustering_ctx, - clb_blk_id, - num_fixup, - verbose); + update_cluster_pin_with_post_routing_results(net_list, device_ctx, clustering_ctx, rr_node_nets, + placement_ctx.block_locs()[clb_blk_id].loc, clb_blk_id, + num_mismatches, verbose); + + update_cluster_routing_traces_with_post_routing_results(atom_ctx, intra_lb_pb_pin_lookup, clustering_ctx, + clb_blk_id, num_fixup, verbose); } } /* Print a short summary */ - VTR_LOG("Found %lu mismatches between routing and packing results.\n", - num_mismatches); - VTR_LOG("Fixed %lu routing traces due to mismatch between routing and packing results.\n", - num_fixup); + VTR_LOG("Found %lu mismatches between routing and packing results.\n", num_mismatches); + VTR_LOG("Fixed %lu routing traces due to mismatch between routing and packing results.\n", num_fixup); } diff --git a/vpr/src/pack/prepack.cpp b/vpr/src/pack/prepack.cpp index a5928ba85f7..9adf8a50691 100644 --- a/vpr/src/pack/prepack.cpp +++ b/vpr/src/pack/prepack.cpp @@ -34,18 +34,20 @@ /*****************************************/ /*Local Function Declaration */ /*****************************************/ -static std::vector alloc_and_load_pack_patterns(const std::vector& logical_block_types); +static std::vector alloc_and_load_pack_patterns( + const std::vector& logical_block_types); static void free_list_of_pack_patterns(std::vector& list_of_pack_patterns); static void free_pack_pattern(t_pack_patterns* pack_pattern); -static t_pack_molecule* alloc_and_load_pack_molecules(t_pack_patterns* list_of_pack_patterns, - vtr::vector& expected_lowest_cost_pb_gnode, - const int num_packing_patterns, - std::multimap& atom_molecules, - const AtomNetlist& atom_nlist, - const std::vector& logical_block_types); +static t_pack_molecule* alloc_and_load_pack_molecules( + t_pack_patterns* list_of_pack_patterns, + vtr::vector& expected_lowest_cost_pb_gnode, + const int num_packing_patterns, + std::multimap& atom_molecules, + const AtomNetlist& atom_nlist, + const std::vector& logical_block_types); static void discover_pattern_names_in_pb_graph_node(t_pb_graph_node* pb_graph_node, std::unordered_map& pattern_names); @@ -54,10 +56,10 @@ static void forward_infer_pattern(t_pb_graph_pin* pb_graph_pin); static void backward_infer_pattern(t_pb_graph_pin* pb_graph_pin); -static std::vector alloc_and_init_pattern_list_from_hash(std::unordered_map pattern_names); +static std::vector alloc_and_init_pattern_list_from_hash( + std::unordered_map pattern_names); -static t_pb_graph_edge* find_expansion_edge_of_pattern(const int pattern_index, - const t_pb_graph_node* pb_graph_node); +static t_pb_graph_edge* find_expansion_edge_of_pattern(const int pattern_index, const t_pb_graph_node* pb_graph_node); static void forward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expansion_edge, t_pack_patterns* list_of_packing_patterns, @@ -93,10 +95,14 @@ static void print_pack_molecules(const char* fname, const t_pack_molecule* list_of_molecules, const AtomNetlist& atom_nlist); -static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block(const AtomBlockId blk_id, - const std::vector& logical_block_types); +static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block( + const AtomBlockId blk_id, + const std::vector& logical_block_types); -static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block_in_pb_graph_node(const AtomBlockId blk_id, t_pb_graph_node* curr_pb_graph_node, float* cost); +static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block_in_pb_graph_node( + const AtomBlockId blk_id, + t_pb_graph_node* curr_pb_graph_node, + float* cost); static AtomBlockId find_new_root_atom_for_chain(const AtomBlockId blk_id, const t_pack_patterns* list_of_pack_patterns, @@ -105,14 +111,17 @@ static AtomBlockId find_new_root_atom_for_chain(const AtomBlockId blk_id, static std::vector find_end_of_path(t_pb_graph_pin* input_pin, int pattern_index); -static void expand_search(const t_pb_graph_pin* input_pin, std::queue& pins_queue, const int pattern_index); +static void expand_search(const t_pb_graph_pin* input_pin, + std::queue& pins_queue, + const int pattern_index); static void find_all_equivalent_chains(t_pack_patterns* chain_pattern, const t_pb_graph_node* root_block); static void update_chain_root_pins(t_pack_patterns* chain_pattern, const std::vector& chain_input_pins); -static void get_all_connected_primitive_pins(const t_pb_graph_pin* cluster_input_pin, std::vector& connected_primitive_pins); +static void get_all_connected_primitive_pins(const t_pb_graph_pin* cluster_input_pin, + std::vector& connected_primitive_pins); static void init_molecule_chain_info(const AtomBlockId blk_id, t_pack_molecule* molecule, @@ -145,7 +154,8 @@ static void print_chain_starting_points(t_pack_patterns* chain_pattern); * (general packing) or upstream (in tech mapping). * If this limitation is too constraining, code is designed so that this limitation can be removed. */ -static std::vector alloc_and_load_pack_patterns(const std::vector& logical_block_types) { +static std::vector alloc_and_load_pack_patterns( + const std::vector& logical_block_types) { int L_num_blocks; std::vector list_of_packing_patterns; t_pb_graph_edge* expansion_edge; @@ -170,8 +180,8 @@ static std::vector alloc_and_load_pack_patterns(const std::vect L_num_blocks = 0; list_of_packing_patterns[i].base_cost = 0; // use the found expansion edge to build the pack pattern - backward_expand_pack_pattern_from_edge(expansion_edge, - list_of_packing_patterns.data(), i, nullptr, nullptr, &L_num_blocks); + backward_expand_pack_pattern_from_edge(expansion_edge, list_of_packing_patterns.data(), i, nullptr, nullptr, + &L_num_blocks); list_of_packing_patterns[i].num_blocks = L_num_blocks; /* Default settings: A section of a netlist must match all blocks in a pack @@ -202,7 +212,8 @@ static std::vector alloc_and_load_pack_patterns(const std::vect //Sanity check, every pattern should have a root block for (size_t i = 0; i < pattern_names.size(); ++i) { if (list_of_packing_patterns[i].root_block == nullptr) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find root block for pack pattern %s", list_of_packing_patterns[i].name); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find root block for pack pattern %s", + list_of_packing_patterns[i].name); } } @@ -337,7 +348,8 @@ static void discover_pattern_names_in_pb_graph_node(t_pb_graph_node* pb_graph_no * In obvious cases where a pattern edge has only one path to go, set that path to be inferred */ static void forward_infer_pattern(t_pb_graph_pin* pb_graph_pin) { - if (pb_graph_pin->num_output_edges == 1 && pb_graph_pin->output_edges[0]->num_pack_patterns == 0 && pb_graph_pin->output_edges[0]->infer_pattern == false) { + if (pb_graph_pin->num_output_edges == 1 && pb_graph_pin->output_edges[0]->num_pack_patterns == 0 + && pb_graph_pin->output_edges[0]->infer_pattern == false) { pb_graph_pin->output_edges[0]->infer_pattern = true; if (pb_graph_pin->output_edges[0]->num_output_pins == 1) { forward_infer_pattern(pb_graph_pin->output_edges[0]->output_pins[0]); @@ -345,7 +357,8 @@ static void forward_infer_pattern(t_pb_graph_pin* pb_graph_pin) { } } static void backward_infer_pattern(t_pb_graph_pin* pb_graph_pin) { - if (pb_graph_pin->num_input_edges == 1 && pb_graph_pin->input_edges[0]->num_pack_patterns == 0 && pb_graph_pin->input_edges[0]->infer_pattern == false) { + if (pb_graph_pin->num_input_edges == 1 && pb_graph_pin->input_edges[0]->num_pack_patterns == 0 + && pb_graph_pin->input_edges[0]->infer_pattern == false) { pb_graph_pin->input_edges[0]->infer_pattern = true; if (pb_graph_pin->input_edges[0]->num_input_pins == 1) { backward_infer_pattern(pb_graph_pin->input_edges[0]->input_pins[0]); @@ -357,7 +370,8 @@ static void backward_infer_pattern(t_pb_graph_pin* pb_graph_pin) { * Allocates memory for models and loads the name of the packing pattern * so that it can be identified and loaded with more complete information later */ -static std::vector alloc_and_init_pattern_list_from_hash(std::unordered_map pattern_names) { +static std::vector alloc_and_init_pattern_list_from_hash( + std::unordered_map pattern_names) { std::vector nlist(pattern_names.size()); for (const auto& curr_pattern : pattern_names) { @@ -397,8 +411,7 @@ static void free_pack_pattern(t_pack_patterns* pack_pattern) { /** * Locate first edge that belongs to pattern index */ -static t_pb_graph_edge* find_expansion_edge_of_pattern(const int pattern_index, - const t_pb_graph_node* pb_graph_node) { +static t_pb_graph_edge* find_expansion_edge_of_pattern(const int pattern_index, const t_pb_graph_node* pb_graph_node) { int i, j, k, m; t_pb_graph_edge* edge; /* Iterate over all edges to discover if an edge in current physical block belongs to a pattern @@ -522,7 +535,8 @@ static void forward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expansi // 2) assign an id to this pattern block, 3) increment the number of found blocks belonging to this // pattern and 4) expand all its edges to find the other primitives that belong to this pattern destination_block = new t_pack_pattern_block(); - list_of_packing_patterns[curr_pattern_index].base_cost += compute_primitive_base_cost(destination_pb_graph_node); + list_of_packing_patterns[curr_pattern_index].base_cost + += compute_primitive_base_cost(destination_pb_graph_node); destination_block->block_id = *L_num_blocks; (*L_num_blocks)++; destination_pb_graph_node->temp_scratch_pad = (void*)destination_block; @@ -532,12 +546,12 @@ static void forward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expansi // explore the inputs to this primitive for (iport = 0; iport < destination_pb_graph_node->num_input_ports; iport++) { for (ipin = 0; ipin < destination_pb_graph_node->num_input_pins[iport]; ipin++) { - for (iedge = 0; iedge < destination_pb_graph_node->input_pins[iport][ipin].num_input_edges; iedge++) { - backward_expand_pack_pattern_from_edge(destination_pb_graph_node->input_pins[iport][ipin].input_edges[iedge], - list_of_packing_patterns, - curr_pattern_index, - &destination_pb_graph_node->input_pins[iport][ipin], - destination_block, L_num_blocks); + for (iedge = 0; iedge < destination_pb_graph_node->input_pins[iport][ipin].num_input_edges; + iedge++) { + backward_expand_pack_pattern_from_edge( + destination_pb_graph_node->input_pins[iport][ipin].input_edges[iedge], + list_of_packing_patterns, curr_pattern_index, + &destination_pb_graph_node->input_pins[iport][ipin], destination_block, L_num_blocks); } } } @@ -545,10 +559,11 @@ static void forward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expansi // explore the outputs of this primitive for (iport = 0; iport < destination_pb_graph_node->num_output_ports; iport++) { for (ipin = 0; ipin < destination_pb_graph_node->num_output_pins[iport]; ipin++) { - for (iedge = 0; iedge < destination_pb_graph_node->output_pins[iport][ipin].num_output_edges; iedge++) { - forward_expand_pack_pattern_from_edge(destination_pb_graph_node->output_pins[iport][ipin].output_edges[iedge], - list_of_packing_patterns, - curr_pattern_index, L_num_blocks, false); + for (iedge = 0; iedge < destination_pb_graph_node->output_pins[iport][ipin].num_output_edges; + iedge++) { + forward_expand_pack_pattern_from_edge( + destination_pb_graph_node->output_pins[iport][ipin].output_edges[iedge], + list_of_packing_patterns, curr_pattern_index, L_num_blocks, false); } } } @@ -556,19 +571,20 @@ static void forward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expansi // explore the clock pins of this primitive for (iport = 0; iport < destination_pb_graph_node->num_clock_ports; iport++) { for (ipin = 0; ipin < destination_pb_graph_node->num_clock_pins[iport]; ipin++) { - for (iedge = 0; iedge < destination_pb_graph_node->clock_pins[iport][ipin].num_input_edges; iedge++) { - backward_expand_pack_pattern_from_edge(destination_pb_graph_node->clock_pins[iport][ipin].input_edges[iedge], - list_of_packing_patterns, - curr_pattern_index, - &destination_pb_graph_node->clock_pins[iport][ipin], - destination_block, L_num_blocks); + for (iedge = 0; iedge < destination_pb_graph_node->clock_pins[iport][ipin].num_input_edges; + iedge++) { + backward_expand_pack_pattern_from_edge( + destination_pb_graph_node->clock_pins[iport][ipin].input_edges[iedge], + list_of_packing_patterns, curr_pattern_index, + &destination_pb_graph_node->clock_pins[iport][ipin], destination_block, L_num_blocks); } } } } // if this pb_graph_node (primitive) should be added to the pack pattern blocks - if (((t_pack_pattern_block*)destination_pb_graph_node->temp_scratch_pad)->pattern_index == curr_pattern_index) { + if (((t_pack_pattern_block*)destination_pb_graph_node->temp_scratch_pad)->pattern_index + == curr_pattern_index) { // if this pb_graph_node is known to be the root of the chain, update the root block and root pin if (make_root_of_chain == true) { list_of_packing_patterns[curr_pattern_index].chain_root_pins = {{expansion_edge->output_pins[i]}}; @@ -582,17 +598,17 @@ static void forward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expansi for (j = 0; j < expansion_edge->output_pins[i]->num_output_edges; j++) { if (expansion_edge->output_pins[i]->output_edges[j]->infer_pattern == true) { forward_expand_pack_pattern_from_edge(expansion_edge->output_pins[i]->output_edges[j], - list_of_packing_patterns, - curr_pattern_index, - L_num_blocks, + list_of_packing_patterns, curr_pattern_index, L_num_blocks, make_root_of_chain); } else { for (k = 0; k < expansion_edge->output_pins[i]->output_edges[j]->num_pack_patterns; k++) { - if (expansion_edge->output_pins[i]->output_edges[j]->pack_pattern_indices[k] == curr_pattern_index) { + if (expansion_edge->output_pins[i]->output_edges[j]->pack_pattern_indices[k] + == curr_pattern_index) { if (found == true) { /* Check assumption that each forced net has only one fan-out */ VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Invalid packing pattern defined. Multi-fanout nets not supported when specifying pack patterns.\n" + "Invalid packing pattern defined. Multi-fanout nets not supported " + "when specifying pack patterns.\n" "Problem on %s[%d].%s[%d] for pattern %s\n", expansion_edge->output_pins[i]->parent_node->pb_type->name, expansion_edge->output_pins[i]->parent_node->placement_index, @@ -602,10 +618,8 @@ static void forward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expansi } found = true; forward_expand_pack_pattern_from_edge(expansion_edge->output_pins[i]->output_edges[j], - list_of_packing_patterns, - curr_pattern_index, - L_num_blocks, - make_root_of_chain); + list_of_packing_patterns, curr_pattern_index, + L_num_blocks, make_root_of_chain); } } // End for pack patterns of output edge } @@ -665,7 +679,8 @@ static void backward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expans source_block = new t_pack_pattern_block(); source_block->block_id = *L_num_blocks; (*L_num_blocks)++; - list_of_packing_patterns[curr_pattern_index].base_cost += compute_primitive_base_cost(source_pb_graph_node); + list_of_packing_patterns[curr_pattern_index].base_cost + += compute_primitive_base_cost(source_pb_graph_node); source_pb_graph_node->temp_scratch_pad = (void*)source_block; source_block->pattern_index = curr_pattern_index; source_block->pb_type = source_pb_graph_node->pb_type; @@ -677,13 +692,12 @@ static void backward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expans // explore the inputs of this primitive for (iport = 0; iport < source_pb_graph_node->num_input_ports; iport++) { for (ipin = 0; ipin < source_pb_graph_node->num_input_pins[iport]; ipin++) { - for (iedge = 0; iedge < source_pb_graph_node->input_pins[iport][ipin].num_input_edges; iedge++) { - backward_expand_pack_pattern_from_edge(source_pb_graph_node->input_pins[iport][ipin].input_edges[iedge], - list_of_packing_patterns, - curr_pattern_index, - &source_pb_graph_node->input_pins[iport][ipin], - source_block, - L_num_blocks); + for (iedge = 0; iedge < source_pb_graph_node->input_pins[iport][ipin].num_input_edges; + iedge++) { + backward_expand_pack_pattern_from_edge( + source_pb_graph_node->input_pins[iport][ipin].input_edges[iedge], + list_of_packing_patterns, curr_pattern_index, + &source_pb_graph_node->input_pins[iport][ipin], source_block, L_num_blocks); } } } @@ -691,12 +705,11 @@ static void backward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expans // explore the outputs of this primitive for (iport = 0; iport < source_pb_graph_node->num_output_ports; iport++) { for (ipin = 0; ipin < source_pb_graph_node->num_output_pins[iport]; ipin++) { - for (iedge = 0; iedge < source_pb_graph_node->output_pins[iport][ipin].num_output_edges; iedge++) { - forward_expand_pack_pattern_from_edge(source_pb_graph_node->output_pins[iport][ipin].output_edges[iedge], - list_of_packing_patterns, - curr_pattern_index, - L_num_blocks, - false); + for (iedge = 0; iedge < source_pb_graph_node->output_pins[iport][ipin].num_output_edges; + iedge++) { + forward_expand_pack_pattern_from_edge( + source_pb_graph_node->output_pins[iport][ipin].output_edges[iedge], + list_of_packing_patterns, curr_pattern_index, L_num_blocks, false); } } } @@ -704,20 +717,20 @@ static void backward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expans // explore the clock pins of this primitive for (iport = 0; iport < source_pb_graph_node->num_clock_ports; iport++) { for (ipin = 0; ipin < source_pb_graph_node->num_clock_pins[iport]; ipin++) { - for (iedge = 0; iedge < source_pb_graph_node->clock_pins[iport][ipin].num_input_edges; iedge++) { - backward_expand_pack_pattern_from_edge(source_pb_graph_node->clock_pins[iport][ipin].input_edges[iedge], - list_of_packing_patterns, - curr_pattern_index, - &source_pb_graph_node->clock_pins[iport][ipin], - source_block, - L_num_blocks); + for (iedge = 0; iedge < source_pb_graph_node->clock_pins[iport][ipin].num_input_edges; + iedge++) { + backward_expand_pack_pattern_from_edge( + source_pb_graph_node->clock_pins[iport][ipin].input_edges[iedge], + list_of_packing_patterns, curr_pattern_index, + &source_pb_graph_node->clock_pins[iport][ipin], source_block, L_num_blocks); } } } } if (destination_pin != nullptr) { - VTR_ASSERT(((t_pack_pattern_block*)source_pb_graph_node->temp_scratch_pad)->pattern_index == curr_pattern_index); + VTR_ASSERT(((t_pack_pattern_block*)source_pb_graph_node->temp_scratch_pad)->pattern_index + == curr_pattern_index); source_block = (t_pack_pattern_block*)source_pb_graph_node->temp_scratch_pad; pack_pattern_connection = new t_pack_pattern_connections(); pack_pattern_connection->from_block = source_block; @@ -736,9 +749,10 @@ static void backward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expans destination_block->connections = pack_pattern_connection; if (source_block == destination_block) { - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Invalid packing pattern defined. Source and destination block are the same (%s).\n", - source_block->pb_type->name); + VPR_FATAL_ERROR( + VPR_ERROR_PACK, + "Invalid packing pattern defined. Source and destination block are the same (%s).\n", + source_block->pb_type->name); } } @@ -752,11 +766,8 @@ static void backward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expans // thus it extends across multiple logic blocks, treat as a chain list_of_packing_patterns[curr_pattern_index].is_chain = true; // since this input pin has not driving nets, expand in the forward direction instead - forward_expand_pack_pattern_from_edge(expansion_edge, - list_of_packing_patterns, - curr_pattern_index, - L_num_blocks, - true); + forward_expand_pack_pattern_from_edge(expansion_edge, list_of_packing_patterns, curr_pattern_index, + L_num_blocks, true); } // this input pin of the expansion edge has a driving pin } else { @@ -765,25 +776,20 @@ static void backward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expans // if pattern should be inferred for this edge continue the expansion backwards if (expansion_edge->input_pins[i]->input_edges[j]->infer_pattern == true) { backward_expand_pack_pattern_from_edge(expansion_edge->input_pins[i]->input_edges[j], - list_of_packing_patterns, - curr_pattern_index, - destination_pin, - destination_block, - L_num_blocks); + list_of_packing_patterns, curr_pattern_index, + destination_pin, destination_block, L_num_blocks); // if pattern shouldn't be inferred } else { // check if this input pin edge is annotated with the current pattern for (k = 0; k < expansion_edge->input_pins[i]->input_edges[j]->num_pack_patterns; k++) { - if (expansion_edge->input_pins[i]->input_edges[j]->pack_pattern_indices[k] == curr_pattern_index) { + if (expansion_edge->input_pins[i]->input_edges[j]->pack_pattern_indices[k] + == curr_pattern_index) { VTR_ASSERT(found == false); /* Check assumption that each forced net has only one fan-out */ found = true; - backward_expand_pack_pattern_from_edge(expansion_edge->input_pins[i]->input_edges[j], - list_of_packing_patterns, - curr_pattern_index, - destination_pin, - destination_block, - L_num_blocks); + backward_expand_pack_pattern_from_edge( + expansion_edge->input_pins[i]->input_edges[j], list_of_packing_patterns, + curr_pattern_index, destination_pin, destination_block, L_num_blocks); } } } @@ -800,12 +806,13 @@ static void backward_expand_pack_pattern_from_edge(const t_pb_graph_edge* expans * 3. Chained molecules are molecules that follow a carry-chain style pattern, * ie. a single linear chain that can be split across multiple complex blocks */ -static t_pack_molecule* alloc_and_load_pack_molecules(t_pack_patterns* list_of_pack_patterns, - vtr::vector& expected_lowest_cost_pb_gnode, - const int num_packing_patterns, - std::multimap& atom_molecules, - const AtomNetlist& atom_nlist, - const std::vector& logical_block_types) { +static t_pack_molecule* alloc_and_load_pack_molecules( + t_pack_patterns* list_of_pack_patterns, + vtr::vector& expected_lowest_cost_pb_gnode, + const int num_packing_patterns, + std::multimap& atom_molecules, + const AtomNetlist& atom_nlist, + const std::vector& logical_block_types) { int i, j, best_pattern; t_pack_molecule* list_of_molecules_head; t_pack_molecule* cur_molecule; @@ -835,7 +842,8 @@ static t_pack_molecule* alloc_and_load_pack_molecules(t_pack_patterns* list_of_p for (j = 1; j < num_packing_patterns; j++) { if (is_used[best_pattern]) { best_pattern = j; - } else if (is_used[j] == false && compare_pack_pattern(&list_of_pack_patterns[j], &list_of_pack_patterns[best_pattern]) == 1) { + } else if (is_used[j] == false + && compare_pack_pattern(&list_of_pack_patterns[j], &list_of_pack_patterns[best_pattern]) == 1) { best_pattern = j; } } @@ -892,7 +900,8 @@ static t_pack_molecule* alloc_and_load_pack_molecules(t_pack_patterns* list_of_p delete molecule_to_free; } - VPR_FATAL_ERROR(VPR_ERROR_PACK, "Failed to find any location to pack primitive of type '%s' in architecture", + VPR_FATAL_ERROR(VPR_ERROR_PACK, + "Failed to find any location to pack primitive of type '%s' in architecture", atom_nlist.block_model(blk_id)->name); } @@ -921,10 +930,8 @@ static t_pack_molecule* alloc_and_load_pack_molecules(t_pack_patterns* list_of_p } if (getEchoEnabled() && isEchoFileEnabled(E_ECHO_PRE_PACKING_MOLECULES_AND_PATTERNS)) { - print_pack_molecules(getEchoFileName(E_ECHO_PRE_PACKING_MOLECULES_AND_PATTERNS), - list_of_pack_patterns, num_packing_patterns, - list_of_molecules_head, - atom_nlist); + print_pack_molecules(getEchoFileName(E_ECHO_PRE_PACKING_MOLECULES_AND_PATTERNS), list_of_pack_patterns, + num_packing_patterns, list_of_molecules_head, atom_nlist); } return list_of_molecules_head; @@ -979,7 +986,8 @@ static t_pack_molecule* try_create_molecule(t_pack_patterns* list_of_pack_patter // the furthest blk_id up the chain that is not mapped to a molecule yet. if (pack_pattern->is_chain) { blk_id = find_new_root_atom_for_chain(blk_id, pack_pattern, atom_molecules, atom_nlist); - if (!blk_id) return nullptr; + if (!blk_id) + return nullptr; } molecule = new t_pack_molecule; @@ -1065,7 +1073,9 @@ static bool try_expand_molecule(t_pack_molecule* molecule, continue; } - if (!block_id || !primitive_type_feasible(block_id, pattern_block->pb_type) || (molecule_atom_block_id && molecule_atom_block_id != block_id) || atom_molecules.find(block_id) != atom_molecules.end()) { + if (!block_id || !primitive_type_feasible(block_id, pattern_block->pb_type) + || (molecule_atom_block_id && molecule_atom_block_id != block_id) + || atom_molecules.find(block_id) != atom_molecules.end()) { // Stopping conditions, if: // 1) this is an invalid atom block (nothing) // 2) this atom block cannot fit in this primitive type @@ -1194,10 +1204,8 @@ static void print_pack_molecules(const char* fname, for (i = 0; i < num_pack_patterns; i++) { VTR_ASSERT(list_of_pack_patterns[i].root_block); - fprintf(fp, "pack pattern index %d block count %d name %s root %s\n", - list_of_pack_patterns[i].index, - list_of_pack_patterns[i].num_blocks, - list_of_pack_patterns[i].name, + fprintf(fp, "pack pattern index %d block count %d name %s root %s\n", list_of_pack_patterns[i].index, + list_of_pack_patterns[i].num_blocks, list_of_pack_patterns[i].name, list_of_pack_patterns[i].root_block->pb_type->name); } @@ -1208,15 +1216,12 @@ static void print_pack_molecules(const char* fname, fprintf(fp, "\tpattern index %d: atom block %s\n", i, atom_nlist.block_name(list_of_molecules_current->atom_block_ids[0]).c_str()); } else if (list_of_molecules_current->type == MOLECULE_FORCED_PACK) { - fprintf(fp, "\nmolecule type: %s\n", - list_of_molecules_current->pack_pattern->name); - for (i = 0; i < list_of_molecules_current->pack_pattern->num_blocks; - i++) { + fprintf(fp, "\nmolecule type: %s\n", list_of_molecules_current->pack_pattern->name); + for (i = 0; i < list_of_molecules_current->pack_pattern->num_blocks; i++) { if (!list_of_molecules_current->atom_block_ids[i]) { fprintf(fp, "\tpattern index %d: empty \n", i); } else { - fprintf(fp, "\tpattern index %d: atom block %s", - i, + fprintf(fp, "\tpattern index %d: atom block %s", i, atom_nlist.block_name(list_of_molecules_current->atom_block_ids[i]).c_str()); if (list_of_molecules_current->pack_pattern->root_block->block_id == i) { fprintf(fp, " root node\n"); @@ -1235,8 +1240,9 @@ static void print_pack_molecules(const char* fname, } /* Search through all primitives and return the lowest cost primitive that fits this atom block */ -static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block(const AtomBlockId blk_id, - const std::vector& logical_block_types) { +static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block( + const AtomBlockId blk_id, + const std::vector& logical_block_types) { float cost, best_cost; t_pb_graph_node *current, *best; @@ -1257,7 +1263,10 @@ static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block(const return best; } -static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block_in_pb_graph_node(const AtomBlockId blk_id, t_pb_graph_node* curr_pb_graph_node, float* cost) { +static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block_in_pb_graph_node( + const AtomBlockId blk_id, + t_pb_graph_node* curr_pb_graph_node, + float* cost) { t_pb_graph_node *best, *cur; float cur_cost, best_cost; int i, j; @@ -1285,7 +1294,8 @@ static t_pb_graph_node* get_expected_lowest_cost_primitive_for_atom_block_in_pb_ for (j = 0; j < curr_pb_graph_node->pb_type->modes[i].num_pb_type_children; j++) { *cost = UNDEFINED; - cur = get_expected_lowest_cost_primitive_for_atom_block_in_pb_graph_node(blk_id, &curr_pb_graph_node->child_pb_graph_nodes[i][j][0], cost); + cur = get_expected_lowest_cost_primitive_for_atom_block_in_pb_graph_node( + blk_id, &curr_pb_graph_node->child_pb_graph_nodes[i][j][0], cost); if (cur != nullptr) { if (best == nullptr || best_cost > *cost) { best = cur; @@ -1418,8 +1428,7 @@ static std::vector find_end_of_path(t_pb_graph_pin* input_pin, // if this is an output pin of a root block // add to reachable output pins - if (current_pin->is_root_block_pin() - && current_pin->num_output_edges == 0) { + if (current_pin->is_root_block_pin() && current_pin->num_output_edges == 0) { reachable_pins.push_back(current_pin); } } @@ -1427,7 +1436,9 @@ static std::vector find_end_of_path(t_pb_graph_pin* input_pin, return reachable_pins; } -static void expand_search(const t_pb_graph_pin* input_pin, std::queue& pins_queue, const int pattern_index) { +static void expand_search(const t_pb_graph_pin* input_pin, + std::queue& pins_queue, + const int pattern_index) { // If not a primitive input pin (has output edges) // ----------------------------------------------- @@ -1544,12 +1555,13 @@ static void find_all_equivalent_chains(t_pack_patterns* chain_pattern, const t_p std::vector intersection; for (size_t i = 0; i < reachable_pins.size() - 1; i++) { for (size_t j = 1; j < reachable_pins.size(); j++) { - std::set_intersection(reachable_pins[i].begin(), reachable_pins[i].end(), - reachable_pins[j].begin(), reachable_pins[j].end(), - std::back_inserter(intersection)); - if (intersection.size()) break; + std::set_intersection(reachable_pins[i].begin(), reachable_pins[i].end(), reachable_pins[j].begin(), + reachable_pins[j].end(), std::back_inserter(intersection)); + if (intersection.size()) + break; } - if (intersection.size()) break; + if (intersection.size()) + break; } // if there are no intersections between the reachable pins, @@ -1601,7 +1613,8 @@ static void update_chain_root_pins(t_pack_patterns* chain_pattern, * the Cin pin of all the adder primitives connected to this pin. Which is for typical architectures * will be only one pin connected to the very first adder in the cluster. */ -static void get_all_connected_primitive_pins(const t_pb_graph_pin* cluster_input_pin, std::vector& connected_primitive_pins) { +static void get_all_connected_primitive_pins(const t_pb_graph_pin* cluster_input_pin, + std::vector& connected_primitive_pins) { /* Skip pins for modes that are disabled for packing*/ if ((nullptr != cluster_input_pin->parent_node->pb_type->parent_mode) && (true == cluster_input_pin->parent_node->pb_type->parent_mode->disable_packing)) { @@ -1634,7 +1647,7 @@ static void get_all_connected_primitive_pins(const t_pb_graph_pin* cluster_input */ static void init_molecule_chain_info(const AtomBlockId blk_id, t_pack_molecule* molecule, - const std::multimap &atom_molecules, + const std::multimap& atom_molecules, const AtomNetlist& atom_nlist) { // the input molecule to this function should have a pack // pattern assigned to it and the input block should be valid @@ -1678,12 +1691,16 @@ static void print_chain_starting_points(t_pack_patterns* chain_pattern) { VTR_LOGV(chain_root_pins.size() > 1, "\nThere are %zu independent chains for chain pattern \"%s\":\n", chain_pattern->chain_root_pins.size(), chain_pattern->name); - VTR_LOGV(chain_root_pins.size() == 1, "\nThere is one chain in this architecture called \"%s\" with the following starting points:\n", chain_pattern->name); + VTR_LOGV(chain_root_pins.size() == 1, + "\nThere is one chain in this architecture called \"%s\" with the following starting points:\n", + chain_pattern->name); size_t chainId = 0; for (const auto& chain : chain_root_pins) { - VTR_LOGV(chain_root_pins.size() > 1 && chain.size() > 1, "\n There are %zu starting points for chain id #%zu:\n", chain.size(), chainId++); - VTR_LOGV(chain_root_pins.size() > 1 && chain.size() == 1, "\n There is 1 starting point for chain id #%zu:\n", chainId++); + VTR_LOGV(chain_root_pins.size() > 1 && chain.size() > 1, + "\n There are %zu starting points for chain id #%zu:\n", chain.size(), chainId++); + VTR_LOGV(chain_root_pins.size() > 1 && chain.size() == 1, "\n There is 1 starting point for chain id #%zu:\n", + chainId++); for (const auto& pin_ptr : chain) { VTR_LOG("\t%s\n", pin_ptr->to_string().c_str()); } @@ -1712,12 +1729,9 @@ void Prepacker::init(const AtomNetlist& atom_nlist, const std::vector atom_molecules_multimap; expected_lowest_cost_pb_gnode.resize(atom_nlist.blocks().size(), nullptr); - list_of_pack_molecules = alloc_and_load_pack_molecules(list_of_pack_patterns.data(), - expected_lowest_cost_pb_gnode, - list_of_pack_patterns.size(), - atom_molecules_multimap, - atom_nlist, - logical_block_types); + list_of_pack_molecules = alloc_and_load_pack_molecules(list_of_pack_patterns.data(), expected_lowest_cost_pb_gnode, + list_of_pack_patterns.size(), atom_molecules_multimap, + atom_nlist, logical_block_types); // The multimap is a legacy thing. Since blocks can be part of multiple pack // patterns, during prepacking a block may be contained within multiple @@ -1744,12 +1758,17 @@ t_molecule_stats Prepacker::calc_max_molecule_stats(const AtomNetlist& atom_nlis max_molecules_stats.num_blocks = std::max(max_molecules_stats.num_blocks, cur_molecule_stats.num_blocks); max_molecules_stats.num_pins = std::max(max_molecules_stats.num_pins, cur_molecule_stats.num_pins); - max_molecules_stats.num_input_pins = std::max(max_molecules_stats.num_input_pins, cur_molecule_stats.num_input_pins); - max_molecules_stats.num_output_pins = std::max(max_molecules_stats.num_output_pins, cur_molecule_stats.num_output_pins); - - max_molecules_stats.num_used_ext_pins = std::max(max_molecules_stats.num_used_ext_pins, cur_molecule_stats.num_used_ext_pins); - max_molecules_stats.num_used_ext_inputs = std::max(max_molecules_stats.num_used_ext_inputs, cur_molecule_stats.num_used_ext_inputs); - max_molecules_stats.num_used_ext_outputs = std::max(max_molecules_stats.num_used_ext_outputs, cur_molecule_stats.num_used_ext_outputs); + max_molecules_stats.num_input_pins + = std::max(max_molecules_stats.num_input_pins, cur_molecule_stats.num_input_pins); + max_molecules_stats.num_output_pins + = std::max(max_molecules_stats.num_output_pins, cur_molecule_stats.num_output_pins); + + max_molecules_stats.num_used_ext_pins + = std::max(max_molecules_stats.num_used_ext_pins, cur_molecule_stats.num_used_ext_pins); + max_molecules_stats.num_used_ext_inputs + = std::max(max_molecules_stats.num_used_ext_inputs, cur_molecule_stats.num_used_ext_inputs); + max_molecules_stats.num_used_ext_outputs + = std::max(max_molecules_stats.num_used_ext_outputs, cur_molecule_stats.num_used_ext_outputs); } return max_molecules_stats; @@ -1766,4 +1785,3 @@ void Prepacker::reset() { atom_molecules.clear(); expected_lowest_cost_pb_gnode.clear(); } - diff --git a/vpr/src/pack/prepack.h b/vpr/src/pack/prepack.h index e6ac79cd425..9d05293701a 100644 --- a/vpr/src/pack/prepack.h +++ b/vpr/src/pack/prepack.h @@ -48,7 +48,7 @@ struct t_logical_block_type; * */ class Prepacker { -public: + public: // The constructor is default, the init method performs prepacking. Prepacker() = default; @@ -66,7 +66,7 @@ class Prepacker { * @param atom_nlist The atom netlist to prepack. * @param logical_block_types A list of the logical block types on the device. */ - void init(const AtomNetlist& atom_nlist, const std::vector &logical_block_types); + void init(const AtomNetlist& atom_nlist, const std::vector& logical_block_types); /** * @brief Get the cluster molecule containing the given atom block. @@ -164,7 +164,7 @@ class Prepacker { /// @brief Destructor of the prepacker class. Calls the reset method. ~Prepacker() { reset(); } -private: + private: /** * @brief A linked list of all the packing molecules that are loaded in * prepacking stage. diff --git a/vpr/src/pack/sync_netlists_to_routing_flat.cpp b/vpr/src/pack/sync_netlists_to_routing_flat.cpp index 01ab9d7866c..5aab530ae1f 100644 --- a/vpr/src/pack/sync_netlists_to_routing_flat.cpp +++ b/vpr/src/pack/sync_netlists_to_routing_flat.cpp @@ -1,8 +1,8 @@ /** -* @file sync_netlists_to_routing_flat.cpp -* -* @brief Implementation for \see sync_netlists_to_routing_flat(). -*/ + * @file sync_netlists_to_routing_flat.cpp + * + * @brief Implementation for \see sync_netlists_to_routing_flat(). + */ #include "clustered_netlist_fwd.h" #include "clustered_netlist_utils.h" @@ -24,13 +24,17 @@ /* Static function decls (file-scope) */ /** Get intra-cluster connections from a given RouteTree. Output pairs to \p out_connections . */ -static void get_intra_cluster_connections(const RouteTree& tree, std::vector>& out_connections); +static void get_intra_cluster_connections(const RouteTree& tree, + std::vector>& out_connections); /** Rudimentary intra-cluster router between two pb_graph pins. * This is needed because the flat router compresses the RRG reducing singular paths into nodes. * We need to unpack it to get valid packing results, which is the purpose of this simple BFS router. * Outputs the path to the pb_routes field of \p out_pb . */ -static void route_intra_cluster_conn(const t_pb_graph_pin* source_pin, const t_pb_graph_pin* sink_pin, AtomNetId net_id, t_pb* out_pb); +static void route_intra_cluster_conn(const t_pb_graph_pin* source_pin, + const t_pb_graph_pin* sink_pin, + AtomNetId net_id, + t_pb* out_pb); /** Rebuild the pb.pb_routes struct for each cluster block from flat routing results. * The pb_routes struct holds all intra-cluster routing. */ @@ -44,20 +48,19 @@ static void sync_clustered_netlist_to_routing(void); * (i.e. the primitive has equivalent input pins and flat routing used a different pin) */ static void fixup_atom_pb_graph_pin_mapping(void); - /* Function definitions */ /** Is the clock net found in the routing results? * (If not, clock_modeling is probably ideal and we should preserve clock routing while rebuilding.) */ -inline bool is_clock_net_routed(void){ +inline bool is_clock_net_routed(void) { auto& atom_ctx = g_vpr_ctx.atom(); auto& route_ctx = g_vpr_ctx.routing(); - for(auto net_id: atom_ctx.nlist.nets()){ + for (auto net_id : atom_ctx.nlist.nets()) { auto& tree = route_ctx.route_trees[net_id]; - if(!tree) + if (!tree) continue; - if(route_ctx.is_clock_net[net_id]) /* Clock net has routing */ + if (route_ctx.is_clock_net[net_id]) /* Clock net has routing */ return true; } @@ -65,53 +68,50 @@ inline bool is_clock_net_routed(void){ } /** Get the ClusterBlockId for a given RRNodeId. */ -inline ClusterBlockId get_cluster_block_from_rr_node(RRNodeId inode){ +inline ClusterBlockId get_cluster_block_from_rr_node(RRNodeId inode) { auto& device_ctx = g_vpr_ctx.device(); auto& place_ctx = g_vpr_ctx.placement(); auto& rr_graph = device_ctx.rr_graph; - auto physical_tile = device_ctx.grid.get_physical_type({ - rr_graph.node_xlow(inode), - rr_graph.node_ylow(inode), - rr_graph.node_layer(inode) - }); + auto physical_tile = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(inode), rr_graph.node_ylow(inode), rr_graph.node_layer(inode)}); int source_pin = rr_graph.node_pin_num(inode); auto [_, subtile] = get_sub_tile_from_pin_physical_num(physical_tile, source_pin); - ClusterBlockId clb = place_ctx.grid_blocks().block_at_location({ - rr_graph.node_xlow(inode), - rr_graph.node_ylow(inode), - subtile, - rr_graph.node_layer(inode) - }); + ClusterBlockId clb = place_ctx.grid_blocks().block_at_location( + {rr_graph.node_xlow(inode), rr_graph.node_ylow(inode), subtile, rr_graph.node_layer(inode)}); return clb; } -static void get_intra_cluster_connections(const RouteTree& tree, std::vector>& out_connections){ +static void get_intra_cluster_connections(const RouteTree& tree, + std::vector>& out_connections) { auto& rr_graph = g_vpr_ctx.device().rr_graph; - for(auto& node: tree.all_nodes()){ + for (auto& node : tree.all_nodes()) { const auto& parent = node.parent(); - if(!parent) /* Root */ + if (!parent) /* Root */ continue; /* Find the case where both nodes are IPIN/OPINs and on the same block */ auto type = rr_graph.node_type(node.inode); auto parent_type = rr_graph.node_type(parent->inode); - if((type == IPIN || type == OPIN) && (parent_type == IPIN || parent_type == OPIN)){ + if ((type == IPIN || type == OPIN) && (parent_type == IPIN || parent_type == OPIN)) { auto clb = get_cluster_block_from_rr_node(node.inode); auto parent_clb = get_cluster_block_from_rr_node(parent->inode); - if(clb == parent_clb) + if (clb == parent_clb) out_connections.push_back({parent->inode, node.inode}); } } } -static void route_intra_cluster_conn(const t_pb_graph_pin* source_pin, const t_pb_graph_pin* sink_pin, AtomNetId net_id, t_pb* out_pb){ +static void route_intra_cluster_conn(const t_pb_graph_pin* source_pin, + const t_pb_graph_pin* sink_pin, + AtomNetId net_id, + t_pb* out_pb) { std::unordered_set visited; std::deque queue; std::unordered_map prev; @@ -121,31 +121,31 @@ static void route_intra_cluster_conn(const t_pb_graph_pin* source_pin, const t_p queue.push_back(source_pin); prev[source_pin] = NULL; - while(!queue.empty()){ + while (!queue.empty()) { const t_pb_graph_pin* cur_pin = queue.front(); queue.pop_front(); - if(visited.count(cur_pin)) + if (visited.count(cur_pin)) continue; visited.insert(cur_pin); /* Backtrack and return */ - if(cur_pin == sink_pin){ + if (cur_pin == sink_pin) { break; } - for(auto& edge: cur_pin->output_edges){ + for (auto& edge : cur_pin->output_edges) { VTR_ASSERT(edge->num_output_pins == 1); queue.push_back(edge->output_pins[0]); prev[edge->output_pins[0]] = cur_pin; } } - + VTR_ASSERT_MSG(visited.count(sink_pin), "Couldn't find sink pin"); /* Collect path: we need to build pb_routes from source to sink */ std::vector path; const t_pb_graph_pin* cur_pin = sink_pin; - while(cur_pin != source_pin){ + while (cur_pin != source_pin) { path.push_back(cur_pin); cur_pin = prev[cur_pin]; } @@ -153,25 +153,20 @@ static void route_intra_cluster_conn(const t_pb_graph_pin* source_pin, const t_p /* Output the path into out_pb, starting from source. This is where the pb_route is updated */ int prev_pin_id = -1; - for(auto it = path.rbegin(); it != path.rend(); ++it){ + for (auto it = path.rbegin(); it != path.rend(); ++it) { cur_pin = *it; int cur_pin_id = cur_pin->pin_count_in_cluster; t_pb_route* cur_pb_route; - if(out_pb_routes.count(cur_pin_id)) + if (out_pb_routes.count(cur_pin_id)) cur_pb_route = &out_pb_routes[cur_pin_id]; else { - t_pb_route pb_route = { - net_id, - -1, - {}, - cur_pin - }; + t_pb_route pb_route = {net_id, -1, {}, cur_pin}; out_pb_routes.insert(std::make_pair<>(cur_pin_id, pb_route)); cur_pb_route = &out_pb_routes[cur_pin_id]; } - if(prev_pin_id != -1){ + if (prev_pin_id != -1) { t_pb_route& prev_pb_route = out_pb_routes[prev_pin_id]; prev_pb_route.sink_pb_pin_ids.push_back(cur_pin_id); cur_pb_route->driver_pb_pin_id = prev_pb_route.pb_graph_pin->pin_count_in_cluster; @@ -181,7 +176,7 @@ static void route_intra_cluster_conn(const t_pb_graph_pin* source_pin, const t_p } } -static void sync_pb_routes_to_routing(void){ +static void sync_pb_routes_to_routing(void) { auto& device_ctx = g_vpr_ctx.device(); auto& atom_ctx = g_vpr_ctx.atom(); auto& cluster_ctx = g_vpr_ctx.mutable_clustering(); @@ -198,20 +193,20 @@ static void sync_pb_routes_to_routing(void){ * Otherwise we won't have data to rebuild them */ std::vector pins_to_erase; auto& pb_routes = cluster_ctx.clb_nlist.block_pb(clb_blk_id)->pb_route; - for(auto& [pin, pb_route]: pb_routes){ - if(clock_net_is_routed || !route_ctx.is_clock_net[pb_route.atom_net_id]) + for (auto& [pin, pb_route] : pb_routes) { + if (clock_net_is_routed || !route_ctx.is_clock_net[pb_route.atom_net_id]) pins_to_erase.push_back(pin); } - for(int pin: pins_to_erase){ + for (int pin : pins_to_erase) { pb_routes.erase(pin); } } /* Go through each route tree and rebuild the pb_routes */ - for(ParentNetId net_id: atom_ctx.nlist.nets()){ + for (ParentNetId net_id : atom_ctx.nlist.nets()) { auto& tree = route_ctx.route_trees[net_id]; - if(!tree) + if (!tree) continue; /* No routing at this ParentNetId */ /* Get all intrablock connections */ @@ -219,34 +214,29 @@ static void sync_pb_routes_to_routing(void){ get_intra_cluster_connections(tree.value(), conns_to_restore); /* Restore the connections */ - for(auto [source_inode, sink_inode]: conns_to_restore){ - auto physical_tile = device_ctx.grid.get_physical_type({ - rr_graph.node_xlow(source_inode), - rr_graph.node_ylow(source_inode), - rr_graph.node_layer(source_inode) - }); + for (auto [source_inode, sink_inode] : conns_to_restore) { + auto physical_tile + = device_ctx.grid.get_physical_type({rr_graph.node_xlow(source_inode), rr_graph.node_ylow(source_inode), + rr_graph.node_layer(source_inode)}); int source_pin = rr_graph.node_pin_num(source_inode); int sink_pin = rr_graph.node_pin_num(sink_inode); auto [_, subtile] = get_sub_tile_from_pin_physical_num(physical_tile, source_pin); - ClusterBlockId clb = place_ctx.grid_blocks().block_at_location({ - rr_graph.node_xlow(source_inode), - rr_graph.node_ylow(source_inode), - subtile, - rr_graph.node_layer(source_inode) - }); + ClusterBlockId clb = place_ctx.grid_blocks().block_at_location({rr_graph.node_xlow(source_inode), + rr_graph.node_ylow(source_inode), subtile, + rr_graph.node_layer(source_inode)}); /* Look up pb graph pins from pb type if pin is not on tile, look up from block otherwise */ - const t_pb_graph_pin* source_pb_graph_pin, *sink_pb_graph_pin; - if(is_pin_on_tile(physical_tile, sink_pin)){ + const t_pb_graph_pin *source_pb_graph_pin, *sink_pb_graph_pin; + if (is_pin_on_tile(physical_tile, sink_pin)) { sink_pb_graph_pin = get_pb_graph_node_pin_from_block_pin(clb, sink_pin); - }else{ + } else { sink_pb_graph_pin = get_pb_pin_from_pin_physical_num(physical_tile, sink_pin); } - if(is_pin_on_tile(physical_tile, source_pin)){ + if (is_pin_on_tile(physical_tile, source_pin)) { source_pb_graph_pin = get_pb_graph_node_pin_from_block_pin(clb, source_pin); - }else{ + } else { source_pb_graph_pin = get_pb_pin_from_pin_physical_num(physical_tile, source_pin); } @@ -261,18 +251,18 @@ static void sync_pb_routes_to_routing(void){ /** Rebuild the ClusterNetId <-> AtomNetId lookup after compressing the ClusterNetlist. * Needs the old ClusterNetIds in atom_ctx.lookup. Won't work after calling compress() twice, * since we won't have access to the old IDs in the IdRemapper anywhere. */ -inline void rebuild_atom_nets_lookup(ClusteredNetlist::IdRemapper& remapped){ +inline void rebuild_atom_nets_lookup(ClusteredNetlist::IdRemapper& remapped) { auto& atom_ctx = g_vpr_ctx.mutable_atom(); auto& atom_lookup = atom_ctx.lookup; - for(auto parent_net_id: atom_ctx.nlist.nets()){ + for (auto parent_net_id : atom_ctx.nlist.nets()) { auto atom_net_id = convert_to_atom_net_id(parent_net_id); auto old_clb_nets_opt = atom_lookup.clb_nets(atom_net_id); - if(!old_clb_nets_opt) + if (!old_clb_nets_opt) continue; std::vector old_clb_nets = old_clb_nets_opt.value(); atom_lookup.remove_atom_net(atom_net_id); - for(auto old_clb_net: old_clb_nets){ + for (auto old_clb_net : old_clb_nets) { ClusterNetId new_clb_net = remapped.new_net_id(old_clb_net); atom_lookup.add_atom_clb_net(atom_net_id, new_clb_net); } @@ -280,7 +270,7 @@ inline void rebuild_atom_nets_lookup(ClusteredNetlist::IdRemapper& remapped){ } /** Regenerate clustered netlist nets from routing results */ -static void sync_clustered_netlist_to_routing(void){ +static void sync_clustered_netlist_to_routing(void) { auto& cluster_ctx = g_vpr_ctx.mutable_clustering(); auto& place_ctx = g_vpr_ctx.mutable_placement(); auto& route_ctx = g_vpr_ctx.routing(); @@ -299,25 +289,25 @@ static void sync_clustered_netlist_to_routing(void){ std::vector pins_to_remove; std::vector ports_to_remove; - for(auto net_id: clb_netlist.nets()){ + for (auto net_id : clb_netlist.nets()) { auto atom_net_id = atom_lookup.atom_net(net_id); - if(!clock_net_is_routed && route_ctx.is_clock_net[atom_net_id]) + if (!clock_net_is_routed && route_ctx.is_clock_net[atom_net_id]) continue; nets_to_remove.push_back(net_id); } - for(auto pin_id: clb_netlist.pins()){ + for (auto pin_id : clb_netlist.pins()) { ClusterNetId clb_net_id = clb_netlist.pin_net(pin_id); auto atom_net_id = atom_lookup.atom_net(clb_net_id); - if(!clock_net_is_routed && atom_net_id && route_ctx.is_clock_net[atom_net_id]) + if (!clock_net_is_routed && atom_net_id && route_ctx.is_clock_net[atom_net_id]) continue; pins_to_remove.push_back(pin_id); } - for(auto port_id: clb_netlist.ports()){ + for (auto port_id : clb_netlist.ports()) { ClusterNetId clb_net_id = clb_netlist.port_net(port_id, 0); auto atom_net_id = atom_lookup.atom_net(clb_net_id); - if(!clock_net_is_routed && atom_net_id && route_ctx.is_clock_net[atom_net_id]) + if (!clock_net_is_routed && atom_net_id && route_ctx.is_clock_net[atom_net_id]) continue; ports_to_remove.push_back(port_id); @@ -325,14 +315,14 @@ static void sync_clustered_netlist_to_routing(void){ /* ClusteredNetlist's iterators rely on internal lookups, so we mark for removal * while iterating, then remove in bulk */ - for(auto net_id: nets_to_remove){ + for (auto net_id : nets_to_remove) { clb_netlist.remove_net(net_id); atom_lookup.remove_clb_net(net_id); } - for(auto pin_id: pins_to_remove){ + for (auto pin_id : pins_to_remove) { clb_netlist.remove_pin(pin_id); } - for(auto port_id: ports_to_remove){ + for (auto port_id : ports_to_remove) { clb_netlist.remove_port(port_id); } @@ -342,43 +332,38 @@ static void sync_clustered_netlist_to_routing(void){ /* 3. Walk each routing in the atom netlist. If a node is on the tile, add a ClusterPinId for it. * Add the associated net and port too if they don't exist */ - for(auto parent_net_id: atom_ctx.nlist.nets()){ + for (auto parent_net_id : atom_ctx.nlist.nets()) { auto& tree = route_ctx.route_trees[parent_net_id]; AtomNetId atom_net_id = convert_to_atom_net_id(parent_net_id); ClusterNetId clb_net_id; int clb_nets_so_far = 0; - for(auto& rt_node: tree->all_nodes()){ + for (auto& rt_node : tree->all_nodes()) { auto node_type = rr_graph.node_type(rt_node.inode); - if(node_type != IPIN && node_type != OPIN) + if (node_type != IPIN && node_type != OPIN) continue; - auto physical_tile = device_ctx.grid.get_physical_type({ - rr_graph.node_xlow(rt_node.inode), - rr_graph.node_ylow(rt_node.inode), - rr_graph.node_layer(rt_node.inode) - }); + auto physical_tile = device_ctx.grid.get_physical_type({rr_graph.node_xlow(rt_node.inode), + rr_graph.node_ylow(rt_node.inode), + rr_graph.node_layer(rt_node.inode)}); int pin_index = rr_graph.node_pin_num(rt_node.inode); auto [_, subtile] = get_sub_tile_from_pin_physical_num(physical_tile, pin_index); - ClusterBlockId clb = place_ctx.grid_blocks().block_at_location({ - rr_graph.node_xlow(rt_node.inode), - rr_graph.node_ylow(rt_node.inode), - subtile, - rr_graph.node_layer(rt_node.inode) - }); + ClusterBlockId clb = place_ctx.grid_blocks().block_at_location({rr_graph.node_xlow(rt_node.inode), + rr_graph.node_ylow(rt_node.inode), subtile, + rr_graph.node_layer(rt_node.inode)}); - if(!is_pin_on_tile(physical_tile, pin_index)) + if (!is_pin_on_tile(physical_tile, pin_index)) continue; /* OPIN on the tile: create a new clb_net_id and add all ports & pins into here * Due to how the route tree is traversed, all nodes until the next OPIN on the tile will * be under this OPIN, so this is valid (we don't need to get the branch explicitly) */ - if(node_type == OPIN){ + if (node_type == OPIN) { std::string net_name; - if(clb_nets_so_far == 0) + if (clb_nets_so_far == 0) net_name = atom_ctx.nlist.net_name(parent_net_id); else net_name = atom_ctx.nlist.net_name(parent_net_id) + "_" + std::to_string(clb_nets_so_far); @@ -390,21 +375,23 @@ static void sync_clustered_netlist_to_routing(void){ t_pb_graph_pin* pb_graph_pin = get_pb_graph_node_pin_from_block_pin(clb, pin_index); ClusterPortId port_id = clb_netlist.find_port(clb, pb_graph_pin->port->name); - if(!port_id){ + if (!port_id) { PortType port_type; - if(pb_graph_pin->port->is_clock) + if (pb_graph_pin->port->is_clock) port_type = PortType::CLOCK; - else if(pb_graph_pin->port->type == IN_PORT) + else if (pb_graph_pin->port->type == IN_PORT) port_type = PortType::INPUT; - else if(pb_graph_pin->port->type == OUT_PORT) + else if (pb_graph_pin->port->type == OUT_PORT) port_type = PortType::OUTPUT; else VTR_ASSERT_MSG(false, "Unsupported port type"); - port_id = clb_netlist.create_port(clb, pb_graph_pin->port->name, pb_graph_pin->port->num_pins, port_type); + port_id + = clb_netlist.create_port(clb, pb_graph_pin->port->name, pb_graph_pin->port->num_pins, port_type); } PinType pin_type = node_type == OPIN ? PinType::DRIVER : PinType::SINK; - ClusterPinId new_pin = clb_netlist.create_pin(port_id, pb_graph_pin->pin_number, clb_net_id, pin_type, pb_graph_pin->pin_count_in_cluster); + ClusterPinId new_pin = clb_netlist.create_pin(port_id, pb_graph_pin->pin_number, clb_net_id, pin_type, + pb_graph_pin->pin_count_in_cluster); clb_netlist.set_pin_net(new_pin, pin_type, clb_net_id); } } @@ -416,38 +403,38 @@ static void sync_clustered_netlist_to_routing(void){ auto& blk_loc_registry = place_ctx.mutable_blk_loc_registry(); auto& physical_pins = place_ctx.mutable_physical_pins(); physical_pins.clear(); - for(auto clb: clb_netlist.blocks()){ + for (auto clb : clb_netlist.blocks()) { blk_loc_registry.place_sync_external_block_connections(clb); } } -static void fixup_atom_pb_graph_pin_mapping(void){ +static void fixup_atom_pb_graph_pin_mapping(void) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& atom_ctx = g_vpr_ctx.mutable_atom(); - for(ClusterBlockId clb: cluster_ctx.clb_nlist.blocks()){ + for (ClusterBlockId clb : cluster_ctx.clb_nlist.blocks()) { /* Collect all innermost pb routes */ std::vector sink_pb_route_ids; t_pb* clb_pb = cluster_ctx.clb_nlist.block_pb(clb); - for(auto [pb_route_id, pb_route]: clb_pb->pb_route){ - if(pb_route.sink_pb_pin_ids.empty()) + for (auto [pb_route_id, pb_route] : clb_pb->pb_route) { + if (pb_route.sink_pb_pin_ids.empty()) sink_pb_route_ids.push_back(pb_route_id); } - for(int sink_pb_route_id: sink_pb_route_ids){ + for (int sink_pb_route_id : sink_pb_route_ids) { t_pb_route& pb_route = clb_pb->pb_route.at(sink_pb_route_id); const t_pb_graph_pin* atom_pbg_pin = pb_route.pb_graph_pin; t_pb* atom_pb = clb_pb->find_mutable_pb(atom_pbg_pin->parent_node); AtomBlockId atb = atom_ctx.lookup.pb_atom(atom_pb); - if(!atb) + if (!atb) continue; /* Find atom port from pbg pin's model port */ AtomPortId atom_port = atom_ctx.nlist.find_atom_port(atb, atom_pbg_pin->port->model_port); - for(AtomPinId atom_pin: atom_ctx.nlist.port_pins(atom_port)){ + for (AtomPinId atom_pin : atom_ctx.nlist.port_pins(atom_port)) { /* Match net IDs from pb_route and atom netlist and connect in lookup */ - if(pb_route.atom_net_id == atom_ctx.nlist.pin_net(atom_pin)){ + if (pb_route.atom_net_id == atom_ctx.nlist.pin_net(atom_pin)) { atom_ctx.lookup.set_atom_pin_pb_graph_pin(atom_pin, atom_pbg_pin); atom_pb->set_atom_pin_bit_index(atom_pbg_pin, atom_ctx.nlist.pin_port_bit(atom_pin)); } diff --git a/vpr/src/pack/sync_netlists_to_routing_flat.h b/vpr/src/pack/sync_netlists_to_routing_flat.h index 9403eb1c2a9..0c1bc7d77d3 100644 --- a/vpr/src/pack/sync_netlists_to_routing_flat.h +++ b/vpr/src/pack/sync_netlists_to_routing_flat.h @@ -1,6 +1,6 @@ #include "netlist.h" - /******************************************************************** +/******************************************************************** * Top-level function to synchronize packing results to routing results. * Flat routing invalidates the ClusteredNetlist since nets may be routed * inside or outside a block and changes virtually all intrablock routing. diff --git a/vpr/src/place/RL_agent_util.cpp b/vpr/src/place/RL_agent_util.cpp index 19ed06edd9c..78937bedbea 100644 --- a/vpr/src/place/RL_agent_util.cpp +++ b/vpr/src/place/RL_agent_util.cpp @@ -2,14 +2,14 @@ #include "static_move_generator.h" #include "manual_move_generator.h" -std::pair, std::unique_ptr> create_move_generators(PlacerState& placer_state, - const t_placer_opts& placer_opts, - int move_lim, - double noc_attraction_weight) { +std::pair, std::unique_ptr> create_move_generators( + PlacerState& placer_state, + const t_placer_opts& placer_opts, + int move_lim, + double noc_attraction_weight) { e_reward_function reward_fun = string_to_reward(placer_opts.place_reward_fun); std::pair, std::unique_ptr> move_generators; - if (!placer_opts.RL_agent_placement) { // RL agent is disabled auto move_types = placer_opts.place_static_move_prob; move_types.resize((int)e_move_type::NUMBER_OF_AUTO_MOVES, 0.0f); @@ -17,12 +17,12 @@ std::pair, std::unique_ptr> create VTR_LOG("Using static probabilities for choosing each move type\n"); for (const auto move_type : placer_opts.place_static_move_prob.keys()) { const std::string& move_name = move_type_to_string(move_type); - VTR_LOG("Probability of %s : %f \n", - move_name.c_str(), - placer_opts.place_static_move_prob[move_type]); + VTR_LOG("Probability of %s : %f \n", move_name.c_str(), placer_opts.place_static_move_prob[move_type]); } - move_generators.first = std::make_unique(placer_state, reward_fun, placer_opts.place_static_move_prob); - move_generators.second = std::make_unique(placer_state, reward_fun, placer_opts.place_static_move_prob); + move_generators.first + = std::make_unique(placer_state, reward_fun, placer_opts.place_static_move_prob); + move_generators.second + = std::make_unique(placer_state, reward_fun, placer_opts.place_static_move_prob); } else { //RL based placement /* For the non timing driven placement: the agent has a single state * * - Available moves are (Uniform / Median / Centroid) * @@ -43,15 +43,18 @@ std::pair, std::unique_ptr> create * only move type. * * This state is activated late in the anneal and in the Quench */ - std::vector first_state_avail_moves{e_move_type::UNIFORM, e_move_type::MEDIAN, e_move_type::CENTROID}; + std::vector first_state_avail_moves{e_move_type::UNIFORM, e_move_type::MEDIAN, + e_move_type::CENTROID}; if (placer_opts.place_algorithm.is_timing_driven()) { first_state_avail_moves.push_back(e_move_type::W_CENTROID); } - std::vector second_state_avail_moves{e_move_type::UNIFORM, e_move_type::MEDIAN, e_move_type::CENTROID}; + std::vector second_state_avail_moves{e_move_type::UNIFORM, e_move_type::MEDIAN, + e_move_type::CENTROID}; if (placer_opts.place_algorithm.is_timing_driven()) { second_state_avail_moves.insert(second_state_avail_moves.end(), - {e_move_type::W_CENTROID, e_move_type::W_MEDIAN, e_move_type::CRIT_UNIFORM, e_move_type::FEASIBLE_REGION}); + {e_move_type::W_CENTROID, e_move_type::W_MEDIAN, e_move_type::CRIT_UNIFORM, + e_move_type::FEASIBLE_REGION}); } if (noc_attraction_weight > 0.0f) { @@ -64,58 +67,46 @@ std::pair, std::unique_ptr> create //agent's 1st state if (placer_opts.place_agent_space == e_agent_space::MOVE_BLOCK_TYPE) { VTR_LOG("Using simple RL 'Epsilon Greedy agent' for choosing move and block types\n"); - karmed_bandit_agent1 = std::make_unique(first_state_avail_moves, - e_agent_space::MOVE_BLOCK_TYPE, - placer_opts.place_agent_epsilon); + karmed_bandit_agent1 = std::make_unique( + first_state_avail_moves, e_agent_space::MOVE_BLOCK_TYPE, placer_opts.place_agent_epsilon); } else { VTR_LOG("Using simple RL 'Epsilon Greedy agent' for choosing move types\n"); - karmed_bandit_agent1 = std::make_unique(first_state_avail_moves, - e_agent_space::MOVE_TYPE, - placer_opts.place_agent_epsilon); + karmed_bandit_agent1 = std::make_unique( + first_state_avail_moves, e_agent_space::MOVE_TYPE, placer_opts.place_agent_epsilon); } karmed_bandit_agent1->set_step(placer_opts.place_agent_gamma, move_lim); - move_generators.first = std::make_unique(placer_state, - reward_fun, - karmed_bandit_agent1, - noc_attraction_weight, - placer_opts.place_high_fanout_net); + move_generators.first + = std::make_unique(placer_state, reward_fun, karmed_bandit_agent1, + noc_attraction_weight, placer_opts.place_high_fanout_net); //agent's 2nd state - karmed_bandit_agent2 = std::make_unique(second_state_avail_moves, - e_agent_space::MOVE_TYPE, - placer_opts.place_agent_epsilon); + karmed_bandit_agent2 = std::make_unique( + second_state_avail_moves, e_agent_space::MOVE_TYPE, placer_opts.place_agent_epsilon); karmed_bandit_agent2->set_step(placer_opts.place_agent_gamma, move_lim); - move_generators.second = std::make_unique(placer_state, - reward_fun, - karmed_bandit_agent2, - noc_attraction_weight, - placer_opts.place_high_fanout_net); + move_generators.second + = std::make_unique(placer_state, reward_fun, karmed_bandit_agent2, + noc_attraction_weight, placer_opts.place_high_fanout_net); } else { std::unique_ptr karmed_bandit_agent1, karmed_bandit_agent2; //agent's 1st state if (placer_opts.place_agent_space == e_agent_space::MOVE_BLOCK_TYPE) { VTR_LOG("Using simple RL 'Softmax agent' for choosing move and block types\n"); - karmed_bandit_agent1 = std::make_unique(first_state_avail_moves, - e_agent_space::MOVE_BLOCK_TYPE); + karmed_bandit_agent1 + = std::make_unique(first_state_avail_moves, e_agent_space::MOVE_BLOCK_TYPE); } else { VTR_LOG("Using simple RL 'Softmax agent' for choosing move types\n"); - karmed_bandit_agent1 = std::make_unique(first_state_avail_moves, - e_agent_space::MOVE_TYPE); + karmed_bandit_agent1 + = std::make_unique(first_state_avail_moves, e_agent_space::MOVE_TYPE); } karmed_bandit_agent1->set_step(placer_opts.place_agent_gamma, move_lim); - move_generators.first = std::make_unique(placer_state, - reward_fun, - karmed_bandit_agent1, - noc_attraction_weight, - placer_opts.place_high_fanout_net); + move_generators.first + = std::make_unique(placer_state, reward_fun, karmed_bandit_agent1, + noc_attraction_weight, placer_opts.place_high_fanout_net); //agent's 2nd state - karmed_bandit_agent2 = std::make_unique(second_state_avail_moves, - e_agent_space::MOVE_TYPE); + karmed_bandit_agent2 = std::make_unique(second_state_avail_moves, e_agent_space::MOVE_TYPE); karmed_bandit_agent2->set_step(placer_opts.place_agent_gamma, move_lim); - move_generators.second = std::make_unique(placer_state, - reward_fun, - karmed_bandit_agent2, - noc_attraction_weight, - placer_opts.place_high_fanout_net); + move_generators.second + = std::make_unique(placer_state, reward_fun, karmed_bandit_agent2, + noc_attraction_weight, placer_opts.place_high_fanout_net); } } diff --git a/vpr/src/place/RL_agent_util.h b/vpr/src/place/RL_agent_util.h index afe8bf3b6cb..87a6b689124 100644 --- a/vpr/src/place/RL_agent_util.h +++ b/vpr/src/place/RL_agent_util.h @@ -4,10 +4,7 @@ #include "move_generator.h" //enum represents the available agent states -enum class e_agent_state { - EARLY_IN_THE_ANNEAL, - LATE_IN_THE_ANNEAL -}; +enum class e_agent_state { EARLY_IN_THE_ANNEAL, LATE_IN_THE_ANNEAL }; /** * @brief Creates the move generators that will be used by the annealer @@ -25,10 +22,11 @@ enum class e_agent_state { * in the first and second states of the agent. * */ -std::pair, std::unique_ptr> create_move_generators(PlacerState& placer_state, - const t_placer_opts& placer_opts, - int move_lim, - double noc_attraction_weight); +std::pair, std::unique_ptr> create_move_generators( + PlacerState& placer_state, + const t_placer_opts& placer_opts, + int move_lim, + double noc_attraction_weight); /** * @brief copy one of the available move_generators to be the current move_generator that would be used in the placement based on the placer_options and the agent state diff --git a/vpr/src/place/analytic_placer.cpp b/vpr/src/place/analytic_placer.cpp index 4bb632fbdb7..fde80d624fb 100644 --- a/vpr/src/place/analytic_placer.cpp +++ b/vpr/src/place/analytic_placer.cpp @@ -1,20 +1,20 @@ #ifdef ENABLE_ANALYTIC_PLACE -# include "analytic_placer.h" -# include -# include -# include -# include -# include - -# include "vpr_types.h" -# include "vtr_time.h" -# include "read_place.h" -# include "globals.h" -# include "vtr_log.h" -# include "cut_spreader.h" -# include "vpr_utils.h" -# include "place_util.h" +#include "analytic_placer.h" +#include +#include +#include +#include +#include + +#include "vpr_types.h" +#include "vtr_time.h" +#include "read_place.h" +#include "globals.h" +#include "vtr_log.h" +#include "cut_spreader.h" +#include "vpr_utils.h" +#include "place_util.h" // Templated struct for constructing and solving matrix equations in analytic placer template @@ -180,8 +180,8 @@ void AnalyticPlacer::ap_place() { init(); // transfer placement from g_vpr_ctx to AnalyticPlacer data members build_legal_locations(); int hpwl = total_hpwl(); - VTR_LOG("Creating analytic placement for %d cells, random placement hpwl = %d.\n", - int(clb_nlist.blocks().size()), int(hpwl)); + VTR_LOG("Creating analytic placement for %d cells, random placement hpwl = %d.\n", int(clb_nlist.blocks().size()), + int(hpwl)); // the order in which different logical block types are placed; // going through ap_runs once completes 1 iteration of AP @@ -256,8 +256,8 @@ void AnalyticPlacer::ap_place() { // upper bound placement complete run_t = timer.elapsed_sec() - run_start; - print_run_stats(iter, timer.elapsed_sec(), run_t, blk_type->name, solve_blks.size(), solve_t, - spread_t, legal_t, solved_hpwl, spread_hpwl, legal_hpwl); + print_run_stats(iter, timer.elapsed_sec(), run_t, blk_type->name, solve_blks.size(), solve_t, spread_t, + legal_t, solved_hpwl, spread_hpwl, legal_hpwl); } // TODO: update timing info here after timing weights are implemented in build_equations() @@ -308,7 +308,8 @@ void AnalyticPlacer::init() { for (auto blk_id : clb_nlist.blocks()) { blk_locs.insert(blk_id, BlockLocation{}); blk_locs[blk_id].loc = init_block_locs[blk_id].loc; // transfer of initial placement - row_num.insert(blk_id, DONT_SOLVE); // no blocks are moved by default, until they are setup in setup_solve_blks() + row_num.insert(blk_id, + DONT_SOLVE); // no blocks are moved by default, until they are setup in setup_solve_blks() } // only blocks with connections are considered @@ -597,7 +598,8 @@ void AnalyticPlacer::build_equations(EquationSystem& es, bool yaxis, int // Return the x or y position of a block auto blk_p = [&](ClusterBlockId blk_id) { return yaxis ? blk_locs[blk_id].loc.y : blk_locs[blk_id].loc.x; }; // Return legal position from legalization, after first iteration - auto legal_p = [&](ClusterBlockId blk_id) { return yaxis ? blk_locs[blk_id].legal_loc.y : blk_locs[blk_id].legal_loc.x; }; + auto legal_p + = [&](ClusterBlockId blk_id) { return yaxis ? blk_locs[blk_id].legal_loc.y : blk_locs[blk_id].legal_loc.x; }; es.reset(); /* @@ -607,8 +609,7 @@ void AnalyticPlacer::build_equations(EquationSystem& es, bool yaxis, int * These connections are used to formulate the matrix equation */ for (auto net_id : clb_nlist.nets()) { - if (clb_nlist.net_is_ignored(net_id) - || clb_nlist.net_driver(net_id) == ClusterPinId::INVALID() + if (clb_nlist.net_is_ignored(net_id) || clb_nlist.net_driver(net_id) == ClusterPinId::INVALID() || clb_nlist.net_sinks(net_id).empty()) { // ensure net is not ignored (ex. clk nets), has valid driver, has at least 1 sink continue; @@ -677,7 +678,8 @@ void AnalyticPlacer::solve_equations(EquationSystem& es, bool yaxis) { int max_y = g_vpr_ctx.device().grid.height(); auto blk_pos = [&](ClusterBlockId blk_id) { return yaxis ? blk_locs[blk_id].rawy : blk_locs[blk_id].rawx; }; - std::vector solve_blks_pos; // each row of solve_blks_pos is a free variable (movable block of the right type to be placed) + std::vector + solve_blks_pos; // each row of solve_blks_pos is a free variable (movable block of the right type to be placed) // put current location of solve_blks into solve_blks_pos as guess for iterative solver std::transform(solve_blks.begin(), solve_blks.end(), std::back_inserter(solve_blks_pos), blk_pos); es.solve(solve_blks_pos, ap_cfg.solverTolerance); @@ -687,10 +689,12 @@ void AnalyticPlacer::solve_equations(EquationSystem& es, bool yaxis) { for (size_t i_row = 0; i_row < solve_blks_pos.size(); i_row++) if (yaxis) { blk_locs[solve_blks.at(i_row)].rawy = std::max(0.0, solve_blks_pos.at(i_row)); - blk_locs[solve_blks.at(i_row)].loc.y = std::min(max_y - 1, std::max(0, int(solve_blks_pos.at(i_row) + 0.5))); + blk_locs[solve_blks.at(i_row)].loc.y + = std::min(max_y - 1, std::max(0, int(solve_blks_pos.at(i_row) + 0.5))); } else { blk_locs[solve_blks.at(i_row)].rawx = std::max(0.0, solve_blks_pos.at(i_row)); - blk_locs[solve_blks.at(i_row)].loc.x = std::min(max_x - 1, std::max(0, int(solve_blks_pos.at(i_row) + 0.5))); + blk_locs[solve_blks.at(i_row)].loc.x + = std::min(max_x - 1, std::max(0, int(solve_blks_pos.at(i_row) + 0.5))); } } @@ -749,43 +753,19 @@ void AnalyticPlacer::print_place(const char* place_file) { fp = fopen(place_file, "w"); - fprintf(fp, "Netlist_File: %s Netlist_ID: %s\n", - clb_nlist.netlist_name().c_str(), - clb_nlist.netlist_id().c_str()); + fprintf(fp, "Netlist_File: %s Netlist_ID: %s\n", clb_nlist.netlist_name().c_str(), clb_nlist.netlist_id().c_str()); fprintf(fp, "Array size: %zu x %zu logic blocks\n\n", device_ctx.grid.width(), device_ctx.grid.height()); - fprintf(fp, "%-25s %-18s %-12s %-25s %-5s %-5s %-10s %-14s %-8s\n", - "block name", - "logic block type", - "pb_type", - "pb_name", - "x", - "y", - "subblk", - "block number", - "is_fixed"); - fprintf(fp, "%-25s %-18s %-12s %-25s %-5s %-5s %-10s %-14s %-8s\n", - "----------", - "----------------", - "-------", - "-------", - "--", - "--", - "------", - "------------", - "--------"); + fprintf(fp, "%-25s %-18s %-12s %-25s %-5s %-5s %-10s %-14s %-8s\n", "block name", "logic block type", "pb_type", + "pb_name", "x", "y", "subblk", "block number", "is_fixed"); + fprintf(fp, "%-25s %-18s %-12s %-25s %-5s %-5s %-10s %-14s %-8s\n", "----------", "----------------", "-------", + "-------", "--", "--", "------", "------------", "--------"); if (!block_locs.empty()) { //Only if placement exists for (auto blk_id : clb_nlist.blocks()) { - fprintf(fp, "%-25s %-18s %-12s %-25s %-5d %-5d %-10d #%-13zu %-8s\n", - clb_nlist.block_name(blk_id).c_str(), - clb_nlist.block_type(blk_id)->name, - clb_nlist.block_type(blk_id)->pb_type->name, - clb_nlist.block_pb(blk_id)->name, - blk_locs[blk_id].loc.x, - blk_locs[blk_id].loc.y, - blk_locs[blk_id].loc.sub_tile, - size_t(blk_id), - (block_locs[blk_id].is_fixed ? "true" : "false")); + fprintf(fp, "%-25s %-18s %-12s %-25s %-5d %-5d %-10d #%-13zu %-8s\n", clb_nlist.block_name(blk_id).c_str(), + clb_nlist.block_type(blk_id)->name, clb_nlist.block_type(blk_id)->pb_type->name, + clb_nlist.block_pb(blk_id)->name, blk_locs[blk_id].loc.x, blk_locs[blk_id].loc.y, + blk_locs[blk_id].loc.sub_tile, size_t(blk_id), (block_locs[blk_id].is_fixed ? "true" : "false")); } fprintf(fp, "\ntotal_HPWL: %d\n", total_hpwl()); vtr::Matrix overlap; @@ -798,11 +778,21 @@ void AnalyticPlacer::print_place(const char* place_file) { void AnalyticPlacer::print_AP_status_header() { VTR_LOG("\n"); - VTR_LOG("---- ------ ------ -------- ------- | ------ --------- ------ ------ ------ ------ -------- -------- --------\n"); - VTR_LOG("Iter Time Iter Best Stall | Run BlockType Solve Solve Spread Legal Solved Spread Legal\n"); - VTR_LOG(" Time hpwl | Time Block Time Time Time hpwl hpwl hpwl\n"); - VTR_LOG(" (sec) (sec) | (sec) Num (sec) (sec) (sec) \n"); - VTR_LOG("---- ------ ------ -------- ------- | ------ --------- ------ ------ ------ ------ -------- -------- --------\n"); + VTR_LOG( + "---- ------ ------ -------- ------- | ------ --------- ------ ------ ------ ------ -------- -------- " + "--------\n"); + VTR_LOG( + "Iter Time Iter Best Stall | Run BlockType Solve Solve Spread Legal Solved Spread " + "Legal\n"); + VTR_LOG( + " Time hpwl | Time Block Time Time Time hpwl hpwl " + "hpwl\n"); + VTR_LOG( + " (sec) (sec) | (sec) Num (sec) (sec) (sec) " + "\n"); + VTR_LOG( + "---- ------ ------ -------- ------- | ------ --------- ------ ------ ------ ------ -------- -------- " + "--------\n"); } void AnalyticPlacer::print_run_stats(const int iter, @@ -829,17 +819,7 @@ void AnalyticPlacer::print_run_stats(const int iter, "%8d " "%8d " "%8d \n", - iter, - time, - runTime, - blockType, - blockNum, - solveTime, - spreadTime, - legalTime, - solvedHPWL, - spreadHPWL, - legalHPWL); + iter, time, runTime, blockType, blockNum, solveTime, spreadTime, legalTime, solvedHPWL, spreadHPWL, legalHPWL); } void AnalyticPlacer::print_iter_stats(const int iter, @@ -853,11 +833,7 @@ void AnalyticPlacer::print_iter_stats(const int iter, "%6.3f " "%8d " "%7d |\n", - iter, - time, - iterTime, - bestHPWL, - stall); + iter, time, iterTime, bestHPWL, stall); VTR_LOG(" |\n"); } diff --git a/vpr/src/place/analytic_placer.h b/vpr/src/place/analytic_placer.h index a1f4ff8dcbe..85483b6e8a9 100644 --- a/vpr/src/place/analytic_placer.h +++ b/vpr/src/place/analytic_placer.h @@ -82,9 +82,9 @@ * https://github.com/YosysHQ/nextpnr */ -# include "vpr_context.h" -# include "timing_place.h" -# include "PlacementDelayCalculator.h" +#include "vpr_context.h" +#include "timing_place.h" +#include "PlacementDelayCalculator.h" /* * @brief Templated struct for constructing and solving matrix equations in analytic placer @@ -327,11 +327,7 @@ class AnalyticPlacer { const int spreadHPWL, const int legalHPWL); - void print_iter_stats(const int iter, - const float iterTime, - const float time, - const int bestHPWL, - const int stall); + void print_iter_stats(const int iter, const float iterTime, const float time, const int bestHPWL, const int stall); }; #endif /* ENABLE_ANALYTIC_PLACE */ diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index 7fafa7743f8..cdeee3d3bc1 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -8,16 +8,13 @@ #include - // Static member variable definitions vtr::vector> CentroidMoveGenerator::noc_group_clusters_; vtr::vector> CentroidMoveGenerator::noc_group_routers_; vtr::vector CentroidMoveGenerator::cluster_to_noc_grp_; std::map CentroidMoveGenerator::noc_router_to_noc_group_; - -CentroidMoveGenerator::CentroidMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function) +CentroidMoveGenerator::CentroidMoveGenerator(PlacerState& placer_state, e_reward_function reward_function) : MoveGenerator(placer_state, reward_function) , noc_attraction_w_(0.0f) , noc_attraction_enabled_(false) {} @@ -31,10 +28,9 @@ CentroidMoveGenerator::CentroidMoveGenerator(PlacerState& placer_state, , noc_attraction_enabled_(true) { VTR_ASSERT(noc_attraction_weight > 0.0 && noc_attraction_weight <= 1.0); - // check if static member variables are already initialized - if (!noc_group_clusters_.empty() && !noc_group_routers_.empty() && - !cluster_to_noc_grp_.empty() && !noc_router_to_noc_group_.empty()) { + if (!noc_group_clusters_.empty() && !noc_group_routers_.empty() && !cluster_to_noc_grp_.empty() + && !noc_router_to_noc_group_.empty()) { return; } else { initialize_noc_groups(high_fanout_net); @@ -54,39 +50,31 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block const auto& blk_loc_registry = placer_state.blk_loc_registry(); // Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, /*highly_crit_block=*/false, /*net_from=*/nullptr, - /*pin_from=*/nullptr, - placer_state); + /*pin_from=*/nullptr, placer_state); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, - "Centroid Move Choose Block %d - rlim %f\n", - size_t(b_from), + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Centroid Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, - "\tNo movable block found\n"); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tNo movable block found\n"); return e_create_move::ABORT; } - - t_pl_loc from = block_locs[b_from].loc; t_logical_block_type_ptr cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); t_physical_tile_type_ptr grid_from_type = device_ctx.grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); - t_range_limiters range_limiters{rlim, - place_move_ctx.first_rlim, - placer_opts.place_dm_rlim}; + t_range_limiters range_limiters{rlim, place_move_ctx.first_rlim, placer_opts.place_dm_rlim}; t_pl_loc to, centroid; /* Calculate the centroid location*/ - calculate_centroid_loc(b_from, false, centroid, nullptr, noc_attraction_enabled_, noc_attraction_w_, blk_loc_registry); + calculate_centroid_loc(b_from, false, centroid, nullptr, noc_attraction_enabled_, noc_attraction_w_, + blk_loc_registry); // Centroid location is not necessarily a valid location, and the downstream location expects a valid // layer for the centroid location. So if the layer is not valid, we set it to the same layer as from loc. @@ -148,7 +136,6 @@ void CentroidMoveGenerator::initialize_noc_groups(size_t high_fanout_net) { // iterate over logical NoC routers and start a BFS for (ClusterBlockId router_blk_id : router_blk_ids) { - if (block_visited[router_blk_id]) { continue; } diff --git a/vpr/src/place/centroid_move_generator.h b/vpr/src/place/centroid_move_generator.h index 01ee259cbc8..11ff418439a 100644 --- a/vpr/src/place/centroid_move_generator.h +++ b/vpr/src/place/centroid_move_generator.h @@ -29,8 +29,7 @@ class CentroidMoveGenerator : public MoveGenerator { * @param reward_function Specifies the reward function to update q-tables * of the RL agent. */ - CentroidMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function); + CentroidMoveGenerator(PlacerState& placer_state, e_reward_function reward_function); /** * The move generator created by calling this constructor considers both @@ -52,7 +51,6 @@ class CentroidMoveGenerator : public MoveGenerator { float noc_attraction_weight, size_t high_fanout_net); - /** * Returns all NoC routers that are in the NoC group with a given ID. * @param noc_grp_id The NoC group ID whose NoC routers are requested. diff --git a/vpr/src/place/compressed_grid.cpp b/vpr/src/place/compressed_grid.cpp index dbf8e4fde56..7e5f554953b 100644 --- a/vpr/src/place/compressed_grid.cpp +++ b/vpr/src/place/compressed_grid.cpp @@ -14,7 +14,6 @@ static t_compressed_block_grid create_compressed_block_grid(const std::vector>>& locations, int num_layers); - std::vector create_compressed_block_grids() { auto& device_ctx = g_vpr_ctx.device(); auto& grid = device_ctx.grid; @@ -34,7 +33,7 @@ std::vector create_compressed_block_grids() { int width_offset = grid.get_width_offset({x, y, layer_num}); int height_offset = grid.get_height_offset(t_physical_tile_loc(x, y, layer_num)); - if (width_offset == 0 && height_offset == 0) { // the bottom left corner of a tile + if (width_offset == 0 && height_offset == 0) { // the bottom left corner of a tile const auto& type = grid.get_physical_type({x, y, layer_num}); auto equivalent_sites = get_equivalent_sites_set(type); @@ -153,7 +152,8 @@ static t_compressed_block_grid create_compressed_block_grid(const std::vector> compatible_sub_tiles_for_tile; - inline size_t get_num_columns(int layer_num) const { - return compressed_to_grid_x[layer_num].size(); - } + inline size_t get_num_columns(int layer_num) const { return compressed_to_grid_x[layer_num].size(); } - inline size_t get_num_rows(int layer_num) const { - return compressed_to_grid_y[layer_num].size(); - } + inline size_t get_num_rows(int layer_num) const { return compressed_to_grid_y[layer_num].size(); } inline t_physical_tile_loc grid_loc_to_compressed_loc(t_physical_tile_loc grid_loc) const { int cx = OPEN; int cy = OPEN; int layer_num = grid_loc.layer_num; - auto itr_x = std::lower_bound(compressed_to_grid_x[layer_num].begin(), compressed_to_grid_x[layer_num].end(), grid_loc.x); + auto itr_x = std::lower_bound(compressed_to_grid_x[layer_num].begin(), compressed_to_grid_x[layer_num].end(), + grid_loc.x); VTR_ASSERT(*itr_x == grid_loc.x); cx = std::distance(compressed_to_grid_x[layer_num].begin(), itr_x); - auto itr_y = std::lower_bound(compressed_to_grid_y[layer_num].begin(), compressed_to_grid_y[layer_num].end(), grid_loc.y); + auto itr_y = std::lower_bound(compressed_to_grid_y[layer_num].begin(), compressed_to_grid_y[layer_num].end(), + grid_loc.y); VTR_ASSERT(*itr_y == grid_loc.y); cy = std::distance(compressed_to_grid_y[layer_num].begin(), itr_y); @@ -123,7 +121,7 @@ struct t_compressed_block_grid { int cx; if (itr < compressed_grid_dim.end() - 1) { int dist_prev = abs(loc - *itr); - int dist_next = abs(loc - *(itr+1)); + int dist_next = abs(loc - *(itr + 1)); if (dist_prev < dist_next) { cx = std::distance(compressed_grid_dim.begin(), itr); } else { @@ -147,7 +145,8 @@ struct t_compressed_block_grid { inline t_physical_tile_loc compressed_loc_to_grid_loc(t_physical_tile_loc compressed_loc) const { int layer_num = compressed_loc.layer_num; - return {compressed_to_grid_x[layer_num][compressed_loc.x], compressed_to_grid_y[layer_num][compressed_loc.y], layer_num}; + return {compressed_to_grid_x[layer_num][compressed_loc.x], compressed_to_grid_y[layer_num][compressed_loc.y], + layer_num}; } inline const std::vector& compatible_sub_tile_num(int physical_type_index) const { @@ -158,9 +157,7 @@ struct t_compressed_block_grid { return grid[layer_num][cx]; } - inline const std::vector& get_layer_nums() const { - return compressed_to_grid_layer; - } + inline const std::vector& get_layer_nums() const { return compressed_to_grid_layer; } }; //Compressed grid space for each block type diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index 712e309ca7c..46687dc9d6d 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -4,8 +4,7 @@ #include "placer_state.h" #include "move_utils.h" -CriticalUniformMoveGenerator::CriticalUniformMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function) +CriticalUniformMoveGenerator::CriticalUniformMoveGenerator(PlacerState& placer_state, e_reward_function reward_function) : MoveGenerator(placer_state, reward_function) {} e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, @@ -21,14 +20,11 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, - /*highly_crit_block=*/true, - &net_from, - &pin_from, - placer_state); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, + /*highly_crit_block=*/true, &net_from, &pin_from, placer_state); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Critical Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Critical Uniform Move Choose Block %d - rlim %f\n", + size_t(b_from), rlim); if (!b_from) { //No movable block found VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tNo movable block found\n"); @@ -55,4 +51,3 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved return create_move; } - diff --git a/vpr/src/place/critical_uniform_move_generator.h b/vpr/src/place/critical_uniform_move_generator.h index 73fb9717218..0bc37747ce9 100644 --- a/vpr/src/place/critical_uniform_move_generator.h +++ b/vpr/src/place/critical_uniform_move_generator.h @@ -17,8 +17,7 @@ class CriticalUniformMoveGenerator : public MoveGenerator { public: CriticalUniformMoveGenerator() = delete; - CriticalUniformMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function); + CriticalUniformMoveGenerator(PlacerState& placer_state, e_reward_function reward_function); private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, diff --git a/vpr/src/place/cut_spreader.cpp b/vpr/src/place/cut_spreader.cpp index fed8216795e..d98545ae5c6 100644 --- a/vpr/src/place/cut_spreader.cpp +++ b/vpr/src/place/cut_spreader.cpp @@ -1,18 +1,18 @@ #ifdef ENABLE_ANALYTIC_PLACE -# include "cut_spreader.h" -# include -# include -# include -# include - -# include "analytic_placer.h" -# include "vpr_types.h" -# include "vtr_time.h" -# include "globals.h" -# include "vtr_log.h" -# include "place_util.h" -# include "grid_block.h" +#include "cut_spreader.h" +#include +#include +#include +#include + +#include "analytic_placer.h" +#include "vpr_types.h" +#include "vtr_time.h" +#include "globals.h" +#include "vtr_log.h" +#include "place_util.h" +#include "grid_block.h" // sentinel for base case in CutSpreader (i.e. only 1 block left in region) constexpr std::pair BASE_CASE = {-2, -2}; @@ -234,7 +234,8 @@ void CutSpreader::grow_region(SpreaderRegion& r, vtr::Rect rect_to_include, return; vtr::Rect r_old = r.bb; - r_old.set_xmin(r.bb.xmin() + (init ? 1 : 0)); // ensure the initial location is processed in the for-loop later, when init == 1 + r_old.set_xmin(r.bb.xmin() + + (init ? 1 : 0)); // ensure the initial location is processed in the for-loop later, when init == 1 r.bb.expand_bounding_box(rect_to_include); auto process_location = [&](int x, int y) { @@ -425,13 +426,17 @@ std::pair CutSpreader::cut_region(SpreaderRegion& r, bool dir) { auto blk = cut_blks.at(0); auto& tiles_type = clb_nlist.block_type(blk)->equivalent_tiles; auto loc = ap->blk_locs[blk].loc; - if (std::find(tiles_type.begin(), tiles_type.end(), device_ctx.grid.get_physical_type({loc.x, loc.y, loc.layer})) == tiles_type.end()) { + if (std::find(tiles_type.begin(), tiles_type.end(), + device_ctx.grid.get_physical_type({loc.x, loc.y, loc.layer})) + == tiles_type.end()) { // logic block type doesn't match tile type // exhaustive search for tile of right type // this search should be fast as region must be small at this point (only 1 logic block left) for (int x = r.bb.xmin(); x <= r.bb.xmax(); x++) for (int y = r.bb.ymin(); y <= r.bb.ymax(); y++) { - if (std::find(tiles_type.begin(), tiles_type.end(), device_ctx.grid.get_physical_type({x, y, layer_num})) != tiles_type.end()) { + if (std::find(tiles_type.begin(), tiles_type.end(), + device_ctx.grid.get_physical_type({x, y, layer_num})) + != tiles_type.end()) { VTR_ASSERT(blks_at_location[x][y].empty()); ap->blk_locs[blk].rawx = x; ap->blk_locs[blk].rawy = y; @@ -468,8 +473,8 @@ std::pair CutSpreader::cut_region(SpreaderRegion& r, bool dir) { * clearance requirement for macros */ int left_blks_n, right_blks_n, left_tiles_n, right_tiles_n; - int best_tgt_cut = initial_target_cut(r, cut_blks, pivot, dir, trimmed_l, trimmed_r, - clearance_l, clearance_r, left_blks_n, right_blks_n, left_tiles_n, right_tiles_n); + int best_tgt_cut = initial_target_cut(r, cut_blks, pivot, dir, trimmed_l, trimmed_r, clearance_l, clearance_r, + left_blks_n, right_blks_n, left_tiles_n, right_tiles_n); if (best_tgt_cut == -1) // target cut fails clearance requirement for macros return CUT_FAIL; @@ -699,7 +704,8 @@ int CutSpreader::initial_target_cut(SpreaderRegion& r, if (((i - trimmed_l) + 1) >= clearance_l && ((trimmed_r - i) + 1) >= clearance_r) { // if solution accommodates macro clearances // compare difference in utilization - double tmpU = std::abs(double(left_blks_n) / double(std::max(left_tiles_n, 1)) - double(right_blks_n) / double(std::max(right_tiles_n, 1))); + double tmpU = std::abs(double(left_blks_n) / double(std::max(left_tiles_n, 1)) + - double(right_blks_n) / double(std::max(right_tiles_n, 1))); if (tmpU < best_deltaU) { best_deltaU = tmpU; best_tgt_cut = i; @@ -743,10 +749,9 @@ void CutSpreader::linear_spread_subarea(std::vector& cut_blks, double area_l = dir ? sub_area.bb.ymin() : sub_area.bb.xmin(); // left boundary double area_r = dir ? sub_area.bb.ymax() : sub_area.bb.xmax(); // right boundary int N = blks_end - blks_start; // number of logic blocks in subarea - if (N <= 2) { // only 1 bin, skip binning and directly linear interpolate + if (N <= 2) { // only 1 bin, skip binning and directly linear interpolate for (int i = blks_start; i < blks_end; i++) { - auto& pos = dir ? ap->blk_locs[cut_blks.at(i)].rawy - : ap->blk_locs[cut_blks.at(i)].rawx; + auto& pos = dir ? ap->blk_locs[cut_blks.at(i)].rawy : ap->blk_locs[cut_blks.at(i)].rawx; pos = area_l + (i - blks_start) * ((area_r - area_l) / N); } } else { @@ -764,19 +769,19 @@ void CutSpreader::linear_spread_subarea(std::vector& cut_blks, for (int i_bin = 0; i_bin < K; i_bin++) { auto &bl = bin_bounds.at(i_bin), br = bin_bounds.at(i_bin + 1); // i-th bin's left and right bound // i-th group's original bounds (left and right most block's original location) - double group_left = dir ? ap->blk_locs[cut_blks.at(bl.first)].rawy - : ap->blk_locs[cut_blks.at(bl.first)].rawx; - double group_right = dir ? ap->blk_locs[cut_blks.at(br.first - 1)].rawy - : ap->blk_locs[cut_blks.at(br.first - 1)].rawx; + double group_left + = dir ? ap->blk_locs[cut_blks.at(bl.first)].rawy : ap->blk_locs[cut_blks.at(bl.first)].rawx; + double group_right + = dir ? ap->blk_locs[cut_blks.at(br.first - 1)].rawy : ap->blk_locs[cut_blks.at(br.first - 1)].rawx; double bin_left = bl.second; double bin_right = br.second; // mapping from i-th block group's original bounds to i-th bin's bounds - double mapping = (bin_right - bin_left) / std::max(0.00001, group_right - group_left); // prevent division by 0 + double mapping + = (bin_right - bin_left) / std::max(0.00001, group_right - group_left); // prevent division by 0 // map blks in i-th group to new location in i-th bin using linear interpolation for (int i_blk = bl.first; i_blk < br.first; i_blk++) { // new location is stored back into rawx/rawy - auto& blk_pos = dir ? ap->blk_locs[cut_blks.at(i_blk)].rawy - : ap->blk_locs[cut_blks.at(i_blk)].rawx; + auto& blk_pos = dir ? ap->blk_locs[cut_blks.at(i_blk)].rawy : ap->blk_locs[cut_blks.at(i_blk)].rawx; blk_pos = bin_left + mapping * (blk_pos - group_left); // linear interpolation } @@ -813,7 +818,9 @@ void CutSpreader::strict_legalize() { // clear the location of all blocks in place_ctx for (auto blk : clb_nlist.blocks()) { - if (!block_locs[blk].is_fixed && (ap->row_num[blk] != DONT_SOLVE || (imacro(blk) != NO_MACRO && ap->row_num[macro_head(blk)] != DONT_SOLVE))) { + if (!block_locs[blk].is_fixed + && (ap->row_num[blk] != DONT_SOLVE + || (imacro(blk) != NO_MACRO && ap->row_num[macro_head(blk)] != DONT_SOLVE))) { unbind_tile(block_locs[blk].loc); } } @@ -873,8 +880,8 @@ void CutSpreader::strict_legalize() { * only applies for single blocks */ int iter_at_radius = 0; - bool placed = false; // flag for inner-loop - t_pl_loc best_subtile = t_pl_loc{}; // current best candidate with smallest best_inp_len, only for single blocks + bool placed = false; // flag for inner-loop + t_pl_loc best_subtile = t_pl_loc{}; // current best candidate with smallest best_inp_len, only for single blocks int best_inp_len = std::numeric_limits::max(); // used to choose best_subtile, only for single blocks total_iters++; @@ -906,11 +913,9 @@ void CutSpreader::strict_legalize() { while (radius < std::max(max_x - 1, max_y - 1)) { // search every location within radius for compatible sub_tiles for (int x = std::max(0, ap->blk_locs[blk].loc.x - radius); - x <= std::min(max_x - 1, ap->blk_locs[blk].loc.x + radius); - x++) { + x <= std::min(max_x - 1, ap->blk_locs[blk].loc.x + radius); x++) { for (int y = std::max(0, ap->blk_locs[blk].loc.y - radius); - y <= std::min(max_y - 1, ap->blk_locs[blk].loc.y + radius); - y++) { + y <= std::min(max_y - 1, ap->blk_locs[blk].loc.y + radius); y++) { if (subtiles_at_location[x][y].size() > 0) // compatible sub_tiles found within radius goto notempty; } @@ -940,19 +945,12 @@ void CutSpreader::strict_legalize() { // if blk is not a macro member if (imacro(blk) == NO_MACRO) { - placed = try_place_blk(blk, - nx, - ny, + placed = try_place_blk(blk, nx, ny, radius > ripup_radius, // bool ripup_radius_met iter_at_radius >= explore_limit, // bool exceeds_explore_limit - best_inp_len, - best_subtile, - remaining); + best_inp_len, best_subtile, remaining); } else { - placed = try_place_macro(blk, - nx, - ny, - remaining); + placed = try_place_macro(blk, nx, ny, remaining); } } } @@ -1039,7 +1037,7 @@ bool CutSpreader::try_place_blk(ClusterBlockId blk, if (exceeds_explore_limit && best_subtile != t_pl_loc{}) { // find the logic block bound to (placed on) best_subtile ClusterBlockId bound_blk = grid_blocks.block_at_location(best_subtile); - if (bound_blk) { // if best_subtile has a logic block + if (bound_blk) { // if best_subtile has a logic block unbind_tile(best_subtile); // clear bound_block and best_subtile's placement info remaining.emplace(1, bound_blk); // put bound_blk back into remaining blocks to place } @@ -1048,11 +1046,9 @@ bool CutSpreader::try_place_blk(ClusterBlockId blk, } // if exploration limit is not met or a candidate sub_tile is not found yet - for (auto sub_t : subtiles_at_location[nx][ny]) { // for each available sub_tile at random location + for (auto sub_t : subtiles_at_location[nx][ny]) { // for each available sub_tile at random location ClusterBlockId bound_blk = grid_blocks.block_at_location(sub_t); // logic blk at [nx, ny] - if (bound_blk == ClusterBlockId::INVALID() - || ripup_radius_met - || rand() % (20000) < 10) { + if (bound_blk == ClusterBlockId::INVALID() || ripup_radius_met || rand() % (20000) < 10) { /* conditions when a sub_tile at nx, ny is considered: * - sub_tile is not occupied (no bound_blk) * - occupied sub_tile is considered when: @@ -1068,8 +1064,7 @@ bool CutSpreader::try_place_blk(ClusterBlockId blk, // find all input pins and add up input wirelength for (auto pin : clb_nlist.block_input_pins(blk)) { ClusterNetId net = clb_nlist.pin_net(pin); - if (net == ClusterNetId::INVALID() - || clb_nlist.net_is_ignored(net) + if (net == ClusterNetId::INVALID() || clb_nlist.net_is_ignored(net) || clb_nlist.net_driver(net) == ClusterPinId::INVALID()) continue; ClusterBlockId driver = clb_nlist.pin_block(clb_nlist.net_driver(net)); @@ -1114,11 +1109,12 @@ bool CutSpreader::try_place_macro(ClusterBlockId blk, const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; for (auto sub_t : subtiles_at_location[nx][ny]) { - std::vector> targets; // contains the target placement location for each macro block - std::queue> visit; // visit goes through all macro members once - visit.emplace(blk, sub_t); // push head block and target sub_tile first - bool placement_impossible = false; // once set to true, break while loop and try next sub_t - while (!visit.empty()) { // go through every macro block + std::vector> + targets; // contains the target placement location for each macro block + std::queue> visit; // visit goes through all macro members once + visit.emplace(blk, sub_t); // push head block and target sub_tile first + bool placement_impossible = false; // once set to true, break while loop and try next sub_t + while (!visit.empty()) { // go through every macro block ClusterBlockId visit_blk = visit.front().first; VTR_ASSERT(!is_placed(visit_blk)); t_pl_loc target = visit.front().second; // target location @@ -1126,7 +1122,8 @@ bool CutSpreader::try_place_macro(ClusterBlockId blk, // ensure the target location has compatible tile auto blk_t = clb_nlist.block_type(blk); - auto result = std::find(blk_t->equivalent_tiles.begin(), blk_t->equivalent_tiles.end(), g_vpr_ctx.device().grid.get_physical_type({target.x, target.y, target.layer})); + auto result = std::find(blk_t->equivalent_tiles.begin(), blk_t->equivalent_tiles.end(), + g_vpr_ctx.device().grid.get_physical_type({target.x, target.y, target.layer})); if (result == blk_t->equivalent_tiles.end()) { placement_impossible = true; break; diff --git a/vpr/src/place/cut_spreader.h b/vpr/src/place/cut_spreader.h index 472cd9cc722..5be5f0ed79d 100644 --- a/vpr/src/place/cut_spreader.h +++ b/vpr/src/place/cut_spreader.h @@ -107,8 +107,8 @@ * https://github.com/YosysHQ/nextpnr * */ -# include "vpr_context.h" -# include +#include "vpr_context.h" +#include // declaration of used types; class AnalyticPlacer; diff --git a/vpr/src/place/directed_moves_util.cpp b/vpr/src/place/directed_moves_util.cpp index b8a950d832a..9b360add09d 100644 --- a/vpr/src/place/directed_moves_util.cpp +++ b/vpr/src/place/directed_moves_util.cpp @@ -2,8 +2,7 @@ #include "directed_moves_util.h" #include "centroid_move_generator.h" -t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, - const BlkLocRegistry& blk_loc_registry) { +t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, const BlkLocRegistry& blk_loc_registry) { const auto& device_ctx = g_vpr_ctx.device(); const auto& grid = device_ctx.grid; const auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -135,12 +134,10 @@ void calculate_centroid_loc(ClusterBlockId b_from, centroid.layer = (int)std::round(acc_layer / acc_weight); } -static std::map available_reward_function = { - {"basic", e_reward_function::BASIC}, - {"nonPenalizing_basic", e_reward_function::NON_PENALIZING_BASIC}, - {"runtime_aware", e_reward_function::RUNTIME_AWARE}, - {"WLbiased_runtime_aware", e_reward_function::WL_BIASED_RUNTIME_AWARE}}; +static std::map available_reward_function + = {{"basic", e_reward_function::BASIC}, + {"nonPenalizing_basic", e_reward_function::NON_PENALIZING_BASIC}, + {"runtime_aware", e_reward_function::RUNTIME_AWARE}, + {"WLbiased_runtime_aware", e_reward_function::WL_BIASED_RUNTIME_AWARE}}; -e_reward_function string_to_reward(const std::string& st) { - return available_reward_function[st]; -} +e_reward_function string_to_reward(const std::string& st) { return available_reward_function[st]; } diff --git a/vpr/src/place/directed_moves_util.h b/vpr/src/place/directed_moves_util.h index 4b78e424d92..240916c71d2 100644 --- a/vpr/src/place/directed_moves_util.h +++ b/vpr/src/place/directed_moves_util.h @@ -8,18 +8,17 @@ * @brief enum represents the different reward functions */ enum class e_reward_function { - BASIC, ///@ directly uses the change of the annealing cost function - NON_PENALIZING_BASIC, ///@ same as basic reward function but with 0 reward if it's a hill-climbing one - RUNTIME_AWARE, ///@ same as NON_PENALIZING_BASIC but with normalizing with the runtime factor of each move type - WL_BIASED_RUNTIME_AWARE, ///@ same as RUNTIME_AWARE but more biased to WL cost (the factor of the bias is REWARD_BB_TIMING_RELATIVE_WEIGHT) - UNDEFINED_REWARD ///@ Used for manual moves + BASIC, ///@ directly uses the change of the annealing cost function + NON_PENALIZING_BASIC, ///@ same as basic reward function but with 0 reward if it's a hill-climbing one + RUNTIME_AWARE, ///@ same as NON_PENALIZING_BASIC but with normalizing with the runtime factor of each move type + WL_BIASED_RUNTIME_AWARE, ///@ same as RUNTIME_AWARE but more biased to WL cost (the factor of the bias is REWARD_BB_TIMING_RELATIVE_WEIGHT) + UNDEFINED_REWARD ///@ Used for manual moves }; e_reward_function string_to_reward(const std::string& st); ///@brief Helper function that returns the x, y coordinates of a pin -t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, - const BlkLocRegistry& blk_loc_registry); +t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, const BlkLocRegistry& blk_loc_registry); /** * @brief Calculates the exact centroid location diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index 5d4e55f7656..6829280565f 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -8,8 +8,7 @@ #include #include -FeasibleRegionMoveGenerator::FeasibleRegionMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function) +FeasibleRegionMoveGenerator::FeasibleRegionMoveGenerator(PlacerState& placer_state, e_reward_function reward_function) : MoveGenerator(placer_state, reward_function) {} e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, @@ -26,14 +25,11 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, - /*highly_crit_block=*/true, - &net_from, - &pin_from, - placer_state); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, + /*highly_crit_block=*/true, &net_from, &pin_from, placer_state); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Feasible Region Move Choose Block %di - rlim %f\n", size_t(b_from), rlim); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Feasible Region Move Choose Block %di - rlim %f\n", + size_t(b_from), rlim); if (!b_from) { //No movable block found VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tNo movable block found\n"); @@ -121,9 +117,7 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& FR_coords.layer_max = from.layer; VTR_ASSERT(FR_coords.ymin <= FR_coords.ymax); - t_range_limiters range_limiters{rlim, - place_move_ctx.first_rlim, - placer_opts.place_dm_rlim}; + t_range_limiters range_limiters{rlim, place_move_ctx.first_rlim, placer_opts.place_dm_rlim}; // Try to find a legal location inside the feasible region if (!find_to_loc_median(cluster_from_type, from, &FR_coords, to, b_from, blk_loc_registry)) { diff --git a/vpr/src/place/feasible_region_move_generator.h b/vpr/src/place/feasible_region_move_generator.h index 29405104aeb..81cfc96c050 100644 --- a/vpr/src/place/feasible_region_move_generator.h +++ b/vpr/src/place/feasible_region_move_generator.h @@ -21,8 +21,7 @@ class FeasibleRegionMoveGenerator : public MoveGenerator { public: FeasibleRegionMoveGenerator() = delete; - FeasibleRegionMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function); + FeasibleRegionMoveGenerator(PlacerState& placer_state, e_reward_function reward_function); private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, diff --git a/vpr/src/place/grid_tile_lookup.cpp b/vpr/src/place/grid_tile_lookup.cpp index d2236fdbc8a..522d9d52c00 100644 --- a/vpr/src/place/grid_tile_lookup.cpp +++ b/vpr/src/place/grid_tile_lookup.cpp @@ -8,7 +8,8 @@ GridTileLookup::GridTileLookup() { max_placement_locations.resize(device_ctx.logical_block_types.size()); for (const auto& type : device_ctx.logical_block_types) { - vtr::NdMatrix type_count({static_cast(num_layers), device_ctx.grid.width(), device_ctx.grid.height()}); + vtr::NdMatrix type_count( + {static_cast(num_layers), device_ctx.grid.width(), device_ctx.grid.height()}); fill_type_matrix(&type, type_count); block_type_matrices.push_back(type_count); } @@ -80,12 +81,10 @@ int GridTileLookup::region_tile_count(const Region& reg, t_logical_block_type_pt /*Intersect the region with the grid, in case the region passed in goes out of bounds * By intersecting with the grid, we ensure that we are only counting tiles for the part of the * region that fits on the grid.*/ - Region grid_reg(0, 0, - (int)device_ctx.grid.width() - 1, (int)device_ctx.grid.height() - 1, - 0, n_layers - 1); + Region grid_reg(0, 0, (int)device_ctx.grid.width() - 1, (int)device_ctx.grid.height() - 1, 0, n_layers - 1); Region intersect_reg = intersection(reg, grid_reg); -// VTR_ASSERT(intersect_coord.layer_num == layer_num); + // VTR_ASSERT(intersect_coord.layer_num == layer_num); const auto [xmin, ymin, xmax, ymax] = intersect_reg.get_rect().coordinates(); const auto [layer_low, layer_high] = intersect_reg.get_layer_range(); diff --git a/vpr/src/place/grid_tile_lookup.h b/vpr/src/place/grid_tile_lookup.h index 66d9d372db3..60684029dba 100644 --- a/vpr/src/place/grid_tile_lookup.h +++ b/vpr/src/place/grid_tile_lookup.h @@ -5,86 +5,86 @@ #include "globals.h" /** -* @class GridTileLookup -* @brief This class is used to store a grid for each logical block type that stores the cumulative number of subtiles -* for that type available at each location in the grid. -* -* The cumulative number of subtiles is the subtiles at the location plus the subtiles available at the grid locations -* above and to the right of the locations. Having these grids allows for O(1) lookups about the number of subtiles -* available for a given type of block in a rectangular region. -* This lookup class is used during initial placement when sorting blocks by the size of their floorplan constraint regions. -*/ + * @class GridTileLookup + * @brief This class is used to store a grid for each logical block type that stores the cumulative number of subtiles + * for that type available at each location in the grid. + * + * The cumulative number of subtiles is the subtiles at the location plus the subtiles available at the grid locations + * above and to the right of the locations. Having these grids allows for O(1) lookups about the number of subtiles + * available for a given type of block in a rectangular region. + * This lookup class is used during initial placement when sorting blocks by the size of their floorplan constraint regions. + */ class GridTileLookup { - public: - /** - * @brief Constructs a new GridTileLookup object. - * - * Creates a grid for each logical type and fills it with the cumulative number - * of subtiles of that type. - */ - GridTileLookup(); + public: + /** + * @brief Constructs a new GridTileLookup object. + * + * Creates a grid for each logical type and fills it with the cumulative number + * of subtiles of that type. + */ + GridTileLookup(); - /** - * @brief Returns the number of subtiles available in the specified region for the given block type. - * - * This routine uses pre-computed values from the grids for each block type to get the number of grid tiles - * covered by a region. - * For a region with no subtiles specified, the number of grid tiles can be calculated by adding - * and subtracting four values from within/at the edge of the region. - * The region with subtile case is taken care of by a helper routine, region_with_subtile_count(). - * - * @param reg The region to be queried. - * @param block_type The type of logical block. - * @return int The number of available subtiles. - */ - int region_tile_count(const Region& reg, t_logical_block_type_ptr block_type) const; + /** + * @brief Returns the number of subtiles available in the specified region for the given block type. + * + * This routine uses pre-computed values from the grids for each block type to get the number of grid tiles + * covered by a region. + * For a region with no subtiles specified, the number of grid tiles can be calculated by adding + * and subtracting four values from within/at the edge of the region. + * The region with subtile case is taken care of by a helper routine, region_with_subtile_count(). + * + * @param reg The region to be queried. + * @param block_type The type of logical block. + * @return int The number of available subtiles. + */ + int region_tile_count(const Region& reg, t_logical_block_type_ptr block_type) const; - /** - * @brief Returns the number of subtiles that can be placed in the specified region for the given block type. - * - * This routine is for the subtile specified case; an O(region_size) scan needs to be done to check whether each grid - * location in the region is compatible for the block at the subtile specified. - * - * @param reg The region to be queried. - * @param block_type The type of logical block. - * @return int The number of subtiles with placement. - */ - int region_with_subtile_count(const Region& reg, t_logical_block_type_ptr block_type) const; + /** + * @brief Returns the number of subtiles that can be placed in the specified region for the given block type. + * + * This routine is for the subtile specified case; an O(region_size) scan needs to be done to check whether each grid + * location in the region is compatible for the block at the subtile specified. + * + * @param reg The region to be queried. + * @param block_type The type of logical block. + * @return int The number of subtiles with placement. + */ + int region_with_subtile_count(const Region& reg, t_logical_block_type_ptr block_type) const; - /** - * @brief Returns the total number of tiles available for the specified block type. - * - * @param block_type The type of logical block. - * @return int The total number of available tiles. - */ - int total_type_tiles(t_logical_block_type_ptr block_type) const; + /** + * @brief Returns the total number of tiles available for the specified block type. + * + * @param block_type The type of logical block. + * @return int The total number of available tiles. + */ + int total_type_tiles(t_logical_block_type_ptr block_type) const; - private: - /** - * @brief Fills the type matrix with cumulative subtiles count for the given block type. - * - * @param block_type The type of logical block. - * @param type_count The matrix to be filled with cumulative subtiles count. - */ - void fill_type_matrix(t_logical_block_type_ptr block_type, vtr::NdMatrix& type_count); + private: + /** + * @brief Fills the type matrix with cumulative subtiles count for the given block type. + * + * @param block_type The type of logical block. + * @param type_count The matrix to be filled with cumulative subtiles count. + */ + void fill_type_matrix(t_logical_block_type_ptr block_type, vtr::NdMatrix& type_count); - /** - * @brief Stores the cumulative total of subtiles available at each (x, y) location in each layer - * for all block types. - * - * Therefore, the length of the vector will be the number of logical block types. To access the cumulative - * number of subtiles at a location in a specific layer, you would use block_type_matrices[iblock_type][layer][x][y]. - * This would give the number of placement locations that are at, or above (larger y) and to the right of the given [x,y] for - * the given block type in the given layer. - */ - std::vector> block_type_matrices; + /** + * @brief Stores the cumulative total of subtiles available at each (x, y) location in each layer + * for all block types. + * + * Therefore, the length of the vector will be the number of logical block types. To access the cumulative + * number of subtiles at a location in a specific layer, you would use block_type_matrices[iblock_type][layer][x][y]. + * This would give the number of placement locations that are at, or above (larger y) and to the right of the given [x,y] for + * the given block type in the given layer. + */ + std::vector> block_type_matrices; - /** - * @brief Stores the total number of placement locations (i.e. compatible subtiles) for each block type. - * - * To access the max_placement locations for a particular block type, use max_placement_locations[block_type->index] - */ - std::vector max_placement_locations; + /** + * @brief Stores the total number of placement locations (i.e. compatible subtiles) for each block type. + * + * To access the max_placement locations for a particular block type, use max_placement_locations[block_type->index] + */ + std::vector max_placement_locations; }; #endif /* VPR_SRC_PLACE_GRID_TILE_LOOKUP_H_ */ \ No newline at end of file diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index 9b4a3adeeed..2913521c44c 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -35,8 +35,7 @@ static bool accept_noc_swap(double delta_cost, double prob); * @param blk_loc_registry Placement block location information. To be * filled with the location where pl_macro is placed. */ -static void place_constrained_noc_router(ClusterBlockId router_blk_id, - BlkLocRegistry& blk_loc_registry); +static void place_constrained_noc_router(ClusterBlockId router_blk_id, BlkLocRegistry& blk_loc_registry); /** * @brief Randomly places unconstrained NoC routers. @@ -74,7 +73,8 @@ static const t_compressed_block_grid& get_compressed_noc_grid() { auto& cluster_ctx = g_vpr_ctx.clustering(); // Get the logical block type for router - const t_logical_block_type_ptr router_block_type = cluster_ctx.clb_nlist.block_type(noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist()[0]); + const t_logical_block_type_ptr router_block_type + = cluster_ctx.clb_nlist.block_type(noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist()[0]); // Get the compressed grid for NoC const auto& compressed_noc_grid = place_ctx.compressed_block_grids[router_block_type->index]; @@ -99,8 +99,7 @@ static bool accept_noc_swap(double delta_cost, double prob) { } } -static void place_constrained_noc_router(ClusterBlockId router_blk_id, - BlkLocRegistry& blk_loc_registry) { +static void place_constrained_noc_router(ClusterBlockId router_blk_id, BlkLocRegistry& blk_loc_registry) { auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& floorplanning_ctx = g_vpr_ctx.floorplanning(); @@ -159,7 +158,8 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout vtr::shuffle(noc_phy_routers.begin(), noc_phy_routers.end(), rand_state); // Get the logical block type for router - const auto router_block_type = cluster_ctx.clb_nlist.block_type(noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist()[0]); + const auto router_block_type + = cluster_ctx.clb_nlist.block_type(noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist()[0]); // Get the compressed grid for NoC const auto& compressed_noc_grid = compressed_grids[router_block_type->index]; @@ -212,7 +212,8 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, // Initialize NoC-related costs costs.noc_cost_terms.aggregate_bandwidth = noc_cost_handler.comp_noc_aggregate_bandwidth_cost(); - std::tie(costs.noc_cost_terms.latency, costs.noc_cost_terms.latency_overrun) = noc_cost_handler.comp_noc_latency_cost(); + std::tie(costs.noc_cost_terms.latency, costs.noc_cost_terms.latency_overrun) + = noc_cost_handler.comp_noc_latency_cost(); costs.noc_cost_terms.congestion = noc_cost_handler.comp_noc_congestion_cost(); noc_cost_handler.update_noc_normalization_factors(costs); costs.cost = calculate_noc_cost(costs.noc_cost_terms, costs.noc_cost_norm_factors, noc_opts); @@ -302,12 +303,13 @@ void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& placer_opts, BlkLocRegistry& blk_loc_registry, NocCostHandler& noc_cost_handler) { - vtr::ScopedStartFinishTimer timer("Initial NoC Placement"); + vtr::ScopedStartFinishTimer timer("Initial NoC Placement"); auto& noc_ctx = g_vpr_ctx.noc(); const auto& block_locs = blk_loc_registry.block_locs(); // Get all the router clusters - const std::vector& router_blk_ids = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); + const std::vector& router_blk_ids + = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); // Holds all the routers that are not fixed into a specific location by constraints std::vector unfixed_routers; diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index 4cf4f6cc89f..d3e49f058dc 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -76,8 +76,7 @@ static vtr::vector assign_block_scores(); * * @return y coordinate of the location that macro head should be placed */ -static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first_macro_loc, - const t_pl_macro& pl_macro); +static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first_macro_loc, const t_pl_macro& pl_macro); /** * @brief Tries to get the first available location of a specific block type that can accommodate macro blocks @@ -88,7 +87,9 @@ static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first * * @return index to a column of blk_types_empty_locs_in_grid that can accommodate pl_macro and location of first available location returned by reference */ -static int get_blk_type_first_loc(t_pl_loc& loc, const t_pl_macro& pl_macro, std::vector* blk_types_empty_locs_in_grid); +static int get_blk_type_first_loc(t_pl_loc& loc, + const t_pl_macro& pl_macro, + std::vector* blk_types_empty_locs_in_grid); /** * @brief Updates the first available location (lowest y) and number of remaining blocks in the column that dense placement used to place the macro. @@ -137,9 +138,7 @@ static inline void fix_IO_block_types(const t_pl_macro& pl_macro, * * @return True if the location is legal for the macro head member, false otherwise. */ -static bool is_loc_legal(const t_pl_loc& loc, - const PartitionRegion& pr, - t_logical_block_type_ptr block_type); +static bool is_loc_legal(const t_pl_loc& loc, const PartitionRegion& pr, t_logical_block_type_ptr block_type); /** * @brief Calculates a centroid location for a block based on its placed connections. @@ -250,52 +249,51 @@ static void check_initial_placement_legality(const vtr::vector_mapname, - MAX_INIT_PLACE_ATTEMPTS - 1); + cluster_ctx.clb_nlist.block_name(blk_id).c_str(), blk_id, + cluster_ctx.clb_nlist.block_type(blk_id)->name, MAX_INIT_PLACE_ATTEMPTS - 1); unplaced_blocks++; } } if (unplaced_blocks > 0) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE, - "%d blocks could not be placed during initial placement; no spaces were available for them on the grid.\n" - "If VPR was run with floorplan constraints, the constraints may be too tight.\n", - unplaced_blocks); + VPR_FATAL_ERROR( + VPR_ERROR_PLACE, + "%d blocks could not be placed during initial placement; no spaces were available for them on the grid.\n" + "If VPR was run with floorplan constraints, the constraints may be too tight.\n", + unplaced_blocks); } for (auto movable_blk_id : place_ctx.movable_blocks) { if (block_locs[movable_blk_id].is_fixed) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Fixed block was mistakenly marked as movable during initial placement.\n"); + VPR_FATAL_ERROR(VPR_ERROR_PLACE, + "Fixed block was mistakenly marked as movable during initial placement.\n"); } } - + for (const auto& logical_block_type : device_ctx.logical_block_types) { const auto& movable_blocks_of_type = place_ctx.movable_blocks_per_type[logical_block_type.index]; for (const auto& movable_blk_id : movable_blocks_of_type) { if (block_locs[movable_blk_id].is_fixed) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Fixed block %d of logical type %s was mistakenly marked as movable during initial placement.\n", - (size_t)movable_blk_id, logical_block_type.name); + VPR_FATAL_ERROR( + VPR_ERROR_PLACE, + "Fixed block %d of logical type %s was mistakenly marked as movable during initial placement.\n", + (size_t)movable_blk_id, logical_block_type.name); } if (cluster_ctx.clb_nlist.block_type(movable_blk_id)->index != logical_block_type.index) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Clustered block %d of logical type %s was mistakenly marked as logical type %s.\n", - (size_t)movable_blk_id, - cluster_ctx.clb_nlist.block_type(movable_blk_id)->name, + VPR_FATAL_ERROR(VPR_ERROR_PLACE, + "Clustered block %d of logical type %s was mistakenly marked as logical type %s.\n", + (size_t)movable_blk_id, cluster_ctx.clb_nlist.block_type(movable_blk_id)->name, logical_block_type.name); } } } } -bool is_block_placed(ClusterBlockId blk_id, - const vtr::vector_map& block_locs) { +bool is_block_placed(ClusterBlockId blk_id, const vtr::vector_map& block_locs) { return (block_locs[blk_id].loc.x != INVALID_X); } -static bool is_loc_legal(const t_pl_loc& loc, - const PartitionRegion& pr, - t_logical_block_type_ptr block_type) { +static bool is_loc_legal(const t_pl_loc& loc, const PartitionRegion& pr, t_logical_block_type_ptr block_type) { const auto& grid = g_vpr_ctx.device().grid; bool legal = false; @@ -335,17 +333,14 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, const int centroid_loc_layer_num = centroid_loc.layer; //Determine centroid location in the compressed space of the current block - auto compressed_centroid_loc = get_compressed_loc_approx(compressed_block_grid, - centroid_loc, - num_layers); + auto compressed_centroid_loc = get_compressed_loc_approx(compressed_block_grid, centroid_loc, num_layers); //range limit (rlim) set a limit for the neighbor search in the centroid placement //the neighbor location should be within the defined range to calculated centroid location int first_rlim = 15; - auto search_range = get_compressed_grid_target_search_range(compressed_block_grid, - compressed_centroid_loc[centroid_loc_layer_num], - first_rlim); + auto search_range = get_compressed_grid_target_search_range( + compressed_block_grid, compressed_centroid_loc[centroid_loc_layer_num], first_rlim); int delta_cx = search_range.xmax - search_range.xmin; @@ -356,15 +351,9 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, t_physical_tile_loc to_compressed_loc; - bool legal = find_compatible_compressed_loc_in_range(block_type, - delta_cx, - {cx_from, cy_from, layer_from}, - search_range, - to_compressed_loc, - /*is_median=*/false, - centroid_loc_layer_num, - search_for_empty, - blk_loc_registry); + bool legal = find_compatible_compressed_loc_in_range( + block_type, delta_cx, {cx_from, cy_from, layer_from}, search_range, to_compressed_loc, + /*is_median=*/false, centroid_loc_layer_num, search_for_empty, blk_loc_registry); if (!legal) { return false; @@ -536,7 +525,8 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, return legal; } -static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first_macro_loc, const t_pl_macro& pl_macro) { +static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first_macro_loc, + const t_pl_macro& pl_macro) { int y = first_macro_loc.first_avail_loc.y; /* if the macro member offset is positive, it means that macro head should be placed at the first location of first_macro_loc. @@ -553,7 +543,8 @@ static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first static void update_blk_type_first_loc(int blk_type_column_index, t_logical_block_type_ptr block_type, - const t_pl_macro& pl_macro, std::vector* blk_types_empty_locs_in_grid) { + const t_pl_macro& pl_macro, + std::vector* blk_types_empty_locs_in_grid) { //check if dense placement could place macro successfully if (blk_type_column_index == -1 || blk_types_empty_locs_in_grid->size() <= (size_t)abs(blk_type_column_index)) { return; @@ -562,7 +553,8 @@ static void update_blk_type_first_loc(int blk_type_column_index, const auto& device_ctx = g_vpr_ctx.device(); //update the first available macro location in a specific column for the next macro - blk_types_empty_locs_in_grid->at(blk_type_column_index).first_avail_loc.y += device_ctx.physical_tile_types.at(block_type->index).height * pl_macro.members.size(); + blk_types_empty_locs_in_grid->at(blk_type_column_index).first_avail_loc.y + += device_ctx.physical_tile_types.at(block_type->index).height * pl_macro.members.size(); blk_types_empty_locs_in_grid->at(blk_type_column_index).num_of_empty_locs_in_y_axis -= pl_macro.members.size(); } @@ -601,7 +593,8 @@ static std::vector init_blk_types_empty_locations( for (int layer_num = 0; layer_num < num_layers; layer_num++) { int min_cx = compressed_block_grid.grid_loc_to_compressed_loc_approx({0, OPEN, layer_num}).x; - int max_cx = compressed_block_grid.grid_loc_to_compressed_loc_approx({(int)grid.width() - 1, OPEN, layer_num}).x; + int max_cx + = compressed_block_grid.grid_loc_to_compressed_loc_approx({(int)grid.width() - 1, OPEN, layer_num}).x; //traverse all column and store their empty locations in block_type_empty_locs for (int x_loc = min_cx; x_loc <= max_cx; x_loc++) { @@ -611,9 +604,11 @@ static std::vector init_blk_types_empty_locations( empty_loc.first_avail_loc.x = first_avail_loc.x; empty_loc.first_avail_loc.y = first_avail_loc.y; empty_loc.first_avail_loc.layer = first_avail_loc.layer_num; - const auto& physical_type = grid.get_physical_type({first_avail_loc.x, first_avail_loc.y, first_avail_loc.layer_num}); + const auto& physical_type + = grid.get_physical_type({first_avail_loc.x, first_avail_loc.y, first_avail_loc.layer_num}); const auto& compatible_sub_tiles = compressed_block_grid.compatible_sub_tile_num(physical_type->index); - empty_loc.first_avail_loc.sub_tile = *std::min_element(compatible_sub_tiles.begin(), compatible_sub_tiles.end()); + empty_loc.first_avail_loc.sub_tile + = *std::min_element(compatible_sub_tiles.begin(), compatible_sub_tiles.end()); empty_loc.num_of_empty_locs_in_y_axis = block_rows.size(); block_type_empty_locs.push_back(empty_loc); } @@ -670,9 +665,11 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, int selected_layer = (layer_low == layer_high) ? layer_low : layer_low + vtr::irand(layer_high - layer_low); - auto min_compressed_loc = compressed_block_grid.grid_loc_to_compressed_loc_approx({reg_rect.xmin(), reg_rect.ymin(), selected_layer}); + auto min_compressed_loc + = compressed_block_grid.grid_loc_to_compressed_loc_approx({reg_rect.xmin(), reg_rect.ymin(), selected_layer}); - auto max_compressed_loc = compressed_block_grid.grid_loc_to_compressed_loc_approx({reg_rect.xmax(), reg_rect.ymax(), selected_layer}); + auto max_compressed_loc + = compressed_block_grid.grid_loc_to_compressed_loc_approx({reg_rect.xmax(), reg_rect.ymax(), selected_layer}); int delta_cx = max_compressed_loc.x - min_compressed_loc.x; @@ -680,18 +677,12 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, bool legal; - legal = find_compatible_compressed_loc_in_range(block_type, - delta_cx, - {cx_from, cy_from, selected_layer}, - {min_compressed_loc.x, max_compressed_loc.x, - min_compressed_loc.y, max_compressed_loc.y, - selected_layer, selected_layer}, + legal = find_compatible_compressed_loc_in_range(block_type, delta_cx, {cx_from, cy_from, selected_layer}, + {min_compressed_loc.x, max_compressed_loc.x, min_compressed_loc.y, + max_compressed_loc.y, selected_layer, selected_layer}, to_compressed_loc, - /*is_median=*/false, - selected_layer, - /*search_for_empty=*/false, - blk_loc_registry); - + /*is_median=*/false, selected_layer, + /*search_for_empty=*/false, blk_loc_registry); if (!legal) { //No valid position found @@ -842,17 +833,12 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, return legal; } -bool try_place_macro(const t_pl_macro& pl_macro, - t_pl_loc head_pos, - BlkLocRegistry& blk_loc_registry) { +bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos, BlkLocRegistry& blk_loc_registry) { bool f_placer_debug = g_vpr_ctx.placement().f_placer_debug; const GridBlock& grid_blocks = blk_loc_registry.grid_blocks(); - VTR_LOGV_DEBUG(f_placer_debug, "\t\t\t\tTry to place the macro at %dx%dx%dx%d\n", - head_pos.x, - head_pos.y, - head_pos.sub_tile, - head_pos.layer); + VTR_LOGV_DEBUG(f_placer_debug, "\t\t\t\tTry to place the macro at %dx%dx%dx%d\n", head_pos.x, head_pos.y, + head_pos.sub_tile, head_pos.layer); bool macro_placed = false; @@ -911,7 +897,8 @@ static bool place_macro(int macros_max_num_tries, //We need to place densely in second iteration to be able to find a legal initial placement solution if (blk_types_empty_locs_in_grid != nullptr && !blk_types_empty_locs_in_grid->empty()) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry dense placement\n"); - macro_placed = try_dense_placement(pl_macro, pr, block_type, pad_loc_type, blk_types_empty_locs_in_grid, blk_loc_registry); + macro_placed = try_dense_placement(pl_macro, pr, block_type, pad_loc_type, blk_types_empty_locs_in_grid, + blk_loc_registry); } if (!macro_placed) { @@ -984,7 +971,6 @@ static vtr::vector assign_block_scores() { return block_scores; } - static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, enum e_pad_loc_type pad_loc_type, @@ -1000,8 +986,12 @@ static void place_all_blocks(const t_placer_opts& placer_opts, std::unordered_set unplaced_blk_type_in_curr_itr; auto criteria = [&block_scores](ClusterBlockId lhs, ClusterBlockId rhs) { - int lhs_score = block_scores[lhs].macro_size + block_scores[lhs].number_of_placed_connections + SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR * block_scores[lhs].tiles_outside_of_floorplan_constraints + SORT_WEIGHT_PER_FAILED_BLOCK * block_scores[lhs].failed_to_place_in_prev_attempts; - int rhs_score = block_scores[rhs].macro_size + block_scores[rhs].number_of_placed_connections + SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR * block_scores[rhs].tiles_outside_of_floorplan_constraints + SORT_WEIGHT_PER_FAILED_BLOCK * block_scores[rhs].failed_to_place_in_prev_attempts; + int lhs_score = block_scores[lhs].macro_size + block_scores[lhs].number_of_placed_connections + + SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR * block_scores[lhs].tiles_outside_of_floorplan_constraints + + SORT_WEIGHT_PER_FAILED_BLOCK * block_scores[lhs].failed_to_place_in_prev_attempts; + int rhs_score = block_scores[rhs].macro_size + block_scores[rhs].number_of_placed_connections + + SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR * block_scores[rhs].tiles_outside_of_floorplan_constraints + + SORT_WEIGHT_PER_FAILED_BLOCK * block_scores[rhs].failed_to_place_in_prev_attempts; return lhs_score < rhs_score; }; @@ -1049,7 +1039,8 @@ static void place_all_blocks(const t_placer_opts& placer_opts, blocks_placed_since_heap_update++; - bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores, blk_loc_registry); + bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], + &block_scores, blk_loc_registry); //update heap based on update_heap_freq calculated above if (blocks_placed_since_heap_update % (update_heap_freq) == 0) { @@ -1058,13 +1049,15 @@ static void place_all_blocks(const t_placer_opts& placer_opts, } if (!block_placed) { - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Didn't find a location the block\n", size_t(blk_id)); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Didn't find a location the block\n", + size_t(blk_id)); //add current block to list to ensure it will be placed sooner in the next iteration in initial placement number_of_unplaced_blks_in_curr_itr++; block_scores[blk_id].failed_to_place_in_prev_attempts++; int imacro; get_imacro_from_iblk(&imacro, blk_id, place_ctx.pl_macros); - if (imacro != -1) { //the block belongs to macro that contain a chain, we need to turn on dense placement in next iteration for that type of block + if (imacro + != -1) { //the block belongs to macro that contain a chain, we need to turn on dense placement in next iteration for that type of block unplaced_blk_type_in_curr_itr.insert(blk_id_type->index); } } @@ -1082,7 +1075,8 @@ static void place_all_blocks(const t_placer_opts& placer_opts, } //print unplaced blocks in the current iteration - VTR_LOG("Initial placement iteration %d has finished with %d unplaced blocks\n", iter_no, number_of_unplaced_blks_in_curr_itr); + VTR_LOG("Initial placement iteration %d has finished with %d unplaced blocks\n", iter_no, + number_of_unplaced_blks_in_curr_itr); } } @@ -1108,7 +1102,8 @@ bool place_one_block(const ClusterBlockId blk_id, if (imacro != -1) { //If the block belongs to a macro, pass that macro to the placement routines VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tBelongs to a macro %d\n", imacro); const t_pl_macro& pl_macro = pl_macros[imacro]; - placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, blk_loc_registry); + placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, + blk_types_empty_locs_in_grid, *block_scores, blk_loc_registry); } else { //If it does not belong to a macro, create a macro with the one block and then pass to the placement routines //This is done so that the initial placement flow can be the same whether the block belongs to a macro or not @@ -1117,7 +1112,8 @@ bool place_one_block(const ClusterBlockId blk_id, macro_member.offset = t_pl_offset(0, 0, 0, 0); t_pl_macro pl_macro; pl_macro.members.push_back(macro_member); - placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, blk_loc_registry); + placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, + blk_types_empty_locs_in_grid, *block_scores, blk_loc_registry); } return placed_macro; @@ -1134,7 +1130,6 @@ static void alloc_and_load_movable_blocks(const vtr::vector_map& block_locs); +bool is_block_placed(ClusterBlockId blk_id, const vtr::vector_map& block_locs); /** * @brief Tries to find an initial placement location for each block considering floorplanning constraints @@ -159,6 +156,4 @@ bool place_one_block(const ClusterBlockId blk_id, vtr::vector* block_scores, BlkLocRegistry& blk_loc_registry); - - #endif diff --git a/vpr/src/place/manual_move_generator.cpp b/vpr/src/place/manual_move_generator.cpp index 4146cfb3eeb..2ee4eea1d6a 100644 --- a/vpr/src/place/manual_move_generator.cpp +++ b/vpr/src/place/manual_move_generator.cpp @@ -15,7 +15,7 @@ #include "placer_state.h" #ifndef NO_GRAPHICS -# include "draw.h" +#include "draw.h" #endif //NO_GRAPHICS ManualMoveGenerator::ManualMoveGenerator(PlacerState& placer_state) @@ -68,4 +68,3 @@ e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ e_create_move create_move = ::create_move(blocks_affected, b_from, to, place_ctx.blk_loc_registry()); return create_move; } - diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 44e1732e6d2..41494e98fec 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -7,8 +7,7 @@ #include -MedianMoveGenerator::MedianMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function) +MedianMoveGenerator::MedianMoveGenerator(PlacerState& placer_state, e_reward_function reward_function) : MoveGenerator(placer_state, reward_function) {} e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, @@ -24,14 +23,13 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ const auto& blk_loc_registry = placer_state.blk_loc_registry(); //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, /*highly_crit_block=*/false, /*net_from=*/nullptr, - /*pin_from=*/nullptr, - placer_state); + /*pin_from=*/nullptr, placer_state); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Median Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Median Move Choose Block %d - rlim %f\n", size_t(b_from), + rlim); if (!b_from) { //No movable block found VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tNo movable block found\n"); @@ -40,7 +38,6 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ const int num_layers = device_ctx.grid.get_num_layers(); - t_pl_loc from = block_locs[b_from].loc; int from_layer = from.layer; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); @@ -124,7 +121,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ } else { layer_new = net_bb_coords.layer_min; } - + // If the moving block is on the border of the bounding box, we cannot get // the bounding box incrementally. In that case, bounding box should be calculated // from scratch. @@ -144,7 +141,8 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ } if ((place_move_ctx.X_coord.empty()) || (place_move_ctx.Y_coord.empty()) || (place_move_ctx.layer_coord.empty())) { - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tMove aborted - X_coord or y_coord or layer_coord are empty\n"); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, + "\tMove aborted - X_coord or y_coord or layer_coord are empty\n"); return e_create_move::ABORT; } @@ -163,9 +161,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ limit_coords.layer_max = place_move_ctx.layer_coord[floor((place_move_ctx.layer_coord.size() - 1) / 2) + 1]; //arrange the different range limiters - t_range_limiters range_limiters{rlim, - place_move_ctx.first_rlim, - placer_opts.place_dm_rlim}; + t_range_limiters range_limiters{rlim, place_move_ctx.first_rlim, placer_opts.place_dm_rlim}; //find a location in a range around the center of median region t_pl_loc median_point; @@ -310,14 +306,14 @@ bool MedianMoveGenerator::get_bb_incrementally(ClusterNetId net_id, t_bb union_bb; const bool cube_bb = g_vpr_ctx.placement().cube_bb; /* Calculating per-layer bounding box is more time consuming compared to cube bounding box. To speed up - * this move, the bounding box used for this move is of the type cube bounding box even if the per-layer - * bounding box is used by placement SA engine. - * If per-layer bounding box is used, we take a union of boundinx boxes on each layer to make a cube bounding box. - * For example, the xmax of this cube boundix box is determined by the maximim x coordinate across all blocks on all layers. - */ + * this move, the bounding box used for this move is of the type cube bounding box even if the per-layer + * bounding box is used by placement SA engine. + * If per-layer bounding box is used, we take a union of boundinx boxes on each layer to make a cube bounding box. + * For example, the xmax of this cube boundix box is determined by the maximim x coordinate across all blocks on all layers. + */ if (!cube_bb) { - std::tie(union_bb_edge, union_bb) = union_2d_bb_incr(place_move_ctx.layer_bb_num_on_edges[net_id], - place_move_ctx.layer_bb_coords[net_id]); + std::tie(union_bb_edge, union_bb) + = union_2d_bb_incr(place_move_ctx.layer_bb_num_on_edges[net_id], place_move_ctx.layer_bb_coords[net_id]); } /* In this move, we use a 3D bounding box. Thus, if per-layer BB is used by placer, we need to take a union of BBs and use that for the rest of diff --git a/vpr/src/place/median_move_generator.h b/vpr/src/place/median_move_generator.h index 15bda1dae33..9503f9bc791 100644 --- a/vpr/src/place/median_move_generator.h +++ b/vpr/src/place/median_move_generator.h @@ -18,8 +18,7 @@ class MedianMoveGenerator : public MoveGenerator { public: MedianMoveGenerator() = delete; - MedianMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function); + MedianMoveGenerator(PlacerState& placer_state, e_reward_function reward_function); private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, @@ -40,10 +39,14 @@ class MedianMoveGenerator : public MoveGenerator { * can be used. Essentially, I am assuming the pins always lie on the outside of the bounding box. * The x and y coordinates are the pin's x and y coordinates. IO blocks are considered to be * one cell in for simplicity. */ - bool get_bb_incrementally(ClusterNetId net_id, t_bb& bb_coord_new, - int xold, int yold, int layer_old, - int xnew, int ynew, int layer_new); - + bool get_bb_incrementally(ClusterNetId net_id, + t_bb& bb_coord_new, + int xold, + int yold, + int layer_old, + int xnew, + int ynew, + int layer_new); /** * @brief Finds the bounding box of a net and stores its coordinates in the bb_coord_new data structure. diff --git a/vpr/src/place/move_generator.cpp b/vpr/src/place/move_generator.cpp index 7c7e252a050..43891610035 100644 --- a/vpr/src/place/move_generator.cpp +++ b/vpr/src/place/move_generator.cpp @@ -21,10 +21,8 @@ void MoveGenerator::calculate_reward_and_process_outcome(const MoveOutcomeStats& if (delta_c < 0) { float reward = -1 * (move_outcome_stats.delta_cost_norm - + (0.5 - timing_bb_factor) - * move_outcome_stats.delta_timing_cost_norm - + timing_bb_factor - * move_outcome_stats.delta_bb_cost_norm); + + (0.5 - timing_bb_factor) * move_outcome_stats.delta_timing_cost_norm + + timing_bb_factor * move_outcome_stats.delta_bb_cost_norm); process_outcome(reward, reward_func_); } else { process_outcome(0, reward_func_); @@ -35,7 +33,6 @@ void MoveGenerator::calculate_reward_and_process_outcome(const MoveOutcomeStats& process_outcome(-1 * delta_c, reward_func_); break; - case e_reward_function::NON_PENALIZING_BASIC: case e_reward_function::RUNTIME_AWARE: if (delta_c < 0) { @@ -55,12 +52,9 @@ void MoveGenerator::calculate_reward_and_process_outcome(const MoveOutcomeStats& void MoveTypeStat::print_placement_move_types_stats() { VTR_LOG("\n\nPlacement perturbation distribution by block and move type: \n"); - VTR_LOG( - "------------------ ----------------- ---------------- ---------------- --------------- ------------ \n"); - VTR_LOG( - " Block Type Move Type (%%) of Total Accepted(%%) Rejected(%%) Aborted(%%)\n"); - VTR_LOG( - "------------------ ----------------- ---------------- ---------------- --------------- ------------ \n"); + VTR_LOG("------------------ ----------------- ---------------- ---------------- --------------- ------------ \n"); + VTR_LOG(" Block Type Move Type (%%) of Total Accepted(%%) Rejected(%%) Aborted(%%)\n"); + VTR_LOG("------------------ ----------------- ---------------- ---------------- --------------- ------------ \n"); int total_moves = 0; for (size_t i = 0; i < blk_type_moves.size(); ++i) { @@ -91,11 +85,9 @@ void MoveTypeStat::print_placement_move_types_stats() { } else { VTR_LOG(" "); } - VTR_LOG( - " %-22.20s %-16.2f %-15.2f %-14.2f %-13.2f\n", - move_name.c_str(), 100.0f * (float)moves / (float)total_moves, - 100.0f * (float)accepted / (float)moves, 100.0f * (float)rejected / (float)moves, - 100.0f * (float)aborted / (float)moves); + VTR_LOG(" %-22.20s %-16.2f %-15.2f %-14.2f %-13.2f\n", move_name.c_str(), + 100.0f * (float)moves / (float)total_moves, 100.0f * (float)accepted / (float)moves, + 100.0f * (float)rejected / (float)moves, 100.0f * (float)aborted / (float)moves); } count++; } diff --git a/vpr/src/place/move_generator.h b/vpr/src/place/move_generator.h index d14c14312d0..a5067c9b58f 100644 --- a/vpr/src/place/move_generator.h +++ b/vpr/src/place/move_generator.h @@ -48,7 +48,6 @@ struct MoveTypeStat { */ class MoveGenerator { public: - /** * @brief Initializes some protected member variables that are used * by inheriting classes. @@ -86,7 +85,8 @@ class MoveGenerator { t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities) = 0; + const PlacerCriticalities* criticalities) + = 0; /** * @brief Recieves feedback about the outcome of the previously proposed move diff --git a/vpr/src/place/move_transactions.cpp b/vpr/src/place/move_transactions.cpp index a116be0d326..26bdf81e769 100644 --- a/vpr/src/place/move_transactions.cpp +++ b/vpr/src/place/move_transactions.cpp @@ -5,9 +5,7 @@ #include "grid_block.h" #include "vtr_assert.h" -t_pl_blocks_to_be_moved::t_pl_blocks_to_be_moved(size_t max_blocks){ - moved_blocks.reserve(max_blocks); -} +t_pl_blocks_to_be_moved::t_pl_blocks_to_be_moved(size_t max_blocks) { moved_blocks.reserve(max_blocks); } size_t t_pl_blocks_to_be_moved::get_size_and_increment() { VTR_ASSERT_SAFE(moved_blocks.size() < moved_blocks.capacity()); @@ -59,8 +57,7 @@ std::set t_pl_blocks_to_be_moved::determine_locations_emptied_by_move( } std::set empty_locs; - std::set_difference(moved_from_set.begin(), moved_from_set.end(), - moved_to_set.begin(), moved_to_set.end(), + std::set_difference(moved_from_set.begin(), moved_from_set.end(), moved_to_set.begin(), moved_to_set.end(), std::inserter(empty_locs, empty_locs.begin())); return empty_locs; diff --git a/vpr/src/place/move_transactions.h b/vpr/src/place/move_transactions.h index 68686be262e..ba592a227a1 100644 --- a/vpr/src/place/move_transactions.h +++ b/vpr/src/place/move_transactions.h @@ -49,14 +49,14 @@ struct t_pl_blocks_to_be_moved { t_pl_blocks_to_be_moved(t_pl_blocks_to_be_moved&&) = delete; /** - * @brief This function increments the size of the moved_blocks vector and return the index - * of the newly added last elements. - */ + * @brief This function increments the size of the moved_blocks vector and return the index + * of the newly added last elements. + */ size_t get_size_and_increment(); /** - * @brief This function clears all data structures of this struct. - */ + * @brief This function clears all data structures of this struct. + */ void clear_move_blocks(); /** @@ -68,11 +68,8 @@ struct t_pl_blocks_to_be_moved { */ bool driven_by_moved_block(const ClusterNetId net) const; + e_block_move_result record_block_move(ClusterBlockId blk, t_pl_loc to, const BlkLocRegistry& blk_loc_registry); - e_block_move_result record_block_move(ClusterBlockId blk, - t_pl_loc to, - const BlkLocRegistry& blk_loc_registry); - std::set determine_locations_emptied_by_move(); std::vector moved_blocks; diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index 67889ca115a..f3f6df4ef52 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -102,7 +102,8 @@ e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affecte int imember_from = 0; outcome = record_macro_swaps(blocks_affected, imacro_from, imember_from, swap_offset, blk_loc_registry); - VTR_ASSERT_SAFE(outcome != e_block_move_result::VALID || imember_from == int(pl_macros[imacro_from].members.size())); + VTR_ASSERT_SAFE(outcome != e_block_move_result::VALID + || imember_from == int(pl_macros[imacro_from].members.size())); } else { ClusterBlockId b_to = grid_blocks.block_at_location(to); @@ -158,14 +159,13 @@ e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_aff return e_block_move_result::ABORT; } - // Sets up the blocks moved outcome = blocks_affected.record_block_move(b_from, to, blk_loc_registry); if (outcome != e_block_move_result::VALID) { return outcome; } - + t_pl_loc from = block_locs[b_from].loc; outcome = blocks_affected.record_block_move(b_to, from, blk_loc_registry); @@ -188,7 +188,8 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, e_block_move_result outcome = e_block_move_result::VALID; - for (; imember_from < int(pl_macros[imacro_from].members.size()) && outcome == e_block_move_result::VALID; imember_from++) { + for (; imember_from < int(pl_macros[imacro_from].members.size()) && outcome == e_block_move_result::VALID; + imember_from++) { // Gets the new from and to info for every block in the macro // cannot use the old from and to info ClusterBlockId curr_b_from = pl_macros[imacro_from].members[imember_from].blk_index; @@ -220,7 +221,8 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, imember_from = pl_macros[imacro_from].members.size(); break; //record_macro_self_swaps() handles this case completely, so we don't need to continue the loop } else { - outcome = record_macro_macro_swaps(blocks_affected, imacro_from, imember_from, imacro_to, b_to, swap_offset, blk_loc_registry); + outcome = record_macro_macro_swaps(blocks_affected, imacro_from, imember_from, imacro_to, b_to, + swap_offset, blk_loc_registry); if (outcome == e_block_move_result::INVERT_VALID) { break; //The move was inverted and successfully proposed, don't need to continue the loop } @@ -292,10 +294,12 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff //NOTE: We mutate imember_from so the outer from macro walking loop moves in lock-step int imember_to = 0; t_pl_offset from_to_macro_offset = pl_macros[imacro_from].members[imember_from].offset; - for (; imember_from < int(pl_macros[imacro_from].members.size()) && imember_to < int(pl_macros[imacro_to].members.size()); + for (; imember_from < int(pl_macros[imacro_from].members.size()) + && imember_to < int(pl_macros[imacro_to].members.size()); ++imember_from, ++imember_to) { //Check that both macros have the same shape while they overlap - if (pl_macros[imacro_from].members[imember_from].offset != pl_macros[imacro_to].members[imember_to].offset + from_to_macro_offset) { + if (pl_macros[imacro_from].members[imember_from].offset + != pl_macros[imacro_to].members[imember_to].offset + from_to_macro_offset) { log_move_abort("macro shapes disagree"); return e_block_move_result::ABORT; } @@ -388,7 +392,8 @@ e_block_move_result identify_macro_self_swap_affected_macros(std::vector& m e_block_move_result outcome = e_block_move_result::VALID; - for (size_t imember = 0; imember < pl_macros[imacro].members.size() && outcome == e_block_move_result::VALID; ++imember) { + for (size_t imember = 0; imember < pl_macros[imacro].members.size() && outcome == e_block_move_result::VALID; + ++imember) { ClusterBlockId blk = pl_macros[imacro].members[imember].blk_index; t_pl_loc from = block_locs[blk].loc; @@ -433,7 +438,8 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe } //Remove any duplicate macros - affected_macros.resize(std::distance(affected_macros.begin(), std::unique(affected_macros.begin(), affected_macros.end()))); + affected_macros.resize( + std::distance(affected_macros.begin(), std::unique(affected_macros.begin(), affected_macros.end()))); std::vector displaced_blocks; @@ -457,7 +463,8 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe }; std::vector non_macro_displaced_blocks; - std::copy_if(displaced_blocks.begin(), displaced_blocks.end(), std::back_inserter(non_macro_displaced_blocks), is_non_macro_block); + std::copy_if(displaced_blocks.begin(), displaced_blocks.end(), std::back_inserter(non_macro_displaced_blocks), + is_non_macro_block); //Based on the currently queued block moves, find the empty 'holes' left behind auto empty_locs = blocks_affected.determine_locations_emptied_by_move(); @@ -474,9 +481,7 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe return outcome; } -bool is_legal_swap_to_location(ClusterBlockId blk, - t_pl_loc to, - const BlkLocRegistry& blk_loc_registry) { +bool is_legal_swap_to_location(ClusterBlockId blk, t_pl_loc to, const BlkLocRegistry& blk_loc_registry) { //Make sure that the swap_to location is valid //It must be: // * on chip, and @@ -489,11 +494,8 @@ bool is_legal_swap_to_location(ClusterBlockId blk, const auto& block_locs = blk_loc_registry.block_locs(); const GridBlock& grid_blocks = blk_loc_registry.grid_blocks(); - - if (to.x < 0 || to.x >= int(device_ctx.grid.width()) - || to.y < 0 || to.y >= int(device_ctx.grid.height()) - || to.layer < 0 - || to.layer >= int(device_ctx.grid.get_num_layers())) { + if (to.x < 0 || to.x >= int(device_ctx.grid.width()) || to.y < 0 || to.y >= int(device_ctx.grid.height()) + || to.layer < 0 || to.layer >= int(device_ctx.grid.get_num_layers())) { return false; } @@ -516,8 +518,7 @@ bool is_legal_swap_to_location(ClusterBlockId blk, } #ifdef VTR_ENABLE_DEBUG_LOGGING -void enable_placer_debug(const t_placer_opts& placer_opts, - ClusterBlockId blk_id) { +void enable_placer_debug(const t_placer_opts& placer_opts, ClusterBlockId blk_id) { if (!blk_id.is_valid()) { return; } @@ -560,8 +561,10 @@ void enable_placer_debug(const t_placer_opts& placer_opts, } } - if (active_blk_debug) f_placer_debug &= match_blk; - if (active_net_debug) f_placer_debug &= match_net; + if (active_blk_debug) + f_placer_debug &= match_blk; + if (active_net_debug) + f_placer_debug &= match_net; } #endif @@ -574,7 +577,8 @@ ClusterBlockId propose_block_to_move(const t_placer_opts& placer_opts, ClusterBlockId b_from = ClusterBlockId::INVALID(); auto& cluster_ctx = g_vpr_ctx.clustering(); - if (logical_blk_type_index == -1) { //If the block type is unspecified, choose any random block to be swapped with another random block + if (logical_blk_type_index + == -1) { //If the block type is unspecified, choose any random block to be swapped with another random block if (highly_crit_block) { b_from = pick_from_highly_critical_block(*net_from, *pin_from, placer_state); } else { @@ -646,9 +650,7 @@ ClusterBlockId pick_from_block(const int logical_blk_type_index) { //Pick a random highly critical block to be swapped with another random block. //If none is found return ClusterBlockId::INVALID() -ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, - int& pin_from, - const PlacerState& placer_state) { +ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from, const PlacerState& placer_state) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_move_ctx = placer_state.move(); auto& block_locs = placer_state.block_locs(); @@ -663,7 +665,8 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, } //pick a random highly critical pin and find the nets driver block - std::pair crit_pin = place_move_ctx.highly_crit_pins[vtr::irand(place_move_ctx.highly_crit_pins.size() - 1)]; + std::pair crit_pin + = place_move_ctx.highly_crit_pins[vtr::irand(place_move_ctx.highly_crit_pins.size() - 1)]; ClusterBlockId b_from = cluster_ctx.clb_nlist.net_driver_block(crit_pin.first); if (block_locs[b_from].is_fixed) { @@ -698,7 +701,8 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, } //pick a random highly critical pin and find the nets driver block - std::pair crit_pin = place_move_ctx.highly_crit_pins[vtr::irand(place_move_ctx.highly_crit_pins.size() - 1)]; + std::pair crit_pin + = place_move_ctx.highly_crit_pins[vtr::irand(place_move_ctx.highly_crit_pins.size() - 1)]; ClusterBlockId b_from = cluster_ctx.clb_nlist.net_driver_block(crit_pin.first); //Check if picked block type matches with the blk_type specified, and it is not fixed @@ -742,38 +746,27 @@ bool find_to_loc_uniform(t_logical_block_type_ptr type, VTR_ASSERT(to_layer_num != OPEN); //Determine the coordinates in the compressed grid space of the current block - std::vector compressed_locs = get_compressed_loc(compressed_block_grid, - from, - num_layers); + std::vector compressed_locs = get_compressed_loc(compressed_block_grid, from, num_layers); //Determine the valid compressed grid location ranges - t_bb search_range = get_compressed_grid_target_search_range(compressed_block_grid, - compressed_locs[to_layer_num], - rlim); + t_bb search_range + = get_compressed_grid_target_search_range(compressed_block_grid, compressed_locs[to_layer_num], rlim); int delta_cx = search_range.xmax - search_range.xmin; t_physical_tile_loc to_compressed_loc; bool legal = false; if (is_cluster_constrained(b_from)) { - bool intersect = intersect_range_limit_with_floorplan_constraints(b_from, - search_range, - delta_cx, - to_layer_num); + bool intersect = intersect_range_limit_with_floorplan_constraints(b_from, search_range, delta_cx, to_layer_num); if (!intersect) { return false; } } //TODO: For now, we only move the blocks on the same tile - legal = find_compatible_compressed_loc_in_range(type, - delta_cx, - compressed_locs[to_layer_num], - search_range, + legal = find_compatible_compressed_loc_in_range(type, delta_cx, compressed_locs[to_layer_num], search_range, to_compressed_loc, - /*is_median=*/false, - to_layer_num, - /*search_for_empty=*/false, - blk_loc_registry); + /*is_median=*/false, to_layer_num, + /*search_for_empty=*/false, blk_loc_registry); if (!legal) { //No valid position found @@ -792,21 +785,17 @@ bool find_to_loc_uniform(t_logical_block_type_ptr type, VTR_ASSERT_MSG(grid.get_width_offset({to.x, to.y, to.layer}) == 0, "Should be at block base location"); VTR_ASSERT_MSG(grid.get_height_offset({to.x, to.y, to.layer}) == 0, "Should be at block base location"); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tSearch range %dx%dx%d x %dx%dx%d - Legal position at %d,%d,%d is found\n", - search_range.xmin, search_range.ymin, search_range.layer_min, - search_range.xmax, search_range.ymax, search_range.layer_max, - to.x, to.y, to.layer); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, + "\tSearch range %dx%dx%d x %dx%dx%d - Legal position at %d,%d,%d is found\n", search_range.xmin, + search_range.ymin, search_range.layer_min, search_range.xmax, search_range.ymax, + search_range.layer_max, to.x, to.y, to.layer); return true; } //Accessor for f_placer_breakpoint_reached -bool placer_breakpoint_reached() { - return f_placer_breakpoint_reached; -} +bool placer_breakpoint_reached() { return f_placer_breakpoint_reached; } -void set_placer_breakpoint_reached(bool flag) { - f_placer_breakpoint_reached = flag; -} +void set_placer_breakpoint_reached(bool flag) { f_placer_breakpoint_reached = flag; } bool find_to_loc_median(t_logical_block_type_ptr blk_type, const t_pl_loc& from_loc, @@ -820,59 +809,49 @@ bool find_to_loc_median(t_logical_block_type_ptr blk_type, const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[blk_type->index]; //Determine the coordinates in the compressed grid space of the current block - std::vector from_compressed_locs = get_compressed_loc(compressed_block_grid, - from_loc, - g_vpr_ctx.device().grid.get_num_layers()); + std::vector from_compressed_locs + = get_compressed_loc(compressed_block_grid, from_loc, g_vpr_ctx.device().grid.get_num_layers()); VTR_ASSERT(limit_coords->xmin <= limit_coords->xmax); VTR_ASSERT(limit_coords->ymin <= limit_coords->ymax); //Determine the valid compressed grid location ranges - std::vector min_compressed_loc = get_compressed_loc_approx(compressed_block_grid, - {limit_coords->xmin, limit_coords->ymin, 0, to_layer_num}, - num_layers); - std::vector max_compressed_loc = get_compressed_loc_approx(compressed_block_grid, - {limit_coords->xmax, limit_coords->ymax, 0, to_layer_num}, - num_layers); + std::vector min_compressed_loc = get_compressed_loc_approx( + compressed_block_grid, {limit_coords->xmin, limit_coords->ymin, 0, to_layer_num}, num_layers); + std::vector max_compressed_loc = get_compressed_loc_approx( + compressed_block_grid, {limit_coords->xmax, limit_coords->ymax, 0, to_layer_num}, num_layers); VTR_ASSERT(min_compressed_loc[to_layer_num].x >= 0); - VTR_ASSERT(static_cast(compressed_block_grid.get_num_columns(to_layer_num)) - 1 - max_compressed_loc[to_layer_num].x >= 0); + VTR_ASSERT(static_cast(compressed_block_grid.get_num_columns(to_layer_num)) - 1 + - max_compressed_loc[to_layer_num].x + >= 0); VTR_ASSERT(max_compressed_loc[to_layer_num].x >= min_compressed_loc[to_layer_num].x); int delta_cx = max_compressed_loc[to_layer_num].x - min_compressed_loc[to_layer_num].x; VTR_ASSERT(min_compressed_loc[to_layer_num].y >= 0); - VTR_ASSERT(static_cast(compressed_block_grid.get_num_rows(to_layer_num)) - 1 - max_compressed_loc[to_layer_num].y >= 0); + VTR_ASSERT(static_cast(compressed_block_grid.get_num_rows(to_layer_num)) - 1 + - max_compressed_loc[to_layer_num].y + >= 0); VTR_ASSERT(max_compressed_loc[to_layer_num].y >= min_compressed_loc[to_layer_num].y); - t_bb search_range(min_compressed_loc[to_layer_num].x, - max_compressed_loc[to_layer_num].x, - min_compressed_loc[to_layer_num].y, - max_compressed_loc[to_layer_num].y, - to_layer_num, + t_bb search_range(min_compressed_loc[to_layer_num].x, max_compressed_loc[to_layer_num].x, + min_compressed_loc[to_layer_num].y, max_compressed_loc[to_layer_num].y, to_layer_num, to_layer_num); t_physical_tile_loc to_compressed_loc; bool legal = false; if (is_cluster_constrained(b_from)) { - bool intersect = intersect_range_limit_with_floorplan_constraints(b_from, - search_range, - delta_cx, - to_layer_num); + bool intersect = intersect_range_limit_with_floorplan_constraints(b_from, search_range, delta_cx, to_layer_num); if (!intersect) { return false; } } - legal = find_compatible_compressed_loc_in_range(blk_type, - delta_cx, - from_compressed_locs[to_layer_num], - search_range, - to_compressed_loc, - /*is_median=*/true, - to_layer_num, - /*search_for_empty=*/false, - blk_loc_registry); + legal = find_compatible_compressed_loc_in_range(blk_type, delta_cx, from_compressed_locs[to_layer_num], + search_range, to_compressed_loc, + /*is_median=*/true, to_layer_num, + /*search_for_empty=*/false, blk_loc_registry); if (!legal) { //No valid position found @@ -891,10 +870,10 @@ bool find_to_loc_median(t_logical_block_type_ptr blk_type, VTR_ASSERT_MSG(grid.get_width_offset({to_loc.x, to_loc.y, to_loc.layer}) == 0, "Should be at block base location"); VTR_ASSERT_MSG(grid.get_height_offset({to_loc.x, to_loc.y, to_loc.layer}) == 0, "Should be at block base location"); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tSearch range %dx%dx%d x %dx%dx%d - Legal position at %d,%d,%d is found\n", - search_range.xmin, search_range.ymin, search_range.layer_min, - search_range.xmax, search_range.ymax, search_range.layer_max, - to_loc.x, to_loc.y, to_loc.layer); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, + "\tSearch range %dx%dx%d x %dx%dx%d - Legal position at %d,%d,%d is found\n", search_range.xmin, + search_range.ymin, search_range.layer_min, search_range.xmax, search_range.ymax, + search_range.layer_max, to_loc.x, to_loc.y, to_loc.layer); return true; } @@ -911,14 +890,12 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, VTR_ASSERT(to_layer_num >= 0); const int num_layers = g_vpr_ctx.device().grid.get_num_layers(); - std::vector from_compressed_loc = get_compressed_loc(compressed_block_grid, - from_loc, - num_layers); + std::vector from_compressed_loc + = get_compressed_loc(compressed_block_grid, from_loc, num_layers); //Determine the coordinates in the compressed grid space of the current block - std::vector centroid_compressed_loc = get_compressed_loc_approx(compressed_block_grid, - centroid, - num_layers); + std::vector centroid_compressed_loc + = get_compressed_loc_approx(compressed_block_grid, centroid, num_layers); //Determine the valid compressed grid location ranges int delta_cx; @@ -927,14 +904,13 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, // If we are early in the anneal and the range limit still big enough --> search around the center location that the move proposed // If not --> search around the current location of the block but in the direction of the center location that the move proposed if (range_limiters.original_rlim > 0.15 * range_limiters.first_rlim) { - search_range = get_compressed_grid_target_search_range(compressed_block_grid, - centroid_compressed_loc[to_layer_num], - std::min(range_limiters.original_rlim, range_limiters.dm_rlim)); + search_range = get_compressed_grid_target_search_range( + compressed_block_grid, centroid_compressed_loc[to_layer_num], + std::min(range_limiters.original_rlim, range_limiters.dm_rlim)); } else { - search_range = get_compressed_grid_bounded_search_range(compressed_block_grid, - from_compressed_loc[to_layer_num], - centroid_compressed_loc[to_layer_num], - std::min(range_limiters.original_rlim, range_limiters.dm_rlim)); + search_range = get_compressed_grid_bounded_search_range( + compressed_block_grid, from_compressed_loc[to_layer_num], centroid_compressed_loc[to_layer_num], + std::min(range_limiters.original_rlim, range_limiters.dm_rlim)); } delta_cx = search_range.xmax - search_range.xmin; @@ -942,25 +918,17 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, bool legal = false; if (is_cluster_constrained(b_from)) { - bool intersect = intersect_range_limit_with_floorplan_constraints(b_from, - search_range, - delta_cx, - to_layer_num); + bool intersect = intersect_range_limit_with_floorplan_constraints(b_from, search_range, delta_cx, to_layer_num); if (!intersect) { return false; } } //TODO: For now, we only move the blocks on the same tile - legal = find_compatible_compressed_loc_in_range(blk_type, - delta_cx, - from_compressed_loc[to_layer_num], - search_range, + legal = find_compatible_compressed_loc_in_range(blk_type, delta_cx, from_compressed_loc[to_layer_num], search_range, to_compressed_loc, - /*is_median=*/false, - to_layer_num, - /*search_for_empty=*/false, - blk_loc_registry); + /*is_median=*/false, to_layer_num, + /*search_for_empty=*/false, blk_loc_registry); if (!legal) { //No valid position found @@ -979,34 +947,23 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, VTR_ASSERT_MSG(grid.get_width_offset({to_loc.x, to_loc.y, to_loc.layer}) == 0, "Should be at block base location"); VTR_ASSERT_MSG(grid.get_height_offset({to_loc.x, to_loc.y, to_loc.layer}) == 0, "Should be at block base location"); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tSearch range %dx%dx%d x %dx%dx%d - Legal position at %d,%d,%d is found\n", - search_range.xmin, search_range.ymin, search_range.layer_min, - search_range.xmax, search_range.ymax, search_range.layer_max, - to_loc.x, to_loc.y, to_loc.layer); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, + "\tSearch range %dx%dx%d x %dx%dx%d - Legal position at %d,%d,%d is found\n", search_range.xmin, + search_range.ymin, search_range.layer_min, search_range.xmax, search_range.ymax, + search_range.layer_max, to_loc.x, to_loc.y, to_loc.layer); return true; } //Array of move type strings -static const std::array move_type_strings = { - "Uniform", - "Median", - "Centroid", - "W. Centroid", - "W. Median", - "Crit. Uniform", - "Feasible Region", - "NoC Centroid", - "Manual Move"}; +static const std::array move_type_strings + = {"Uniform", "Median", "Centroid", "W. Centroid", "W. Median", + "Crit. Uniform", "Feasible Region", "NoC Centroid", "Manual Move"}; //To convert enum move type to string -const std::string& move_type_to_string(e_move_type move) { - return move_type_strings[int(move)]; -} +const std::string& move_type_to_string(e_move_type move) { return move_type_strings[int(move)]; } //Convert to true (uncompressed) grid locations -void compressed_grid_to_loc(t_logical_block_type_ptr blk_type, - t_physical_tile_loc compressed_loc, - t_pl_loc& to_loc) { +void compressed_grid_to_loc(t_logical_block_type_ptr blk_type, t_physical_tile_loc compressed_loc, t_pl_loc& to_loc) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[blk_type->index]; auto grid_loc = compressed_block_grid.compressed_loc_to_grid_loc(compressed_loc); @@ -1030,7 +987,8 @@ int find_empty_compatible_subtile(t_logical_block_type_ptr type, t_pl_loc to_uncompressed_loc; compressed_grid_to_loc(type, to_loc, to_uncompressed_loc); - const t_physical_tile_loc to_phy_uncompressed_loc{to_uncompressed_loc.x, to_uncompressed_loc.y, to_uncompressed_loc.layer}; + const t_physical_tile_loc to_phy_uncompressed_loc{to_uncompressed_loc.x, to_uncompressed_loc.y, + to_uncompressed_loc.layer}; const t_physical_tile_type_ptr phy_type = device_ctx.grid.get_physical_type(to_phy_uncompressed_loc); const auto& compatible_sub_tiles = compressed_block_grid.compatible_sub_tiles_for_tile.at(phy_type->index); @@ -1142,7 +1100,8 @@ bool find_compatible_compressed_loc_in_range(t_logical_block_type_ptr type, } } if (!legal) { - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tCouldn't find any legal position in the given search range\n"); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, + "\tCouldn't find any legal position in the given search range\n"); } return legal; } @@ -1157,7 +1116,8 @@ std::vector get_compressed_loc(const t_compressed_block_gri for (const int layer_num : compatible_layers) { // This would cause a problem if two blocks of the same types are on different x/y locations of different layers - compressed_locs[layer_num] = compressed_block_grid.grid_loc_to_compressed_loc({grid_loc.x, grid_loc.y, layer_num}); + compressed_locs[layer_num] + = compressed_block_grid.grid_loc_to_compressed_loc({grid_loc.x, grid_loc.y, layer_num}); } return compressed_locs; @@ -1171,7 +1131,8 @@ std::vector get_compressed_loc_approx(const t_compressed_bl const auto& compatible_layers = compressed_block_grid.get_layer_nums(); for (const int layer_num : compatible_layers) { - compressed_locs[layer_num] = compressed_block_grid.grid_loc_to_compressed_loc_approx({grid_loc.x, grid_loc.y, layer_num}); + compressed_locs[layer_num] + = compressed_block_grid.grid_loc_to_compressed_loc_approx({grid_loc.x, grid_loc.y, layer_num}); } return compressed_locs; @@ -1185,13 +1146,16 @@ t_bb get_compressed_grid_target_search_range(const t_compressed_block_grid& comp VTR_ASSERT(compressed_loc.x != OPEN && compressed_loc.y != OPEN && compressed_loc.layer_num != OPEN); int rlim_x_max_range = std::min((int)compressed_block_grid.get_num_columns(layer_num), rlim); - int rlim_y_max_range = std::min((int)compressed_block_grid.get_num_rows(layer_num), rlim); /* for aspect_ratio != 1 case. */ + int rlim_y_max_range + = std::min((int)compressed_block_grid.get_num_rows(layer_num), rlim); /* for aspect_ratio != 1 case. */ search_ranges.xmin = std::max(0, compressed_loc.x - rlim_x_max_range); - search_ranges.xmax = std::min(compressed_block_grid.get_num_columns(layer_num) - 1, compressed_loc.x + rlim_x_max_range); + search_ranges.xmax + = std::min(compressed_block_grid.get_num_columns(layer_num) - 1, compressed_loc.x + rlim_x_max_range); search_ranges.ymin = std::max(0, compressed_loc.y - rlim_y_max_range); - search_ranges.ymax = std::min(compressed_block_grid.get_num_rows(layer_num) - 1, compressed_loc.y + rlim_y_max_range); + search_ranges.ymax + = std::min(compressed_block_grid.get_num_rows(layer_num) - 1, compressed_loc.y + rlim_y_max_range); search_ranges.layer_min = compressed_loc.layer_num; search_ranges.layer_max = compressed_loc.layer_num; @@ -1209,11 +1173,13 @@ t_bb get_compressed_grid_bounded_search_range(const t_compressed_block_grid& com //TODO: This if condition is added because blocks are only moved in the same layer. After the update, this condition should be replaced with an assertion VTR_ASSERT(from_compressed_loc.x != OPEN && from_compressed_loc.y != OPEN && from_compressed_loc.layer_num != OPEN); - VTR_ASSERT(target_compressed_loc.x != OPEN && target_compressed_loc.y != OPEN && target_compressed_loc.layer_num != OPEN); + VTR_ASSERT(target_compressed_loc.x != OPEN && target_compressed_loc.y != OPEN + && target_compressed_loc.layer_num != OPEN); int layer_num = target_compressed_loc.layer_num; int rlim_x_max_range = std::min(compressed_block_grid.get_num_columns(layer_num), rlim); - int rlim_y_max_range = std::min(compressed_block_grid.get_num_rows(layer_num), rlim); /* for aspect_ratio != 1 case. */ + int rlim_y_max_range + = std::min(compressed_block_grid.get_num_rows(layer_num), rlim); /* for aspect_ratio != 1 case. */ int cx_from = from_compressed_loc.x; int cy_from = from_compressed_loc.y; @@ -1262,8 +1228,7 @@ bool intersect_range_limit_with_floorplan_constraints(ClusterBlockId b_from, return false; } - Region range_reg(search_range.xmin, search_range.ymin, - search_range.xmax, search_range.ymax, layer_num); + Region range_reg(search_range.xmin, search_range.ymin, search_range.xmax, search_range.ymax, layer_num); Region compressed_intersect_reg = intersection(compressed_regions[0], range_reg); @@ -1276,9 +1241,9 @@ bool intersect_range_limit_with_floorplan_constraints(ClusterBlockId b_from, const auto [layer_low, layer_high] = compressed_intersect_reg.get_layer_range(); VTR_ASSERT(layer_low == layer_num && layer_high == layer_num); - delta_cx = intersect_rect.xmax() - intersect_rect.xmin(); - std::tie(search_range.xmin, search_range.ymin, - search_range.xmax, search_range.ymax) = intersect_rect.coordinates(); + delta_cx = intersect_rect.xmax() - intersect_rect.xmin(); + std::tie(search_range.xmin, search_range.ymin, search_range.xmax, search_range.ymax) + = intersect_rect.coordinates(); search_range.layer_min = layer_low; search_range.layer_max = layer_high; } @@ -1370,8 +1335,7 @@ t_bb union_2d_bb(const std::vector& bb_vec) { return merged_bb; } -std::pair union_2d_bb_incr(const std::vector& num_edge_vec, - const std::vector& bb_vec) { +std::pair union_2d_bb_incr(const std::vector& num_edge_vec, const std::vector& bb_vec) { t_bb merged_num_edge; t_bb merged_bb; diff --git a/vpr/src/place/move_utils.h b/vpr/src/place/move_utils.h index 80359dd07a2..dafc87f5554 100644 --- a/vpr/src/place/move_utils.h +++ b/vpr/src/place/move_utils.h @@ -16,11 +16,7 @@ constexpr size_t SMALL_NET = 4; /* This is for the placement swap routines. A swap attempt could be * * rejected, accepted or aborted (due to the limitations placed on the * * carry chain support at this point). */ -enum e_move_result { - REJECTED, - ACCEPTED, - ABORTED -}; +enum e_move_result { REJECTED, ACCEPTED, ABORTED }; //This is to list all the available moves enum class e_move_type { @@ -50,7 +46,8 @@ enum class e_create_move { */ struct t_propose_action { e_move_type move_type = e_move_type::INVALID_MOVE; ///& tbb_vec); * @param bb_vec * @return num_edge, 3D bb */ -std::pair union_2d_bb_incr(const std::vector& num_edge_vec, - const std::vector& bb_vec); +std::pair union_2d_bb_incr(const std::vector& num_edge_vec, const std::vector& bb_vec); #ifdef VTR_ENABLE_DEBUG_LOGGING /** @@ -465,8 +455,7 @@ std::pair union_2d_bb_incr(const std::vector& num_edge_vec, * @param placer_opts * @param blk_id The ID of the block that is considered to be moved */ -void enable_placer_debug(const t_placer_opts& placer_opts, - ClusterBlockId blk_id); +void enable_placer_debug(const t_placer_opts& placer_opts, ClusterBlockId blk_id); #endif #endif diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index 63fd0bf07fd..779afe3aa7f 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -46,13 +46,11 @@ static constexpr int MAX_FANOUT_CROSSING_COUNT = 50; * for higher fanout nets. Each entry is the correction factor for the * fanout index-1 */ -constexpr std::array cross_count = {1.0000, 1.0000, 1.0000, 1.0828, 1.1536, 1.2206, 1.2823, 1.3385, - 1.3991, 1.4493, 1.4974, 1.5455, 1.5937, 1.6418, 1.6899, 1.7304, - 1.7709, 1.8114, 1.8519, 1.8924, 1.9288, 1.9652, 2.0015, 2.0379, - 2.0743, 2.1061, 2.1379, 2.1698, 2.2016, 2.2334, 2.2646, 2.2958, - 2.3271, 2.3583, 2.3895, 2.4187, 2.4479, 2.4772, 2.5064, 2.5356, - 2.5610, 2.5864, 2.6117, 2.6371, 2.6625, 2.6887, 2.7148, 2.7410, - 2.7671, 2.7933}; +constexpr std::array cross_count + = {1.0000, 1.0000, 1.0000, 1.0828, 1.1536, 1.2206, 1.2823, 1.3385, 1.3991, 1.4493, 1.4974, 1.5455, 1.5937, + 1.6418, 1.6899, 1.7304, 1.7709, 1.8114, 1.8519, 1.8924, 1.9288, 1.9652, 2.0015, 2.0379, 2.0743, 2.1061, + 2.1379, 2.1698, 2.2016, 2.2334, 2.2646, 2.2958, 2.3271, 2.3583, 2.3895, 2.4187, 2.4479, 2.4772, 2.5064, + 2.5356, 2.5610, 2.5864, 2.6117, 2.6371, 2.6625, 2.6887, 2.7148, 2.7410, 2.7671, 2.7933}; /** * @brief If the moving pin is of type type SINK, update bb_pin_sink_count_new which stores the number of sink pins on each layer of "net_id" @@ -68,8 +66,6 @@ static void update_bb_pin_sink_count(const t_physical_tile_loc& pin_old_loc, vtr::NdMatrixProxy bb_pin_sink_count_new, bool is_output_pin); - - /** * @brief When BB is being updated incrementally, the pin is moving to a new layer, and the BB is of the type "per-layer, * use this function to update the BB on the new layer. @@ -85,8 +81,6 @@ static void add_block_to_bb(const t_physical_tile_loc& new_pin_loc, t_2D_bb& bb_edge_new, t_2D_bb& bb_coord_new); - - /** * @brief Given the 3D BB, calculate the wire-length estimate of the net * @param net_id ID of the net which wirelength estimate is requested @@ -102,11 +96,8 @@ static double get_net_wirelength_estimate(ClusterNetId net_id, const t_bb& bb); */ static double wirelength_crossing_count(size_t fanout); - - /******************************* End of Function definitions ************************************/ - NetCostHandler::NetCostHandler(const t_placer_opts& placer_opts, PlacerState& placer_state, size_t num_nets, @@ -120,19 +111,23 @@ NetCostHandler::NetCostHandler(const t_placer_opts& placer_opts, if (cube_bb_) { ts_bb_edge_new_.resize(num_nets, t_bb()); ts_bb_coord_new_.resize(num_nets, t_bb()); - comp_bb_cost_functor_ = std::bind(&NetCostHandler::comp_cube_bb_cost_, this, std::placeholders::_1); + comp_bb_cost_functor_ = std::bind(&NetCostHandler::comp_cube_bb_cost_, this, std::placeholders::_1); update_bb_functor_ = std::bind(&NetCostHandler::update_bb_, this, std::placeholders::_1, std::placeholders::_2, std::placeholders::_3, std::placeholders::_4); - get_net_bb_cost_functor_ = std::bind(&NetCostHandler::get_net_cube_bb_cost_, this, std::placeholders::_1, /*use_ts=*/true); - get_non_updatable_bb_functor_ = std::bind(&NetCostHandler::get_non_updatable_cube_bb_, this, std::placeholders::_1, /*use_ts=*/true); + get_net_bb_cost_functor_ + = std::bind(&NetCostHandler::get_net_cube_bb_cost_, this, std::placeholders::_1, /*use_ts=*/true); + get_non_updatable_bb_functor_ + = std::bind(&NetCostHandler::get_non_updatable_cube_bb_, this, std::placeholders::_1, /*use_ts=*/true); } else { layer_ts_bb_edge_new_.resize(num_nets, std::vector(num_layers, t_2D_bb())); layer_ts_bb_coord_new_.resize(num_nets, std::vector(num_layers, t_2D_bb())); - comp_bb_cost_functor_ = std::bind(&NetCostHandler::comp_per_layer_bb_cost_, this, std::placeholders::_1); - update_bb_functor_ = std::bind(&NetCostHandler::update_layer_bb_, this, std::placeholders::_1, std::placeholders::_2, - std::placeholders::_3, std::placeholders::_4); - get_net_bb_cost_functor_ = std::bind(&NetCostHandler::get_net_per_layer_bb_cost_, this, std::placeholders::_1, /*use_ts=*/true); - get_non_updatable_bb_functor_ = std::bind(&NetCostHandler::get_non_updatable_per_layer_bb_, this, std::placeholders::_1, /*use_ts=*/true); + comp_bb_cost_functor_ = std::bind(&NetCostHandler::comp_per_layer_bb_cost_, this, std::placeholders::_1); + update_bb_functor_ = std::bind(&NetCostHandler::update_layer_bb_, this, std::placeholders::_1, + std::placeholders::_2, std::placeholders::_3, std::placeholders::_4); + get_net_bb_cost_functor_ + = std::bind(&NetCostHandler::get_net_per_layer_bb_cost_, this, std::placeholders::_1, /*use_ts=*/true); + get_non_updatable_bb_functor_ + = std::bind(&NetCostHandler::get_non_updatable_per_layer_bb_, this, std::placeholders::_1, /*use_ts=*/true); } /* This initializes the whole matrix to OPEN which is an invalid value*/ @@ -170,7 +165,8 @@ void NetCostHandler::alloc_and_load_chan_w_factors_for_place_cost_(float place_c for (int high = 0; high < grid_height; high++) { chanx_place_cost_fac_[high][high] = (float)device_ctx.chan_width.x_list[high]; for (int low = -1; low < high; low++) { - chanx_place_cost_fac_[high][low] = chanx_place_cost_fac_[high - 1][low] + (float)device_ctx.chan_width.x_list[high]; + chanx_place_cost_fac_[high][low] + = chanx_place_cost_fac_[high - 1][low] + (float)device_ctx.chan_width.x_list[high]; } } @@ -205,7 +201,8 @@ void NetCostHandler::alloc_and_load_chan_w_factors_for_place_cost_(float place_c for (int high = 0; high < grid_width; high++) { chany_place_cost_fac_[high][high] = device_ctx.chan_width.y_list[high]; for (int low = -1; low < high; low++) { - chany_place_cost_fac_[high][low] = chany_place_cost_fac_[high - 1][low] + device_ctx.chan_width.y_list[high]; + chany_place_cost_fac_[high][low] + = chany_place_cost_fac_[high - 1][low] + device_ctx.chan_width.y_list[high]; } } @@ -227,7 +224,7 @@ void NetCostHandler::alloc_and_load_chan_w_factors_for_place_cost_(float place_c chany_place_cost_fac_[high][low] = pow((double)chany_place_cost_fac_[high][low], (double)place_cost_exp); } } - + if (device_ctx.grid.get_num_layers() > 1) { alloc_and_load_for_fast_vertical_cost_update_(place_cost_exp); } @@ -236,14 +233,13 @@ void NetCostHandler::alloc_and_load_chan_w_factors_for_place_cost_(float place_c void NetCostHandler::alloc_and_load_for_fast_vertical_cost_update_(float place_cost_exp) { const auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - + const size_t grid_height = device_ctx.grid.height(); const size_t grid_width = device_ctx.grid.width(); - chanz_place_cost_fac_ = vtr::NdMatrix({grid_width, grid_height, grid_width, grid_height}, 0.); - vtr::NdMatrix tile_num_inter_die_conn({grid_width, grid_height}, 0.); + vtr::NdMatrix tile_num_inter_die_conn({grid_width, grid_height}, 0.); for (const auto& src_rr_node : rr_graph.nodes()) { for (const auto& rr_edge_idx : rr_graph.configurable_edges(src_rr_node)) { @@ -282,20 +278,18 @@ void NetCostHandler::alloc_and_load_for_fast_vertical_cost_update_(float place_c } } int seen_num_tiles = (x_high - x_low + 1) * (y_high - y_low + 1); - chanz_place_cost_fac_[x_high][y_high][x_low][y_low] = seen_num_tiles / static_cast(num_inter_die_conn); + chanz_place_cost_fac_[x_high][y_high][x_low][y_low] + = seen_num_tiles / static_cast(num_inter_die_conn); - chanz_place_cost_fac_[x_high][y_high][x_low][y_low] = pow( - (double)chanz_place_cost_fac_[x_high][y_high][x_low][y_low], - (double)place_cost_exp); + chanz_place_cost_fac_[x_high][y_high][x_low][y_low] + = pow((double)chanz_place_cost_fac_[x_high][y_high][x_low][y_low], (double)place_cost_exp); } } } } } -double NetCostHandler::comp_bb_cost(e_cost_methods method) { - return comp_bb_cost_functor_(method); -} +double NetCostHandler::comp_bb_cost(e_cost_methods method) { return comp_bb_cost_functor_(method); } double NetCostHandler::comp_cube_bb_cost_(e_cost_methods method) { auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -304,14 +298,12 @@ double NetCostHandler::comp_cube_bb_cost_(e_cost_methods method) { double cost = 0; double expected_wirelength = 0.0; - for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { /* for each net ... */ - if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { /* for each net ... */ + if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ /* Small nets don't use incremental updating on their bounding boxes, * * so they can use a fast bounding box calculator. */ if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET && method == e_cost_methods::NORMAL) { - get_bb_from_scratch_(net_id, - place_move_ctx.bb_coords[net_id], - place_move_ctx.bb_num_on_edges[net_id], + get_bb_from_scratch_(net_id, place_move_ctx.bb_coords[net_id], place_move_ctx.bb_num_on_edges[net_id], place_move_ctx.num_sink_pin_layer[size_t(net_id)]); } else { get_non_updatable_cube_bb_(net_id, /*use_ts=*/false); @@ -327,8 +319,7 @@ double NetCostHandler::comp_cube_bb_cost_(e_cost_methods method) { if (method == e_cost_methods::CHECK) { VTR_LOG("\n"); - VTR_LOG("BB estimate of min-dist (placement) wire length: %.0f\n", - expected_wirelength); + VTR_LOG("BB estimate of min-dist (placement) wire length: %.0f\n", expected_wirelength); } return cost; @@ -341,13 +332,12 @@ double NetCostHandler::comp_per_layer_bb_cost_(e_cost_methods method) { double cost = 0; double expected_wirelength = 0.0; - for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { /* for each net ... */ - if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { /* for each net ... */ + if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ /* Small nets don't use incremental updating on their bounding boxes, * * so they can use a fast bounding box calculator. */ if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET && method == e_cost_methods::NORMAL) { - get_layer_bb_from_scratch_(net_id, - place_move_ctx.layer_bb_num_on_edges[net_id], + get_layer_bb_from_scratch_(net_id, place_move_ctx.layer_bb_num_on_edges[net_id], place_move_ctx.layer_bb_coords[net_id], place_move_ctx.num_sink_pin_layer[size_t(net_id)]); } else { @@ -364,8 +354,7 @@ double NetCostHandler::comp_per_layer_bb_cost_(e_cost_methods method) { if (method == e_cost_methods::CHECK) { VTR_LOG("\n"); - VTR_LOG("BB estimate of min-dist (placement) wire length: %.0f\n", - expected_wirelength); + VTR_LOG("BB estimate of min-dist (placement) wire length: %.0f\n", expected_wirelength); } return cost; @@ -396,11 +385,9 @@ void NetCostHandler::update_net_bb_(const ClusterNetId net, //Incremental bounding box update update_bb_functor_(net, - {pl_moved_block.old_loc.x + pin_width_offset, - pl_moved_block.old_loc.y + pin_height_offset, + {pl_moved_block.old_loc.x + pin_width_offset, pl_moved_block.old_loc.y + pin_height_offset, pl_moved_block.old_loc.layer}, - {pl_moved_block.new_loc.x + pin_width_offset, - pl_moved_block.new_loc.y + pin_height_offset, + {pl_moved_block.new_loc.x + pin_width_offset, pl_moved_block.new_loc.y + pin_height_offset, pl_moved_block.new_loc.layer}, is_driver); } @@ -449,8 +436,7 @@ void NetCostHandler::update_td_delta_costs_(const PlaceDelayModel* delay_model, if (cluster_ctx.clb_nlist.pin_type(pin) == PinType::DRIVER) { /* This pin is a net driver on a moved block. */ /* Recompute all point to point connection delays for the net sinks. */ - for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net).size(); - ipin++) { + for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net).size(); ipin++) { float temp_delay = comp_td_single_connection_delay(delay_model, block_locs, net, ipin); /* If the delay hasn't changed, do not mark this pin as affected */ if (temp_delay == connection_delay[net][ipin]) { @@ -461,8 +447,7 @@ void NetCostHandler::update_td_delta_costs_(const PlaceDelayModel* delay_model, proposed_connection_delay[net][ipin] = temp_delay; proposed_connection_timing_cost[net][ipin] = criticalities.criticality(net, ipin) * temp_delay; - delta_timing_cost += proposed_connection_timing_cost[net][ipin] - - connection_timing_cost[net][ipin]; + delta_timing_cost += proposed_connection_timing_cost[net][ipin] - connection_timing_cost[net][ipin]; /* Record this connection in blocks_affected.affected_pins */ ClusterPinId sink_pin = cluster_ctx.clb_nlist.net_pin(net, ipin); @@ -518,8 +503,7 @@ void NetCostHandler::update_net_info_on_pin_move_(const PlaceDelayModel* delay_m const auto& cluster_ctx = g_vpr_ctx.clustering(); const ClusterNetId net_id = cluster_ctx.clb_nlist.pin_net(pin_id); - VTR_ASSERT_SAFE_MSG(net_id, - "Only valid nets should be found in compressed netlist block pins"); + VTR_ASSERT_SAFE_MSG(net_id, "Only valid nets should be found in compressed netlist block pins"); if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) { //TODO: Do we require anything special here for global nets? @@ -536,12 +520,7 @@ void NetCostHandler::update_net_info_on_pin_move_(const PlaceDelayModel* delay_m if (placer_opts_.place_algorithm.is_timing_driven()) { /* Determine the change in connection delay and timing cost. */ - update_td_delta_costs_(delay_model, - *criticalities, - net_id, - pin_id, - affected_pins, - timing_delta_c, + update_td_delta_costs_(delay_model, *criticalities, net_id, pin_id, affected_pins, timing_delta_c, is_src_moving); } } @@ -556,7 +535,8 @@ void NetCostHandler::get_non_updatable_cube_bb_(ClusterNetId net_id, bool use_ts // the bounding box coordinates that is going to be updated by this function t_bb& bb_coord_new = use_ts ? ts_bb_coord_new_[net_id] : move_ctx.bb_coords[net_id]; // the number of sink pins of "net_id" on each layer - vtr::NdMatrixProxy num_sink_pin_layer = use_ts ? ts_layer_sink_pin_count_[size_t(net_id)] : move_ctx.num_sink_pin_layer[size_t(net_id)]; + vtr::NdMatrixProxy num_sink_pin_layer + = use_ts ? ts_layer_sink_pin_count_[size_t(net_id)] : move_ctx.num_sink_pin_layer[size_t(net_id)]; ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); int pnum = placer_state_.blk_loc_registry().net_pin_to_tile_pin_index(net_id, 0); @@ -615,7 +595,8 @@ void NetCostHandler::get_non_updatable_per_layer_bb_(ClusterNetId net_id, bool u auto& move_ctx = placer_state_.mutable_move(); std::vector& bb_coord_new = use_ts ? layer_ts_bb_coord_new_[net_id] : move_ctx.layer_bb_coords[net_id]; - vtr::NdMatrixProxy num_sink_layer = use_ts ? ts_layer_sink_pin_count_[size_t(net_id)] : move_ctx.num_sink_pin_layer[size_t(net_id)]; + vtr::NdMatrixProxy num_sink_layer + = use_ts ? ts_layer_sink_pin_count_[size_t(net_id)] : move_ctx.num_sink_pin_layer[size_t(net_id)]; const int num_layers = device_ctx.grid.get_num_layers(); VTR_ASSERT_DEBUG(bb_coord_new.size() == (size_t)num_layers); @@ -681,7 +662,9 @@ void NetCostHandler::update_bb_(ClusterNetId net_id, return; } - vtr::NdMatrixProxy curr_num_sink_pin_layer = (bb_update_status_[net_id] == NetUpdateState::NOT_UPDATED_YET) ? place_move_ctx.num_sink_pin_layer[size_t(net_id)] : num_sink_pin_layer_new; + vtr::NdMatrixProxy curr_num_sink_pin_layer = (bb_update_status_[net_id] == NetUpdateState::NOT_UPDATED_YET) + ? place_move_ctx.num_sink_pin_layer[size_t(net_id)] + : num_sink_pin_layer_new; if (bb_update_status_[net_id] == NetUpdateState::NOT_UPDATED_YET) { /* The net had NOT been updated before, could use the old values */ @@ -941,7 +924,10 @@ void NetCostHandler::update_layer_bb_(ClusterNetId net_id, return; } - const vtr::NdMatrixProxy curr_layer_pin_sink_count = (bb_update_status_[net_id] == NetUpdateState::NOT_UPDATED_YET) ? place_move_ctx.num_sink_pin_layer[size_t(net_id)] : bb_pin_sink_count_new; + const vtr::NdMatrixProxy curr_layer_pin_sink_count + = (bb_update_status_[net_id] == NetUpdateState::NOT_UPDATED_YET) + ? place_move_ctx.num_sink_pin_layer[size_t(net_id)] + : bb_pin_sink_count_new; const std::vector*curr_bb_edge, *curr_bb_coord; if (bb_update_status_[net_id] == NetUpdateState::NOT_UPDATED_YET) { @@ -957,11 +943,7 @@ void NetCostHandler::update_layer_bb_(ClusterNetId net_id, /* Check if I can update the bounding box incrementally. */ - update_bb_pin_sink_count(pin_old_loc, - pin_new_loc, - curr_layer_pin_sink_count, - bb_pin_sink_count_new, - is_output_pin); + update_bb_pin_sink_count(pin_old_loc, pin_new_loc, curr_layer_pin_sink_count, bb_pin_sink_count_new, is_output_pin); int layer_old = pin_old_loc.layer_num; int layer_new = pin_new_loc.layer_num; @@ -971,23 +953,11 @@ void NetCostHandler::update_layer_bb_(ClusterNetId net_id, bb_coord_new = *curr_bb_coord; if (layer_changed) { - update_bb_layer_changed_(net_id, - pin_old_loc, - pin_new_loc, - *curr_bb_edge, - *curr_bb_coord, - bb_pin_sink_count_new, - bb_edge_new, - bb_coord_new); + update_bb_layer_changed_(net_id, pin_old_loc, pin_new_loc, *curr_bb_edge, *curr_bb_coord, bb_pin_sink_count_new, + bb_edge_new, bb_coord_new); } else { - update_bb_same_layer_(net_id, - pin_old_loc, - pin_new_loc, - *curr_bb_edge, - *curr_bb_coord, - bb_pin_sink_count_new, - bb_edge_new, - bb_coord_new); + update_bb_same_layer_(net_id, pin_old_loc, pin_new_loc, *curr_bb_edge, *curr_bb_coord, bb_pin_sink_count_new, + bb_edge_new, bb_coord_new); } if (bb_update_status_[net_id] == NetUpdateState::NOT_UPDATED_YET) { @@ -996,13 +966,13 @@ void NetCostHandler::update_layer_bb_(ClusterNetId net_id, } inline void NetCostHandler::update_bb_same_layer_(ClusterNetId net_id, - const t_physical_tile_loc& pin_old_loc, - const t_physical_tile_loc& pin_new_loc, - const std::vector& curr_bb_edge, - const std::vector& curr_bb_coord, - vtr::NdMatrixProxy bb_pin_sink_count_new, - std::vector& bb_edge_new, - std::vector& bb_coord_new) { + const t_physical_tile_loc& pin_old_loc, + const t_physical_tile_loc& pin_new_loc, + const std::vector& curr_bb_edge, + const std::vector& curr_bb_coord, + vtr::NdMatrixProxy bb_pin_sink_count_new, + std::vector& bb_edge_new, + std::vector& bb_coord_new) { int x_old = pin_old_loc.x; int x_new = pin_new_loc.x; @@ -1014,14 +984,8 @@ inline void NetCostHandler::update_bb_same_layer_(ClusterNetId net_id, if (x_new < x_old) { if (x_old == curr_bb_coord[layer_num].xmax) { - update_bb_edge_(net_id, - bb_edge_new, - bb_coord_new, - bb_pin_sink_count_new, - curr_bb_edge[layer_num].xmax, - curr_bb_coord[layer_num].xmax, - bb_edge_new[layer_num].xmax, - bb_coord_new[layer_num].xmax); + update_bb_edge_(net_id, bb_edge_new, bb_coord_new, bb_pin_sink_count_new, curr_bb_edge[layer_num].xmax, + curr_bb_coord[layer_num].xmax, bb_edge_new[layer_num].xmax, bb_coord_new[layer_num].xmax); if (bb_update_status_[net_id] == NetUpdateState::GOT_FROM_SCRATCH) { return; } @@ -1037,14 +1001,8 @@ inline void NetCostHandler::update_bb_same_layer_(ClusterNetId net_id, } else if (x_new > x_old) { if (x_old == curr_bb_coord[layer_num].xmin) { - update_bb_edge_(net_id, - bb_edge_new, - bb_coord_new, - bb_pin_sink_count_new, - curr_bb_edge[layer_num].xmin, - curr_bb_coord[layer_num].xmin, - bb_edge_new[layer_num].xmin, - bb_coord_new[layer_num].xmin); + update_bb_edge_(net_id, bb_edge_new, bb_coord_new, bb_pin_sink_count_new, curr_bb_edge[layer_num].xmin, + curr_bb_coord[layer_num].xmin, bb_edge_new[layer_num].xmin, bb_coord_new[layer_num].xmin); if (bb_update_status_[net_id] == NetUpdateState::GOT_FROM_SCRATCH) { return; } @@ -1061,14 +1019,8 @@ inline void NetCostHandler::update_bb_same_layer_(ClusterNetId net_id, if (y_new < y_old) { if (y_old == curr_bb_coord[layer_num].ymax) { - update_bb_edge_(net_id, - bb_edge_new, - bb_coord_new, - bb_pin_sink_count_new, - curr_bb_edge[layer_num].ymax, - curr_bb_coord[layer_num].ymax, - bb_edge_new[layer_num].ymax, - bb_coord_new[layer_num].ymax); + update_bb_edge_(net_id, bb_edge_new, bb_coord_new, bb_pin_sink_count_new, curr_bb_edge[layer_num].ymax, + curr_bb_coord[layer_num].ymax, bb_edge_new[layer_num].ymax, bb_coord_new[layer_num].ymax); if (bb_update_status_[net_id] == NetUpdateState::GOT_FROM_SCRATCH) { return; } @@ -1084,14 +1036,8 @@ inline void NetCostHandler::update_bb_same_layer_(ClusterNetId net_id, } else if (y_new > y_old) { if (y_old == curr_bb_coord[layer_num].ymin) { - update_bb_edge_(net_id, - bb_edge_new, - bb_coord_new, - bb_pin_sink_count_new, - curr_bb_edge[layer_num].ymin, - curr_bb_coord[layer_num].ymin, - bb_edge_new[layer_num].ymin, - bb_coord_new[layer_num].ymin); + update_bb_edge_(net_id, bb_edge_new, bb_coord_new, bb_pin_sink_count_new, curr_bb_edge[layer_num].ymin, + curr_bb_coord[layer_num].ymin, bb_edge_new[layer_num].ymin, bb_coord_new[layer_num].ymin); if (bb_update_status_[net_id] == NetUpdateState::GOT_FROM_SCRATCH) { return; } @@ -1108,13 +1054,13 @@ inline void NetCostHandler::update_bb_same_layer_(ClusterNetId net_id, } inline void NetCostHandler::update_bb_layer_changed_(ClusterNetId net_id, - const t_physical_tile_loc& pin_old_loc, - const t_physical_tile_loc& pin_new_loc, - const std::vector& curr_bb_edge, - const std::vector& curr_bb_coord, - vtr::NdMatrixProxy bb_pin_sink_count_new, - std::vector& bb_edge_new, - std::vector& bb_coord_new) { + const t_physical_tile_loc& pin_old_loc, + const t_physical_tile_loc& pin_new_loc, + const std::vector& curr_bb_edge, + const std::vector& curr_bb_coord, + vtr::NdMatrixProxy bb_pin_sink_count_new, + std::vector& bb_edge_new, + std::vector& bb_coord_new) { int x_old = pin_old_loc.x; int y_old = pin_old_loc.y; @@ -1124,66 +1070,43 @@ inline void NetCostHandler::update_bb_layer_changed_(ClusterNetId net_id, VTR_ASSERT_SAFE(old_layer_num != new_layer_num); /* - This funcitn is called when BB per layer is used and when the moving block is moving from one layer to another. - Thus, we need to update bounding box on both "from" and "to" layer. Here, we update the bounding box on "from" or - "old_layer". Then, "add_block_to_bb" is called to update the bounding box on the new layer. - */ + * This funcitn is called when BB per layer is used and when the moving block is moving from one layer to another. + * Thus, we need to update bounding box on both "from" and "to" layer. Here, we update the bounding box on "from" or + * "old_layer". Then, "add_block_to_bb" is called to update the bounding box on the new layer. + */ if (x_old == curr_bb_coord[old_layer_num].xmax) { - update_bb_edge_(net_id, - bb_edge_new, - bb_coord_new, - bb_pin_sink_count_new, - curr_bb_edge[old_layer_num].xmax, - curr_bb_coord[old_layer_num].xmax, - bb_edge_new[old_layer_num].xmax, - bb_coord_new[old_layer_num].xmax); + update_bb_edge_(net_id, bb_edge_new, bb_coord_new, bb_pin_sink_count_new, curr_bb_edge[old_layer_num].xmax, + curr_bb_coord[old_layer_num].xmax, bb_edge_new[old_layer_num].xmax, + bb_coord_new[old_layer_num].xmax); if (bb_update_status_[net_id] == NetUpdateState::GOT_FROM_SCRATCH) { return; } } else if (x_old == curr_bb_coord[old_layer_num].xmin) { - update_bb_edge_(net_id, - bb_edge_new, - bb_coord_new, - bb_pin_sink_count_new, - curr_bb_edge[old_layer_num].xmin, - curr_bb_coord[old_layer_num].xmin, - bb_edge_new[old_layer_num].xmin, - bb_coord_new[old_layer_num].xmin); + update_bb_edge_(net_id, bb_edge_new, bb_coord_new, bb_pin_sink_count_new, curr_bb_edge[old_layer_num].xmin, + curr_bb_coord[old_layer_num].xmin, bb_edge_new[old_layer_num].xmin, + bb_coord_new[old_layer_num].xmin); if (bb_update_status_[net_id] == NetUpdateState::GOT_FROM_SCRATCH) { return; } } if (y_old == curr_bb_coord[old_layer_num].ymax) { - update_bb_edge_(net_id, - bb_edge_new, - bb_coord_new, - bb_pin_sink_count_new, - curr_bb_edge[old_layer_num].ymax, - curr_bb_coord[old_layer_num].ymax, - bb_edge_new[old_layer_num].ymax, - bb_coord_new[old_layer_num].ymax); + update_bb_edge_(net_id, bb_edge_new, bb_coord_new, bb_pin_sink_count_new, curr_bb_edge[old_layer_num].ymax, + curr_bb_coord[old_layer_num].ymax, bb_edge_new[old_layer_num].ymax, + bb_coord_new[old_layer_num].ymax); if (bb_update_status_[net_id] == NetUpdateState::GOT_FROM_SCRATCH) { return; } } else if (y_old == curr_bb_coord[old_layer_num].ymin) { - update_bb_edge_(net_id, - bb_edge_new, - bb_coord_new, - bb_pin_sink_count_new, - curr_bb_edge[old_layer_num].ymin, - curr_bb_coord[old_layer_num].ymin, - bb_edge_new[old_layer_num].ymin, - bb_coord_new[old_layer_num].ymin); + update_bb_edge_(net_id, bb_edge_new, bb_coord_new, bb_pin_sink_count_new, curr_bb_edge[old_layer_num].ymin, + curr_bb_coord[old_layer_num].ymin, bb_edge_new[old_layer_num].ymin, + bb_coord_new[old_layer_num].ymin); if (bb_update_status_[net_id] == NetUpdateState::GOT_FROM_SCRATCH) { return; } } - add_block_to_bb(pin_new_loc, - curr_bb_edge[new_layer_num], - curr_bb_coord[new_layer_num], - bb_edge_new[new_layer_num], + add_block_to_bb(pin_new_loc, curr_bb_edge[new_layer_num], curr_bb_coord[new_layer_num], bb_edge_new[new_layer_num], bb_coord_new[new_layer_num]); } @@ -1203,18 +1126,15 @@ static void update_bb_pin_sink_count(const t_physical_tile_loc& pin_old_loc, } inline void NetCostHandler::update_bb_edge_(ClusterNetId net_id, - std::vector& bb_edge_new, - std::vector& bb_coord_new, - vtr::NdMatrixProxy bb_layer_pin_sink_count, - const int& old_num_block_on_edge, - const int& old_edge_coord, - int& new_num_block_on_edge, - int& new_edge_coord) { + std::vector& bb_edge_new, + std::vector& bb_coord_new, + vtr::NdMatrixProxy bb_layer_pin_sink_count, + const int& old_num_block_on_edge, + const int& old_edge_coord, + int& new_num_block_on_edge, + int& new_edge_coord) { if (old_num_block_on_edge == 1) { - get_layer_bb_from_scratch_(net_id, - bb_edge_new, - bb_coord_new, - bb_layer_pin_sink_count); + get_layer_bb_from_scratch_(net_id, bb_edge_new, bb_coord_new, bb_layer_pin_sink_count); bb_update_status_[net_id] = NetUpdateState::GOT_FROM_SCRATCH; return; } else { @@ -1232,10 +1152,10 @@ static void add_block_to_bb(const t_physical_tile_loc& new_pin_loc, int y_new = new_pin_loc.y; /* - This function is called to only update the bounding box on the new layer from a block - moving to this layer from another layer. Thus, we only need to assess the effect of this - new block on the edges. - */ + * This function is called to only update the bounding box on the new layer from a block + * moving to this layer from another layer. Thus, we only need to assess the effect of this + * new block on the edges. + */ if (x_new > bb_coord_old.xmax) { bb_edge_new.xmax = 1; @@ -1450,7 +1370,6 @@ void NetCostHandler::get_layer_bb_from_scratch_(ClusterNetId net_id, } } - double NetCostHandler::get_net_cube_bb_cost_(ClusterNetId net_id, bool use_ts) { // Finds the cost due to one net by looking at its coordinate bounding box. auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -1484,19 +1403,18 @@ double NetCostHandler::get_net_cube_bb_cost_(ClusterNetId net_id, bool use_ts) { return ncost; } -double NetCostHandler::get_net_per_layer_bb_cost_(ClusterNetId net_id , bool use_ts) { +double NetCostHandler::get_net_per_layer_bb_cost_(ClusterNetId net_id, bool use_ts) { const auto& move_ctx = placer_state_.move(); // Per-layer bounding box of the net const std::vector& bb = use_ts ? layer_ts_bb_coord_new_[net_id] : move_ctx.layer_bb_coords[net_id]; - const vtr::NdMatrixProxy layer_pin_sink_count = use_ts ? ts_layer_sink_pin_count_[size_t(net_id)] : move_ctx.num_sink_pin_layer[size_t(net_id)]; + const vtr::NdMatrixProxy layer_pin_sink_count + = use_ts ? ts_layer_sink_pin_count_[size_t(net_id)] : move_ctx.num_sink_pin_layer[size_t(net_id)]; // Finds the cost due to one net by looking at its coordinate bounding box double ncost = 0.; int num_layers = g_vpr_ctx.device().grid.get_num_layers(); - - for (int layer_num = 0; layer_num < num_layers; layer_num++) { VTR_ASSERT(layer_pin_sink_count[layer_num] != OPEN); if (layer_pin_sink_count[layer_num] == 0) { @@ -1586,8 +1504,8 @@ double NetCostHandler::recompute_bb_cost_() { auto& cluster_ctx = g_vpr_ctx.clustering(); - for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { /* for each net ... */ - if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { /* for each net ... */ + if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ /* Bounding boxes don't have to be recomputed; they're correct. */ cost += net_cost_[net_id]; } @@ -1608,7 +1526,7 @@ static double wirelength_crossing_count(size_t fanout) { } void NetCostHandler::set_bb_delta_cost_(double& bb_delta_c) { - for (const ClusterNetId ts_net: ts_nets_to_update_) { + for (const ClusterNetId ts_net : ts_nets_to_update_) { ClusterNetId net_id = ts_net; proposed_net_cost_[net_id] = get_net_bb_cost_functor_(net_id); @@ -1640,13 +1558,8 @@ void NetCostHandler::find_affected_nets_and_update_costs(const PlaceDelayModel* ClusterNetId net_id = clb_nlist.pin_net(blk_pin); is_src_moving = blocks_affected.driven_by_moved_block(net_id); } - update_net_info_on_pin_move_(delay_model, - criticalities, - blk_pin, - moving_block, - affected_pins, - timing_delta_c, - is_src_moving); + update_net_info_on_pin_move_(delay_model, criticalities, blk_pin, moving_block, affected_pins, + timing_delta_c, is_src_moving); } } @@ -1666,7 +1579,8 @@ void NetCostHandler::update_move_nets() { set_ts_bb_coord_(net_id); for (int layer_num = 0; layer_num < g_vpr_ctx.device().grid.get_num_layers(); layer_num++) { - place_move_ctx.num_sink_pin_layer[size_t(net_id)][layer_num] = ts_layer_sink_pin_count_[size_t(net_id)][layer_num]; + place_move_ctx.num_sink_pin_layer[size_t(net_id)][layer_num] + = ts_layer_sink_pin_count_[size_t(net_id)][layer_num]; } if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET) { @@ -1693,13 +1607,11 @@ void NetCostHandler::reset_move_nets() { void NetCostHandler::recompute_costs_from_scratch(const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, t_placer_costs& costs) { - auto check_and_print_cost = [](double new_cost, - double old_cost, - const std::string& cost_name) -> void { + auto check_and_print_cost = [](double new_cost, double old_cost, const std::string& cost_name) -> void { if (!vtr::isclose(new_cost, old_cost, PL_INCREMENTAL_COST_TOLERANCE, 0.)) { std::string msg = vtr::string_fmt( - "in recompute_costs_from_scratch: new_%s = %g, old %s = %g, ERROR_TOL = %g\n", - cost_name.c_str(), new_cost, cost_name.c_str(), old_cost, PL_INCREMENTAL_COST_TOLERANCE); + "in recompute_costs_from_scratch: new_%s = %g, old %s = %g, ERROR_TOL = %g\n", cost_name.c_str(), + new_cost, cost_name.c_str(), old_cost, PL_INCREMENTAL_COST_TOLERANCE); VPR_ERROR(VPR_ERROR_PLACE, msg.c_str()); } }; diff --git a/vpr/src/place/net_cost_handler.h b/vpr/src/place/net_cost_handler.h index 3048b7637ea..6ad0a9c1ba1 100644 --- a/vpr/src/place/net_cost_handler.h +++ b/vpr/src/place/net_cost_handler.h @@ -24,11 +24,7 @@ class PlacerState; * NORMAL: Compute cost efficiently using incremental techniques. * CHECK: Brute-force cost computation; useful to validate the more complex incremental cost update code. */ -enum class e_cost_methods { - NORMAL, - CHECK -}; - +enum class e_cost_methods { NORMAL, CHECK }; class NetCostHandler { public: @@ -64,28 +60,28 @@ class NetCostHandler { double comp_bb_cost(e_cost_methods method); /** - * @brief Find all the nets and pins affected by this swap and update costs. - * - * Find all the nets affected by this swap and update the bounding box (wiring) - * costs. This cost function doesn't depend on the timing info. - * - * Find all the connections affected by this swap and update the timing cost. - * For a connection to be affected, it not only needs to be on or driven by - * a block, but it also needs to have its delay changed. Otherwise, it will - * not be added to the affected_pins structure. - * - * For more, see update_td_delta_costs(). - * - * The timing costs are calculated by getting the new connection delays, - * multiplied by the connection criticalities returned by the timing - * analyzer. These timing costs are stored in the proposed_* data structures. - * - * The change in the bounding box cost is stored in `bb_delta_c`. - * The change in the timing cost is stored in `timing_delta_c`. - * ts_nets_to_update is also extended with the latest net. - * - * @return The number of affected nets. - */ + * @brief Find all the nets and pins affected by this swap and update costs. + * + * Find all the nets affected by this swap and update the bounding box (wiring) + * costs. This cost function doesn't depend on the timing info. + * + * Find all the connections affected by this swap and update the timing cost. + * For a connection to be affected, it not only needs to be on or driven by + * a block, but it also needs to have its delay changed. Otherwise, it will + * not be added to the affected_pins structure. + * + * For more, see update_td_delta_costs(). + * + * The timing costs are calculated by getting the new connection delays, + * multiplied by the connection criticalities returned by the timing + * analyzer. These timing costs are stored in the proposed_* data structures. + * + * The change in the bounding box cost is stored in `bb_delta_c`. + * The change in the timing cost is stored in `timing_delta_c`. + * ts_nets_to_update is also extended with the latest net. + * + * @return The number of affected nets. + */ void find_affected_nets_and_update_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, t_pl_blocks_to_be_moved& blocks_affected, @@ -130,7 +126,9 @@ class NetCostHandler { ///@brief Points to the proper method for computing the bounding box cost from scratch. std::function comp_bb_cost_functor_; ///@brief Points to the proper method for updating the bounding box of a net. - std::function update_bb_functor_; + std::function< + void(ClusterNetId net_id, t_physical_tile_loc pin_old_loc, t_physical_tile_loc pin_new_loc, bool is_driver)> + update_bb_functor_; ///@brief Points to the proper method for getting the bounding box cost of a net std::function get_net_bb_cost_functor_; ///@brief Points to the proper method for getting the non-updatable bounding box of a net @@ -139,11 +137,7 @@ class NetCostHandler { /** * @brief for the states of the bounding box. */ - enum class NetUpdateState { - NOT_UPDATED_YET, - UPDATED_ONCE, - GOT_FROM_SCRATCH - }; + enum class NetUpdateState { NOT_UPDATED_YET, UPDATED_ONCE, GOT_FROM_SCRATCH }; /** * @brief The wire length estimation is based on the bounding box of the net. In the case of the 2D architecture, @@ -161,7 +155,6 @@ class NetCostHandler { /* [0...num_affected_nets] -> net_id of the affected nets */ std::vector ts_nets_to_update_; - /** * @brief In each of these vectors, there is one entry per cluster level net: * [0...cluster_ctx.clb_nlist.nets().size()-1]. @@ -196,36 +189,36 @@ class NetCostHandler { vtr::NdOffsetMatrix chanx_place_cost_fac_; // [-1...device_ctx.grid.width()-1] vtr::NdOffsetMatrix chany_place_cost_fac_; // [-1...device_ctx.grid.height()-1] /** - @brief This data structure functions similarly to the matrices described above - but is applied to 3D connections linking different FPGA layers. It is used in the - placement cost function calculation, where the height of the bounding box is divided - by the average number of inter-die connections within the bounding box. + * @brief This data structure functions similarly to the matrices described above + * but is applied to 3D connections linking different FPGA layers. It is used in the + * placement cost function calculation, where the height of the bounding box is divided + * by the average number of inter-die connections within the bounding box. */ - vtr::NdMatrix chanz_place_cost_fac_; // [0...device_ctx.grid.width()-1][0...device_ctx.grid.height()-1][0...device_ctx.grid.width()-1][0...device_ctx.grid.height()-1] - + vtr::NdMatrix + chanz_place_cost_fac_; // [0...device_ctx.grid.width()-1][0...device_ctx.grid.height()-1][0...device_ctx.grid.width()-1][0...device_ctx.grid.height()-1] private: /** - * @brief Update the bounding box (3D) of the net connected to blk_pin. The old and new locations of the pin are - * stored in pl_moved_block. The updated bounding box will be stored in ts data structures. Do not update the net - * cost here since it should only be updated once per net, not once per pin. - */ + * @brief Update the bounding box (3D) of the net connected to blk_pin. The old and new locations of the pin are + * stored in pl_moved_block. The updated bounding box will be stored in ts data structures. Do not update the net + * cost here since it should only be updated once per net, not once per pin. + */ void update_net_bb_(const ClusterNetId net, const ClusterBlockId blk, const ClusterPinId blk_pin, const t_pl_moved_block& pl_moved_block); /** - * @brief Call suitable function based on the bounding box type to update the bounding box of the net connected to pin_id. Also, - * call the function to update timing information if the placement algorithm is timing-driven. - * @param delay_model Timing delay model used by placer - * @param criticalities Connections timing criticalities - * @param pin_id Pin ID of the moving pin - * @param moving_blk_inf Data structure that holds information, e.g., old location and new location, about all moving blocks - * @param affected_pins Netlist pins which are affected, in terms placement cost, by the proposed move. - * @param timing_delta_c Timing cost change based on the proposed move - * @param is_src_moving Is the moving pin the source of a net. - */ + * @brief Call suitable function based on the bounding box type to update the bounding box of the net connected to pin_id. Also, + * call the function to update timing information if the placement algorithm is timing-driven. + * @param delay_model Timing delay model used by placer + * @param criticalities Connections timing criticalities + * @param pin_id Pin ID of the moving pin + * @param moving_blk_inf Data structure that holds information, e.g., old location and new location, about all moving blocks + * @param affected_pins Netlist pins which are affected, in terms placement cost, by the proposed move. + * @param timing_delta_c Timing cost change based on the proposed move + * @param is_src_moving Is the moving pin the source of a net. + */ void update_net_info_on_pin_move_(const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, const ClusterPinId pin_id, @@ -235,10 +228,10 @@ class NetCostHandler { bool is_src_moving); /** - * @brief Calculates and returns the total bb (wirelength) cost change that would result from moving the blocks - * indicated in the blocks_affected data structure. - * @param bb_delta_c Cost difference after and before moving the block - */ + * @brief Calculates and returns the total bb (wirelength) cost change that would result from moving the blocks + * indicated in the blocks_affected data structure. + * @param bb_delta_c Cost difference after and before moving the block + */ void set_bb_delta_cost_(double& bb_delta_c); /** @@ -257,15 +250,15 @@ class NetCostHandler { void alloc_and_load_chan_w_factors_for_place_cost_(float place_cost_exp); /** - * @brief Allocates and loads the chanz_place_cost_fac array with the inverse of - * the average number of inter-die connections between [subhigh] and [sublow]. - * - * @details This is only useful for multi-die FPGAs. The place_cost_exp factor specifies to - * what power the average number of inter-die connections should be take -- larger numbers make narrower channels more expensive. - * - * @param place_cost_exp It is an exponent to which you take the average number of inter-die connections; - * a higher value would favour areas with more inter-die connections over areas with less of those during placement (usually we use 1). - */ + * @brief Allocates and loads the chanz_place_cost_fac array with the inverse of + * the average number of inter-die connections between [subhigh] and [sublow]. + * + * @details This is only useful for multi-die FPGAs. The place_cost_exp factor specifies to + * what power the average number of inter-die connections should be take -- larger numbers make narrower channels more expensive. + * + * @param place_cost_exp It is an exponent to which you take the average number of inter-die connections; + * a higher value would favour areas with more inter-die connections over areas with less of those during placement (usually we use 1). + */ void alloc_and_load_for_fast_vertical_cost_update_(float place_cost_exp); /** @@ -414,8 +407,8 @@ class NetCostHandler { int& new_edge_coord); /** - * @brief This function is called in update_layer_bb to update the net's bounding box incrementally if - * the pin under consideration change layer. + * @brief This function is called in update_layer_bb to update the net's bounding box incrementally if + * the pin under consideration change layer. * @param net_id ID of the net which the moving pin belongs to * @param pin_old_loc Old location of the moving pin * @param pin_new_loc New location of the moving pin @@ -446,62 +439,62 @@ class NetCostHandler { * @param bb_edge_new The new bb edge calculated by this function * @param bb_coord_new The new bb calculated by this function */ - inline void update_bb_same_layer_(ClusterNetId net_id, - const t_physical_tile_loc& pin_old_loc, - const t_physical_tile_loc& pin_new_loc, - const std::vector& curr_bb_edge, - const std::vector& curr_bb_coord, - vtr::NdMatrixProxy bb_pin_sink_count_new, - std::vector& bb_edge_new, - std::vector& bb_coord_new); - - /** - * @brief Computes the bounding box from scratch using 2D bounding boxes (per-layer mode) - * @param method The method used to calculate placement cost. Specifies whether the cost is - * computed from scratch or incrementally. - * @return Computed bounding box cost. - */ - double comp_per_layer_bb_cost_(e_cost_methods method); - - /** - * @brief Computes the bounding box from scratch using 3D bounding boxes (cube mode) - * @param method The method used to calculate placement cost. Specifies whether the cost is - * computed from scratch or incrementally. - * @return Computed bounding box cost. - */ - double comp_cube_bb_cost_(e_cost_methods method); - - /** - * @brief if "net" is not already stored as an affected net, add it in ts_nets_to_update. - * @param net ID of a net affected by a move - */ - void record_affected_net_(const ClusterNetId net); - - /** - * @brief To mitigate round-off errors, every once in a while, the costs of nets are summed up from scratch. - * This functions is called to do that for bb cost. It doesn't calculate the BBs from scratch, it would only add the costs again. - * @return Total bb (wirelength) cost for the placement - */ - double recompute_bb_cost_(); - - /** - * @brief Given the 3D BB, calculate the wire-length cost of the net - * @param net_id ID of the net which cost is requested. - * @param use_ts Specifies if the bounding box is retrieved from ts data structures - * or move context. - * @return Wirelength cost of the net - */ - double get_net_cube_bb_cost_(ClusterNetId net_id, bool use_ts); - - /** - * @brief Given the per-layer BB, calculate the wire-length cost of the net on each layer - * and return the sum of the costs - * @param net_id ID of the net which cost is requested. Currently unused - * @param use_ts Specifies whether the 'ts` bounding box is used to compute the - * cost or the one stored in placer_state_ - * @return Wirelength cost of the net - */ - double get_net_per_layer_bb_cost_(ClusterNetId net_id, bool use_ts); + inline void update_bb_same_layer_(ClusterNetId net_id, + const t_physical_tile_loc& pin_old_loc, + const t_physical_tile_loc& pin_new_loc, + const std::vector& curr_bb_edge, + const std::vector& curr_bb_coord, + vtr::NdMatrixProxy bb_pin_sink_count_new, + std::vector& bb_edge_new, + std::vector& bb_coord_new); + + /** + * @brief Computes the bounding box from scratch using 2D bounding boxes (per-layer mode) + * @param method The method used to calculate placement cost. Specifies whether the cost is + * computed from scratch or incrementally. + * @return Computed bounding box cost. + */ + double comp_per_layer_bb_cost_(e_cost_methods method); + + /** + * @brief Computes the bounding box from scratch using 3D bounding boxes (cube mode) + * @param method The method used to calculate placement cost. Specifies whether the cost is + * computed from scratch or incrementally. + * @return Computed bounding box cost. + */ + double comp_cube_bb_cost_(e_cost_methods method); + + /** + * @brief if "net" is not already stored as an affected net, add it in ts_nets_to_update. + * @param net ID of a net affected by a move + */ + void record_affected_net_(const ClusterNetId net); + + /** + * @brief To mitigate round-off errors, every once in a while, the costs of nets are summed up from scratch. + * This functions is called to do that for bb cost. It doesn't calculate the BBs from scratch, it would only add the costs again. + * @return Total bb (wirelength) cost for the placement + */ + double recompute_bb_cost_(); + + /** + * @brief Given the 3D BB, calculate the wire-length cost of the net + * @param net_id ID of the net which cost is requested. + * @param use_ts Specifies if the bounding box is retrieved from ts data structures + * or move context. + * @return Wirelength cost of the net + */ + double get_net_cube_bb_cost_(ClusterNetId net_id, bool use_ts); + + /** + * @brief Given the per-layer BB, calculate the wire-length cost of the net on each layer + * and return the sum of the costs + * @param net_id ID of the net which cost is requested. Currently unused + * @param use_ts Specifies whether the 'ts` bounding box is used to compute the + * cost or the one stored in placer_state_ + * @return Wirelength cost of the net + */ + double get_net_per_layer_bb_cost_(ClusterNetId net_id, bool use_ts); /** * @brief Given the per-layer BB, calculate the wire-length estimate of the net on each layer @@ -510,5 +503,4 @@ class NetCostHandler { * @return Wirelength estimate of the net */ double get_net_wirelength_from_layer_bb_(ClusterNetId net_id); - }; diff --git a/vpr/src/place/noc_place_checkpoint.cpp b/vpr/src/place/noc_place_checkpoint.cpp index 0cb0f0134c1..da2b0f564c4 100644 --- a/vpr/src/place/noc_place_checkpoint.cpp +++ b/vpr/src/place/noc_place_checkpoint.cpp @@ -19,7 +19,8 @@ NoCPlacementCheckpoint::NoCPlacementCheckpoint(NocCostHandler& noc_cost_handler) } } -void NoCPlacementCheckpoint::save_checkpoint(double cost, const vtr::vector_map& block_locs) { +void NoCPlacementCheckpoint::save_checkpoint(double cost, + const vtr::vector_map& block_locs) { const auto& noc_ctx = g_vpr_ctx.noc(); const std::vector& router_bids = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); @@ -32,8 +33,7 @@ void NoCPlacementCheckpoint::save_checkpoint(double cost, const vtr::vector_map< cost_ = cost; } -void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, - BlkLocRegistry& blk_loc_registry) { +void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, BlkLocRegistry& blk_loc_registry) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& device_ctx = g_vpr_ctx.device(); GridBlock& grid_blocks = blk_loc_registry.mutable_grid_blocks(); @@ -68,10 +68,6 @@ void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, noc_cost_handler_.reinitialize_noc_routing(costs, {}); } -bool NoCPlacementCheckpoint::is_valid() const { - return valid_; -} +bool NoCPlacementCheckpoint::is_valid() const { return valid_; } -double NoCPlacementCheckpoint::get_cost() const { - return cost_; -} +double NoCPlacementCheckpoint::get_cost() const { return cost_; } diff --git a/vpr/src/place/noc_place_checkpoint.h b/vpr/src/place/noc_place_checkpoint.h index e794e3e2d65..df61f9a7564 100644 --- a/vpr/src/place/noc_place_checkpoint.h +++ b/vpr/src/place/noc_place_checkpoint.h @@ -49,8 +49,7 @@ class NoCPlacementCheckpoint { * @param costs Used to load NoC related costs for the checkpoint * @param blk_loc_registry To be updated with the save checkpoint for NoC router locations. */ - void restore_checkpoint(t_placer_costs& costs, - BlkLocRegistry& blk_loc_registry); + void restore_checkpoint(t_placer_costs& costs, BlkLocRegistry& blk_loc_registry); /** * @brief Indicates whether the object is empty or it has already stored a diff --git a/vpr/src/place/noc_place_utils.cpp b/vpr/src/place/noc_place_utils.cpp index 3d67588a532..f7807e5f8e5 100644 --- a/vpr/src/place/noc_place_utils.cpp +++ b/vpr/src/place/noc_place_utils.cpp @@ -20,7 +20,6 @@ #include #include - /** * @brief Randomly select a movable NoC router cluster blocks * @@ -72,14 +71,15 @@ bool NocCostHandler::points_to_same_block_locs(const vtr::vector_map>& new_traffic_flow_routes) { +void NocCostHandler::initial_noc_routing( + const vtr::vector>& new_traffic_flow_routes) { // need to update the link usages within after routing all the traffic flows // also need to route all the traffic flows and store them const auto& noc_ctx = g_vpr_ctx.noc(); const NocTrafficFlows& noc_traffic_flows_storage = noc_ctx.noc_traffic_flows_storage; - VTR_ASSERT(new_traffic_flow_routes.size() == (size_t)noc_traffic_flows_storage.get_number_of_traffic_flows() || - new_traffic_flow_routes.empty()); + VTR_ASSERT(new_traffic_flow_routes.size() == (size_t)noc_traffic_flows_storage.get_number_of_traffic_flows() + || new_traffic_flow_routes.empty()); /* We need all the traffic flow ids to be able to access them. The range * of traffic flow ids go from 0 to the total number of traffic flows within @@ -88,14 +88,16 @@ void NocCostHandler::initial_noc_routing(const vtr::vector& curr_traffic_flow_route = new_traffic_flow_routes.empty() - ? route_traffic_flow(traffic_flow_id, noc_ctx.noc_model, noc_traffic_flows_storage, *noc_ctx.noc_flows_router) - : new_traffic_flow_routes[traffic_flow_id]; + const std::vector& curr_traffic_flow_route + = new_traffic_flow_routes.empty() ? route_traffic_flow(traffic_flow_id, noc_ctx.noc_model, + noc_traffic_flows_storage, *noc_ctx.noc_flows_router) + : new_traffic_flow_routes[traffic_flow_id]; if (!new_traffic_flow_routes.empty()) { traffic_flow_routes[traffic_flow_id] = curr_traffic_flow_route; @@ -106,13 +108,14 @@ void NocCostHandler::initial_noc_routing(const vtr::vector>& new_traffic_flow_routes) { +void NocCostHandler::reinitialize_noc_routing( + t_placer_costs& costs, + const vtr::vector>& new_traffic_flow_routes) { // used to access NoC links and modify them const auto& noc_ctx = g_vpr_ctx.noc(); - VTR_ASSERT((size_t)noc_ctx.noc_traffic_flows_storage.get_number_of_traffic_flows() == new_traffic_flow_routes.size() || - new_traffic_flow_routes.empty()); + VTR_ASSERT((size_t)noc_ctx.noc_traffic_flows_storage.get_number_of_traffic_flows() == new_traffic_flow_routes.size() + || new_traffic_flow_routes.empty()); // Zero out bandwidth usage for all links std::fill(link_bandwidth_usages.begin(), link_bandwidth_usages.end(), 0.0); @@ -153,7 +156,8 @@ void NocCostHandler::find_affected_noc_routers_and_update_noc_costs(const t_pl_b // check if the current moved block is a noc router if (noc_traffic_flows_storage.check_if_cluster_block_has_traffic_flows(blk)) { // current block is a router, so re-route all the traffic flows it is a part of - re_route_associated_traffic_flows(blk, noc_traffic_flows_storage, noc_ctx.noc_model, *noc_ctx.noc_flows_router, updated_traffic_flows); + re_route_associated_traffic_flows(blk, noc_traffic_flows_storage, noc_ctx.noc_model, + *noc_ctx.noc_flows_router, updated_traffic_flows); } } @@ -163,17 +167,23 @@ void NocCostHandler::find_affected_noc_routers_and_update_noc_costs(const t_pl_b const std::vector& traffic_flow_route = traffic_flow_routes[traffic_flow_id]; // get the current traffic flow info - const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // calculate the new aggregate bandwidth and latency costs for the affected traffic flow - proposed_traffic_flow_costs[traffic_flow_id].aggregate_bandwidth = calculate_traffic_flow_aggregate_bandwidth_cost(traffic_flow_route, curr_traffic_flow); + proposed_traffic_flow_costs[traffic_flow_id].aggregate_bandwidth + = calculate_traffic_flow_aggregate_bandwidth_cost(traffic_flow_route, curr_traffic_flow); std::tie(proposed_traffic_flow_costs[traffic_flow_id].latency, - proposed_traffic_flow_costs[traffic_flow_id].latency_overrun) = calculate_traffic_flow_latency_cost(traffic_flow_route, noc_ctx.noc_model, curr_traffic_flow); + proposed_traffic_flow_costs[traffic_flow_id].latency_overrun) + = calculate_traffic_flow_latency_cost(traffic_flow_route, noc_ctx.noc_model, curr_traffic_flow); // compute how much the aggregate bandwidth and latency costs change with this swap - delta_c.aggregate_bandwidth += proposed_traffic_flow_costs[traffic_flow_id].aggregate_bandwidth - traffic_flow_costs[traffic_flow_id].aggregate_bandwidth; - delta_c.latency += proposed_traffic_flow_costs[traffic_flow_id].latency - traffic_flow_costs[traffic_flow_id].latency; - delta_c.latency_overrun += proposed_traffic_flow_costs[traffic_flow_id].latency_overrun - traffic_flow_costs[traffic_flow_id].latency_overrun; + delta_c.aggregate_bandwidth += proposed_traffic_flow_costs[traffic_flow_id].aggregate_bandwidth + - traffic_flow_costs[traffic_flow_id].aggregate_bandwidth; + delta_c.latency + += proposed_traffic_flow_costs[traffic_flow_id].latency - traffic_flow_costs[traffic_flow_id].latency; + delta_c.latency_overrun += proposed_traffic_flow_costs[traffic_flow_id].latency_overrun + - traffic_flow_costs[traffic_flow_id].latency_overrun; } // Iterate over all affected links and calculate their new congestion cost and store it @@ -216,19 +226,23 @@ std::vector& NocCostHandler::route_traffic_flow(NocTrafficFlowId traf const NocTrafficFlows& noc_traffic_flows_storage, NocRouting& noc_flows_router) { // get the traffic flow with the current id - const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // get the source and destination logical router blocks in the current traffic flow ClusterBlockId logical_source_router_block_id = curr_traffic_flow.source_router_cluster_id; ClusterBlockId logical_sink_router_block_id = curr_traffic_flow.sink_router_cluster_id; // get the ids of the hard router blocks where the logical router cluster blocks have been placed - NocRouterId source_router_block_id = noc_model.get_router_at_grid_location(block_locs_ref[logical_source_router_block_id].loc); - NocRouterId sink_router_block_id = noc_model.get_router_at_grid_location(block_locs_ref[logical_sink_router_block_id].loc); + NocRouterId source_router_block_id + = noc_model.get_router_at_grid_location(block_locs_ref[logical_source_router_block_id].loc); + NocRouterId sink_router_block_id + = noc_model.get_router_at_grid_location(block_locs_ref[logical_sink_router_block_id].loc); // route the current traffic flow std::vector& curr_traffic_flow_route = traffic_flow_routes[traffic_flow_id]; - noc_flows_router.route_flow(source_router_block_id, sink_router_block_id, traffic_flow_id, curr_traffic_flow_route, noc_model); + noc_flows_router.route_flow(source_router_block_id, sink_router_block_id, traffic_flow_id, curr_traffic_flow_route, + noc_model); return curr_traffic_flow_route; } @@ -254,7 +268,8 @@ void NocCostHandler::re_route_associated_traffic_flows(ClusterBlockId moved_bloc NocRouting& noc_flows_router, std::unordered_set& updated_traffic_flows) { // get all the associated traffic flows for the logical router cluster block - const auto& assoc_traffic_flows = noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(moved_block_router_id); + const auto& assoc_traffic_flows + = noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(moved_block_router_id); // if there are traffic flows associated to the current router block, process them for (NocTrafficFlowId traffic_flow_id : assoc_traffic_flows) { @@ -274,7 +289,8 @@ void NocCostHandler::re_route_associated_traffic_flows(ClusterBlockId moved_bloc // find links that appear in the old route or the new one, but not both of them // these are the links whose bandwidth utilization is affected by rerouting - std::vector unique_links = find_affected_links_by_flow_reroute(prev_traffic_flow_links, curr_traffic_flow_links); + std::vector unique_links + = find_affected_links_by_flow_reroute(prev_traffic_flow_links, curr_traffic_flow_links); // update the static data structure to remember which links were affected by router swap affected_noc_links.insert(unique_links.begin(), unique_links.end()); @@ -302,18 +318,22 @@ void NocCostHandler::revert_noc_traffic_flow_routes(const t_pl_blocks_to_be_move // current block is a router, so re-route all the traffic flows it is a part of // // get all the associated traffic flows for the logical router cluster block - const std::vector& assoc_traffic_flows = noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(blk); + const std::vector& assoc_traffic_flows + = noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(blk); // if there are traffic flows associated to the current router block, process them for (NocTrafficFlowId traffic_flow_id : assoc_traffic_flows) { // first check to see whether we have already reverted the current traffic flow and only revert it if we haven't already. if (reverted_traffic_flows.find(traffic_flow_id) == reverted_traffic_flows.end()) { - const t_noc_traffic_flow& traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& traffic_flow + = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // decrease the bandwidth utilization of the links in the current route - update_traffic_flow_link_usage(traffic_flow_routes[traffic_flow_id], -1, traffic_flow.traffic_flow_bandwidth); + update_traffic_flow_link_usage(traffic_flow_routes[traffic_flow_id], -1, + traffic_flow.traffic_flow_bandwidth); // increase the bandwidth utilization of the links in the backup route - update_traffic_flow_link_usage(traffic_flow_routes_backup[traffic_flow_id], +1, traffic_flow.traffic_flow_bandwidth); + update_traffic_flow_link_usage(traffic_flow_routes_backup[traffic_flow_id], +1, + traffic_flow.traffic_flow_bandwidth); // Revert the traffic flow route by restoring the backup std::swap(traffic_flow_routes[traffic_flow_id], traffic_flow_routes_backup[traffic_flow_id]); @@ -331,7 +351,8 @@ void NocCostHandler::re_route_traffic_flow(NocTrafficFlowId traffic_flow_id, const NocStorage& noc_model, NocRouting& noc_flows_router) { // get the current traffic flow info - const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); /* since the current traffic flow route will be * changed, first we need to decrement the bandwidth @@ -345,7 +366,8 @@ void NocCostHandler::re_route_traffic_flow(NocTrafficFlowId traffic_flow_id, std::swap(traffic_flow_routes[traffic_flow_id], traffic_flow_routes_backup[traffic_flow_id]); // now get the re-routed traffic flow route and increment all the link usages with this reverted route - std::vector& re_routed_traffic_flow_route = route_traffic_flow(traffic_flow_id, noc_model, noc_traffic_flows_storage, noc_flows_router); + std::vector& re_routed_traffic_flow_route + = route_traffic_flow(traffic_flow_id, noc_model, noc_traffic_flows_storage, noc_flows_router); update_traffic_flow_link_usage(re_routed_traffic_flow_route, 1, curr_traffic_flow.traffic_flow_bandwidth); } @@ -371,13 +393,11 @@ NocCostTerms NocCostHandler::recompute_noc_costs() const { } void NocCostHandler::recompute_costs_from_scratch(const t_noc_opts& noc_opts, t_placer_costs& costs) const { - auto check_and_print_cost = [](double new_cost, - double old_cost, - const std::string& cost_name) -> void { + auto check_and_print_cost = [](double new_cost, double old_cost, const std::string& cost_name) -> void { if (!vtr::isclose(new_cost, old_cost, PL_INCREMENTAL_COST_TOLERANCE, 0.)) { std::string msg = vtr::string_fmt( - "in recompute_costs_from_scratch: new_%s = %g, old %s = %g, ERROR_TOL = %g\n", - cost_name.c_str(), new_cost, cost_name.c_str(), old_cost, PL_INCREMENTAL_COST_TOLERANCE); + "in recompute_costs_from_scratch: new_%s = %g, old %s = %g, ERROR_TOL = %g\n", cost_name.c_str(), + new_cost, cost_name.c_str(), old_cost, PL_INCREMENTAL_COST_TOLERANCE); VPR_ERROR(VPR_ERROR_PLACE, msg.c_str()); } }; @@ -385,31 +405,25 @@ void NocCostHandler::recompute_costs_from_scratch(const t_noc_opts& noc_opts, t_ if (noc_opts.noc) { NocCostTerms new_noc_cost = recompute_noc_costs(); - check_and_print_cost(new_noc_cost.aggregate_bandwidth, - costs.noc_cost_terms.aggregate_bandwidth, + check_and_print_cost(new_noc_cost.aggregate_bandwidth, costs.noc_cost_terms.aggregate_bandwidth, "noc_aggregate_bandwidth"); costs.noc_cost_terms.aggregate_bandwidth = new_noc_cost.aggregate_bandwidth; // only check if the recomputed cost and the current noc latency cost are within the error tolerance if the cost is above 1 picosecond. // Otherwise, there is no need to check (we expect the latency cost to be above the threshold of 1 picosecond) if (new_noc_cost.latency > MIN_EXPECTED_NOC_LATENCY_COST) { - check_and_print_cost(new_noc_cost.latency, - costs.noc_cost_terms.latency, - "noc_latency_cost"); + check_and_print_cost(new_noc_cost.latency, costs.noc_cost_terms.latency, "noc_latency_cost"); } costs.noc_cost_terms.latency = new_noc_cost.latency; if (new_noc_cost.latency_overrun > MIN_EXPECTED_NOC_LATENCY_COST) { - check_and_print_cost(new_noc_cost.latency_overrun, - costs.noc_cost_terms.latency_overrun, + check_and_print_cost(new_noc_cost.latency_overrun, costs.noc_cost_terms.latency_overrun, "noc_latency_overrun_cost"); } costs.noc_cost_terms.latency_overrun = new_noc_cost.latency_overrun; if (new_noc_cost.congestion > MIN_EXPECTED_NOC_CONGESTION_COST) { - check_and_print_cost(new_noc_cost.congestion, - costs.noc_cost_terms.congestion, - "noc_congestion_cost"); + check_and_print_cost(new_noc_cost.congestion, costs.noc_cost_terms.congestion, "noc_congestion_cost"); } costs.noc_cost_terms.congestion = new_noc_cost.congestion; } @@ -417,13 +431,15 @@ void NocCostHandler::recompute_costs_from_scratch(const t_noc_opts& noc_opts, t_ void NocCostHandler::update_noc_normalization_factors(t_placer_costs& costs) { //Prevent the norm factors from going to infinity - costs.noc_cost_norm_factors.aggregate_bandwidth = std::min(1 / costs.noc_cost_terms.aggregate_bandwidth, MAX_INV_NOC_AGGREGATE_BANDWIDTH_COST); + costs.noc_cost_norm_factors.aggregate_bandwidth + = std::min(1 / costs.noc_cost_terms.aggregate_bandwidth, MAX_INV_NOC_AGGREGATE_BANDWIDTH_COST); costs.noc_cost_norm_factors.latency = std::min(1 / costs.noc_cost_terms.latency, MAX_INV_NOC_LATENCY_COST); // to avoid division by zero and negative numbers // latency overrun cost may take very small negative values due to round-off error if (costs.noc_cost_terms.latency_overrun > 0.0) { - costs.noc_cost_norm_factors.latency_overrun = std::min(1 / costs.noc_cost_terms.latency_overrun, MAX_INV_NOC_LATENCY_COST); + costs.noc_cost_norm_factors.latency_overrun + = std::min(1 / costs.noc_cost_terms.latency_overrun, MAX_INV_NOC_LATENCY_COST); } else { costs.noc_cost_norm_factors.latency_overrun = MAX_INV_NOC_LATENCY_COST; } @@ -431,7 +447,8 @@ void NocCostHandler::update_noc_normalization_factors(t_placer_costs& costs) { // to avoid division by zero and negative numbers // congestion cost may take very small negative values due to round-off error if (costs.noc_cost_terms.congestion > 0.0) { - costs.noc_cost_norm_factors.congestion = std::min(1 / costs.noc_cost_terms.congestion, MAX_INV_NOC_CONGESTION_COST); + costs.noc_cost_norm_factors.congestion + = std::min(1 / costs.noc_cost_terms.congestion, MAX_INV_NOC_CONGESTION_COST); } else { costs.noc_cost_norm_factors.congestion = MAX_INV_NOC_CONGESTION_COST; } @@ -448,10 +465,12 @@ double NocCostHandler::comp_noc_aggregate_bandwidth_cost() { // now go through each traffic flow route and calculate its // aggregate bandwidth. Then store this in local data structures and accumulate it. for (const auto& traffic_flow_id : g_vpr_ctx.noc().noc_traffic_flows_storage.get_all_traffic_flow_id()) { - const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); const std::vector& curr_traffic_flow_route = traffic_flow_routes[traffic_flow_id]; - double curr_traffic_flow_aggregate_bandwidth_cost = calculate_traffic_flow_aggregate_bandwidth_cost(curr_traffic_flow_route, curr_traffic_flow); + double curr_traffic_flow_aggregate_bandwidth_cost + = calculate_traffic_flow_aggregate_bandwidth_cost(curr_traffic_flow_route, curr_traffic_flow); // store the calculated aggregate bandwidth for the current traffic flow in local data structures (this also initializes them) traffic_flow_costs[traffic_flow_id].aggregate_bandwidth = curr_traffic_flow_aggregate_bandwidth_cost; @@ -474,10 +493,12 @@ std::pair NocCostHandler::comp_noc_latency_cost() { // now go through each traffic flow route and calculate its // latency. Then store this in local data structures and accumulate it. for (const auto& traffic_flow_id : noc_ctx.noc_traffic_flows_storage.get_all_traffic_flow_id()) { - const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); const std::vector& curr_traffic_flow_route = traffic_flow_routes[traffic_flow_id]; - auto [curr_traffic_flow_latency, curr_traffic_flow_latency_overrun] = calculate_traffic_flow_latency_cost(curr_traffic_flow_route, noc_ctx.noc_model, curr_traffic_flow); + auto [curr_traffic_flow_latency, curr_traffic_flow_latency_overrun] + = calculate_traffic_flow_latency_cost(curr_traffic_flow_route, noc_ctx.noc_model, curr_traffic_flow); // store the calculated latency cost terms for the current traffic flow in local data structures (this also initializes them) traffic_flow_costs[traffic_flow_id].latency = curr_traffic_flow_latency; @@ -525,33 +546,39 @@ int NocCostHandler::check_noc_placement_costs(const t_placer_costs& costs, vtr::vector temp_noc_link_bw_usage(noc_model.get_number_of_noc_links(), 0.0); // need to create a temporary noc routing algorithm - std::unique_ptr temp_noc_routing_algorithm = NocRoutingAlgorithmCreator::create_routing_algorithm(noc_opts.noc_routing_algorithm, - noc_model); + std::unique_ptr temp_noc_routing_algorithm + = NocRoutingAlgorithmCreator::create_routing_algorithm(noc_opts.noc_routing_algorithm, noc_model); // go through all the traffic flows and find a route for them based on where the routers are placed within the NoC for (const auto& traffic_flow_id : noc_traffic_flows_storage.get_all_traffic_flow_id()) { // get the traffic flow with the current id - const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // get the source and destination logical router blocks in the current traffic flow ClusterBlockId logical_source_router_block_id = curr_traffic_flow.source_router_cluster_id; ClusterBlockId logical_sink_router_block_id = curr_traffic_flow.sink_router_cluster_id; // get the ids of the hard router blocks where the logical router cluster blocks have been placed - NocRouterId source_router_block_id = noc_model.get_router_at_grid_location(block_locs_ref[logical_source_router_block_id].loc); - NocRouterId sink_router_block_id = noc_model.get_router_at_grid_location(block_locs_ref[logical_sink_router_block_id].loc); + NocRouterId source_router_block_id + = noc_model.get_router_at_grid_location(block_locs_ref[logical_source_router_block_id].loc); + NocRouterId sink_router_block_id + = noc_model.get_router_at_grid_location(block_locs_ref[logical_sink_router_block_id].loc); // stores a temporarily found route for a traffic flow std::vector temp_found_noc_route; // route the current traffic flow - temp_noc_routing_algorithm->route_flow(source_router_block_id, sink_router_block_id, traffic_flow_id, temp_found_noc_route, noc_model); + temp_noc_routing_algorithm->route_flow(source_router_block_id, sink_router_block_id, traffic_flow_id, + temp_found_noc_route, noc_model); // now calculate the costs associated to the current traffic flow and accumulate it to find the total cost of the NoC placement - double current_flow_aggregate_bandwidth_cost = calculate_traffic_flow_aggregate_bandwidth_cost(temp_found_noc_route, curr_traffic_flow); + double current_flow_aggregate_bandwidth_cost + = calculate_traffic_flow_aggregate_bandwidth_cost(temp_found_noc_route, curr_traffic_flow); cost_check.aggregate_bandwidth += current_flow_aggregate_bandwidth_cost; - auto [curr_traffic_flow_latency_cost, curr_traffic_flow_latency_overrun_cost] = calculate_traffic_flow_latency_cost(temp_found_noc_route, noc_model, curr_traffic_flow); + auto [curr_traffic_flow_latency_cost, curr_traffic_flow_latency_overrun_cost] + = calculate_traffic_flow_latency_cost(temp_found_noc_route, noc_model, curr_traffic_flow); cost_check.latency += curr_traffic_flow_latency_cost; cost_check.latency_overrun += curr_traffic_flow_latency_overrun_cost; @@ -570,9 +597,11 @@ int NocCostHandler::check_noc_placement_costs(const t_placer_costs& costs, } // check whether the aggregate bandwidth placement cost is within the error tolerance - if (fabs(cost_check.aggregate_bandwidth - costs.noc_cost_terms.aggregate_bandwidth) > costs.noc_cost_terms.aggregate_bandwidth * error_tolerance) { + if (fabs(cost_check.aggregate_bandwidth - costs.noc_cost_terms.aggregate_bandwidth) + > costs.noc_cost_terms.aggregate_bandwidth * error_tolerance) { VTR_LOG_ERROR( - "noc_aggregate_bandwidth_cost_check: %g and noc_aggregate_bandwidth_cost: %g differ in check_noc_placement_costs.\n", + "noc_aggregate_bandwidth_cost_check: %g and noc_aggregate_bandwidth_cost: %g differ in " + "check_noc_placement_costs.\n", cost_check.aggregate_bandwidth, costs.noc_cost_terms.aggregate_bandwidth); error++; } @@ -581,9 +610,8 @@ int NocCostHandler::check_noc_placement_costs(const t_placer_costs& costs, if (cost_check.latency > MIN_EXPECTED_NOC_LATENCY_COST) { // check whether the latency placement cost is within the error tolerance if (fabs(cost_check.latency - costs.noc_cost_terms.latency) > costs.noc_cost_terms.latency * error_tolerance) { - VTR_LOG_ERROR( - "noc_latency_cost_check: %g and noc_latency_cost: %g differ in check_noc_placement_costs.\n", - cost_check.latency, costs.noc_cost_terms.latency); + VTR_LOG_ERROR("noc_latency_cost_check: %g and noc_latency_cost: %g differ in check_noc_placement_costs.\n", + cost_check.latency, costs.noc_cost_terms.latency); error++; } } @@ -591,9 +619,11 @@ int NocCostHandler::check_noc_placement_costs(const t_placer_costs& costs, // only check the recomputed cost if it is above our expected latency cost threshold of 1 pico-second, otherwise there is no point in checking it if (cost_check.latency_overrun > MIN_EXPECTED_NOC_LATENCY_COST) { // check whether the latency overrun placement cost is within the error tolerance - if (fabs(cost_check.latency_overrun - costs.noc_cost_terms.latency_overrun) > costs.noc_cost_terms.latency_overrun * error_tolerance) { + if (fabs(cost_check.latency_overrun - costs.noc_cost_terms.latency_overrun) + > costs.noc_cost_terms.latency_overrun * error_tolerance) { VTR_LOG_ERROR( - "noc_latency_overrun_cost_check: %g and noc_latency_overrun_cost: %g differ in check_noc_placement_costs.\n", + "noc_latency_overrun_cost_check: %g and noc_latency_overrun_cost: %g differ in " + "check_noc_placement_costs.\n", cost_check.latency_overrun, costs.noc_cost_terms.latency_overrun); error++; } @@ -602,7 +632,8 @@ int NocCostHandler::check_noc_placement_costs(const t_placer_costs& costs, // check the recomputed congestion cost only if it is higher than the minimum expected value if (cost_check.congestion > MIN_EXPECTED_NOC_CONGESTION_COST) { // check whether the NoC congestion cost is within the error range - if (fabs(cost_check.congestion - costs.noc_cost_terms.congestion) > costs.noc_cost_terms.congestion * error_tolerance) { + if (fabs(cost_check.congestion - costs.noc_cost_terms.congestion) + > costs.noc_cost_terms.congestion * error_tolerance) { VTR_LOG_ERROR( "noc_congestion_cost_check: %g and noc_congestion_cost: %g differ in check_noc_placement_costs.\n", cost_check.congestion, costs.noc_cost_terms.congestion); @@ -613,17 +644,18 @@ int NocCostHandler::check_noc_placement_costs(const t_placer_costs& costs, return error; } -double calculate_traffic_flow_aggregate_bandwidth_cost(const std::vector& traffic_flow_route, const t_noc_traffic_flow& traffic_flow_info) { +double calculate_traffic_flow_aggregate_bandwidth_cost(const std::vector& traffic_flow_route, + const t_noc_traffic_flow& traffic_flow_info) { int num_of_links_in_traffic_flow = traffic_flow_route.size(); // the traffic flow aggregate bandwidth cost is scaled by its priority, which dictates its importance to the placement - return (traffic_flow_info.traffic_flow_priority * traffic_flow_info.traffic_flow_bandwidth * num_of_links_in_traffic_flow); + return (traffic_flow_info.traffic_flow_priority * traffic_flow_info.traffic_flow_bandwidth + * num_of_links_in_traffic_flow); } std::pair calculate_traffic_flow_latency_cost(const std::vector& traffic_flow_route, const NocStorage& noc_model, const t_noc_traffic_flow& traffic_flow_info) { - double noc_link_latency_component = 0.0; if (noc_model.get_detailed_link_latency()) { for (const NocLink& link : noc_model.get_noc_links(traffic_flow_route)) { @@ -658,7 +690,6 @@ std::pair calculate_traffic_flow_latency_cost(const std::vector< noc_router_latency_component = noc_router_latency * num_of_routers_in_traffic_flow; } - // calculate the total traffic flow latency double latency = noc_router_latency_component + noc_link_latency_component; @@ -685,10 +716,8 @@ double NocCostHandler::get_link_congestion_cost(const NocLink& link) const { void normalize_noc_cost_weighting_factor(t_noc_opts& noc_opts) { // calculate the sum of all weighting factors - double weighting_factor_sum = noc_opts.noc_latency_weighting + - noc_opts.noc_latency_constraints_weighting + - noc_opts.noc_congestion_weighting + - noc_opts.noc_aggregate_bandwidth_weighting; + double weighting_factor_sum = noc_opts.noc_latency_weighting + noc_opts.noc_latency_constraints_weighting + + noc_opts.noc_congestion_weighting + noc_opts.noc_aggregate_bandwidth_weighting; // Normalize weighting factor so they add up to 1 noc_opts.noc_aggregate_bandwidth_weighting /= weighting_factor_sum; @@ -738,7 +767,8 @@ int NocCostHandler::get_number_of_traffic_flows_with_latency_cons_met() const { // now go through each traffic flow route and check if its latency constraint was met for (NocTrafficFlowId traffic_flow_id : noc_traffic_flows_storage.get_all_traffic_flow_id()) { - const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); const std::vector& curr_traffic_flow_route = traffic_flow_routes[traffic_flow_id]; // there will always be one more router than links in a traffic flow @@ -751,7 +781,8 @@ int NocCostHandler::get_number_of_traffic_flows_with_latency_cons_met() const { double noc_router_latency = noc_ctx.noc_model.get_noc_router_latency(); // calculate the traffic flow_latency - double latency = (noc_link_latency * num_of_links_in_traffic_flow) + (noc_router_latency * num_of_routers_in_traffic_flow); + double latency + = (noc_link_latency * num_of_links_in_traffic_flow) + (noc_router_latency * num_of_routers_in_traffic_flow); // we check whether the latency constraint was met here if ((std::max(0., latency - max_latency)) < MIN_EXPECTED_NOC_LATENCY_COST) { @@ -795,9 +826,7 @@ double NocCostHandler::get_total_congestion_bandwidth_ratio() const { return accum_congestion_ratio; } -double NocCostHandler::get_link_used_bandwidth(NocLinkId link_id) const { - return link_bandwidth_usages[link_id]; -} +double NocCostHandler::get_link_used_bandwidth(NocLinkId link_id) const { return link_bandwidth_usages[link_id]; } const vtr::vector& NocCostHandler::get_link_bandwidth_usages() const { return link_bandwidth_usages; @@ -839,7 +868,8 @@ static bool select_random_router_cluster(ClusterBlockId& b_from, auto& cluster_ctx = g_vpr_ctx.clustering(); // get a reference to the collection of router cluster blocks in the design - const std::vector& router_clusters = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); + const std::vector& router_clusters + = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); // if there are no router cluster blocks, return false if (router_clusters.empty()) { @@ -876,7 +906,8 @@ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, t_logical_block_type_ptr cluster_from_type; // Randomly select a router cluster - bool random_select_success = select_random_router_cluster(b_from, from, cluster_from_type, blk_loc_registry.block_locs()); + bool random_select_success + = select_random_router_cluster(b_from, from, cluster_from_type, blk_loc_registry.block_locs()); // If a random router cluster could not be selected, no move can be proposed if (!random_select_success) { @@ -913,13 +944,13 @@ void write_noc_placement_file(const std::string& file_name, // open file for write and check if it opened correctly noc_placement_file.open(file_name.c_str(), std::ios::out); if (!noc_placement_file) { - VTR_LOG_ERROR( - "Failed to open the placement file '%s' to write out the NoC router placement information.\n", - file_name.c_str()); + VTR_LOG_ERROR("Failed to open the placement file '%s' to write out the NoC router placement information.\n", + file_name.c_str()); } // get a reference to the collection of router cluster blocks in the design - const std::vector& router_clusters = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); + const std::vector& router_clusters + = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); //get the noc model to determine the physical routers where clusters are placed const NocStorage& noc_model = noc_ctx.noc_model; @@ -940,7 +971,8 @@ void write_noc_placement_file(const std::string& file_name, NocRouterId physical_router_cluster_is_placed_on = noc_model.get_router_at_grid_location(cluster_location.loc); // write the current cluster information to the output file - noc_placement_file << cluster_name << " " << cluster_location.loc.layer << " " << (size_t)physical_router_cluster_is_placed_on << "\n"; + noc_placement_file << cluster_name << " " << cluster_location.loc.layer << " " + << (size_t)physical_router_cluster_is_placed_on << "\n"; } // finished writing placement information so close the file @@ -957,9 +989,7 @@ bool noc_routing_has_cycle(const vtr::vector& block_locs) { const auto& noc_ctx = g_vpr_ctx.noc(); - ChannelDependencyGraph channel_dependency_graph(noc_ctx.noc_model, - noc_ctx.noc_traffic_flows_storage, - routes, + ChannelDependencyGraph channel_dependency_graph(noc_ctx.noc_model, noc_ctx.noc_traffic_flows_storage, routes, block_locs); bool has_cycles = channel_dependency_graph.has_cycles(); @@ -969,7 +999,6 @@ bool noc_routing_has_cycle(const vtr::vector find_affected_links_by_flow_reroute(std::vector& prev_links, std::vector& curr_links) { // Sort both link containers @@ -1022,13 +1046,11 @@ static std::vector find_affected_links_by_flow_reroute(std::vector unique_links; // find links that are unique to prev_links - std::set_difference(prev_links.begin(), prev_links.end(), - curr_links.begin(), curr_links.end(), + std::set_difference(prev_links.begin(), prev_links.end(), curr_links.begin(), curr_links.end(), std::back_inserter(unique_links)); // find links that are unique to curr_links - std::set_difference(curr_links.begin(), curr_links.end(), - prev_links.begin(), prev_links.end(), + std::set_difference(curr_links.begin(), curr_links.end(), prev_links.begin(), prev_links.end(), std::back_inserter(unique_links)); return unique_links; diff --git a/vpr/src/place/noc_place_utils.h b/vpr/src/place/noc_place_utils.h index ec56c1c5c87..914376fca00 100644 --- a/vpr/src/place/noc_place_utils.h +++ b/vpr/src/place/noc_place_utils.h @@ -179,8 +179,7 @@ class NocCostHandler { */ NocCostTerms recompute_noc_costs() const; - void recompute_costs_from_scratch(const t_noc_opts& noc_opts, - t_placer_costs& costs) const; + void recompute_costs_from_scratch(const t_noc_opts& noc_opts, t_placer_costs& costs) const; /** * @brief Updates all the cost normalization factors relevant to the NoC. @@ -192,7 +191,7 @@ class NocCostHandler { * * @param costs Contains the normalization factors which need to be updated */ - static void update_noc_normalization_factors(t_placer_costs& costs) ; + static void update_noc_normalization_factors(t_placer_costs& costs); /** * @brief Calculates the aggregate bandwidth of each traffic flow in the NoC @@ -357,9 +356,7 @@ class NocCostHandler { * @param costs Contains NoC-related cost terms. * @param noc_opts Used to compute total NoC cost. */ - void print_noc_costs(std::string_view header, - const t_placer_costs& costs, - const t_noc_opts& noc_opts) const; + void print_noc_costs(std::string_view header, const t_placer_costs& costs, const t_noc_opts& noc_opts) const; private: /** @@ -443,7 +440,6 @@ class NocCostHandler { NocRouting& noc_flows_router, std::unordered_set& updated_traffic_flows); - /** * @brief Removes the route of a traffic flow and updates the links to indicate * that the traffic flow does not use them. And then finds @@ -486,7 +482,6 @@ class NocCostHandler { */ static constexpr double MAX_INV_NOC_LATENCY_COST = 1.e12; - /** * @brief Represents the minimum link bandwidth over-utilization for that link to be considered congested. * @details If a link is overloaded by less than 0.1% of the link bandwidth capacity, @@ -622,11 +617,7 @@ void normalize_noc_cost_weighting_factor(t_noc_opts& noc_opts); * @return The computed total NoC-related contribution to the * total placement cost. */ -double calculate_noc_cost(const NocCostTerms& cost_terms, - const NocCostTerms& norm_factors, - const t_noc_opts& noc_opts); - - +double calculate_noc_cost(const NocCostTerms& cost_terms, const NocCostTerms& norm_factors, const t_noc_opts& noc_opts); /* Below are functions related to the feature that forces to the placer to swap router blocks for a certain percentage of the total number of swaps */ @@ -681,8 +672,6 @@ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, void write_noc_placement_file(const std::string& file_name, const vtr::vector_map& block_locs); - - /** * @brief Check if the channel dependency graph created from the given traffic flow routes * has any cycles. @@ -706,5 +695,4 @@ bool noc_routing_has_cycle(const vtr::vector::quiet_NaN(); /********************** Variables local to place.c ***************************/ - -std::unique_ptr f_move_stats_file(nullptr, - vtr::fclose); +std::unique_ptr f_move_stats_file(nullptr, vtr::fclose); #ifdef VTR_ENABLE_DEBUG_LOGGIING -# define LOG_MOVE_STATS_HEADER() \ - do { \ - if (f_move_stats_file) { \ - fprintf(f_move_stats_file.get(), \ - "temp,from_blk,to_blk,from_type,to_type," \ - "blk_count," \ - "delta_cost,delta_bb_cost,delta_td_cost," \ - "outcome,reason\n"); \ - } \ - } while (false) - -# define LOG_MOVE_STATS_PROPOSED(t, affected_blocks) \ - do { \ - if (f_move_stats_file) { \ - auto& place_ctx = g_vpr_ctx.placement(); \ - auto& cluster_ctx = g_vpr_ctx.clustering(); \ - ClusterBlockId b_from = affected_blocks.moved_blocks[0].block_num; \ - \ - t_pl_loc to = affected_blocks.moved_blocks[0].new_loc; \ - ClusterBlockId b_to = place_ctx.grid_blocks[to.x][to.y].blocks[to.sub_tile]; \ - \ - t_logical_block_type_ptr from_type = cluster_ctx.clb_nlist.block_type(b_from); \ - t_logical_block_type_ptr to_type = nullptr; \ - if (b_to) { \ - to_type = cluster_ctx.clb_nlist.block_type(b_to); \ - } \ - \ - fprintf(f_move_stats_file.get(), \ - "%g," \ - "%d,%d," \ - "%s,%s," \ - "%d,", \ - t, \ - int(b_from), int(b_to), \ - from_type->name, (to_type ? to_type->name : "EMPTY"), \ - affected_blocks.moved_blocks.size()); \ - } \ - } while (false) - -# define LOG_MOVE_STATS_OUTCOME(delta_cost, delta_bb_cost, delta_td_cost, \ - outcome, reason) \ - do { \ - if (f_move_stats_file) { \ - fprintf(f_move_stats_file.get(), \ - "%g,%g,%g," \ - "%s,%s\n", \ - delta_cost, delta_bb_cost, delta_td_cost, \ - outcome, reason); \ - } \ - } while (false) +#define LOG_MOVE_STATS_HEADER() \ + do { \ + if (f_move_stats_file) { \ + fprintf(f_move_stats_file.get(), \ + "temp,from_blk,to_blk,from_type,to_type," \ + "blk_count," \ + "delta_cost,delta_bb_cost,delta_td_cost," \ + "outcome,reason\n"); \ + } \ + } while (false) + +#define LOG_MOVE_STATS_PROPOSED(t, affected_blocks) \ + do { \ + if (f_move_stats_file) { \ + auto& place_ctx = g_vpr_ctx.placement(); \ + auto& cluster_ctx = g_vpr_ctx.clustering(); \ + ClusterBlockId b_from = affected_blocks.moved_blocks[0].block_num; \ + \ + t_pl_loc to = affected_blocks.moved_blocks[0].new_loc; \ + ClusterBlockId b_to = place_ctx.grid_blocks[to.x][to.y].blocks[to.sub_tile]; \ + \ + t_logical_block_type_ptr from_type = cluster_ctx.clb_nlist.block_type(b_from); \ + t_logical_block_type_ptr to_type = nullptr; \ + if (b_to) { \ + to_type = cluster_ctx.clb_nlist.block_type(b_to); \ + } \ + \ + fprintf(f_move_stats_file.get(), \ + "%g," \ + "%d,%d," \ + "%s,%s," \ + "%d,", \ + t, int(b_from), int(b_to), from_type->name, (to_type ? to_type->name : "EMPTY"), \ + affected_blocks.moved_blocks.size()); \ + } \ + } while (false) + +#define LOG_MOVE_STATS_OUTCOME(delta_cost, delta_bb_cost, delta_td_cost, outcome, reason) \ + do { \ + if (f_move_stats_file) { \ + fprintf(f_move_stats_file.get(), \ + "%g,%g,%g," \ + "%s,%s\n", \ + delta_cost, delta_bb_cost, delta_td_cost, outcome, reason); \ + } \ + } while (false) #else -# define LOG_MOVE_STATS_HEADER() \ - do { \ - fprintf(f_move_stats_file.get(), \ - "VTR_ENABLE_DEBUG_LOGGING disabled " \ - "-- No move stats recorded\n"); \ - } while (false) +#define LOG_MOVE_STATS_HEADER() \ + do { \ + fprintf(f_move_stats_file.get(), \ + "VTR_ENABLE_DEBUG_LOGGING disabled " \ + "-- No move stats recorded\n"); \ + } while (false) -# define LOG_MOVE_STATS_PROPOSED(t, blocks_affected) \ - do { \ - } while (false) +#define LOG_MOVE_STATS_PROPOSED(t, blocks_affected) \ + do { \ + } while (false) -# define LOG_MOVE_STATS_OUTCOME(delta_cost, delta_bb_cost, delta_td_cost, \ - outcome, reason) \ - do { \ - } while (false) +#define LOG_MOVE_STATS_OUTCOME(delta_cost, delta_bb_cost, delta_td_cost, outcome, reason) \ + do { \ + } while (false) #endif @@ -178,8 +171,7 @@ void print_clb_placement(const char* fname); * @param place_bb_mode The bounding box mode passed by the CLI * @param rr_graph The routing resource graph */ -static bool is_cube_bb(const e_place_bounding_box_mode place_bb_mode, - const RRGraphView& rr_graph); +static bool is_cube_bb(const e_place_bounding_box_mode place_bb_mode, const RRGraphView& rr_graph); static NetCostHandler alloc_and_load_placement_structs(const t_placer_opts& placer_opts, const t_noc_opts& noc_opts, @@ -211,7 +203,6 @@ static e_move_result try_swap(const t_annealing_state* state, NetCostHandler& net_cost_handler, std::optional& noc_cost_handler); - static void check_place(const t_placer_costs& costs, const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, @@ -228,7 +219,6 @@ static int check_placement_costs(const t_placer_costs& costs, PlacerState& placer_state, NetCostHandler& net_cost_handler); - static int check_placement_consistency(const BlkLocRegistry& blk_loc_registry); static int check_block_placement_consistency(const BlkLocRegistry& blk_loc_registry); static int check_macro_placement_consistency(const BlkLocRegistry& blk_loc_registry); @@ -254,19 +244,15 @@ static float starting_t(const t_annealing_state* state, static int count_connections(); -static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, - PlacerState& placer_state); +static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, PlacerState& placer_state); -static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, - PlacerTimingContext& p_timing_ctx); +static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, PlacerTimingContext& p_timing_ctx); -static void invalidate_affected_connections( - const t_pl_blocks_to_be_moved& blocks_affected, - NetPinTimingInvalidator* pin_tedges_invalidator, - TimingInfo* timing_info); +static void invalidate_affected_connections(const t_pl_blocks_to_be_moved& blocks_affected, + NetPinTimingInvalidator* pin_tedges_invalidator, + TimingInfo* timing_info); -static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, - const PlacerState& placer_state); +static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, const PlacerState& placer_state); static e_move_result assess_swap(double delta_c, double t); @@ -376,7 +362,6 @@ void try_place(const Netlist<>& net_list, int tot_iter, moves_since_cost_recompute, num_connections, outer_crit_iter_count; float first_crit_exponent; - t_placer_costs costs(placer_opts.place_algorithm); tatum::TimingPathInfo critical_path; @@ -402,19 +387,11 @@ void try_place(const Netlist<>& net_list, if (placer_opts.place_algorithm.is_timing_driven()) { /*do this before the initial placement to avoid messing up the initial placement */ - place_delay_model = alloc_lookups_and_delay_model(net_list, - chan_width_dist, - placer_opts, - router_opts, - det_routing_arch, - segment_inf, - directs, - num_directs, - is_flat); + place_delay_model = alloc_lookups_and_delay_model(net_list, chan_width_dist, placer_opts, router_opts, + det_routing_arch, segment_inf, directs, num_directs, is_flat); if (isEchoFileEnabled(E_ECHO_PLACEMENT_DELTA_DELAY_MODEL)) { - place_delay_model->dump_echo( - getEchoFileName(E_ECHO_PLACEMENT_DELTA_DELAY_MODEL)); + place_delay_model->dump_echo(getEchoFileName(E_ECHO_PLACEMENT_DELTA_DELAY_MODEL)); } } @@ -433,11 +410,10 @@ void try_place(const Netlist<>& net_list, const auto& p_timing_ctx = placer_state.timing(); const auto& p_runtime_ctx = placer_state.runtime(); - std::optional noc_cost_handler; // create cost handler objects - NetCostHandler net_cost_handler = alloc_and_load_placement_structs(placer_opts, noc_opts, directs, - num_directs, placer_state, noc_cost_handler); + NetCostHandler net_cost_handler + = alloc_and_load_placement_structs(placer_opts, noc_opts, directs, num_directs, placer_state, noc_cost_handler); #ifndef NO_GRAPHICS if (noc_cost_handler.has_value()) { @@ -453,11 +429,11 @@ void try_place(const Netlist<>& net_list, normalize_noc_cost_weighting_factor(const_cast(noc_opts)); } - initial_placement(placer_opts, placer_opts.constraints_file.c_str(), - noc_opts, blk_loc_registry, noc_cost_handler); + initial_placement(placer_opts, placer_opts.constraints_file.c_str(), noc_opts, blk_loc_registry, noc_cost_handler); //create the move generator based on the chosen strategy - auto [move_generator, move_generator2] = create_move_generators(placer_state, placer_opts, move_lim, noc_opts.noc_centroid_weight); + auto [move_generator, move_generator2] + = create_move_generators(placer_state, placer_opts, move_lim, noc_opts.noc_centroid_weight); if (!placer_opts.write_initial_place_file.empty()) { print_place(nullptr, nullptr, placer_opts.write_initial_place_file.c_str(), placer_state.block_locs()); @@ -498,8 +474,7 @@ void try_place(const Netlist<>& net_list, num_connections = count_connections(); VTR_LOG("\n"); - VTR_LOG("There are %d point to point connections in this circuit.\n", - num_connections); + VTR_LOG("There are %d point to point connections in this circuit.\n", num_connections); VTR_LOG("\n"); //Update the point-to-point delays from the initial placement @@ -509,28 +484,20 @@ void try_place(const Netlist<>& net_list, * Initialize timing analysis */ // For placement, we don't use flat-routing - placement_delay_calc = std::make_shared(atom_ctx.nlist, - atom_ctx.lookup, - p_timing_ctx.connection_delay, - is_flat); + placement_delay_calc = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, + p_timing_ctx.connection_delay, is_flat); placement_delay_calc->set_tsu_margin_relative(placer_opts.tsu_rel_margin); placement_delay_calc->set_tsu_margin_absolute(placer_opts.tsu_abs_margin); - timing_info = make_setup_timing_info(placement_delay_calc, - placer_opts.timing_update_type); + timing_info = make_setup_timing_info(placement_delay_calc, placer_opts.timing_update_type); placer_setup_slacks = std::make_unique(cluster_ctx.clb_nlist, netlist_pin_lookup); placer_criticalities = std::make_unique(cluster_ctx.clb_nlist, netlist_pin_lookup); - pin_timing_invalidator = make_net_pin_timing_invalidator( - placer_opts.timing_update_type, - net_list, - netlist_pin_lookup, - atom_ctx.nlist, - atom_ctx.lookup, - *timing_info->timing_graph(), - is_flat); + pin_timing_invalidator + = make_net_pin_timing_invalidator(placer_opts.timing_update_type, net_list, netlist_pin_lookup, + atom_ctx.nlist, atom_ctx.lookup, *timing_info->timing_graph(), is_flat); //First time compute timing and costs, compute from scratch PlaceCritParams crit_params; @@ -538,24 +505,20 @@ void try_place(const Netlist<>& net_list, crit_params.crit_limit = placer_opts.place_crit_limit; initialize_timing_info(crit_params, place_delay_model.get(), placer_criticalities.get(), - placer_setup_slacks.get(), pin_timing_invalidator.get(), - timing_info.get(), &costs, placer_state); + placer_setup_slacks.get(), pin_timing_invalidator.get(), timing_info.get(), &costs, + placer_state); critical_path = timing_info->least_slack_critical_path(); /* Write out the initial timing echo file */ if (isEchoFileEnabled(E_ECHO_INITIAL_PLACEMENT_TIMING_GRAPH)) { - tatum::write_echo( - getEchoFileName(E_ECHO_INITIAL_PLACEMENT_TIMING_GRAPH), - *timing_ctx.graph, *timing_ctx.constraints, - *placement_delay_calc, timing_info->analyzer()); + tatum::write_echo(getEchoFileName(E_ECHO_INITIAL_PLACEMENT_TIMING_GRAPH), *timing_ctx.graph, + *timing_ctx.constraints, *placement_delay_calc, timing_info->analyzer()); tatum::NodeId debug_tnode = id_or_pin_name_to_tnode(analysis_opts.echo_dot_timing_graph_node); - write_setup_timing_graph_dot( - getEchoFileName(E_ECHO_INITIAL_PLACEMENT_TIMING_GRAPH) - + std::string(".dot"), - *timing_info, debug_tnode); + write_setup_timing_graph_dot(getEchoFileName(E_ECHO_INITIAL_PLACEMENT_TIMING_GRAPH) + std::string(".dot"), + *timing_info, debug_tnode); } outer_crit_iter_count = 1; @@ -586,7 +549,8 @@ void try_place(const Netlist<>& net_list, // get the costs associated with the NoC costs.noc_cost_terms.aggregate_bandwidth = noc_cost_handler->comp_noc_aggregate_bandwidth_cost(); - std::tie(costs.noc_cost_terms.latency, costs.noc_cost_terms.latency_overrun) = noc_cost_handler->comp_noc_latency_cost(); + std::tie(costs.noc_cost_terms.latency, costs.noc_cost_terms.latency_overrun) + = noc_cost_handler->comp_noc_latency_cost(); costs.noc_cost_terms.congestion = noc_cost_handler->comp_noc_congestion_cost(); // initialize all the noc normalization factors @@ -597,33 +561,22 @@ void try_place(const Netlist<>& net_list, costs.cost = get_total_cost(&costs, placer_opts, noc_opts); //Sanity check that initial placement is legal - check_place(costs, - place_delay_model.get(), - placer_criticalities.get(), - placer_opts.place_algorithm, - noc_opts, - placer_state, - net_cost_handler, - noc_cost_handler); + check_place(costs, place_delay_model.get(), placer_criticalities.get(), placer_opts.place_algorithm, noc_opts, + placer_state, net_cost_handler, noc_cost_handler); //Initial placement statistics - VTR_LOG("Initial placement cost: %g bb_cost: %g td_cost: %g\n", costs.cost, - costs.bb_cost, costs.timing_cost); + VTR_LOG("Initial placement cost: %g bb_cost: %g td_cost: %g\n", costs.cost, costs.bb_cost, costs.timing_cost); if (noc_opts.noc) { VTR_ASSERT(noc_cost_handler.has_value()); noc_cost_handler->print_noc_costs("Initial NoC Placement Costs", costs, noc_opts); } if (placer_opts.place_algorithm.is_timing_driven()) { - VTR_LOG( - "Initial placement estimated Critical Path Delay (CPD): %g ns\n", - 1e9 * critical_path.delay()); - VTR_LOG( - "Initial placement estimated setup Total Negative Slack (sTNS): %g ns\n", - 1e9 * timing_info->setup_total_negative_slack()); - VTR_LOG( - "Initial placement estimated setup Worst Negative Slack (sWNS): %g ns\n", - 1e9 * timing_info->setup_worst_negative_slack()); + VTR_LOG("Initial placement estimated Critical Path Delay (CPD): %g ns\n", 1e9 * critical_path.delay()); + VTR_LOG("Initial placement estimated setup Total Negative Slack (sTNS): %g ns\n", + 1e9 * timing_info->setup_total_negative_slack()); + VTR_LOG("Initial placement estimated setup Worst Negative Slack (sWNS): %g ns\n", + 1e9 * timing_info->setup_worst_negative_slack()); VTR_LOG("\n"); VTR_LOG("Initial placement estimated setup slack histogram:\n"); @@ -634,22 +587,19 @@ void try_place(const Netlist<>& net_list, for (auto& macro : g_vpr_ctx.placement().pl_macros) { num_macro_members += macro.members.size(); } - VTR_LOG( - "Placement contains %zu placement macros involving %zu blocks (average macro size %f)\n", - g_vpr_ctx.placement().pl_macros.size(), num_macro_members, - float(num_macro_members) / g_vpr_ctx.placement().pl_macros.size()); + VTR_LOG("Placement contains %zu placement macros involving %zu blocks (average macro size %f)\n", + g_vpr_ctx.placement().pl_macros.size(), num_macro_members, + float(num_macro_members) / g_vpr_ctx.placement().pl_macros.size()); VTR_LOG("\n"); - sprintf(msg, - "Initial Placement. Cost: %g BB Cost: %g TD Cost %g \t Channel Factor: %d", - costs.cost, costs.bb_cost, costs.timing_cost, width_fac); + sprintf(msg, "Initial Placement. Cost: %g BB Cost: %g TD Cost %g \t Channel Factor: %d", costs.cost, + costs.bb_cost, costs.timing_cost, width_fac); //Draw the initial placement update_screen(ScreenUpdatePriority::MAJOR, msg, PLACEMENT, timing_info); if (placer_opts.placement_saves_per_temperature >= 1) { - std::string filename = vtr::string_fmt("placement_%03d_%03d.place", 0, - 0); + std::string filename = vtr::string_fmt("placement_%03d_%03d.place", 0, 0); VTR_LOG("Saving initial placement to file: %s\n", filename.c_str()); print_place(nullptr, nullptr, filename.c_str(), blk_loc_registry.block_locs()); } @@ -658,7 +608,8 @@ void try_place(const Netlist<>& net_list, int inner_recompute_limit; if (placer_opts.inner_loop_recompute_divider != 0) { - inner_recompute_limit = static_cast(0.5 + (float)first_move_lim / (float)placer_opts.inner_loop_recompute_divider); + inner_recompute_limit + = static_cast(0.5 + (float)first_move_lim / (float)placer_opts.inner_loop_recompute_divider); } else { /*don't do an inner recompute */ inner_recompute_limit = first_move_lim + 1; @@ -681,33 +632,31 @@ void try_place(const Netlist<>& net_list, //allocate move type statistics vectors MoveTypeStat move_type_stat; - move_type_stat.blk_type_moves.resize({device_ctx.logical_block_types.size(), (int)e_move_type::NUMBER_OF_AUTO_MOVES}, 0); - move_type_stat.accepted_moves.resize({device_ctx.logical_block_types.size(), (int)e_move_type::NUMBER_OF_AUTO_MOVES}, 0); - move_type_stat.rejected_moves.resize({device_ctx.logical_block_types.size(), (int)e_move_type::NUMBER_OF_AUTO_MOVES}, 0); + move_type_stat.blk_type_moves.resize( + {device_ctx.logical_block_types.size(), (int)e_move_type::NUMBER_OF_AUTO_MOVES}, 0); + move_type_stat.accepted_moves.resize( + {device_ctx.logical_block_types.size(), (int)e_move_type::NUMBER_OF_AUTO_MOVES}, 0); + move_type_stat.rejected_moves.resize( + {device_ctx.logical_block_types.size(), (int)e_move_type::NUMBER_OF_AUTO_MOVES}, 0); /* Get the first range limiter */ float first_rlim = (float)std::max(device_ctx.grid.width() - 1, device_ctx.grid.height() - 1); place_move_ctx.first_rlim = first_rlim; - t_annealing_state state(annealing_sched, - EPSILON, // Set the temperature low to ensure that initial placement quality will be preserved - first_rlim, - first_move_lim, - first_crit_exponent, - device_ctx.grid.get_num_layers()); + t_annealing_state state( + annealing_sched, + EPSILON, // Set the temperature low to ensure that initial placement quality will be preserved + first_rlim, first_move_lim, first_crit_exponent, device_ctx.grid.get_num_layers()); /* Update the starting temperature for placement annealing to a more appropriate value */ - state.t = starting_t(&state, &costs, annealing_sched, - place_delay_model.get(), placer_criticalities.get(), - placer_setup_slacks.get(), timing_info.get(), *move_generator, - manual_move_generator, pin_timing_invalidator.get(), - blocks_affected, placer_opts, noc_opts, move_type_stat, + state.t = starting_t(&state, &costs, annealing_sched, place_delay_model.get(), placer_criticalities.get(), + placer_setup_slacks.get(), timing_info.get(), *move_generator, manual_move_generator, + pin_timing_invalidator.get(), blocks_affected, placer_opts, noc_opts, move_type_stat, swap_stats, placer_state, net_cost_handler, noc_cost_handler); if (!placer_opts.move_stats_file.empty()) { f_move_stats_file = std::unique_ptr( - vtr::fopen(placer_opts.move_stats_file.c_str(), "w"), - vtr::fclose); + vtr::fopen(placer_opts.move_stats_file.c_str(), "w"), vtr::fclose); LOG_MOVE_STATS_HEADER(); } @@ -741,11 +690,10 @@ void try_place(const Netlist<>& net_list, do { vtr::Timer temperature_timer; - outer_loop_update_timing_info(placer_opts, noc_opts, &costs, num_connections, - state.crit_exponent, &outer_crit_iter_count, - place_delay_model.get(), placer_criticalities.get(), - placer_setup_slacks.get(), pin_timing_invalidator.get(), - timing_info.get(), placer_state, noc_cost_handler); + outer_loop_update_timing_info(placer_opts, noc_opts, &costs, num_connections, state.crit_exponent, + &outer_crit_iter_count, place_delay_model.get(), placer_criticalities.get(), + placer_setup_slacks.get(), pin_timing_invalidator.get(), timing_info.get(), + placer_state, noc_cost_handler); if (placer_opts.place_algorithm.is_timing_driven()) { critical_path = timing_info->least_slack_critical_path(); @@ -754,44 +702,35 @@ void try_place(const Netlist<>& net_list, //see if we should save the current placement solution as a checkpoint - if (placer_opts.place_checkpointing - && agent_state == e_agent_state::LATE_IN_THE_ANNEAL) { - save_placement_checkpoint_if_needed(blk_loc_registry.block_locs(), - placement_checkpoint, + if (placer_opts.place_checkpointing && agent_state == e_agent_state::LATE_IN_THE_ANNEAL) { + save_placement_checkpoint_if_needed(blk_loc_registry.block_locs(), placement_checkpoint, timing_info, costs, critical_path.delay()); } } //move the appropriate move_generator to be the current used move generator - assign_current_move_generator(move_generator, move_generator2, - agent_state, placer_opts, false, current_move_generator); + assign_current_move_generator(move_generator, move_generator2, agent_state, placer_opts, false, + current_move_generator); //do a complete inner loop iteration - placement_inner_loop(&state, placer_opts, noc_opts, - inner_recompute_limit, - &stats, &costs, &moves_since_cost_recompute, - pin_timing_invalidator.get(), place_delay_model.get(), - placer_criticalities.get(), placer_setup_slacks.get(), - *current_move_generator, manual_move_generator, - blocks_affected, timing_info.get(), - placer_opts.place_algorithm, move_type_stat, - timing_bb_factor, swap_stats, placer_state, - net_cost_handler, noc_cost_handler); - + placement_inner_loop(&state, placer_opts, noc_opts, inner_recompute_limit, &stats, &costs, + &moves_since_cost_recompute, pin_timing_invalidator.get(), place_delay_model.get(), + placer_criticalities.get(), placer_setup_slacks.get(), *current_move_generator, + manual_move_generator, blocks_affected, timing_info.get(), placer_opts.place_algorithm, + move_type_stat, timing_bb_factor, swap_stats, placer_state, net_cost_handler, + noc_cost_handler); //move the update used move_generator to its original variable - update_move_generator(move_generator, move_generator2, agent_state, - placer_opts, false, current_move_generator); + update_move_generator(move_generator, move_generator2, agent_state, placer_opts, false, + current_move_generator); tot_iter += state.move_lim; ++state.num_temps; - print_place_status(state, stats, temperature_timer.elapsed_sec(), - critical_path.delay(), sTNS, sWNS, tot_iter, - noc_opts.noc, costs.noc_cost_terms); + print_place_status(state, stats, temperature_timer.elapsed_sec(), critical_path.delay(), sTNS, sWNS, + tot_iter, noc_opts.noc, costs.noc_cost_terms); - if (placer_opts.place_algorithm.is_timing_driven() - && placer_opts.place_agent_multistate + if (placer_opts.place_algorithm.is_timing_driven() && placer_opts.place_agent_multistate && agent_state == e_agent_state::EARLY_IN_THE_ANNEAL) { if (state.alpha < 0.85 && state.alpha > 0.6) { agent_state = e_agent_state::LATE_IN_THE_ANNEAL; @@ -799,18 +738,16 @@ void try_place(const Netlist<>& net_list, } } - sprintf(msg, "Cost: %g BB Cost %g TD Cost %g Temperature: %g", - costs.cost, costs.bb_cost, costs.timing_cost, state.t); - update_screen(ScreenUpdatePriority::MINOR, msg, PLACEMENT, - timing_info); + sprintf(msg, "Cost: %g BB Cost %g TD Cost %g Temperature: %g", costs.cost, costs.bb_cost, + costs.timing_cost, state.t); + update_screen(ScreenUpdatePriority::MINOR, msg, PLACEMENT, timing_info); //#ifdef VERBOSE // if (getEchoEnabled()) { // print_clb_placement("first_iteration_clb_placement.echo"); // } //#endif - } while (state.outer_loop_update(stats.success_rate, costs, placer_opts, - annealing_sched)); + } while (state.outer_loop_update(stats.success_rate, costs, placer_opts, annealing_sched)); /* Outer loop of the simulated annealing ends */ } //skip_anneal ends @@ -823,33 +760,26 @@ void try_place(const Netlist<>& net_list, vtr::ScopedFinishTimer temperature_timer("Placement Quench"); - outer_loop_update_timing_info(placer_opts, noc_opts, &costs, num_connections, - state.crit_exponent, &outer_crit_iter_count, - place_delay_model.get(), placer_criticalities.get(), - placer_setup_slacks.get(), pin_timing_invalidator.get(), - timing_info.get(), placer_state, noc_cost_handler); + outer_loop_update_timing_info(placer_opts, noc_opts, &costs, num_connections, state.crit_exponent, + &outer_crit_iter_count, place_delay_model.get(), placer_criticalities.get(), + placer_setup_slacks.get(), pin_timing_invalidator.get(), timing_info.get(), + placer_state, noc_cost_handler); //move the appropriate move_generator to be the current used move generator - assign_current_move_generator(move_generator, move_generator2, - agent_state, placer_opts, true, current_move_generator); + assign_current_move_generator(move_generator, move_generator2, agent_state, placer_opts, true, + current_move_generator); /* Run inner loop again with temperature = 0 so as to accept only swaps * which reduce the cost of the placement */ - placement_inner_loop(&state, placer_opts, noc_opts, - quench_recompute_limit, - &stats, &costs, &moves_since_cost_recompute, - pin_timing_invalidator.get(), place_delay_model.get(), - placer_criticalities.get(), placer_setup_slacks.get(), - *current_move_generator, manual_move_generator, - blocks_affected, timing_info.get(), - placer_opts.place_quench_algorithm, move_type_stat, - timing_bb_factor, swap_stats, placer_state, - net_cost_handler, noc_cost_handler); - + placement_inner_loop(&state, placer_opts, noc_opts, quench_recompute_limit, &stats, &costs, + &moves_since_cost_recompute, pin_timing_invalidator.get(), place_delay_model.get(), + placer_criticalities.get(), placer_setup_slacks.get(), *current_move_generator, + manual_move_generator, blocks_affected, timing_info.get(), + placer_opts.place_quench_algorithm, move_type_stat, timing_bb_factor, swap_stats, + placer_state, net_cost_handler, noc_cost_handler); //move the update used move_generator to its original variable - update_move_generator(move_generator, move_generator2, agent_state, - placer_opts, true, current_move_generator); + update_move_generator(move_generator, move_generator2, agent_state, placer_opts, true, current_move_generator); tot_iter += state.move_lim; ++state.num_temps; @@ -860,8 +790,7 @@ void try_place(const Netlist<>& net_list, sWNS = timing_info->setup_worst_negative_slack(); } - print_place_status(state, stats, temperature_timer.elapsed_sec(), - critical_path.delay(), sTNS, sWNS, tot_iter, + print_place_status(state, stats, temperature_timer.elapsed_sec(), critical_path.delay(), sTNS, sWNS, tot_iter, noc_opts.noc, costs.noc_cost_terms); } auto post_quench_timing_stats = timing_ctx.stats; @@ -873,22 +802,19 @@ void try_place(const Netlist<>& net_list, if (placer_opts.place_algorithm.is_timing_driven()) { perform_full_timing_update(crit_params, place_delay_model.get(), placer_criticalities.get(), - placer_setup_slacks.get(), pin_timing_invalidator.get(), - timing_info.get(), &costs, placer_state); - VTR_LOG("post-quench CPD = %g (ns) \n", - 1e9 * timing_info->least_slack_critical_path().delay()); + placer_setup_slacks.get(), pin_timing_invalidator.get(), timing_info.get(), &costs, + placer_state); + VTR_LOG("post-quench CPD = %g (ns) \n", 1e9 * timing_info->least_slack_critical_path().delay()); } //See if our latest checkpoint is better than the current placement solution if (placer_opts.place_checkpointing) - restore_best_placement(placer_state, - placement_checkpoint, timing_info, costs, - placer_criticalities, placer_setup_slacks, place_delay_model, - pin_timing_invalidator, crit_params, noc_cost_handler); + restore_best_placement(placer_state, placement_checkpoint, timing_info, costs, placer_criticalities, + placer_setup_slacks, place_delay_model, pin_timing_invalidator, crit_params, + noc_cost_handler); if (placer_opts.placement_saves_per_temperature >= 1) { - std::string filename = vtr::string_fmt("placement_%03d_%03d.place", - state.num_temps + 1, 0); + std::string filename = vtr::string_fmt("placement_%03d_%03d.place", state.num_temps + 1, 0); VTR_LOG("Saving final placement to file: %s\n", filename.c_str()); print_place(nullptr, nullptr, filename.c_str(), blk_loc_registry.block_locs()); } @@ -907,14 +833,8 @@ void try_place(const Netlist<>& net_list, blk_loc_registry.place_sync_external_block_connections(block_id); } - check_place(costs, - place_delay_model.get(), - placer_criticalities.get(), - placer_opts.place_algorithm, - noc_opts, - placer_state, - net_cost_handler, - noc_cost_handler); + check_place(costs, place_delay_model.get(), placer_criticalities.get(), placer_opts.place_algorithm, noc_opts, + placer_state, net_cost_handler, noc_cost_handler); //Some stats VTR_LOG("\n"); @@ -928,33 +848,25 @@ void try_place(const Netlist<>& net_list, critical_path = timing_info->least_slack_critical_path(); if (isEchoFileEnabled(E_ECHO_FINAL_PLACEMENT_TIMING_GRAPH)) { - tatum::write_echo( - getEchoFileName(E_ECHO_FINAL_PLACEMENT_TIMING_GRAPH), - *timing_ctx.graph, *timing_ctx.constraints, - *placement_delay_calc, timing_info->analyzer()); - - tatum::NodeId debug_tnode = id_or_pin_name_to_tnode( - analysis_opts.echo_dot_timing_graph_node); - write_setup_timing_graph_dot( - getEchoFileName(E_ECHO_FINAL_PLACEMENT_TIMING_GRAPH) - + std::string(".dot"), - *timing_info, debug_tnode); + tatum::write_echo(getEchoFileName(E_ECHO_FINAL_PLACEMENT_TIMING_GRAPH), *timing_ctx.graph, + *timing_ctx.constraints, *placement_delay_calc, timing_info->analyzer()); + + tatum::NodeId debug_tnode = id_or_pin_name_to_tnode(analysis_opts.echo_dot_timing_graph_node); + write_setup_timing_graph_dot(getEchoFileName(E_ECHO_FINAL_PLACEMENT_TIMING_GRAPH) + std::string(".dot"), + *timing_info, debug_tnode); } - generate_post_place_timing_reports(placer_opts, analysis_opts, *timing_info, - *placement_delay_calc, is_flat, blk_loc_registry); + generate_post_place_timing_reports(placer_opts, analysis_opts, *timing_info, *placement_delay_calc, is_flat, + blk_loc_registry); /* Print critical path delay metrics */ VTR_LOG("\n"); - print_setup_timing_summary(*timing_ctx.constraints, - *timing_info->setup_analyzer(), "Placement estimated ", ""); + print_setup_timing_summary(*timing_ctx.constraints, *timing_info->setup_analyzer(), "Placement estimated ", ""); } - sprintf(msg, - "Placement. Cost: %g bb_cost: %g td_cost: %g Channel Factor: %d", - costs.cost, costs.bb_cost, costs.timing_cost, width_fac); - VTR_LOG("Placement cost: %g, bb_cost: %g, td_cost: %g, \n", costs.cost, - costs.bb_cost, costs.timing_cost); + sprintf(msg, "Placement. Cost: %g bb_cost: %g td_cost: %g Channel Factor: %d", costs.cost, costs.bb_cost, + costs.timing_cost, width_fac); + VTR_LOG("Placement cost: %g, bb_cost: %g, td_cost: %g, \n", costs.cost, costs.bb_cost, costs.timing_cost); // print the noc costs info if (noc_opts.noc) { VTR_ASSERT(noc_cost_handler.has_value()); @@ -982,16 +894,12 @@ void try_place(const Netlist<>& net_list, free_placement_structs(); - print_timing_stats("Placement Quench", post_quench_timing_stats, - pre_quench_timing_stats); - print_timing_stats("Placement Total ", timing_ctx.stats, - pre_place_timing_stats); + print_timing_stats("Placement Quench", post_quench_timing_stats, pre_quench_timing_stats); + print_timing_stats("Placement Total ", timing_ctx.stats, pre_place_timing_stats); VTR_LOG("update_td_costs: connections %g nets %g sum_nets %g total %g\n", - p_runtime_ctx.f_update_td_costs_connections_elapsed_sec, - p_runtime_ctx.f_update_td_costs_nets_elapsed_sec, - p_runtime_ctx.f_update_td_costs_sum_nets_elapsed_sec, - p_runtime_ctx.f_update_td_costs_total_elapsed_sec); + p_runtime_ctx.f_update_td_costs_connections_elapsed_sec, p_runtime_ctx.f_update_td_costs_nets_elapsed_sec, + p_runtime_ctx.f_update_td_costs_sum_nets_elapsed_sec, p_runtime_ctx.f_update_td_costs_total_elapsed_sec); copy_locs_to_global_state(blk_loc_registry); } @@ -1026,8 +934,8 @@ static void outer_loop_update_timing_info(const t_placer_opts& placer_opts, crit_params.crit_limit = placer_opts.place_crit_limit; //Update all timing related classes - perform_full_timing_update(crit_params, delay_model, criticalities, setup_slacks, - pin_timing_invalidator, timing_info, costs, placer_state); + perform_full_timing_update(crit_params, delay_model, criticalities, setup_slacks, pin_timing_invalidator, + timing_info, costs, placer_state); *outer_crit_iter_count = 0; } @@ -1070,12 +978,10 @@ static void placement_inner_loop(const t_annealing_state* state, /* Inner loop begins */ for (int inner_iter = 0, inner_crit_iter_count = 1; inner_iter < state->move_lim; inner_iter++) { - e_move_result swap_result = try_swap(state, costs, move_generator, - manual_move_generator, timing_info, pin_timing_invalidator, - blocks_affected, delay_model, criticalities, setup_slacks, - placer_opts, noc_opts, move_type_stat, place_algorithm, - timing_bb_factor, manual_move_enabled, swap_stats, - placer_state, net_cost_handler, noc_cost_handler); + e_move_result swap_result = try_swap( + state, costs, move_generator, manual_move_generator, timing_info, pin_timing_invalidator, blocks_affected, + delay_model, criticalities, setup_slacks, placer_opts, noc_opts, move_type_stat, place_algorithm, + timing_bb_factor, manual_move_enabled, swap_stats, placer_state, net_cost_handler, noc_cost_handler); if (swap_result == ACCEPTED) { /* Move was accepted. Update statistics that are useful for the annealing schedule. */ @@ -1104,9 +1010,8 @@ static void placement_inner_loop(const t_annealing_state* state, crit_params.crit_limit = placer_opts.place_crit_limit; //Update all timing related classes - perform_full_timing_update(crit_params, delay_model, criticalities, - setup_slacks, pin_timing_invalidator, - timing_info, costs, placer_state); + perform_full_timing_update(crit_params, delay_model, criticalities, setup_slacks, + pin_timing_invalidator, timing_info, costs, placer_state); } inner_crit_iter_count++; } @@ -1129,10 +1034,10 @@ static void placement_inner_loop(const t_annealing_state* state, if (placer_opts.placement_saves_per_temperature >= 1 && inner_iter > 0 && (inner_iter + 1) % (state->move_lim / placer_opts.placement_saves_per_temperature) == 0) { - std::string filename = vtr::string_fmt("placement_%03d_%03d.place", - state->num_temps + 1, inner_placement_save_count); - VTR_LOG("Saving placement to file at temperature move %d / %d: %s\n", - inner_iter, state->move_lim, filename.c_str()); + std::string filename + = vtr::string_fmt("placement_%03d_%03d.place", state->num_temps + 1, inner_placement_save_count); + VTR_LOG("Saving placement to file at temperature move %d / %d: %s\n", inner_iter, state->move_lim, + filename.c_str()); print_place(nullptr, nullptr, filename.c_str(), placer_state.block_locs()); ++inner_placement_save_count; } @@ -1191,8 +1096,7 @@ static float starting_t(const t_annealing_state* state, double av = 0., sum_of_squares = 0.; /* Determines the block swap loop count. */ - int move_lim = std::min(state->move_lim_max, - (int)cluster_ctx.clb_nlist.blocks().size()); + int move_lim = std::min(state->move_lim_max, (int)cluster_ctx.clb_nlist.blocks().size()); bool manual_move_enabled = false; @@ -1206,13 +1110,11 @@ static float starting_t(const t_annealing_state* state, #endif /*NO_GRAPHICS*/ //Will not deploy setup slack analysis, so omit crit_exponenet and setup_slack - e_move_result swap_result = try_swap(state, costs, move_generator, - manual_move_generator, timing_info, pin_timing_invalidator, - blocks_affected, delay_model, criticalities, setup_slacks, - placer_opts, noc_opts, move_type_stat, placer_opts.place_algorithm, - REWARD_BB_TIMING_RELATIVE_WEIGHT, manual_move_enabled, swap_stats, - placer_state, net_cost_handler, noc_cost_handler); - + e_move_result swap_result + = try_swap(state, costs, move_generator, manual_move_generator, timing_info, pin_timing_invalidator, + blocks_affected, delay_model, criticalities, setup_slacks, placer_opts, noc_opts, move_type_stat, + placer_opts.place_algorithm, REWARD_BB_TIMING_RELATIVE_WEIGHT, manual_move_enabled, swap_stats, + placer_state, net_cost_handler, noc_cost_handler); if (swap_result == ACCEPTED) { num_accepted++; @@ -1234,8 +1136,7 @@ static float starting_t(const t_annealing_state* state, /* Print warning if not all swaps are accepted. */ if (num_accepted != move_lim) { - VTR_LOG_WARN("Starting t: %d of %d configurations accepted.\n", - num_accepted, move_lim); + VTR_LOG_WARN("Starting t: %d of %d configurations accepted.\n", num_accepted, move_lim); } #ifdef VERBOSE @@ -1334,10 +1235,9 @@ static e_move_result try_swap(const t_annealing_state* state, //When manual move toggle button is active, the manual move window asks the user for input. if (manual_move_enabled) { #ifndef NO_GRAPHICS - create_move_outcome = manual_move_display_and_propose(manual_move_generator, blocks_affected, - proposed_action.move_type, rlim, placer_opts, - criticalities); -#else //NO_GRAPHICS + create_move_outcome = manual_move_display_and_propose( + manual_move_generator, blocks_affected, proposed_action.move_type, rlim, placer_opts, criticalities); +#else //NO_GRAPHICS \ //Cast to void to explicitly avoid warning. (void)manual_move_generator; #endif //NO_GRAPHICS @@ -1347,25 +1247,24 @@ static e_move_result try_swap(const t_annealing_state* state, proposed_action.move_type = e_move_type::UNIFORM; } else { //Generate a new move (perturbation) used to explore the space of possible placements - create_move_outcome = move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); + create_move_outcome + = move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); } - if (proposed_action.logical_blk_type_index != -1) { //if the agent proposed the block type, then collect the block type stat + if (proposed_action.logical_blk_type_index + != -1) { //if the agent proposed the block type, then collect the block type stat ++move_type_stat.blk_type_moves[proposed_action.logical_blk_type_index][(int)proposed_action.move_type]; } LOG_MOVE_STATS_PROPOSED(t, blocks_affected); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, - "\t\tBefore move Place cost %e, bb_cost %e, timing cost %e\n", + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tBefore move Place cost %e, bb_cost %e, timing cost %e\n", costs->cost, costs->bb_cost, costs->timing_cost); e_move_result move_outcome = e_move_result::ABORTED; if (create_move_outcome == e_create_move::ABORT) { - LOG_MOVE_STATS_OUTCOME(std::numeric_limits::quiet_NaN(), - std::numeric_limits::quiet_NaN(), - std::numeric_limits::quiet_NaN(), "ABORTED", - "illegal move"); + LOG_MOVE_STATS_OUTCOME(std::numeric_limits::quiet_NaN(), std::numeric_limits::quiet_NaN(), + std::numeric_limits::quiet_NaN(), "ABORTED", "illegal move"); move_outcome = ABORTED; @@ -1392,8 +1291,8 @@ static e_move_result try_swap(const t_annealing_state* state, // //Also find all the pins affected by the swap, and calculates new connection //delays and timing costs and store them in proposed_* data structures. - net_cost_handler.find_affected_nets_and_update_costs(delay_model, criticalities, blocks_affected, - bb_delta_c, timing_delta_c); + net_cost_handler.find_affected_nets_and_update_costs(delay_model, criticalities, blocks_affected, bb_delta_c, + timing_delta_c); //For setup slack analysis, we first do a timing analysis to get the newest //slack values resulted from the proposed block moves. If the move turns out @@ -1401,8 +1300,7 @@ static e_move_result try_swap(const t_annealing_state* state, //If rejected, we reject the proposed block moves and revert this timing analysis. if (place_algorithm == SLACK_TIMING_PLACE) { /* Invalidates timing of modified connections for incremental timing updates. */ - invalidate_affected_connections(blocks_affected, - pin_timing_invalidator, timing_info); + invalidate_affected_connections(blocks_affected, pin_timing_invalidator, timing_info); /* Update the connection_timing_cost and connection_delay * * values from the temporary values. */ @@ -1418,8 +1316,8 @@ static e_move_result try_swap(const t_annealing_state* state, * we need to revert block moves and restore the timing values. */ criticalities->disable_update(); setup_slacks->enable_update(); - update_timing_classes(crit_params, timing_info, criticalities, - setup_slacks, pin_timing_invalidator, placer_state); + update_timing_classes(crit_params, timing_info, criticalities, setup_slacks, pin_timing_invalidator, + placer_state); /* Get the setup slack analysis cost */ //TODO: calculate a weighted average of the slack cost and wiring cost @@ -1430,19 +1328,13 @@ static e_move_result try_swap(const t_annealing_state* state, VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tMove bb_delta_c %e, bb_cost_norm %e, timing_tradeoff %f, " "timing_delta_c %e, timing_cost_norm %e\n", - bb_delta_c, - costs->bb_cost_norm, - timing_tradeoff, - timing_delta_c, - costs->timing_cost_norm); + bb_delta_c, costs->bb_cost_norm, timing_tradeoff, timing_delta_c, costs->timing_cost_norm); delta_c = (1 - timing_tradeoff) * bb_delta_c * costs->bb_cost_norm + timing_tradeoff * timing_delta_c * costs->timing_cost_norm; } else { VTR_ASSERT_SAFE(place_algorithm == BOUNDING_BOX_PLACE); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, - "\t\tMove bb_delta_c %e, bb_cost_norm %e\n", - bb_delta_c, - costs->bb_cost_norm); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tMove bb_delta_c %e, bb_cost_norm %e\n", + bb_delta_c, costs->bb_cost_norm); delta_c = bb_delta_c * costs->bb_cost_norm; } @@ -1485,8 +1377,7 @@ static e_move_result try_swap(const t_annealing_state* state, /* Invalidates timing of modified connections for incremental * * timing updates. These invalidations are accumulated for a * * big timing update in the outer loop. */ - invalidate_affected_connections(blocks_affected, - pin_timing_invalidator, timing_info); + invalidate_affected_connections(blocks_affected, pin_timing_invalidator, timing_info); /* Update the connection_timing_cost and connection_delay * * values from the temporary values. */ @@ -1499,10 +1390,11 @@ static e_move_result try_swap(const t_annealing_state* state, /* Update clb data structures since we kept the move. */ blk_loc_registry.commit_move_blocks(blocks_affected); - if (proposed_action.logical_blk_type_index != -1) { //if the agent proposed the block type, then collect the block type stat + if (proposed_action.logical_blk_type_index + != -1) { //if the agent proposed the block type, then collect the block type stat ++move_type_stat.accepted_moves[proposed_action.logical_blk_type_index][(int)proposed_action.move_type]; } - if (noc_opts.noc){ + if (noc_opts.noc) { noc_cost_handler->commit_noc_costs(); *costs += noc_delta_c; } @@ -1533,16 +1425,15 @@ static e_move_result try_swap(const t_annealing_state* state, /* Re-invalidate the affected sink pins since the proposed * * move is rejected, and the same blocks are reverted to * * their original positions. */ - invalidate_affected_connections(blocks_affected, - pin_timing_invalidator, timing_info); + invalidate_affected_connections(blocks_affected, pin_timing_invalidator, timing_info); /* Revert the timing update */ - update_timing_classes(crit_params, timing_info, criticalities, - setup_slacks, pin_timing_invalidator, placer_state); + update_timing_classes(crit_params, timing_info, criticalities, setup_slacks, pin_timing_invalidator, + placer_state); - VTR_ASSERT_SAFE_MSG( - verify_connection_setup_slacks(setup_slacks, placer_state), - "The current setup slacks should be identical to the values before the try swap timing info update."); + VTR_ASSERT_SAFE_MSG(verify_connection_setup_slacks(setup_slacks, placer_state), + "The current setup slacks should be identical to the values before the try swap " + "timing info update."); } if (place_algorithm == CRITICALITY_TIMING_PLACE) { @@ -1550,7 +1441,8 @@ static e_move_result try_swap(const t_annealing_state* state, revert_td_cost(blocks_affected, placer_state.mutable_timing()); } - if (proposed_action.logical_blk_type_index != -1) { //if the agent proposed the block type, then collect the block type stat + if (proposed_action.logical_blk_type_index + != -1) { //if the agent proposed the block type, then collect the block type stat ++move_type_stat.rejected_moves[proposed_action.logical_blk_type_index][(int)proposed_action.move_type]; } /* Revert the traffic flow routes within the NoC*/ @@ -1579,9 +1471,9 @@ static e_move_result try_swap(const t_annealing_state* state, } #ifdef VTR_ENABLE_DEBUG_LOGGING -# ifndef NO_GRAPHICS +#ifndef NO_GRAPHICS stop_placement_and_check_breakpoints(blocks_affected, move_outcome, delta_c, bb_delta_c, timing_delta_c); -# endif +#endif #endif /* Clear the data structure containing block move info */ @@ -1592,14 +1484,12 @@ static e_move_result try_swap(const t_annealing_state* state, // greatly slow the placer, but can debug some issues. check_place(*costs, delay_model, criticalities, place_algorithm, noc_opts); #endif - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, - "\t\tAfter move Place cost %e, bb_cost %e, timing cost %e\n", + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tAfter move Place cost %e, bb_cost %e, timing cost %e\n", costs->cost, costs->bb_cost, costs->timing_cost); return move_outcome; } -static bool is_cube_bb(const e_place_bounding_box_mode place_bb_mode, - const RRGraphView& rr_graph) { +static bool is_cube_bb(const e_place_bounding_box_mode place_bb_mode, const RRGraphView& rr_graph) { bool cube_bb; const int number_layers = g_vpr_ctx.device().grid.get_num_layers(); @@ -1670,7 +1560,8 @@ static double get_total_cost(t_placer_costs* costs, const t_placer_opts& placer_ total_cost = costs->bb_cost * costs->bb_cost_norm; } else if (placer_opts.place_algorithm.is_timing_driven()) { // in timing mode we include both wirelength and timing costs - total_cost = (1 - placer_opts.timing_tradeoff) * (costs->bb_cost * costs->bb_cost_norm) + (placer_opts.timing_tradeoff) * (costs->timing_cost * costs->timing_cost_norm); + total_cost = (1 - placer_opts.timing_tradeoff) * (costs->bb_cost * costs->bb_cost_norm) + + (placer_opts.timing_tradeoff) * (costs->timing_cost * costs->timing_cost_norm); } if (noc_opts.noc) { @@ -1699,8 +1590,7 @@ static double get_total_cost(t_placer_costs* costs, const t_placer_opts& placer_ * value suddenly got very good due to the block move, while a good slack value * got very bad, perhaps even worse than the original worse slack value. */ -static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, - const PlacerState& placer_state) { +static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, const PlacerState& placer_state) { const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& clb_nlist = cluster_ctx.clb_nlist; @@ -1716,8 +1606,7 @@ static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, size_t ipin = clb_nlist.pin_net_index(clb_pin); original_setup_slacks.push_back(connection_setup_slack[net_id][ipin]); - proposed_setup_slacks.push_back( - setup_slacks->setup_slack(net_id, ipin)); + proposed_setup_slacks.push_back(setup_slacks->setup_slack(net_id, ipin)); } //Sort in ascending order, from the worse slack value to the best @@ -1727,8 +1616,7 @@ static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, //Check the first pair of slack values that are different //If found, return their difference for (size_t idiff = 0; idiff < original_setup_slacks.size(); ++idiff) { - float slack_diff = original_setup_slacks[idiff] - - proposed_setup_slacks[idiff]; + float slack_diff = original_setup_slacks[idiff] - proposed_setup_slacks[idiff]; if (slack_diff != 0) { return slack_diff; @@ -1770,8 +1658,7 @@ static e_move_result assess_swap(double delta_c, double t) { * All the connections have already been gathered by blocks_affected.affected_pins * after running the routine find_affected_nets_and_update_costs() in try_swap(). */ -static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, - PlacerState& placer_state) { +static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, PlacerState& placer_state) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& clb_nlist = cluster_ctx.clb_nlist; @@ -1796,8 +1683,7 @@ static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, //Reverts modifications to proposed_connection_delay and proposed_connection_timing_cost based on //the move proposed in blocks_affected -static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, - PlacerTimingContext& p_timing_ctx) { +static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, PlacerTimingContext& p_timing_ctx) { #ifndef VTR_ASSERT_SAFE_ENABLED (void)blocks_affected; (void)p_timing_ctx; @@ -1876,7 +1762,8 @@ static NetCostHandler alloc_and_load_placement_structs(const t_placer_opts& plac p_timing_ctx.connection_delay = make_net_pins_matrix((const Netlist<>&)cluster_ctx.clb_nlist, 0.f); p_timing_ctx.proposed_connection_delay = make_net_pins_matrix(cluster_ctx.clb_nlist, 0.f); - p_timing_ctx.connection_setup_slack = make_net_pins_matrix(cluster_ctx.clb_nlist, std::numeric_limits::infinity()); + p_timing_ctx.connection_setup_slack + = make_net_pins_matrix(cluster_ctx.clb_nlist, std::numeric_limits::infinity()); p_timing_ctx.connection_timing_cost = PlacerTimingCosts(cluster_ctx.clb_nlist); p_timing_ctx.proposed_connection_timing_cost = make_net_pins_matrix(cluster_ctx.clb_nlist, 0.); @@ -1985,9 +1872,7 @@ static int check_placement_costs(const t_placer_costs& costs, double bb_cost_check = net_cost_handler.comp_bb_cost(e_cost_methods::CHECK); if (fabs(bb_cost_check - costs.bb_cost) > costs.bb_cost * PL_INCREMENTAL_COST_TOLERANCE) { - VTR_LOG_ERROR( - "bb_cost_check: %g and bb_cost: %g differ in check_place.\n", - bb_cost_check, costs.bb_cost); + VTR_LOG_ERROR("bb_cost_check: %g and bb_cost: %g differ in check_place.\n", bb_cost_check, costs.bb_cost); error++; } @@ -1995,9 +1880,8 @@ static int check_placement_costs(const t_placer_costs& costs, comp_td_costs(delay_model, *criticalities, placer_state, &timing_cost_check); //VTR_LOG("timing_cost recomputed from scratch: %g\n", timing_cost_check); if (fabs(timing_cost_check - costs.timing_cost) > costs.timing_cost * PL_INCREMENTAL_COST_TOLERANCE) { - VTR_LOG_ERROR( - "timing_cost_check: %g and timing_cost: %g differ in check_place.\n", - timing_cost_check, costs.timing_cost); + VTR_LOG_ERROR("timing_cost_check: %g and timing_cost: %g differ in check_place.\n", timing_cost_check, + costs.timing_cost); error++; } } @@ -2025,9 +1909,8 @@ static int check_block_placement_consistency(const BlkLocRegistry& blk_loc_regis const t_physical_tile_loc tile_loc(i, j, layer_num); const auto& type = device_ctx.grid.get_physical_type(tile_loc); if (grid_blocks.get_usage(tile_loc) > type->capacity) { - VTR_LOG_ERROR( - "%d blocks were placed at grid location (%d,%d,%d), but location capacity is %d.\n", - grid_blocks.get_usage(tile_loc), i, j, layer_num, type->capacity); + VTR_LOG_ERROR("%d blocks were placed at grid location (%d,%d,%d), but location capacity is %d.\n", + grid_blocks.get_usage(tile_loc), i, j, layer_num, type->capacity); error++; } int usage_check = 0; @@ -2042,27 +1925,16 @@ static int check_block_placement_consistency(const BlkLocRegistry& blk_loc_regis t_pl_loc block_loc = block_locs[bnum].loc; if (physical_tile_type(block_loc) != physical_tile) { - VTR_LOG_ERROR( - "Block %zu type (%s) does not match grid location (%zu,%zu, %d) type (%s).\n", - size_t(bnum), logical_block->name, i, j, layer_num, physical_tile->name); + VTR_LOG_ERROR("Block %zu type (%s) does not match grid location (%zu,%zu, %d) type (%s).\n", + size_t(bnum), logical_block->name, i, j, layer_num, physical_tile->name); error++; } auto& loc = block_locs[bnum].loc; if (loc.x != i || loc.y != j || loc.layer != layer_num - || !is_sub_tile_compatible(physical_tile, logical_block, - loc.sub_tile)) { - VTR_LOG_ERROR( - "Block %zu's location is (%d,%d,%d,%d) but found in grid at (%d,%d,%d,%d).\n", - size_t(bnum), - loc.x, - loc.y, - loc.sub_tile, - loc.layer, - i, - j, - k, - layer_num); + || !is_sub_tile_compatible(physical_tile, logical_block, loc.sub_tile)) { + VTR_LOG_ERROR("Block %zu's location is (%d,%d,%d,%d) but found in grid at (%d,%d,%d,%d).\n", + size_t(bnum), loc.x, loc.y, loc.sub_tile, loc.layer, i, j, k, layer_num); error++; } ++usage_check; @@ -2071,11 +1943,7 @@ static int check_block_placement_consistency(const BlkLocRegistry& blk_loc_regis if (usage_check != grid_blocks.get_usage(tile_loc)) { VTR_LOG_ERROR( "%d block(s) were placed at location (%d,%d,%d), but location contains %d block(s).\n", - grid_blocks.get_usage(tile_loc), - tile_loc.x, - tile_loc.y, - tile_loc.layer_num, - usage_check); + grid_blocks.get_usage(tile_loc), tile_loc.x, tile_loc.y, tile_loc.layer_num, usage_check); error++; } } @@ -2085,8 +1953,7 @@ static int check_block_placement_consistency(const BlkLocRegistry& blk_loc_regis /* Check that every block exists in the device_ctx.grid and cluster_ctx.blocks arrays somewhere. */ for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) if (bdone[blk_id] != 1) { - VTR_LOG_ERROR("Block %zu listed %d times in device context grid.\n", - size_t(blk_id), bdone[blk_id]); + VTR_LOG_ERROR("Block %zu listed %d times in device context grid.\n", size_t(blk_id), bdone[blk_id]); error++; } @@ -2112,21 +1979,19 @@ int check_macro_placement_consistency(const BlkLocRegistry& blk_loc_registry) { // Check the blk_loc_registry.block_locs data structure first if (block_locs[member_iblk].loc != member_pos) { - VTR_LOG_ERROR( - "Block %zu in pl_macro #%zu is not placed in the proper orientation.\n", - size_t(member_iblk), imacro); + VTR_LOG_ERROR("Block %zu in pl_macro #%zu is not placed in the proper orientation.\n", + size_t(member_iblk), imacro); error++; } // Then check the blk_loc_registry.grid data structure if (grid_blocks.block_at_location(member_pos) != member_iblk) { - VTR_LOG_ERROR( - "Block %zu in pl_macro #%zu is not placed in the proper orientation.\n", - size_t(member_iblk), imacro); + VTR_LOG_ERROR("Block %zu in pl_macro #%zu is not placed in the proper orientation.\n", + size_t(member_iblk), imacro); error++; } } // Finish going through all the members - } // Finish going through all the macros + } // Finish going through all the macros return error; } @@ -2143,7 +2008,8 @@ void print_clb_placement(const char* fname) { fprintf(fp, "Block #\tName\t(X, Y, Z).\n"); for (auto i : cluster_ctx.clb_nlist.blocks()) { - fprintf(fp, "#%d\t%s\t(%d, %d, %d).\n", i, cluster_ctx.clb_nlist.block_name(i).c_str(), place_ctx.block_locs[i].loc.x, place_ctx.block_locs[i].loc.y, place_ctx.block_locs[i].loc.sub_tile); + fprintf(fp, "#%d\t%s\t(%d, %d, %d).\n", i, cluster_ctx.clb_nlist.block_name(i).c_str(), + place_ctx.block_locs[i].loc.x, place_ctx.block_locs[i].loc.y, place_ctx.block_locs[i].loc.sub_tile); } fclose(fp); @@ -2159,16 +2025,14 @@ static void generate_post_place_timing_reports(const t_placer_opts& placer_opts, auto& timing_ctx = g_vpr_ctx.timing(); auto& atom_ctx = g_vpr_ctx.atom(); - VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, - delay_calc, is_flat, blk_loc_registry); + VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, + blk_loc_registry); resolver.set_detail_level(analysis_opts.timing_report_detail); - tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, - *timing_ctx.constraints); + tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, *timing_ctx.constraints); - timing_reporter.report_timing_setup( - placer_opts.post_place_timing_report_file, - *timing_info.setup_analyzer(), analysis_opts.timing_report_npaths); + timing_reporter.report_timing_setup(placer_opts.post_place_timing_report_file, *timing_info.setup_analyzer(), + analysis_opts.timing_report_npaths); } #if 0 @@ -2185,22 +2049,30 @@ static void update_screen_debug() { static void print_place_status_header(bool noc_enabled) { if (!noc_enabled) { VTR_LOG( - "---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------\n"); + "---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ " + "-------- --------- ------\n"); VTR_LOG( - "Tnum Time T Av Cost Av BB Cost Av TD Cost CPD sTNS sWNS Ac Rate Std Dev R lim Crit Exp Tot Moves Alpha\n"); + "Tnum Time T Av Cost Av BB Cost Av TD Cost CPD sTNS sWNS Ac Rate Std Dev R lim Crit " + "Exp Tot Moves Alpha\n"); VTR_LOG( - " (sec) (ns) (ns) (ns) \n"); + " (sec) (ns) (ns) (ns) " + " \n"); VTR_LOG( - "---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------\n"); + "---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ " + "-------- --------- ------\n"); } else { VTR_LOG( - "---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------ -------- -------- --------- ---------\n"); + "---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ " + "-------- --------- ------ -------- -------- --------- ---------\n"); VTR_LOG( - "Tnum Time T Av Cost Av BB Cost Av TD Cost CPD sTNS sWNS Ac Rate Std Dev R lim Crit Exp Tot Moves Alpha Agg. BW Agg. Lat Lat Over. NoC Cong.\n"); + "Tnum Time T Av Cost Av BB Cost Av TD Cost CPD sTNS sWNS Ac Rate Std Dev R lim Crit " + "Exp Tot Moves Alpha Agg. BW Agg. Lat Lat Over. NoC Cong.\n"); VTR_LOG( - " (sec) (ns) (ns) (ns) (bps) (ns) (ns) \n"); + " (sec) (ns) (ns) (ns) " + " (bps) (ns) (ns) \n"); VTR_LOG( - "---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------ -------- -------- --------- ---------\n"); + "---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ " + "-------- --------- ------ -------- -------- --------- ---------\n"); } } @@ -2218,10 +2090,8 @@ static void print_place_status(const t_annealing_state& state, "%7.3f %10.2f %-10.5g " "%7.3f % 10.3g % 8.3f " "%7.3f %7.4f %6.1f %8.2f", - state.num_temps, elapsed_sec, state.t, - stats.av_cost, stats.av_bb_cost, stats.av_timing_cost, - 1e9 * cpd, 1e9 * sTNS, 1e9 * sWNS, - stats.success_rate, stats.std_dev, state.rlim, state.crit_exponent); + state.num_temps, elapsed_sec, state.t, stats.av_cost, stats.av_bb_cost, stats.av_timing_cost, 1e9 * cpd, + 1e9 * sTNS, 1e9 * sWNS, stats.success_rate, stats.std_dev, state.rlim, state.crit_exponent); pretty_print_uint(" ", tot_moves, 9, 3); @@ -2231,8 +2101,8 @@ static void print_place_status(const t_annealing_state& state, VTR_LOG( " %7.2e %7.2e" " %8.2e %8.2f", - noc_cost_terms.aggregate_bandwidth, noc_cost_terms.latency, - noc_cost_terms.latency_overrun, noc_cost_terms.congestion); + noc_cost_terms.aggregate_bandwidth, noc_cost_terms.latency, noc_cost_terms.latency_overrun, + noc_cost_terms.congestion); } VTR_LOG("\n"); @@ -2268,8 +2138,7 @@ static void print_resources_utilization(const BlkLocRegistry& blk_loc_registry) VTR_LOG("Placement resource usage:\n"); for (const auto [logical_block_type_ptr, _] : num_type_instances) { for (const auto [physical_tile_type_ptr, num_instances] : num_placed_instances[logical_block_type_ptr]) { - VTR_LOG(" %-*s implemented as %-*s: %d\n", max_block_name, - logical_block_type_ptr->name, max_tile_name, + VTR_LOG(" %-*s implemented as %-*s: %d\n", max_block_name, logical_block_type_ptr->name, max_tile_name, physical_tile_type_ptr->name, num_instances); } } @@ -2277,7 +2146,8 @@ static void print_resources_utilization(const BlkLocRegistry& blk_loc_registry) } static void print_placement_swaps_stats(const t_annealing_state& state, const t_swap_stats& swap_stats) { - size_t total_swap_attempts = swap_stats.num_swap_rejected + swap_stats.num_swap_accepted + swap_stats.num_swap_aborted; + size_t total_swap_attempts + = swap_stats.num_swap_rejected + swap_stats.num_swap_accepted + swap_stats.num_swap_aborted; VTR_ASSERT(total_swap_attempts > 0); size_t num_swap_print_digits = ceil(log10(total_swap_attempts)); @@ -2285,14 +2155,12 @@ static void print_placement_swaps_stats(const t_annealing_state& state, const t_ float accept_rate = (float)swap_stats.num_swap_accepted / total_swap_attempts; float abort_rate = (float)swap_stats.num_swap_aborted / total_swap_attempts; VTR_LOG("Placement number of temperatures: %d\n", state.num_temps); - VTR_LOG("Placement total # of swap attempts: %*d\n", num_swap_print_digits, - total_swap_attempts); - VTR_LOG("\tSwaps accepted: %*d (%4.1f %%)\n", num_swap_print_digits, - swap_stats.num_swap_accepted, 100 * accept_rate); - VTR_LOG("\tSwaps rejected: %*d (%4.1f %%)\n", num_swap_print_digits, - swap_stats.num_swap_rejected, 100 * reject_rate); - VTR_LOG("\tSwaps aborted: %*d (%4.1f %%)\n", num_swap_print_digits, - swap_stats.num_swap_aborted, 100 * abort_rate); + VTR_LOG("Placement total # of swap attempts: %*d\n", num_swap_print_digits, total_swap_attempts); + VTR_LOG("\tSwaps accepted: %*d (%4.1f %%)\n", num_swap_print_digits, swap_stats.num_swap_accepted, + 100 * accept_rate); + VTR_LOG("\tSwaps rejected: %*d (%4.1f %%)\n", num_swap_print_digits, swap_stats.num_swap_rejected, + 100 * reject_rate); + VTR_LOG("\tSwaps aborted: %*d (%4.1f %%)\n", num_swap_print_digits, swap_stats.num_swap_aborted, 100 * abort_rate); } static void copy_locs_to_global_state(const BlkLocRegistry& blk_loc_registry) { diff --git a/vpr/src/place/place_checkpoint.cpp b/vpr/src/place/place_checkpoint.cpp index 85f4ab28e18..2c00292f277 100644 --- a/vpr/src/place/place_checkpoint.cpp +++ b/vpr/src/place/place_checkpoint.cpp @@ -30,9 +30,12 @@ void save_placement_checkpoint_if_needed(const vtr::vector_map& timing_info, t_placer_costs& costs, float cpd) { - if (!placement_checkpoint.cp_is_valid() || (timing_info->least_slack_critical_path().delay() < placement_checkpoint.get_cp_cpd() && costs.bb_cost <= placement_checkpoint.get_cp_bb_cost())) { + if (!placement_checkpoint.cp_is_valid() + || (timing_info->least_slack_critical_path().delay() < placement_checkpoint.get_cp_cpd() + && costs.bb_cost <= placement_checkpoint.get_cp_bb_cost())) { placement_checkpoint.save_placement(block_locs, costs, cpd); - VTR_LOG("Checkpoint saved: bb_costs=%g, TD costs=%g, CPD=%7.3f (ns) \n", costs.bb_cost, costs.timing_cost, 1e9 * cpd); + VTR_LOG("Checkpoint saved: bb_costs=%g, TD costs=%g, CPD=%7.3f (ns) \n", costs.bb_cost, costs.timing_cost, + 1e9 * cpd); } } @@ -51,22 +54,20 @@ void restore_best_placement(PlacerState& placer_state, * 2) The checkpoint's wire-length cost is either better than the current solution, * or at least is not more than 5% worse than the current solution. */ - if (placement_checkpoint.cp_is_valid() && timing_info->least_slack_critical_path().delay() > placement_checkpoint.get_cp_cpd() && costs.bb_cost * 1.05 > placement_checkpoint.get_cp_bb_cost()) { + if (placement_checkpoint.cp_is_valid() + && timing_info->least_slack_critical_path().delay() > placement_checkpoint.get_cp_cpd() + && costs.bb_cost * 1.05 > placement_checkpoint.get_cp_bb_cost()) { //restore the latest placement checkpoint - costs = placement_checkpoint.restore_placement(placer_state.mutable_block_locs(), placer_state.mutable_grid_blocks()); + costs = placement_checkpoint.restore_placement(placer_state.mutable_block_locs(), + placer_state.mutable_grid_blocks()); //recompute timing from scratch placer_criticalities.get()->set_recompute_required(); placer_setup_slacks.get()->set_recompute_required(); comp_td_connection_delays(place_delay_model.get(), placer_state); - perform_full_timing_update(crit_params, - place_delay_model.get(), - placer_criticalities.get(), - placer_setup_slacks.get(), - pin_timing_invalidator.get(), - timing_info.get(), - &costs, + perform_full_timing_update(crit_params, place_delay_model.get(), placer_criticalities.get(), + placer_setup_slacks.get(), pin_timing_invalidator.get(), timing_info.get(), &costs, placer_state); /* If NoC is enabled, re-compute NoC costs and re-initialize NoC internal data structures. diff --git a/vpr/src/place/place_checkpoint.h b/vpr/src/place/place_checkpoint.h index 8c2313e7117..14cb76f34b9 100644 --- a/vpr/src/place/place_checkpoint.h +++ b/vpr/src/place/place_checkpoint.h @@ -47,8 +47,7 @@ class t_placement_checkpoint { * @param grid_blocks To be filled with grid location to clustered block mapping of the saved placement. * @return Different cost terms associated with the saved placement. */ - t_placer_costs restore_placement(vtr::vector_map& block_locs, - GridBlock& grid_blocks); + t_placer_costs restore_placement(vtr::vector_map& block_locs, GridBlock& grid_blocks); //return the critical path delay of the saved checkpoint float get_cp_cpd() const; diff --git a/vpr/src/place/place_constraints.cpp b/vpr/src/place/place_constraints.cpp index 94af4721026..8ba8ea10e0d 100644 --- a/vpr/src/place/place_constraints.cpp +++ b/vpr/src/place/place_constraints.cpp @@ -73,7 +73,6 @@ PartitionRegion update_macro_head_pr(const t_pl_macro& pl_macro) { const std::vector& block_regions = block_pr.get_regions(); for (const Region& block_region : block_regions) { - auto offset = member.offset; vtr::Rect block_reg_rect = block_region.get_rect(); @@ -132,7 +131,6 @@ PartitionRegion update_macro_member_pr(const PartitionRegion& head_pr, macro_pr.add_to_part_region(modified_reg); } - //intersect to ensure the macro pr does not go outside of grid dimensions macro_pr = intersection(macro_pr, grid_pr); @@ -154,7 +152,8 @@ void print_macro_constraint_error(const t_pl_macro& pl_macro) { VTR_LOG("Block %s (#%zu) ", blk_name.c_str(), size_t(member.blk_index)); } VTR_LOG("\n"); - VPR_ERROR(VPR_ERROR_PLACE, " \n Check that the above-mentioned placement macro blocks have compatible floorplan constraints.\n"); + VPR_ERROR(VPR_ERROR_PLACE, + " \n Check that the above-mentioned placement macro blocks have compatible floorplan constraints.\n"); } void propagate_place_constraints() { @@ -242,7 +241,8 @@ void load_cluster_constraints() { } else { PartitionRegion intersect_pr = intersection(pr, floorplanning_ctx.cluster_constraints[cluster_id]); if (intersect_pr.empty()) { - VTR_LOG_ERROR("Cluster block %zu has atoms with incompatible floorplan constraints.\n", size_t(cluster_id)); + VTR_LOG_ERROR("Cluster block %zu has atoms with incompatible floorplan constraints.\n", + size_t(cluster_id)); } else { floorplanning_ctx.cluster_constraints[cluster_id] = intersect_pr; } @@ -298,8 +298,6 @@ void alloc_and_load_compressed_cluster_constraints() { // Get the compressed grid for NoC const auto& compressed_grid = place_ctx.compressed_block_grids[block_type->index]; - - for (const Region& region : pr.get_regions()) { const auto [layer_low, layer_high] = region.get_layer_range(); const vtr::Rect& rect = region.get_rect(); @@ -307,17 +305,20 @@ void alloc_and_load_compressed_cluster_constraints() { for (int l = layer_low; l <= layer_high; l++) { PartitionRegion compressed_pr; - if (compressed_grid.compressed_to_grid_x[l].empty() || compressed_grid.compressed_to_grid_y[l].empty()) { + if (compressed_grid.compressed_to_grid_x[l].empty() + || compressed_grid.compressed_to_grid_y[l].empty()) { continue; } t_physical_tile_loc min_loc{rect.xmin(), rect.ymin(), l}; t_physical_tile_loc max_loc{rect.xmax(), rect.ymax(), l}; - t_physical_tile_loc compressed_min_loc = compressed_grid.grid_loc_to_compressed_loc_approx_round_up(min_loc); - t_physical_tile_loc compressed_max_loc = compressed_grid.grid_loc_to_compressed_loc_approx_round_down(max_loc); + t_physical_tile_loc compressed_min_loc + = compressed_grid.grid_loc_to_compressed_loc_approx_round_up(min_loc); + t_physical_tile_loc compressed_max_loc + = compressed_grid.grid_loc_to_compressed_loc_approx_round_down(max_loc); - Region compressed_region(compressed_min_loc.x, compressed_min_loc.y, - compressed_max_loc.x, compressed_max_loc.y, l); + Region compressed_region(compressed_min_loc.x, compressed_min_loc.y, compressed_max_loc.x, + compressed_max_loc.y, l); compressed_region.set_sub_tile(region.get_sub_tile()); compressed_pr.add_to_part_region(compressed_region); @@ -326,14 +327,12 @@ void alloc_and_load_compressed_cluster_constraints() { } } - for (int l = 0 ; l < n_layers; l++) { + for (int l = 0; l < n_layers; l++) { if (floorplanning_ctx.compressed_cluster_constraints[l][blk_id].empty()) { floorplanning_ctx.compressed_cluster_constraints[l][blk_id].add_to_part_region(Region{}); } } - } - } /* @@ -423,9 +422,7 @@ bool is_pr_size_one(const PartitionRegion& pr, t_logical_block_type_ptr block_ty auto& device_ctx = g_vpr_ctx.device(); const int num_layers = device_ctx.grid.get_num_layers(); - Region intersect_reg(0, 0, - (int)device_ctx.grid.width() - 1, (int)device_ctx.grid.height(), - 0, num_layers - 1); + Region intersect_reg(0, 0, (int)device_ctx.grid.width() - 1, (int)device_ctx.grid.height(), 0, num_layers - 1); const std::vector& regions = pr.get_regions(); int pr_size = 0; @@ -490,7 +487,8 @@ double get_floorplan_score(ClusterBlockId blk_id, VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Initial placement failed.\n" "The specified floorplan region for block %s (# %d) has no available locations for its type. \n" - "Please specify a different floorplan region for the block. Note that if the region has a specified subtile, " + "Please specify a different floorplan region for the block. Note that if the region has a " + "specified subtile, " "an incompatible subtile location may be the cause of the floorplan region failure. \n", cluster_ctx.clb_nlist.block_name(blk_id).c_str(), blk_id); } diff --git a/vpr/src/place/place_constraints.h b/vpr/src/place/place_constraints.h index 02157e907a1..88cf97a8388 100644 --- a/vpr/src/place/place_constraints.h +++ b/vpr/src/place/place_constraints.h @@ -43,7 +43,6 @@ bool is_cluster_constrained(ClusterBlockId blk_id); */ bool cluster_floorplanning_legal(ClusterBlockId blk_id, const t_pl_loc& loc); - /** * @brief Check whether any member of the macro has floorplan constraints. * @@ -101,14 +100,11 @@ inline bool floorplan_legal(const t_pl_blocks_to_be_moved& blocks_affected) { bool floorplan_legal; for (const t_pl_moved_block& moved_block : blocks_affected.moved_blocks) { - floorplan_legal = cluster_floorplanning_legal(moved_block.block_num, - moved_block.new_loc); + floorplan_legal = cluster_floorplanning_legal(moved_block.block_num, moved_block.new_loc); if (!floorplan_legal) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tMove aborted for block %zu, location tried was x: %d, y: %d, subtile: %d \n", - size_t(moved_block.block_num), - moved_block.new_loc.x, - moved_block.new_loc.y, + size_t(moved_block.block_num), moved_block.new_loc.x, moved_block.new_loc.y, moved_block.new_loc.sub_tile); return false; } @@ -116,7 +112,6 @@ inline bool floorplan_legal(const t_pl_blocks_to_be_moved& blocks_affected) { return true; } - /** * @brief Load cluster_constraints if the pack stage of VPR is skipped. * @@ -190,10 +185,7 @@ bool is_pr_size_one(const PartitionRegion& pr, t_logical_block_type_ptr block_ty * compatible the given block_type. * @return int The number of compatible grid tiles covered by the PartitionRegion. */ -int get_part_reg_size(const PartitionRegion& pr, - t_logical_block_type_ptr block_type, - const GridTileLookup& grid_tiles); - +int get_part_reg_size(const PartitionRegion& pr, t_logical_block_type_ptr block_type, const GridTileLookup& grid_tiles); /** * @brief Return the floorplan score that will be used for sorting blocks during initial placement. @@ -214,5 +206,4 @@ double get_floorplan_score(ClusterBlockId blk_id, t_logical_block_type_ptr block_type, const GridTileLookup& grid_tiles); - #endif /* VPR_SRC_PLACE_PLACE_CONSTRAINTS_H_ */ diff --git a/vpr/src/place/place_delay_model.cpp b/vpr/src/place/place_delay_model.cpp index aa6896a62fe..a83bfab77e4 100644 --- a/vpr/src/place/place_delay_model.cpp +++ b/vpr/src/place/place_delay_model.cpp @@ -18,15 +18,18 @@ #include "vpr_error.h" #ifdef VTR_ENABLE_CAPNPROTO -# include "capnp/serialize.h" -# include "place_delay_model.capnp.h" -# include "ndmatrix_serdes.h" -# include "mmap_file.h" -# include "serdes_utils.h" +#include "capnp/serialize.h" +#include "place_delay_model.capnp.h" +#include "ndmatrix_serdes.h" +#include "mmap_file.h" +#include "serdes_utils.h" #endif /* VTR_ENABLE_CAPNPROTO */ ///@brief DeltaDelayModel methods. -float DeltaDelayModel::delay(const t_physical_tile_loc& from_loc, int /*from_pin*/, const t_physical_tile_loc& to_loc, int /*to_pin*/) const { +float DeltaDelayModel::delay(const t_physical_tile_loc& from_loc, + int /*from_pin*/, + const t_physical_tile_loc& to_loc, + int /*to_pin*/) const { int delta_x = std::abs(from_loc.x - to_loc.x); int delta_y = std::abs(from_loc.y - to_loc.y); @@ -56,12 +59,13 @@ void DeltaDelayModel::dump_echo(std::string filepath) const { vtr::fclose(f); } -const DeltaDelayModel* OverrideDelayModel::base_delay_model() const { - return base_delay_model_.get(); -} +const DeltaDelayModel* OverrideDelayModel::base_delay_model() const { return base_delay_model_.get(); } ///@brief OverrideDelayModel methods. -float OverrideDelayModel::delay(const t_physical_tile_loc& from_loc, int from_pin, const t_physical_tile_loc& to_loc, int to_pin) const { +float OverrideDelayModel::delay(const t_physical_tile_loc& from_loc, + int from_pin, + const t_physical_tile_loc& to_loc, + int to_pin) const { //First check to if there is an override delay value auto& device_ctx = g_vpr_ctx.device(); auto& grid = device_ctx.grid; @@ -93,7 +97,13 @@ float OverrideDelayModel::delay(const t_physical_tile_loc& from_loc, int from_pi return delay_val; } -void OverrideDelayModel::set_delay_override(int from_type, int from_class, int to_type, int to_class, int delta_x, int delta_y, float delay_val) { +void OverrideDelayModel::set_delay_override(int from_type, + int from_class, + int to_type, + int to_class, + int delta_x, + int delta_y, + float delay_val) { t_override override_key; override_key.from_type = from_type; override_key.from_class = from_class; @@ -119,20 +129,22 @@ void OverrideDelayModel::dump_echo(std::string filepath) const { for (auto kv : delay_overrides_) { auto override_key = kv.first; float delay_val = kv.second; - fprintf(f, "from_type: %s to_type: %s from_pin_class: %d to_pin_class: %d delta_x: %d delta_y: %d -> delay: %g\n", + fprintf(f, + "from_type: %s to_type: %s from_pin_class: %d to_pin_class: %d delta_x: %d delta_y: %d -> delay: %g\n", device_ctx.physical_tile_types[override_key.from_type].name, - device_ctx.physical_tile_types[override_key.to_type].name, - override_key.from_class, - override_key.to_class, - override_key.delta_x, - override_key.delta_y, - delay_val); + device_ctx.physical_tile_types[override_key.to_type].name, override_key.from_class, + override_key.to_class, override_key.delta_x, override_key.delta_y, delay_val); } vtr::fclose(f); } -float OverrideDelayModel::get_delay_override(int from_type, int from_class, int to_type, int to_class, int delta_x, int delta_y) const { +float OverrideDelayModel::get_delay_override(int from_type, + int from_class, + int to_type, + int to_class, + int delta_x, + int delta_y) const { t_override key; key.from_type = from_type; key.from_class = from_class; @@ -152,7 +164,10 @@ void OverrideDelayModel::set_base_delay_model(std::unique_ptr b base_delay_model_ = std::move(base_delay_model_obj); } -float SimpleDelayModel::delay(const t_physical_tile_loc& from_loc, int /*from_pin*/, const t_physical_tile_loc& to_loc, int /*to_pin*/) const { +float SimpleDelayModel::delay(const t_physical_tile_loc& from_loc, + int /*from_pin*/, + const t_physical_tile_loc& to_loc, + int /*to_pin*/) const { int delta_x = std::abs(from_loc.x - to_loc.x); int delta_y = std::abs(from_loc.y - to_loc.y); @@ -166,9 +181,9 @@ float SimpleDelayModel::delay(const t_physical_tile_loc& from_loc, int /*from_pi */ #ifndef VTR_ENABLE_CAPNPROTO -# define DISABLE_ERROR \ - "is disable because VTR_ENABLE_CAPNPROTO=OFF." \ - "Re-compile with CMake option VTR_ENABLE_CAPNPROTO=ON to enable." +#define DISABLE_ERROR \ + "is disable because VTR_ENABLE_CAPNPROTO=OFF." \ + "Re-compile with CMake option VTR_ENABLE_CAPNPROTO=ON to enable." void DeltaDelayModel::read(const std::string& /*file*/) { VPR_THROW(VPR_ERROR_PLACE, "DeltaDelayModel::read " DISABLE_ERROR); @@ -327,15 +342,8 @@ std::unique_ptr alloc_lookups_and_delay_model(const Netlist<>& const t_direct_inf* directs, const int num_directs, bool is_flat) { - return compute_place_delay_model(placer_opts, - router_opts, - net_list, - det_routing_arch, - segment_inf, - chan_width_dist, - directs, - num_directs, - is_flat); + return compute_place_delay_model(placer_opts, router_opts, net_list, det_routing_arch, segment_inf, chan_width_dist, + directs, num_directs, is_flat); } /** @@ -372,17 +380,19 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, * In particular this approach does not accurately capture the effect * of fast carry-chain connections. */ - delay_source_to_sink = delay_model->delay({source_block_loc.x, source_block_loc.y, source_block_loc.layer}, source_block_ipin, - {sink_block_loc.x, sink_block_loc.y, sink_block_loc.layer}, sink_block_ipin); + delay_source_to_sink + = delay_model->delay({source_block_loc.x, source_block_loc.y, source_block_loc.layer}, source_block_ipin, + {sink_block_loc.x, sink_block_loc.y, sink_block_loc.layer}, sink_block_ipin); if (delay_source_to_sink < 0) { - VPR_ERROR(VPR_ERROR_PLACE, - "in comp_td_single_connection_delay: Bad delay_source_to_sink value %g from %s (at %d,%d,%d) to %s (at %d,%d,%d)\n" - "in comp_td_single_connection_delay: Delay is less than 0\n", - block_type_pin_index_to_name(physical_tile_type(source_block_loc), source_block_ipin, false).c_str(), - source_block_loc.x, source_block_loc.y, source_block_loc.layer, - block_type_pin_index_to_name(physical_tile_type(sink_block_loc), sink_block_ipin, false).c_str(), - sink_block_loc.x, sink_block_loc.y, sink_block_loc.layer, - delay_source_to_sink); + VPR_ERROR( + VPR_ERROR_PLACE, + "in comp_td_single_connection_delay: Bad delay_source_to_sink value %g from %s (at %d,%d,%d) to %s (at " + "%d,%d,%d)\n" + "in comp_td_single_connection_delay: Delay is less than 0\n", + block_type_pin_index_to_name(physical_tile_type(source_block_loc), source_block_ipin, false).c_str(), + source_block_loc.x, source_block_loc.y, source_block_loc.layer, + block_type_pin_index_to_name(physical_tile_type(sink_block_loc), sink_block_ipin, false).c_str(), + sink_block_loc.x, sink_block_loc.y, sink_block_loc.layer, delay_source_to_sink); } } @@ -390,8 +400,7 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, } ///@brief Recompute all point to point delays, updating `connection_delay` matrix. -void comp_td_connection_delays(const PlaceDelayModel* delay_model, - PlacerState& placer_state) { +void comp_td_connection_delays(const PlaceDelayModel* delay_model, PlacerState& placer_state) { const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& p_timing_ctx = placer_state.mutable_timing(); auto& block_locs = placer_state.block_locs(); diff --git a/vpr/src/place/place_delay_model.h b/vpr/src/place/place_delay_model.h index 05fba845f0a..21fe206b909 100644 --- a/vpr/src/place/place_delay_model.h +++ b/vpr/src/place/place_delay_model.h @@ -11,17 +11,17 @@ #include "router_delay_profiling.h" #ifndef __has_attribute -# define __has_attribute(x) 0 // Compatibility with non-clang compilers. +#define __has_attribute(x) 0 // Compatibility with non-clang compilers. #endif #if defined(COMPILER_GCC) && defined(NDEBUG) -# define ALWAYS_INLINE inline __attribute__((__always_inline__)) +#define ALWAYS_INLINE inline __attribute__((__always_inline__)) #elif defined(COMPILER_MSVC) && defined(NDEBUG) -# define ALWAYS_INLINE __forceinline +#define ALWAYS_INLINE __forceinline #elif __has_attribute(always_inline) -# define ALWAYS_INLINE __attribute__((always_inline)) // clang +#define ALWAYS_INLINE __attribute__((always_inline)) // clang #else -# define ALWAYS_INLINE inline +#define ALWAYS_INLINE inline #endif ///@brief Forward declarations. @@ -46,8 +46,7 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, int ipin); ///@brief Recompute all point to point delays, updating `connection_delay` matrix. -void comp_td_connection_delays(const PlaceDelayModel* delay_model, - PlacerState& placer_state); +void comp_td_connection_delays(const PlaceDelayModel* delay_model, PlacerState& placer_state); ///@brief Abstract interface to a placement delay model. class PlaceDelayModel { @@ -55,11 +54,10 @@ class PlaceDelayModel { virtual ~PlaceDelayModel() = default; ///@brief Computes place delay model. - virtual void compute( - RouterDelayProfiler& route_profiler, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - int longest_length) + virtual void compute(RouterDelayProfiler& route_profiler, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + int longest_length) = 0; /** @@ -67,7 +65,10 @@ class PlaceDelayModel { * * Either compute or read methods must be invoked before invoking delay. */ - virtual float delay(const t_physical_tile_loc& from_loc, int from_pin, const t_physical_tile_loc& to_loc, int to_pin) const = 0; + virtual float delay(const t_physical_tile_loc& from_loc, + int from_pin, + const t_physical_tile_loc& to_loc, + int to_pin) const = 0; ///@brief Dumps the delay model to an echo file. virtual void dump_echo(std::string filename) const = 0; @@ -90,30 +91,27 @@ class PlaceDelayModel { ///@brief A simple delay model based on the distance (delta) between block locations. class DeltaDelayModel : public PlaceDelayModel { public: - DeltaDelayModel(float min_cross_layer_delay, - bool is_flat) + DeltaDelayModel(float min_cross_layer_delay, bool is_flat) : cross_layer_delay_(min_cross_layer_delay) , is_flat_(is_flat) {} - DeltaDelayModel(float min_cross_layer_delay, - vtr::NdMatrix delta_delays, - bool is_flat) + DeltaDelayModel(float min_cross_layer_delay, vtr::NdMatrix delta_delays, bool is_flat) : delays_(std::move(delta_delays)) , cross_layer_delay_(min_cross_layer_delay) , is_flat_(is_flat) {} - void compute( - RouterDelayProfiler& router, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - int longest_length) override; - float delay(const t_physical_tile_loc& from_loc, int /*from_pin*/, const t_physical_tile_loc& to_loc, int /*to_pin*/) const override; + void compute(RouterDelayProfiler& router, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + int longest_length) override; + float delay(const t_physical_tile_loc& from_loc, + int /*from_pin*/, + const t_physical_tile_loc& to_loc, + int /*to_pin*/) const override; void dump_echo(std::string filepath) const override; void read(const std::string& file) override; void write(const std::string& file) const override; - const vtr::NdMatrix& delays() const { - return delays_; - } + const vtr::NdMatrix& delays() const { return delays_; } private: vtr::NdMatrix delays_; // [0..num_layers-1][0..max_dx][0..max_dy] @@ -126,18 +124,19 @@ class DeltaDelayModel : public PlaceDelayModel { class OverrideDelayModel : public PlaceDelayModel { public: - OverrideDelayModel(float min_cross_layer_delay, - bool is_flat) + OverrideDelayModel(float min_cross_layer_delay, bool is_flat) : cross_layer_delay_(min_cross_layer_delay) , is_flat_(is_flat) {} - void compute( - RouterDelayProfiler& route_profiler, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - int longest_length) override; + void compute(RouterDelayProfiler& route_profiler, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + int longest_length) override; // returns delay from the specified (x,y) to the specified (x,y) with both endpoints on layer_num and the // specified from and to pins - float delay(const t_physical_tile_loc& from_loc, int from_pin, const t_physical_tile_loc& to_loc, int to_pin) const override; + float delay(const t_physical_tile_loc& from_loc, + int from_pin, + const t_physical_tile_loc& to_loc, + int to_pin) const override; void dump_echo(std::string filepath) const override; void read(const std::string& file) override; @@ -147,7 +146,8 @@ class OverrideDelayModel : public PlaceDelayModel { void set_base_delay_model(std::unique_ptr base_delay_model); const DeltaDelayModel* base_delay_model() const; float get_delay_override(int from_type, int from_class, int to_type, int to_class, int delta_x, int delta_y) const; - void set_delay_override(int from_type, int from_class, int to_type, int to_class, int delta_x, int delta_y, float delay); + void + set_delay_override(int from_type, int from_class, int to_type, int to_class, int delta_x, int delta_y, float delay); private: std::unique_ptr base_delay_model_; @@ -160,8 +160,7 @@ class OverrideDelayModel : public PlaceDelayModel { */ bool is_flat_; - void compute_override_delay_model(RouterDelayProfiler& router, - const t_router_opts& router_opts); + void compute_override_delay_model(RouterDelayProfiler& router, const t_router_opts& router_opts); /** * @brief Structure that allows delays to be queried from the delay model. @@ -203,7 +202,8 @@ class OverrideDelayModel : public PlaceDelayModel { const short* left = reinterpret_cast(&lhs); const short* right = reinterpret_cast(&rhs); constexpr size_t NUM_T_OVERRIDE_MEMBERS = sizeof(t_override) / sizeof(short); - return std::lexicographical_compare(left, left + NUM_T_OVERRIDE_MEMBERS, right, right + NUM_T_OVERRIDE_MEMBERS); + return std::lexicographical_compare(left, left + NUM_T_OVERRIDE_MEMBERS, right, + right + NUM_T_OVERRIDE_MEMBERS); } }; @@ -221,7 +221,10 @@ class OverrideDelayModel : public PlaceDelayModel { * This requires all members of t_override are shorts and there is no * padding between members of t_override. */ - static_assert(sizeof(t_override) == sizeof(t_override::from_type) + sizeof(t_override::to_type) + sizeof(t_override::from_class) + sizeof(t_override::to_class) + sizeof(t_override::delta_x) + sizeof(t_override::delta_y), "Expect t_override to have a memory layout equivalent to an array of short (no padding)"); + static_assert(sizeof(t_override) + == sizeof(t_override::from_type) + sizeof(t_override::to_type) + sizeof(t_override::from_class) + + sizeof(t_override::to_class) + sizeof(t_override::delta_x) + sizeof(t_override::delta_y), + "Expect t_override to have a memory layout equivalent to an array of short (no padding)"); static_assert(sizeof(t_override::from_type) == sizeof(short), "Expect all t_override data members to be shorts"); static_assert(sizeof(t_override::to_type) == sizeof(short), "Expect all t_override data members to be shorts"); static_assert(sizeof(t_override::from_class) == sizeof(short), "Expect all t_override data members to be shorts"); @@ -236,12 +239,14 @@ class SimpleDelayModel : public PlaceDelayModel { public: SimpleDelayModel() {} - void compute( - RouterDelayProfiler& router, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - int longest_length) override; - float delay(const t_physical_tile_loc& from_loc, int /*from_pin*/, const t_physical_tile_loc& to_loc, int /*to_pin*/) const override; + void compute(RouterDelayProfiler& router, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + int longest_length) override; + float delay(const t_physical_tile_loc& from_loc, + int /*from_pin*/, + const t_physical_tile_loc& to_loc, + int /*to_pin*/) const override; void dump_echo(std::string /*filepath*/) const override {} void read(const std::string& /*file*/) override {} diff --git a/vpr/src/place/place_macro.cpp b/vpr/src/place/place_macro.cpp index 78c1a186d20..7a1d963b5cc 100644 --- a/vpr/src/place/place_macro.cpp +++ b/vpr/src/place/place_macro.cpp @@ -38,7 +38,11 @@ static vtr::vector_map f_imacro_from_iblk; /******************** Subroutine declarations ********************************/ -static void find_all_the_macro(int* num_of_macro, std::vector& pl_macro_member_blk_num_of_this_blk, std::vector& pl_macro_idirect, std::vector& pl_macro_num_members, std::vector>& pl_macro_member_blk_num); +static void find_all_the_macro(int* num_of_macro, + std::vector& pl_macro_member_blk_num_of_this_blk, + std::vector& pl_macro_idirect, + std::vector& pl_macro_num_members, + std::vector>& pl_macro_member_blk_num); static void alloc_and_load_imacro_from_iblk(const std::vector& macros); @@ -50,10 +54,16 @@ static bool net_is_driven_by_direct(ClusterNetId clb_net); static void validate_macros(const std::vector& macros); -static bool try_combine_macros(std::vector>& pl_macro_member_blk_num, int matching_macro, int latest_macro); +static bool try_combine_macros(std::vector>& pl_macro_member_blk_num, + int matching_macro, + int latest_macro); /******************** Subroutine definitions *********************************/ -static void find_all_the_macro(int* num_of_macro, std::vector& pl_macro_member_blk_num_of_this_blk, std::vector& pl_macro_idirect, std::vector& pl_macro_num_members, std::vector>& pl_macro_member_blk_num) { +static void find_all_the_macro(int* num_of_macro, + std::vector& pl_macro_member_blk_num_of_this_blk, + std::vector& pl_macro_idirect, + std::vector& pl_macro_num_members, + std::vector>& pl_macro_member_blk_num) { /* Compute required size: * * Go through all the pins with possible direct connections in * * f_idirect_from_blk_pin. Count the number of heads (which is the same * @@ -61,8 +71,7 @@ static void find_all_the_macro(int* num_of_macro, std::vector& p * Head - blocks with to_pin OPEN and from_pin connected * * Tail - blocks with to_pin connected and from_pin OPEN */ - int from_iblk_pin, to_iblk_pin, from_idirect, to_idirect, - from_src_or_sink, to_src_or_sink; + int from_iblk_pin, to_iblk_pin, from_idirect, to_idirect, from_src_or_sink, to_src_or_sink; ClusterNetId to_net_id, from_net_id, next_net_id, curr_net_id; ClusterBlockId next_blk_id; int num_blk_pins, num_macro; @@ -96,8 +105,7 @@ static void find_all_the_macro(int* num_of_macro, std::vector& p // head blocks. if (to_src_or_sink == SINK && to_idirect != OPEN && (to_net_id == ClusterNetId::INVALID() - || (is_constant_clb_net(to_net_id) - && !net_is_driven_by_direct(to_net_id)))) { + || (is_constant_clb_net(to_net_id) && !net_is_driven_by_direct(to_net_id)))) { for (from_iblk_pin = 0; from_iblk_pin < num_blk_pins; from_iblk_pin++) { int from_physical_pin = get_physical_pin(physical_tile, logical_block, from_iblk_pin); @@ -109,7 +117,8 @@ static void find_all_the_macro(int* num_of_macro, std::vector& p // // The output SOURCE (from_pin) of a true head macro will: // * drive another block with the same direct connection - if (from_src_or_sink == SOURCE && to_idirect == from_idirect && from_net_id != ClusterNetId::INVALID()) { + if (from_src_or_sink == SOURCE && to_idirect == from_idirect + && from_net_id != ClusterNetId::INVALID()) { // Mark down that this is the first block in the macro pl_macro_member_blk_num_of_this_blk[0] = blk_id; pl_macro_idirect[num_macro] = to_idirect; @@ -134,7 +143,8 @@ static void find_all_the_macro(int* num_of_macro, std::vector& p // Assume that the from_iblk_pin index is the same for the next block VTR_ASSERT(f_idirect_from_blk_pin[physical_tile->index][from_physical_pin] == from_idirect - && f_direct_type_from_blk_pin[physical_tile->index][from_physical_pin] == SOURCE); + && f_direct_type_from_blk_pin[physical_tile->index][from_physical_pin] + == SOURCE); next_net_id = cluster_ctx.clb_nlist.block_net(next_blk_id, from_iblk_pin); // Mark down this block as a member of the macro @@ -188,7 +198,9 @@ static void find_all_the_macro(int* num_of_macro, std::vector& p *num_of_macro = num_macro; } -static bool try_combine_macros(std::vector>& pl_macro_member_blk_num, int matching_macro, int latest_macro) { +static bool try_combine_macros(std::vector>& pl_macro_member_blk_num, + int matching_macro, + int latest_macro) { /* This function takes two placement macro ids which have a common cluster block * or more in between. The function then tries to find if the two macros could * be combined together to form a larger macro. If it's impossible to combine @@ -327,8 +339,7 @@ std::vector alloc_and_load_placement_macros(t_direct_inf* directs, i std::vector pl_macro_member_blk_num_of_this_blk(cluster_ctx.clb_nlist.blocks().size()); /* Sets up the required variables. */ - alloc_and_load_idirect_from_blk_pin(directs, num_directs, - &f_idirect_from_blk_pin, &f_direct_type_from_blk_pin); + alloc_and_load_idirect_from_blk_pin(directs, num_directs, &f_idirect_from_blk_pin, &f_direct_type_from_blk_pin); /* Compute required size: * * Go through all the pins with possible direct connections in * @@ -337,8 +348,8 @@ std::vector alloc_and_load_placement_macros(t_direct_inf* directs, i * Head - blocks with to_pin OPEN and from_pin connected * * Tail - blocks with to_pin connected and from_pin OPEN */ num_macro = 0; - find_all_the_macro(&num_macro, pl_macro_member_blk_num_of_this_blk, - pl_macro_idirect, pl_macro_num_members, pl_macro_member_blk_num); + find_all_the_macro(&num_macro, pl_macro_member_blk_num_of_this_blk, pl_macro_idirect, pl_macro_num_members, + pl_macro_member_blk_num); /* Allocate the memories for the macro. */ std::vector macros(num_macro); @@ -449,12 +460,9 @@ static void write_place_macros(std::string filename, const std::vectormembers.size(); ++imember) { const t_pl_macro_member* macro_memb = ¯o->members[imember]; - fprintf(f, "Block_Id: %zu (%s), x_offset: %d, y_offset: %d, z_offset: %d\n", - size_t(macro_memb->blk_index), - cluster_ctx.clb_nlist.block_name(macro_memb->blk_index).c_str(), - macro_memb->offset.x, - macro_memb->offset.y, - macro_memb->offset.sub_tile); + fprintf(f, "Block_Id: %zu (%s), x_offset: %d, y_offset: %d, z_offset: %d\n", size_t(macro_memb->blk_index), + cluster_ctx.clb_nlist.block_name(macro_memb->blk_index).c_str(), macro_memb->offset.x, + macro_memb->offset.y, macro_memb->offset.sub_tile); } fprintf(f, "\n"); } @@ -531,7 +539,8 @@ static void validate_macros(const std::vector& macros) { if (blk_macro_cnt > 1) { std::stringstream msg; msg << "Block #" << size_t(blk_id) << " '" << cluster_ctx.clb_nlist.block_name(blk_id) << "'" - << " appears in " << blk_macro_cnt << " placement macros (should appear in at most one). Related Macros:\n"; + << " appears in " << blk_macro_cnt + << " placement macros (should appear in at most one). Related Macros:\n"; for (auto iter = range.first; iter != range.second; ++iter) { int imacro = iter->second; diff --git a/vpr/src/place/place_timing_update.cpp b/vpr/src/place/place_timing_update.cpp index d558f386c4b..7dfa5f80c81 100644 --- a/vpr/src/place/place_timing_update.cpp +++ b/vpr/src/place/place_timing_update.cpp @@ -15,8 +15,7 @@ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, ClusterNetId net, int ipin); -static double sum_td_net_cost(ClusterNetId net, - PlacerState& placer_state); +static double sum_td_net_cost(ClusterNetId net, PlacerState& placer_state); static double sum_td_costs(const PlacerState& placer_state); @@ -50,14 +49,8 @@ void initialize_timing_info(const PlaceCritParams& crit_params, } //Perform first time update for all timing related classes - perform_full_timing_update(crit_params, - delay_model, - criticalities, - setup_slacks, - pin_timing_invalidator, - timing_info, - costs, - placer_state); + perform_full_timing_update(crit_params, delay_model, criticalities, setup_slacks, pin_timing_invalidator, + timing_info, costs, placer_state); //Don't warn again about unconstrained nodes again during placement timing_info->set_warn_unconstrained(false); @@ -90,18 +83,10 @@ void perform_full_timing_update(const PlaceCritParams& crit_params, /* Update all timing related classes. */ criticalities->enable_update(); setup_slacks->enable_update(); - update_timing_classes(crit_params, - timing_info, - criticalities, - setup_slacks, - pin_timing_invalidator, - placer_state); + update_timing_classes(crit_params, timing_info, criticalities, setup_slacks, pin_timing_invalidator, placer_state); /* Update the timing cost with new connection criticalities. */ - update_timing_cost(delay_model, - criticalities, - placer_state, - &costs->timing_cost); + update_timing_cost(delay_model, criticalities, placer_state, &costs->timing_cost); /* Commit the setup slacks since they are updated. */ commit_setup_slacks(setup_slacks, placer_state); @@ -191,8 +176,7 @@ void update_timing_cost(const PlaceDelayModel* delay_model, * rejected, so for efficiency reasons, this routine is not called if the slacks are * rejected in the end. For more detailed info, see the try_swap() routine. */ -void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks, - PlacerState& placer_state) { +void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks, PlacerState& placer_state) { const auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; auto& connection_setup_slack = placer_state.mutable_timing().connection_setup_slack; @@ -217,8 +201,7 @@ void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks, * the same as the values in `connection_setup_slack` without running commit_setup_slacks(). * For more detailed info, see the try_swap() routine. */ -bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks, - const PlacerState& placer_state) { +bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks, const PlacerState& placer_state) { const auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; const auto& connection_setup_slack = placer_state.timing().connection_setup_slack; @@ -270,12 +253,14 @@ void update_td_costs(const PlaceDelayModel* delay_model, vtr::Timer timer; auto clb_pins_modified = place_crit.pins_with_modified_criticality(); for (ClusterPinId clb_pin : clb_pins_modified) { - if (clb_nlist.pin_type(clb_pin) == PinType::DRIVER) continue; + if (clb_nlist.pin_type(clb_pin) == PinType::DRIVER) + continue; ClusterNetId clb_net = clb_nlist.pin_net(clb_pin); VTR_ASSERT_SAFE(clb_net); - if (cluster_ctx.clb_nlist.net_is_ignored(clb_net)) continue; + if (cluster_ctx.clb_nlist.net_is_ignored(clb_net)) + continue; int ipin = clb_nlist.pin_net_index(clb_pin); VTR_ASSERT_SAFE(ipin >= 1 && ipin < int(clb_nlist.net_pins(clb_net).size())); @@ -328,7 +313,8 @@ void comp_td_costs(const PlaceDelayModel* delay_model, auto& net_timing_cost = p_timing_ctx.net_timing_cost; for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { - if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) continue; + if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) + continue; for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net_id).size(); ipin++) { float conn_timing_cost = comp_td_connection_cost(delay_model, place_crit, placer_state, net_id, ipin); @@ -359,8 +345,9 @@ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, VTR_ASSERT_SAFE_MSG(ipin > 0, "Shouldn't be calculating connection timing cost for driver pins"); - VTR_ASSERT_SAFE_MSG(p_timing_ctx.connection_delay[net][ipin] == comp_td_single_connection_delay(delay_model, block_locs, net, ipin), - "Connection delays should already be updated"); + VTR_ASSERT_SAFE_MSG( + p_timing_ctx.connection_delay[net][ipin] == comp_td_single_connection_delay(delay_model, block_locs, net, ipin), + "Connection delays should already be updated"); double conn_timing_cost = place_crit.criticality(net, ipin) * p_timing_ctx.connection_delay[net][ipin]; @@ -374,8 +361,7 @@ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, } ///@brief Returns the timing cost of the specified 'net' based on the values in connection_timing_cost. -static double sum_td_net_cost(ClusterNetId net, - PlacerState& placer_state) { +static double sum_td_net_cost(ClusterNetId net, PlacerState& placer_state) { const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& p_timing_ctx = placer_state.timing(); auto& connection_timing_cost = p_timing_ctx.connection_timing_cost; diff --git a/vpr/src/place/place_timing_update.h b/vpr/src/place/place_timing_update.h index 7944c4a7552..14ec8034027 100644 --- a/vpr/src/place/place_timing_update.h +++ b/vpr/src/place/place_timing_update.h @@ -59,9 +59,7 @@ void comp_td_costs(const PlaceDelayModel* delay_model, * @brief Commit all the setup slack values from the PlacerSetupSlacks * class to `connection_setup_slack`. */ -void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks, - PlacerState& placer_state); +void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks, PlacerState& placer_state); ///@brief Verify that the values in `connection_setup_slack` matches PlacerSetupSlacks. -bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks, - const PlacerState& placer_state); +bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks, const PlacerState& placer_state); diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index df96e911d37..9432577314d 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -17,8 +17,7 @@ */ static GridBlock init_grid_blocks(); -void init_placement_context(vtr::vector_map& block_locs, - GridBlock& grid_blocks) { +void init_placement_context(vtr::vector_map& block_locs, GridBlock& grid_blocks) { auto& cluster_ctx = g_vpr_ctx.clustering(); /* Initialize the lookup of CLB block positions */ @@ -55,7 +54,9 @@ void t_placer_costs::update_norm_factors() { timing_cost_norm = std::min(1 / timing_cost, MAX_INV_TIMING_COST); } else { VTR_ASSERT_SAFE(place_algorithm == BOUNDING_BOX_PLACE); - bb_cost_norm = 1 / bb_cost; //Updating the normalization factor in bounding box mode since the cost in this mode is determined after normalizing the wirelength cost + bb_cost_norm + = 1 + / bb_cost; //Updating the normalization factor in bounding box mode since the cost in this mode is determined after normalizing the wirelength cost } } @@ -216,8 +217,8 @@ void t_annealing_state::update_crit_exponent(const t_placer_opts& placer_opts) { float scale = 1 - (rlim - FINAL_RLIM) * INVERSE_DELTA_RLIM; /* Apply the scaling factor on crit_exponent. */ - crit_exponent = scale * (placer_opts.td_place_exp_last - placer_opts.td_place_exp_first) - + placer_opts.td_place_exp_first; + crit_exponent + = scale * (placer_opts.td_place_exp_last - placer_opts.td_place_exp_first) + placer_opts.td_place_exp_first; } void t_annealing_state::update_move_lim(float success_target, float success_rate) { @@ -273,7 +274,6 @@ double get_std_dev(int n, double sum_x_squared, double av_x) { return (std_dev > 0.) ? sqrt(std_dev) : 0.; } - void alloc_and_load_legal_placement_locations(std::vector>>& legal_pos) { auto& device_ctx = g_vpr_ctx.device(); @@ -297,7 +297,8 @@ void alloc_and_load_legal_placement_locations(std::vectorindex; int isub_tile = sub_tile.index; t_pl_loc temp_loc; @@ -373,7 +374,8 @@ bool macro_can_be_placed(const t_pl_macro& pl_macro, // Then check whether the location could still accommodate more blocks // Also check whether the member position is valid, and the member_z is allowed at that location on the grid if (member_pos.x < int(device_ctx.grid.width()) && member_pos.y < int(device_ctx.grid.height()) - && is_tile_compatible(device_ctx.grid.get_physical_type({member_pos.x, member_pos.y, member_pos.layer}), block_type) + && is_tile_compatible(device_ctx.grid.get_physical_type({member_pos.x, member_pos.y, member_pos.layer}), + block_type) && grid_blocks.block_at_location(member_pos) == ClusterBlockId::INVALID()) { // Can still accommodate blocks here, check the next position continue; diff --git a/vpr/src/place/place_util.h b/vpr/src/place/place_util.h index 9c3714b0488..70756a58b65 100644 --- a/vpr/src/place/place_util.h +++ b/vpr/src/place/place_util.h @@ -312,8 +312,7 @@ class t_placer_statistics { * * Initialize both of them to empty states. */ -void init_placement_context(vtr::vector_map& block_locs, - GridBlock& grid_blocks); +void init_placement_context(vtr::vector_map& block_locs, GridBlock& grid_blocks); /** * @brief Get the initial limit for inner loop block move attempt limit. @@ -356,7 +355,8 @@ inline bool is_loc_on_chip(t_physical_tile_loc loc) { int y = loc.y; int layer_num = loc.layer_num; //return false if the location is not within the chip - return (layer_num >= 0 && layer_num < int(grid.get_num_layers()) && x >= 0 && x < int(grid.width()) && y >= 0 && y < int(grid.height())); + return (layer_num >= 0 && layer_num < int(grid.get_num_layers()) && x >= 0 && x < int(grid.width()) && y >= 0 + && y < int(grid.height())); } /** diff --git a/vpr/src/place/placer_breakpoint.cpp b/vpr/src/place/placer_breakpoint.cpp index b576bc64f04..5384b42f093 100644 --- a/vpr/src/place/placer_breakpoint.cpp +++ b/vpr/src/place/placer_breakpoint.cpp @@ -3,32 +3,38 @@ #ifdef VTR_ENABLE_DEBUG_LOGGING //map of the available move types and their corresponding type number -std::map available_move_types = { - {0, "Uniform"}}; +std::map available_move_types = {{0, "Uniform"}}; -# ifndef NO_GRAPHICS +#ifndef NO_GRAPHICS //transforms the vector moved_blocks to a vector of ints and adds it in glob_breakpoint_state void transform_blocks_affected(const t_pl_blocks_to_be_moved& blocksAffected) { get_bp_state_globals()->get_glob_breakpoint_state()->blocks_affected_by_move.clear(); for (size_t i = 0; i < blocksAffected.moved_blocks.size(); i++) { //size_t conversion is required since block_num is of type ClusterBlockId and can't be cast to an int. And this vector has to be of type int to be recognized in expr_eval class - get_bp_state_globals()->get_glob_breakpoint_state()->blocks_affected_by_move.push_back(size_t(blocksAffected.moved_blocks[i].block_num)); + get_bp_state_globals()->get_glob_breakpoint_state()->blocks_affected_by_move.push_back( + size_t(blocksAffected.moved_blocks[i].block_num)); } } -void stop_placement_and_check_breakpoints(t_pl_blocks_to_be_moved& blocks_affected, e_move_result move_outcome, double delta_c, double bb_delta_c, double timing_delta_c) { +void stop_placement_and_check_breakpoints(t_pl_blocks_to_be_moved& blocks_affected, + e_move_result move_outcome, + double delta_c, + double bb_delta_c, + double timing_delta_c) { t_draw_state* draw_state = get_draw_state_vars(); if (draw_state->list_of_breakpoints.size() != 0) { //update current information transform_blocks_affected(blocks_affected); get_bp_state_globals()->get_glob_breakpoint_state()->move_num++; - get_bp_state_globals()->get_glob_breakpoint_state()->from_block = size_t(blocks_affected.moved_blocks[0].block_num); + get_bp_state_globals()->get_glob_breakpoint_state()->from_block + = size_t(blocks_affected.moved_blocks[0].block_num); //check for breakpoints set_placer_breakpoint_reached(check_for_breakpoints(true)); // the passed flag is true as we are in the placer if (placer_breakpoint_reached()) - breakpoint_info_window(get_bp_state_globals()->get_glob_breakpoint_state()->bp_description, *get_bp_state_globals()->get_glob_breakpoint_state(), true); + breakpoint_info_window(get_bp_state_globals()->get_glob_breakpoint_state()->bp_description, + *get_bp_state_globals()->get_glob_breakpoint_state(), true); } else set_placer_breakpoint_reached(false); @@ -41,13 +47,14 @@ void stop_placement_and_check_breakpoints(t_pl_blocks_to_be_moved& blocks_affect else msg += vtr::string_fmt(", Aborted"); - msg += vtr::string_fmt(", Delta_cost: %1.6f (bb_delta_cost= %1.5f , timing_delta_c= %6.1e)", delta_c, bb_delta_c, timing_delta_c); + msg += vtr::string_fmt(", Delta_cost: %1.6f (bb_delta_cost= %1.5f , timing_delta_c= %6.1e)", delta_c, + bb_delta_c, timing_delta_c); highlight_moved_block_and_its_terminals(blocks_affected); update_screen(ScreenUpdatePriority::MAJOR, msg.c_str(), PLACEMENT, nullptr); } } -# endif //NO_GRAPHICS +#endif //NO_GRAPHICS #endif //VTR_ENABLE_DEBUG_LOGGING diff --git a/vpr/src/place/placer_breakpoint.h b/vpr/src/place/placer_breakpoint.h index c01ef77450c..47561c934b0 100644 --- a/vpr/src/place/placer_breakpoint.h +++ b/vpr/src/place/placer_breakpoint.h @@ -13,7 +13,11 @@ void transform_blocks_affected(const t_pl_blocks_to_be_moved& blocksAffected); //checks the breakpoint and see whether one of them was reached and pause place,emt accordingly -void stop_placement_and_check_breakpoints(t_pl_blocks_to_be_moved& blocks_affected, e_move_result move_outcome, double delta_c, double bb_delta_c, double timing_delta_c); +void stop_placement_and_check_breakpoints(t_pl_blocks_to_be_moved& blocks_affected, + e_move_result move_outcome, + double delta_c, + double bb_delta_c, + double timing_delta_c); #endif diff --git a/vpr/src/place/placer_state.h b/vpr/src/place/placer_state.h index 97941f639b1..af60816a5ae 100644 --- a/vpr/src/place/placer_state.h +++ b/vpr/src/place/placer_state.h @@ -111,7 +111,7 @@ struct PlacerMoveContext : public Context { // Scratch vectors that are used by different directed moves for temporary calculations (allocated here to save runtime) // These vectors will grow up with the net size as it is mostly used to save coords of the net pins or net bb edges - // Given that placement moves involve operations on each coordinate independently, we chose to + // Given that placement moves involve operations on each coordinate independently, we chose to // utilize a Struct of Arrays (SoA) rather than an Array of Struct (AoS). std::vector X_coord; std::vector Y_coord; @@ -145,14 +145,20 @@ class PlacerState : public Context { inline const PlacerMoveContext& move() const { return move_; } inline PlacerMoveContext& mutable_move() { return move_; } - inline const vtr::vector_map& block_locs() const { return blk_loc_registry_.block_locs(); } - inline vtr::vector_map& mutable_block_locs() { return blk_loc_registry_.mutable_block_locs(); } + inline const vtr::vector_map& block_locs() const { + return blk_loc_registry_.block_locs(); + } + inline vtr::vector_map& mutable_block_locs() { + return blk_loc_registry_.mutable_block_locs(); + } inline const GridBlock& grid_blocks() const { return blk_loc_registry_.grid_blocks(); } inline GridBlock& mutable_grid_blocks() { return blk_loc_registry_.mutable_grid_blocks(); } inline const vtr::vector_map& physical_pins() const { return blk_loc_registry_.physical_pins(); } - inline vtr::vector_map& mutable_physical_pins() { return blk_loc_registry_.mutable_physical_pins(); } + inline vtr::vector_map& mutable_physical_pins() { + return blk_loc_registry_.mutable_physical_pins(); + } inline const BlkLocRegistry& blk_loc_registry() const { return blk_loc_registry_; } inline BlkLocRegistry& mutable_blk_loc_registry() { return blk_loc_registry_; } diff --git a/vpr/src/place/simpleRL_move_generator.cpp b/vpr/src/place/simpleRL_move_generator.cpp index 62a6d933bf7..50200941b23 100644 --- a/vpr/src/place/simpleRL_move_generator.cpp +++ b/vpr/src/place/simpleRL_move_generator.cpp @@ -9,7 +9,6 @@ #include #include - /* File-scope routines */ //a scaled and clipped exponential function static float scaled_clipped_exp(float x) { return std::exp(std::min(1000 * x, float(3.0))); } @@ -25,7 +24,8 @@ e_create_move SimpleRLMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) { proposed_action = karmed_bandit_agent->propose_action(); - return all_moves[proposed_action.move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); + return all_moves[proposed_action.move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, + criticalities); } void SimpleRLMoveGenerator::process_outcome(double reward, e_reward_function reward_fun) { @@ -183,22 +183,23 @@ void KArmedBanditAgent::set_step(float gamma, int move_lim) { } } -int KArmedBanditAgent::agent_to_phy_blk_type(const int idx) { - return action_logical_blk_type_.at(idx); -} +int KArmedBanditAgent::agent_to_phy_blk_type(const int idx) { return action_logical_blk_type_.at(idx); } /* * * * * E-greedy agent implementation * * * * */ -EpsilonGreedyAgent::EpsilonGreedyAgent(std::vector available_moves, e_agent_space agent_space, float epsilon) +EpsilonGreedyAgent::EpsilonGreedyAgent(std::vector available_moves, + e_agent_space agent_space, + float epsilon) : KArmedBanditAgent(std::move(available_moves), agent_space) { set_epsilon(epsilon); init_q_scores_(); } EpsilonGreedyAgent::~EpsilonGreedyAgent() { - if (agent_info_file_) vtr::fclose(agent_info_file_); + if (agent_info_file_) + vtr::fclose(agent_info_file_); } void EpsilonGreedyAgent::init_q_scores_() { @@ -236,11 +237,11 @@ t_propose_action EpsilonGreedyAgent::propose_action() { last_action_ = action_type_q_pos; } - t_propose_action proposed_action{action_to_move_type_(last_action_), - action_to_blk_type_(last_action_)}; + t_propose_action proposed_action{action_to_move_type_(last_action_), action_to_blk_type_(last_action_)}; //Check the move type to be a valid move - VTR_ASSERT_SAFE(std::find(available_moves_.begin(), available_moves_.end(), proposed_action.move_type) != available_moves_.end()); + VTR_ASSERT_SAFE(std::find(available_moves_.begin(), available_moves_.end(), proposed_action.move_type) + != available_moves_.end()); return proposed_action; } @@ -272,7 +273,8 @@ SoftmaxAgent::SoftmaxAgent(std::vector available_moves, e_agent_spa } SoftmaxAgent::~SoftmaxAgent() { - if (agent_info_file_) vtr::fclose(agent_info_file_); + if (agent_info_file_) + vtr::fclose(agent_info_file_); } void SoftmaxAgent::init_q_scores_() { @@ -310,11 +312,11 @@ t_propose_action SoftmaxAgent::propose_action() { //To take care that the last element in cumm_action_prob_ might be less than 1 by a small value last_action_ = std::min((size_t)action_type_q_pos, num_available_actions_ - 1); - t_propose_action proposed_action{action_to_move_type_(last_action_), - action_to_blk_type_(last_action_)}; + t_propose_action proposed_action{action_to_move_type_(last_action_), action_to_blk_type_(last_action_)}; //Check the move type to be a valid move - VTR_ASSERT_SAFE(std::find(available_moves_.begin(), available_moves_.end(), proposed_action.move_type) != available_moves_.end()); + VTR_ASSERT_SAFE(std::find(available_moves_.begin(), available_moves_.end(), proposed_action.move_type) + != available_moves_.end()); return proposed_action; } diff --git a/vpr/src/place/simpleRL_move_generator.h b/vpr/src/place/simpleRL_move_generator.h index 1f33684d2f8..90094cb5964 100644 --- a/vpr/src/place/simpleRL_move_generator.h +++ b/vpr/src/place/simpleRL_move_generator.h @@ -84,14 +84,14 @@ class KArmedBanditAgent { inline int agent_to_phy_blk_type(int idx); protected: - float exp_alpha_ = -1; //Step size for q_ updates (< 0 implies use incremental average) - std::vector available_moves_; //All available moves from which the agent can choose - size_t num_available_types_; //Number of block types that exist in the netlist. Agent may not choose the block type. - size_t num_available_actions_; //Total number of available actions - bool propose_blk_type_ = false; //Check if agent should propose both move and block type or only move type - std::vector num_action_chosen_; //Number of times each arm has been pulled (n) - std::vector q_; //Estimated value of each arm (Q) - size_t last_action_; //type of the last action (move type) proposed + float exp_alpha_ = -1; //Step size for q_ updates (< 0 implies use incremental average) + std::vector available_moves_; //All available moves from which the agent can choose + size_t num_available_types_; //Number of block types that exist in the netlist. Agent may not choose the block type. + size_t num_available_actions_; //Total number of available actions + bool propose_blk_type_ = false; //Check if agent should propose both move and block type or only move type + std::vector num_action_chosen_; //Number of times each arm has been pulled (n) + std::vector q_; //Estimated value of each arm (Q) + size_t last_action_; //type of the last action (move type) proposed /* Ratios of the average runtime to calculate each move type */ /* These ratios are useful for different reward functions * * The vector is calculated by averaging many runs on different circuits */ @@ -124,7 +124,8 @@ class EpsilonGreedyAgent : public KArmedBanditAgent { EpsilonGreedyAgent(std::vector available_moves, e_agent_space agent_space, float epsilon); ~EpsilonGreedyAgent() override; - t_propose_action propose_action() override; //Returns the type of the next action as well as the block type the agent wishes to perform + t_propose_action propose_action() + override; //Returns the type of the next action as well as the block type the agent wishes to perform public: /** @@ -163,8 +164,8 @@ class SoftmaxAgent : public KArmedBanditAgent { SoftmaxAgent(std::vector available_moves, e_agent_space agent_space); ~SoftmaxAgent() override; - - t_propose_action propose_action() override; //Returns the type of the next action as well as the block type the agent wishes to perform + t_propose_action propose_action() + override; //Returns the type of the next action as well as the block type the agent wishes to perform private: /** @@ -188,7 +189,8 @@ class SoftmaxAgent : public KArmedBanditAgent { std::vector exp_q_; //The clipped and scaled exponential of the estimated Q value for each action std::vector action_prob_; //The probability of choosing each action std::vector cumm_action_prob_; //The accumulative probability of choosing each action - std::vector block_type_ratio_; //Fraction of total netlist blocks for each block type (size: [0..agent_blk_type-1]) + std::vector + block_type_ratio_; //Fraction of total netlist blocks for each block type (size: [0..agent_blk_type-1]) }; /** @@ -200,8 +202,9 @@ class SoftmaxAgent : public KArmedBanditAgent { */ class SimpleRLMoveGenerator : public MoveGenerator { private: - vtr::vector> all_moves; // list of pointers to all move generators (the different move types) - std::unique_ptr karmed_bandit_agent; // a pointer to the specific agent used (e.g. Softmax) + vtr::vector> + all_moves; // list of pointers to all move generators (the different move types) + std::unique_ptr karmed_bandit_agent; // a pointer to the specific agent used (e.g. Softmax) public: // constructor using a pointer to the agent used @@ -215,7 +218,8 @@ class SimpleRLMoveGenerator : public MoveGenerator { * @param is_multi_layer A boolean value to indicate whether the placement is multi-layer or not */ template::value || std::is_same::value>::type> + class = typename std::enable_if::value + || std::is_same::value>::type> explicit SimpleRLMoveGenerator(PlacerState& placer_state, e_reward_function reward_function, std::unique_ptr& agent, @@ -251,11 +255,13 @@ SimpleRLMoveGenerator::SimpleRLMoveGenerator(PlacerState& placer_state, all_moves[e_move_type::CENTROID] = std::make_unique(placer_state, reward_function); all_moves[e_move_type::W_CENTROID] = std::make_unique(placer_state, reward_function); all_moves[e_move_type::W_MEDIAN] = std::make_unique(placer_state, reward_function); - all_moves[e_move_type::CRIT_UNIFORM] = std::make_unique(placer_state, reward_function); - all_moves[e_move_type::FEASIBLE_REGION] = std::make_unique(placer_state, reward_function); + all_moves[e_move_type::CRIT_UNIFORM] + = std::make_unique(placer_state, reward_function); + all_moves[e_move_type::FEASIBLE_REGION] + = std::make_unique(placer_state, reward_function); if (noc_attraction_weight > 0.0f) { - all_moves[e_move_type::NOC_ATTRACTION_CENTROID] = std::make_unique(placer_state, reward_function, - noc_attraction_weight, high_fanout_thresh); + all_moves[e_move_type::NOC_ATTRACTION_CENTROID] = std::make_unique( + placer_state, reward_function, noc_attraction_weight, high_fanout_thresh); } karmed_bandit_agent = std::move(agent); diff --git a/vpr/src/place/static_move_generator.cpp b/vpr/src/place/static_move_generator.cpp index e48214f8d6a..4d1ee85e896 100644 --- a/vpr/src/place/static_move_generator.cpp +++ b/vpr/src/place/static_move_generator.cpp @@ -23,8 +23,10 @@ StaticMoveGenerator::StaticMoveGenerator(PlacerState& placer_state, all_moves[e_move_type::CENTROID] = std::make_unique(placer_state, reward_function); all_moves[e_move_type::W_CENTROID] = std::make_unique(placer_state, reward_function); all_moves[e_move_type::W_MEDIAN] = std::make_unique(placer_state, reward_function); - all_moves[e_move_type::CRIT_UNIFORM] = std::make_unique(placer_state, reward_function); - all_moves[e_move_type::FEASIBLE_REGION] = std::make_unique(placer_state, reward_function); + all_moves[e_move_type::CRIT_UNIFORM] + = std::make_unique(placer_state, reward_function); + all_moves[e_move_type::FEASIBLE_REGION] + = std::make_unique(placer_state, reward_function); initialize_move_prob(move_probs); } @@ -33,7 +35,7 @@ void StaticMoveGenerator::initialize_move_prob(const vtr::vectorpropose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); + return all_moves[move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, + criticalities); } } - VTR_ASSERT_MSG(false, vtr::string_fmt("During static probability move selection, random number (%g) exceeded total expected probability (%g)", rand_num, total_prob).c_str()); + VTR_ASSERT_MSG( + false, + vtr::string_fmt( + "During static probability move selection, random number (%g) exceeded total expected probability (%g)", + rand_num, total_prob) + .c_str()); //Unreachable proposed_action.move_type = e_move_type::INVALID_MOVE; diff --git a/vpr/src/place/static_move_generator.h b/vpr/src/place/static_move_generator.h index 997782a6cd3..fb9c5e547ac 100644 --- a/vpr/src/place/static_move_generator.h +++ b/vpr/src/place/static_move_generator.h @@ -10,9 +10,10 @@ */ class StaticMoveGenerator : public MoveGenerator { private: - vtr::vector> all_moves; // list of pointers to the different available move type generators - vtr::vector cumm_move_probs; // accumulative probabilities for different move types - float total_prob; // sum of the input probabilities from the use + vtr::vector> + all_moves; // list of pointers to the different available move type generators + vtr::vector cumm_move_probs; // accumulative probabilities for different move types + float total_prob; // sum of the input probabilities from the use void initialize_move_prob(const vtr::vector& move_probs); diff --git a/vpr/src/place/timing_place.cpp b/vpr/src/place/timing_place.cpp index 1e4985b7852..bd4fc3d7e8d 100644 --- a/vpr/src/place/timing_place.cpp +++ b/vpr/src/place/timing_place.cpp @@ -16,11 +16,11 @@ #include "timing_info.h" ///@brief Allocates space for the timing_place_crit_ data structure. -PlacerCriticalities::PlacerCriticalities(const ClusteredNetlist& clb_nlist, const ClusteredPinAtomPinsLookup& netlist_pin_lookup) +PlacerCriticalities::PlacerCriticalities(const ClusteredNetlist& clb_nlist, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup) : clb_nlist_(clb_nlist) , pin_lookup_(netlist_pin_lookup) - , timing_place_crit_(make_net_pins_matrix(clb_nlist_, std::numeric_limits::quiet_NaN())) { -} + , timing_place_crit_(make_net_pins_matrix(clb_nlist_, std::numeric_limits::quiet_NaN())) {} /** * @brief Updated the criticalities in the timing_place_crit_ data structure. @@ -63,7 +63,8 @@ void PlacerCriticalities::update_criticalities(const SetupTimingInfo* timing_inf ClusterNetId clb_net = clb_nlist_.pin_net(clb_pin); int pin_index_in_net = clb_nlist_.pin_net_index(clb_pin); // Routing for placement is not flat (at least for the time being) - float clb_pin_crit = calculate_clb_net_pin_criticality(*timing_info, pin_lookup_, ParentPinId(size_t(clb_pin)), false); + float clb_pin_crit + = calculate_clb_net_pin_criticality(*timing_info, pin_lookup_, ParentPinId(size_t(clb_pin)), false); float new_crit = pow(clb_pin_crit, crit_params.crit_exponent); /* @@ -73,10 +74,15 @@ void PlacerCriticalities::update_criticalities(const SetupTimingInfo* timing_inf * If the old criticality > limit and the new criticality < limit --> remove this pin from the highly critical pins */ if (!first_time_update_criticality) { - if (new_crit > crit_params.crit_limit && timing_place_crit_[clb_net][pin_index_in_net] < crit_params.crit_limit) { + if (new_crit > crit_params.crit_limit + && timing_place_crit_[clb_net][pin_index_in_net] < crit_params.crit_limit) { place_move_ctx.highly_crit_pins.push_back(std::make_pair(clb_net, pin_index_in_net)); - } else if (new_crit < crit_params.crit_limit && timing_place_crit_[clb_net][pin_index_in_net] > crit_params.crit_limit) { - place_move_ctx.highly_crit_pins.erase(std::remove(place_move_ctx.highly_crit_pins.begin(), place_move_ctx.highly_crit_pins.end(), std::make_pair(clb_net, pin_index_in_net)), place_move_ctx.highly_crit_pins.end()); + } else if (new_crit < crit_params.crit_limit + && timing_place_crit_[clb_net][pin_index_in_net] > crit_params.crit_limit) { + place_move_ctx.highly_crit_pins.erase( + std::remove(place_move_ctx.highly_crit_pins.begin(), place_move_ctx.highly_crit_pins.end(), + std::make_pair(clb_net, pin_index_in_net)), + place_move_ctx.highly_crit_pins.end()); } } else { if (new_crit > crit_params.crit_limit) @@ -96,9 +102,7 @@ void PlacerCriticalities::update_criticalities(const SetupTimingInfo* timing_inf first_time_update_criticality = false; } -void PlacerCriticalities::set_recompute_required() { - recompute_required = true; -} +void PlacerCriticalities::set_recompute_required() { recompute_required = true; } /** * @brief Collect the cluster pins which need to be updated based on the latest timing @@ -121,7 +125,8 @@ void PlacerCriticalities::incr_update_criticalities(const SetupTimingInfo* timin //Some atom pins correspond to connections which are completely //contained within a cluster, and hence have no corresponding //clustered pin. - if (!clb_pin) continue; + if (!clb_pin) + continue; cluster_pins_with_modified_criticality_.insert(clb_pin); } @@ -146,7 +151,8 @@ void PlacerCriticalities::recompute_criticalities() { ///@brief Override the criticality of a particular connection. void PlacerCriticalities::set_criticality(ClusterNetId net_id, int ipin, float crit_val) { VTR_ASSERT_SAFE_MSG(ipin > 0, "The pin should not be a driver pin (ipin != 0)"); - VTR_ASSERT_SAFE_MSG(ipin < int(clb_nlist_.net_pins(net_id).size()), "The pin index in net should be smaller than fanout"); + VTR_ASSERT_SAFE_MSG(ipin < int(clb_nlist_.net_pins(net_id).size()), + "The pin index in net should be smaller than fanout"); timing_place_crit_[net_id][ipin] = crit_val; } @@ -162,11 +168,11 @@ PlacerCriticalities::pin_range PlacerCriticalities::pins_with_modified_criticali /**************************************/ ///@brief Allocates space for the timing_place_setup_slacks_ data structure. -PlacerSetupSlacks::PlacerSetupSlacks(const ClusteredNetlist& clb_nlist, const ClusteredPinAtomPinsLookup& netlist_pin_lookup) +PlacerSetupSlacks::PlacerSetupSlacks(const ClusteredNetlist& clb_nlist, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup) : clb_nlist_(clb_nlist) , pin_lookup_(netlist_pin_lookup) - , timing_place_setup_slacks_(make_net_pins_matrix(clb_nlist_, std::numeric_limits::quiet_NaN())) { -} + , timing_place_setup_slacks_(make_net_pins_matrix(clb_nlist_, std::numeric_limits::quiet_NaN())) {} /** * @brief Updated the setup slacks in the timing_place_setup_slacks_ data structure. @@ -224,7 +230,8 @@ void PlacerSetupSlacks::incr_update_setup_slacks(const SetupTimingInfo* timing_i //Some atom pins correspond to connections which are completely //contained within a cluster, and hence have no corresponding //clustered pin. - if (!clb_pin) continue; + if (!clb_pin) + continue; cluster_pins_with_modified_setup_slack_.insert(clb_pin); } @@ -249,7 +256,8 @@ void PlacerSetupSlacks::recompute_setup_slacks() { ///@brief Override the setup slack of a particular connection. void PlacerSetupSlacks::set_setup_slack(ClusterNetId net_id, int ipin, float slack_val) { VTR_ASSERT_SAFE_MSG(ipin > 0, "The pin should not be a driver pin (ipin != 0)"); - VTR_ASSERT_SAFE_MSG(ipin < int(clb_nlist_.net_pins(net_id).size()), "The pin index in net should be smaller than fanout"); + VTR_ASSERT_SAFE_MSG(ipin < int(clb_nlist_.net_pins(net_id).size()), + "The pin index in net should be smaller than fanout"); timing_place_setup_slacks_[net_id][ipin] = slack_val; } diff --git a/vpr/src/place/timing_place.h b/vpr/src/place/timing_place.h index 7ccf73c12f4..82316cc1279 100644 --- a/vpr/src/place/timing_place.h +++ b/vpr/src/place/timing_place.h @@ -410,7 +410,8 @@ class PlacerTimingCosts { //Shift the start indicies after the intermediate nodes size_t num_intermediate_nodes = num_nodes_up_to_level(ilevel - 1); for (ClusterNetId net : nets) { - if (nlist.net_is_ignored(net)) continue; + if (nlist.net_is_ignored(net)) + continue; net_start_indicies_[net] = net_start_indicies_[net] + num_intermediate_nodes; } @@ -444,9 +445,7 @@ class PlacerTimingCosts { * * Useful for client code operating on the cost values (e.g. difference between costs). */ - operator double() const { - return connection_cost_; - } + operator double() const { return connection_cost_; } private: PlacerTimingCosts* timing_costs_; @@ -465,9 +464,7 @@ class PlacerTimingCosts { , net_sink_costs_(net_sink_costs) {} ///@brief Indexes into the specific net pin/connection. - ConnectionProxy operator[](size_t ipin) { - return ConnectionProxy(timing_costs_, net_sink_costs_[ipin]); - } + ConnectionProxy operator[](size_t ipin) { return ConnectionProxy(timing_costs_, net_sink_costs_[ipin]); } const ConnectionProxy operator[](size_t ipin) const { return ConnectionProxy(timing_costs_, net_sink_costs_[ipin]); @@ -531,8 +528,7 @@ class PlacerTimingCosts { } //Recompute recursively - double node_cost = total_cost_recurr(left_child(inode)) - + total_cost_recurr(right_child(inode)); + double node_cost = total_cost_recurr(left_child(inode)) + total_cost_recurr(right_child(inode)); //Save intermedate cost at this node connection_costs_[inode] = node_cost; @@ -547,8 +543,7 @@ class PlacerTimingCosts { } //Recompute recursively - double node_cost = total_cost_from_scratch(left_child(inode)) - + total_cost_from_scratch(right_child(inode)); + double node_cost = total_cost_from_scratch(left_child(inode)) + total_cost_from_scratch(right_child(inode)); return node_cost; } @@ -558,13 +553,11 @@ class PlacerTimingCosts { void invalidate(double* invalidated_cost) { //Check pointer within range of internal storage - VTR_ASSERT_SAFE_MSG( - invalidated_cost >= &connection_costs_[0], - "Connection cost pointer should be after start of internal storage"); + VTR_ASSERT_SAFE_MSG(invalidated_cost >= &connection_costs_[0], + "Connection cost pointer should be after start of internal storage"); - VTR_ASSERT_SAFE_MSG( - invalidated_cost <= &connection_costs_[connection_costs_.size() - 1], - "Connection cost pointer should be before end of internal storage"); + VTR_ASSERT_SAFE_MSG(invalidated_cost <= &connection_costs_[connection_costs_.size() - 1], + "Connection cost pointer should be before end of internal storage"); size_t icost = invalidated_cost - &connection_costs_[0]; @@ -586,20 +579,15 @@ class PlacerTimingCosts { } } - VTR_ASSERT_SAFE_MSG(std::isnan(connection_costs_[0]), "Invalidating any connection should have invalidated the root"); + VTR_ASSERT_SAFE_MSG(std::isnan(connection_costs_[0]), + "Invalidating any connection should have invalidated the root"); } - size_t left_child(size_t i) const { - return 2 * i + 1; - } + size_t left_child(size_t i) const { return 2 * i + 1; } - size_t right_child(size_t i) const { - return 2 * i + 2; - } + size_t right_child(size_t i) const { return 2 * i + 2; } - size_t parent(size_t i) const { - return (i - 1) / 2; - } + size_t parent(size_t i) const { return (i - 1) / 2; } /** * @brief Returns the number of nodes in ilevel'th level. @@ -607,14 +595,10 @@ class PlacerTimingCosts { * If ilevel is negative, return 0, since the root shouldn't * be counted as a leaf node candidate. */ - size_t num_nodes_in_level(int ilevel) const { - return ilevel < 0 ? 0 : (2 << (ilevel)); - } + size_t num_nodes_in_level(int ilevel) const { return ilevel < 0 ? 0 : (2 << (ilevel)); } ///@brief Returns the total number of nodes in levels [0..ilevel] (inclusive). - size_t num_nodes_up_to_level(int ilevel) const { - return (2 << (ilevel + 1)) - 1; - } + size_t num_nodes_up_to_level(int ilevel) const { return (2 << (ilevel + 1)) - 1; } private: /** diff --git a/vpr/src/place/timing_place_lookup.cpp b/vpr/src/place/timing_place_lookup.cpp index 06fb05911a8..fbf76a8301a 100644 --- a/vpr/src/place/timing_place_lookup.cpp +++ b/vpr/src/place/timing_place_lookup.cpp @@ -36,8 +36,8 @@ //#define VERBOSE -constexpr float UNINITIALIZED_DELTA = -1; //Indicates the delta delay value has not been calculated -constexpr float EMPTY_DELTA = -2; //Indicates delta delay from/to an EMPTY block +constexpr float UNINITIALIZED_DELTA = -1; //Indicates the delta delay value has not been calculated +constexpr float EMPTY_DELTA = -2; //Indicates delta delay from/to an EMPTY block constexpr float IMPOSSIBLE_DELTA = std::numeric_limits::infinity(); //Indicates there is no valid delta delay struct t_profile_loc { @@ -57,87 +57,80 @@ struct t_profile_info { }; /*** Function Prototypes *****/ -static t_chan_width setup_chan_width(const t_router_opts& router_opts, - t_chan_width_dist chan_width_dist); - -static float route_connection_delay( - RouterDelayProfiler& route_profiler, - int from_layer_num, - int to_layer_num, - int source_x_loc, - int source_y_loc, - int sink_x_loc, - int sink_y_loc, - const t_router_opts& router_opts, - bool measure_directconnect); +static t_chan_width setup_chan_width(const t_router_opts& router_opts, t_chan_width_dist chan_width_dist); + +static float route_connection_delay(RouterDelayProfiler& route_profiler, + int from_layer_num, + int to_layer_num, + int source_x_loc, + int source_y_loc, + int sink_x_loc, + int sink_y_loc, + const t_router_opts& router_opts, + bool measure_directconnect); // Prototype for computing delta delay matrix. -typedef std::function>&, - int, - int, - int, - int, - int, - int, - int, - int, - const t_router_opts&, - bool, - const std::set&, - bool)> +typedef std::function>&, + int, + int, + int, + int, + int, + int, + int, + int, + const t_router_opts&, + bool, + const std::set&, + bool)> t_compute_delta_delay_matrix; -static void generic_compute_matrix_iterative_astar( - RouterDelayProfiler& route_profiler, - vtr::Matrix>& matrix, - int from_layer_num, - int to_layer_num, - int source_x, - int source_y, - int start_x, - int start_y, - int end_x, - int end_y, - const t_router_opts& router_opts, - bool measure_directconnect, - const std::set& allowed_types, - bool /***/); - -static void generic_compute_matrix_dijkstra_expansion( - RouterDelayProfiler& route_profiler, - vtr::Matrix>& matrix, - int from_layer_num, - int to_layer_num, - int source_x, - int source_y, - int start_x, - int start_y, - int end_x, - int end_y, - const t_router_opts& router_opts, - bool measure_directconnect, - const std::set& allowed_types, - bool is_flat); - -static vtr::NdMatrix compute_delta_delays( - RouterDelayProfiler& route_profiler, - const t_placer_opts& palcer_opts, - const t_router_opts& router_opts, - bool measure_directconnect, - size_t longest_length, - bool is_flat); +static void generic_compute_matrix_iterative_astar(RouterDelayProfiler& route_profiler, + vtr::Matrix>& matrix, + int from_layer_num, + int to_layer_num, + int source_x, + int source_y, + int start_x, + int start_y, + int end_x, + int end_y, + const t_router_opts& router_opts, + bool measure_directconnect, + const std::set& allowed_types, + bool /***/); + +static void generic_compute_matrix_dijkstra_expansion(RouterDelayProfiler& route_profiler, + vtr::Matrix>& matrix, + int from_layer_num, + int to_layer_num, + int source_x, + int source_y, + int start_x, + int start_y, + int end_x, + int end_y, + const t_router_opts& router_opts, + bool measure_directconnect, + const std::set& allowed_types, + bool is_flat); + +static vtr::NdMatrix compute_delta_delays(RouterDelayProfiler& route_profiler, + const t_placer_opts& palcer_opts, + const t_router_opts& router_opts, + bool measure_directconnect, + size_t longest_length, + bool is_flat); float delay_reduce(std::vector& delays, e_reducer reducer); -static vtr::NdMatrix compute_delta_delay_model( - RouterDelayProfiler& route_profiler, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - bool measure_directconnect, - int longest_length, - bool is_flat); +static vtr::NdMatrix compute_delta_delay_model(RouterDelayProfiler& route_profiler, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + bool measure_directconnect, + int longest_length, + bool is_flat); /** * @brief Use the information in the router lookahead to fill the delay matrix instead of running the router @@ -183,15 +176,11 @@ std::unique_ptr compute_place_delay_model(const t_placer_opts& t_chan_width chan_width = setup_chan_width(router_opts, chan_width_dist); - alloc_routing_structs(chan_width, router_opts, det_routing_arch, segment_inf, - directs, num_directs, is_flat); + alloc_routing_structs(chan_width, router_opts, det_routing_arch, segment_inf, directs, num_directs, is_flat); - const RouterLookahead* router_lookahead = get_cached_router_lookahead(*det_routing_arch, - router_opts.lookahead_type, - router_opts.write_router_lookahead, - router_opts.read_router_lookahead, - segment_inf, - is_flat); + const RouterLookahead* router_lookahead + = get_cached_router_lookahead(*det_routing_arch, router_opts.lookahead_type, router_opts.write_router_lookahead, + router_opts.read_router_lookahead, segment_inf, is_flat); RouterDelayProfiler route_profiler(net_list, router_lookahead, is_flat); @@ -227,39 +216,30 @@ std::unique_ptr compute_place_delay_model(const t_placer_opts& return place_delay_model; } -void DeltaDelayModel::compute( - RouterDelayProfiler& route_profiler, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - int longest_length) { - delays_ = compute_delta_delay_model( - route_profiler, - placer_opts, router_opts, /*measure_directconnect=*/true, - longest_length, - is_flat_); +void DeltaDelayModel::compute(RouterDelayProfiler& route_profiler, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + int longest_length) { + delays_ = compute_delta_delay_model(route_profiler, placer_opts, router_opts, /*measure_directconnect=*/true, + longest_length, is_flat_); } -void OverrideDelayModel::compute( - RouterDelayProfiler& route_profiler, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - int longest_length) { - auto delays = compute_delta_delay_model( - route_profiler, - placer_opts, router_opts, /*measure_directconnect=*/false, - longest_length, - is_flat_); +void OverrideDelayModel::compute(RouterDelayProfiler& route_profiler, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + int longest_length) { + auto delays = compute_delta_delay_model(route_profiler, placer_opts, router_opts, /*measure_directconnect=*/false, + longest_length, is_flat_); base_delay_model_ = std::make_unique(cross_layer_delay_, delays, false); compute_override_delay_model(route_profiler, router_opts); } -void SimpleDelayModel::compute( - RouterDelayProfiler& router, - const t_placer_opts& /*placer_opts*/, - const t_router_opts& /*router_opts*/, - int /*longest_length*/) { +void SimpleDelayModel::compute(RouterDelayProfiler& router, + const t_placer_opts& /*placer_opts*/, + const t_router_opts& /*router_opts*/, + int /*longest_length*/) { delays_ = compute_simple_delay_model(router); } @@ -286,7 +266,8 @@ std::vector get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ //which pins can potentially connect to global routing. std::unordered_set non_zero_fc_pins; for (const t_fc_specification& fc_spec : type->fc_specs) { - if (fc_spec.fc_value == 0) continue; + if (fc_spec.fc_value == 0) + continue; non_zero_fc_pins.insert(fc_spec.pins.begin(), fc_spec.pins.end()); } @@ -306,7 +287,8 @@ std::vector get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ } } - if (!any_pins_connect_to_general_routing) continue; //Skip if doesn't connect to general routing + if (!any_pins_connect_to_general_routing) + continue; //Skip if doesn't connect to general routing //Record candidate class best_classes.push_back(i); @@ -314,9 +296,7 @@ std::vector get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ } //Sort classe so largest pin class is first - auto cmp_class = [&](int lhs, int rhs) { - return type->class_inf[lhs].num_pins > type->class_inf[rhs].num_pins; - }; + auto cmp_class = [&](int lhs, int rhs) { return type->class_inf[lhs].num_pins > type->class_inf[rhs].num_pins; }; std::stable_sort(best_classes.begin(), best_classes.end(), cmp_class); @@ -326,7 +306,7 @@ std::vector get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ static int get_longest_segment_length(std::vector& segment_inf) { int length = 0; - for (const t_segment_inf &seg_info : segment_inf) { + for (const t_segment_inf& seg_info : segment_inf) { if (seg_info.length > length) { length = seg_info.length; } @@ -335,8 +315,7 @@ static int get_longest_segment_length(std::vector& segment_inf) { return length; } -static t_chan_width setup_chan_width(const t_router_opts& router_opts, - t_chan_width_dist chan_width_dist) { +static t_chan_width setup_chan_width(const t_router_opts& router_opts, t_chan_width_dist chan_width_dist) { /*we give plenty of tracks, this increases routability for the */ /*lookup table generation */ @@ -365,16 +344,15 @@ static t_chan_width setup_chan_width(const t_router_opts& router_opts, return init_chan(width_fac, chan_width_dist, graph_directionality); } -static float route_connection_delay( - RouterDelayProfiler& route_profiler, - int from_layer_num, - int to_layer_num, - int source_x, - int source_y, - int sink_x, - int sink_y, - const t_router_opts& router_opts, - bool measure_directconnect) { +static float route_connection_delay(RouterDelayProfiler& route_profiler, + int from_layer_num, + int to_layer_num, + int source_x, + int source_y, + int sink_x, + int sink_y, + const t_router_opts& router_opts, + bool measure_directconnect) { //Routes between the source and sink locations and calculates the delay float net_delay_value = IMPOSSIBLE_DELTA; /*set to known value for debug purposes */ @@ -384,18 +362,21 @@ static float route_connection_delay( bool successfully_routed = false; //Get the rr nodes to route between - auto best_driver_ptcs = get_best_classes(DRIVER, device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num})); + auto best_driver_ptcs + = get_best_classes(DRIVER, device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num})); auto best_sink_ptcs = get_best_classes(RECEIVER, device_ctx.grid.get_physical_type({sink_x, sink_y, to_layer_num})); for (int driver_ptc : best_driver_ptcs) { VTR_ASSERT(driver_ptc != OPEN); - RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(from_layer_num, source_x, source_y, SOURCE, driver_ptc); + RRNodeId source_rr_node + = device_ctx.rr_graph.node_lookup().find_node(from_layer_num, source_x, source_y, SOURCE, driver_ptc); VTR_ASSERT(source_rr_node != RRNodeId::INVALID()); for (int sink_ptc : best_sink_ptcs) { VTR_ASSERT(sink_ptc != OPEN); - RRNodeId sink_rr_node = device_ctx.rr_graph.node_lookup().find_node(to_layer_num, sink_x, sink_y, SINK, sink_ptc); + RRNodeId sink_rr_node + = device_ctx.rr_graph.node_lookup().find_node(to_layer_num, sink_x, sink_y, SINK, sink_ptc); if (sink_rr_node == RRNodeId::INVALID()) continue; @@ -406,30 +387,27 @@ static float route_connection_delay( } { - successfully_routed = route_profiler.calculate_delay( - source_rr_node, sink_rr_node, - router_opts, - &net_delay_value); + successfully_routed + = route_profiler.calculate_delay(source_rr_node, sink_rr_node, router_opts, &net_delay_value); } - if (successfully_routed) break; + if (successfully_routed) + break; } - if (successfully_routed) break; + if (successfully_routed) + break; } if (!successfully_routed) { - VTR_LOG_WARN("Unable to route between blocks at (%d,%d,%d) and (%d,%d,%d) to characterize delay (setting to %g)\n", - source_x, source_y, from_layer_num, sink_x, sink_y, to_layer_num, net_delay_value); + VTR_LOG_WARN( + "Unable to route between blocks at (%d,%d,%d) and (%d,%d,%d) to characterize delay (setting to %g)\n", + source_x, source_y, from_layer_num, sink_x, sink_y, to_layer_num, net_delay_value); } return (net_delay_value); } -static void add_delay_to_matrix( - vtr::Matrix>* matrix, - int delta_x, - int delta_y, - float delay) { +static void add_delay_to_matrix(vtr::Matrix>* matrix, int delta_x, int delta_y, float delay) { if ((*matrix)[delta_x][delta_y].size() == 1 && (*matrix)[delta_x][delta_y][0] == EMPTY_DELTA) { //Overwrite empty delta (*matrix)[delta_x][delta_y][0] = delay; @@ -439,21 +417,20 @@ static void add_delay_to_matrix( } } -static void generic_compute_matrix_dijkstra_expansion( - RouterDelayProfiler& /*route_profiler*/, - vtr::Matrix>& matrix, - int from_layer_num, - int to_layer_num, - int source_x, - int source_y, - int start_x, - int start_y, - int end_x, - int end_y, - const t_router_opts& router_opts, - bool measure_directconnect, - const std::set& allowed_types, - bool is_flat) { +static void generic_compute_matrix_dijkstra_expansion(RouterDelayProfiler& /*route_profiler*/, + vtr::Matrix>& matrix, + int from_layer_num, + int to_layer_num, + int source_x, + int source_y, + int start_x, + int start_y, + int end_x, + int end_y, + const t_router_opts& router_opts, + bool measure_directconnect, + const std::set& allowed_types, + bool is_flat) { auto& device_ctx = g_vpr_ctx.device(); t_physical_tile_type_ptr src_type = device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num}); @@ -468,11 +445,8 @@ static void generic_compute_matrix_dijkstra_expansion( //Only set empty target if we don't already have a valid delta delay matrix[delta_x][delta_y].push_back(EMPTY_DELTA); #ifdef VERBOSE - VTR_LOG("Computed delay: %12s delta: %d,%d (src: %d,%d sink: %d,%d)\n", - "EMPTY", - delta_x, delta_y, - source_x, source_y, - sink_x, sink_y); + VTR_LOG("Computed delay: %12s delta: %d,%d (src: %d,%d sink: %d,%d)\n", "EMPTY", delta_x, delta_y, + source_x, source_y, sink_x, sink_y); #endif } } @@ -483,10 +457,12 @@ static void generic_compute_matrix_dijkstra_expansion( vtr::Matrix found_matrix({matrix.dim_size(0), matrix.dim_size(1)}, false); - auto best_driver_ptcs = get_best_classes(DRIVER, device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num})); + auto best_driver_ptcs + = get_best_classes(DRIVER, device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num})); for (int driver_ptc : best_driver_ptcs) { VTR_ASSERT(driver_ptc != OPEN); - RRNodeId source_rr_node = device_ctx.rr_graph.node_lookup().find_node(from_layer_num, source_x, source_y, SOURCE, driver_ptc); + RRNodeId source_rr_node + = device_ctx.rr_graph.node_lookup().find_node(from_layer_num, source_x, source_y, SOURCE, driver_ptc); VTR_ASSERT(source_rr_node != RRNodeId::INVALID()); auto delays = calculate_all_path_delays_from_rr_node(source_rr_node, router_opts, is_flat); @@ -507,20 +483,19 @@ static void generic_compute_matrix_dijkstra_expansion( //Only set empty target if we don't already have a valid delta delay matrix[delta_x][delta_y].push_back(EMPTY_DELTA); #ifdef VERBOSE - VTR_LOG("Computed delay: %12s delta: %d,%d (src: %d,%d sink: %d,%d)\n", - "EMPTY", - delta_x, delta_y, - source_x, source_y, - sink_x, sink_y); + VTR_LOG("Computed delay: %12s delta: %d,%d (src: %d,%d sink: %d,%d)\n", "EMPTY", delta_x, + delta_y, source_x, source_y, sink_x, sink_y); #endif found_matrix[delta_x][delta_y] = true; } } else { bool found_a_sink = false; - auto best_sink_ptcs = get_best_classes(RECEIVER, device_ctx.grid.get_physical_type({sink_x, sink_y, to_layer_num})); + auto best_sink_ptcs + = get_best_classes(RECEIVER, device_ctx.grid.get_physical_type({sink_x, sink_y, to_layer_num})); for (int sink_ptc : best_sink_ptcs) { VTR_ASSERT(sink_ptc != OPEN); - RRNodeId sink_rr_node = device_ctx.rr_graph.node_lookup().find_node(to_layer_num, sink_x, sink_y, SINK, sink_ptc); + RRNodeId sink_rr_node + = device_ctx.rr_graph.node_lookup().find_node(to_layer_num, sink_x, sink_y, SINK, sink_ptc); if (sink_rr_node == RRNodeId::INVALID()) continue; @@ -537,10 +512,7 @@ static void generic_compute_matrix_dijkstra_expansion( #ifdef VERBOSE VTR_LOG("Computed delay: %12g delta: %d,%d (src: %d,%d sink: %d,%d)\n", - delays[size_t(sink_rr_node)], - delta_x, delta_y, - source_x, source_y, - sink_x, sink_y); + delays[size_t(sink_rr_node)], delta_x, delta_y, source_x, source_y, sink_x, sink_y); #endif found_matrix[delta_x][delta_y] = true; @@ -568,34 +540,29 @@ static void generic_compute_matrix_dijkstra_expansion( int delta_y = abs(sink_y - source_y); if (!found_matrix[delta_x][delta_y]) { add_delay_to_matrix(&matrix, delta_x, delta_y, IMPOSSIBLE_DELTA); - VTR_LOG_WARN("Unable to route between blocks at (%d,%d,%d) and (%d,%d,%d) to characterize delay (setting to %g)\n", - source_x, - source_y, - from_layer_num, - sink_x, - sink_y, - to_layer_num, - IMPOSSIBLE_DELTA); + VTR_LOG_WARN( + "Unable to route between blocks at (%d,%d,%d) and (%d,%d,%d) to characterize delay (setting to " + "%g)\n", + source_x, source_y, from_layer_num, sink_x, sink_y, to_layer_num, IMPOSSIBLE_DELTA); } } } } -static void generic_compute_matrix_iterative_astar( - RouterDelayProfiler& route_profiler, - vtr::Matrix>& matrix, - int from_layer_num, - int to_layer_num, - int source_x, - int source_y, - int start_x, - int start_y, - int end_x, - int end_y, - const t_router_opts& router_opts, - bool measure_directconnect, - const std::set& allowed_types, - bool /***/) { +static void generic_compute_matrix_iterative_astar(RouterDelayProfiler& route_profiler, + vtr::Matrix>& matrix, + int from_layer_num, + int to_layer_num, + int source_x, + int source_y, + int start_x, + int start_y, + int end_x, + int end_y, + const t_router_opts& router_opts, + bool measure_directconnect, + const std::set& allowed_types, + bool /***/) { //vtr::ScopedStartFinishTimer t(vtr::string_fmt("Profiling from (%d,%d)", source_x, source_y)); int delta_x, delta_y; @@ -611,8 +578,8 @@ static void generic_compute_matrix_iterative_astar( t_physical_tile_type_ptr src_type = device_ctx.grid.get_physical_type({source_x, source_y, from_layer_num}); t_physical_tile_type_ptr sink_type = device_ctx.grid.get_physical_type({sink_x, sink_y, to_layer_num}); - bool src_or_target_empty = (src_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE - || sink_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE); + bool src_or_target_empty + = (src_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE || sink_type == device_ctx.EMPTY_PHYSICAL_TILE_TYPE); bool is_allowed_type = allowed_types.empty() || allowed_types.find(src_type->name) != allowed_types.end(); @@ -621,32 +588,19 @@ static void generic_compute_matrix_iterative_astar( //Only set empty target if we don't already have a valid delta delay matrix[delta_x][delta_y].push_back(EMPTY_DELTA); #ifdef VERBOSE - VTR_LOG("Computed delay: %12s delta: %d,%d (src: %d,%d sink: %d,%d)\n", - "EMPTY", - delta_x, delta_y, - source_x, source_y, - sink_x, sink_y); + VTR_LOG("Computed delay: %12s delta: %d,%d (src: %d,%d sink: %d,%d)\n", "EMPTY", delta_x, delta_y, + source_x, source_y, sink_x, sink_y); #endif } } else { //Valid start/end - float delay = route_connection_delay(route_profiler, - from_layer_num, - to_layer_num, - source_x, - source_y, - sink_x, - sink_y, - router_opts, - measure_directconnect); + float delay = route_connection_delay(route_profiler, from_layer_num, to_layer_num, source_x, source_y, + sink_x, sink_y, router_opts, measure_directconnect); #ifdef VERBOSE - VTR_LOG("Computed delay: %12g delta: %d,%d (src: %d,%d sink: %d,%d)\n", - delay, - delta_x, delta_y, - source_x, source_y, - sink_x, sink_y); + VTR_LOG("Computed delay: %12g delta: %d,%d (src: %d,%d sink: %d,%d)\n", delay, delta_x, delta_y, + source_x, source_y, sink_x, sink_y); #endif if (matrix[delta_x][delta_y].size() == 1 && matrix[delta_x][delta_y][0] == EMPTY_DELTA) { //Overwrite empty delta @@ -660,13 +614,12 @@ static void generic_compute_matrix_iterative_astar( } } -static vtr::NdMatrix compute_delta_delays( - RouterDelayProfiler& route_profiler, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - bool measure_directconnect, - size_t longest_length, - bool is_flat) { +static vtr::NdMatrix compute_delta_delays(RouterDelayProfiler& route_profiler, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + bool measure_directconnect, + size_t longest_length, + bool is_flat) { //To avoid edge effects we place the source at least 'longest_length' away //from the device edge //and route from there for all possible delta values < dimension @@ -674,7 +627,9 @@ static vtr::NdMatrix compute_delta_delays( auto& device_ctx = g_vpr_ctx.device(); auto& grid = device_ctx.grid; - vtr::NdMatrix delta_delays({static_cast(grid.get_num_layers()), static_cast(grid.get_num_layers()), grid.width(), grid.height()}); + vtr::NdMatrix delta_delays({static_cast(grid.get_num_layers()), + static_cast(grid.get_num_layers()), grid.width(), + grid.height()}); for (int from_layer_num = 0; from_layer_num < grid.get_num_layers(); from_layer_num++) { for (int to_layer_num = 0; to_layer_num < grid.get_num_layers(); to_layer_num++) { @@ -737,7 +692,8 @@ static vtr::NdMatrix compute_delta_delays( auto type = grid.get_physical_type({x, y, from_layer_num}); if (type != device_ctx.EMPTY_PHYSICAL_TILE_TYPE) { - if (!allowed_types.empty() && allowed_types.find(std::string(type->name)) == allowed_types.end()) { + if (!allowed_types.empty() + && allowed_types.find(std::string(type->name)) == allowed_types.end()) { continue; } src_type = type; @@ -759,20 +715,16 @@ static vtr::NdMatrix compute_delta_delays( generic_compute_matrix = generic_compute_matrix_dijkstra_expansion; break; default: - VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Unknown place_delta_delay_matrix_calculation_method %d", placer_opts.place_delta_delay_matrix_calculation_method); + VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Unknown place_delta_delay_matrix_calculation_method %d", + placer_opts.place_delta_delay_matrix_calculation_method); } #ifdef VERBOSE VTR_LOG("Computing from lower left edge (%d,%d):\n", x, y); #endif - generic_compute_matrix(route_profiler, sampled_delta_delays, - from_layer_num, to_layer_num, - x, y, - x, y, - grid.width() - 1, grid.height() - 1, - router_opts, - measure_directconnect, allowed_types, - is_flat); + generic_compute_matrix(route_profiler, sampled_delta_delays, from_layer_num, to_layer_num, x, y, x, y, + grid.width() - 1, grid.height() - 1, router_opts, measure_directconnect, + allowed_types, is_flat); //Find the lowest x location on the bottom edge with a non-empty block src_type = nullptr; @@ -781,7 +733,8 @@ static vtr::NdMatrix compute_delta_delays( auto type = grid.get_physical_type({x, y, from_layer_num}); if (type != device_ctx.EMPTY_PHYSICAL_TILE_TYPE) { - if (!allowed_types.empty() && allowed_types.find(std::string(type->name)) == allowed_types.end()) { + if (!allowed_types.empty() + && allowed_types.find(std::string(type->name)) == allowed_types.end()) { continue; } src_type = type; @@ -796,55 +749,34 @@ static vtr::NdMatrix compute_delta_delays( #ifdef VERBOSE VTR_LOG("Computing from left bottom edge (%d,%d):\n", x, y); #endif - generic_compute_matrix(route_profiler, sampled_delta_delays, - from_layer_num, to_layer_num, - x, y, - x, y, - grid.width() - 1, grid.height() - 1, - router_opts, - measure_directconnect, allowed_types, - is_flat); + generic_compute_matrix(route_profiler, sampled_delta_delays, from_layer_num, to_layer_num, x, y, x, y, + grid.width() - 1, grid.height() - 1, router_opts, measure_directconnect, + allowed_types, is_flat); //Since the other delta delay values may have suffered from edge effects, //we recalculate deltas within regions B, C, E, F #ifdef VERBOSE VTR_LOG("Computing from low/low:\n"); #endif - generic_compute_matrix(route_profiler, sampled_delta_delays, - from_layer_num, to_layer_num, - low_x, low_y, - low_x, low_y, - grid.width() - 1, grid.height() - 1, - router_opts, - measure_directconnect, allowed_types, - is_flat); + generic_compute_matrix(route_profiler, sampled_delta_delays, from_layer_num, to_layer_num, low_x, low_y, + low_x, low_y, grid.width() - 1, grid.height() - 1, router_opts, + measure_directconnect, allowed_types, is_flat); //Since the other delta delay values may have suffered from edge effects, //we recalculate deltas within regions D, E, G, H #ifdef VERBOSE VTR_LOG("Computing from high/high:\n"); #endif - generic_compute_matrix(route_profiler, sampled_delta_delays, - from_layer_num, to_layer_num, - high_x, high_y, - 0, 0, - high_x, high_y, - router_opts, - measure_directconnect, allowed_types, - is_flat); + generic_compute_matrix(route_profiler, sampled_delta_delays, from_layer_num, to_layer_num, high_x, high_y, + 0, 0, high_x, high_y, router_opts, measure_directconnect, allowed_types, is_flat); //Since the other delta delay values may have suffered from edge effects, //we recalculate deltas within regions A, B, D, E #ifdef VERBOSE VTR_LOG("Computing from high/low:\n"); #endif - generic_compute_matrix(route_profiler, sampled_delta_delays, - from_layer_num, to_layer_num, - high_x, low_y, - 0, low_y, - high_x, grid.height() - 1, - router_opts, - measure_directconnect, allowed_types, + generic_compute_matrix(route_profiler, sampled_delta_delays, from_layer_num, to_layer_num, high_x, low_y, 0, + low_y, high_x, grid.height() - 1, router_opts, measure_directconnect, allowed_types, is_flat); //Since the other delta delay values may have suffered from edge effects, @@ -852,17 +784,13 @@ static vtr::NdMatrix compute_delta_delays( #ifdef VERBOSE VTR_LOG("Computing from low/high:\n"); #endif - generic_compute_matrix(route_profiler, sampled_delta_delays, - from_layer_num, to_layer_num, - low_x, high_y, - low_x, 0, - grid.width() - 1, high_y, - router_opts, - measure_directconnect, allowed_types, - is_flat); + generic_compute_matrix(route_profiler, sampled_delta_delays, from_layer_num, to_layer_num, low_x, high_y, + low_x, 0, grid.width() - 1, high_y, router_opts, measure_directconnect, + allowed_types, is_flat); for (size_t dx = 0; dx < sampled_delta_delays.dim_size(0); ++dx) { for (size_t dy = 0; dy < sampled_delta_delays.dim_size(1); ++dy) { - delta_delays[from_layer_num][to_layer_num][dx][dy] = delay_reduce(sampled_delta_delays[dx][dy], placer_opts.delay_model_reducer); + delta_delays[from_layer_num][to_layer_num][dx][dy] + = delay_reduce(sampled_delta_delays[dx][dy], placer_opts.delay_model_reducer); } } } @@ -910,11 +838,10 @@ float delay_reduce(std::vector& delays, e_reducer reducer) { * If no legal values are found to average over with a range of max_distance, * we return IMPOSSIBLE_DELTA. */ -static float find_neighboring_average( - vtr::NdMatrix& matrix, - int from_layer, - t_physical_tile_loc to_tile_loc, - int max_distance) { +static float find_neighboring_average(vtr::NdMatrix& matrix, + int from_layer, + t_physical_tile_loc to_tile_loc, + int max_distance) { float sum = 0; int counter = 0; int endx = matrix.end_index(2); @@ -937,7 +864,8 @@ static float find_neighboring_average( continue; } - if (matrix[from_layer][to_layer][delx][dely] == EMPTY_DELTA || matrix[from_layer][to_layer][delx][dely] == IMPOSSIBLE_DELTA) { + if (matrix[from_layer][to_layer][delx][dely] == EMPTY_DELTA + || matrix[from_layer][to_layer][delx][dely] == IMPOSSIBLE_DELTA) { continue; } counter++; @@ -965,11 +893,8 @@ static void fix_empty_coordinates(vtr::NdMatrix& delta_delays) { for (int delta_x = 0; delta_x < (int)delta_delays.dim_size(2); ++delta_x) { for (int delta_y = 0; delta_y < (int)delta_delays.dim_size(3); ++delta_y) { if (delta_delays[from_layer][to_layer][delta_x][delta_y] == EMPTY_DELTA) { - delta_delays[from_layer][to_layer][delta_x][delta_y] = - find_neighboring_average(delta_delays, - from_layer, - {delta_x, delta_y, to_layer}, - kMaxAverageDistance); + delta_delays[from_layer][to_layer][delta_x][delta_y] = find_neighboring_average( + delta_delays, from_layer, {delta_x, delta_y, to_layer}, kMaxAverageDistance); } } } @@ -1020,20 +945,15 @@ static void fill_impossible_coordinates(vtr::NdMatrix& delta_delays) { } } -static vtr::NdMatrix compute_delta_delay_model( - RouterDelayProfiler& route_profiler, - const t_placer_opts& placer_opts, - const t_router_opts& router_opts, - bool measure_directconnect, - int longest_length, - bool is_flat) { +static vtr::NdMatrix compute_delta_delay_model(RouterDelayProfiler& route_profiler, + const t_placer_opts& placer_opts, + const t_router_opts& router_opts, + bool measure_directconnect, + int longest_length, + bool is_flat) { vtr::ScopedStartFinishTimer timer("Computing delta delays"); - vtr::NdMatrix delta_delays = compute_delta_delays(route_profiler, - placer_opts, - router_opts, - measure_directconnect, - longest_length, - is_flat); + vtr::NdMatrix delta_delays = compute_delta_delays(route_profiler, placer_opts, router_opts, + measure_directconnect, longest_length, is_flat); fix_uninitialized_coordinates(delta_delays); @@ -1051,22 +971,17 @@ static vtr::NdMatrix compute_simple_delay_model(RouterDelayProfiler& r int num_physical_tile_types = static_cast(g_vpr_ctx.device().physical_tile_types.size()); // Initializing the delay matrix to [num_physical_types][num_layers][num_layers][width][height] // The second index related to the layer that the source location is on and the third index is for the sink layer - vtr::NdMatrix delta_delays({static_cast(num_physical_tile_types), - static_cast(grid.get_num_layers()), - static_cast(grid.get_num_layers()), - grid.width(), - grid.height()}); + vtr::NdMatrix delta_delays( + {static_cast(num_physical_tile_types), static_cast(grid.get_num_layers()), + static_cast(grid.get_num_layers()), grid.width(), grid.height()}); for (int physical_tile_type_idx = 0; physical_tile_type_idx < num_physical_tile_types; ++physical_tile_type_idx) { for (int from_layer = 0; from_layer < grid.get_num_layers(); ++from_layer) { for (int to_layer = 0; to_layer < grid.get_num_layers(); ++to_layer) { for (int dx = 0; dx < static_cast(grid.width()); ++dx) { for (int dy = 0; dy < static_cast(grid.height()); ++dy) { - float min_delay = route_profiler.get_min_delay(physical_tile_type_idx, - from_layer, - to_layer, - dx, - dy); + float min_delay + = route_profiler.get_min_delay(physical_tile_type_idx, from_layer, to_layer, dx, dy); delta_delays[physical_tile_type_idx][from_layer][to_layer][dx][dy] = min_delay; } } @@ -1106,10 +1021,12 @@ static bool find_direct_connect_sample_locations(const t_direct_inf* direct, for (int layer_num = 0; layer_num < grid.get_num_layers() && !found; ++layer_num) { for (int x = 0; x < (int)grid.width() && !found; ++x) { to_x = x + direct->x_offset; - if (to_x < 0 || to_x >= (int)grid.width()) continue; + if (to_x < 0 || to_x >= (int)grid.width()) + continue; for (int y = 0; y < (int)grid.height() && !found; ++y) { - if (grid.get_physical_type({x, y, layer_num}) != from_type) continue; + if (grid.get_physical_type({x, y, layer_num}) != from_type) + continue; //Check that the from pin exists at this from location //(with multi-width/height blocks pins may not exist at all locations) @@ -1120,12 +1037,15 @@ static bool find_direct_connect_sample_locations(const t_direct_inf* direct, } else { from_pin_found = !(node_lookup.find_nodes_at_all_sides(layer_num, x, y, OPIN, from_pin).empty()); } - if (!from_pin_found) continue; + if (!from_pin_found) + continue; to_y = y + direct->y_offset; - if (to_y < 0 || to_y >= (int)grid.height()) continue; - if (grid.get_physical_type({to_x, to_y, layer_num}) != to_type) continue; + if (to_y < 0 || to_y >= (int)grid.height()) + continue; + if (grid.get_physical_type({to_x, to_y, layer_num}) != to_type) + continue; //Check that the from pin exists at this from location //(with multi-width/height blocks pins may not exist at all locations) @@ -1136,12 +1056,14 @@ static bool find_direct_connect_sample_locations(const t_direct_inf* direct, } else { to_pin_found = !(node_lookup.find_nodes_at_all_sides(layer_num, to_x, to_y, IPIN, to_pin).empty()); } - if (!to_pin_found) continue; + if (!to_pin_found) + continue; for (int sub_tile_num = 0; sub_tile_num < from_type->capacity; ++sub_tile_num) { to_sub_tile = sub_tile_num + direct->sub_tile_offset; - if (to_sub_tile < 0 || to_sub_tile >= to_type->capacity) continue; + if (to_sub_tile < 0 || to_sub_tile >= to_type->capacity) + continue; found = true; found_layer_num = layer_num; @@ -1200,8 +1122,7 @@ static bool verify_delta_delays(const vtr::NdMatrix& delta_delays) { float delta_delay = delta_delays[from_layer_num][to_layer_num][x][y]; if (delta_delay < 0.) { - VPR_ERROR(VPR_ERROR_PLACE, - "Found invaild negative delay %g for delta [%d,%d,%d,%d]", + VPR_ERROR(VPR_ERROR_PLACE, "Found invaild negative delay %g for delta [%d,%d,%d,%d]", delta_delay, from_layer_num, to_layer_num, x, y); } } @@ -1212,9 +1133,8 @@ static bool verify_delta_delays(const vtr::NdMatrix& delta_delays) { return true; } -void OverrideDelayModel::compute_override_delay_model( - RouterDelayProfiler& route_profiler, - const t_router_opts& router_opts) { +void OverrideDelayModel::compute_override_delay_model(RouterDelayProfiler& route_profiler, + const t_router_opts& router_opts) { t_router_opts router_opts2 = router_opts; router_opts2.astar_fac = 0.f; router_opts2.astar_offset = 0.f; @@ -1227,11 +1147,14 @@ void OverrideDelayModel::compute_override_delay_model( InstPort from_port = parse_inst_port(direct->from_pin); InstPort to_port = parse_inst_port(direct->to_pin); - t_physical_tile_type_ptr from_type = find_tile_type_by_name(from_port.instance_name(), device_ctx.physical_tile_types); - t_physical_tile_type_ptr to_type = find_tile_type_by_name(to_port.instance_name(), device_ctx.physical_tile_types); + t_physical_tile_type_ptr from_type + = find_tile_type_by_name(from_port.instance_name(), device_ctx.physical_tile_types); + t_physical_tile_type_ptr to_type + = find_tile_type_by_name(to_port.instance_name(), device_ctx.physical_tile_types); int num_conns = from_port.port_high_index() - from_port.port_low_index() + 1; - VTR_ASSERT_MSG(num_conns == to_port.port_high_index() - to_port.port_low_index() + 1, "Directs must have the same size to/from"); + VTR_ASSERT_MSG(num_conns == to_port.port_high_index() - to_port.port_low_index() + 1, + "Directs must have the same size to/from"); //We now walk through all the connections associated with the current direct specification, measure //their delay and specify that value as an override in the delay model. @@ -1253,7 +1176,8 @@ void OverrideDelayModel::compute_override_delay_model( VTR_ASSERT(from_pin != OPEN); VTR_ASSERT(to_pin != OPEN); - int from_pin_class = find_pin_class(from_type, from_port.port_name(), from_port.port_low_index() + iconn, DRIVER); + int from_pin_class + = find_pin_class(from_type, from_port.port_name(), from_port.port_low_index() + iconn, DRIVER); VTR_ASSERT(from_pin_class != OPEN); int to_pin_class = find_pin_class(to_type, to_port.port_name(), to_port.port_low_index() + iconn, RECEIVER); @@ -1261,7 +1185,8 @@ void OverrideDelayModel::compute_override_delay_model( bool found_sample_points; RRNodeId src_rr, sink_rr; - found_sample_points = find_direct_connect_sample_locations(direct, from_type, from_pin, from_pin_class, to_type, to_pin, to_pin_class, src_rr, sink_rr); + found_sample_points = find_direct_connect_sample_locations(direct, from_type, from_pin, from_pin_class, + to_type, to_pin, to_pin_class, src_rr, sink_rr); if (!found_sample_points) { ++missing_instances; @@ -1270,13 +1195,16 @@ void OverrideDelayModel::compute_override_delay_model( //If some of the source/sink ports are logically equivalent we may have already //sampled the associated source/sink pair and don't need to do so again - if (sampled_rr_pairs.count({src_rr, sink_rr})) continue; + if (sampled_rr_pairs.count({src_rr, sink_rr})) + continue; float direct_connect_delay = std::numeric_limits::quiet_NaN(); - bool found_routing_path = route_profiler.calculate_delay(src_rr, sink_rr, router_opts2, &direct_connect_delay); + bool found_routing_path + = route_profiler.calculate_delay(src_rr, sink_rr, router_opts2, &direct_connect_delay); if (found_routing_path) { - set_delay_override(from_type->index, from_pin_class, to_type->index, to_pin_class, direct->x_offset, direct->y_offset, direct_connect_delay); + set_delay_override(from_type->index, from_pin_class, to_type->index, to_pin_class, direct->x_offset, + direct->y_offset, direct_connect_delay); } else { ++missing_paths; } @@ -1285,8 +1213,13 @@ void OverrideDelayModel::compute_override_delay_model( sampled_rr_pairs.insert({src_rr, sink_rr}); } - VTR_LOGV_WARN(missing_instances > 0, "Found no delta delay for %d bits of inter-block direct connect '%s' (no instances of this direct found)\n", missing_instances, direct->name); - VTR_LOGV_WARN(missing_paths > 0, "Found no delta delay for %d bits of inter-block direct connect '%s' (no routing path found)\n", missing_paths, direct->name); + VTR_LOGV_WARN( + missing_instances > 0, + "Found no delta delay for %d bits of inter-block direct connect '%s' (no instances of this direct found)\n", + missing_instances, direct->name); + VTR_LOGV_WARN(missing_paths > 0, + "Found no delta delay for %d bits of inter-block direct connect '%s' (no routing path found)\n", + missing_paths, direct->name); } } @@ -1304,11 +1237,13 @@ bool directconnect_exists(RRNodeId src_rr_node, RRNodeId sink_rr_node) { for (t_edge_size i_src_edge = 0; i_src_edge < rr_graph.num_edges(src_rr_node); ++i_src_edge) { RRNodeId opin_rr_node = rr_graph.edge_sink_node(src_rr_node, i_src_edge); - if (rr_graph.node_type(opin_rr_node) != OPIN) continue; + if (rr_graph.node_type(opin_rr_node) != OPIN) + continue; for (t_edge_size i_opin_edge = 0; i_opin_edge < rr_graph.num_edges(opin_rr_node); ++i_opin_edge) { RRNodeId ipin_rr_node = rr_graph.edge_sink_node(opin_rr_node, i_opin_edge); - if (rr_graph.node_type(ipin_rr_node) != IPIN) continue; + if (rr_graph.node_type(ipin_rr_node) != IPIN) + continue; for (t_edge_size i_ipin_edge = 0; i_ipin_edge < rr_graph.num_edges(ipin_rr_node); ++i_ipin_edge) { if (sink_rr_node == rr_graph.edge_sink_node(ipin_rr_node, i_ipin_edge)) { diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/uniform_move_generator.cpp index 9f6e844c34d..67e952f5e6d 100644 --- a/vpr/src/place/uniform_move_generator.cpp +++ b/vpr/src/place/uniform_move_generator.cpp @@ -5,8 +5,7 @@ #include "placer_state.h" #include "move_utils.h" -UniformMoveGenerator::UniformMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function) +UniformMoveGenerator::UniformMoveGenerator(PlacerState& placer_state, e_reward_function reward_function) : MoveGenerator(placer_state, reward_function) {} e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, @@ -20,14 +19,13 @@ e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks const auto& blk_loc_registry = placer_state.blk_loc_registry(); //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, /*highly_crit_block=*/false, /*net_from=*/nullptr, - /*pin_from=*/nullptr, - placer_state); + /*pin_from=*/nullptr, placer_state); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), + rlim); if (!b_from) { //No movable block found VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tNo movable block found\n"); diff --git a/vpr/src/place/uniform_move_generator.h b/vpr/src/place/uniform_move_generator.h index e9fd28686dd..e90519d82ca 100644 --- a/vpr/src/place/uniform_move_generator.h +++ b/vpr/src/place/uniform_move_generator.h @@ -11,8 +11,7 @@ class UniformMoveGenerator : public MoveGenerator { public: UniformMoveGenerator() = delete; - UniformMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function); + UniformMoveGenerator(PlacerState& placer_state, e_reward_function reward_function); private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index b6c6f7683f8..dab2e6376d1 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -23,14 +23,13 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move const auto& blk_loc_registry = placer_state.blk_loc_registry(); //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, /*highly_crit_block=*/false, /*net_from=*/nullptr, - /*pin_from=*/nullptr, - placer_state); + /*pin_from=*/nullptr, placer_state); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Centroid Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Centroid Move Choose Block %d - rlim %f\n", + size_t(b_from), rlim); if (!b_from) { //No movable block found VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tNo movable block found\n"); @@ -42,9 +41,7 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move auto grid_from_type = device_ctx.grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); - t_range_limiters range_limiters{rlim, - place_move_ctx.first_rlim, - placer_opts.place_dm_rlim}; + t_range_limiters range_limiters{rlim, place_move_ctx.first_rlim, placer_opts.place_dm_rlim}; t_pl_loc to, centroid; diff --git a/vpr/src/place/weighted_centroid_move_generator.h b/vpr/src/place/weighted_centroid_move_generator.h index 30ed146941c..156a36195c1 100644 --- a/vpr/src/place/weighted_centroid_move_generator.h +++ b/vpr/src/place/weighted_centroid_move_generator.h @@ -15,8 +15,7 @@ class WeightedCentroidMoveGenerator : public MoveGenerator { public: WeightedCentroidMoveGenerator() = delete; - WeightedCentroidMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function); + WeightedCentroidMoveGenerator(PlacerState& placer_state, e_reward_function reward_function); private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index 1e600defa31..4fc3cd2faa9 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -10,8 +10,7 @@ #define CRIT_MULT_FOR_W_MEDIAN 10 -WeightedMedianMoveGenerator::WeightedMedianMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function) +WeightedMedianMoveGenerator::WeightedMedianMoveGenerator(PlacerState& placer_state, e_reward_function reward_function) : MoveGenerator(placer_state, reward_function) {} e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, @@ -26,25 +25,21 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& const auto& blk_loc_registry = placer_state.blk_loc_registry(); //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, /*highly_crit_block=*/false, /*net_from=*/nullptr, - /*pin_from=*/nullptr, - placer_state); + /*pin_from=*/nullptr, placer_state); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Median Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Median Move Choose Block %d - rlim %f\n", + size_t(b_from), rlim); if (!b_from) { //No movable block found VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tNo movable block found\n"); return e_create_move::ABORT; } - - int num_layers = g_vpr_ctx.device().grid.get_num_layers(); - t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = g_vpr_ctx.device().grid.get_physical_type({from.x, from.y, from.layer}); @@ -88,16 +83,25 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& // We need to insert the calculated edges in the X,Y vectors multiple times based on the criticality of the pin that caused each of them. // As all the criticalities are [0,1], we map it to [0,CRIT_MULT_FOR_W_MEDIAN] inserts in the vectors for each edge // by multiplying each edge's criticality by CRIT_MULT_FOR_W_MEDIAN - place_move_ctx.X_coord.insert(place_move_ctx.X_coord.end(), ceil(coords.xmin.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.xmin.edge); - place_move_ctx.X_coord.insert(place_move_ctx.X_coord.end(), ceil(coords.xmax.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.xmax.edge); - place_move_ctx.Y_coord.insert(place_move_ctx.Y_coord.end(), ceil(coords.ymin.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.ymin.edge); - place_move_ctx.Y_coord.insert(place_move_ctx.Y_coord.end(), ceil(coords.ymax.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.ymax.edge); - place_move_ctx.layer_coord.insert(place_move_ctx.layer_coord.end(), ceil(coords.layer_min.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.layer_min.edge); - place_move_ctx.layer_coord.insert(place_move_ctx.layer_coord.end(), ceil(coords.layer_max.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.layer_max.edge); + place_move_ctx.X_coord.insert(place_move_ctx.X_coord.end(), + ceil(coords.xmin.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.xmin.edge); + place_move_ctx.X_coord.insert(place_move_ctx.X_coord.end(), + ceil(coords.xmax.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.xmax.edge); + place_move_ctx.Y_coord.insert(place_move_ctx.Y_coord.end(), + ceil(coords.ymin.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.ymin.edge); + place_move_ctx.Y_coord.insert(place_move_ctx.Y_coord.end(), + ceil(coords.ymax.criticality * CRIT_MULT_FOR_W_MEDIAN), coords.ymax.edge); + place_move_ctx.layer_coord.insert(place_move_ctx.layer_coord.end(), + ceil(coords.layer_min.criticality * CRIT_MULT_FOR_W_MEDIAN), + coords.layer_min.edge); + place_move_ctx.layer_coord.insert(place_move_ctx.layer_coord.end(), + ceil(coords.layer_max.criticality * CRIT_MULT_FOR_W_MEDIAN), + coords.layer_max.edge); } if ((place_move_ctx.X_coord.empty()) || (place_move_ctx.Y_coord.empty()) || (place_move_ctx.layer_coord.empty())) { - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tMove aborted - X_coord or y_coord or layer_coord are empty\n"); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, + "\tMove aborted - X_coord or y_coord or layer_coord are empty\n"); return e_create_move::ABORT; } @@ -130,9 +134,7 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& limit_coords.layer_max = place_move_ctx.layer_coord[floor((place_move_ctx.layer_coord.size() - 1) / 2) + 1]; } - t_range_limiters range_limiters{rlim, - place_move_ctx.first_rlim, - placer_opts.place_dm_rlim}; + t_range_limiters range_limiters{rlim, place_move_ctx.first_rlim, placer_opts.place_dm_rlim}; t_pl_loc w_median_point; w_median_point.x = (limit_coords.xmin + limit_coords.xmax) / 2; @@ -154,9 +156,9 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& } bool WeightedMedianMoveGenerator::get_bb_cost_for_net_excluding_block(ClusterNetId net_id, - ClusterPinId moving_pin_id, - const PlacerCriticalities* criticalities, - t_bb_cost* coords) { + ClusterPinId moving_pin_id, + const PlacerCriticalities* criticalities, + t_bb_cost* coords) { const auto& blk_loc_registry = placer_state_.get().blk_loc_registry(); const auto& block_locs = blk_loc_registry.block_locs(); @@ -268,4 +270,3 @@ bool WeightedMedianMoveGenerator::get_bb_cost_for_net_excluding_block(ClusterNet return skip_net; } - diff --git a/vpr/src/place/weighted_median_move_generator.h b/vpr/src/place/weighted_median_move_generator.h index 6ba0ccc9544..c22197c3c37 100644 --- a/vpr/src/place/weighted_median_move_generator.h +++ b/vpr/src/place/weighted_median_move_generator.h @@ -15,8 +15,7 @@ class WeightedMedianMoveGenerator : public MoveGenerator { public: WeightedMedianMoveGenerator() = delete; - WeightedMedianMoveGenerator(PlacerState& placer_state, - e_reward_function reward_function); + WeightedMedianMoveGenerator(PlacerState& placer_state, e_reward_function reward_function); private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, diff --git a/vpr/src/power/PowerSpicedComponent.cpp b/vpr/src/power/PowerSpicedComponent.cpp index 621fece123f..2f45ec0d73e 100644 --- a/vpr/src/power/PowerSpicedComponent.cpp +++ b/vpr/src/power/PowerSpicedComponent.cpp @@ -13,8 +13,7 @@ bool sorter_PowerCallibSize(PowerCallibSize* a, PowerCallibSize* b); bool sorter_PowerCallibInputs(PowerCallibInputs* a, PowerCallibInputs* b); -PowerCallibInputs::PowerCallibInputs(PowerSpicedComponent* parent_, - float inputs) +PowerCallibInputs::PowerCallibInputs(PowerSpicedComponent* parent_, float inputs) : parent(parent_) , num_inputs(inputs) , sorted(false) @@ -36,9 +35,7 @@ void PowerCallibInputs::add_size(float transistor_size, float power) { sorted = false; } -bool sorter_PowerCallibSize(PowerCallibSize* a, PowerCallibSize* b) { - return a->transistor_size < b->transistor_size; -} +bool sorter_PowerCallibSize(PowerCallibSize* a, PowerCallibSize* b) { return a->transistor_size < b->transistor_size; } void PowerCallibInputs::sort_me() { sort(entries.begin(), entries.end(), sorter_PowerCallibSize); @@ -48,10 +45,8 @@ void PowerCallibInputs::sort_me() { void PowerCallibInputs::callibrate() { VTR_ASSERT(entries.size() >= 2); - for (std::vector::iterator it = entries.begin() + 1; - it != entries.end() - 1; it++) { - float est_power = parent->component_usage(num_inputs, - (*it)->transistor_size); + for (std::vector::iterator it = entries.begin() + 1; it != entries.end() - 1; it++) { + float est_power = parent->component_usage(num_inputs, (*it)->transistor_size); (*it)->factor = (*it)->power / est_power; } @@ -64,13 +59,11 @@ void PowerCallibInputs::callibrate() { done_callibration = true; } -PowerCallibSize* PowerCallibInputs::get_entry_bound(bool lower, - float transistor_size) { +PowerCallibSize* PowerCallibInputs::get_entry_bound(bool lower, float transistor_size) { PowerCallibSize* prev = entries[0]; VTR_ASSERT(sorted); - for (std::vector::iterator it = entries.begin() + 1; - it != entries.end(); it++) { + for (std::vector::iterator it = entries.begin() + 1; it != entries.end(); it++) { if ((*it)->transistor_size > transistor_size) { if (lower) return prev; @@ -124,13 +117,11 @@ PowerCallibInputs* PowerSpicedComponent::get_entry(int num_inputs) { } } -PowerCallibInputs* PowerSpicedComponent::get_entry_bound(bool lower, - int num_inputs) { +PowerCallibInputs* PowerSpicedComponent::get_entry_bound(bool lower, int num_inputs) { PowerCallibInputs* prev = entries[0]; VTR_ASSERT(sorted); - for (std::vector::iterator it = entries.begin() + 1; - it != entries.end(); it++) { + for (std::vector::iterator it = entries.begin() + 1; it != entries.end(); it++) { if ((*it)->num_inputs > num_inputs) { if (lower) { if (prev == entries[0]) @@ -156,8 +147,7 @@ void PowerSpicedComponent::add_data_point(int num_inputs, float transistor_size, sorted = false; } -float PowerSpicedComponent::scale_factor(int num_inputs, - float transistor_size) { +float PowerSpicedComponent::scale_factor(int num_inputs, float transistor_size) { PowerCallibInputs* inputs_lower; PowerCallibInputs* inputs_upper; @@ -184,8 +174,7 @@ float PowerSpicedComponent::scale_factor(int num_inputs, if (size_lower && size_upper) { perc_upper = (transistor_size - size_lower->transistor_size) / (size_upper->transistor_size - size_lower->transistor_size); - factor_lower = perc_upper * size_upper->factor - + (1 - perc_upper) * size_lower->factor; + factor_lower = perc_upper * size_upper->factor + (1 - perc_upper) * size_lower->factor; } else { VPR_FATAL_ERROR(VPR_ERROR_POWER, "Failed to interpolate transitor size"); } @@ -200,8 +189,7 @@ float PowerSpicedComponent::scale_factor(int num_inputs, if (size_lower && size_upper) { perc_upper = (transistor_size - size_lower->transistor_size) / (size_upper->transistor_size - size_lower->transistor_size); - factor_upper = perc_upper * size_upper->factor - + (1 - perc_upper) * size_lower->factor; + factor_upper = perc_upper * size_upper->factor + (1 - perc_upper) * size_lower->factor; } else { VPR_FATAL_ERROR(VPR_ERROR_POWER, "Failed to interpolate transitor size"); } @@ -214,22 +202,18 @@ float PowerSpicedComponent::scale_factor(int num_inputs, } else { /* Interpolation of factor between inputs */ perc_upper = ((float)(num_inputs - inputs_lower->num_inputs)) - / ((float)(inputs_upper->num_inputs - - inputs_lower->num_inputs)); + / ((float)(inputs_upper->num_inputs - inputs_lower->num_inputs)); factor = perc_upper * factor_upper + (1 - perc_upper) * factor_lower; } return factor; } -bool sorter_PowerCallibInputs(PowerCallibInputs* a, PowerCallibInputs* b) { - return a->num_inputs < b->num_inputs; -} +bool sorter_PowerCallibInputs(PowerCallibInputs* a, PowerCallibInputs* b) { return a->num_inputs < b->num_inputs; } void PowerSpicedComponent::sort_me() { sort(entries.begin(), entries.end(), sorter_PowerCallibInputs); - for (std::vector::iterator it = entries.begin(); - it != entries.end(); it++) { + for (std::vector::iterator it = entries.begin(); it != entries.end(); it++) { (*it)->sort_me(); } sorted = true; @@ -238,27 +222,21 @@ void PowerSpicedComponent::sort_me() { void PowerSpicedComponent::callibrate() { sort_me(); - for (std::vector::iterator it = entries.begin(); - it != entries.end(); it++) { + for (std::vector::iterator it = entries.begin(); it != entries.end(); it++) { (*it)->callibrate(); } done_callibration = true; } -bool PowerSpicedComponent::is_done_callibration() { - return done_callibration; -} +bool PowerSpicedComponent::is_done_callibration() { return done_callibration; } void PowerSpicedComponent::print(FILE* fp) { fprintf(fp, "%s\n", name.c_str()); - for (std::vector::iterator it = entries.begin() + 1; - it != entries.end() - 1; it++) { + for (std::vector::iterator it = entries.begin() + 1; it != entries.end() - 1; it++) { fprintf(fp, "Num Inputs: %d\n", (*it)->num_inputs); - for (std::vector::iterator it2 = (*it)->entries.begin() - + 1; - it2 != (*it)->entries.end() - 1; it2++) { - fprintf(fp, " Transistor Size: %6f Factor: %3f\n", - (*it2)->transistor_size, (*it2)->factor); + for (std::vector::iterator it2 = (*it)->entries.begin() + 1; it2 != (*it)->entries.end() - 1; + it2++) { + fprintf(fp, " Transistor Size: %6f Factor: %3f\n", (*it2)->transistor_size, (*it2)->factor); } } } diff --git a/vpr/src/power/PowerSpicedComponent.h b/vpr/src/power/PowerSpicedComponent.h index 57b43c309a1..464b7f3e9c3 100644 --- a/vpr/src/power/PowerSpicedComponent.h +++ b/vpr/src/power/PowerSpicedComponent.h @@ -33,11 +33,8 @@ class PowerCallibSize { PowerCallibSize(float size, float power_) : transistor_size(size) , power(power_) - , factor(0.) { - } - bool operator<(const PowerCallibSize& rhs) { - return transistor_size < rhs.transistor_size; - } + , factor(0.) {} + bool operator<(const PowerCallibSize& rhs) { return transistor_size < rhs.transistor_size; } }; class PowerCallibInputs { @@ -72,8 +69,7 @@ class PowerSpicedComponent { PowerCallibInputs* get_entry(int num_inputs); PowerCallibInputs* get_entry_bound(bool lower, int num_inputs); - PowerSpicedComponent(std::string component_name, - float (*usage_fn)(int num_inputs, float transistor_size)); + PowerSpicedComponent(std::string component_name, float (*usage_fn)(int num_inputs, float transistor_size)); ~PowerSpicedComponent(); void add_data_point(int num_inputs, float transistor_size, float power); diff --git a/vpr/src/power/power.cpp b/vpr/src/power/power.cpp index f2df57f8e88..e064340df92 100644 --- a/vpr/src/power/power.cpp +++ b/vpr/src/power/power.cpp @@ -66,14 +66,15 @@ static t_rr_node_power* rr_node_power; /************************* Function Declarations ********************/ /* Routing */ -static void power_usage_routing(t_power_usage* power_usage, - const t_det_routing_arch* routing_arch, - bool is_flat); +static void power_usage_routing(t_power_usage* power_usage, const t_det_routing_arch* routing_arch, bool is_flat); /* Tiles */ static void power_usage_blocks(t_power_usage* power_usage); static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node* pb_node, ClusterBlockId iblk); -static void power_usage_primitive(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node* pb_graph_node, ClusterBlockId iblk); +static void power_usage_primitive(t_power_usage* power_usage, + t_pb* pb, + t_pb_graph_node* pb_graph_node, + ClusterBlockId iblk); static void power_reset_tile_usage(); static void power_reset_pb_type(t_pb_type* pb_type); static void power_usage_local_buffers_and_wires(t_power_usage* power_usage, @@ -82,10 +83,8 @@ static void power_usage_local_buffers_and_wires(t_power_usage* power_usage, ClusterBlockId iblk); /* Clock */ -static void power_usage_clock(t_power_usage* power_usage, - t_clock_arch* clock_arch); -static void power_usage_clock_single(t_power_usage* power_usage, - t_clock_network* clock_inf); +static void power_usage_clock(t_power_usage* power_usage, t_clock_arch* clock_arch); +static void power_usage_clock_single(t_power_usage* power_usage, t_clock_network* clock_inf); /* Init/Uninit */ static void dealloc_mux_graph(t_mux_node* node); @@ -96,7 +95,14 @@ static void power_print_breakdown_pb_rec(FILE* fp, t_pb_type* pb_type, int inden static void power_print_summary(FILE* fp, const t_vpr_setup& vpr_setup); //static void power_print_stats(FILE * fp); static void power_print_breakdown_summary(FILE* fp); -static void power_print_breakdown_entry(FILE* fp, int indent, e_power_breakdown_entry_type type, const char* name, float power, float total_power, float perc_dyn, const char* method); +static void power_print_breakdown_entry(FILE* fp, + int indent, + e_power_breakdown_entry_type type, + const char* name, + float power, + float total_power, + float perc_dyn, + const char* method); static void power_print_breakdown_component(FILE* fp, const char* name, e_power_component_type type, int indent_level); static void power_print_breakdown_pb(FILE* fp); @@ -125,7 +131,10 @@ void power_routing_init(const t_det_routing_arch* routing_arch); * - calc_dynamic: Calculate dynamic power? Otherwise ignore * - calc_static: Calculate static power? Otherwise ignore */ -static void power_usage_primitive(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node* pb_graph_node, ClusterBlockId iblk) { +static void power_usage_primitive(t_power_usage* power_usage, + t_pb* pb, + t_pb_graph_node* pb_graph_node, + ClusterBlockId iblk) { t_power_usage sub_power_usage; power_zero_usage(power_usage); @@ -165,13 +174,11 @@ static void power_usage_primitive(t_power_usage* power_usage, t_pb* pb, t_pb_gra if (pb) { AtomBlockId blk_id = atom_ctx.lookup.pb_atom(pb); - SRAM_values = alloc_SRAM_values_from_truth_table(LUT_size, - atom_ctx.nlist.block_truth_table(blk_id)); + SRAM_values = alloc_SRAM_values_from_truth_table(LUT_size, atom_ctx.nlist.block_truth_table(blk_id)); } else { SRAM_values = alloc_SRAM_values_from_truth_table(LUT_size, AtomNetlist::TruthTable()); } - power_usage_lut(&sub_power_usage, LUT_size, - power_ctx.arch->LUT_transistor_size, SRAM_values, + power_usage_lut(&sub_power_usage, LUT_size, power_ctx.arch->LUT_transistor_size, SRAM_values, input_probabilities, input_densities, power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); delete[] input_probabilities; @@ -197,18 +204,16 @@ static void power_usage_primitive(t_power_usage* power_usage, t_pb* pb, t_pb_gra clk_prob = device_ctx.clock_arch->clock_inf[0].prob; clk_dens = device_ctx.clock_arch->clock_inf[0].dens; - power_usage_ff(&sub_power_usage, power_ctx.arch->FF_size, D_prob, D_dens, - Q_prob, Q_dens, clk_prob, clk_dens, power_ctx.solution_inf.T_crit); + power_usage_ff(&sub_power_usage, power_ctx.arch->FF_size, D_prob, D_dens, Q_prob, Q_dens, clk_prob, clk_dens, + power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); } else { char msg[vtr::bufsize]; - sprintf(msg, "No dynamic power defined for BLIF model: %s", - pb_graph_node->pb_type->blif_model); + sprintf(msg, "No dynamic power defined for BLIF model: %s", pb_graph_node->pb_type->blif_model); power_log_msg(POWER_LOG_WARNING, msg); - sprintf(msg, "No leakage power defined for BLIF model: %s", - pb_graph_node->pb_type->blif_model); + sprintf(msg, "No leakage power defined for BLIF model: %s", pb_graph_node->pb_type->blif_model); power_log_msg(POWER_LOG_WARNING, msg); } } @@ -229,8 +234,7 @@ void power_usage_local_pin_toggle(t_power_usage* power_usage, t_pb* pb, t_pb_gra } /* Divide by 2 because density is switches/cycle, but a toggle is 2 switches */ - power_usage->dynamic += scale_factor - * pin->port->port_power->energy_per_toggle * pin_dens(pb, pin, iblk) / 2.0 + power_usage->dynamic += scale_factor * pin->port->port_power->energy_per_toggle * pin_dens(pb, pin, iblk) / 2.0 / power_ctx.solution_inf.T_crit; } @@ -247,15 +251,14 @@ void power_usage_local_pin_buffer_and_wire(t_power_usage* power_usage, /* Wire switching */ C_wire = pin->pin_power->C_wire; - power_usage_wire(&sub_power_usage, C_wire, pin_dens(pb, pin, iblk), - power_ctx.solution_inf.T_crit); + power_usage_wire(&sub_power_usage, C_wire, pin_dens(pb, pin, iblk), power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); /* Buffer power */ buffer_size = pin->pin_power->buffer_size; if (buffer_size) { - power_usage_buffer(&sub_power_usage, buffer_size, pin_prob(pb, pin, iblk), - pin_dens(pb, pin, iblk), false, power_ctx.solution_inf.T_crit); + power_usage_buffer(&sub_power_usage, buffer_size, pin_prob(pb, pin, iblk), pin_dens(pb, pin, iblk), false, + power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); } } @@ -272,30 +275,24 @@ static void power_usage_local_buffers_and_wires(t_power_usage* power_usage, /* Input pins */ for (port_idx = 0; port_idx < pb_node->num_input_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_input_pins[port_idx]; - pin_idx++) { - power_usage_local_pin_buffer_and_wire(&pin_power, pb, - &pb_node->input_pins[port_idx][pin_idx], iblk); + for (pin_idx = 0; pin_idx < pb_node->num_input_pins[port_idx]; pin_idx++) { + power_usage_local_pin_buffer_and_wire(&pin_power, pb, &pb_node->input_pins[port_idx][pin_idx], iblk); power_add_usage(power_usage, &pin_power); } } /* Output pins */ for (port_idx = 0; port_idx < pb_node->num_output_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_output_pins[port_idx]; - pin_idx++) { - power_usage_local_pin_buffer_and_wire(&pin_power, pb, - &pb_node->output_pins[port_idx][pin_idx], iblk); + for (pin_idx = 0; pin_idx < pb_node->num_output_pins[port_idx]; pin_idx++) { + power_usage_local_pin_buffer_and_wire(&pin_power, pb, &pb_node->output_pins[port_idx][pin_idx], iblk); power_add_usage(power_usage, &pin_power); } } /* Clock pins */ for (port_idx = 0; port_idx < pb_node->num_clock_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_clock_pins[port_idx]; - pin_idx++) { - power_usage_local_pin_buffer_and_wire(&pin_power, pb, - &pb_node->clock_pins[port_idx][pin_idx], iblk); + for (pin_idx = 0; pin_idx < pb_node->num_clock_pins[port_idx]; pin_idx++) { + power_usage_local_pin_buffer_and_wire(&pin_power, pb, &pb_node->clock_pins[port_idx][pin_idx], iblk); power_add_usage(power_usage, &pin_power); } } @@ -354,8 +351,7 @@ static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node case POWER_METHOD_ABSOLUTE: power_add_usage(power_usage, &pb_power->absolute_power_per_instance); - power_component_add_usage(&pb_power->absolute_power_per_instance, - POWER_COMPONENT_PB_OTHER); + power_component_add_usage(&pb_power->absolute_power_per_instance, POWER_COMPONENT_PB_OTHER); break; case POWER_METHOD_C_INTERNAL: @@ -368,19 +364,16 @@ static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node num_pins = 0; dens_avg = 0.; for (port_idx = 0; port_idx < pb_node->num_input_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_input_pins[port_idx]; - pin_idx++) { - dens_avg += pin_dens(pb, - &pb_node->input_pins[port_idx][pin_idx], iblk); + for (pin_idx = 0; pin_idx < pb_node->num_input_pins[port_idx]; pin_idx++) { + dens_avg += pin_dens(pb, &pb_node->input_pins[port_idx][pin_idx], iblk); num_pins++; } } if (num_pins != 0) { dens_avg = dens_avg / num_pins; } - power_usage_sub.dynamic += power_calc_node_switching(pb_power->C_internal, - dens_avg, - power_ctx.solution_inf.T_crit); + power_usage_sub.dynamic + += power_calc_node_switching(pb_power->C_internal, dens_avg, power_ctx.solution_inf.T_crit); /* Leakage is an absolute */ power_usage_sub.leakage += pb_power->absolute_power_per_instance.leakage; @@ -397,33 +390,27 @@ static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node /* Add toggle power of each input pin */ for (port_idx = 0; port_idx < pb_node->num_input_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_input_pins[port_idx]; - pin_idx++) { + for (pin_idx = 0; pin_idx < pb_node->num_input_pins[port_idx]; pin_idx++) { t_power_usage pin_power; - power_usage_local_pin_toggle(&pin_power, pb, - &pb_node->input_pins[port_idx][pin_idx], iblk); + power_usage_local_pin_toggle(&pin_power, pb, &pb_node->input_pins[port_idx][pin_idx], iblk); power_add_usage(&power_usage_pin_toggle, &pin_power); } } /* Add toggle power of each output pin */ for (port_idx = 0; port_idx < pb_node->num_output_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_output_pins[port_idx]; - pin_idx++) { + for (pin_idx = 0; pin_idx < pb_node->num_output_pins[port_idx]; pin_idx++) { t_power_usage pin_power; - power_usage_local_pin_toggle(&pin_power, pb, - &pb_node->output_pins[port_idx][pin_idx], iblk); + power_usage_local_pin_toggle(&pin_power, pb, &pb_node->output_pins[port_idx][pin_idx], iblk); power_add_usage(&power_usage_pin_toggle, &pin_power); } } /* Add toggle power of each clock pin */ for (port_idx = 0; port_idx < pb_node->num_clock_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_clock_pins[port_idx]; - pin_idx++) { + for (pin_idx = 0; pin_idx < pb_node->num_clock_pins[port_idx]; pin_idx++) { t_power_usage pin_power; - power_usage_local_pin_toggle(&pin_power, pb, - &pb_node->clock_pins[port_idx][pin_idx], iblk); + power_usage_local_pin_toggle(&pin_power, pb, &pb_node->clock_pins[port_idx][pin_idx], iblk); power_add_usage(&power_usage_pin_toggle, &pin_power); } } @@ -435,8 +422,7 @@ static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node power_add_usage(power_usage, &power_usage_pin_toggle); // Add to component type power - power_component_add_usage(&power_usage_pin_toggle, - POWER_COMPONENT_PB_OTHER); + power_component_add_usage(&power_usage_pin_toggle, POWER_COMPONENT_PB_OTHER); break; case POWER_METHOD_SPECIFY_SIZES: estimate_buffers_and_wire = true; @@ -474,8 +460,7 @@ static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node power_add_usage(power_usage, &power_usage_sub); // Add to power of component type - power_component_add_usage(&power_usage_sub, - POWER_COMPONENT_PB_PRIMITIVES); + power_component_add_usage(&power_usage_sub, POWER_COMPONENT_PB_PRIMITIVES); } } else { @@ -487,47 +472,35 @@ static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node if (estimate_buffers_and_wire) { /* Check pins of all interconnect */ - power_usage_local_buffers_and_wires(&power_usage_bufs_wires, pb, - pb_node, iblk); - power_component_add_usage(&power_usage_bufs_wires, - POWER_COMPONENT_PB_BUFS_WIRE); - power_add_usage(&pb_node->pb_type->pb_type_power->power_usage_bufs_wires, - &power_usage_bufs_wires); + power_usage_local_buffers_and_wires(&power_usage_bufs_wires, pb, pb_node, iblk); + power_component_add_usage(&power_usage_bufs_wires, POWER_COMPONENT_PB_BUFS_WIRE); + power_add_usage(&pb_node->pb_type->pb_type_power->power_usage_bufs_wires, &power_usage_bufs_wires); power_add_usage(power_usage, &power_usage_bufs_wires); } /* Interconnect Structures (multiplexers) */ if (estimate_multiplexers) { power_zero_usage(&power_usage_local_muxes); - for (interc_idx = 0; - interc_idx < pb_type->modes[pb_mode].num_interconnect; - interc_idx++) { - power_usage_local_interc_mux(&power_usage_sub, pb, - &pb_node->interconnect_pins[pb_mode][interc_idx], iblk); + for (interc_idx = 0; interc_idx < pb_type->modes[pb_mode].num_interconnect; interc_idx++) { + power_usage_local_interc_mux(&power_usage_sub, pb, &pb_node->interconnect_pins[pb_mode][interc_idx], + iblk); power_add_usage(&power_usage_local_muxes, &power_usage_sub); } // Add to power of this PB power_add_usage(power_usage, &power_usage_local_muxes); // Add to component type power - power_component_add_usage(&power_usage_local_muxes, - POWER_COMPONENT_PB_INTERC_MUXES); + power_component_add_usage(&power_usage_local_muxes, POWER_COMPONENT_PB_INTERC_MUXES); // Add to power of this mode - power_add_usage(&pb_node->pb_type->modes[pb_mode].mode_power->power_usage, - &power_usage_local_muxes); + power_add_usage(&pb_node->pb_type->modes[pb_mode].mode_power->power_usage, &power_usage_local_muxes); } /* Add power for children */ if (recursive_children) { power_zero_usage(&power_usage_children); - for (pb_type_idx = 0; - pb_type_idx - < pb_node->pb_type->modes[pb_mode].num_pb_type_children; - pb_type_idx++) { - for (pb_idx = 0; - pb_idx - < pb_node->pb_type->modes[pb_mode].pb_type_children[pb_type_idx].num_pb; + for (pb_type_idx = 0; pb_type_idx < pb_node->pb_type->modes[pb_mode].num_pb_type_children; pb_type_idx++) { + for (pb_idx = 0; pb_idx < pb_node->pb_type->modes[pb_mode].pb_type_children[pb_type_idx].num_pb; pb_idx++) { t_pb* child_pb = nullptr; t_pb_graph_node* child_pb_graph_node; @@ -538,8 +511,7 @@ static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node } child_pb_graph_node = &pb_node->child_pb_graph_nodes[pb_mode][pb_type_idx][pb_idx]; - power_usage_pb(&power_usage_sub, child_pb, - child_pb_graph_node, iblk); + power_usage_pb(&power_usage_sub, child_pb, child_pb_graph_node, iblk); power_add_usage(&power_usage_children, &power_usage_sub); } } @@ -547,8 +519,7 @@ static void power_usage_pb(t_power_usage* power_usage, t_pb* pb, t_pb_graph_node power_add_usage(power_usage, &power_usage_children); // Add to power of this mode - power_add_usage(&pb_node->pb_type->modes[pb_mode].mode_power->power_usage, - &power_usage_children); + power_add_usage(&pb_node->pb_type->modes[pb_mode].mode_power->power_usage, &power_usage_children); } } @@ -567,14 +538,10 @@ static void power_reset_pb_type(t_pb_type* pb_type) { for (mode_idx = 0; mode_idx < pb_type->num_modes; mode_idx++) { power_zero_usage(&pb_type->modes[mode_idx].mode_power->power_usage); - for (child_idx = 0; - child_idx < pb_type->modes[mode_idx].num_pb_type_children; - child_idx++) { + for (child_idx = 0; child_idx < pb_type->modes[mode_idx].num_pb_type_children; child_idx++) { power_reset_pb_type(&pb_type->modes[mode_idx].pb_type_children[child_idx]); } - for (interc_idx = 0; - interc_idx < pb_type->modes[mode_idx].num_interconnect; - interc_idx++) { + for (interc_idx = 0; interc_idx < pb_type->modes[mode_idx].num_interconnect; interc_idx++) { power_zero_usage(&pb_type->modes[mode_idx].interconnect[interc_idx].interconnect_power->power_usage); } } @@ -615,9 +582,7 @@ static void power_usage_blocks(t_power_usage* power_usage) { int width_offset = device_ctx.grid.get_width_offset({x, y, layer_num}); int height_offset = device_ctx.grid.get_height_offset({x, y, layer_num}); - if ((width_offset != 0) - || (height_offset != 0) - || is_empty_type(physical_tile)) { + if ((width_offset != 0) || (height_offset != 0) || is_empty_type(physical_tile)) { continue; } @@ -646,8 +611,7 @@ static void power_usage_blocks(t_power_usage* power_usage) { /** * Calculates the total power usage from the clock network */ -static void power_usage_clock(t_power_usage* power_usage, - t_clock_arch* clock_arch) { +static void power_usage_clock(t_power_usage* power_usage, t_clock_arch* clock_arch) { int clock_idx; auto& power_ctx = g_vpr_ctx.power(); @@ -660,8 +624,7 @@ static void power_usage_clock(t_power_usage* power_usage, return; } - for (clock_idx = 0; clock_idx < clock_arch->num_global_clocks; - clock_idx++) { + for (clock_idx = 0; clock_idx < clock_arch->num_global_clocks; clock_idx++) { t_power_usage clock_power; /* Assume the global clock is active even for combinational circuits */ @@ -675,8 +638,7 @@ static void power_usage_clock(t_power_usage* power_usage, } } /* find the power dissipated by each clock network */ - power_usage_clock_single(&clock_power, - &clock_arch->clock_inf[clock_idx]); + power_usage_clock_single(&clock_power, &clock_arch->clock_inf[clock_idx]); power_add_usage(power_usage, &clock_power); } @@ -686,8 +648,7 @@ static void power_usage_clock(t_power_usage* power_usage, /** * Calculates the power from a single spine-and-rib global clock */ -static void power_usage_clock_single(t_power_usage* power_usage, - t_clock_network* single_clock) { +static void power_usage_clock_single(t_power_usage* power_usage, t_clock_network* single_clock) { /* * * The following code assumes a spine-and-rib clock network as shown below. @@ -734,8 +695,8 @@ static void power_usage_clock_single(t_power_usage* power_usage, } /* Calculate the capacitance and leakage power for the clock buffer */ - power_usage_inverter(&clock_buffer_power, single_clock->dens, - single_clock->prob, buffer_size, single_clock->period); + power_usage_inverter(&clock_buffer_power, single_clock->dens, single_clock->prob, buffer_size, + single_clock->period); length = 0; @@ -755,8 +716,7 @@ static void power_usage_clock_single(t_power_usage* power_usage, power_add_usage(power_usage, &buffer_power); power_component_add_usage(&buffer_power, POWER_COMPONENT_CLOCK_BUFFER); - power_usage_wire(&wire_power, length * C_segment, single_clock->dens, - single_clock->period); + power_usage_wire(&wire_power, length * C_segment, single_clock->dens, single_clock->period); power_add_usage(power_usage, &wire_power); power_component_add_usage(&wire_power, POWER_COMPONENT_CLOCK_WIRE); @@ -784,9 +744,7 @@ static void dealloc_mux_graph_rec(t_mux_node* node) { /** * Calculates the power of the entire routing fabric (not local routing */ -static void power_usage_routing(t_power_usage* power_usage, - const t_det_routing_arch* routing_arch, - bool is_flat) { +static void power_usage_routing(t_power_usage* power_usage, const t_det_routing_arch* routing_arch, bool is_flat) { auto& power_ctx = g_vpr_ctx.power(); auto& cluster_ctx = g_vpr_ctx.clustering(); auto& device_ctx = g_vpr_ctx.device(); @@ -843,13 +801,13 @@ static void power_usage_routing(t_power_usage* power_usage, if (next_node_power->net_num == node_power->net_num) { next_node_power->selected_input = next_node_power->num_inputs; } - next_node_power->in_dens[next_node_power->num_inputs] = clb_net_density(node_power->net_num); + next_node_power->in_dens[next_node_power->num_inputs] + = clb_net_density(node_power->net_num); next_node_power->in_prob[next_node_power->num_inputs] = clb_net_prob(node_power->net_num); next_node_power->num_inputs++; const t_edge_size next_node_fan_in = rr_graph.node_fan_in(RRNodeId(next_node_id)); if (next_node_power->num_inputs > next_node_fan_in) { - VTR_LOG("%d %d\n", next_node_power->num_inputs, - next_node_fan_in); + VTR_LOG("%d %d\n", next_node_power->num_inputs, next_node_fan_in); fflush(nullptr); VTR_ASSERT(0); } @@ -893,14 +851,11 @@ static void power_usage_routing(t_power_usage* power_usage, /* Multiplexor */ power_usage_mux_multilevel(&sub_power_usage, - power_get_mux_arch(node_fan_in, - power_ctx.arch->mux_transistor_size), - node_power->in_prob, node_power->in_dens, - node_power->selected_input, true, - power_ctx.solution_inf.T_crit); + power_get_mux_arch(node_fan_in, power_ctx.arch->mux_transistor_size), + node_power->in_prob, node_power->in_dens, node_power->selected_input, + true, power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); - power_component_add_usage(&sub_power_usage, - POWER_COMPONENT_ROUTE_CB); + power_component_add_usage(&sub_power_usage, POWER_COMPONENT_ROUTE_CB); } break; case CHANX: @@ -926,13 +881,11 @@ static void power_usage_routing(t_power_usage* power_usage, /* Multiplexor */ power_usage_mux_multilevel(&sub_power_usage, - power_get_mux_arch(node_fan_in, - power_ctx.arch->mux_transistor_size), - node_power->in_prob, node_power->in_dens, - node_power->selected_input, true, power_ctx.solution_inf.T_crit); + power_get_mux_arch(node_fan_in, power_ctx.arch->mux_transistor_size), + node_power->in_prob, node_power->in_dens, node_power->selected_input, true, + power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); - power_component_add_usage(&sub_power_usage, - POWER_COMPONENT_ROUTE_SB); + power_component_add_usage(&sub_power_usage, POWER_COMPONENT_ROUTE_SB); /* Buffer Size */ switch (rr_graph.rr_switch_inf(RRSwitchId(node_power->driver_switch_type)).power_buffer_type) { @@ -945,10 +898,12 @@ static void power_usage_routing(t_power_usage* power_usage, * C_per_seg_split); * buffer_size = std::max(buffer_size, 1.0F); */ - buffer_size = power_calc_buffer_size_from_Cout(rr_graph.rr_switch_inf(RRSwitchId(node_power->driver_switch_type)).Cout); + buffer_size = power_calc_buffer_size_from_Cout( + rr_graph.rr_switch_inf(RRSwitchId(node_power->driver_switch_type)).Cout); break; case POWER_BUFFER_TYPE_ABSOLUTE_SIZE: - buffer_size = rr_graph.rr_switch_inf(RRSwitchId(node_power->driver_switch_type)).power_buffer_size; + buffer_size + = rr_graph.rr_switch_inf(RRSwitchId(node_power->driver_switch_type)).power_buffer_size; buffer_size = std::max(buffer_size, 1.0F); break; case POWER_BUFFER_TYPE_NONE: @@ -971,20 +926,17 @@ static void power_usage_routing(t_power_usage* power_usage, */ /* Buffer */ - power_usage_buffer(&sub_power_usage, buffer_size, - node_power->in_prob[node_power->selected_input], + power_usage_buffer(&sub_power_usage, buffer_size, node_power->in_prob[node_power->selected_input], node_power->in_dens[node_power->selected_input], true, power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); - power_component_add_usage(&sub_power_usage, - POWER_COMPONENT_ROUTE_SB); + power_component_add_usage(&sub_power_usage, POWER_COMPONENT_ROUTE_SB); /* Wire Capacitance */ - power_usage_wire(&sub_power_usage, C_wire, - clb_net_density(node_power->net_num), power_ctx.solution_inf.T_crit); + power_usage_wire(&sub_power_usage, C_wire, clb_net_density(node_power->net_num), + power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); - power_component_add_usage(&sub_power_usage, - POWER_COMPONENT_ROUTE_GLB_WIRE); + power_component_add_usage(&sub_power_usage, POWER_COMPONENT_ROUTE_GLB_WIRE); /* Determine types of switches that this wire drives */ connectionbox_fanout = 0; @@ -1001,27 +953,25 @@ static void power_usage_routing(t_power_usage* power_usage, /* Buffer to next Switchbox */ if (switchbox_fanout) { - buffer_size = power_buffer_size_from_logical_effort(switchbox_fanout * power_ctx.commonly_used->NMOS_1X_C_d); - power_usage_buffer(&sub_power_usage, buffer_size, - 1 - node_power->in_prob[node_power->selected_input], - node_power->in_dens[node_power->selected_input], false, - power_ctx.solution_inf.T_crit); + buffer_size = power_buffer_size_from_logical_effort(switchbox_fanout + * power_ctx.commonly_used->NMOS_1X_C_d); + power_usage_buffer( + &sub_power_usage, buffer_size, 1 - node_power->in_prob[node_power->selected_input], + node_power->in_dens[node_power->selected_input], false, power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); - power_component_add_usage(&sub_power_usage, - POWER_COMPONENT_ROUTE_SB); + power_component_add_usage(&sub_power_usage, POWER_COMPONENT_ROUTE_SB); } /* Driver for ConnectionBox */ if (connectionbox_fanout) { - buffer_size = power_buffer_size_from_logical_effort(connectionbox_fanout * power_ctx.commonly_used->NMOS_1X_C_d); + buffer_size = power_buffer_size_from_logical_effort(connectionbox_fanout + * power_ctx.commonly_used->NMOS_1X_C_d); - power_usage_buffer(&sub_power_usage, buffer_size, - 1 - node_power->in_prob[node_power->selected_input], - node_power->in_dens[node_power->selected_input], - false, power_ctx.solution_inf.T_crit); + power_usage_buffer( + &sub_power_usage, buffer_size, 1 - node_power->in_prob[node_power->selected_input], + node_power->in_dens[node_power->selected_input], false, power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &sub_power_usage); - power_component_add_usage(&sub_power_usage, - POWER_COMPONENT_ROUTE_CB); + power_component_add_usage(&sub_power_usage, POWER_COMPONENT_ROUTE_CB); power_ctx.commonly_used->num_cb_buffers++; power_ctx.commonly_used->total_cb_buffer_size += buffer_size; @@ -1029,8 +979,7 @@ static void power_usage_routing(t_power_usage* power_usage, break; } default: - power_log_msg(POWER_LOG_WARNING, - "The global routing-resource graph contains an unknown node type."); + power_log_msg(POWER_LOG_WARNING, "The global routing-resource graph contains an unknown node type."); break; } } @@ -1060,7 +1009,8 @@ void power_alloc_and_init_pb_pin(t_pb_graph_pin* pin) { found = false; for (port_idx = 0; port_idx < node->num_input_ports; port_idx++) { if (node->input_pins[port_idx][0].port == port_to_find) { - pin->pin_power->scaled_by_pin = &node->input_pins[port_idx][pin->port->port_power->scaled_by_port_pin_idx]; + pin->pin_power->scaled_by_pin + = &node->input_pins[port_idx][pin->port->port_power->scaled_by_port_pin_idx]; found = true; break; } @@ -1068,7 +1018,8 @@ void power_alloc_and_init_pb_pin(t_pb_graph_pin* pin) { if (!found) { for (port_idx = 0; port_idx < node->num_output_ports; port_idx++) { if (node->output_pins[port_idx][0].port == port_to_find) { - pin->pin_power->scaled_by_pin = &node->output_pins[port_idx][pin->port->port_power->scaled_by_port_pin_idx]; + pin->pin_power->scaled_by_pin + = &node->output_pins[port_idx][pin->port->port_power->scaled_by_port_pin_idx]; found = true; break; } @@ -1077,7 +1028,8 @@ void power_alloc_and_init_pb_pin(t_pb_graph_pin* pin) { if (!found) { for (port_idx = 0; port_idx < node->num_clock_ports; port_idx++) { if (node->clock_pins[port_idx][0].port == port_to_find) { - pin->pin_power->scaled_by_pin = &node->clock_pins[port_idx][pin->port->port_power->scaled_by_port_pin_idx]; + pin->pin_power->scaled_by_pin + = &node->clock_pins[port_idx][pin->port->port_power->scaled_by_port_pin_idx]; found = true; break; } @@ -1198,7 +1150,8 @@ void power_routing_init(const t_det_routing_arch* routing_arch) { power_ctx.clb_net_power.resize(cluster_ctx.clb_nlist.nets().size()); } for (auto net_id : cluster_ctx.clb_nlist.nets()) { - power_ctx.clb_net_power[net_id].probability = power_ctx.atom_net_power[atom_ctx.lookup.atom_net(net_id)].probability; + power_ctx.clb_net_power[net_id].probability + = power_ctx.atom_net_power[atom_ctx.lookup.atom_net(net_id)].probability; power_ctx.clb_net_power[net_id].density = power_ctx.atom_net_power[atom_ctx.lookup.atom_net(net_id)].density; } @@ -1242,8 +1195,7 @@ void power_routing_init(const t_det_routing_arch* routing_arch) { fanout_to_seg++; } } - max_seg_to_IPIN_fanout = std::max(max_seg_to_IPIN_fanout, - fanout_to_IPIN); + max_seg_to_IPIN_fanout = std::max(max_seg_to_IPIN_fanout, fanout_to_IPIN); max_seg_to_seg_fanout = std::max(max_seg_to_seg_fanout, fanout_to_seg); max_fanin = std::max(max_fanin, node_fan_in); @@ -1273,9 +1225,11 @@ void power_routing_init(const t_det_routing_arch* routing_arch) { for (t_edge_size edge_idx = 0; edge_idx < rr_graph.num_edges(rr_node_idx); edge_idx++) { if (size_t(rr_graph.edge_sink_node(rr_node_idx, edge_idx))) { if (rr_node_power[size_t(rr_graph.edge_sink_node(rr_node_idx, edge_idx))].driver_switch_type == OPEN) { - rr_node_power[size_t(rr_graph.edge_sink_node(rr_node_idx, edge_idx))].driver_switch_type = rr_graph.edge_switch(rr_node_idx, edge_idx); + rr_node_power[size_t(rr_graph.edge_sink_node(rr_node_idx, edge_idx))].driver_switch_type + = rr_graph.edge_switch(rr_node_idx, edge_idx); } else { - VTR_ASSERT(rr_node_power[size_t(rr_graph.edge_sink_node(rr_node_idx, edge_idx))].driver_switch_type == rr_graph.edge_switch(rr_node_idx, edge_idx)); + VTR_ASSERT(rr_node_power[size_t(rr_graph.edge_sink_node(rr_node_idx, edge_idx))].driver_switch_type + == rr_graph.edge_switch(rr_node_idx, edge_idx)); } } } @@ -1612,15 +1566,14 @@ static void power_print_breakdown_pb_rec(FILE* fp, t_pb_type* pb_type, int inden strncpy(buf + indent, pb_type->name, 50 - indent); buf[50] = '\0'; buf[strlen((pb_type->name)) + indent] = '\0'; - power_print_breakdown_entry(fp, indent, POWER_BREAKDOWN_ENTRY_TYPE_PB, - pb_type->name, power_sum_usage(&pb_power->power_usage), total_power, + power_print_breakdown_entry(fp, indent, POWER_BREAKDOWN_ENTRY_TYPE_PB, pb_type->name, + power_sum_usage(&pb_power->power_usage), total_power, power_perc_dynamic(&pb_power->power_usage), power_estimation_method_name(pb_type->pb_type_power->estimation_method)); if (power_method_is_transistor_level(pb_type->pb_type_power->estimation_method)) { /* Local bufs and wires */ - power_print_breakdown_entry(fp, indent + 1, - POWER_BREAKDOWN_ENTRY_TYPE_BUFS_WIRES, "Bufs/Wires", + power_print_breakdown_entry(fp, indent + 1, POWER_BREAKDOWN_ENTRY_TYPE_BUFS_WIRES, "Bufs/Wires", power_sum_usage(&pb_power->power_usage_bufs_wires), total_power, power_perc_dynamic(&pb_power->power_usage_bufs_wires), nullptr); } @@ -1636,12 +1589,9 @@ static void power_print_breakdown_pb_rec(FILE* fp, t_pb_type* pb_type, int inden mode = &pb_type->modes[mode_idx]; if (pb_type->num_modes > 1) { - power_print_breakdown_entry(fp, indent + 1, - POWER_BREAKDOWN_ENTRY_TYPE_MODE, mode->name, - power_sum_usage(&mode->mode_power->power_usage), - total_power, - power_perc_dynamic(&mode->mode_power->power_usage), - nullptr); + power_print_breakdown_entry(fp, indent + 1, POWER_BREAKDOWN_ENTRY_TYPE_MODE, mode->name, + power_sum_usage(&mode->mode_power->power_usage), total_power, + power_perc_dynamic(&mode->mode_power->power_usage), nullptr); } /* Interconnect Power */ @@ -1649,41 +1599,31 @@ static void power_print_breakdown_pb_rec(FILE* fp, t_pb_type* pb_type, int inden /* Sum the interconnect */ if (power_method_is_transistor_level(est_method)) { - for (interc_idx = 0; interc_idx < mode->num_interconnect; - interc_idx++) { - power_add_usage(&interc_usage, - &mode->interconnect[interc_idx].interconnect_power->power_usage); + for (interc_idx = 0; interc_idx < mode->num_interconnect; interc_idx++) { + power_add_usage(&interc_usage, &mode->interconnect[interc_idx].interconnect_power->power_usage); } if (mode->num_interconnect) { - power_print_breakdown_entry(fp, child_indent, - POWER_BREAKDOWN_ENTRY_TYPE_INTERC, "Interc:", - power_sum_usage(&interc_usage), total_power, + power_print_breakdown_entry(fp, child_indent, POWER_BREAKDOWN_ENTRY_TYPE_INTERC, + "Interc:", power_sum_usage(&interc_usage), total_power, power_perc_dynamic(&interc_usage), nullptr); } /* Print Interconnect Breakdown */ - for (interc_idx = 0; interc_idx < mode->num_interconnect; - interc_idx++) { + for (interc_idx = 0; interc_idx < mode->num_interconnect; interc_idx++) { t_interconnect* interc = &mode->interconnect[interc_idx]; if (interc->type == DIRECT_INTERC) { // no power - skip } else { - power_print_breakdown_entry(fp, child_indent + 1, - POWER_BREAKDOWN_ENTRY_TYPE_INTERC, interc->name, - power_sum_usage(&interc->interconnect_power->power_usage), - total_power, - power_perc_dynamic(&interc->interconnect_power->power_usage), - nullptr); + power_print_breakdown_entry( + fp, child_indent + 1, POWER_BREAKDOWN_ENTRY_TYPE_INTERC, interc->name, + power_sum_usage(&interc->interconnect_power->power_usage), total_power, + power_perc_dynamic(&interc->interconnect_power->power_usage), nullptr); } } } - for (child_idx = 0; - child_idx < pb_type->modes[mode_idx].num_pb_type_children; - child_idx++) { - power_print_breakdown_pb_rec(fp, - &pb_type->modes[mode_idx].pb_type_children[child_idx], - child_indent); + for (child_idx = 0; child_idx < pb_type->modes[mode_idx].num_pb_type_children; child_idx++) { + power_print_breakdown_pb_rec(fp, &pb_type->modes[mode_idx].pb_type_children[child_idx], child_indent); } } } @@ -1693,11 +1633,9 @@ static void power_print_summary(FILE* fp, const t_vpr_setup& vpr_setup) { auto& power_ctx = g_vpr_ctx.power(); auto& device_ctx = g_vpr_ctx.device(); - fprintf(power_ctx.output->out, "Circuit: %s\n", - vpr_setup.FileNameOpts.CircuitName.c_str()); + fprintf(power_ctx.output->out, "Circuit: %s\n", vpr_setup.FileNameOpts.CircuitName.c_str()); fprintf(power_ctx.output->out, "Architecture: %s\n", vtr::basename(vpr_setup.FileNameOpts.ArchFile).c_str()); - fprintf(fp, "Technology (nm): %.0f\n", - power_ctx.tech->tech_size * CONVERT_NM_PER_M); + fprintf(fp, "Technology (nm): %.0f\n", power_ctx.tech->tech_size * CONVERT_NM_PER_M); fprintf(fp, "Voltage: %.2f\n", power_ctx.tech->Vdd); fprintf(fp, "Temperature: %g\n", power_ctx.tech->temperature); fprintf(fp, "Critical Path: %g\n", power_ctx.solution_inf.T_crit); @@ -1712,7 +1650,10 @@ static void power_print_summary(FILE* fp, const t_vpr_setup& vpr_setup) { * and prints it to the output file * - run_time_s: (Return value) The total runtime in seconds (us accuracy) */ -e_power_ret_code power_total(float* run_time_s, const t_vpr_setup& vpr_setup, const t_arch* arch, const t_det_routing_arch* routing_arch) { +e_power_ret_code power_total(float* run_time_s, + const t_vpr_setup& vpr_setup, + const t_arch* arch, + const t_det_routing_arch* routing_arch) { t_power_usage total_power; t_power_usage sub_power_usage; clock_t t_start; @@ -1725,8 +1666,7 @@ e_power_ret_code power_total(float* run_time_s, const t_vpr_setup& vpr_setup, co power_zero_usage(&total_power); if (routing_arch->directionality == BI_DIRECTIONAL) { - power_log_msg(POWER_LOG_ERROR, - "Cannot calculate routing power for bi-directional architectures"); + power_log_msg(POWER_LOG_ERROR, "Cannot calculate routing power for bi-directional architectures"); return POWER_RET_CODE_ERRORS; } @@ -1752,8 +1692,7 @@ e_power_ret_code power_total(float* run_time_s, const t_vpr_setup& vpr_setup, co power_print_summary(power_ctx.output->out, vpr_setup); /* Print Error & Warning Logs */ - output_logs(power_ctx.output->out, power_ctx.output->logs, - power_ctx.output->num_logs); + output_logs(power_ctx.output->out, power_ctx.output->logs, power_ctx.output->num_logs); //power_print_title(power_ctx.output->out, "Statistics"); //power_print_stats(power_ctx.output->out); @@ -1786,8 +1725,7 @@ e_power_ret_code power_total(float* run_time_s, const t_vpr_setup& vpr_setup, co * - fp: File descripter to print out to */ static void power_print_breakdown_summary(FILE* fp) { - power_print_breakdown_entry(fp, 0, POWER_BREAKDOWN_ENTRY_TYPE_TITLE, nullptr, - 0., 0., 0., nullptr); + power_print_breakdown_entry(fp, 0, POWER_BREAKDOWN_ENTRY_TYPE_TITLE, nullptr, 0., 0., 0., nullptr); power_print_breakdown_component(fp, "Total", POWER_COMPONENT_TOTAL, 0); fprintf(fp, "\n"); } @@ -1823,8 +1761,7 @@ static void power_print_breakdown_pb(FILE* fp) { "\t\tbetween the PB and its children is ignored.\n" "\tIgnore: Power of PB is ignored.\n\n\n"); - power_print_breakdown_entry(fp, 0, POWER_BREAKDOWN_ENTRY_TYPE_TITLE, nullptr, - 0., 0., 0., nullptr); + power_print_breakdown_entry(fp, 0, POWER_BREAKDOWN_ENTRY_TYPE_TITLE, nullptr, 0., 0., 0., nullptr); auto& device_ctx = g_vpr_ctx.device(); @@ -1841,28 +1778,21 @@ static void power_print_breakdown_pb(FILE* fp) { */ static void power_print_breakdown_component(FILE* fp, const char* name, e_power_component_type type, int indent_level) { auto& power_ctx = g_vpr_ctx.power(); - power_print_breakdown_entry(fp, indent_level, - POWER_BREAKDOWN_ENTRY_TYPE_COMPONENT, name, + power_print_breakdown_entry(fp, indent_level, POWER_BREAKDOWN_ENTRY_TYPE_COMPONENT, name, power_sum_usage(&power_ctx.by_component.components[type]), power_sum_usage(&power_ctx.by_component.components[POWER_COMPONENT_TOTAL]), power_perc_dynamic(&power_ctx.by_component.components[type]), nullptr); switch (type) { case (POWER_COMPONENT_TOTAL): - power_print_breakdown_component(fp, "Routing", POWER_COMPONENT_ROUTING, - indent_level + 1); - power_print_breakdown_component(fp, "PB Types", POWER_COMPONENT_PB, - indent_level + 1); - power_print_breakdown_component(fp, "Clock", POWER_COMPONENT_CLOCK, - indent_level + 1); + power_print_breakdown_component(fp, "Routing", POWER_COMPONENT_ROUTING, indent_level + 1); + power_print_breakdown_component(fp, "PB Types", POWER_COMPONENT_PB, indent_level + 1); + power_print_breakdown_component(fp, "Clock", POWER_COMPONENT_CLOCK, indent_level + 1); break; case (POWER_COMPONENT_ROUTING): - power_print_breakdown_component(fp, "Switch Box", - POWER_COMPONENT_ROUTE_SB, indent_level + 1); - power_print_breakdown_component(fp, "Connection Box", - POWER_COMPONENT_ROUTE_CB, indent_level + 1); - power_print_breakdown_component(fp, "Global Wires", - POWER_COMPONENT_ROUTE_GLB_WIRE, indent_level + 1); + power_print_breakdown_component(fp, "Switch Box", POWER_COMPONENT_ROUTE_SB, indent_level + 1); + power_print_breakdown_component(fp, "Connection Box", POWER_COMPONENT_ROUTE_CB, indent_level + 1); + power_print_breakdown_component(fp, "Global Wires", POWER_COMPONENT_ROUTE_GLB_WIRE, indent_level + 1); break; case (POWER_COMPONENT_CLOCK): /* @@ -1873,36 +1803,38 @@ static void power_print_breakdown_component(FILE* fp, const char* name, e_power_ */ break; case (POWER_COMPONENT_PB): - power_print_breakdown_component(fp, "Primitives", - POWER_COMPONENT_PB_PRIMITIVES, indent_level + 1); - power_print_breakdown_component(fp, "Interc Structures", - POWER_COMPONENT_PB_INTERC_MUXES, indent_level + 1); - power_print_breakdown_component(fp, "Buffers and Wires", - POWER_COMPONENT_PB_BUFS_WIRE, indent_level + 1); - power_print_breakdown_component(fp, "Other Estimation Methods", - POWER_COMPONENT_PB_OTHER, indent_level + 1); + power_print_breakdown_component(fp, "Primitives", POWER_COMPONENT_PB_PRIMITIVES, indent_level + 1); + power_print_breakdown_component(fp, "Interc Structures", POWER_COMPONENT_PB_INTERC_MUXES, indent_level + 1); + power_print_breakdown_component(fp, "Buffers and Wires", POWER_COMPONENT_PB_BUFS_WIRE, indent_level + 1); + power_print_breakdown_component(fp, "Other Estimation Methods", POWER_COMPONENT_PB_OTHER, indent_level + 1); break; default: break; } } -static void power_print_breakdown_entry(FILE* fp, int indent, e_power_breakdown_entry_type type, const char* name, float power, float total_power, float perc_dyn, const char* method) { +static void power_print_breakdown_entry(FILE* fp, + int indent, + e_power_breakdown_entry_type type, + const char* name, + float power, + float total_power, + float perc_dyn, + const char* method) { const int buf_size = 32; char buf[buf_size]; switch (type) { case POWER_BREAKDOWN_ENTRY_TYPE_TITLE: - fprintf(fp, "%-*s%-12s%-12s%-12s%-12s\n\n", buf_size, "Component", - "Power (W)", "%-Total", "%-Dynamic", "Method"); + fprintf(fp, "%-*s%-12s%-12s%-12s%-12s\n\n", buf_size, "Component", "Power (W)", "%-Total", "%-Dynamic", + "Method"); break; case POWER_BREAKDOWN_ENTRY_TYPE_MODE: for (int i = 0; i < indent; i++) buf[i] = ' '; strcpy(buf + indent, "Mode:"); strncpy(buf + indent + 5, name, buf_size - indent - 6); - fprintf(fp, "%-*s%-12.4g%-12.4g%-12.4g\n", buf_size, buf, power, - power / total_power, perc_dyn); + fprintf(fp, "%-*s%-12.4g%-12.4g%-12.4g\n", buf_size, buf, power, power / total_power, perc_dyn); break; case POWER_BREAKDOWN_ENTRY_TYPE_COMPONENT: case POWER_BREAKDOWN_ENTRY_TYPE_INTERC: @@ -1912,8 +1844,7 @@ static void power_print_breakdown_entry(FILE* fp, int indent, e_power_breakdown_ strncpy(buf + indent, name, buf_size - indent - 1); buf[buf_size - 1] = '\0'; - fprintf(fp, "%-*s%-12.4g%-12.4g%-12.4g\n", buf_size, buf, power, - power / total_power, perc_dyn); + fprintf(fp, "%-*s%-12.4g%-12.4g%-12.4g\n", buf_size, buf, power, power / total_power, perc_dyn); break; case POWER_BREAKDOWN_ENTRY_TYPE_PB: for (int i = 0; i < indent; i++) @@ -1921,8 +1852,8 @@ static void power_print_breakdown_entry(FILE* fp, int indent, e_power_breakdown_ strncpy(buf + indent, name, buf_size - indent - 1); buf[buf_size - 1] = '\0'; - fprintf(fp, "%-*s%-12.4g%-12.4g%-12.4g%-12s\n", buf_size, buf, power, - power / total_power, perc_dyn, method); + fprintf(fp, "%-*s%-12.4g%-12.4g%-12.4g%-12s\n", buf_size, buf, power, power / total_power, perc_dyn, + method); break; default: break; diff --git a/vpr/src/power/power.h b/vpr/src/power/power.h index 42191fafe2d..01dce128858 100644 --- a/vpr/src/power/power.h +++ b/vpr/src/power/power.h @@ -39,18 +39,10 @@ /************************* ENUMS ************************************/ /* Return code used by power functions */ -typedef enum { - POWER_RET_CODE_SUCCESS = 0, - POWER_RET_CODE_ERRORS, - POWER_RET_CODE_WARNINGS -} e_power_ret_code; +typedef enum { POWER_RET_CODE_SUCCESS = 0, POWER_RET_CODE_ERRORS, POWER_RET_CODE_WARNINGS } e_power_ret_code; /* Power log types */ -typedef enum { - POWER_LOG_ERROR, - POWER_LOG_WARNING, - POWER_LOG_NUM_TYPES -} e_power_log_type; +typedef enum { POWER_LOG_ERROR, POWER_LOG_WARNING, POWER_LOG_NUM_TYPES } e_power_log_type; /* Multiplexer select encoding types */ #if 0 @@ -89,10 +81,7 @@ struct t_solution_inf { }; /* two types of transisters */ -enum e_tx_type { - NMOS, - PMOS -}; +enum e_tx_type { NMOS, PMOS }; /* Information for a given transistor size */ struct t_transistor_size_inf { @@ -313,6 +302,9 @@ bool power_init(const char* power_out_filepath, bool power_uninit(); /* Top-Level Function */ -e_power_ret_code power_total(float* run_time_s, const t_vpr_setup& vpr_setup, const t_arch* arch, const t_det_routing_arch* routing_arch); +e_power_ret_code power_total(float* run_time_s, + const t_vpr_setup& vpr_setup, + const t_arch* arch, + const t_det_routing_arch* routing_arch); #endif /* __POWER_H__ */ diff --git a/vpr/src/power/power_callibrate.cpp b/vpr/src/power/power_callibrate.cpp index d4576dd04d2..1fe2c8259d6 100644 --- a/vpr/src/power/power_callibrate.cpp +++ b/vpr/src/power/power_callibrate.cpp @@ -175,20 +175,18 @@ void power_print_spice_comparison() { dens[j] = 1.0 / (float)LUT_sizes[i]; prob[j] = 0.5; } - power_usage_lut(&sub_power_usage, LUT_sizes[i], 1.0, SRAM_bits_chars, prob, - dens, power_callib_period); + power_usage_lut(&sub_power_usage, LUT_sizes[i], 1.0, SRAM_bits_chars, prob, dens, power_callib_period); t_power_usage power_usage_mux; float p[6] = {0.5, 0.5, 0.5, 0.5, 0.5, 0.5}; float d[6] = {1, 1, 1, 1, 1, 1}; - power_usage_mux_multilevel(&power_usage_mux, power_get_mux_arch(6, 1.0), - p, d, 0, true, power_ctx.solution_inf.T_crit); + power_usage_mux_multilevel(&power_usage_mux, power_get_mux_arch(6, 1.0), p, d, 0, true, + power_ctx.solution_inf.T_crit); power_add_usage(&sub_power_usage, &power_usage_mux); - fprintf(power_ctx.output->out, "%d\t%g\n", LUT_sizes[i], - power_sum_usage(&sub_power_usage)); + fprintf(power_ctx.output->out, "%d\t%g\n", LUT_sizes[i], power_sum_usage(&sub_power_usage)); } // // fprintf(power_ctx.output->out, "Energy of LUT (No Activity)\n"); @@ -222,10 +220,8 @@ void power_print_spice_comparison() { // } // fprintf(power_ctx.output->out, "Energy of FF (High Activity)\n"); - power_usage_ff(&sub_power_usage, 1.0, 0.5, 3, 0.5, 1, 0.5, 2, - power_callib_period); - fprintf(power_ctx.output->out, "%g\n", - (sub_power_usage.dynamic + sub_power_usage.leakage)); + power_usage_ff(&sub_power_usage, 1.0, 0.5, 3, 0.5, 1, 0.5, 2, power_callib_period); + fprintf(power_ctx.output->out, "%g\n", (sub_power_usage.dynamic + sub_power_usage.leakage)); // // fprintf(power_ctx.output->out, "Energy of FF (No Activity)\n"); // power_usage_ff(&sub_power_usage, 1, 0, 1, 0, 1, 0, power_callib_period); @@ -312,20 +308,17 @@ float power_usage_buf_for_callibration(int num_inputs, float transistor_size) { VTR_ASSERT(num_inputs == 1); - power_usage_buffer(&power_usage, transistor_size, 0.5, 2.0, false, - power_callib_period); + power_usage_buffer(&power_usage, transistor_size, 0.5, 2.0, false, power_callib_period); return power_sum_usage(&power_usage); } -float power_usage_buf_levr_for_callibration(int num_inputs, - float transistor_size) { +float power_usage_buf_levr_for_callibration(int num_inputs, float transistor_size) { t_power_usage power_usage; VTR_ASSERT(num_inputs == 1); - power_usage_buffer(&power_usage, transistor_size, 0.5, 2.0, true, - power_callib_period); + power_usage_buffer(&power_usage, transistor_size, 0.5, 2.0, true, power_callib_period); return power_sum_usage(&power_usage); } @@ -342,9 +335,8 @@ float power_usage_mux_for_callibration(int num_inputs, float transistor_size) { prob[i] = 0.5; } - power_usage_mux_multilevel(&power_usage, - power_get_mux_arch(num_inputs, transistor_size), prob, dens, 0, - false, power_callib_period); + power_usage_mux_multilevel(&power_usage, power_get_mux_arch(num_inputs, transistor_size), prob, dens, 0, false, + power_callib_period); delete[] dens; delete[] prob; @@ -381,8 +373,7 @@ float power_usage_lut_for_callibration(int num_inputs, float transistor_size) { dens[i] = 1; prob[i] = 0.5; } - power_usage_lut(&power_usage, lut_size, transistor_size, SRAM_bits, prob, - dens, power_callib_period); + power_usage_lut(&power_usage, lut_size, transistor_size, SRAM_bits, prob, dens, power_callib_period); delete[] SRAM_bits; delete[] dens; @@ -396,8 +387,7 @@ float power_usage_ff_for_callibration(int num_inputs, float transistor_size) { VTR_ASSERT(num_inputs == 1); - power_usage_ff(&power_usage, transistor_size, 0.5, 3, 0.5, 1, 0.5, 2, - power_callib_period); + power_usage_ff(&power_usage, transistor_size, 0.5, 3, 0.5, 1, 0.5, 2, power_callib_period); return power_sum_usage(&power_usage); } diff --git a/vpr/src/power/power_callibrate.h b/vpr/src/power/power_callibrate.h index eb387b4e3d9..9ad124439d0 100644 --- a/vpr/src/power/power_callibrate.h +++ b/vpr/src/power/power_callibrate.h @@ -43,8 +43,7 @@ typedef enum { void power_print_spice_comparison(); void power_callibrate(); float power_usage_buf_for_callibration(int num_inputs, float transistor_size); -float power_usage_buf_levr_for_callibration(int num_inputs, - float transistor_size); +float power_usage_buf_levr_for_callibration(int num_inputs, float transistor_size); float power_usage_mux_for_callibration(int num_inputs, float transistor_size); float power_usage_lut_for_callibration(int num_inputs, float transistor_size); float power_usage_ff_for_callibration(int num_inputs, float transistor_size); diff --git a/vpr/src/power/power_cmos_tech.cpp b/vpr/src/power/power_cmos_tech.cpp index 6d8b38ac32e..0ee510a7ae5 100644 --- a/vpr/src/power/power_cmos_tech.cpp +++ b/vpr/src/power/power_cmos_tech.cpp @@ -62,12 +62,14 @@ static int power_compare_leakage_pair(const void* key_void, const void* elem_voi static int power_compare_buffer_strength(const void* key_void, const void* elem_void); static int power_compare_buffer_sc_levr(const void* key_void, const void* elem_void); static void power_tech_xml_load_components(pugi::xml_node parent, const pugiutil::loc_data& loc_data); -static void power_tech_xml_load_component(pugi::xml_node parent, const pugiutil::loc_data& loc_data, PowerSpicedComponent** component, const char* name, float (*usage_fn)(int num_inputs, float transistor_size)); +static void power_tech_xml_load_component(pugi::xml_node parent, + const pugiutil::loc_data& loc_data, + PowerSpicedComponent** component, + const char* name, + float (*usage_fn)(int num_inputs, float transistor_size)); /************************* FUNCTION DEFINITIONS *********************/ -void power_tech_init(const char* cmos_tech_behavior_filepath) { - power_tech_load_xml_file(cmos_tech_behavior_filepath); -} +void power_tech_init(const char* cmos_tech_behavior_filepath) { power_tech_load_xml_file(cmos_tech_behavior_filepath); } /** * Reads the transistor properties from the .xml file @@ -134,7 +136,11 @@ void power_tech_load_xml_file(const char* cmos_tech_behavior_filepath) { power_tech_xml_load_components(child, loc_data); } -static void power_tech_xml_load_component(pugi::xml_node parent, const pugiutil::loc_data& loc_data, PowerSpicedComponent** component, const char* name, float (*usage_fn)(int num_inputs, float transistor_size)) { +static void power_tech_xml_load_component(pugi::xml_node parent, + const pugiutil::loc_data& loc_data, + PowerSpicedComponent** component, + const char* name, + float (*usage_fn)(int num_inputs, float transistor_size)) { std::string component_name(name); *component = new PowerSpicedComponent(component_name, usage_fn); @@ -167,21 +173,21 @@ static void power_tech_xml_load_components(pugi::xml_node parent, const pugiutil &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_BUFFER], "buf", power_usage_buf_for_callibration); - power_tech_xml_load_component(parent, loc_data, - &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_BUFFER_WITH_LEVR], - "buf_levr", power_usage_buf_levr_for_callibration); + power_tech_xml_load_component( + parent, loc_data, &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_BUFFER_WITH_LEVR], + "buf_levr", power_usage_buf_levr_for_callibration); power_tech_xml_load_component(parent, loc_data, - &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_FF], - "dff", power_usage_ff_for_callibration); + &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_FF], "dff", + power_usage_ff_for_callibration); power_tech_xml_load_component(parent, loc_data, - &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_MUX], - "mux", power_usage_mux_for_callibration); + &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_MUX], "mux", + power_usage_mux_for_callibration); power_tech_xml_load_component(parent, loc_data, - &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_LUT], - "lut", power_usage_lut_for_callibration); + &power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_LUT], "lut", + power_usage_lut_for_callibration); } /** @@ -273,9 +279,12 @@ static void power_tech_xml_load_multiplexer_info(pugi::xml_node parent, const pu j = 0; while (gc) { /* For each mux size, and Vin level, get the min/max V_out */ - nmos_inf->mux_voltage_inf[i].mux_voltage_pairs[j].v_in = get_attribute(gc, "in", loc_data).as_float(0.0); - nmos_inf->mux_voltage_inf[i].mux_voltage_pairs[j].v_out_min = get_attribute(gc, "out_min", loc_data).as_float(0.0); - nmos_inf->mux_voltage_inf[i].mux_voltage_pairs[j].v_out_max = get_attribute(gc, "out_max", loc_data).as_float(0.0); + nmos_inf->mux_voltage_inf[i].mux_voltage_pairs[j].v_in + = get_attribute(gc, "in", loc_data).as_float(0.0); + nmos_inf->mux_voltage_inf[i].mux_voltage_pairs[j].v_out_min + = get_attribute(gc, "out_min", loc_data).as_float(0.0); + nmos_inf->mux_voltage_inf[i].mux_voltage_pairs[j].v_out_max + = get_attribute(gc, "out_max", loc_data).as_float(0.0); gc = gc.next_sibling("voltages"); j++; @@ -389,8 +398,7 @@ bool power_find_transistor_info(t_transistor_size_inf** lower, /* No transistor data exists */ if (trans_info->size_inf == nullptr) { - power_log_msg(POWER_LOG_ERROR, - "No transistor information exists. Cannot determine transistor properties."); + power_log_msg(POWER_LOG_ERROR, "No transistor information exists. Cannot determine transistor properties."); error = true; return error; } @@ -400,16 +408,16 @@ bool power_find_transistor_info(t_transistor_size_inf** lower, min_size = trans_info->size_inf[0].size; max_size = trans_info->size_inf[trans_info->num_size_entries - 1].size; - found = (t_transistor_size_inf*)bsearch(&key, trans_info->size_inf, - trans_info->num_size_entries, sizeof(t_transistor_size_inf), - &power_compare_transistor_size); + found = (t_transistor_size_inf*)bsearch(&key, trans_info->size_inf, trans_info->num_size_entries, + sizeof(t_transistor_size_inf), &power_compare_transistor_size); VTR_ASSERT(found); if (size < min_size) { /* Too small */ VTR_ASSERT(found == &trans_info->size_inf[0]); sprintf(msg, - "Using %s transistor of size '%f', which is smaller than the smallest modeled transistor (%f) in the technology behavior file.", + "Using %s transistor of size '%f', which is smaller than the smallest modeled transistor (%f) in the " + "technology behavior file.", transistor_type_name(type), size, min_size); power_log_msg(POWER_LOG_WARNING, msg); *lower = nullptr; @@ -418,7 +426,8 @@ bool power_find_transistor_info(t_transistor_size_inf** lower, /* Too large */ VTR_ASSERT(found == &trans_info->size_inf[trans_info->num_size_entries - 1]); sprintf(msg, - "Using %s transistor of size '%f', which is larger than the largest modeled transistor (%f) in the technology behavior file.", + "Using %s transistor of size '%f', which is larger than the largest modeled transistor (%f) in the " + "technology behavior file.", transistor_type_name(type), size, max_size); power_log_msg(POWER_LOG_WARNING, msg); *lower = found; @@ -449,10 +458,9 @@ void power_find_nmos_leakage(t_power_nmos_leakage_inf* nmos_leakage_info, f_power_searching_nmos_leakage_info = nmos_leakage_info; - found = (t_power_nmos_leakage_pair*)bsearch(&key, - nmos_leakage_info->leakage_pairs, - nmos_leakage_info->num_leakage_pairs, - sizeof(t_power_nmos_leakage_pair), power_compare_leakage_pair); + found = (t_power_nmos_leakage_pair*)bsearch(&key, nmos_leakage_info->leakage_pairs, + nmos_leakage_info->num_leakage_pairs, sizeof(t_power_nmos_leakage_pair), + power_compare_leakage_pair); VTR_ASSERT(found); if (found == &nmos_leakage_info->leakage_pairs[nmos_leakage_info->num_leakage_pairs - 1]) { @@ -488,9 +496,8 @@ void power_find_buffer_strength_inf(t_power_buffer_strength_inf** lower, key.stage_gain = stage_gain; - found = (t_power_buffer_strength_inf*)bsearch(&key, size_inf->strength_inf, - size_inf->num_strengths, sizeof(t_power_buffer_strength_inf), - power_compare_buffer_strength); + found = (t_power_buffer_strength_inf*)bsearch(&key, size_inf->strength_inf, size_inf->num_strengths, + sizeof(t_power_buffer_strength_inf), power_compare_buffer_strength); if (stage_gain == max_size) { *lower = found; @@ -523,18 +530,16 @@ void power_find_buffer_sc_levr(t_power_buffer_sc_levr_inf** lower, key.mux_size = input_mux_size; f_buffer_strength_last_searched = buffer_strength; - found = (t_power_buffer_sc_levr_inf*)bsearch(&key, - buffer_strength->sc_levr_inf, buffer_strength->num_levr_entries, + found = (t_power_buffer_sc_levr_inf*)bsearch(&key, buffer_strength->sc_levr_inf, buffer_strength->num_levr_entries, sizeof(t_power_buffer_sc_levr_inf), power_compare_buffer_sc_levr); - max_size = buffer_strength->sc_levr_inf[buffer_strength->num_levr_entries - - 1] - .mux_size; + max_size = buffer_strength->sc_levr_inf[buffer_strength->num_levr_entries - 1].mux_size; if (input_mux_size > max_size) { /* Input mux too large */ VTR_ASSERT(found == &buffer_strength->sc_levr_inf[buffer_strength->num_levr_entries - 1]); sprintf(msg, - "Using buffer driven by mux of size '%d', which is larger than the largest modeled size (%d) in the technology behavior file.", + "Using buffer driven by mux of size '%d', which is larger than the largest modeled size (%d) in the " + "technology behavior file.", input_mux_size, max_size); power_log_msg(POWER_LOG_WARNING, msg); *lower = found; @@ -554,7 +559,9 @@ static int power_compare_leakage_pair(const void* key_void, const void* elem_voi const t_power_nmos_leakage_pair* next = (const t_power_nmos_leakage_pair*)elem + 1; /* Compare against last? */ - if (elem == &f_power_searching_nmos_leakage_info->leakage_pairs[f_power_searching_nmos_leakage_info->num_leakage_pairs - 1]) { + if (elem + == &f_power_searching_nmos_leakage_info + ->leakage_pairs[f_power_searching_nmos_leakage_info->num_leakage_pairs - 1]) { if (key->v_ds >= elem->v_ds) { return 0; } else { @@ -591,13 +598,11 @@ void power_find_mux_volt_inf(t_power_mux_volt_pair** lower, key.v_in = v_in; f_mux_volt_last_searched = volt_inf; - found = (t_power_mux_volt_pair*)bsearch(&key, volt_inf->mux_voltage_pairs, - volt_inf->num_voltage_pairs, sizeof(t_power_mux_volt_pair), - power_compare_voltage_pair); + found = (t_power_mux_volt_pair*)bsearch(&key, volt_inf->mux_voltage_pairs, volt_inf->num_voltage_pairs, + sizeof(t_power_mux_volt_pair), power_compare_voltage_pair); VTR_ASSERT(found); - if (found - == &volt_inf->mux_voltage_pairs[volt_inf->num_voltage_pairs - 1]) { + if (found == &volt_inf->mux_voltage_pairs[volt_inf->num_voltage_pairs - 1]) { *lower = found; *upper = nullptr; } else { @@ -609,16 +614,13 @@ void power_find_mux_volt_inf(t_power_mux_volt_pair** lower, /** * Comparison function, used by power_find_buffer_sc_levr */ -static int power_compare_buffer_sc_levr(const void* key_void, - const void* elem_void) { +static int power_compare_buffer_sc_levr(const void* key_void, const void* elem_void) { const t_power_buffer_sc_levr_inf* key = (const t_power_buffer_sc_levr_inf*)key_void; const t_power_buffer_sc_levr_inf* elem = (const t_power_buffer_sc_levr_inf*)elem_void; const t_power_buffer_sc_levr_inf* next; /* Compare against last? */ - if (elem - == &f_buffer_strength_last_searched->sc_levr_inf[f_buffer_strength_last_searched->num_levr_entries - - 1]) { + if (elem == &f_buffer_strength_last_searched->sc_levr_inf[f_buffer_strength_last_searched->num_levr_entries - 1]) { if (key->mux_size >= elem->mux_size) { return 0; } else { @@ -647,8 +649,7 @@ static int power_compare_buffer_sc_levr(const void* key_void, /** * Comparison function, used by power_find_buffer_strength_inf */ -static int power_compare_buffer_strength(const void* key_void, - const void* elem_void) { +static int power_compare_buffer_strength(const void* key_void, const void* elem_void) { const t_power_buffer_strength_inf* key = (const t_power_buffer_strength_inf*)key_void; const t_power_buffer_strength_inf* elem = (const t_power_buffer_strength_inf*)elem_void; const t_power_buffer_strength_inf* next = (const t_power_buffer_strength_inf*)elem + 1; @@ -668,16 +669,13 @@ static int power_compare_buffer_strength(const void* key_void, /** * Comparison function, used by power_find_transistor_info */ -static int power_compare_transistor_size(const void* key_void, - const void* elem_void) { +static int power_compare_transistor_size(const void* key_void, const void* elem_void) { const t_transistor_size_inf* key = (const t_transistor_size_inf*)key_void; const t_transistor_size_inf* elem = (const t_transistor_size_inf*)elem_void; const t_transistor_size_inf* next; /* Check if we are comparing against the last element */ - if (elem - == &f_transistor_last_searched->size_inf[f_transistor_last_searched->num_size_entries - - 1]) { + if (elem == &f_transistor_last_searched->size_inf[f_transistor_last_searched->num_size_entries - 1]) { /* Match if the desired value is larger than the largest item in the list */ if (key->size >= elem->size) { return 0; @@ -708,17 +706,13 @@ static int power_compare_transistor_size(const void* key_void, /** * Comparison function, used by power_find_mux_volt_inf */ -static int power_compare_voltage_pair(const void* key_void, - const void* elem_void) { +static int power_compare_voltage_pair(const void* key_void, const void* elem_void) { const t_power_mux_volt_pair* key = (const t_power_mux_volt_pair*)key_void; const t_power_mux_volt_pair* elem = (const t_power_mux_volt_pair*)elem_void; - const t_power_mux_volt_pair* next = (const t_power_mux_volt_pair*)elem - + 1; + const t_power_mux_volt_pair* next = (const t_power_mux_volt_pair*)elem + 1; /* Check if we are comparing against the last element */ - if (elem - == &f_mux_volt_last_searched->mux_voltage_pairs[f_mux_volt_last_searched->num_voltage_pairs - - 1]) { + if (elem == &f_mux_volt_last_searched->mux_voltage_pairs[f_mux_volt_last_searched->num_voltage_pairs - 1]) { /* Match if the desired value is larger than the largest item in the list */ if (key->v_in >= elem->v_in) { return 0; diff --git a/vpr/src/power/power_components.cpp b/vpr/src/power/power_components.cpp index 0a6b22e0786..3e591e1b135 100644 --- a/vpr/src/power/power_components.cpp +++ b/vpr/src/power/power_components.cpp @@ -38,7 +38,17 @@ /************************* STRUCTS **********************************/ /************************* FUNCTION DECLARATIONS ********************/ -static void power_usage_mux_rec(t_power_usage* power_usage, float* out_prob, float* out_dens, float* v_out, t_mux_node* mux_node, t_mux_arch* mux_arch, int* selector_values, float* primary_input_prob, float* primary_input_dens, bool v_out_restored, float period); +static void power_usage_mux_rec(t_power_usage* power_usage, + float* out_prob, + float* out_dens, + float* v_out, + t_mux_node* mux_node, + t_mux_arch* mux_arch, + int* selector_values, + float* primary_input_prob, + float* primary_input_dens, + bool v_out_restored, + float period); /************************* FUNCTION DEFINITIONS *********************/ @@ -69,11 +79,9 @@ void power_components_uninit() { * - power_usage: Power usage to add * - component_idx: Type of component */ -void power_component_add_usage(t_power_usage* power_usage, - e_power_component_type component_idx) { +void power_component_add_usage(t_power_usage* power_usage, e_power_component_type component_idx) { auto& power_ctx = g_vpr_ctx.power(); - power_add_usage(&power_ctx.by_component.components[component_idx], - power_usage); + power_add_usage(&power_ctx.by_component.components[component_idx], power_usage); } /** @@ -81,11 +89,9 @@ void power_component_add_usage(t_power_usage* power_usage, * - power_usage: (Return value) Power usage for the given component * - component_idx: Type of component */ -void power_component_get_usage(t_power_usage* power_usage, - e_power_component_type component_idx) { +void power_component_get_usage(t_power_usage* power_usage, e_power_component_type component_idx) { auto& power_ctx = g_vpr_ctx.power(); - memcpy(power_usage, &power_ctx.by_component.components[component_idx], - sizeof(t_power_usage)); + memcpy(power_usage, &power_ctx.by_component.components[component_idx], sizeof(t_power_usage)); } /** @@ -107,7 +113,15 @@ float power_component_get_usage_sum(e_power_component_type component_idx) { * - clk_prob: Signal probability of the clock * - clk_dens: Transition density of the clock */ -void power_usage_ff(t_power_usage* power_usage, float size, float D_prob, float D_dens, float Q_prob, float Q_dens, float clk_prob, float clk_dens, float period) { +void power_usage_ff(t_power_usage* power_usage, + float size, + float D_prob, + float D_dens, + float Q_prob, + float Q_dens, + float clk_prob, + float clk_dens, + float period) { t_power_usage sub_power_usage; float mux_in_dens[2]; float mux_in_prob[2]; @@ -127,16 +141,14 @@ void power_usage_ff(t_power_usage* power_usage, float size, float D_prob, float mux_in_dens[1] = (1 - clk_prob) * D_dens; mux_in_prob[0] = D_prob; mux_in_prob[1] = D_prob; - power_usage_MUX2_transmission(&sub_power_usage, size, mux_in_dens, - mux_in_prob, clk_dens, (1 - clk_prob) * D_dens, period); + power_usage_MUX2_transmission(&sub_power_usage, size, mux_in_dens, mux_in_prob, clk_dens, (1 - clk_prob) * D_dens, + period); power_add_usage(power_usage, &sub_power_usage); - power_usage_inverter(&sub_power_usage, (1 - clk_prob) * D_dens, D_prob, - size, period); + power_usage_inverter(&sub_power_usage, (1 - clk_prob) * D_dens, D_prob, size, period); power_add_usage(power_usage, &sub_power_usage); - power_usage_inverter(&sub_power_usage, (1 - clk_prob) * D_dens, 1 - D_prob, - size, period); + power_usage_inverter(&sub_power_usage, (1 - clk_prob) * D_dens, 1 - D_prob, size, period); power_add_usage(power_usage, &sub_power_usage); /* Slave */ @@ -144,8 +156,7 @@ void power_usage_ff(t_power_usage* power_usage, float size, float D_prob, float mux_in_dens[1] = (1 - clk_prob) * D_dens; mux_in_prob[0] = (1 - Q_prob); mux_in_prob[1] = (1 - D_prob); - power_usage_MUX2_transmission(&sub_power_usage, size, mux_in_dens, - mux_in_prob, clk_dens, Q_dens, period); + power_usage_MUX2_transmission(&sub_power_usage, size, mux_in_dens, mux_in_prob, clk_dens, Q_dens, period); power_add_usage(power_usage, &sub_power_usage); power_usage_inverter(&sub_power_usage, Q_dens, 1 - Q_prob, size, period); @@ -204,7 +215,13 @@ void power_usage_ff(t_power_usage* power_usage, float size, float D_prob, float * 7 _Z_| * */ -void power_usage_lut(t_power_usage* power_usage, int lut_size, float transistor_size, std::string SRAM_values, float* input_prob, float* input_dens, float period) { +void power_usage_lut(t_power_usage* power_usage, + int lut_size, + float transistor_size, + std::string SRAM_values, + float* input_prob, + float* input_dens, + float period) { float** internal_prob; float** internal_dens; float** internal_v; @@ -258,16 +275,13 @@ void power_usage_lut(t_power_usage* power_usage, int lut_size, float transistor_ MUXs_this_level = 1 << (reverse_idx); /* Power of input drivers */ - power_usage_inverter(&driver_power_usage, input_dens[reverse_idx], - input_prob[reverse_idx], 1.0, period); + power_usage_inverter(&driver_power_usage, input_dens[reverse_idx], input_prob[reverse_idx], 1.0, period); power_add_usage(power_usage, &driver_power_usage); - power_usage_inverter(&driver_power_usage, input_dens[reverse_idx], - input_prob[reverse_idx], 2.0, period); + power_usage_inverter(&driver_power_usage, input_dens[reverse_idx], input_prob[reverse_idx], 2.0, period); power_add_usage(power_usage, &driver_power_usage); - power_usage_inverter(&driver_power_usage, input_dens[reverse_idx], - 1 - input_prob[reverse_idx], 2.0, period); + power_usage_inverter(&driver_power_usage, input_dens[reverse_idx], 1 - input_prob[reverse_idx], 2.0, period); power_add_usage(power_usage, &driver_power_usage); /* Add level restorer after every 2 stages (level_idx %2 == 1) @@ -275,8 +289,7 @@ void power_usage_lut(t_power_usage* power_usage, int lut_size, float transistor_ * stage (level_idx == LUT_size - 1) and not at the stage just before * the last stage (level_idx != LUT_size - 2) */ - if (((level_idx % 2 == 1) && (level_idx != lut_size - 2)) - || (level_idx == lut_size - 1)) { + if (((level_idx % 2 == 1) && (level_idx != lut_size - 2)) || (level_idx == lut_size - 1)) { level_restorer_this_level = true; } else { level_restorer_this_level = false; @@ -295,31 +308,24 @@ void power_usage_lut(t_power_usage* power_usage, int lut_size, float transistor_ float v_out; /* Calculate output probability of multiplexer */ - out_prob = internal_prob[level_idx][MUX_idx * 2] - * (1 - input_prob[reverse_idx]) - + internal_prob[level_idx][MUX_idx * 2 + 1] - * input_prob[reverse_idx]; + out_prob = internal_prob[level_idx][MUX_idx * 2] * (1 - input_prob[reverse_idx]) + + internal_prob[level_idx][MUX_idx * 2 + 1] * input_prob[reverse_idx]; /* Calculate output density of multiplexer */ - out_dens = internal_dens[level_idx][MUX_idx * 2] - * (1 - input_prob[reverse_idx]) - + internal_dens[level_idx][MUX_idx * 2 + 1] - * input_prob[reverse_idx]; + out_dens = internal_dens[level_idx][MUX_idx * 2] * (1 - input_prob[reverse_idx]) + + internal_dens[level_idx][MUX_idx * 2 + 1] * input_prob[reverse_idx]; #ifdef POWER_LUT_FAST out_dens += ((1 - internal_prob[level_idx][MUX_idx * 2]) * internal_prob[level_idx][MUX_idx * 2 + 1] + internal_prob[level_idx][MUX_idx * 2] * (1 - internal_prob[level_idx][MUX_idx * 2 + 1])) * input_dens[reverse_idx]; #elif defined(POWER_LUT_SLOW) - for (sram_idx = sram_offset; - sram_idx < sram_offset + sram_per_branch; sram_idx++) { + for (sram_idx = sram_offset; sram_idx < sram_offset + sram_per_branch; sram_idx++) { float branch_prob = 1.; - if (SRAM_values[sram_idx] - == SRAM_values[sram_idx + sram_per_branch]) { + if (SRAM_values[sram_idx] == SRAM_values[sram_idx + sram_per_branch]) { continue; } - for (branch_lvl_idx = 0; branch_lvl_idx < level_idx; - branch_lvl_idx++) { + for (branch_lvl_idx = 0; branch_lvl_idx < level_idx; branch_lvl_idx++) { int branch_lvl_reverse_idx = lut_size - branch_lvl_idx - 1; int even_odd = sram_idx / vtr::ipow(2, branch_lvl_idx); if (even_odd % 2 == 0) { @@ -338,12 +344,10 @@ void power_usage_lut(t_power_usage* power_usage, int lut_size, float transistor_ v_out = power_ctx.tech->Vdd; } else { v_out = (1 - input_prob[reverse_idx]) - * power_calc_mux_v_out(2, 1.0, - internal_v[level_idx][MUX_idx * 2], + * power_calc_mux_v_out(2, 1.0, internal_v[level_idx][MUX_idx * 2], internal_prob[level_idx][MUX_idx * 2 + 1]) + input_prob[reverse_idx] - * power_calc_mux_v_out(2, 1.0, - internal_v[level_idx][MUX_idx * 2 + 1], + * power_calc_mux_v_out(2, 1.0, internal_v[level_idx][MUX_idx * 2 + 1], internal_prob[level_idx][MUX_idx * 2]); } @@ -353,21 +357,17 @@ void power_usage_lut(t_power_usage* power_usage, int lut_size, float transistor_ internal_v[level_idx + 1][MUX_idx] = v_out; /* Calculate power of the 2-mux */ - power_usage_mux_singlelevel_dynamic(&sub_power, 2, - internal_dens[level_idx + 1][MUX_idx], - internal_v[level_idx + 1][MUX_idx], - &internal_prob[level_idx][MUX_idx * 2], - &internal_dens[level_idx][MUX_idx * 2], - &internal_v[level_idx][MUX_idx * 2], - input_dens[reverse_idx], input_prob[reverse_idx], - transistor_size, period); + power_usage_mux_singlelevel_dynamic( + &sub_power, 2, internal_dens[level_idx + 1][MUX_idx], internal_v[level_idx + 1][MUX_idx], + &internal_prob[level_idx][MUX_idx * 2], &internal_dens[level_idx][MUX_idx * 2], + &internal_v[level_idx][MUX_idx * 2], input_dens[reverse_idx], input_prob[reverse_idx], transistor_size, + period); power_add_usage(power_usage, &sub_power); /* Add the level-restoring buffer if necessary */ if (level_restorer_this_level) { /* Level restorer */ - power_usage_buffer(&sub_power, 1, - internal_prob[level_idx + 1][MUX_idx], + power_usage_buffer(&sub_power, 1, internal_prob[level_idx + 1][MUX_idx], internal_dens[level_idx + 1][MUX_idx], true, period); power_add_usage(power_usage, &sub_power); } @@ -401,7 +401,10 @@ void power_usage_lut(t_power_usage* power_usage, int lut_size, float transistor_ * - interc_pins: The interconnect input/ouput pin information * - interc_length: The physical length spanned by the interconnect (meters) */ -void power_usage_local_interc_mux(t_power_usage* power_usage, t_pb* pb, t_interconnect_pins* interc_pins, ClusterBlockId iblk) { +void power_usage_local_interc_mux(t_power_usage* power_usage, + t_pb* pb, + t_interconnect_pins* interc_pins, + ClusterBlockId iblk) { int pin_idx; int out_port_idx; int in_port_idx; @@ -448,19 +451,12 @@ void power_usage_local_interc_mux(t_power_usage* power_usage, t_pb* pb, t_interc in_prob[i] = 0.0; } - for (out_port_idx = 0; - out_port_idx < interc->interconnect_power->num_output_ports; - out_port_idx++) { - for (pin_idx = 0; - pin_idx < interc->interconnect_power->num_pins_per_port; - pin_idx++) { + for (out_port_idx = 0; out_port_idx < interc->interconnect_power->num_output_ports; out_port_idx++) { + for (pin_idx = 0; pin_idx < interc->interconnect_power->num_pins_per_port; pin_idx++) { int selected_input = OPEN; /* Clear input densities */ - for (in_port_idx = 0; - in_port_idx - < interc->interconnect_power->num_input_ports; - in_port_idx++) { + for (in_port_idx = 0; in_port_idx < interc->interconnect_power->num_input_ports; in_port_idx++) { in_dens[in_port_idx] = 0.; in_prob[in_port_idx] = 0.; } @@ -471,13 +467,19 @@ void power_usage_local_interc_mux(t_power_usage* power_usage, t_pb* pb, t_interc if (!cluster_ctx.clb_nlist.block_pb(iblk)->pb_route.count(cluster_pin_idx)) { selected_input = 0; } else { - AtomNetId output_pin_net = cluster_ctx.clb_nlist.block_pb(iblk)->pb_route[cluster_pin_idx].atom_net_id; - for (in_port_idx = 0; in_port_idx < interc->interconnect_power->num_input_ports; in_port_idx++) { + AtomNetId output_pin_net + = cluster_ctx.clb_nlist.block_pb(iblk)->pb_route[cluster_pin_idx].atom_net_id; + for (in_port_idx = 0; in_port_idx < interc->interconnect_power->num_input_ports; + in_port_idx++) { t_pb_graph_pin* input_pin = interc_pins->input_pins[in_port_idx][pin_idx]; - if (!cluster_ctx.clb_nlist.block_pb(iblk)->pb_route.count(input_pin->pin_count_in_cluster)) continue; + if (!cluster_ctx.clb_nlist.block_pb(iblk)->pb_route.count( + input_pin->pin_count_in_cluster)) + continue; - AtomNetId input_pin_net = cluster_ctx.clb_nlist.block_pb(iblk)->pb_route[input_pin->pin_count_in_cluster].atom_net_id; + AtomNetId input_pin_net = cluster_ctx.clb_nlist.block_pb(iblk) + ->pb_route[input_pin->pin_count_in_cluster] + .atom_net_id; /* Find input pin that connects through the mux to the output pin */ if (output_pin_net == input_pin_net) { selected_input = in_port_idx; @@ -498,11 +500,11 @@ void power_usage_local_interc_mux(t_power_usage* power_usage, t_pb* pb, t_interc } /* Calculate power of the multiplexer */ - power_usage_mux_multilevel(&MUX_power, - power_get_mux_arch(interc_pins->interconnect->interconnect_power->num_input_ports, - power_ctx.arch->mux_transistor_size), - in_prob, - in_dens, selected_input, true, power_ctx.solution_inf.T_crit); + power_usage_mux_multilevel( + &MUX_power, + power_get_mux_arch(interc_pins->interconnect->interconnect_power->num_input_ports, + power_ctx.arch->mux_transistor_size), + in_prob, in_dens, selected_input, true, power_ctx.solution_inf.T_crit); power_add_usage(power_usage, &MUX_power); } @@ -515,8 +517,7 @@ void power_usage_local_interc_mux(t_power_usage* power_usage, t_pb* pb, t_interc VTR_ASSERT(0); } - power_add_usage(&interc_pins->interconnect->interconnect_power->power_usage, - power_usage); + power_add_usage(&interc_pins->interconnect->interconnect_power->power_usage, power_usage); } /** @@ -552,22 +553,19 @@ void power_usage_mux_multilevel(t_power_usage* power_usage, power_zero_usage(power_usage); /* Find selection index at each level */ - found = mux_find_selector_values(selector_values, mux_arch->mux_graph_head, - selected_input); + found = mux_find_selector_values(selector_values, mux_arch->mux_graph_head, selected_input); VTR_ASSERT(found); /* Calculate power of the multiplexor stages, from final stage, to first stages */ - power_usage_mux_rec(power_usage, &output_density, &output_prob, &V_out, - mux_arch->mux_graph_head, mux_arch, selector_values, in_prob, - in_dens, output_level_restored, period); + power_usage_mux_rec(power_usage, &output_density, &output_prob, &V_out, mux_arch->mux_graph_head, mux_arch, + selector_values, in_prob, in_dens, output_level_restored, period); delete[] selector_values; callibration = power_ctx.commonly_used->component_callibration[POWER_CALLIB_COMPONENT_MUX]; if (callibration->is_done_callibration()) { - scale_factor = callibration->scale_factor(mux_arch->num_inputs, - mux_arch->transistor_size); + scale_factor = callibration->scale_factor(mux_arch->num_inputs, mux_arch->transistor_size); power_scale_usage(power_usage, scale_factor); } } @@ -575,7 +573,17 @@ void power_usage_mux_multilevel(t_power_usage* power_usage, /** * Internal function, used recursively by power_calc_mux */ -static void power_usage_mux_rec(t_power_usage* power_usage, float* out_prob, float* out_dens, float* v_out, t_mux_node* mux_node, t_mux_arch* mux_arch, int* selector_values, float* primary_input_prob, float* primary_input_dens, bool v_out_restored, float period) { +static void power_usage_mux_rec(t_power_usage* power_usage, + float* out_prob, + float* out_dens, + float* v_out, + t_mux_node* mux_node, + t_mux_arch* mux_arch, + int* selector_values, + float* primary_input_prob, + float* primary_input_dens, + bool v_out_restored, + float period) { int input_idx; float* in_prob; float* in_dens; @@ -612,17 +620,15 @@ static void power_usage_mux_rec(t_power_usage* power_usage, float* out_prob, flo for (input_idx = 0; input_idx < mux_node->num_inputs; input_idx++) { /* Call recursively for multiplexer driving the input */ - power_usage_mux_rec(power_usage, &in_prob[input_idx], - &in_dens[input_idx], &v_in[input_idx], - &mux_node->children[input_idx], mux_arch, selector_values, - primary_input_prob, primary_input_dens, false, period); + power_usage_mux_rec(power_usage, &in_prob[input_idx], &in_dens[input_idx], &v_in[input_idx], + &mux_node->children[input_idx], mux_arch, selector_values, primary_input_prob, + primary_input_dens, false, period); } } - power_usage_mux_singlelevel_static(&sub_power_usage, out_prob, out_dens, - v_out, mux_node->num_inputs, selector_values[mux_node->level], - in_prob, in_dens, v_in, mux_arch->transistor_size, v_out_restored, - period); + power_usage_mux_singlelevel_static(&sub_power_usage, out_prob, out_dens, v_out, mux_node->num_inputs, + selector_values[mux_node->level], in_prob, in_dens, v_in, + mux_arch->transistor_size, v_out_restored, period); power_add_usage(power_usage, &sub_power_usage); if (mux_node->level != 0) { @@ -642,7 +648,12 @@ static void power_usage_mux_rec(t_power_usage* power_usage, float* out_prob, flo * - level_restored: Whether this buffer must level restore the input * - input_mux_size: If fed by a mux, the size of this mutliplexer */ -void power_usage_buffer(t_power_usage* power_usage, float size, float in_prob, float in_dens, bool level_restorer, float period) { +void power_usage_buffer(t_power_usage* power_usage, + float size, + float in_prob, + float in_dens, + bool level_restorer, + float period) { t_power_usage sub_power_usage; int i, num_stages; float stage_effort; @@ -660,8 +671,7 @@ void power_usage_buffer(t_power_usage* power_usage, float size, float in_prob, f auto& power_ctx = g_vpr_ctx.power(); - num_stages = power_calc_buffer_num_stages(size, - power_ctx.arch->logical_effort_factor); + num_stages = power_calc_buffer_num_stages(size, power_ctx.arch->logical_effort_factor); stage_effort = calc_buffer_stage_effort(num_stages, size); stage_in_prob = in_prob; @@ -671,15 +681,12 @@ void power_usage_buffer(t_power_usage* power_usage, float size, float in_prob, f if (i == 0) { if (level_restorer) { /* Sense Buffer */ - power_usage_level_restorer(&sub_power_usage, &input_dyn_power, - in_dens, stage_in_prob, period); + power_usage_level_restorer(&sub_power_usage, &input_dyn_power, in_dens, stage_in_prob, period); } else { - power_usage_inverter(&sub_power_usage, in_dens, stage_in_prob, - stage_inv_size, period); + power_usage_inverter(&sub_power_usage, in_dens, stage_in_prob, stage_inv_size, period); } } else { - power_usage_inverter(&sub_power_usage, in_dens, stage_in_prob, - stage_inv_size, period); + power_usage_inverter(&sub_power_usage, in_dens, stage_in_prob, stage_inv_size, period); } power_add_usage(power_usage, &sub_power_usage); diff --git a/vpr/src/power/power_components.h b/vpr/src/power/power_components.h index dd235450603..82378163a05 100644 --- a/vpr/src/power/power_components.h +++ b/vpr/src/power/power_components.h @@ -38,7 +38,7 @@ */ #define POWER_LUT_SLOW #if (!(defined(POWER_LUT_SLOW) || defined(POWER_LUT_FAST))) -# define POWER_LUT_SLOW +#define POWER_LUT_SLOW #endif /************************* ENUMS ************************************/ @@ -76,15 +76,30 @@ typedef t_power_breakdown t_power_components; void power_components_init(); void power_components_uninit(); -void power_component_get_usage(t_power_usage* power_usage, - e_power_component_type component_idx); -void power_component_add_usage(t_power_usage* power_usage, - e_power_component_type component_idx); +void power_component_get_usage(t_power_usage* power_usage, e_power_component_type component_idx); +void power_component_add_usage(t_power_usage* power_usage, e_power_component_type component_idx); float power_component_get_usage_sum(e_power_component_type component_idx); -void power_usage_ff(t_power_usage* power_usage, float size, float D_prob, float D_dens, float Q_prob, float Q_dens, float clk_prob, float clk_dens, float period); -void power_usage_lut(t_power_usage* power_usage, int LUT_size, float transistor_size, std::string SRAM_values, float* input_densities, float* input_probabilities, float period); -void power_usage_local_interc_mux(t_power_usage* power_usage, t_pb* pb, t_interconnect_pins* interc_pins, ClusterBlockId iblk); +void power_usage_ff(t_power_usage* power_usage, + float size, + float D_prob, + float D_dens, + float Q_prob, + float Q_dens, + float clk_prob, + float clk_dens, + float period); +void power_usage_lut(t_power_usage* power_usage, + int LUT_size, + float transistor_size, + std::string SRAM_values, + float* input_densities, + float* input_probabilities, + float period); +void power_usage_local_interc_mux(t_power_usage* power_usage, + t_pb* pb, + t_interconnect_pins* interc_pins, + ClusterBlockId iblk); void power_usage_mux_multilevel(t_power_usage* power_usage, t_mux_arch* mux_arch, float* in_prob, @@ -92,6 +107,11 @@ void power_usage_mux_multilevel(t_power_usage* power_usage, int selected_input, bool output_level_restored, float period); -void power_usage_buffer(t_power_usage* power_usage, float size, float in_prob, float in_dens, bool level_restored, float period); +void power_usage_buffer(t_power_usage* power_usage, + float size, + float in_prob, + float in_dens, + bool level_restored, + float period); #endif diff --git a/vpr/src/power/power_lowlevel.cpp b/vpr/src/power/power_lowlevel.cpp index 2f74c7fd73c..b7a0388a097 100644 --- a/vpr/src/power/power_lowlevel.cpp +++ b/vpr/src/power/power_lowlevel.cpp @@ -30,7 +30,11 @@ /************************* FUNCTION DECLARATIONS ********************/ static float power_calc_node_switching_v(float capacitance, float density, float period, float voltage); -static void power_calc_transistor_capacitance(float* C_d, float* C_s, float* C_g, e_tx_type transistor_type, float size); +static void power_calc_transistor_capacitance(float* C_d, + float* C_s, + float* C_g, + e_tx_type transistor_type, + float size); static float power_calc_leakage_st(e_tx_type transistor_type, float size); static float power_calc_leakage_st_pass_transistor(float size, float v_ds); static float power_calc_leakage_gate(e_tx_type transistor_type, float size); @@ -52,28 +56,21 @@ void power_lowlevel_init() { power_ctx.commonly_used->NMOS_1X_C_g = C_g; power_ctx.commonly_used->NMOS_1X_C_s = C_s; - power_calc_transistor_capacitance(&C_d, &C_s, &C_g, PMOS, - power_ctx.tech->PN_ratio); + power_calc_transistor_capacitance(&C_d, &C_s, &C_g, PMOS, power_ctx.tech->PN_ratio); power_ctx.commonly_used->PMOS_1X_C_d = C_d; power_ctx.commonly_used->PMOS_1X_C_g = C_g; power_ctx.commonly_used->PMOS_1X_C_s = C_s; - power_ctx.commonly_used->NMOS_1X_st_leakage = power_calc_leakage_st(NMOS, - 1.0); - power_ctx.commonly_used->PMOS_1X_st_leakage = power_calc_leakage_st(PMOS, - 1.0 * power_ctx.tech->PN_ratio); + power_ctx.commonly_used->NMOS_1X_st_leakage = power_calc_leakage_st(NMOS, 1.0); + power_ctx.commonly_used->PMOS_1X_st_leakage = power_calc_leakage_st(PMOS, 1.0 * power_ctx.tech->PN_ratio); - power_ctx.commonly_used->INV_1X_C_in = power_ctx.commonly_used->NMOS_1X_C_g - + power_ctx.commonly_used->PMOS_1X_C_g; - power_ctx.commonly_used->INV_1X_C = power_ctx.commonly_used->NMOS_1X_C_g - + power_ctx.commonly_used->PMOS_1X_C_g - + power_ctx.commonly_used->NMOS_1X_C_d - + power_ctx.commonly_used->PMOS_1X_C_d; + power_ctx.commonly_used->INV_1X_C_in = power_ctx.commonly_used->NMOS_1X_C_g + power_ctx.commonly_used->PMOS_1X_C_g; + power_ctx.commonly_used->INV_1X_C = power_ctx.commonly_used->NMOS_1X_C_g + power_ctx.commonly_used->PMOS_1X_C_g + + power_ctx.commonly_used->NMOS_1X_C_d + power_ctx.commonly_used->PMOS_1X_C_d; power_calc_transistor_capacitance(&C_d, &C_s, &C_g, NMOS, 2.0); power_ctx.commonly_used->INV_2X_C = C_g + C_d; - power_calc_transistor_capacitance(&C_d, &C_s, &C_g, PMOS, - 2.0 * power_ctx.tech->PN_ratio); + power_calc_transistor_capacitance(&C_d, &C_s, &C_g, PMOS, 2.0 * power_ctx.tech->PN_ratio); power_ctx.commonly_used->INV_2X_C += C_g + C_d; } @@ -84,8 +81,7 @@ void power_lowlevel_init() { */ float power_calc_node_switching(float capacitance, float density, float period) { auto& power_ctx = g_vpr_ctx.power(); - return 0.5 * power_ctx.tech->Vdd * power_ctx.tech->Vdd * capacitance * density - / period; + return 0.5 * power_ctx.tech->Vdd * power_ctx.tech->Vdd * capacitance * density / period; } /** @@ -119,18 +115,16 @@ void power_usage_inverter(t_power_usage* power_usage, float in_dens, float in_pr C_inv = 0.; - power_calc_transistor_capacitance(&C_drain, &C_source, &C_gate, NMOS, - NMOS_size); + power_calc_transistor_capacitance(&C_drain, &C_source, &C_gate, NMOS, NMOS_size); C_inv += C_gate + C_drain; - power_calc_transistor_capacitance(&C_drain, &C_source, &C_gate, PMOS, - PMOS_size); + power_calc_transistor_capacitance(&C_drain, &C_source, &C_gate, PMOS, PMOS_size); C_inv += C_gate + C_drain; power_usage->dynamic = power_calc_node_switching(C_inv, in_dens, period); - power_usage->leakage = in_prob * power_calc_leakage_st(PMOS, PMOS_size) - + (1 - in_prob) * power_calc_leakage_st(NMOS, NMOS_size); + power_usage->leakage + = in_prob * power_calc_leakage_st(PMOS, PMOS_size) + (1 - in_prob) * power_calc_leakage_st(NMOS, NMOS_size); power_usage->leakage += in_prob * power_calc_leakage_gate(NMOS, NMOS_size) + (1 - in_prob) * power_calc_leakage_gate(PMOS, PMOS_size); @@ -162,21 +156,18 @@ void power_usage_inverter_irregular(t_power_usage* power_usage, C_inv = 0.; C_in = 0.; - power_calc_transistor_capacitance(&C_drain, &C_source, &C_gate, NMOS, - NMOS_size); + power_calc_transistor_capacitance(&C_drain, &C_source, &C_gate, NMOS, NMOS_size); C_inv += C_gate + C_drain; C_in += C_gate; - power_calc_transistor_capacitance(&C_drain, &C_source, &C_gate, PMOS, - PMOS_size); + power_calc_transistor_capacitance(&C_drain, &C_source, &C_gate, PMOS, PMOS_size); C_inv += C_gate + C_drain; C_in += C_gate; power_usage->dynamic = power_calc_node_switching(C_inv, in_density, period); *dyn_power_input = power_calc_node_switching(C_in, in_density, period); - power_usage->leakage = in_probability - * power_calc_leakage_st(PMOS, PMOS_size) + power_usage->leakage = in_probability * power_calc_leakage_st(PMOS, PMOS_size) + (1 - in_probability) * power_calc_leakage_st(NMOS, NMOS_size); } @@ -235,7 +226,11 @@ void power_calc_inverter_with_input(t_power_usage * power_usage, * - transistor_type: NMOS or PMOS * - size: (W/L) size of the transistor */ -static void power_calc_transistor_capacitance(float* C_d, float* C_s, float* C_g, e_tx_type transistor_type, float size) { +static void power_calc_transistor_capacitance(float* C_d, + float* C_s, + float* C_g, + e_tx_type transistor_type, + float size) { t_transistor_size_inf* tx_info_lower; t_transistor_size_inf* tx_info_upper; bool error; @@ -245,8 +240,7 @@ static void power_calc_transistor_capacitance(float* C_d, float* C_s, float* C_g *C_s = 0.; *C_g = 0.; - error = power_find_transistor_info(&tx_info_lower, &tx_info_upper, - transistor_type, size); + error = power_find_transistor_info(&tx_info_lower, &tx_info_upper, transistor_type, size); if (error) { return; } @@ -263,14 +257,10 @@ static void power_calc_transistor_capacitance(float* C_d, float* C_s, float* C_g *C_g = tx_info_lower->C_g; } else { /* Linear approximation between sizes */ - float percent_upper = (size - tx_info_lower->size) - / (tx_info_upper->size - tx_info_lower->size); - *C_d = (1 - percent_upper) * tx_info_lower->C_d - + percent_upper * tx_info_upper->C_d; - *C_s = (1 - percent_upper) * tx_info_lower->C_s - + percent_upper * tx_info_upper->C_s; - *C_g = (1 - percent_upper) * tx_info_lower->C_g - + percent_upper * tx_info_upper->C_g; + float percent_upper = (size - tx_info_lower->size) / (tx_info_upper->size - tx_info_lower->size); + *C_d = (1 - percent_upper) * tx_info_lower->C_d + percent_upper * tx_info_upper->C_d; + *C_s = (1 - percent_upper) * tx_info_lower->C_s + percent_upper * tx_info_upper->C_s; + *C_g = (1 - percent_upper) * tx_info_lower->C_g + percent_upper * tx_info_upper->C_g; } return; @@ -288,8 +278,7 @@ static float power_calc_leakage_st(e_tx_type transistor_type, float size) { bool error; float current; - error = power_find_transistor_info(&tx_info_lower, &tx_info_upper, - transistor_type, size); + error = power_find_transistor_info(&tx_info_lower, &tx_info_upper, transistor_type, size); if (error) { return 0; } @@ -303,8 +292,7 @@ static float power_calc_leakage_st(e_tx_type transistor_type, float size) { current = tx_info_lower->leakage_subthreshold; } else { /* Linear approximation between sizes */ - float percent_upper = (size - tx_info_lower->size) - / (tx_info_upper->size - tx_info_lower->size); + float percent_upper = (size - tx_info_lower->size) / (tx_info_upper->size - tx_info_lower->size); current = (1 - percent_upper) * tx_info_lower->leakage_subthreshold + percent_upper * tx_info_upper->leakage_subthreshold; } @@ -324,8 +312,7 @@ static float power_calc_leakage_gate(e_tx_type transistor_type, float size) { bool error; float current; - error = power_find_transistor_info(&tx_info_lower, &tx_info_upper, - transistor_type, size); + error = power_find_transistor_info(&tx_info_lower, &tx_info_upper, transistor_type, size); if (error) { return 0; } @@ -339,10 +326,8 @@ static float power_calc_leakage_gate(e_tx_type transistor_type, float size) { current = tx_info_lower->leakage_gate; } else { /* Linear approximation between sizes */ - float percent_upper = (size - tx_info_lower->size) - / (tx_info_upper->size - tx_info_lower->size); - current = (1 - percent_upper) * tx_info_lower->leakage_gate - + percent_upper * tx_info_upper->leakage_gate; + float percent_upper = (size - tx_info_lower->size) / (tx_info_upper->size - tx_info_lower->size); + current = (1 - percent_upper) * tx_info_lower->leakage_gate + percent_upper * tx_info_upper->leakage_gate; } auto& power_ctx = g_vpr_ctx.power(); @@ -384,10 +369,7 @@ static float power_calc_leakage_st_pass_transistor(float size, float v_ds) { } } - if (size - > power_ctx.tech->nmos_leakage_info[power_ctx.tech->num_nmos_leakage_info - - 1] - .nmos_size) { + if (size > power_ctx.tech->nmos_leakage_info[power_ctx.tech->num_nmos_leakage_info - 1].nmos_size) { power_log_msg(POWER_LOG_ERROR, "The architectures uses multiplexers with \ transistors sizes larger than what is defined in the \ @@ -412,14 +394,12 @@ static float power_calc_leakage_st_pass_transistor(float size, float v_ds) { if (lower->v_ds == v_ds || !upper) { i_ds = lower->i_ds; } else { - float perc_upper = (v_ds - lower->v_ds) - / (upper->v_ds - lower->v_ds); + float perc_upper = (v_ds - lower->v_ds) / (upper->v_ds - lower->v_ds); i_ds = (1 - perc_upper) * lower->i_ds + perc_upper * upper->i_ds; } power_high = i_ds * power_ctx.tech->Vdd; - float perc_upper = (size - nmos_low->nmos_size) - / (nmos_high->nmos_size - nmos_low->nmos_size); + float perc_upper = (size - nmos_low->nmos_size) / (nmos_high->nmos_size - nmos_low->nmos_size); return power_high * perc_upper + power_low * (1 - perc_upper); } } @@ -432,8 +412,7 @@ static float power_calc_leakage_st_pass_transistor(float size, float v_ds) { */ void power_usage_wire(t_power_usage* power_usage, float capacitance, float density, float period) { power_usage->leakage = 0.; - power_usage->dynamic = power_calc_node_switching(capacitance, density, - period); + power_usage->dynamic = power_calc_node_switching(capacitance, density, period); } /** @@ -445,7 +424,13 @@ void power_usage_wire(t_power_usage* power_usage, float capacitance, float densi * - sel_prob: Signal probability of select line * - out_dens: Transition density of the output */ -void power_usage_MUX2_transmission(t_power_usage* power_usage, float size, float* in_dens, float* in_prob, float sel_dens, float out_dens, float period) { +void power_usage_MUX2_transmission(t_power_usage* power_usage, + float size, + float* in_dens, + float* in_prob, + float sel_dens, + float out_dens, + float period) { auto& power_ctx = g_vpr_ctx.power(); power_zero_usage(power_usage); @@ -458,27 +443,20 @@ void power_usage_MUX2_transmission(t_power_usage* power_usage, float size, float power_calc_transistor_capacitance(&C_d_n, &C_s_n, &C_g_n, NMOS, size); float C_g_p, C_d_p, C_s_p; - power_calc_transistor_capacitance(&C_d_p, &C_s_p, &C_g_p, PMOS, - size * power_ctx.tech->PN_ratio); + power_calc_transistor_capacitance(&C_d_p, &C_s_p, &C_g_p, PMOS, size * power_ctx.tech->PN_ratio); /* A transmission gate leaks if the selected input != other input */ - power_usage->leakage += (in_prob[0] * (1 - in_prob[1]) - + (1 - in_prob[0]) * in_prob[1]) - * (leakage_n + leakage_p); + power_usage->leakage += (in_prob[0] * (1 - in_prob[1]) + (1 - in_prob[0]) * in_prob[1]) * (leakage_n + leakage_p); /* Gate switching */ - power_usage->dynamic += 2 - * power_calc_node_switching(C_g_n + C_g_p, sel_dens, period); + power_usage->dynamic += 2 * power_calc_node_switching(C_g_n + C_g_p, sel_dens, period); /* Input switching */ - power_usage->dynamic += power_calc_node_switching(C_d_n + C_s_p, in_dens[0], - period); - power_usage->dynamic += power_calc_node_switching(C_d_n + C_s_p, in_dens[1], - period); + power_usage->dynamic += power_calc_node_switching(C_d_n + C_s_p, in_dens[0], period); + power_usage->dynamic += power_calc_node_switching(C_d_n + C_s_p, in_dens[1], period); /* Output switching */ - power_usage->dynamic += power_calc_node_switching(2 * (C_s_n + C_d_p), - out_dens, period); + power_usage->dynamic += power_calc_node_switching(2 * (C_s_n + C_d_p), out_dens, period); } /** @@ -544,8 +522,7 @@ void power_usage_mux_singlelevel_static(t_power_usage* power_usage, for (input_idx = 0; input_idx < num_inputs; input_idx++) { /* Dynamic Power at Inputs */ - power_usage->dynamic += power_calc_node_switching_v(C_d, - in_dens[input_idx], period, v_in[input_idx]); + power_usage->dynamic += power_calc_node_switching_v(C_d, in_dens[input_idx], period, v_in[input_idx]); if (input_idx != selected_idx) { in_prob_avg += in_prob[input_idx]; @@ -557,8 +534,7 @@ void power_usage_mux_singlelevel_static(t_power_usage* power_usage, auto& power_ctx = g_vpr_ctx.power(); *v_out = power_ctx.tech->Vdd; } else { - *v_out = power_calc_mux_v_out(num_inputs, transistor_size, - v_in_selected, in_prob_avg); + *v_out = power_calc_mux_v_out(num_inputs, transistor_size, v_in_selected, in_prob_avg); } for (input_idx = 0; input_idx < num_inputs; input_idx++) { @@ -569,19 +545,16 @@ void power_usage_mux_singlelevel_static(t_power_usage* power_usage, } /* Output is high and this input is low */ - power_usage->leakage += (*out_prob) * (1 - in_prob[input_idx]) - * power_calc_leakage_st_pass_transistor(transistor_size, - *v_out); + power_usage->leakage + += (*out_prob) * (1 - in_prob[input_idx]) * power_calc_leakage_st_pass_transistor(transistor_size, *v_out); /* Output is low and this input is high */ power_usage->leakage += (1 - *out_prob) * in_prob[input_idx] - * power_calc_leakage_st_pass_transistor(transistor_size, - v_in[input_idx]); + * power_calc_leakage_st_pass_transistor(transistor_size, v_in[input_idx]); } /* Dynamic Power at Output */ - power_usage->dynamic += power_calc_node_switching_v(C_s * num_inputs, - *out_dens, period, *v_out); + power_usage->dynamic += power_calc_node_switching_v(C_s * num_inputs, *out_dens, period, *v_out); } /** @@ -609,8 +582,7 @@ float power_calc_mux_v_out(int num_inputs, float transistor_size, float v_in, fl auto& power_ctx = g_vpr_ctx.power(); // Check if nmos size is beyond range - if (transistor_size - >= power_ctx.tech->nmos_mux_info[power_ctx.tech->num_nmos_mux_info - 1].nmos_size) { + if (transistor_size >= power_ctx.tech->nmos_mux_info[power_ctx.tech->num_nmos_mux_info - 1].nmos_size) { mux_nmos_inf_lower = &power_ctx.tech->nmos_mux_info[power_ctx.tech->num_nmos_mux_info - 1]; over_range = true; } else { @@ -625,8 +597,7 @@ float power_calc_mux_v_out(int num_inputs, float transistor_size, float v_in, fl VTR_ASSERT(mux_nmos_inf_lower); - if (transistor_size - > power_ctx.tech->nmos_mux_info[power_ctx.tech->num_nmos_mux_info - 1].nmos_size) { + if (transistor_size > power_ctx.tech->nmos_mux_info[power_ctx.tech->num_nmos_mux_info - 1].nmos_size) { power_log_msg(POWER_LOG_ERROR, "The architectures uses multiplexers with \ transistors sizes larger than what is defined in the \ @@ -649,10 +620,8 @@ float power_calc_mux_v_out(int num_inputs, float transistor_size, float v_in, fl v_out_max = lower->v_out_max; } else { float perc_upper = (v_in - lower->v_in) / (upper->v_in - lower->v_in); - v_out_min = (1 - perc_upper) * lower->v_out_min - + perc_upper * upper->v_out_min; - v_out_max = (1 - perc_upper) * lower->v_out_max - + perc_upper * upper->v_out_max; + v_out_min = (1 - perc_upper) * lower->v_out_min + perc_upper * upper->v_out_min; + v_out_max = (1 - perc_upper) * lower->v_out_max + perc_upper * upper->v_out_max; } v_out_low = in_prob_avg * v_out_max + (1 - in_prob_avg) * v_out_min; @@ -666,18 +635,14 @@ float power_calc_mux_v_out(int num_inputs, float transistor_size, float v_in, fl v_out_min = lower->v_out_min; v_out_max = lower->v_out_max; } else { - float perc_upper = (v_in - lower->v_in) - / (upper->v_in - lower->v_in); - v_out_min = (1 - perc_upper) * lower->v_out_min - + perc_upper * upper->v_out_min; - v_out_max = (1 - perc_upper) * lower->v_out_max - + perc_upper * upper->v_out_max; + float perc_upper = (v_in - lower->v_in) / (upper->v_in - lower->v_in); + v_out_min = (1 - perc_upper) * lower->v_out_min + perc_upper * upper->v_out_min; + v_out_max = (1 - perc_upper) * lower->v_out_max + perc_upper * upper->v_out_max; } v_out_high = in_prob_avg * v_out_max + (1 - in_prob_avg) * v_out_min; float perc_upper = (transistor_size - mux_nmos_inf_lower->nmos_size) - / (mux_nmos_inf_upper->nmos_size - - mux_nmos_inf_lower->nmos_size); + / (mux_nmos_inf_upper->nmos_size - mux_nmos_inf_lower->nmos_size); return v_out_high * perc_upper + (1 - perc_upper) * v_out_low; } } @@ -721,29 +686,24 @@ void power_usage_mux_singlelevel_dynamic(t_power_usage* power_usage, /* 1st selected, 1st High, 2nd Low - Leakage from 2nd out->in */ /* 2nd selected, 1st Low, 2nd High - Leakage from 1st out->in */ - power_usage->leakage += ((1 - sel_prob) * in_prob[0] * (1 - in_prob[1]) - + sel_prob * (1 - in_prob[0]) * in_prob[1]) + power_usage->leakage += ((1 - sel_prob) * in_prob[0] * (1 - in_prob[1]) + sel_prob * (1 - in_prob[0]) * in_prob[1]) * power_calc_leakage_st_pass_transistor(transistor_size, v_out); /* 2nd selected, 1st High, 2nd Low - Leakage from 1st in->out */ - power_usage->leakage += sel_prob * in_prob[0] * (1 - in_prob[1]) - * power_calc_leakage_st_pass_transistor(transistor_size, v_in[0]); + power_usage->leakage + += sel_prob * in_prob[0] * (1 - in_prob[1]) * power_calc_leakage_st_pass_transistor(transistor_size, v_in[0]); /* Gate switching */ float C_d, C_s, C_g; power_calc_transistor_capacitance(&C_d, &C_s, &C_g, NMOS, transistor_size); - power_usage->dynamic += 2 - * power_calc_node_switching(C_g, sel_dens, period); + power_usage->dynamic += 2 * power_calc_node_switching(C_g, sel_dens, period); /* Input switching */ - power_usage->dynamic += power_calc_node_switching_v(C_d, in_dens[0], period, - v_in[0]); - power_usage->dynamic += power_calc_node_switching_v(C_d, in_dens[1], period, - v_in[1]); + power_usage->dynamic += power_calc_node_switching_v(C_d, in_dens[0], period, v_in[0]); + power_usage->dynamic += power_calc_node_switching_v(C_d, in_dens[1], period, v_in[1]); /* Output switching */ - power_usage->dynamic += power_calc_node_switching_v(2 * C_s, out_density, - period, v_out); + power_usage->dynamic += power_calc_node_switching_v(2 * C_s, out_density, period, v_out); } /** @@ -767,8 +727,7 @@ void power_usage_level_restorer(t_power_usage* power_usage, power_zero_usage(power_usage); /* Inverter */ - power_usage_inverter_irregular(&sub_power_usage, &input_dyn_power, in_dens, - in_prob, 1.0, 2.0, period); + power_usage_inverter_irregular(&sub_power_usage, &input_dyn_power, in_dens, in_prob, 1.0, 2.0, period); power_add_usage(power_usage, &sub_power_usage); auto& power_ctx = g_vpr_ctx.power(); @@ -779,14 +738,12 @@ void power_usage_level_restorer(t_power_usage* power_usage, "No long transistor information exists. Cannot determine transistor properties."); return; } - C = power_ctx.tech->PMOS_inf.long_trans_inf->C_d - + power_ctx.tech->PMOS_inf.long_trans_inf->C_g; + C = power_ctx.tech->PMOS_inf.long_trans_inf->C_d + power_ctx.tech->PMOS_inf.long_trans_inf->C_g; C_in = power_ctx.tech->PMOS_inf.long_trans_inf->C_d; input_dyn_power += power_calc_node_switching(C_in, in_dens, period); power_usage->dynamic += power_calc_node_switching(C, in_dens, period); - power_usage->leakage += (1 - in_prob) - * power_ctx.tech->PMOS_inf.long_trans_inf->leakage_subthreshold; + power_usage->leakage += (1 - in_prob) * power_ctx.tech->PMOS_inf.long_trans_inf->leakage_subthreshold; *dyn_power_in = input_dyn_power; } @@ -894,11 +851,11 @@ float power_calc_buffer_size_from_Cout(float C_out) { if (C_found > C_out) { if (i == 0) { power_log_msg(POWER_LOG_WARNING, - "Attempted to search for a transistor with a capacitance smaller than the smallest in the technology file.\n"); + "Attempted to search for a transistor with a capacitance smaller than the smallest in " + "the technology file.\n"); return nmos_info->size_inf[i].size; } else { - float C_prev = nmos_info->size_inf[i - 1].C_d - + pmos_info->size_inf[i - 1].C_d; + float C_prev = nmos_info->size_inf[i - 1].C_d + pmos_info->size_inf[i - 1].C_d; float percent_upper = (C_out - C_prev) / (C_found - C_prev); return percent_upper * nmos_info->size_inf[i].size + (1 - percent_upper) * nmos_info->size_inf[i - 1].size; @@ -908,7 +865,8 @@ float power_calc_buffer_size_from_Cout(float C_out) { /* Reached the End */ if (i == nmos_info->num_size_entries - 1) { power_log_msg(POWER_LOG_WARNING, - "Attempted to search for a transistor with a capacitance greater than the largest in the technology file.\n"); + "Attempted to search for a transistor with a capacitance greater than the largest in the " + "technology file.\n"); return nmos_info->size_inf[i].size; } } diff --git a/vpr/src/power/power_lowlevel.h b/vpr/src/power/power_lowlevel.h index 6a128b45453..851dcf3fe26 100644 --- a/vpr/src/power/power_lowlevel.h +++ b/vpr/src/power/power_lowlevel.h @@ -58,7 +58,13 @@ void power_usage_mux_singlelevel_static(t_power_usage* power_usage, bool v_out_restored, float period); -void power_usage_MUX2_transmission(t_power_usage* power_usage, float size, float* in_dens, float* in_prob, float sel_dens, float out_dens, float period); +void power_usage_MUX2_transmission(t_power_usage* power_usage, + float size, + float* in_dens, + float* in_prob, + float sel_dens, + float out_dens, + float period); void power_usage_mux_singlelevel_dynamic(t_power_usage* power_usage, int num_inputs, @@ -78,8 +84,7 @@ void power_usage_level_restorer(t_power_usage* power_usage, float in_probability, float period); -float power_calc_pb_switching_from_c_internal(t_pb* pb, - t_pb_graph_node* pb_graph_node); +float power_calc_pb_switching_from_c_internal(t_pb* pb, t_pb_graph_node* pb_graph_node); float power_calc_mux_v_out(int num_inputs, float transistor_size, float v_in, float in_prob_avg); diff --git a/vpr/src/power/power_sizing.cpp b/vpr/src/power/power_sizing.cpp index 914bf13afde..c14d453ba12 100644 --- a/vpr/src/power/power_sizing.cpp +++ b/vpr/src/power/power_sizing.cpp @@ -39,30 +39,24 @@ static double f_MTA_area; /************************* FUNCTION DECLARATIONS ********************/ static double power_count_transistors_connectionbox(); static double power_count_transistors_mux(t_mux_arch* mux_arch); -static double power_count_transistors_mux_node(t_mux_node* mux_node, - float transistor_size); -static void power_mux_node_max_inputs(t_mux_node* mux_node, - float* max_inputs); +static double power_count_transistors_mux_node(t_mux_node* mux_node, float transistor_size); +static void power_mux_node_max_inputs(t_mux_node* mux_node, float* max_inputs); static double power_count_transistors_interc(t_interconnect* interc); static double power_count_transistors_pb_node(t_pb_graph_node* pb_node); static double power_count_transistors_switchbox(); static double power_count_transistors_primitive(t_pb_type* pb_type); -static double power_count_transistors_LUT(int LUT_inputs, - float transistor_size); +static double power_count_transistors_LUT(int LUT_inputs, float transistor_size); static double power_count_transistors_FF(float size); static double power_count_transistor_SRAM_bit(); static double power_count_transistors_inv(float size); static double power_count_transistors_trans_gate(float size); static double power_count_transistors_levr(); -static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, - bool pin_is_an_input); +static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, bool pin_is_an_input); static double power_transistors_for_pb_node(t_pb_graph_node* pb_node); static double power_transistors_per_tile(); static void power_size_pb(); static void power_size_pb_rec(t_pb_graph_node* pb_node); -static void power_size_pin_to_interconnect(t_interconnect* interc, - int* fanout, - float* wirelength); +static void power_size_pin_to_interconnect(t_interconnect* interc, int* fanout, float* wirelength); static double power_MTAs(float W_size); static double power_MTAs_L(float L_size); /************************* FUNCTION DEFINITIONS *********************/ @@ -88,18 +82,15 @@ static double power_count_transistors_connectionbox() { /* Buffers from Tracks */ buffer_size = power_ctx.commonly_used->max_seg_to_IPIN_fanout - * (power_ctx.commonly_used->NMOS_1X_C_d - / power_ctx.commonly_used->INV_1X_C_in) + * (power_ctx.commonly_used->NMOS_1X_C_d / power_ctx.commonly_used->INV_1X_C_in) / power_ctx.arch->logical_effort_factor; buffer_size = std::max(1.0F, buffer_size); - transistor_cnt += power_ctx.solution_inf.channel_width - * power_count_transistors_buffer(buffer_size); + transistor_cnt += power_ctx.solution_inf.channel_width * power_count_transistors_buffer(buffer_size); /* Muxes to IPINs */ transistor_cnt += inputs - * power_count_transistors_mux( - power_get_mux_arch(power_ctx.commonly_used->max_IPIN_fanin, - power_ctx.arch->mux_transistor_size)); + * power_count_transistors_mux(power_get_mux_arch(power_ctx.commonly_used->max_IPIN_fanin, + power_ctx.arch->mux_transistor_size)); } return transistor_cnt; } @@ -117,8 +108,7 @@ double power_count_transistors_buffer(float buffer_size) { auto& power_ctx = g_vpr_ctx.power(); - stages = power_calc_buffer_num_stages(buffer_size, - power_ctx.arch->logical_effort_factor); + stages = power_calc_buffer_num_stages(buffer_size, power_ctx.arch->logical_effort_factor); effort = calc_buffer_stage_effort(stages, buffer_size); stage_size = 1; @@ -148,8 +138,7 @@ static double power_count_transistors_mux(t_mux_arch* mux_arch) { for (lvl_idx = 0; lvl_idx < mux_arch->levels; lvl_idx++) { /* Assume there is decoder logic */ - transistor_cnt += ceil(log(max_inputs[lvl_idx]) / log((double)2.0)) - * power_count_transistor_SRAM_bit(); + transistor_cnt += ceil(log(max_inputs[lvl_idx]) / log((double)2.0)) * power_count_transistor_SRAM_bit(); /* * if (mux_arch->encoding_types[lvl_idx] == ENCODING_DECODER) { @@ -165,8 +154,7 @@ static double power_count_transistors_mux(t_mux_arch* mux_arch) { */ } - transistor_cnt += power_count_transistors_mux_node(mux_arch->mux_graph_head, - mux_arch->transistor_size); + transistor_cnt += power_count_transistors_mux_node(mux_arch->mux_graph_head, mux_arch->transistor_size); delete[] max_inputs; return transistor_cnt; } @@ -175,17 +163,14 @@ static double power_count_transistors_mux(t_mux_arch* mux_arch) { * This function is used recursively to determine the largest single-level * multiplexer at each level of a multi-level multiplexer */ -static void power_mux_node_max_inputs(t_mux_node* mux_node, - float* max_inputs) { - max_inputs[mux_node->level] = std::max(max_inputs[mux_node->level], - static_cast(mux_node->num_inputs)); +static void power_mux_node_max_inputs(t_mux_node* mux_node, float* max_inputs) { + max_inputs[mux_node->level] = std::max(max_inputs[mux_node->level], static_cast(mux_node->num_inputs)); if (mux_node->level != 0) { int child_idx; for (child_idx = 0; child_idx < mux_node->num_inputs; child_idx++) { - power_mux_node_max_inputs(&mux_node->children[child_idx], - max_inputs); + power_mux_node_max_inputs(&mux_node->children[child_idx], max_inputs); } } } @@ -193,8 +178,7 @@ static void power_mux_node_max_inputs(t_mux_node* mux_node, /** * This function is used recursively to count the number of transistors in a multiplexer */ -static double power_count_transistors_mux_node(t_mux_node* mux_node, - float transistor_size) { +static double power_count_transistors_mux_node(t_mux_node* mux_node, float transistor_size) { int input_idx; double transistor_cnt = 0.; @@ -233,10 +217,8 @@ static double power_count_transistors_interc(t_interconnect* interc) { auto& power_ctx = g_vpr_ctx.power(); transistor_cnt += interc->interconnect_power->num_output_ports * interc->interconnect_power->num_pins_per_port - * power_count_transistors_mux( - power_get_mux_arch( - interc->interconnect_power->num_input_ports, - power_ctx.arch->mux_transistor_size)); + * power_count_transistors_mux(power_get_mux_arch( + interc->interconnect_power->num_input_ports, power_ctx.arch->mux_transistor_size)); break; } default: @@ -290,8 +272,7 @@ static double power_transistors_per_tile() { } static double power_transistors_for_pb_node(t_pb_graph_node* pb_node) { - return pb_node->pb_node_power->transistor_cnt_interc - + pb_node->pb_node_power->transistor_cnt_pb_children + return pb_node->pb_node_power->transistor_cnt_interc + pb_node->pb_node_power->transistor_cnt_pb_children + pb_node->pb_node_power->transistor_cnt_buffers; } @@ -344,7 +325,8 @@ static double power_count_transistors_pb_node(t_pb_graph_node* pb_node) { t_pb_type* child_type = &mode->pb_type_children[child]; for (pb_idx = 0; pb_idx < child_type->num_pb; pb_idx++) { - tc_children += power_transistors_for_pb_node(&pb_node->child_pb_graph_nodes[mode_idx][child][pb_idx]); + tc_children + += power_transistors_for_pb_node(&pb_node->child_pb_graph_nodes[mode_idx][child][pb_idx]); } } @@ -368,14 +350,12 @@ static double power_count_transistors_switchbox() { auto& power_ctx = g_vpr_ctx.power(); /* Buffer */ - transistors_per_buf_mux += power_count_transistors_buffer( - (float)power_ctx.commonly_used->max_seg_fanout - / power_ctx.arch->logical_effort_factor); + transistors_per_buf_mux += power_count_transistors_buffer((float)power_ctx.commonly_used->max_seg_fanout + / power_ctx.arch->logical_effort_factor); /* Multiplexor */ transistors_per_buf_mux += power_count_transistors_mux( - power_get_mux_arch(power_ctx.commonly_used->max_routing_mux_size, - power_ctx.arch->mux_transistor_size)); + power_get_mux_arch(power_ctx.commonly_used->max_routing_mux_size, power_ctx.arch->mux_transistor_size)); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -385,11 +365,9 @@ static double power_count_transistors_switchbox() { * The (x2) factor accounts for vertical and horizontal tracks. * Of the wires of each segment type only (1/seglength) will have a mux&buffer. */ - float freq_frac = (float)rr_graph.rr_segments(RRSegmentId(seg_idx)).frequency - / (float)MAX_CHANNEL_WIDTH; + float freq_frac = (float)rr_graph.rr_segments(RRSegmentId(seg_idx)).frequency / (float)MAX_CHANNEL_WIDTH; - transistor_cnt += transistors_per_buf_mux * 2 * freq_frac - * power_ctx.solution_inf.channel_width + transistor_cnt += transistors_per_buf_mux * 2 * freq_frac * power_ctx.solution_inf.channel_width * (1 / (float)rr_graph.rr_segments(RRSegmentId(seg_idx)).length); } @@ -406,8 +384,7 @@ static double power_count_transistors_primitive(t_pb_type* pb_type) { if (strcmp(pb_type->blif_model, MODEL_NAMES) == 0) { /* LUT */ - transistor_cnt = power_count_transistors_LUT(pb_type->num_input_pins, - power_ctx.arch->LUT_transistor_size); + transistor_cnt = power_count_transistors_LUT(pb_type->num_input_pins, power_ctx.arch->LUT_transistor_size); } else if (strcmp(pb_type->blif_model, MODEL_LATCH) == 0) { /* Latch */ transistor_cnt = power_count_transistors_FF(power_ctx.arch->FF_size); @@ -415,8 +392,7 @@ static double power_count_transistors_primitive(t_pb_type* pb_type) { /* Other */ char msg[vtr::bufsize]; - sprintf(msg, "No transistor counter function for BLIF model: %s", - pb_type->blif_model); + sprintf(msg, "No transistor counter function for BLIF model: %s", pb_type->blif_model); power_log_msg(POWER_LOG_WARNING, msg); transistor_cnt = 0; } @@ -450,31 +426,26 @@ static double power_count_transistors_levr() { /** * Returns the transistor count for a LUT */ -static double power_count_transistors_LUT(int LUT_inputs, - float transistor_size) { +static double power_count_transistors_LUT(int LUT_inputs, float transistor_size) { double transistor_cnt = 0.; int level_idx; /* Each input driver has 1-1X and 2-2X inverters */ - transistor_cnt += (double)LUT_inputs - * (power_count_transistors_inv(1.0) - + 2 * power_count_transistors_inv(2.0)); + transistor_cnt += (double)LUT_inputs * (power_count_transistors_inv(1.0) + 2 * power_count_transistors_inv(2.0)); /* SRAM bits */ transistor_cnt += power_count_transistor_SRAM_bit() * (1 << LUT_inputs); for (level_idx = 0; level_idx < LUT_inputs; level_idx++) { /* Pass transistors */ - transistor_cnt += (1 << (LUT_inputs - level_idx)) - * power_MTAs(transistor_size); + transistor_cnt += (1 << (LUT_inputs - level_idx)) * power_MTAs(transistor_size); /* Add level restorer after every 2 stages (level_idx %2 == 1) * But if there is an odd # of stages, just put one at the last * stage (level_idx == LUT_size - 1) and not at the stage just before * the last stage (level_idx != LUT_size - 2) */ - if (((level_idx % 2 == 1) && (level_idx != LUT_inputs - 2)) - || (level_idx == LUT_inputs - 1)) { + if (((level_idx % 2 == 1) && (level_idx != LUT_inputs - 2)) || (level_idx == LUT_inputs - 1)) { transistor_cnt += power_count_transistors_levr(); } } @@ -520,17 +491,11 @@ static double power_count_transistors_FF(float size) { return transistor_cnt; } -double power_transistor_area(double num_MTAs) { - return num_MTAs * f_MTA_area; -} +double power_transistor_area(double num_MTAs) { return num_MTAs * f_MTA_area; } -static double power_MTAs(float W_size) { - return 1 + (W_size - 1) * (POWER_DRC_MIN_W / POWER_MTA_W); -} +static double power_MTAs(float W_size) { return 1 + (W_size - 1) * (POWER_DRC_MIN_W / POWER_MTA_W); } -static double power_MTAs_L(float L_size) { - return 1 + (L_size - 1) * (POWER_DRC_MIN_L / POWER_MTA_L); -} +static double power_MTAs_L(float L_size) { return 1 + (L_size - 1) * (POWER_DRC_MIN_L / POWER_MTA_L); } static void power_size_pb() { auto& device_ctx = g_vpr_ctx.device(); @@ -591,22 +556,19 @@ static void power_size_pb_rec(t_pb_graph_node* pb_node) { /* Size all local buffers and wires */ if (size_buffers_and_wires) { for (port_idx = 0; port_idx < pb_node->num_input_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_input_pins[port_idx]; - pin_idx++) { + for (pin_idx = 0; pin_idx < pb_node->num_input_pins[port_idx]; pin_idx++) { power_size_pin_buffers_and_wires(&pb_node->input_pins[port_idx][pin_idx], true); } } for (port_idx = 0; port_idx < pb_node->num_output_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_output_pins[port_idx]; - pin_idx++) { + for (pin_idx = 0; pin_idx < pb_node->num_output_pins[port_idx]; pin_idx++) { power_size_pin_buffers_and_wires(&pb_node->output_pins[port_idx][pin_idx], false); } } for (port_idx = 0; port_idx < pb_node->num_clock_ports; port_idx++) { - for (pin_idx = 0; pin_idx < pb_node->num_clock_pins[port_idx]; - pin_idx++) { + for (pin_idx = 0; pin_idx < pb_node->num_clock_pins[port_idx]; pin_idx++) { power_size_pin_buffers_and_wires(&pb_node->clock_pins[port_idx][pin_idx], true); } } @@ -614,9 +576,7 @@ static void power_size_pb_rec(t_pb_graph_node* pb_node) { } /* Provides statistics about the connection between the pin and interconnect */ -static void power_size_pin_to_interconnect(t_interconnect* interc, - int* fanout, - float* wirelength) { +static void power_size_pin_to_interconnect(t_interconnect* interc, int* fanout, float* wirelength) { float this_interc_sidelength; /* Pin to interconnect wirelength */ @@ -629,9 +589,7 @@ static void power_size_pin_to_interconnect(t_interconnect* interc, case COMPLETE_INTERC: /* The sidelength of this crossbar */ - this_interc_sidelength = sqrt( - power_transistor_area( - interc->interconnect_power->transistor_cnt)); + this_interc_sidelength = sqrt(power_transistor_area(interc->interconnect_power->transistor_cnt)); /* Assume that inputs to the crossbar have a structure like this: * @@ -655,8 +613,7 @@ static void power_size_pin_to_interconnect(t_interconnect* interc, } } -static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, - bool pin_is_an_input) { +static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, bool pin_is_an_input) { int edge_idx; int list_cnt; std::vector list; @@ -686,17 +643,14 @@ static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, * //VTR_LOG("here\n"); * }*/ - this_pb_interc_sidelength = sqrt( - power_transistor_area( - pin->parent_node->pb_node_power->transistor_cnt_interc)); + this_pb_interc_sidelength = sqrt(power_transistor_area(pin->parent_node->pb_node_power->transistor_cnt_interc)); if (pin->is_root_block_pin()) { top_level_pb = true; parent_pb_interc_sidelength = 0.; } else { top_level_pb = false; - parent_pb_interc_sidelength = sqrt( - power_transistor_area( - pin->parent_node->parent_pb_graph_node->pb_node_power->transistor_cnt_interc)); + parent_pb_interc_sidelength + = sqrt(power_transistor_area(pin->parent_node->parent_pb_graph_node->pb_node_power->transistor_cnt_interc)); } /* Pins are connected to a wire that is connected to: @@ -753,8 +707,7 @@ static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, for (i = 0; i < list_cnt; i++) { int mode_idx = list[i]->parent_mode_index; - power_size_pin_to_interconnect(list[i], &fanout_tmp, - &wirelength_tmp); + power_size_pin_to_interconnect(list[i], &fanout_tmp, &wirelength_tmp); fanout_per_mode[mode_idx] += fanout_tmp; wirelength_out_per_mode[mode_idx] += wirelength_tmp; @@ -769,8 +722,7 @@ static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, wirelength_out = std::max(wirelength_out, wirelength_out_per_mode[i]); } if (wirelength_out != 0) { - wirelength_out += power_ctx.arch->local_interc_factor - * this_pb_interc_sidelength; + wirelength_out += power_ctx.arch->local_interc_factor * this_pb_interc_sidelength; } delete[] fanout_per_mode; @@ -778,8 +730,7 @@ static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, /* Input wirelength - from parent PB */ if (!top_level_pb) { - wirelength_in = power_ctx.arch->local_interc_factor - * parent_pb_interc_sidelength; + wirelength_in = power_ctx.arch->local_interc_factor * parent_pb_interc_sidelength; } } else { @@ -797,19 +748,16 @@ static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, /* Loop through all interconnect that this pin drives */ for (i = 0; i < list_cnt; i++) { - power_size_pin_to_interconnect(list[i], &fanout_tmp, - &wirelength_tmp); + power_size_pin_to_interconnect(list[i], &fanout_tmp, &wirelength_tmp); fanout += fanout_tmp; wirelength_out += wirelength_tmp; } if (wirelength_out != 0) { - wirelength_out += power_ctx.arch->local_interc_factor - * parent_pb_interc_sidelength; + wirelength_out += power_ctx.arch->local_interc_factor * parent_pb_interc_sidelength; } /* Input wirelength - from this PB */ - wirelength_in = power_ctx.arch->local_interc_factor - * this_pb_interc_sidelength; + wirelength_in = power_ctx.arch->local_interc_factor * this_pb_interc_sidelength; } /* Wirelength */ @@ -822,20 +770,16 @@ static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, pin->pin_power->C_wire = pin->port->port_power->wire.C; break; case POWER_WIRE_TYPE_ABSOLUTE_LENGTH: - pin->pin_power->C_wire = pin->port->port_power->wire.absolute_length - * power_ctx.arch->C_wire_local; + pin->pin_power->C_wire = pin->port->port_power->wire.absolute_length * power_ctx.arch->C_wire_local; break; case POWER_WIRE_TYPE_RELATIVE_LENGTH: - this_pb_length = sqrt( - power_transistor_area( - power_transistors_for_pb_node(pin->parent_node))); - pin->pin_power->C_wire = pin->port->port_power->wire.relative_length - * this_pb_length * power_ctx.arch->C_wire_local; + this_pb_length = sqrt(power_transistor_area(power_transistors_for_pb_node(pin->parent_node))); + pin->pin_power->C_wire + = pin->port->port_power->wire.relative_length * this_pb_length * power_ctx.arch->C_wire_local; break; case POWER_WIRE_TYPE_AUTO: - pin->pin_power->C_wire += power_ctx.arch->C_wire_local - * (wirelength_in + wirelength_out); + pin->pin_power->C_wire += power_ctx.arch->C_wire_local * (wirelength_in + wirelength_out); break; case POWER_WIRE_TYPE_UNDEFINED: default: @@ -867,5 +811,6 @@ static void power_size_pin_buffers_and_wires(t_pb_graph_pin* pin, VTR_ASSERT(0); } - pin->parent_node->pb_node_power->transistor_cnt_buffers += power_count_transistors_buffer(pin->pin_power->buffer_size); + pin->parent_node->pb_node_power->transistor_cnt_buffers + += power_count_transistors_buffer(pin->pin_power->buffer_size); } diff --git a/vpr/src/power/power_util.cpp b/vpr/src/power/power_util.cpp index 52556dac0aa..0126bd39c28 100644 --- a/vpr/src/power/power_util.cpp +++ b/vpr/src/power/power_util.cpp @@ -60,13 +60,9 @@ void power_scale_usage(t_power_usage* power_usage, float scale_factor) { power_usage->leakage *= scale_factor; } -float power_sum_usage(t_power_usage* power_usage) { - return power_usage->dynamic + power_usage->leakage; -} +float power_sum_usage(t_power_usage* power_usage) { return power_usage->dynamic + power_usage->leakage; } -float power_perc_dynamic(t_power_usage* power_usage) { - return power_usage->dynamic / power_sum_usage(power_usage); -} +float power_perc_dynamic(t_power_usage* power_usage) { return power_usage->dynamic / power_sum_usage(power_usage); } void power_log_msg(e_power_log_type log_type, const char* msg) { auto& power_ctx = g_vpr_ctx.power(); @@ -126,17 +122,14 @@ float pin_prob(t_pb* pb, t_pb_graph_pin* pin, ClusterBlockId iblk) { bool mux_find_selector_values(int* selector_values, t_mux_node* mux_node, int selected_input_pin) { if (mux_node->level == 0) { if ((selected_input_pin >= mux_node->starting_pin_idx) - && (selected_input_pin - <= (mux_node->starting_pin_idx + mux_node->num_inputs))) { - selector_values[mux_node->level] = selected_input_pin - - mux_node->starting_pin_idx; + && (selected_input_pin <= (mux_node->starting_pin_idx + mux_node->num_inputs))) { + selector_values[mux_node->level] = selected_input_pin - mux_node->starting_pin_idx; return true; } } else { int input_idx; for (input_idx = 0; input_idx < mux_node->num_inputs; input_idx++) { - if (mux_find_selector_values(selector_values, - &mux_node->children[input_idx], selected_input_pin)) { + if (mux_find_selector_values(selector_values, &mux_node->children[input_idx], selected_input_pin)) { selector_values[mux_node->level] = input_idx; return true; } @@ -175,8 +168,7 @@ static void log_msg(t_log* log_ptr, const char* msg) { * final_stage_size: Size of the final inverter in the buffer, relative to a min size * desired_stage_effort: The desired gain between stages, typically 4 */ -int power_calc_buffer_num_stages(float final_stage_size, - float desired_stage_effort) { +int power_calc_buffer_num_stages(float final_stage_size, float desired_stage_effort) { int N = 1; if (final_stage_size <= 1.0) { @@ -212,8 +204,7 @@ float calc_buffer_stage_effort(int N, float final_stage_size) { * - LUT_size: The number of LUT inputs * - truth_table: The logic terms saved from the BLIF file */ -std::string alloc_SRAM_values_from_truth_table(int LUT_size, - const AtomNetlist::TruthTable& truth_table) { +std::string alloc_SRAM_values_from_truth_table(int LUT_size, const AtomNetlist::TruthTable& truth_table) { size_t num_SRAM_bits = 1 << LUT_size; //SRAM value stored as a string of '0' and '1' characters @@ -269,8 +260,7 @@ std::string alloc_SRAM_values_from_truth_table(int LUT_size, /* Reduce mux levels for multiplexers that are too small for the preset number of levels */ void mux_arch_fix_levels(t_mux_arch* mux_arch) { - while (((1 << mux_arch->levels) > mux_arch->num_inputs) - && (mux_arch->levels > 1)) { + while (((1 << mux_arch->levels) > mux_arch->num_inputs) && (mux_arch->levels > 1)) { mux_arch->levels--; } } @@ -328,8 +318,7 @@ void output_logs(FILE* fp, t_log* logs, int num_logs) { float power_buffer_size_from_logical_effort(float C_load) { auto& power_ctx = g_vpr_ctx.power(); - return std::max(1.0f, - C_load / power_ctx.commonly_used->INV_1X_C_in / (2 * power_ctx.arch->logical_effort_factor)); + return std::max(1.0f, C_load / power_ctx.commonly_used->INV_1X_C_in / (2 * power_ctx.arch->logical_effort_factor)); } void power_print_title(FILE* fp, const char* title) { @@ -371,8 +360,7 @@ t_mux_arch* power_get_mux_arch(int num_mux_inputs, float transistor_size) { mux_info->mux_arch.resize(num_mux_inputs + 1); for (i = mux_info->mux_arch_max_size + 1; i <= num_mux_inputs; i++) { - init_mux_arch_default(&mux_info->mux_arch[i], 2, i, - transistor_size); + init_mux_arch_default(&mux_info->mux_arch[i], 2, i, transistor_size); } mux_info->mux_arch_max_size = num_mux_inputs; } @@ -390,8 +378,7 @@ static void init_mux_arch_default(t_mux_arch* mux_arch, int levels, int num_inpu mux_arch->transistor_size = transistor_size; - mux_arch->mux_graph_head = alloc_and_load_mux_graph(num_inputs, - mux_arch->levels); + mux_arch->mux_graph_head = alloc_and_load_mux_graph(num_inputs, mux_arch->levels); } /** @@ -413,8 +400,7 @@ static void alloc_and_load_mux_graph_recursive(t_mux_node* node, int child_idx; int pin_idx = starting_pin_idx; - node->num_inputs = (int)(pow(num_primary_inputs, 1 / ((float)level + 1)) - + 0.5); + node->num_inputs = (int)(pow(num_primary_inputs, 1 / ((float)level + 1)) + 0.5); node->level = level; node->starting_pin_idx = starting_pin_idx; @@ -425,8 +411,7 @@ static void alloc_and_load_mux_graph_recursive(t_mux_node* node, if (child_idx < (num_primary_inputs % node->num_inputs)) { num_child_pi++; } - alloc_and_load_mux_graph_recursive(&node->children[child_idx], - num_child_pi, level - 1, pin_idx); + alloc_and_load_mux_graph_recursive(&node->children[child_idx], num_child_pi, level - 1, pin_idx); pin_idx += num_child_pi; } } diff --git a/vpr/src/power/power_util.h b/vpr/src/power/power_util.h index 7589af621ad..86adcd66a21 100644 --- a/vpr/src/power/power_util.h +++ b/vpr/src/power/power_util.h @@ -35,9 +35,7 @@ float pin_dens(t_pb* pb, t_pb_graph_pin* pin, ClusterBlockId iblk); float pin_prob(t_pb* pb, t_pb_graph_pin* pin, ClusterBlockId iblk); int power_calc_pin_fanout(t_pb_graph_pin* pin, int mode_idx); -void pb_foreach_pin(t_pb_graph_node* pb_node, - void (*fn)(t_pb_graph_pin*, void*), - void* context); +void pb_foreach_pin(t_pb_graph_node* pb_node, void (*fn)(t_pb_graph_pin*, void*), void* context); /* Power Usage */ void power_zero_usage(t_power_usage* power_usage); @@ -64,8 +62,7 @@ bool power_method_is_transistor_level(e_power_estimation_method estimation_metho bool power_method_is_recursive(e_power_estimation_method method); const char* transistor_type_name(e_tx_type type); -std::string alloc_SRAM_values_from_truth_table(int LUT_size, - const AtomNetlist::TruthTable& truth_table); +std::string alloc_SRAM_values_from_truth_table(int LUT_size, const AtomNetlist::TruthTable& truth_table); float clb_net_density(ClusterNetId net_idx); const char* interconnect_type_name(enum e_interconnect type); float clb_net_prob(ClusterNetId net_idx); diff --git a/vpr/src/route/DecompNetlistRouter.h b/vpr/src/route/DecompNetlistRouter.h index 1f16105a356..11846e3887f 100644 --- a/vpr/src/route/DecompNetlistRouter.h +++ b/vpr/src/route/DecompNetlistRouter.h @@ -24,19 +24,18 @@ const int MIN_DECOMP_SINKS_VNET = 8; template class DecompNetlistRouter : public NetlistRouter { public: - DecompNetlistRouter( - const Netlist<>& net_list, - const RouterLookahead* router_lookahead, - const t_router_opts& router_opts, - CBRR& connections_inf, - NetPinsMatrix& net_delay, - const ClusteredPinAtomPinsLookup& netlist_pin_lookup, - std::shared_ptr timing_info, - NetPinTimingInvalidator* pin_timing_invalidator, - route_budgets& budgeting_inf, - const RoutingPredictor& routing_predictor, - const vtr::vector>>& choking_spots, - bool is_flat) + DecompNetlistRouter(const Netlist<>& net_list, + const RouterLookahead* router_lookahead, + const t_router_opts& router_opts, + CBRR& connections_inf, + NetPinsMatrix& net_delay, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup, + std::shared_ptr timing_info, + NetPinTimingInvalidator* pin_timing_invalidator, + route_budgets& budgeting_inf, + const RoutingPredictor& routing_predictor, + const vtr::vector>>& choking_spots, + bool is_flat) : _routers_th(_make_router(router_lookahead, is_flat)) , _net_list(net_list) , _router_opts(router_opts) @@ -71,7 +70,10 @@ class DecompNetlistRouter : public NetlistRouter { vtr::dynamic_bitset<> get_vnet_decomposition_mask(const VirtualNet& vnet, const PartitionTreeNode& node); /** Decompose and route a regular net. Output the resulting vnets to \p left and \p right. * \return Success status: true if routing is successful and left and right now contain valid virtual nets: false otherwise. */ - bool decompose_and_route_net(ParentNetId net_id, const PartitionTreeNode& node, VirtualNet& left, VirtualNet& right); + bool decompose_and_route_net(ParentNetId net_id, + const PartitionTreeNode& node, + VirtualNet& left, + VirtualNet& right); /** Decompose and route a virtual net. Output the resulting vnets to \p left and \p right. * \return Success status: true if routing is successful and left and right now contain valid virtual nets: false otherwise. */ bool decompose_and_route_vnet(VirtualNet& vnet, const PartitionTreeNode& node, VirtualNet& left, VirtualNet& right); @@ -82,15 +84,9 @@ class DecompNetlistRouter : public NetlistRouter { auto& device_ctx = g_vpr_ctx.device(); auto& route_ctx = g_vpr_ctx.mutable_routing(); - return ConnectionRouter( - device_ctx.grid, - *router_lookahead, - device_ctx.rr_graph.rr_nodes(), - &device_ctx.rr_graph, - device_ctx.rr_rc_data, - device_ctx.rr_graph.rr_switch(), - route_ctx.rr_node_route_inf, - is_flat); + return ConnectionRouter(device_ctx.grid, *router_lookahead, device_ctx.rr_graph.rr_nodes(), + &device_ctx.rr_graph, device_ctx.rr_rc_data, device_ctx.rr_graph.rr_switch(), + route_ctx.rr_node_route_inf, is_flat); } /* Context fields. Most of them will be forwarded to route_net (see route_net.tpp) */ diff --git a/vpr/src/route/DecompNetlistRouter.tpp b/vpr/src/route/DecompNetlistRouter.tpp index fc1a6685e56..afba699c879 100644 --- a/vpr/src/route/DecompNetlistRouter.tpp +++ b/vpr/src/route/DecompNetlistRouter.tpp @@ -141,13 +141,7 @@ void DecompNetlistRouter::route_partition_tree_node(tbb::task_group& g if (!should_route_net(_net_list, net_id, _connections_inf, _budgeting_inf, _worst_neg_slack, true)) continue; /* Setup the net (reset or prune) only once here in the flow. Then all calls to route_net turn off auto-setup */ - setup_net( - _itry, - net_id, - _net_list, - _connections_inf, - _router_opts, - _worst_neg_slack); + setup_net(_itry, net_id, _net_list, _connections_inf, _router_opts, _worst_neg_slack); /* Try decomposing the net. */ if (should_decompose_net(net_id, node)) { VirtualNet left_vnet, right_vnet; @@ -160,26 +154,11 @@ void DecompNetlistRouter::route_partition_tree_node(tbb::task_group& g } } /* decompose_and_route fails when we get bad flags, so we only need to handle them here */ - auto flags = route_net( - _routers_th.local(), - _net_list, - net_id, - _itry, - _pres_fac, - _router_opts, - _connections_inf, - _results_th.local().stats, - _net_delay, - _netlist_pin_lookup, - _timing_info.get(), - _pin_timing_invalidator, - _budgeting_inf, - _worst_neg_slack, - _routing_predictor, - _choking_spots[net_id], - _is_flat, - route_ctx.route_bb[net_id], - false); + auto flags + = route_net(_routers_th.local(), _net_list, net_id, _itry, _pres_fac, _router_opts, _connections_inf, + _results_th.local().stats, _net_delay, _netlist_pin_lookup, _timing_info.get(), + _pin_timing_invalidator, _budgeting_inf, _worst_neg_slack, _routing_predictor, + _choking_spots[net_id], _is_flat, route_ctx.route_bb[net_id], false); if (!flags.success && !flags.retry_with_full_bb) { /* Disconnected RRG and ConnectionRouter doesn't think growing the BB will work */ _results_th.local().is_routable = false; @@ -208,43 +187,21 @@ void DecompNetlistRouter::route_partition_tree_node(tbb::task_group& g } /* Route the full vnet. Again we don't care about the flags, they should be handled by the regular path */ auto sink_mask = get_vnet_sink_mask(vnet); - route_net( - _routers_th.local(), - _net_list, - vnet.net_id, - _itry, - _pres_fac, - _router_opts, - _connections_inf, - _results_th.local().stats, - _net_delay, - _netlist_pin_lookup, - _timing_info.get(), - _pin_timing_invalidator, - _budgeting_inf, - _worst_neg_slack, - _routing_predictor, - _choking_spots[vnet.net_id], - _is_flat, - vnet.clipped_bb, - false, - sink_mask); + route_net(_routers_th.local(), _net_list, vnet.net_id, _itry, _pres_fac, _router_opts, _connections_inf, + _results_th.local().stats, _net_delay, _netlist_pin_lookup, _timing_info.get(), + _pin_timing_invalidator, _budgeting_inf, _worst_neg_slack, _routing_predictor, + _choking_spots[vnet.net_id], _is_flat, vnet.clipped_bb, false, sink_mask); } } - PartitionTreeDebug::log("Node with " + std::to_string(node.nets.size()) - + " nets and " + std::to_string(node.vnets.size()) - + " virtual nets routed in " + std::to_string(t.elapsed_sec()) - + " s"); + PartitionTreeDebug::log("Node with " + std::to_string(node.nets.size()) + " nets and " + + std::to_string(node.vnets.size()) + " virtual nets routed in " + + std::to_string(t.elapsed_sec()) + " s"); /* This node is finished: add left & right branches to the task queue */ if (node.left && node.right) { - g.run([&]() { - route_partition_tree_node(g, *node.left); - }); - g.run([&]() { - route_partition_tree_node(g, *node.right); - }); + g.run([&]() { route_partition_tree_node(g, *node.left); }); + g.run([&]() { route_partition_tree_node(g, *node.right); }); } else { VTR_ASSERT(!node.left && !node.right); // there shouldn't be a node with a single branch } @@ -268,7 +225,12 @@ inline t_bb clip_to_side(const t_bb& bb, Axis axis, int cutline_pos, Side side) } /** Break a net/vnet into two. Output into references */ -inline void make_vnet_pair(ParentNetId net_id, const t_bb& bb, Axis cutline_axis, int cutline_pos, VirtualNet& left, VirtualNet& right) { +inline void make_vnet_pair(ParentNetId net_id, + const t_bb& bb, + Axis cutline_axis, + int cutline_pos, + VirtualNet& left, + VirtualNet& right) { left.net_id = net_id; left.clipped_bb = clip_to_side(bb, cutline_axis, cutline_pos, Side::LEFT); right.net_id = net_id; @@ -276,7 +238,10 @@ inline void make_vnet_pair(ParentNetId net_id, const t_bb& bb, Axis cutline_axis } template -bool DecompNetlistRouter::decompose_and_route_net(ParentNetId net_id, const PartitionTreeNode& node, VirtualNet& left, VirtualNet& right) { +bool DecompNetlistRouter::decompose_and_route_net(ParentNetId net_id, + const PartitionTreeNode& node, + VirtualNet& left, + VirtualNet& right) { auto& route_ctx = g_vpr_ctx.routing(); auto& net_bb = route_ctx.route_bb[net_id]; @@ -284,27 +249,10 @@ bool DecompNetlistRouter::decompose_and_route_net(ParentNetId net_id, auto sink_mask = get_decomposition_mask(net_id, node); /* Route the net with the given mask: only the sinks we ask for will be routed */ - auto flags = route_net( - _routers_th.local(), - _net_list, - net_id, - _itry, - _pres_fac, - _router_opts, - _connections_inf, - _results_th.local().stats, - _net_delay, - _netlist_pin_lookup, - _timing_info.get(), - _pin_timing_invalidator, - _budgeting_inf, - _worst_neg_slack, - _routing_predictor, - _choking_spots[net_id], - _is_flat, - net_bb, - false, - sink_mask); + auto flags = route_net(_routers_th.local(), _net_list, net_id, _itry, _pres_fac, _router_opts, _connections_inf, + _results_th.local().stats, _net_delay, _netlist_pin_lookup, _timing_info.get(), + _pin_timing_invalidator, _budgeting_inf, _worst_neg_slack, _routing_predictor, + _choking_spots[net_id], _is_flat, net_bb, false, sink_mask); if (!flags.success) { /* Even if flags.retry_with_full_bb is set, better to bail out here */ return false; @@ -320,18 +268,16 @@ bool DecompNetlistRouter::decompose_and_route_net(ParentNetId net_id, /* Debug code for PartitionTreeDebug (describes existing routing) */ inline std::string describe_bbox(const t_bb& bb) { - return std::to_string(bb.xmin) + "," + std::to_string(bb.ymin) - + "x" + std::to_string(bb.xmax) + "," + std::to_string(bb.ymax); + return std::to_string(bb.xmin) + "," + std::to_string(bb.ymin) + "x" + std::to_string(bb.xmax) + "," + + std::to_string(bb.ymax); } inline std::string describe_rr_coords(RRNodeId inode) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - return std::to_string(rr_graph.node_xlow(inode)) - + "," + std::to_string(rr_graph.node_ylow(inode)) - + " -> " + std::to_string(rr_graph.node_xhigh(inode)) - + "," + std::to_string(rr_graph.node_yhigh(inode)); + return std::to_string(rr_graph.node_xlow(inode)) + "," + std::to_string(rr_graph.node_ylow(inode)) + " -> " + + std::to_string(rr_graph.node_xhigh(inode)) + "," + std::to_string(rr_graph.node_yhigh(inode)); } /** Build a string describing \p vnet and its existing routing */ @@ -380,32 +326,19 @@ inline std::string describe_vnet(const VirtualNet& vnet) { /* Debug code for PartitionTreeDebug ends */ template -bool DecompNetlistRouter::decompose_and_route_vnet(VirtualNet& vnet, const PartitionTreeNode& node, VirtualNet& left, VirtualNet& right) { +bool DecompNetlistRouter::decompose_and_route_vnet(VirtualNet& vnet, + const PartitionTreeNode& node, + VirtualNet& left, + VirtualNet& right) { /* Sample enough sinks to provide branch-off points to the virtual nets we create */ auto sink_mask = get_vnet_decomposition_mask(vnet, node); /* Route the *parent* net with the given mask: only the sinks we ask for will be routed */ - auto flags = route_net( - _routers_th.local(), - _net_list, - vnet.net_id, - _itry, - _pres_fac, - _router_opts, - _connections_inf, - _results_th.local().stats, - _net_delay, - _netlist_pin_lookup, - _timing_info.get(), - _pin_timing_invalidator, - _budgeting_inf, - _worst_neg_slack, - _routing_predictor, - _choking_spots[vnet.net_id], - _is_flat, - vnet.clipped_bb, - false, - sink_mask); + auto flags + = route_net(_routers_th.local(), _net_list, vnet.net_id, _itry, _pres_fac, _router_opts, _connections_inf, + _results_th.local().stats, _net_delay, _netlist_pin_lookup, _timing_info.get(), + _pin_timing_invalidator, _budgeting_inf, _worst_neg_slack, _routing_predictor, + _choking_spots[vnet.net_id], _is_flat, vnet.clipped_bb, false, sink_mask); if (!flags.success) { /* Even if flags.retry_with_full_bb is set, better to bail out here */ PartitionTreeDebug::log("Failed to route decomposed net:\n" + describe_vnet(vnet)); @@ -426,9 +359,11 @@ inline bool is_close_to_cutline(RRNodeId inode, Axis cutline_axis, int cutline_p /* Cutlines are considered to be at x + 0.5, set a thickness of +1 here by checking for equality */ if (cutline_axis == Axis::X) { - return rr_graph.node_xlow(inode) - thickness <= cutline_pos && rr_graph.node_xhigh(inode) + thickness >= cutline_pos; + return rr_graph.node_xlow(inode) - thickness <= cutline_pos + && rr_graph.node_xhigh(inode) + thickness >= cutline_pos; } else { - return rr_graph.node_ylow(inode) - thickness <= cutline_pos && rr_graph.node_yhigh(inode) + thickness >= cutline_pos; + return rr_graph.node_ylow(inode) - thickness <= cutline_pos + && rr_graph.node_yhigh(inode) + thickness >= cutline_pos; } } @@ -442,10 +377,8 @@ inline bool is_close_to_bb(RRNodeId inode, const t_bb& bb, int thickness) { int xhigh = rr_graph.node_xhigh(inode) + thickness; int yhigh = rr_graph.node_yhigh(inode) + thickness; - return (xlow <= bb.xmin && xhigh >= bb.xmin) - || (ylow <= bb.ymin && yhigh >= bb.ymin) - || (xlow <= bb.xmax && xhigh >= bb.xmax) - || (ylow <= bb.ymax && yhigh >= bb.ymax); + return (xlow <= bb.xmin && xhigh >= bb.xmin) || (ylow <= bb.ymin && yhigh >= bb.ymin) + || (xlow <= bb.xmax && xhigh >= bb.xmax) || (ylow <= bb.ymax && yhigh >= bb.ymax); } /** Does this net either: @@ -497,7 +430,8 @@ inline bool get_reduction_mask(ParentNetId net_id, Axis cutline_axis, int cutlin } template -vtr::dynamic_bitset<> DecompNetlistRouter::get_decomposition_mask(ParentNetId net_id, const PartitionTreeNode& node) { +vtr::dynamic_bitset<> DecompNetlistRouter::get_decomposition_mask(ParentNetId net_id, + const PartitionTreeNode& node) { const auto& route_ctx = g_vpr_ctx.routing(); const RouteTree& tree = route_ctx.route_trees[net_id].value(); size_t num_sinks = tree.num_sinks(); @@ -538,7 +472,10 @@ vtr::dynamic_bitset<> DecompNetlistRouter::get_decomposition_mask(Pare * * have a very narrow side or * * have less than MIN_SINKS sinks in at least one side? * If so, put all sinks in the sides matching the above condition into \p out and return true */ -inline int get_reduction_mask_vnet_no_source(const VirtualNet& vnet, Axis cutline_axis, int cutline_pos, vtr::dynamic_bitset<>& out) { +inline int get_reduction_mask_vnet_no_source(const VirtualNet& vnet, + Axis cutline_axis, + int cutline_pos, + vtr::dynamic_bitset<>& out) { const auto& route_ctx = g_vpr_ctx.routing(); const RouteTree& tree = route_ctx.route_trees[vnet.net_id].value(); @@ -593,7 +530,10 @@ inline int get_reduction_mask_vnet_no_source(const VirtualNet& vnet, Axis cutlin /** Similar fn to \see get_reduction_mask, but works with virtual nets * and checks against the clipped bounding box instead of the cutline when counting sink-side sinks. */ -inline bool get_reduction_mask_vnet_with_source(const VirtualNet& vnet, Axis cutline_axis, int cutline_pos, vtr::dynamic_bitset<>& out) { +inline bool get_reduction_mask_vnet_with_source(const VirtualNet& vnet, + Axis cutline_axis, + int cutline_pos, + vtr::dynamic_bitset<>& out) { const auto& route_ctx = g_vpr_ctx.routing(); const RouteTree& tree = route_ctx.route_trees[vnet.net_id].value(); @@ -638,7 +578,8 @@ inline bool get_reduction_mask_vnet_with_source(const VirtualNet& vnet, Axis cut } template -vtr::dynamic_bitset<> DecompNetlistRouter::get_vnet_decomposition_mask(const VirtualNet& vnet, const PartitionTreeNode& node) { +vtr::dynamic_bitset<> DecompNetlistRouter::get_vnet_decomposition_mask(const VirtualNet& vnet, + const PartitionTreeNode& node) { const auto& route_ctx = g_vpr_ctx.routing(); const RouteTree& tree = route_ctx.route_trees[vnet.net_id].value(); int num_sinks = tree.num_sinks(); @@ -649,7 +590,8 @@ vtr::dynamic_bitset<> DecompNetlistRouter::get_vnet_decomposition_mask /* Sometimes cutlines divide a net very unevenly. In that case, just route to all * sinks in the small side and unblock. Add convex hull since we are in a vnet which * may not have a source at all */ - if (inside_bb(tree.root().inode, vnet.clipped_bb)) { /* We have source, no need to sample after reduction in most cases */ + if (inside_bb(tree.root().inode, + vnet.clipped_bb)) { /* We have source, no need to sample after reduction in most cases */ bool is_reduced = get_reduction_mask_vnet_with_source(vnet, node.cutline_axis, node.cutline_pos, out); bool source_on_cutline = is_close_to_cutline(tree.root().inode, node.cutline_axis, node.cutline_pos, 1); if (!is_reduced || source_on_cutline) diff --git a/vpr/src/route/ParallelNetlistRouter.h b/vpr/src/route/ParallelNetlistRouter.h index 35a2da25098..4af748bb725 100644 --- a/vpr/src/route/ParallelNetlistRouter.h +++ b/vpr/src/route/ParallelNetlistRouter.h @@ -21,19 +21,18 @@ template class ParallelNetlistRouter : public NetlistRouter { public: - ParallelNetlistRouter( - const Netlist<>& net_list, - const RouterLookahead* router_lookahead, - const t_router_opts& router_opts, - CBRR& connections_inf, - NetPinsMatrix& net_delay, - const ClusteredPinAtomPinsLookup& netlist_pin_lookup, - std::shared_ptr timing_info, - NetPinTimingInvalidator* pin_timing_invalidator, - route_budgets& budgeting_inf, - const RoutingPredictor& routing_predictor, - const vtr::vector>>& choking_spots, - bool is_flat) + ParallelNetlistRouter(const Netlist<>& net_list, + const RouterLookahead* router_lookahead, + const t_router_opts& router_opts, + CBRR& connections_inf, + NetPinsMatrix& net_delay, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup, + std::shared_ptr timing_info, + NetPinTimingInvalidator* pin_timing_invalidator, + route_budgets& budgeting_inf, + const RoutingPredictor& routing_predictor, + const vtr::vector>>& choking_spots, + bool is_flat) : _routers_th(_make_router(router_lookahead, is_flat)) , _net_list(net_list) , _router_opts(router_opts) @@ -63,15 +62,9 @@ class ParallelNetlistRouter : public NetlistRouter { auto& device_ctx = g_vpr_ctx.device(); auto& route_ctx = g_vpr_ctx.mutable_routing(); - return ConnectionRouter( - device_ctx.grid, - *router_lookahead, - device_ctx.rr_graph.rr_nodes(), - &device_ctx.rr_graph, - device_ctx.rr_rc_data, - device_ctx.rr_graph.rr_switch(), - route_ctx.rr_node_route_inf, - is_flat); + return ConnectionRouter(device_ctx.grid, *router_lookahead, device_ctx.rr_graph.rr_nodes(), + &device_ctx.rr_graph, device_ctx.rr_rc_data, device_ctx.rr_graph.rr_switch(), + route_ctx.rr_node_route_inf, is_flat); } /* Context fields. Most of them will be forwarded to route_net (see route_net.tpp) */ diff --git a/vpr/src/route/ParallelNetlistRouter.tpp b/vpr/src/route/ParallelNetlistRouter.tpp index 9cae0d84dba..f9f40e5aef3 100644 --- a/vpr/src/route/ParallelNetlistRouter.tpp +++ b/vpr/src/route/ParallelNetlistRouter.tpp @@ -7,7 +7,9 @@ #include "vtr_time.h" template -inline RouteIterResults ParallelNetlistRouter::route_netlist(int itry, float pres_fac, float worst_neg_slack) { +inline RouteIterResults ParallelNetlistRouter::route_netlist(int itry, + float pres_fac, + float worst_neg_slack) { /* Reset results for each thread */ for (auto& results : _results_th) { results = RouteIterResults(); @@ -48,25 +50,10 @@ void ParallelNetlistRouter::route_partition_tree_node(tbb::task_group& vtr::Timer t; for (auto net_id : node.nets) { - auto flags = route_net( - _routers_th.local(), - _net_list, - net_id, - _itry, - _pres_fac, - _router_opts, - _connections_inf, - _results_th.local().stats, - _net_delay, - _netlist_pin_lookup, - _timing_info.get(), - _pin_timing_invalidator, - _budgeting_inf, - _worst_neg_slack, - _routing_predictor, - _choking_spots[net_id], - _is_flat, - route_ctx.route_bb[net_id]); + auto flags = route_net(_routers_th.local(), _net_list, net_id, _itry, _pres_fac, _router_opts, _connections_inf, + _results_th.local().stats, _net_delay, _netlist_pin_lookup, _timing_info.get(), + _pin_timing_invalidator, _budgeting_inf, _worst_neg_slack, _routing_predictor, + _choking_spots[net_id], _is_flat, route_ctx.route_bb[net_id]); if (!flags.success && !flags.retry_with_full_bb) { /* Disconnected RRG and ConnectionRouter doesn't think growing the BB will work */ @@ -82,16 +69,13 @@ void ParallelNetlistRouter::route_partition_tree_node(tbb::task_group& _results_th.local().rerouted_nets.push_back(net_id); } } - PartitionTreeDebug::log("Node with " + std::to_string(node.nets.size()) + " nets routed in " + std::to_string(t.elapsed_sec()) + " s"); + PartitionTreeDebug::log("Node with " + std::to_string(node.nets.size()) + " nets routed in " + + std::to_string(t.elapsed_sec()) + " s"); /* This node is finished: add left & right branches to the task queue */ if (node.left && node.right) { - g.run([&]() { - route_partition_tree_node(g, *node.left); - }); - g.run([&]() { - route_partition_tree_node(g, *node.right); - }); + g.run([&]() { route_partition_tree_node(g, *node.left); }); + g.run([&]() { route_partition_tree_node(g, *node.right); }); } else { VTR_ASSERT(!node.left && !node.right); // there shouldn't be a node with a single branch } diff --git a/vpr/src/route/SerialNetlistRouter.h b/vpr/src/route/SerialNetlistRouter.h index 5bb59df1998..a1f3bfb8260 100644 --- a/vpr/src/route/SerialNetlistRouter.h +++ b/vpr/src/route/SerialNetlistRouter.h @@ -7,19 +7,18 @@ template class SerialNetlistRouter : public NetlistRouter { public: - SerialNetlistRouter( - const Netlist<>& net_list, - const RouterLookahead* router_lookahead, - const t_router_opts& router_opts, - CBRR& connections_inf, - NetPinsMatrix& net_delay, - const ClusteredPinAtomPinsLookup& netlist_pin_lookup, - std::shared_ptr timing_info, - NetPinTimingInvalidator* pin_timing_invalidator, - route_budgets& budgeting_inf, - const RoutingPredictor& routing_predictor, - const vtr::vector>>& choking_spots, - bool is_flat) + SerialNetlistRouter(const Netlist<>& net_list, + const RouterLookahead* router_lookahead, + const t_router_opts& router_opts, + CBRR& connections_inf, + NetPinsMatrix& net_delay, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup, + std::shared_ptr timing_info, + NetPinTimingInvalidator* pin_timing_invalidator, + route_budgets& budgeting_inf, + const RoutingPredictor& routing_predictor, + const vtr::vector>>& choking_spots, + bool is_flat) : _router(_make_router(router_lookahead, is_flat)) , _net_list(net_list) , _router_opts(router_opts) @@ -43,15 +42,9 @@ class SerialNetlistRouter : public NetlistRouter { auto& device_ctx = g_vpr_ctx.device(); auto& route_ctx = g_vpr_ctx.mutable_routing(); - return ConnectionRouter( - device_ctx.grid, - *router_lookahead, - device_ctx.rr_graph.rr_nodes(), - &device_ctx.rr_graph, - device_ctx.rr_rc_data, - device_ctx.rr_graph.rr_switch(), - route_ctx.rr_node_route_inf, - is_flat); + return ConnectionRouter(device_ctx.grid, *router_lookahead, device_ctx.rr_graph.rr_nodes(), + &device_ctx.rr_graph, device_ctx.rr_rc_data, device_ctx.rr_graph.rr_switch(), + route_ctx.rr_node_route_inf, is_flat); } /* Context fields */ ConnectionRouter _router; diff --git a/vpr/src/route/SerialNetlistRouter.tpp b/vpr/src/route/SerialNetlistRouter.tpp index 7927d06c4e2..55778fde3c9 100644 --- a/vpr/src/route/SerialNetlistRouter.tpp +++ b/vpr/src/route/SerialNetlistRouter.tpp @@ -18,25 +18,10 @@ inline RouteIterResults SerialNetlistRouter::route_netlist(int itry, f for (size_t inet = 0; inet < sorted_nets.size(); inet++) { ParentNetId net_id = sorted_nets[inet]; - NetResultFlags flags = route_net( - _router, - _net_list, - net_id, - itry, - pres_fac, - _router_opts, - _connections_inf, - out.stats, - _net_delay, - _netlist_pin_lookup, - _timing_info.get(), - _pin_timing_invalidator, - _budgeting_inf, - worst_neg_slack, - _routing_predictor, - _choking_spots[net_id], - _is_flat, - route_ctx.route_bb[net_id]); + NetResultFlags flags = route_net(_router, _net_list, net_id, itry, pres_fac, _router_opts, _connections_inf, + out.stats, _net_delay, _netlist_pin_lookup, _timing_info.get(), + _pin_timing_invalidator, _budgeting_inf, worst_neg_slack, _routing_predictor, + _choking_spots[net_id], _is_flat, route_ctx.route_bb[net_id]); if (!flags.success && !flags.retry_with_full_bb) { /* Disconnected RRG and ConnectionRouter doesn't think growing the BB will work */ diff --git a/vpr/src/route/annotate_routing.cpp b/vpr/src/route/annotate_routing.cpp index 42b798d4d02..d08ebccc57c 100644 --- a/vpr/src/route/annotate_routing.cpp +++ b/vpr/src/route/annotate_routing.cpp @@ -14,8 +14,8 @@ #include "annotate_routing.h" vtr::vector annotate_rr_node_nets(const ClusteringContext& cluster_ctx, - const DeviceContext& device_ctx, - const bool& verbose) { + const DeviceContext& device_ctx, + const bool& verbose) { size_t counter = 0; vtr::ScopedStartFinishTimer timer("Annotating rr_node with routed nets"); @@ -35,34 +35,28 @@ vtr::vector annotate_rr_node_nets(const ClusteringContex } auto& tree = get_route_tree_from_cluster_net_id(net_id); - if(!tree) + if (!tree) continue; for (auto& rt_node : tree->all_nodes()) { const RRNodeId rr_node = rt_node.inode; /* Ignore source and sink nodes, they are the common node multiple starting and ending points */ - if ((SOURCE != rr_graph.node_type(rr_node)) - && (SINK != rr_graph.node_type(rr_node))) { + if ((SOURCE != rr_graph.node_type(rr_node)) && (SINK != rr_graph.node_type(rr_node))) { /* Sanity check: ensure we do not revoke any net mapping * In some routing architectures, node capacity is more than 1 * which allows a node to be mapped by multiple nets * Therefore, the sanity check should focus on the nodes * whose capacity is 1 */ - if ((rr_node_nets[rr_node]) - && (1 == rr_graph.node_capacity(rr_node)) + if ((rr_node_nets[rr_node]) && (1 == rr_graph.node_capacity(rr_node)) && (net_id != rr_node_nets[rr_node])) { - VPR_FATAL_ERROR(VPR_ERROR_ANALYSIS, - "Detect two nets '%s' and '%s' that are mapped to the same rr_node '%ld'!\n%s\n", - netlist.net_name(net_id).c_str(), - netlist.net_name(rr_node_nets[rr_node]).c_str(), - size_t(rr_node), - describe_rr_node(rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - rr_node, - false) - .c_str()); + VPR_FATAL_ERROR( + VPR_ERROR_ANALYSIS, + "Detect two nets '%s' and '%s' that are mapped to the same rr_node '%ld'!\n%s\n", + netlist.net_name(net_id).c_str(), netlist.net_name(rr_node_nets[rr_node]).c_str(), + size_t(rr_node), + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, rr_node, false) + .c_str()); } else { rr_node_nets[rr_node] = net_id; } diff --git a/vpr/src/route/annotate_routing.h b/vpr/src/route/annotate_routing.h index cf548e1e0fe..d12bf313a74 100644 --- a/vpr/src/route/annotate_routing.h +++ b/vpr/src/route/annotate_routing.h @@ -11,7 +11,7 @@ * - Unmapped rr_node will use invalid ids *******************************************************************/ vtr::vector annotate_rr_node_nets(const ClusteringContext& cluster_ctx, - const DeviceContext& device_ctx, - const bool& verbose); + const DeviceContext& device_ctx, + const bool& verbose); #endif diff --git a/vpr/src/route/build_switchblocks.cpp b/vpr/src/route/build_switchblocks.cpp index 27e6f58a79c..6c922adf130 100644 --- a/vpr/src/route/build_switchblocks.cpp +++ b/vpr/src/route/build_switchblocks.cpp @@ -167,12 +167,8 @@ class Wire_Info { num_wires = wires; start = st; } - Wire_Info() { - this->set(0, 0, 0); - } - Wire_Info(int len, int wires, int st) { - this->set(len, wires, st); - } + Wire_Info() { this->set(0, 0, 0); } + Wire_Info(int len, int wires, int st) { this->set(len, wires, st); } }; struct t_wire_switchpoint { @@ -194,51 +190,54 @@ typedef vtr::flat_map t_wire_type_sizes; /************ Function Declarations ************/ /* Counts the number of wires in each wire type in the specified channel */ -static void count_wire_type_sizes(const t_chan_seg_details* channel, int nodes_per_chan, t_wire_type_sizes* wire_type_sizes); +static void count_wire_type_sizes(const t_chan_seg_details* channel, + int nodes_per_chan, + t_wire_type_sizes* wire_type_sizes); /* Compute the wire(s) that the wire at (x, y, from_side, to_side, from_wire) should connect to. * sb_conns is updated with the result */ -static void compute_wire_connections( - int x_coord, - int y_coord, - int layer_coord, - enum e_side from_side, - enum e_side to_side, - const t_chan_details& chan_details_x, - const t_chan_details& chan_details_y, - t_switchblock_inf* sb, - const DeviceGrid& grid, - const t_wire_type_sizes* wire_type_sizes_x, - const t_wire_type_sizes* wire_type_sizes_y, - e_directionality directionality, - t_sb_connection_map* sb_conns, - vtr::RandState& rand_state, - t_wireconn_scratchpad* scratchpad); +static void compute_wire_connections(int x_coord, + int y_coord, + int layer_coord, + enum e_side from_side, + enum e_side to_side, + const t_chan_details& chan_details_x, + const t_chan_details& chan_details_y, + const t_switchblock_inf& sb, + const DeviceGrid& grid, + const t_wire_type_sizes* wire_type_sizes_x, + const t_wire_type_sizes* wire_type_sizes_y, + e_directionality directionality, + t_sb_connection_map* sb_conns, + vtr::RandState& rand_state, + t_wireconn_scratchpad* scratchpad); /* ... sb_conn represents the 'coordinates' of the desired switch block connections */ -static void compute_wireconn_connections( - const DeviceGrid& grid, - e_directionality directionality, - const t_chan_details& from_chan_details, - const t_chan_details& to_chan_details, - Switchblock_Lookup sb_conn, - int from_x, - int from_y, - int from_layer, - int to_x, - int to_y, - int to_layer, - t_rr_type from_chan_type, - t_rr_type to_chan_type, - const t_wire_type_sizes* wire_type_sizes_x, - const t_wire_type_sizes* wire_type_sizes_y, - const t_switchblock_inf* sb, - t_wireconn_inf* wireconn_ptr, - t_sb_connection_map* sb_conns, - vtr::RandState& rand_state, - t_wireconn_scratchpad* scratchpad); - -static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, std::string num_conns_formula, int from_wire_count, int to_wire_count); +static void compute_wireconn_connections(const DeviceGrid& grid, + e_directionality directionality, + const t_chan_details& from_chan_details, + const t_chan_details& to_chan_details, + Switchblock_Lookup sb_conn, + int from_x, + int from_y, + int from_layer, + int to_x, + int to_y, + int to_layer, + t_rr_type from_chan_type, + t_rr_type to_chan_type, + const t_wire_type_sizes* wire_type_sizes_x, + const t_wire_type_sizes* wire_type_sizes_y, + const t_switchblock_inf& sb, + const t_wireconn_inf& wireconn_ptr, + t_sb_connection_map* sb_conns, + vtr::RandState& rand_state, + t_wireconn_scratchpad* scratchpad); + +static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, + std::string num_conns_formula, + int from_wire_count, + int to_wire_count); /** * @@ -258,20 +257,19 @@ static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, std::st * @param output_wires collected wire indices that matches the specified types and switchpoints * */ -static void get_switchpoint_wires( - const DeviceGrid& grid, - const t_chan_seg_details* chan_details, - t_rr_type chan_type, - int x, - int y, - e_side side, - const std::vector& wire_switchpoints_vec, - const t_wire_type_sizes* wire_type_sizes, - bool is_dest, - SwitchPointOrder order, - vtr::RandState& rand_state, - std::vector* output_wires, - std::vector* scratch_wires); +static void get_switchpoint_wires(const DeviceGrid& grid, + const t_chan_seg_details* chan_details, + t_rr_type chan_type, + int x, + int y, + e_side side, + const std::vector& wire_switchpoints_vec, + const t_wire_type_sizes* wire_type_sizes, + bool is_dest, + SwitchPointOrder order, + vtr::RandState& rand_state, + std::vector* output_wires, + std::vector* scratch_wires); /** * @brief finds the correct channel (x or y), and the coordinates to index into it based on the @@ -291,7 +289,17 @@ static void get_switchpoint_wires( * * @return returns the type of channel that we are indexing into (ie, CHANX or CHANY) and channel coordinates and type */ -static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int tile_layer, enum e_side src_side, enum e_side dest_side, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, int& chan_x, int& chan_y, int& chan_layer, t_rr_type& chan_type); +static const t_chan_details& index_into_correct_chan(int tile_x, + int tile_y, + int tile_layer, + enum e_side src_side, + enum e_side dest_side, + const t_chan_details& chan_details_x, + const t_chan_details& chan_details_y, + int& chan_x, + int& chan_y, + int& chan_layer, + t_rr_type& chan_type); /** * @brief check whether a specific track location is valid within the device grid @@ -304,16 +312,27 @@ static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int * * @return true if the track location is outside the device grid, false otherwise. */ -static bool coords_out_of_bounds(const DeviceGrid& grid, int x_coord, int y_coord, int layer_coord, e_rr_type chan_type); +static bool coords_out_of_bounds(const DeviceGrid& grid, + int x_coord, + int y_coord, + int layer_coord, + e_rr_type chan_type); /* returns the subsegment number of the specified wire at seg_coord*/ -static int get_wire_subsegment_num(const DeviceGrid& grid, e_rr_type chan_type, const t_chan_seg_details& wire_details, int seg_coord); +static int get_wire_subsegment_num(const DeviceGrid& grid, + e_rr_type chan_type, + const t_chan_seg_details& wire_details, + int seg_coord); int get_wire_segment_length(const DeviceGrid& grid, e_rr_type chan_type, const t_chan_seg_details& wire_details); /* Returns the switchpoint of the wire specified by wire_details at a segment coordinate * of seg_coord, and connection to the sb_side of the switchblock */ -static int get_switchpoint_of_wire(const DeviceGrid& grid, e_rr_type chan_type, const t_chan_seg_details& wire_details, int seg_coord, e_side sb_side); +static int get_switchpoint_of_wire(const DeviceGrid& grid, + e_rr_type chan_type, + const t_chan_seg_details& wire_details, + int seg_coord, + e_side sb_side); /** * @brief check whether a switch block exists in a specified coordinate within the device grid @@ -327,7 +346,12 @@ static int get_switchpoint_of_wire(const DeviceGrid& grid, e_rr_type chan_type, * * @return true if a switch block exists at the specified location, false otherwise. */ -static bool sb_not_here(const DeviceGrid& grid, const std::vector& inter_cluster_rr, int x, int y, int layer, const t_switchblock_inf& sb); +static bool sb_not_here(const DeviceGrid& grid, + const std::vector& inter_cluster_rr, + int x, + int y, + int layer, + const t_switchblock_inf& sb); /** * @brief check whether specified coordinate is located at the device grid corner and a switch block exists there @@ -379,7 +403,12 @@ static bool is_core_sb(const DeviceGrid& grid, const std::vector& inter_cl * * @return true if the specified coordinate falls into the architecture-specified location for this switchblock, false otherwise. */ -static bool match_sb_xy(const DeviceGrid& grid, const std::vector& inter_cluster_rr, int x, int y, int layer, const t_switchblock_inf& sb); +static bool match_sb_xy(const DeviceGrid& grid, + const std::vector& inter_cluster_rr, + int x, + int y, + int layer, + const t_switchblock_inf& sb); /** * @brief check whether specified layer has inter-cluster programmable routing resources or not. @@ -431,11 +460,13 @@ t_sb_connection_map* alloc_and_load_switchblock_permutations(const t_chan_detail /******** slow switch block computation method; computes switchblocks at each coordinate ********/ /* iterate over all the switchblocks specified in the architecture */ - for (auto sb: switchblocks) { - + for (const t_switchblock_inf& sb : switchblocks) { /* verify that switchblock type matches specified directionality -- currently we have to stay consistent */ if (directionality != sb.directionality) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "alloc_and_load_switchblock_connections: Switchblock %s does not match directionality of architecture\n", sb.name.c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, + "alloc_and_load_switchblock_connections: Switchblock %s does not match directionality of " + "architecture\n", + sb.name.c_str()); } /* Iterate over the x,y, layer coordinates spanning the FPGA, filling in all the switch blocks that exist */ for (int layer_coord = 0; layer_coord < grid.get_num_layers(); layer_coord++) { @@ -449,10 +480,9 @@ t_sb_connection_map* alloc_and_load_switchblock_permutations(const t_chan_detail for (e_side to_side : TOTAL_3D_SIDES) { /* Fill appropriate entry of the sb_conns map with vector specifying the wires * the current wire will connect to */ - compute_wire_connections(x_coord, y_coord, layer_coord, from_side, to_side, - chan_details_x, chan_details_y, &sb, grid, - &wire_type_sizes_x, &wire_type_sizes_y, directionality, sb_conns, - rand_state, &scratchpad); + compute_wire_connections(x_coord, y_coord, layer_coord, from_side, to_side, chan_details_x, + chan_details_y, sb, grid, &wire_type_sizes_x, &wire_type_sizes_y, + directionality, sb_conns, rand_state, &scratchpad); } } } @@ -477,7 +507,12 @@ void free_switchblock_permutations(t_sb_connection_map* sb_conns) { return; } -static bool sb_not_here(const DeviceGrid& grid, const std::vector& inter_cluster_rr, int x, int y, int layer, const t_switchblock_inf& sb) { +static bool sb_not_here(const DeviceGrid& grid, + const std::vector& inter_cluster_rr, + int x, + int y, + int layer, + const t_switchblock_inf& sb) { bool sb_not_here = true; switch (sb.location) { @@ -500,15 +535,16 @@ static bool sb_not_here(const DeviceGrid& grid, const std::vector& inter_c } break; case e_sb_location::E_FRINGE: - if (is_perimeter_sb(grid, inter_cluster_rr, x, y, layer) && !is_corner_sb(grid, inter_cluster_rr, x, y, layer)) { + if (is_perimeter_sb(grid, inter_cluster_rr, x, y, layer) + && !is_corner_sb(grid, inter_cluster_rr, x, y, layer)) { sb_not_here = false; } break; case e_sb_location::E_XY_SPECIFIED: - if(match_sb_xy(grid, inter_cluster_rr, x, y, layer, sb)) { + if (match_sb_xy(grid, inter_cluster_rr, x, y, layer, sb)) { sb_not_here = false; } - + break; default: VPR_FATAL_ERROR(VPR_ERROR_ARCH, "sb_not_here: unrecognized location enum: %d\n", sb.location); @@ -530,7 +566,11 @@ static bool is_corner_sb(const DeviceGrid& grid, const std::vector& inter_ return is_corner; } -static bool is_perimeter_sb(const DeviceGrid& grid, const std::vector& inter_cluster_rr, int x, int y, int layer) { +static bool is_perimeter_sb(const DeviceGrid& grid, + const std::vector& inter_cluster_rr, + int x, + int y, + int layer) { if (!is_prog_routing_avail(grid, inter_cluster_rr, layer)) { return false; } @@ -560,22 +600,27 @@ static bool is_prog_routing_avail(const DeviceGrid& grid, const std::vector& inter_cluster_rr, int x, int y, int layer, const t_switchblock_inf& sb) { +static bool match_sb_xy(const DeviceGrid& grid, + const std::vector& inter_cluster_rr, + int x, + int y, + int layer, + const t_switchblock_inf& sb) { if (!is_prog_routing_avail(grid, inter_cluster_rr, layer)) { return false; } - //if one of sb_x and sb_y is defined, we either know the exact location (x,y) or the exact x location (will apply it to all rows) - //or the exact y location (will apply it to all columns) - if(sb.x != -1 || sb.y != -1){ - if(x == sb.x && y == sb.y){ + //if one of sb_x and sb_y is defined, we either know the exact location (x,y) or the exact x location (will apply it to all rows) + //or the exact y location (will apply it to all columns) + if (sb.x != -1 || sb.y != -1) { + if (x == sb.x && y == sb.y) { return true; - } + } - if(x == sb.x && sb.y == -1){ + if (x == sb.x && sb.y == -1) { return true; } - - if(sb.x == -1 && y == sb.y){ + + if (sb.x == -1 && y == sb.y) { return true; } } @@ -585,12 +630,12 @@ static bool match_sb_xy(const DeviceGrid& grid, const std::vector& inter_c //calculate the appropriate region based on the repeatx/repeaty and current location. //This is to determine whether the given location is part of the current SB specified region with regular expression or not //After region calculation, the current SB will apply to this location if: - // 1) the given (x,y) location falls into the calculated region + // 1) the given (x,y) location falls into the calculated region // *AND* // 2) incrx/incry are respected within the region, this means all locations within the calculated region do - // not necessarily crosspond to the current SB. If incrx/incry is equal to 1, then all locations within the - // calculated region are valid. - + // not necessarily crosspond to the current SB. If incrx/incry is equal to 1, then all locations within the + // calculated region are valid. + //calculate the region int x_reg_step = (sb.reg_x.repeat != 0) ? (x - sb.reg_x.start) / sb.reg_x.repeat : sb.reg_x.start; int y_reg_step = (sb.reg_y.repeat != 0) ? (y - sb.reg_y.start) / sb.reg_y.repeat : sb.reg_y.start; @@ -608,27 +653,29 @@ static bool match_sb_xy(const DeviceGrid& grid, const std::vector& inter_c reg_endy = std::min(reg_endy, int(grid.height() - 1)); //check x coordinate - if (x >= reg_startx && x <= reg_endx){ //should fall into the region + if (x >= reg_startx && x <= reg_endx) { //should fall into the region //we also should respect the incrx //if incrx is not equal to 1, all locations within this region are *NOT* valid - if((x + reg_startx) % sb.reg_x.incr == 0){ + if ((x + reg_startx) % sb.reg_x.incr == 0) { //valid x coordinate, check for y value - if(y >= reg_starty && y <= reg_endy){ + if (y >= reg_starty && y <= reg_endy) { //check for incry, similar as incrx - if((y + reg_starty) % sb.reg_y.incr == 0){ + if ((y + reg_starty) % sb.reg_y.incr == 0) { //both x and y are valid return true; } } - } + } } //if reach here, we don't have sb in this location - return false; + return false; } /* Counts the number of wires in each wire type in the specified channel */ -static void count_wire_type_sizes(const t_chan_seg_details* channel, int nodes_per_chan, t_wire_type_sizes* wire_type_sizes) { +static void count_wire_type_sizes(const t_chan_seg_details* channel, + int nodes_per_chan, + t_wire_type_sizes* wire_type_sizes) { vtr::string_view wire_type; vtr::string_view new_type; int new_length, length; @@ -659,20 +706,19 @@ static void count_wire_type_sizes(const t_chan_seg_details* channel, int nodes_p return; } -static void get_switchpoint_wires( - const DeviceGrid& grid, - const t_chan_seg_details* chan_details, - t_rr_type chan_type, - int x, - int y, - e_side side, - const std::vector& wire_switchpoints_vec, - const t_wire_type_sizes* wire_type_sizes, - bool is_dest, - SwitchPointOrder switchpoint_order, - vtr::RandState& rand_state, - std::vector* output_wires, - std::vector* scratch_wires) { +static void get_switchpoint_wires(const DeviceGrid& grid, + const t_chan_seg_details* chan_details, + t_rr_type chan_type, + int x, + int y, + e_side side, + const std::vector& wire_switchpoints_vec, + const t_wire_type_sizes* wire_type_sizes, + bool is_dest, + SwitchPointOrder switchpoint_order, + vtr::RandState& rand_state, + std::vector* output_wires, + std::vector* scratch_wires) { std::vector& all_collected_wire_switchpoints = *output_wires; all_collected_wire_switchpoints.clear(); @@ -686,9 +732,7 @@ static void get_switchpoint_wires( for (const t_wire_switchpoints& wire_switchpoints : wire_switchpoints_vec) { collected_wire_switchpoints.clear(); - auto wire_type = vtr::string_view( - wire_switchpoints.segment_name.data(), - wire_switchpoints.segment_name.size()); + auto wire_type = vtr::string_view(wire_switchpoints.segment_name.data(), wire_switchpoints.segment_name.size()); const auto& points = wire_switchpoints.switchpoints; if ((*wire_type_sizes).find(wire_type) == (*wire_type_sizes).end()) { @@ -735,7 +779,8 @@ static void get_switchpoint_wires( int wire_switchpoint = get_switchpoint_of_wire(grid, chan_type, chan_details[iwire], seg_coord, side); /* check if this wire belongs to one of the specified switchpoints; add it to our 'wires' vector if so */ - if (wire_switchpoint != valid_switchpoint) continue; + if (wire_switchpoint != valid_switchpoint) + continue; collected_wire_switchpoints.push_back({iwire, wire_switchpoint}); } @@ -755,21 +800,36 @@ static void get_switchpoint_wires( } } -static void compute_wire_connections(int x_coord, int y_coord, int layer_coord, enum e_side from_side, enum e_side to_side, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, t_switchblock_inf* sb, const DeviceGrid& grid, const t_wire_type_sizes* wire_type_sizes_x, const t_wire_type_sizes* wire_type_sizes_y, e_directionality directionality, t_sb_connection_map* sb_conns, vtr::RandState& rand_state, t_wireconn_scratchpad* scratchpad) { +static void compute_wire_connections(int x_coord, + int y_coord, + int layer_coord, + enum e_side from_side, + enum e_side to_side, + const t_chan_details& chan_details_x, + const t_chan_details& chan_details_y, + const t_switchblock_inf& sb, + const DeviceGrid& grid, + const t_wire_type_sizes* wire_type_sizes_x, + const t_wire_type_sizes* wire_type_sizes_y, + e_directionality directionality, + t_sb_connection_map* sb_conns, + vtr::RandState& rand_state, + t_wireconn_scratchpad* scratchpad) { int from_x, from_y, from_layer; /* index into source channel */ int to_x, to_y, to_layer; /* index into destination channel */ t_rr_type from_chan_type, to_chan_type; /* the type of channel - i.e. CHANX or CHANY */ from_x = from_y = to_x = to_y = from_layer = to_layer = UNDEFINED; - SB_Side_Connection side_conn(from_side, to_side); /* for indexing into this switchblock's permutation funcs */ - Switchblock_Lookup sb_conn(x_coord, y_coord, layer_coord, from_side, to_side); /* for indexing into FPGA's switchblock map */ + SB_Side_Connection side_conn(from_side, to_side); /* for indexing into this switchblock's permutation funcs */ + Switchblock_Lookup sb_conn(x_coord, y_coord, layer_coord, from_side, + to_side); /* for indexing into FPGA's switchblock map */ /* can't connect a switchblock side to itself */ if (from_side == to_side) { return; } /* check that the permutation map has an entry for this side combination */ - if (sb->permutation_map.count(side_conn) == 0) { + if (sb.permutation_map.count(side_conn) == 0) { /* the specified switchblock does not have any permutation funcs for this side1->side2 connection */ return; } @@ -778,15 +838,18 @@ static void compute_wire_connections(int x_coord, int y_coord, int layer_coord, * destination channels. also return the channel type (ie chanx/chany/both) into which we are * indexing */ /* details for source channel */ - const t_chan_details& from_chan_details = index_into_correct_chan(x_coord, y_coord, layer_coord, from_side, to_side, chan_details_x, chan_details_y, - from_x, from_y, from_layer, from_chan_type); + const t_chan_details& from_chan_details + = index_into_correct_chan(x_coord, y_coord, layer_coord, from_side, to_side, chan_details_x, chan_details_y, + from_x, from_y, from_layer, from_chan_type); /* details for destination channel */ - const t_chan_details& to_chan_details = index_into_correct_chan(x_coord, y_coord, layer_coord, to_side, from_side, chan_details_x, chan_details_y, - to_x, to_y, to_layer, to_chan_type); + const t_chan_details& to_chan_details + = index_into_correct_chan(x_coord, y_coord, layer_coord, to_side, from_side, chan_details_x, chan_details_y, + to_x, to_y, to_layer, to_chan_type); /* make sure from_x/y and to_x/y aren't out of bounds */ - if (coords_out_of_bounds(grid, to_x, to_y, to_layer, to_chan_type) || coords_out_of_bounds(grid, from_x, from_y, from_layer, from_chan_type)) { + if (coords_out_of_bounds(grid, to_x, to_y, to_layer, to_chan_type) + || coords_out_of_bounds(grid, from_x, from_y, from_layer, from_chan_type)) { return; } @@ -800,45 +863,43 @@ static void compute_wire_connections(int x_coord, int y_coord, int layer_coord, } /* iterate over all the wire connections specified for this switch block */ - for (int iconn = 0; iconn < (int)sb->wireconns.size(); iconn++) { + for (int iconn = 0; iconn < (int)sb.wireconns.size(); iconn++) { /* pointer to a connection specification between wire types/subsegment_nums */ - t_wireconn_inf* wireconn_ptr = &sb->wireconns[iconn]; + const t_wireconn_inf& wireconn_ptr = sb.wireconns[iconn]; /* compute the destination wire segments to which the source wire segment should connect based on the * current wireconn */ - compute_wireconn_connections(grid, directionality, from_chan_details, to_chan_details, - sb_conn, from_x, from_y, from_layer, to_x, to_y, to_layer, from_chan_type, to_chan_type, wire_type_sizes_from, - wire_type_sizes_to, sb, wireconn_ptr, sb_conns, rand_state, scratchpad); + compute_wireconn_connections(grid, directionality, from_chan_details, to_chan_details, sb_conn, from_x, from_y, + from_layer, to_x, to_y, to_layer, from_chan_type, to_chan_type, + wire_type_sizes_from, wire_type_sizes_to, sb, wireconn_ptr, sb_conns, rand_state, + scratchpad); } - - return; } /* computes the destination wire segments that a source wire segment at the coordinate 'sb_conn' (in * channel segment with coordinate from_x/from_y) should connect to based on the specified 'wireconn_ptr'. * wireconn_ptr defines the source and destination sets of wire segments (based on wire segment type & switchpoint * as defined at the top of this file), and the indices of wires to connect to are relative to these sets */ -static void compute_wireconn_connections( - const DeviceGrid& grid, - e_directionality directionality, - const t_chan_details& from_chan_details, - const t_chan_details& to_chan_details, - Switchblock_Lookup sb_conn, - int from_x, - int from_y, - int from_layer, - int to_x, - int to_y, - int to_layer, - t_rr_type from_chan_type, - t_rr_type to_chan_type, - const t_wire_type_sizes* wire_type_sizes_from, - const t_wire_type_sizes* wire_type_sizes_to, - const t_switchblock_inf* sb, - t_wireconn_inf* wireconn_ptr, - t_sb_connection_map* sb_conns, - vtr::RandState& rand_state, - t_wireconn_scratchpad* scratchpad) { +static void compute_wireconn_connections(const DeviceGrid& grid, + e_directionality directionality, + const t_chan_details& from_chan_details, + const t_chan_details& to_chan_details, + Switchblock_Lookup sb_conn, + int from_x, + int from_y, + int from_layer, + int to_x, + int to_y, + int to_layer, + t_rr_type from_chan_type, + t_rr_type to_chan_type, + const t_wire_type_sizes* wire_type_sizes_from, + const t_wire_type_sizes* wire_type_sizes_to, + const t_switchblock_inf& sb, + const t_wireconn_inf& wireconn_ptr, + t_sb_connection_map* sb_conns, + vtr::RandState& rand_state, + t_wireconn_scratchpad* scratchpad) { constexpr bool verbose = false; //choose the from_side to be the same as to_side if the connection is travelling across dice in multi-die FPGAs @@ -848,20 +909,20 @@ static void compute_wireconn_connections( /* vectors that will contain indices of the wires belonging to the source/dest wire types/points */ get_switchpoint_wires(grid, from_chan_details[from_x][from_y].data(), from_chan_type, from_x, from_y, from_side, - wireconn_ptr->from_switchpoint_set, wire_type_sizes_from, false, wireconn_ptr->from_switchpoint_order, rand_state, - &scratchpad->potential_src_wires, + wireconn_ptr.from_switchpoint_set, wire_type_sizes_from, false, + wireconn_ptr.from_switchpoint_order, rand_state, &scratchpad->potential_src_wires, &scratchpad->scratch_wires); get_switchpoint_wires(grid, to_chan_details[to_x][to_y].data(), to_chan_type, to_x, to_y, to_side, - wireconn_ptr->to_switchpoint_set, wire_type_sizes_to, true, - wireconn_ptr->to_switchpoint_order, rand_state, &scratchpad->potential_dest_wires, - &scratchpad->scratch_wires); + wireconn_ptr.to_switchpoint_set, wire_type_sizes_to, true, wireconn_ptr.to_switchpoint_order, + rand_state, &scratchpad->potential_dest_wires, &scratchpad->scratch_wires); const auto& potential_src_wires = scratchpad->potential_src_wires; const auto& potential_dest_wires = scratchpad->potential_dest_wires; #ifdef VERBOSE_RR - VTR_LOGV(verbose, "SB_LOC: %d,%d %s->%s\n", sb_conn.x_coord, sb_conn.y_coord, TOTAL_2D_SIDE_STRINGS[sb_conn.from_side], TOTAL_2D_SIDE_STRINGS[sb_conn.to_side]); + VTR_LOGV(verbose, "SB_LOC: %d,%d %s->%s\n", sb_conn.x_coord, sb_conn.y_coord, + TOTAL_2D_SIDE_STRINGS[sb_conn.from_side], TOTAL_2D_SIDE_STRINGS[sb_conn.to_side]); //Define to print out specific wire-switchpoints used in to/from sets, if verbose is set true @@ -883,11 +944,13 @@ static void compute_wireconn_connections( vector src_wire_str; for (t_wire_switchpoint wire_switchpoint : potential_src_wires) { - src_wire_str.push_back(std::to_string(wire_switchpoint.wire) + "@" + std::to_string(wire_switchpoint.switchpoint)); + src_wire_str.push_back(std::to_string(wire_switchpoint.wire) + "@" + + std::to_string(wire_switchpoint.switchpoint)); } vector dst_wire_str; for (t_wire_switchpoint wire_switchpoint : potential_dest_wires) { - dst_wire_str.push_back(std::to_string(wire_switchpoint.wire) + "@" + std::to_string(wire_switchpoint.switchpoint)); + dst_wire_str.push_back(std::to_string(wire_switchpoint.wire) + "@" + + std::to_string(wire_switchpoint.switchpoint)); } auto src_str = vtr::join(src_wire_str, ", "); auto dst_str = vtr::join(dst_wire_str, ", "); @@ -895,7 +958,7 @@ static void compute_wireconn_connections( VTR_LOGV(verbose, " DST_WIRES: %s\n", dst_str.c_str()); #endif - if (potential_src_wires.size() == 0 || potential_dest_wires.size() == 0) { + if (potential_src_wires.empty() || potential_dest_wires.empty()) { //Can't make any connections between empty sets return; } @@ -911,7 +974,8 @@ static void compute_wireconn_connections( // * interleave (to ensure good diversity) //Determine how many connections to make - int num_conns = evaluate_num_conns_formula(scratchpad, wireconn_ptr->num_conns_formula, potential_src_wires.size(), potential_dest_wires.size()); + int num_conns = evaluate_num_conns_formula(scratchpad, wireconn_ptr.num_conns_formula, potential_src_wires.size(), + potential_dest_wires.size()); VTR_ASSERT_MSG(num_conns >= 0, "Number of switchblock connections to create must be non-negative"); VTR_LOGV(verbose, " num_conns: %zu\n", num_conns); @@ -929,21 +993,23 @@ static void compute_wireconn_connections( if (sb_conn.from_side == TOP || sb_conn.from_side == RIGHT) { continue; } - VTR_ASSERT(sb_conn.from_side == BOTTOM || sb_conn.from_side == LEFT || sb_conn.from_side == ABOVE || sb_conn.from_side == UNDER); + VTR_ASSERT(sb_conn.from_side == BOTTOM || sb_conn.from_side == LEFT || sb_conn.from_side == ABOVE + || sb_conn.from_side == UNDER); } else if (from_wire_direction == Direction::DEC) { /* a wire heading in the decreasing direction can only connect from the TOP or RIGHT sides of a switch block */ if (sb_conn.from_side == BOTTOM || sb_conn.from_side == LEFT) { continue; } - VTR_ASSERT(sb_conn.from_side == TOP || sb_conn.from_side == RIGHT || sb_conn.from_side == ABOVE || sb_conn.from_side == UNDER); + VTR_ASSERT(sb_conn.from_side == TOP || sb_conn.from_side == RIGHT || sb_conn.from_side == ABOVE + || sb_conn.from_side == UNDER); } else { VTR_ASSERT(from_wire_direction == Direction::BIDIR); } //Evaluate permutation functions for the from_wire SB_Side_Connection side_conn(sb_conn.from_side, sb_conn.to_side); - auto iter = sb->permutation_map.find(side_conn); - if (iter == sb->permutation_map.end()) { + auto iter = sb.permutation_map.find(side_conn); + if (iter == sb.permutation_map.end()) { continue; } const std::vector& permutations_ref = iter->second; @@ -953,11 +1019,13 @@ static void compute_wireconn_connections( formula_data.clear(); formula_data.set_var_value("W", dest_W); formula_data.set_var_value("t", src_wire_ind); - int raw_dest_wire_ind = get_sb_formula_raw_result(scratchpad->formula_parser, permutations_ref[iperm].c_str(), formula_data); + int raw_dest_wire_ind + = get_sb_formula_raw_result(scratchpad->formula_parser, permutations_ref[iperm].c_str(), formula_data); int dest_wire_ind = adjust_formula_result(raw_dest_wire_ind, src_W, dest_W, iconn); if (dest_wire_ind < 0) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Got a negative wire from switch block formula %s", permutations_ref[iperm].c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Got a negative wire from switch block formula %s", + permutations_ref[iperm].c_str()); } int to_wire = potential_dest_wires[dest_wire_ind].wire; //Index in channel @@ -971,17 +1039,19 @@ static void compute_wireconn_connections( sb_edge.to_wire_layer = to_layer; // if the switch override has been set, use that, Otherwise use default - if (wireconn_ptr->switch_override_indx != DEFAULT_SWITCH) { - sb_edge.switch_ind = wireconn_ptr->switch_override_indx; + if (wireconn_ptr.switch_override_indx != DEFAULT_SWITCH) { + sb_edge.switch_ind = wireconn_ptr.switch_override_indx; } else if (from_layer == to_layer) { sb_edge.switch_ind = to_chan_details[to_x][to_y][to_wire].arch_wire_switch(); sb_edge.switch_ind_between_layers = -1; //the connection does not cross any layers } else { VTR_ASSERT(from_layer != to_layer); sb_edge.switch_ind = to_chan_details[to_x][to_y][to_wire].arch_wire_switch(); - sb_edge.switch_ind_between_layers = to_chan_details[to_x][to_y][to_wire].arch_opin_between_dice_switch(); + sb_edge.switch_ind_between_layers + = to_chan_details[to_x][to_y][to_wire].arch_opin_between_dice_switch(); } - VTR_LOGV(verbose, " make_conn: %d -> %d switch=%d\n", sb_edge.from_wire, sb_edge.to_wire, sb_edge.switch_ind); + VTR_LOGV(verbose, " make_conn: %d -> %d switch=%d\n", sb_edge.from_wire, sb_edge.to_wire, + sb_edge.switch_ind); /* and now, finally, add this switchblock connection to the switchblock connections map */ (*sb_conns)[sb_conn].push_back(sb_edge); @@ -994,14 +1064,18 @@ static void compute_wireconn_connections( // //Coverity flags this (false positive), so annotate coverity ignores it: // coverity[swapped_arguments : Intentional] - Switchblock_Lookup sb_conn_reverse(sb_conn.x_coord, sb_conn.y_coord, sb_conn.layer_coord, sb_conn.to_side, sb_conn.from_side); + Switchblock_Lookup sb_conn_reverse(sb_conn.x_coord, sb_conn.y_coord, sb_conn.layer_coord, + sb_conn.to_side, sb_conn.from_side); (*sb_conns)[sb_conn_reverse].push_back(sb_reverse_edge); } } } } -static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, std::string num_conns_formula, int from_wire_count, int to_wire_count) { +static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, + std::string num_conns_formula, + int from_wire_count, + int to_wire_count) { t_formula_data& vars = scratchpad->formula_data; vars.clear(); @@ -1011,7 +1085,17 @@ static int evaluate_num_conns_formula(t_wireconn_scratchpad* scratchpad, std::st return scratchpad->formula_parser.parse_formula(num_conns_formula, vars); } -static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int tile_layer, enum e_side src_side, enum e_side dest_side, const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, int& chan_x, int& chan_y, int& chan_layer, t_rr_type& chan_type) { +static const t_chan_details& index_into_correct_chan(int tile_x, + int tile_y, + int tile_layer, + enum e_side src_side, + enum e_side dest_side, + const t_chan_details& chan_details_x, + const t_chan_details& chan_details_y, + int& chan_x, + int& chan_y, + int& chan_layer, + t_rr_type& chan_type) { chan_type = CHANX; /* here we use the VPR convention that a tile 'owns' the channels directly to the right * and above it */ @@ -1072,7 +1156,11 @@ static const t_chan_details& index_into_correct_chan(int tile_x, int tile_y, int return chan_details_x; //Unreachable } -static bool coords_out_of_bounds(const DeviceGrid& grid, int x_coord, int y_coord, int layer_coord, e_rr_type chan_type) { +static bool coords_out_of_bounds(const DeviceGrid& grid, + int x_coord, + int y_coord, + int layer_coord, + e_rr_type chan_type) { bool result = true; /* the layer that channel is located at must be legal regardless of chan_type*/ @@ -1101,7 +1189,10 @@ static bool coords_out_of_bounds(const DeviceGrid& grid, int x_coord, int y_coor return result; } -static int get_wire_subsegment_num(const DeviceGrid& grid, e_rr_type chan_type, const t_chan_seg_details& wire_details, int seg_coord) { +static int get_wire_subsegment_num(const DeviceGrid& grid, + e_rr_type chan_type, + const t_chan_seg_details& wire_details, + int seg_coord) { /* We get wire subsegment number by comparing the wire's seg_coord to the seg_start of the wire. * The offset between seg_start (or seg_end) and seg_coord is the subsegment number * @@ -1164,7 +1255,11 @@ int get_wire_segment_length(const DeviceGrid& grid, e_rr_type chan_type, const t return wire_length; } -static int get_switchpoint_of_wire(const DeviceGrid& grid, e_rr_type chan_type, const t_chan_seg_details& wire_details, int seg_coord, e_side sb_side) { +static int get_switchpoint_of_wire(const DeviceGrid& grid, + e_rr_type chan_type, + const t_chan_seg_details& wire_details, + int seg_coord, + e_side sb_side) { /* this function calculates the switchpoint of a given wire by first calculating * the subsegmennt number of the specified wire. For instance, for a wire with L=4: * @@ -1188,7 +1283,8 @@ static int get_switchpoint_of_wire(const DeviceGrid& grid, e_rr_type chan_type, /* check whether the current seg_coord/sb_side coordinate specifies a perimeter switch block side at which all wire segments terminate/start. * in this case only segments with switchpoints = 0 can exist */ bool perimeter_connection = false; - if ((seg_coord == min_seg && (sb_side == RIGHT || sb_side == TOP)) || (seg_coord == max_seg && (sb_side == LEFT || sb_side == BOTTOM))) { + if ((seg_coord == min_seg && (sb_side == RIGHT || sb_side == TOP)) + || (seg_coord == max_seg && (sb_side == LEFT || sb_side == BOTTOM))) { perimeter_connection = true; } diff --git a/vpr/src/route/build_switchblocks.h b/vpr/src/route/build_switchblocks.h index c0db665b956..14baf64356d 100644 --- a/vpr/src/route/build_switchblocks.h +++ b/vpr/src/route/build_switchblocks.h @@ -50,8 +50,7 @@ class Switchblock_Lookup { /* Overload == operator which is used by std::unordered_map */ bool operator==(const Switchblock_Lookup& obj) const { bool result; - if (x_coord == obj.x_coord && y_coord == obj.y_coord - && from_side == obj.from_side && to_side == obj.to_side + if (x_coord == obj.x_coord && y_coord == obj.y_coord && from_side == obj.from_side && to_side == obj.to_side && layer_coord == obj.layer_coord) { result = true; } else { @@ -98,7 +97,8 @@ struct t_switchblock_edge { * of the map is a vector of destination wires. * A matrix specifying connections for all switchblocks in an FPGA would be sparse and possibly very large * so we use an unordered map to take advantage of the sparsity. */ -typedef std::unordered_map, t_hash_Switchblock_Lookup> t_sb_connection_map; +typedef std::unordered_map, t_hash_Switchblock_Lookup> + t_sb_connection_map; /************ Functions ************/ @@ -116,7 +116,14 @@ typedef std::unordered_map, * * @return creates a map between switch blocks (key) and their corresponding edges (value). */ -t_sb_connection_map* alloc_and_load_switchblock_permutations(const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, const DeviceGrid& grid, const std::vector& inter_cluster_rr, const std::vector& switchblocks, t_chan_width* nodes_per_chan, enum e_directionality directionality, vtr::RandState& rand_state); +t_sb_connection_map* alloc_and_load_switchblock_permutations(const t_chan_details& chan_details_x, + const t_chan_details& chan_details_y, + const DeviceGrid& grid, + const std::vector& inter_cluster_rr, + const std::vector& switchblocks, + t_chan_width* nodes_per_chan, + enum e_directionality directionality, + vtr::RandState& rand_state); /** * @brief deallocates switch block connections sparse array diff --git a/vpr/src/route/cb_metrics.cpp b/vpr/src/route/cb_metrics.cpp index 7dbe0260e42..1a7c5e0b9b9 100644 --- a/vpr/src/route/cb_metrics.cpp +++ b/vpr/src/route/cb_metrics.cpp @@ -73,20 +73,39 @@ bool set_has_element(const T elem, const std::set* my_set) { /**** Function Declarations ****/ /* goes through each pin of pin_type and determines which side of the block it comes out on. results are stored in * the 'pin_locations' 2d-vector */ -static void get_pin_locations(const t_physical_tile_type_ptr block_type, const e_pin_type pin_type, const int num_pin_type_pins, int***** tracks_connected_to_pin, t_2d_int_vec* pin_locations); +static void get_pin_locations(const t_physical_tile_type_ptr block_type, + const e_pin_type pin_type, + const int num_pin_type_pins, + int***** tracks_connected_to_pin, + t_2d_int_vec* pin_locations); /* Gets the maximum Fc value from the Fc_array of this pin type. Errors out if the pins of this pin_type don't all have the same Fc */ static int get_max_Fc(const int* Fc_array, const t_physical_tile_type_ptr block_type, const e_pin_type pin_type); /* initializes the fields of the cb_metrics class */ -static void init_cb_structs(const t_physical_tile_type_ptr block_type, int***** tracks_connected_to_pin, const int num_segments, const t_segment_inf* segment_inf, const e_pin_type pin_type, const int num_pin_type_pins, const int nodes_per_chan, const int Fc, Conn_Block_Metrics* cb_metrics); +static void init_cb_structs(const t_physical_tile_type_ptr block_type, + int***** tracks_connected_to_pin, + const int num_segments, + const t_segment_inf* segment_inf, + const e_pin_type pin_type, + const int num_pin_type_pins, + const int nodes_per_chan, + const int Fc, + Conn_Block_Metrics* cb_metrics); /* given a set of tracks connected to a pin, we'd like to find which of these tracks are connected to a number of switches * greater than 'criteria'. The resulting set of tracks is passed back in the 'result' vector */ -static void find_tracks_with_more_switches_than(const std::set* pin_tracks, const t_vec_vec_set* track_to_pins, const int side, const bool both_sides, const int criteria, std::vector* result); +static void find_tracks_with_more_switches_than(const std::set* pin_tracks, + const t_vec_vec_set* track_to_pins, + const int side, + const bool both_sides, + const int criteria, + std::vector* result); /* given a pin on some side of a block, we'd like to find the set of tracks that is NOT connected to that pin on that side. This set of tracks * is passed back in the 'result' vector */ -static void find_tracks_unconnected_to_pin(const std::set* pin_tracks, const std::vector >* track_to_pins, std::vector* result); +static void find_tracks_unconnected_to_pin(const std::set* pin_tracks, + const std::vector >* track_to_pins, + std::vector* result); /* iterates through the elements of set 1 and returns the number of elements in set1 that are * also in set2 (in terms of bit vectors, this looks for the number of positions where both bit vectors @@ -97,22 +116,52 @@ static int hamming_proximity_of_two_sets(const std::set* set1, const std::s /* returns the pin diversity metric of a block */ static float get_pin_diversity(const int Fc, const int num_pin_type_pins, const Conn_Block_Metrics* cb_metrics); /* Returns the wire homogeneity of a block's connection to tracks */ -static float get_wire_homogeneity(const int Fc, const int nodes_per_chan, const int num_pin_type_pins, const int exponent, const bool both_sides, const Conn_Block_Metrics* cb_metrics); +static float get_wire_homogeneity(const int Fc, + const int nodes_per_chan, + const int num_pin_type_pins, + const int exponent, + const bool both_sides, + const Conn_Block_Metrics* cb_metrics); /* Returns the hamming proximity of a block's connection to tracks */ -static float get_hamming_proximity(const int Fc, const int num_pin_type_pins, const int exponent, const bool both_sides, const Conn_Block_Metrics* cb_metrics); +static float get_hamming_proximity(const int Fc, + const int num_pin_type_pins, + const int exponent, + const bool both_sides, + const Conn_Block_Metrics* cb_metrics); /* Returns Lemieux's cost function for sparse crossbars (see his 2001 book) applied here to the connection block */ static float get_lemieux_cost_func(const int exponent, const bool both_sides, const Conn_Block_Metrics* cb_metrics); /* this annealer is used to adjust a desired wire or pin metric while keeping the other type of metric * relatively constant */ -static bool annealer(const e_metric metric, const int nodes_per_chan, const t_physical_tile_type_ptr block_type, const e_pin_type pin_type, const int Fc, const int num_pin_type_pins, const float target_metric, const float target_metric_tolerance, int***** pin_to_track_connections, Conn_Block_Metrics* cb_metrics); +static bool annealer(const e_metric metric, + const int nodes_per_chan, + const t_physical_tile_type_ptr block_type, + const e_pin_type pin_type, + const int Fc, + const int num_pin_type_pins, + const float target_metric, + const float target_metric_tolerance, + int***** pin_to_track_connections, + Conn_Block_Metrics* cb_metrics); /* updates temperature based on current temperature and the annealer's outer loop iteration */ static double update_temp(const double temp); /* determines whether to accept or reject a proposed move based on the resulting delta of the cost and current temperature */ static bool accept_move(const double del_cost, const double temp); /* this function simply moves a switch from one track to another track (with an empty slot). The switch stays on the * same pin as before. */ -static double try_move(const e_metric metric, const int nodes_per_chan, const float initial_orthogonal_metric, const float orthogonal_metric_tolerance, const t_physical_tile_type_ptr block_type, const e_pin_type pin_type, const int Fc, const int num_pin_type_pins, const double cost, const double temp, const float target_metric, int***** pin_to_track_connections, Conn_Block_Metrics* cb_metrics); +static double try_move(const e_metric metric, + const int nodes_per_chan, + const float initial_orthogonal_metric, + const float orthogonal_metric_tolerance, + const t_physical_tile_type_ptr block_type, + const e_pin_type pin_type, + const int Fc, + const int num_pin_type_pins, + const double cost, + const double temp, + const float target_metric, + int***** pin_to_track_connections, + Conn_Block_Metrics* cb_metrics); static void print_switch_histogram(const int nodes_per_chan, const Conn_Block_Metrics* cb_metrics); @@ -120,7 +169,16 @@ static void print_switch_histogram(const int nodes_per_chan, const Conn_Block_Me /* adjusts the connection block until the appropriate metric has hit its target value. the other orthogonal metric is kept constant * within some tolerance */ -void adjust_cb_metric(const e_metric metric, const float target, const float target_tolerance, const t_physical_tile_type_ptr block_type, int***** pin_to_track_connections, const e_pin_type pin_type, const int* Fc_array, const t_chan_width* chan_width_inf, const int num_segments, const t_segment_inf* segment_inf) { +void adjust_cb_metric(const e_metric metric, + const float target, + const float target_tolerance, + const t_physical_tile_type_ptr block_type, + int***** pin_to_track_connections, + const e_pin_type pin_type, + const int* Fc_array, + const t_chan_width* chan_width_inf, + const int num_segments, + const t_segment_inf* segment_inf) { Conn_Block_Metrics cb_metrics; /* various error checks */ @@ -131,11 +189,14 @@ void adjust_cb_metric(const e_metric metric, const float target, const float tar VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Trying to adjust CB metrics for a block with no pins!\n"); } if (block_type->height > 1 || block_type->width > 1) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Adjusting connection block metrics is currently intended for CLBs, which have height and width = 1\n"); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "Adjusting connection block metrics is currently intended for CLBs, which have height and width = 1\n"); } if (chan_width_inf->x_min != chan_width_inf->x_max || chan_width_inf->y_min != chan_width_inf->y_max || chan_width_inf->x_max != chan_width_inf->y_max) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "This code currently assumes that channel width is uniform throughout the fpga"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "This code currently assumes that channel width is uniform throughout the fpga"); } int nodes_per_chan = chan_width_inf->x_min; @@ -154,8 +215,8 @@ void adjust_cb_metric(const e_metric metric, const float target, const float tar } /* get initial values for metrics */ - get_conn_block_metrics(block_type, pin_to_track_connections, num_segments, segment_inf, pin_type, - Fc_array, chan_width_inf, &cb_metrics); + get_conn_block_metrics(block_type, pin_to_track_connections, num_segments, segment_inf, pin_type, Fc_array, + chan_width_inf, &cb_metrics); /* now run the annealer to adjust the desired metric towards the target value */ bool success = annealer(metric, nodes_per_chan, block_type, pin_type, Fc, num_pin_type_pins, target, @@ -168,10 +229,18 @@ void adjust_cb_metric(const e_metric metric, const float target, const float tar } /* calculates all the connection block metrics and returns them through the cb_metrics variable */ -void get_conn_block_metrics(const t_physical_tile_type_ptr block_type, int***** tracks_connected_to_pin, const int num_segments, const t_segment_inf* segment_inf, const e_pin_type pin_type, const int* Fc_array, const t_chan_width* chan_width_inf, Conn_Block_Metrics* cb_metrics) { +void get_conn_block_metrics(const t_physical_tile_type_ptr block_type, + int***** tracks_connected_to_pin, + const int num_segments, + const t_segment_inf* segment_inf, + const e_pin_type pin_type, + const int* Fc_array, + const t_chan_width* chan_width_inf, + Conn_Block_Metrics* cb_metrics) { if (chan_width_inf->x_min != chan_width_inf->x_max || chan_width_inf->y_min != chan_width_inf->y_max || chan_width_inf->x_max != chan_width_inf->y_max) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Currently this code assumes that channel width is uniform throughout the fpga"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "Currently this code assumes that channel width is uniform throughout the fpga"); } int nodes_per_chan = chan_width_inf->x_min; @@ -197,8 +266,8 @@ void get_conn_block_metrics(const t_physical_tile_type_ptr block_type, int***** } /* initialize CB metrics structures */ - init_cb_structs(block_type, tracks_connected_to_pin, num_segments, segment_inf, pin_type, num_pin_type_pins, nodes_per_chan, - Fc, cb_metrics); + init_cb_structs(block_type, tracks_connected_to_pin, num_segments, segment_inf, pin_type, num_pin_type_pins, + nodes_per_chan, Fc, cb_metrics); /* check based on block type whether we should account for pins on both sides of a channel when computing the relevant CB metrics * (i.e. from a block on the left and from a block on the right for a vertical channel, for instance) */ @@ -214,7 +283,8 @@ void get_conn_block_metrics(const t_physical_tile_type_ptr block_type, int***** } /* get the metrics */ - cb_metrics->wire_homogeneity = get_wire_homogeneity(Fc, nodes_per_chan, num_pin_type_pins, 2, both_sides, cb_metrics); + cb_metrics->wire_homogeneity + = get_wire_homogeneity(Fc, nodes_per_chan, num_pin_type_pins, 2, both_sides, cb_metrics); cb_metrics->hamming_proximity = get_hamming_proximity(Fc, num_pin_type_pins, 2, both_sides, cb_metrics); @@ -224,7 +294,15 @@ void get_conn_block_metrics(const t_physical_tile_type_ptr block_type, int***** } /* initializes the fields of the cb_metrics class */ -static void init_cb_structs(const t_physical_tile_type_ptr block_type, int***** tracks_connected_to_pin, const int num_segments, const t_segment_inf* segment_inf, const e_pin_type pin_type, const int num_pin_type_pins, const int nodes_per_chan, const int Fc, Conn_Block_Metrics* cb_metrics) { +static void init_cb_structs(const t_physical_tile_type_ptr block_type, + int***** tracks_connected_to_pin, + const int num_segments, + const t_segment_inf* segment_inf, + const e_pin_type pin_type, + const int num_pin_type_pins, + const int nodes_per_chan, + const int Fc, + Conn_Block_Metrics* cb_metrics) { /* can not calculate CB metrics for open pins */ if (OPEN == pin_type) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Can not initialize CB metric structures for pins of OPEN type\n"); @@ -283,17 +361,23 @@ static void init_cb_structs(const t_physical_tile_type_ptr block_type, int***** break; } - std::pair::iterator, bool> result1 = cb_metrics->pin_to_tracks.at(iside).at(ipin).insert(track); + std::pair::iterator, bool> result1 + = cb_metrics->pin_to_tracks.at(iside).at(ipin).insert(track); if (!result1.second) { /* this track should not already be a part of the set */ - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Attempted to insert element into pin_to_tracks set which already exists there\n"); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "Attempted to insert element into pin_to_tracks set which already exists there\n"); } /* insert the current pin into the corresponding tracks_to_pin entry */ - std::pair::iterator, bool> result2 = cb_metrics->track_to_pins.at(iside).at(track).insert(pin); + std::pair::iterator, bool> result2 + = cb_metrics->track_to_pins.at(iside).at(track).insert(pin); if (!result2.second) { /* this pin should not already be a part of the set */ - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Attempted to insert element into track_to_pins set which already exists there\n"); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "Attempted to insert element into track_to_pins set which already exists there\n"); } /* keep track of how many of each wire type is used by the current pin */ @@ -321,7 +405,9 @@ int get_num_wire_types(const int num_segments, const t_segment_inf* segment_inf) /* There are as many wire start points as the value of L */ num_wire_types = segment_inf[0].length; } else { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Currently, the connection block metrics code can only deal with channel segments that carry wires of only one lenght.\n"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "Currently, the connection block metrics code can only deal with channel segments that carry " + "wires of only one lenght.\n"); } return num_wire_types; @@ -335,7 +421,9 @@ int get_max_Fc(const int* Fc_array, const t_physical_tile_type_ptr block_type, c if (Fc_array[ipin] > Fc && curr_pin_type == pin_type) { /* currently I'm assuming that the Fc for all pins are the same. Check this here. */ if (Fc != 0 && Fc_array[ipin] != Fc) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Two pins of the same type have different Fc values. This is currently not allowed for CB metrics\n"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "Two pins of the same type have different Fc values. This is currently not allowed for " + "CB metrics\n"); } Fc = Fc_array[ipin]; } @@ -359,7 +447,10 @@ static float get_pin_diversity(const int Fc, const int num_pin_type_pins, const for (int ipin = 0; ipin < (int)cb_metrics->pin_locations.at(iside).size(); ipin++) { float pin_diversity = 0; for (int i = 0; i < num_wire_types; i++) { - pin_diversity += (1 / (float)num_wire_types) * (1 - exp(-exp_factor * (float)cb_metrics->wire_types_used_count.at(iside).at(ipin).at(i) / mean)); + pin_diversity += (1 / (float)num_wire_types) + * (1 + - exp(-exp_factor + * (float)cb_metrics->wire_types_used_count.at(iside).at(ipin).at(i) / mean)); } total_pin_diversity += pin_diversity; } @@ -418,7 +509,8 @@ static float get_lemieux_cost_func(const int exponent, const bool both_sides, co } pin_comparisons++; /* get the hamming proximity between the tracks of the two pins being compared */ - float pin_to_pin_lcf = (float)hamming_proximity_of_two_sets(&pin_to_tracks->at(pin_side).at(pin_ind), &pin_to_tracks->at(comp_side).at(comp_pin_ind)); + float pin_to_pin_lcf = (float)hamming_proximity_of_two_sets( + &pin_to_tracks->at(pin_side).at(pin_ind), &pin_to_tracks->at(comp_side).at(comp_pin_ind)); pin_to_pin_lcf = 2 * ((int)pin_to_tracks->at(pin_side).at(pin_ind).size() - pin_to_pin_lcf); if (0 == pin_to_pin_lcf) { pin_to_pin_lcf = 1; @@ -436,7 +528,11 @@ static float get_lemieux_cost_func(const int exponent, const bool both_sides, co } /* Returns the hamming proximity of a block's connection to tracks */ -static float get_hamming_proximity(const int Fc, const int num_pin_type_pins, const int exponent, const bool both_sides, const Conn_Block_Metrics* cb_metrics) { +static float get_hamming_proximity(const int Fc, + const int num_pin_type_pins, + const int exponent, + const bool both_sides, + const Conn_Block_Metrics* cb_metrics) { float hamming_proximity = 0; const t_2d_int_vec* pin_locations = &cb_metrics->pin_locations; @@ -485,7 +581,8 @@ static float get_hamming_proximity(const int Fc, const int num_pin_type_pins, co } pin_comparisons++; /* get the hamming proximity between the tracks of the two pins being compared */ - float pin_to_pin_hp = (float)hamming_proximity_of_two_sets(&pin_to_tracks->at(pin_side).at(pin_ind), &pin_to_tracks->at(comp_side).at(comp_pin_ind)); + float pin_to_pin_hp = (float)hamming_proximity_of_two_sets( + &pin_to_tracks->at(pin_side).at(pin_ind), &pin_to_tracks->at(comp_side).at(comp_pin_ind)); pin_to_pin_hp = pow(pin_to_pin_hp, exponent); pin_hp += pin_to_pin_hp; } @@ -517,7 +614,12 @@ static int hamming_proximity_of_two_sets(const std::set* set1, const std::s } /* Returns the wire homogeneity of a block's connection to tracks */ -static float get_wire_homogeneity(const int Fc, const int nodes_per_chan, const int num_pin_type_pins, const int exponent, const bool both_sides, const Conn_Block_Metrics* cb_metrics) { +static float get_wire_homogeneity(const int Fc, + const int nodes_per_chan, + const int num_pin_type_pins, + const int exponent, + const bool both_sides, + const Conn_Block_Metrics* cb_metrics) { float total_wire_homogeneity = 0; float wire_homogeneity[4]; int counted_pins_per_side[4]; @@ -564,7 +666,9 @@ static float get_wire_homogeneity(const int Fc, const int nodes_per_chan, const } wire_homogeneity[side] += pow(fabs(wire_homogeneity_temp - mean), exponent); } - float normalization = ((float)Fc * pow(((float)total_pins_on_side - mean), exponent) + (float)(nodes_per_chan - Fc) * pow(mean, exponent)) / (float)total_pins_on_side; + float normalization = ((float)Fc * pow(((float)total_pins_on_side - mean), exponent) + + (float)(nodes_per_chan - Fc) * pow(mean, exponent)) + / (float)total_pins_on_side; wire_homogeneity[side] -= unconnected_wires * mean; wire_homogeneity[side] /= normalization; total_wire_homogeneity += wire_homogeneity[side]; @@ -576,7 +680,11 @@ static float get_wire_homogeneity(const int Fc, const int nodes_per_chan, const /* goes through each pin of pin_type and determines which side of the block it comes out on. results are stored in * the 'pin_locations' 2d-vector */ -static void get_pin_locations(const t_physical_tile_type_ptr block_type, const e_pin_type pin_type, const int num_pin_type_pins, int***** tracks_connected_to_pin, t_2d_int_vec* pin_locations) { +static void get_pin_locations(const t_physical_tile_type_ptr block_type, + const e_pin_type pin_type, + const int num_pin_type_pins, + int***** tracks_connected_to_pin, + t_2d_int_vec* pin_locations) { std::set counted_pins; pin_locations->clear(); @@ -611,7 +719,7 @@ static void get_pin_locations(const t_physical_tile_type_ptr block_type, const e } } /* sort the vector at the current side in increasing order, for good measure */ - std::stable_sort(pin_locations->at(iside).begin(), pin_locations->at(iside).end()); + std::stable_sort(pin_locations->at(iside).begin(), pin_locations->at(iside).end()); } } /* now we have a vector of vectors [0..3][0..num_pins_on_this_side] specifying which pins are on which side */ @@ -619,11 +727,19 @@ static void get_pin_locations(const t_physical_tile_type_ptr block_type, const e /* given a set of tracks connected to a pin, we'd like to find which of these tracks are connected to a number of switches * greater than 'criteria'. The resulting set of tracks is passed back in the 'result' vector */ -static void find_tracks_with_more_switches_than(const std::set* pin_tracks, const t_vec_vec_set* track_to_pins, const int side, const bool both_sides, const int criteria, std::vector* result) { +static void find_tracks_with_more_switches_than(const std::set* pin_tracks, + const t_vec_vec_set* track_to_pins, + const int side, + const bool both_sides, + const int criteria, + std::vector* result) { result->clear(); if (both_sides && side >= 2) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "when accounting for pins on both sides of a channel segment, the passed-in side should have index < 2. got %d\n", side); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "when accounting for pins on both sides of a channel segment, the passed-in side should have " + "index < 2. got %d\n", + side); } /* for each track connected to the pin */ @@ -633,7 +749,8 @@ static void find_tracks_with_more_switches_than(const std::set* pin_tracks, int num_switches = 0; if (both_sides) { - num_switches = (int)track_to_pins->at(side).at(track).size() + (int)track_to_pins->at(side + 2).at(track).size(); + num_switches + = (int)track_to_pins->at(side).at(track).size() + (int)track_to_pins->at(side + 2).at(track).size(); } else { num_switches = (int)track_to_pins->at(side).at(track).size(); } @@ -645,7 +762,9 @@ static void find_tracks_with_more_switches_than(const std::set* pin_tracks, /* given a pin on some side of a block, we'd like to find the set of tracks that is NOT connected to that pin on that side. This set of tracks * is passed back in the 'result' vector */ -static void find_tracks_unconnected_to_pin(const std::set* pin_tracks, const std::vector >* track_to_pins, std::vector* result) { +static void find_tracks_unconnected_to_pin(const std::set* pin_tracks, + const std::vector >* track_to_pins, + std::vector* result) { result->clear(); /* for each track in the channel segment */ for (int itrack = 0; itrack < (int)track_to_pins->size(); itrack++) { @@ -658,7 +777,19 @@ static void find_tracks_unconnected_to_pin(const std::set* pin_tracks, cons /* this function simply moves a switch from one track to another track (with an empty slot). The switch stays on the * same pin as before. */ -static double try_move(const e_metric metric, const int nodes_per_chan, const float initial_orthogonal_metric, const float orthogonal_metric_tolerance, const t_physical_tile_type_ptr block_type, const e_pin_type pin_type, const int Fc, const int num_pin_type_pins, const double cost, const double temp, const float target_metric, int***** pin_to_track_connections, Conn_Block_Metrics* cb_metrics) { +static double try_move(const e_metric metric, + const int nodes_per_chan, + const float initial_orthogonal_metric, + const float orthogonal_metric_tolerance, + const t_physical_tile_type_ptr block_type, + const e_pin_type pin_type, + const int Fc, + const int num_pin_type_pins, + const double cost, + const double temp, + const float target_metric, + int***** pin_to_track_connections, + Conn_Block_Metrics* cb_metrics) { double new_cost = 0; float new_orthogonal_metric = 0; float new_metric = 0; @@ -714,10 +845,12 @@ static double try_move(const e_metric metric, const int nodes_per_chan, const fl } if (preserve_tracks) { /* looking for tracks with 2 or more switches */ - find_tracks_with_more_switches_than(tracks_connected_to_pin, track_to_pins, check_side, both_sides, 1, &set_of_tracks); + find_tracks_with_more_switches_than(tracks_connected_to_pin, track_to_pins, check_side, both_sides, 1, + &set_of_tracks); } else { /* looking for tracks with 1 or more switches */ - find_tracks_with_more_switches_than(tracks_connected_to_pin, track_to_pins, check_side, both_sides, 0, &set_of_tracks); + find_tracks_with_more_switches_than(tracks_connected_to_pin, track_to_pins, check_side, both_sides, 0, + &set_of_tracks); } if (set_of_tracks.size() == 0) { @@ -750,7 +883,8 @@ static double try_move(const e_metric metric, const int nodes_per_chan, const fl new_orthogonal_metric = get_pin_diversity(Fc, num_pin_type_pins, cb_metrics); } else { /* get the new wire homogeneity cost */ - new_orthogonal_metric = get_wire_homogeneity(Fc, nodes_per_chan, num_pin_type_pins, 2, both_sides, cb_metrics); + new_orthogonal_metric + = get_wire_homogeneity(Fc, nodes_per_chan, num_pin_type_pins, 2, both_sides, cb_metrics); } /* check if the orthogonal metric has remained within tolerance */ @@ -764,7 +898,8 @@ static double try_move(const e_metric metric, const int nodes_per_chan, const fl double delta_cost; switch (metric) { case WIRE_HOMOGENEITY: - new_metric = get_wire_homogeneity(Fc, nodes_per_chan, num_pin_type_pins, 2, both_sides, cb_metrics); + new_metric + = get_wire_homogeneity(Fc, nodes_per_chan, num_pin_type_pins, 2, both_sides, cb_metrics); break; case HAMMING_PROXIMITY: new_metric = get_hamming_proximity(Fc, num_pin_type_pins, 2, both_sides, cb_metrics); @@ -776,7 +911,8 @@ static double try_move(const e_metric metric, const int nodes_per_chan, const fl new_metric = get_pin_diversity(Fc, num_pin_type_pins, cb_metrics); break; default: - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "try_move: illegal CB metric being adjusted: %d\n", (int)metric); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "try_move: illegal CB metric being adjusted: %d\n", + (int)metric); break; } new_cost = fabs(target_metric - new_metric); @@ -843,7 +979,16 @@ static double try_move(const e_metric metric, const int nodes_per_chan, const fl /* this annealer is used to adjust a desired wire or pin metric while keeping the other type of metric * relatively constant */ -static bool annealer(const e_metric metric, const int nodes_per_chan, const t_physical_tile_type_ptr block_type, const e_pin_type pin_type, const int Fc, const int num_pin_type_pins, const float target_metric, const float target_metric_tolerance, int***** pin_to_track_connections, Conn_Block_Metrics* cb_metrics) { +static bool annealer(const e_metric metric, + const int nodes_per_chan, + const t_physical_tile_type_ptr block_type, + const e_pin_type pin_type, + const int Fc, + const int num_pin_type_pins, + const float target_metric, + const float target_metric_tolerance, + int***** pin_to_track_connections, + Conn_Block_Metrics* cb_metrics) { bool success = false; double temp = INITIAL_TEMP; @@ -890,7 +1035,8 @@ static bool annealer(const e_metric metric, const int nodes_per_chan, const t_ph for (int i_inner = 0; i_inner < MAX_INNER_ITERATIONS; i_inner++) { double new_cost = 0; new_cost = try_move(metric, nodes_per_chan, initial_orthogonal_metric, orthogonal_metric_tolerance, - block_type, pin_type, Fc, num_pin_type_pins, cost, temp, target_metric, pin_to_track_connections, cb_metrics); + block_type, pin_type, Fc, num_pin_type_pins, cost, temp, target_metric, + pin_to_track_connections, cb_metrics); /* update the cost after trying the move */ if (new_cost != cost) { @@ -965,7 +1111,8 @@ static void print_switch_histogram(const int nodes_per_chan, const Conn_Block_Me for (int iside = 0; iside < 2; iside++) { for (int itrack = 0; itrack < nodes_per_chan; itrack++) { - int num_switches = (int)track_to_pins->at(iside).at(itrack).size() + (int)track_to_pins->at(iside + 2).at(itrack).size(); + int num_switches + = (int)track_to_pins->at(iside).at(itrack).size() + (int)track_to_pins->at(iside + 2).at(itrack).size(); if (map_has_key(num_switches, &switch_histogram)) { switch_histogram.at(num_switches)++; } else { @@ -986,10 +1133,18 @@ static void print_switch_histogram(const int nodes_per_chan, const Conn_Block_Me /* constructs a crossbar matrix from the connection block 'conn_block'. rows correspond to the pins, * columns correspond to the wires. entry (i,j) is set to 1 if that pin and track are connected. the * only pins accounted for here are the pins that actually have switches on the conn block side in question */ -static void get_xbar_matrix(const int***** conn_block, const t_physical_tile_type_ptr block_type, e_pin_type pin_type, const int side, const bool both_sides, const int nodes_per_chan, const int Fc, t_xbar_matrix* xbar_matrix) { +static void get_xbar_matrix(const int***** conn_block, + const t_physical_tile_type_ptr block_type, + e_pin_type pin_type, + const int side, + const bool both_sides, + const int nodes_per_chan, + const int Fc, + t_xbar_matrix* xbar_matrix) { xbar_matrix->clear(); if (both_sides && side >= 2) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "If analyzing both sides of a conn block, the initial side should have index < 2"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "If analyzing both sides of a conn block, the initial side should have index < 2"); } int num_pins = block_type->num_pins; @@ -1079,12 +1234,17 @@ static long double binomial_coefficient(const int n, const int k) { return result; } -static long double count_switch_configurations(const int level, const int signals_left, const int capacity_left, std::vector* config, std::map* count_map) { +static long double count_switch_configurations(const int level, + const int signals_left, + const int capacity_left, + std::vector* config, + std::map* count_map) { long double result = 0; if (capacity_left < signals_left) { printf("capacity left %d signals left %d level %d\n", capacity_left, signals_left, level); - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "the number of signals remaining should not be greater than the remaining capacity"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "the number of signals remaining should not be greater than the remaining capacity"); } /* get the capacity of the current wire group (here, group is defined by the number of switches a wire carries) */ @@ -1118,8 +1278,9 @@ static long double count_switch_configurations(const int level, const int signal int num_switches_per_wire = it->first; int num_wires_in_group = it->second.num_wires; int num_wires_used_in_group = config->at(i); - num_configs *= binomial_coefficient(num_wires_in_group, num_wires_used_in_group) - * (long double)pow((long double)num_switches_per_wire, (long double)num_wires_used_in_group); + num_configs + *= binomial_coefficient(num_wires_in_group, num_wires_used_in_group) + * (long double)pow((long double)num_switches_per_wire, (long double)num_wires_used_in_group); } /* add this info for the final wire group */ @@ -1135,7 +1296,8 @@ static long double count_switch_configurations(const int level, const int signal } else { /* recurse to the next wire group */ long double num_configs; - num_configs = count_switch_configurations(level + 1, signals_left - isigs, downstream_capacity, config, count_map); + num_configs + = count_switch_configurations(level + 1, signals_left - isigs, downstream_capacity, config, count_map); /* add this info for the current wire group */ it = count_map->begin(); advance(it, level); @@ -1239,7 +1401,8 @@ static void normalize_xbar(const float fraction_wires_used, t_xbar_matrix* xbar) continue; } - float fraction_available = count_map.at(num_switches).expectation_available / count_map.at(num_switches).num_wires; + float fraction_available + = count_map.at(num_switches).expectation_available / count_map.at(num_switches).num_wires; for (int ipin = 0; ipin < rows; ipin++) { if (1 == xbar->at(ipin).at(iwire)) { @@ -1316,13 +1479,19 @@ static t_xbar_matrix combine_two_xbars(const t_xbar_matrix* xbar1, const t_xbar_ return xbar_out; } -void analyze_conn_blocks(const int***** opin_cb, const int***** ipin_cb, const t_physical_tile_type_ptr block_type, const int* Fc_array_out, const int* Fc_array_in, const t_chan_width* chan_width_inf) { +void analyze_conn_blocks(const int***** opin_cb, + const int***** ipin_cb, + const t_physical_tile_type_ptr block_type, + const int* Fc_array_out, + const int* Fc_array_in, + const t_chan_width* chan_width_inf) { if (0 != strcmp(block_type->name, "clb")) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "This code currently works for CLB blocks only"); } if (chan_width_inf->x_min != chan_width_inf->x_max || chan_width_inf->y_min != chan_width_inf->y_max || chan_width_inf->x_max != chan_width_inf->y_max) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "This code currently assumes that channel width is uniform throughout the fpga"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "This code currently assumes that channel width is uniform throughout the fpga"); } int nodes_per_chan = chan_width_inf->x_min; @@ -1366,16 +1535,23 @@ void analyze_conn_blocks(const int***** opin_cb, const int***** ipin_cb, const t } /* make a poor cb pattern. */ -void make_poor_cb_pattern(const e_pin_type pin_type, const t_physical_tile_type_ptr block_type, const int* Fc_array, const t_chan_width* chan_width_inf, int***** cb) { +void make_poor_cb_pattern(const e_pin_type pin_type, + const t_physical_tile_type_ptr block_type, + const int* Fc_array, + const t_chan_width* chan_width_inf, + int***** cb) { if (block_type->num_pins == 0) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Trying to adjust CB metrics for a block with no pins!\n"); } if (block_type->height > 1 || block_type->width > 1) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Adjusting connection block metrics is currently intended for CLBs, which have height and width = 1\n"); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "Adjusting connection block metrics is currently intended for CLBs, which have height and width = 1\n"); } if (chan_width_inf->x_min != chan_width_inf->x_max || chan_width_inf->y_min != chan_width_inf->y_max || chan_width_inf->x_max != chan_width_inf->y_max) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "This code currently assumes that channel width is uniform throughout the fpga"); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "This code currently assumes that channel width is uniform throughout the fpga"); } int nodes_per_chan = chan_width_inf->x_min; diff --git a/vpr/src/route/cb_metrics.h b/vpr/src/route/cb_metrics.h index 4d19f84c772..7e8bf4d0e61 100644 --- a/vpr/src/route/cb_metrics.h +++ b/vpr/src/route/cb_metrics.h @@ -40,13 +40,17 @@ class Conn_Block_Metrics { float hamming_proximity; float lemieux_cost_func; - int num_wire_types; /* the number of different wire types, used for computing pin diversity */ - t_2d_int_vec pin_locations; /* [0..3][0..num_on_this_side-1]. Keeps track of which pins come out on which side of the block */ + int num_wire_types; /* the number of different wire types, used for computing pin diversity */ + t_2d_int_vec + pin_locations; /* [0..3][0..num_on_this_side-1]. Keeps track of which pins come out on which side of the block */ /* these vectors simplify the calculation of the various metrics */ - t_vec_vec_set track_to_pins; /* [0..3][0..W-1][0..pins_connected-1]. A convenient lookup for which pins connect to a given track */ - t_vec_vec_set pin_to_tracks; /* [0..3][0..num_pins_on_side-1][0..tracks_connected-1]. A lookup for which tracks connect to a given pin */ - t_3d_int_vec wire_types_used_count; /* [0..3][0..num_pins_on_side-1][0..num_wire_types-1]. Keeps track of how many times each pin connects to each of the wire types */ + t_vec_vec_set + track_to_pins; /* [0..3][0..W-1][0..pins_connected-1]. A convenient lookup for which pins connect to a given track */ + t_vec_vec_set + pin_to_tracks; /* [0..3][0..num_pins_on_side-1][0..tracks_connected-1]. A lookup for which tracks connect to a given pin */ + t_3d_int_vec + wire_types_used_count; /* [0..3][0..num_pins_on_side-1][0..num_wire_types-1]. Keeps track of how many times each pin connects to each of the wire types */ void clear() { pin_diversity = wire_homogeneity = hamming_proximity = lemieux_cost_func = 0; @@ -68,10 +72,26 @@ class Conn_Block_Metrics { int get_num_wire_types(const int num_segments, const t_segment_inf* segment_inf); /* calculates all the connection block metrics and returns them through the cb_metrics variable */ -void get_conn_block_metrics(const t_physical_tile_type_ptr block_type, int***** tracks_connected_to_pin, const int num_segments, const t_segment_inf* segment_inf, const e_pin_type pin_type, const int* Fc_array, const t_chan_width* chan_width_inf, Conn_Block_Metrics* cb_metrics); +void get_conn_block_metrics(const t_physical_tile_type_ptr block_type, + int***** tracks_connected_to_pin, + const int num_segments, + const t_segment_inf* segment_inf, + const e_pin_type pin_type, + const int* Fc_array, + const t_chan_width* chan_width_inf, + Conn_Block_Metrics* cb_metrics); /* adjusts the connection block until the appropriate wire metric has hit it's target value. the pin metric is kept constant * within some tolerance */ -void adjust_cb_metric(const e_metric metric, const float target, const float target_tolerance, const t_physical_tile_type_ptr block_type, int***** pin_to_track_connections, const e_pin_type pin_type, const int* Fc_array, const t_chan_width* chan_width_inf, const int num_segments, const t_segment_inf* segment_inf); +void adjust_cb_metric(const e_metric metric, + const float target, + const float target_tolerance, + const t_physical_tile_type_ptr block_type, + int***** pin_to_track_connections, + const e_pin_type pin_type, + const int* Fc_array, + const t_chan_width* chan_width_inf, + const int num_segments, + const t_segment_inf* segment_inf); /**** EXPERIMENTAL ****/ #include @@ -93,10 +113,19 @@ class Wire_Counting { typedef std::vector > t_xbar_matrix; /* perform a probabilistic analysis on the compound crossbar formed by the input and output connection blocks */ -void analyze_conn_blocks(const int***** opin_cb, const int***** ipin_cb, const t_physical_tile_type_ptr block_type, const int* Fc_array_out, const int* Fc_array_in, const t_chan_width* chan_width_inf); +void analyze_conn_blocks(const int***** opin_cb, + const int***** ipin_cb, + const t_physical_tile_type_ptr block_type, + const int* Fc_array_out, + const int* Fc_array_in, + const t_chan_width* chan_width_inf); /* make a poor cb pattern. */ -void make_poor_cb_pattern(const e_pin_type pin_type, const t_physical_tile_type_ptr block_type, const int* Fc_array, const t_chan_width* chan_width_inf, int***** cb); +void make_poor_cb_pattern(const e_pin_type pin_type, + const t_physical_tile_type_ptr block_type, + const int* Fc_array, + const t_chan_width* chan_width_inf, + int***** cb); /**** END EXPERIMENTAL ****/ diff --git a/vpr/src/route/channel_stats.cpp b/vpr/src/route/channel_stats.cpp index 065a6e5b7a0..dbe6d1fecc1 100644 --- a/vpr/src/route/channel_stats.cpp +++ b/vpr/src/route/channel_stats.cpp @@ -26,9 +26,7 @@ void print_channel_stats(bool is_flat) { auto chanx_avail = calculate_routing_avail(CHANX); auto chany_avail = calculate_routing_avail(CHANY); - auto comp = [](const HistogramBucket& bucket, float value) { - return bucket.max_value < value; - }; + auto comp = [](const HistogramBucket& bucket, float value) { return bucket.max_value < value; }; float max_util = 0.; size_t peak_x = 0.; diff --git a/vpr/src/route/check_route.cpp b/vpr/src/route/check_route.cpp index fd239d39b52..81bc3a21e60 100644 --- a/vpr/src/route/check_route.cpp +++ b/vpr/src/route/check_route.cpp @@ -18,13 +18,8 @@ #include "route_tree.h" /******************** Subroutines local to this module **********************/ -static void check_node_and_range(RRNodeId inode, - enum e_route_type route_type, - bool is_flat); -static void check_source(const Netlist<>& net_list, - RRNodeId inode, - ParentNetId net_id, - bool is_flat); +static void check_node_and_range(RRNodeId inode, enum e_route_type route_type, bool is_flat); +static void check_source(const Netlist<>& net_list, RRNodeId inode, ParentNetId net_id, bool is_flat); static void check_sink(const Netlist<>& net_list, RRNodeId inode, int net_pin_index, @@ -44,9 +39,7 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, ParentNetId net, const t_non_configurable_rr_sets& non_configurable_rr_sets, bool is_flat); -static void check_net_for_stubs(const Netlist<>& net_list, - ParentNetId net, - bool is_flat); +static void check_net_for_stubs(const Netlist<>& net_list, ParentNetId net, bool is_flat); /************************ Subroutine definitions ****************************/ @@ -85,14 +78,11 @@ void check_route(const Netlist<>& net_list, recompute_occupancy_from_scratch(net_list, is_flat); valid = feasible_routing(); if (valid == false) { - VPR_ERROR(VPR_ERROR_ROUTE, - "Error in check_route -- routing resources are overused.\n"); + VPR_ERROR(VPR_ERROR_ROUTE, "Error in check_route -- routing resources are overused.\n"); } if (!is_flat) { - check_locally_used_clb_opins(route_ctx.clb_opins_used_locally, - route_type, - is_flat); + check_locally_used_clb_opins(route_ctx.clb_opins_used_locally, route_type, is_flat); } max_pins = 0; @@ -109,8 +99,7 @@ void check_route(const Netlist<>& net_list, std::fill_n(pin_done.get(), net_list.net_pins(net_id).size(), false); if (!route_ctx.route_trees[net_id]) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_route: net %d has no routing.\n", size_t(net_id)); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_route: net %d has no routing.\n", size_t(net_id)); } /* Check the SOURCE of the net. */ @@ -136,8 +125,11 @@ void check_route(const Netlist<>& net_list, " %s\n" " %s\n", size_t(net_id), - describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, rt_node.parent()->inode, is_flat).c_str(), - describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat).c_str()); + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, + rt_node.parent()->inode, is_flat) + .c_str(), + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat) + .c_str()); } } @@ -148,16 +140,15 @@ void check_route(const Netlist<>& net_list, } if (num_sinks != net_list.net_sinks(net_id).size()) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_route: net %zu (%s) has %zu SINKs (expected %zu).\n", - size_t(net_id), net_list.net_name(net_id).c_str(), - num_sinks, net_list.net_sinks(net_id).size()); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_route: net %zu (%s) has %zu SINKs (expected %zu).\n", + size_t(net_id), net_list.net_name(net_id).c_str(), num_sinks, + net_list.net_sinks(net_id).size()); } for (ipin = 0; ipin < net_list.net_pins(net_id).size(); ipin++) { if (pin_done[ipin] == false) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_route: net %zu does not connect to pin %d.\n", size_t(net_id), ipin); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_route: net %zu does not connect to pin %d.\n", + size_t(net_id), ipin); } } @@ -187,11 +178,12 @@ static void check_sink(const Netlist<>& net_list, VTR_ASSERT(rr_graph.node_type(inode) == SINK); if (net_pin_index == OPEN) { /* If there is no legal net pin index associated with this sink node */ - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_sink: node %d does not connect to any terminal of net %s #%lu.\n" - "This error is usually caused by incorrectly specified logical equivalence in your architecture file.\n" - "You should try to respecify what pins are equivalent or turn logical equivalence off.\n", - inode, net_list.net_name(net_id).c_str(), size_t(net_id)); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "in check_sink: node %d does not connect to any terminal of net %s #%lu.\n" + "This error is usually caused by incorrectly specified logical equivalence in your architecture file.\n" + "You should try to respecify what pins are equivalent or turn logical equivalence off.\n", + inode, net_list.net_name(net_id).c_str(), size_t(net_id)); } VTR_ASSERT(!pin_done[net_pin_index]); /* Should not have found a routed cnnection to it before */ @@ -199,17 +191,14 @@ static void check_sink(const Netlist<>& net_list, } /* Checks that the node passed in is a valid source for this net. */ -static void check_source(const Netlist<>& net_list, - RRNodeId inode, - ParentNetId net_id, - bool is_flat) { +static void check_source(const Netlist<>& net_list, RRNodeId inode, ParentNetId net_id, bool is_flat) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; t_rr_type rr_type = rr_graph.node_type(inode); if (rr_type != SOURCE) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_source: net %d begins with a node of type %d.\n", size_t(net_id), rr_type); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_source: net %d begins with a node of type %d.\n", size_t(net_id), + rr_type); } int i = rr_graph.node_xlow(inode); @@ -222,16 +211,14 @@ static void check_source(const Netlist<>& net_list, t_block_loc blk_loc; blk_loc = get_block_loc(blk_id, is_flat); if (blk_loc.loc.x != i || blk_loc.loc.y != j) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_source: net SOURCE is in wrong location (%d,%d).\n", i, j); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_source: net SOURCE is in wrong location (%d,%d).\n", i, j); } //Get the driver pin's index in the block int iclass = get_block_pin_class_num(blk_id, net_list.net_pin(net_id, 0), is_flat); if (ptc_num != iclass) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_source: net SOURCE is of wrong class (%d).\n", ptc_num); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_source: net SOURCE is of wrong class (%d).\n", ptc_num); } } @@ -319,10 +306,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { VTR_ASSERT(to_type == OPIN); //The OPIN should be contained within the bounding box of it's connected source - if (from_xlow <= to_xlow - && from_ylow <= to_ylow - && from_xhigh >= to_xhigh - && from_yhigh >= to_yhigh) { + if (from_xlow <= to_xlow && from_ylow <= to_ylow && from_xhigh >= to_xhigh && from_yhigh >= to_yhigh) { from_grid_type = device_ctx.grid.get_physical_type({from_xlow, from_ylow, from_layer}); to_grid_type = device_ctx.grid.get_physical_type({to_xlow, to_ylow, to_layer}); VTR_ASSERT(from_grid_type == to_grid_type); @@ -361,10 +345,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { //An IPIN should be contained within the bounding box of its connected sink's tile if (to_type == SINK) { - if (from_xlow >= to_xlow - && from_ylow >= to_ylow - && from_xhigh <= to_xhigh - && from_yhigh <= to_yhigh) { + if (from_xlow >= to_xlow && from_ylow >= to_ylow && from_xhigh <= to_xhigh && from_yhigh <= to_yhigh) { from_grid_type = device_ctx.grid.get_physical_type({from_xlow, from_ylow, from_layer}); to_grid_type = device_ctx.grid.get_physical_type({to_xlow, to_ylow, to_layer}); VTR_ASSERT(from_grid_type == to_grid_type); @@ -415,8 +396,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } else if (to_type == CHANY) { num_adj += chanx_chany_adjacent(from_node, to_node); } else { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_adjacent: %d and %d are not adjacent", from_node, to_node); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_adjacent: %d and %d are not adjacent", from_node, to_node); } break; @@ -447,8 +427,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { } else if (to_type == CHANX) { num_adj += chanx_chany_adjacent(to_node, from_node); } else { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_adjacent: %d and %d are not adjacent", from_node, to_node); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_adjacent: %d and %d are not adjacent", from_node, to_node); } break; @@ -461,8 +440,7 @@ static bool check_adjacent(RRNodeId from_node, RRNodeId to_node, bool is_flat) { else if (num_adj == 0) return (false); - VPR_ERROR(VPR_ERROR_ROUTE, - "in check_adjacent: num_adj = %d. Expected 0 or 1.\n", num_adj); + VPR_ERROR(VPR_ERROR_ROUTE, "in check_adjacent: num_adj = %d. Expected 0 or 1.\n", num_adj); return false; //Should not reach here once thrown } @@ -559,7 +537,8 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_locally_used_opins: block #%lu (%s)\n" "\tClass %d local OPIN is wrong rr_type -- rr_node #%d of type %d.\n", - size_t(blk_id), cluster_ctx.clb_nlist.block_name(blk_id).c_str(), iclass, inode, rr_type); + size_t(blk_id), cluster_ctx.clb_nlist.block_name(blk_id).c_str(), iclass, inode, + rr_type); } ipin = rr_graph.node_pin_num(RRNodeId(inode)); @@ -567,32 +546,26 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_locally_used_opins: block #%lu (%s):\n" "\tExpected class %d local OPIN has class %d -- rr_node #: %d.\n", - size_t(blk_id), cluster_ctx.clb_nlist.block_name(blk_id).c_str(), iclass, get_class_num_from_pin_physical_num(physical_tile_type(block_loc), ipin), inode); + size_t(blk_id), cluster_ctx.clb_nlist.block_name(blk_id).c_str(), iclass, + get_class_num_from_pin_physical_num(physical_tile_type(block_loc), ipin), inode); } } } } } -static void check_node_and_range(RRNodeId inode, - enum e_route_type route_type, - bool is_flat) { +static void check_node_and_range(RRNodeId inode, enum e_route_type route_type, bool is_flat) { /* Checks that inode is within the legal range, then calls check_node to * * check that everything else about the node is OK. */ auto& device_ctx = g_vpr_ctx.device(); if (size_t(inode) >= device_ctx.rr_graph.num_nodes()) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "in check_node_and_range: rr_node #%zu is out of legal range (0 to %d).\n", size_t(inode), device_ctx.rr_graph.num_nodes() - 1); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_node_and_range: rr_node #%zu is out of legal range (0 to %d).\n", + size_t(inode), device_ctx.rr_graph.num_nodes() - 1); } - check_rr_node(device_ctx.rr_graph, - device_ctx.rr_indexed_data, - device_ctx.grid, - device_ctx.chan_width, - route_type, - size_t(inode), - is_flat); + check_rr_node(device_ctx.rr_graph, device_ctx.rr_indexed_data, device_ctx.grid, device_ctx.chan_width, route_type, + size_t(inode), is_flat); } //Checks that all non-configurable edges are in a legal configuration @@ -602,10 +575,7 @@ static void check_all_non_configurable_edges(const Netlist<>& net_list, bool is_ auto non_configurable_rr_sets = identify_non_configurable_rr_sets(); for (auto net_id : net_list.nets()) { - check_non_configurable_edges(net_list, - net_id, - non_configurable_rr_sets, - is_flat); + check_non_configurable_edges(net_list, net_id, non_configurable_rr_sets, is_flat); } } @@ -649,8 +619,7 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, for (const auto& rr_nodes : non_configurable_rr_sets.node_sets) { //Compute the intersection of the routing and current non-configurable nodes set std::vector intersection; - std::set_intersection(routing_nodes.begin(), routing_nodes.end(), - rr_nodes.begin(), rr_nodes.end(), + std::set_intersection(routing_nodes.begin(), routing_nodes.end(), rr_nodes.begin(), rr_nodes.end(), std::back_inserter(intersection)); //If the intersection is non-empty then the current routing uses @@ -664,8 +633,7 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, //for detailed error reporting -- the nodes //which are in rr_nodes but not in routing_nodes. std::vector difference; - std::set_difference(rr_nodes.begin(), rr_nodes.end(), - routing_nodes.begin(), routing_nodes.end(), + std::set_difference(rr_nodes.begin(), rr_nodes.end(), routing_nodes.begin(), routing_nodes.end(), std::back_inserter(difference)); VTR_ASSERT(difference.size() > 0); @@ -675,7 +643,10 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, net_list.net_name(net).c_str(), size_t(net)); for (auto inode : difference) { - msg += vtr::string_fmt(" Missing %s\n", describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat).c_str()); + msg += vtr::string_fmt(" Missing %s\n", + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, + device_ctx.rr_indexed_data, inode, is_flat) + .c_str()); } VPR_FATAL_ERROR(VPR_ERROR_ROUTE, msg.c_str()); @@ -688,8 +659,7 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, for (const auto& rr_edges : non_configurable_rr_sets.edge_sets) { //Compute the intersection of the routing and current non-configurable edge set std::vector intersection; - std::set_intersection(routing_edges.begin(), routing_edges.end(), - rr_edges.begin(), rr_edges.end(), + std::set_intersection(routing_edges.begin(), routing_edges.end(), rr_edges.begin(), rr_edges.end(), std::back_inserter(intersection)); //If the intersection is non-empty then the current routing uses @@ -707,8 +677,7 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, //the difference from rr_edges to routing_edges -- the nodes //which are in rr_edges but not in routing_edges. std::vector difference; - std::set_difference(rr_edges.begin(), rr_edges.end(), - routing_edges.begin(), routing_edges.end(), + std::set_difference(rr_edges.begin(), rr_edges.end(), routing_edges.begin(), routing_edges.end(), std::back_inserter(difference)); //Next we remove edges in the difference if there is a reverse @@ -716,10 +685,10 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, //It is OK if there is an unused reverse/forward edge provided the //forward/reverse edge is used. std::vector dedupped_difference; - std::copy_if(difference.begin(), difference.end(), - std::back_inserter(dedupped_difference), + std::copy_if(difference.begin(), difference.end(), std::back_inserter(dedupped_difference), [&](t_node_edge forward_edge) { - VTR_ASSERT_MSG(!routing_edges.count(forward_edge), "Difference should not contain used routing edges"); + VTR_ASSERT_MSG(!routing_edges.count(forward_edge), + "Difference should not contain used routing edges"); t_node_edge reverse_edge = {forward_edge.to_node, forward_edge.from_node}; @@ -737,24 +706,23 @@ static bool check_non_configurable_edges(const Netlist<>& net_list, //At this point only valid missing node pairs are in the set if (!dedupped_difference.empty()) { - std::string msg = vtr::string_fmt("Illegal routing for net '%s' (#%zu) some required non-configurable edges are missing:\n", - net_list.net_name(net).c_str(), size_t(net)); + std::string msg = vtr::string_fmt( + "Illegal routing for net '%s' (#%zu) some required non-configurable edges are missing:\n", + net_list.net_name(net).c_str(), size_t(net)); for (t_node_edge missing_edge : dedupped_difference) { - msg += vtr::string_fmt(" Expected RR Node: %d and RR Node: %d to be non-configurably connected, but edge missing from routing:\n", - missing_edge.from_node, missing_edge.to_node); - msg += vtr::string_fmt(" %s\n", describe_rr_node(device_ctx.rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - RRNodeId(missing_edge.from_node), - is_flat) - .c_str()); - msg += vtr::string_fmt(" %s\n", describe_rr_node(device_ctx.rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - RRNodeId(missing_edge.to_node), - is_flat) - .c_str()); + msg += vtr::string_fmt( + " Expected RR Node: %d and RR Node: %d to be non-configurably connected, but edge missing " + "from routing:\n", + missing_edge.from_node, missing_edge.to_node); + msg += vtr::string_fmt( + " %s\n", describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, + RRNodeId(missing_edge.from_node), is_flat) + .c_str()); + msg += vtr::string_fmt( + " %s\n", describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, + RRNodeId(missing_edge.to_node), is_flat) + .c_str()); } VPR_FATAL_ERROR(VPR_ERROR_ROUTE, msg.c_str()); @@ -778,9 +746,7 @@ class StubFinder { bool CheckNet(ParentNetId net); // Returns set of stub nodes. - const std::set& stub_nodes() { - return stub_nodes_; - } + const std::set& stub_nodes() { return stub_nodes_; } private: bool RecurseTree(const RouteTreeNode& rt_node); @@ -797,9 +763,7 @@ class StubFinder { //The only exception are stubs required by non-configurable switches (e.g. shorts). // //We treat any configurable stubs as an error. -void check_net_for_stubs(const Netlist<>& net_list, - ParentNetId net, - bool is_flat) { +void check_net_for_stubs(const Netlist<>& net_list, ParentNetId net, bool is_flat) { StubFinder stub_finder; bool any_stubs = stub_finder.CheckNet(net); @@ -808,11 +772,8 @@ void check_net_for_stubs(const Netlist<>& net_list, std::string msg = vtr::string_fmt("Route tree for net '%s' (#%zu) contains stub branches rooted at:\n", net_list.net_name(net).c_str(), size_t(net)); for (int inode : stub_finder.stub_nodes()) { - msg += vtr::string_fmt(" %s\n", describe_rr_node(device_ctx.rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - RRNodeId(inode), - is_flat) + msg += vtr::string_fmt(" %s\n", describe_rr_node(device_ctx.rr_graph, device_ctx.grid, + device_ctx.rr_indexed_data, RRNodeId(inode), is_flat) .c_str()); } diff --git a/vpr/src/route/clock_connection_builders.cpp b/vpr/src/route/clock_connection_builders.cpp index d7b0f831e44..98bce427829 100644 --- a/vpr/src/route/clock_connection_builders.cpp +++ b/vpr/src/route/clock_connection_builders.cpp @@ -29,13 +29,9 @@ void RoutingToClockConnection::set_switch_location(int x, int y, int layer /* =0 switch_location.layer = layer; } -void RoutingToClockConnection::set_switch(int arch_switch_index) { - arch_switch_idx = arch_switch_index; -} +void RoutingToClockConnection::set_switch(int arch_switch_index) { arch_switch_idx = arch_switch_index; } -void RoutingToClockConnection::set_fc_val(float fc_val) { - fc = fc_val; -} +void RoutingToClockConnection::set_fc_val(float fc_val) { fc = fc_val; } /* * RoutingToClockConnection (member functions) @@ -46,7 +42,8 @@ size_t RoutingToClockConnection::estimate_additional_nodes() { return 1; } -void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) { +void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_graph, + t_rr_edge_info_set* rr_edges_to_create) { // Initialize random seed // Must be done during every call in order for restored rr_graphs after a binary // search to be consistent @@ -57,14 +54,17 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_ auto& rr_graph_builder = device_ctx.rr_graph_builder; const auto& node_lookup = device_ctx.rr_graph.node_lookup(); - RRNodeId virtual_clock_network_root_idx = create_virtual_clock_network_sink_node(switch_location.layer, switch_location.x, switch_location.y); + RRNodeId virtual_clock_network_root_idx + = create_virtual_clock_network_sink_node(switch_location.layer, switch_location.x, switch_location.y); rr_graph_builder.set_virtual_clock_network_root_idx(virtual_clock_network_root_idx); // rr_node indices for x and y channel routing wires and clock wires to connect to - auto x_wire_indices = node_lookup.find_channel_nodes(switch_location.layer, switch_location.x, switch_location.y, CHANX); - auto y_wire_indices = node_lookup.find_channel_nodes(switch_location.layer, switch_location.x, switch_location.y, CHANY); - auto clock_indices = clock_graph.get_rr_node_indices_at_switch_location( - clock_to_connect_to, switch_point_name, switch_location.x, switch_location.y); + auto x_wire_indices + = node_lookup.find_channel_nodes(switch_location.layer, switch_location.x, switch_location.y, CHANX); + auto y_wire_indices + = node_lookup.find_channel_nodes(switch_location.layer, switch_location.x, switch_location.y, CHANY); + auto clock_indices = clock_graph.get_rr_node_indices_at_switch_location(clock_to_connect_to, switch_point_name, + switch_location.x, switch_location.y); for (auto clock_index : clock_indices) { // Select wires to connect to at random @@ -85,7 +85,8 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_ // Connect to virtual clock sink node // used by the two stage router - clock_graph.add_edge(rr_edges_to_create, RRNodeId(clock_index), virtual_clock_network_root_idx, arch_switch_idx, false); + clock_graph.add_edge(rr_edges_to_create, RRNodeId(clock_index), virtual_clock_network_root_idx, arch_switch_idx, + false); } } @@ -124,7 +125,8 @@ RRNodeId RoutingToClockConnection::create_virtual_clock_network_sink_node(int la // However, since the SINK node has the same xhigh/xlow as well as yhigh/ylow, we can probably use a shortcut for (int ix = rr_graph.node_xlow(node_index); ix <= rr_graph.node_xhigh(node_index); ++ix) { for (int iy = rr_graph.node_ylow(node_index); iy <= rr_graph.node_yhigh(node_index); ++iy) { - node_lookup.add_node(node_index, layer, ix, iy, rr_graph.node_type(node_index), rr_graph.node_class_num(node_index)); + node_lookup.add_node(node_index, layer, ix, iy, rr_graph.node_type(node_index), + rr_graph.node_class_num(node_index)); } } @@ -135,39 +137,30 @@ RRNodeId RoutingToClockConnection::create_virtual_clock_network_sink_node(int la * ClockToClockConneciton (setters) */ -void ClockToClockConneciton::set_from_clock_name(std::string clock_name) { - from_clock = clock_name; -} +void ClockToClockConneciton::set_from_clock_name(std::string clock_name) { from_clock = clock_name; } void ClockToClockConneciton::set_from_clock_switch_point_name(std::string switch_point_name) { from_switch = switch_point_name; } -void ClockToClockConneciton::set_to_clock_name(std::string clock_name) { - to_clock = clock_name; -} +void ClockToClockConneciton::set_to_clock_name(std::string clock_name) { to_clock = clock_name; } void ClockToClockConneciton::set_to_clock_switch_point_name(std::string switch_point_name) { to_switch = switch_point_name; } -void ClockToClockConneciton::set_switch(int arch_switch_index) { - arch_switch_idx = arch_switch_index; -} +void ClockToClockConneciton::set_switch(int arch_switch_index) { arch_switch_idx = arch_switch_index; } -void ClockToClockConneciton::set_fc_val(float fc_val) { - fc = fc_val; -} +void ClockToClockConneciton::set_fc_val(float fc_val) { fc = fc_val; } /* * ClockToClockConneciton (member functions) */ -size_t ClockToClockConneciton::estimate_additional_nodes() { - return 0; -} +size_t ClockToClockConneciton::estimate_additional_nodes() { return 0; } -void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) { +void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_graph, + t_rr_edge_info_set* rr_edges_to_create) { auto& grid = clock_graph.grid(); auto to_locations = clock_graph.get_switch_locations(to_clock, to_switch); @@ -176,11 +169,7 @@ void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_gr auto x = location.first; auto y = location.second; - auto to_rr_node_indices = clock_graph.get_rr_node_indices_at_switch_location( - to_clock, - to_switch, - x, - y); + auto to_rr_node_indices = clock_graph.get_rr_node_indices_at_switch_location(to_clock, to_switch, x, y); // boundary conditions: // y at gird height and height -1 connections share the same drive point @@ -192,11 +181,7 @@ void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_gr y = 1; } - auto from_rr_node_indices = clock_graph.get_rr_node_indices_at_switch_location( - from_clock, - from_switch, - x, - y); + auto from_rr_node_indices = clock_graph.get_rr_node_indices_at_switch_location(from_clock, from_switch, x, y); auto from_itter = from_rr_node_indices.begin(); size_t num_connections = ceil(from_rr_node_indices.size() * fc); @@ -210,7 +195,8 @@ void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_gr if (from_itter == from_rr_node_indices.end()) { from_itter = from_rr_node_indices.begin(); } - clock_graph.add_edge(rr_edges_to_create, RRNodeId(*from_itter), RRNodeId(to_index), arch_switch_idx, false); + clock_graph.add_edge(rr_edges_to_create, RRNodeId(*from_itter), RRNodeId(to_index), arch_switch_idx, + false); from_itter++; } } @@ -225,28 +211,22 @@ void ClockToPinsConnection::set_clock_name_to_connect_from(std::string clock_nam clock_to_connect_from = clock_name; } -void ClockToPinsConnection::set_clock_switch_point_name( - std::string connection_switch_point_name) { +void ClockToPinsConnection::set_clock_switch_point_name(std::string connection_switch_point_name) { switch_point_name = connection_switch_point_name; } -void ClockToPinsConnection::set_switch(int arch_switch_index) { - arch_switch_idx = arch_switch_index; -} +void ClockToPinsConnection::set_switch(int arch_switch_index) { arch_switch_idx = arch_switch_index; } -void ClockToPinsConnection::set_fc_val(float fc_val) { - fc = fc_val; -} +void ClockToPinsConnection::set_fc_val(float fc_val) { fc = fc_val; } /* * ClockToPinsConnection (member functions) */ -size_t ClockToPinsConnection::estimate_additional_nodes() { - return 0; -} +size_t ClockToPinsConnection::estimate_additional_nodes() { return 0; } -void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) { +void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_graph, + t_rr_edge_info_set* rr_edges_to_create) { auto& device_ctx = g_vpr_ctx.device(); const auto& node_lookup = device_ctx.rr_graph.node_lookup(); auto& grid = clock_graph.grid(); @@ -285,7 +265,8 @@ void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_gra for (e_side side : TOTAL_2D_SIDES) { //Don't connect pins which are not adjacent to channels around the perimeter - if ((x == 0 && side != RIGHT) || (x == (int)grid.width() - 1 && side != LEFT) || (y == 0 && side != TOP) || (y == (int)grid.height() - 1 && side != BOTTOM)) { + if ((x == 0 && side != RIGHT) || (x == (int)grid.width() - 1 && side != LEFT) || (y == 0 && side != TOP) + || (y == (int)grid.height() - 1 && side != BOTTOM)) { continue; } @@ -310,22 +291,15 @@ void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_gra clock_y_offset = -1; // pick the chanx below the block } - auto clock_pin_node_idx = node_lookup.find_node(layer_num, - x, - y, - IPIN, - clock_pin_idx, - side); + auto clock_pin_node_idx = node_lookup.find_node(layer_num, x, y, IPIN, clock_pin_idx, side); auto clock_network_indices = clock_graph.get_rr_node_indices_at_switch_location( - clock_to_connect_from, - switch_point_name, - x + clock_x_offset, - y + clock_y_offset); + clock_to_connect_from, switch_point_name, x + clock_x_offset, y + clock_y_offset); //Create edges depending on Fc for (size_t i = 0; i < clock_network_indices.size() * fc; i++) { - clock_graph.add_edge(rr_edges_to_create, RRNodeId(clock_network_indices[i]), RRNodeId(clock_pin_node_idx), arch_switch_idx, false); + clock_graph.add_edge(rr_edges_to_create, RRNodeId(clock_network_indices[i]), + RRNodeId(clock_pin_node_idx), arch_switch_idx, false); } } } diff --git a/vpr/src/route/clock_connection_builders.h b/vpr/src/route/clock_connection_builders.h index 7ab1c7c5be7..4372d4cc76b 100644 --- a/vpr/src/route/clock_connection_builders.h +++ b/vpr/src/route/clock_connection_builders.h @@ -10,12 +10,7 @@ class ClockRRGraphBuilder; -enum class ClockConnectionType { - ROUTING_TO_CLOCK, - CLOCK_TO_CLOCK, - CLOCK_TO_PINS, - ROUTING_TO_PINS -}; +enum class ClockConnectionType { ROUTING_TO_CLOCK, CLOCK_TO_CLOCK, CLOCK_TO_PINS, ROUTING_TO_PINS }; class ClockConnection { public: diff --git a/vpr/src/route/clock_network_builders.cpp b/vpr/src/route/clock_network_builders.cpp index 40e581a02de..060156dc5aa 100644 --- a/vpr/src/route/clock_network_builders.cpp +++ b/vpr/src/route/clock_network_builders.cpp @@ -42,25 +42,17 @@ void populate_segment_values(int seg_index, * ClockNetwork (getters) */ -int ClockNetwork::get_num_inst() const { - return num_inst_; -} +int ClockNetwork::get_num_inst() const { return num_inst_; } -std::string ClockNetwork::get_name() const { - return clock_name_; -} +std::string ClockNetwork::get_name() const { return clock_name_; } /* * ClockNetwork (setters) */ -void ClockNetwork::set_clock_name(std::string clock_name) { - clock_name_ = clock_name; -} +void ClockNetwork::set_clock_name(std::string clock_name) { clock_name_ = clock_name; } -void ClockNetwork::set_num_instance(int num_inst) { - num_inst_ = num_inst; -} +void ClockNetwork::set_num_instance(int num_inst) { num_inst_ = num_inst; } /* * ClockNetwork (Member functions) @@ -72,7 +64,8 @@ void ClockNetwork::create_rr_nodes_for_clock_network_wires(ClockRRGraphBuilder& t_rr_edge_info_set* rr_edges_to_create, int num_segments) { for (int inst_num = 0; inst_num < get_num_inst(); inst_num++) { - create_rr_nodes_and_internal_edges_for_one_instance(clock_graph, rr_nodes, rr_graph_builder, rr_edges_to_create, num_segments); + create_rr_nodes_and_internal_edges_for_one_instance(clock_graph, rr_nodes, rr_graph_builder, rr_edges_to_create, + num_segments); } } @@ -86,9 +79,7 @@ void ClockNetwork::create_rr_nodes_for_clock_network_wires(ClockRRGraphBuilder& * ClockRib (getters) */ -ClockType ClockRib::get_network_type() const { - return ClockType::RIB; -} +ClockType ClockRib::get_network_type() const { return ClockType::RIB; } /* * ClockRib (setters) @@ -99,9 +90,7 @@ void ClockRib::set_metal_layer(float r_metal, float c_metal) { x_chan_wire.layer.c_metal = c_metal; } -void ClockRib::set_metal_layer(MetalLayer metal_layer) { - x_chan_wire.layer = metal_layer; -} +void ClockRib::set_metal_layer(MetalLayer metal_layer) { x_chan_wire.layer = metal_layer; } void ClockRib::set_initial_wire_location(int start_x, int end_x, int y) { if (end_x <= start_x) { @@ -119,34 +108,26 @@ void ClockRib::set_initial_wire_location(int start_x, int end_x, int y) { void ClockRib::set_wire_repeat(int repeat_x, int repeat_y) { if (repeat_x <= 0 || repeat_y <= 0) { // Avoid an infinte loop when creating ribs - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Clock Network wire repeat (%d,%d) must be greater than zero\n", - repeat_x, repeat_y); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Clock Network wire repeat (%d,%d) must be greater than zero\n", repeat_x, + repeat_y); } repeat.x = repeat_x; repeat.y = repeat_y; } -void ClockRib::set_drive_location(int offset_x) { - drive.offset = offset_x; -} +void ClockRib::set_drive_location(int offset_x) { drive.offset = offset_x; } -void ClockRib::set_drive_switch(int switch_idx) { - drive.switch_idx = switch_idx; -} +void ClockRib::set_drive_switch(int switch_idx) { drive.switch_idx = switch_idx; } -void ClockRib::set_drive_name(std::string name) { - drive.name = name; -} +void ClockRib::set_drive_name(std::string name) { drive.name = name; } void ClockRib::set_tap_locations(int offset_x, int increment_x) { tap.offset = offset_x; tap.increment = increment_x; } -void ClockRib::set_tap_name(std::string name) { - tap.name = name; -} +void ClockRib::set_tap_name(std::string name) { tap.name = name; } /* * ClockRib (member functions) @@ -287,43 +268,22 @@ void ClockRib::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphB } // create drive point (length zero wire) - auto drive_node_idx = create_chanx_wire(layer_num, - drive_x, - drive_x, - y, - ptc_num, - Direction::BIDIR, - rr_nodes, + auto drive_node_idx = create_chanx_wire(layer_num, drive_x, drive_x, y, ptc_num, Direction::BIDIR, rr_nodes, rr_graph_builder); clock_graph.add_switch_location(get_name(), drive.name, drive_x, y, drive_node_idx); // create rib wire to the right and left of the drive point - auto left_node_idx = create_chanx_wire(layer_num, - x_start + x_offset, - drive_x - 1, - y, - ptc_num, - Direction::DEC, - rr_nodes, - rr_graph_builder); - auto right_node_idx = create_chanx_wire(layer_num, - drive_x + 1, - x_end, - y, - ptc_num, - Direction::INC, - rr_nodes, + auto left_node_idx = create_chanx_wire(layer_num, x_start + x_offset, drive_x - 1, y, ptc_num, + Direction::DEC, rr_nodes, rr_graph_builder); + auto right_node_idx = create_chanx_wire(layer_num, drive_x + 1, x_end, y, ptc_num, Direction::INC, rr_nodes, rr_graph_builder); - record_tap_locations(x_start + x_offset, - x_end, - y, - left_node_idx, - right_node_idx, - clock_graph); + record_tap_locations(x_start + x_offset, x_end, y, left_node_idx, right_node_idx, clock_graph); // connect drive point to each half rib using a directed switch - clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(left_node_idx), drive.switch_idx, false); - clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(right_node_idx), drive.switch_idx, false); + clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(left_node_idx), + drive.switch_idx, false); + clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(right_node_idx), + drive.switch_idx, false); } } } @@ -345,8 +305,9 @@ int ClockRib::create_chanx_wire(int layer, rr_graph_builder.set_node_layer(chanx_node, layer); rr_graph_builder.set_node_capacity(chanx_node, 1); rr_graph_builder.set_node_track_num(chanx_node, ptc_num); - rr_graph_builder.set_node_rc_index(chanx_node, NodeRCIndex(find_create_rr_rc_data( - x_chan_wire.layer.r_metal, x_chan_wire.layer.c_metal, g_vpr_ctx.mutable_device().rr_rc_data))); + rr_graph_builder.set_node_rc_index( + chanx_node, NodeRCIndex(find_create_rr_rc_data(x_chan_wire.layer.r_metal, x_chan_wire.layer.c_metal, + g_vpr_ctx.mutable_device().rr_rc_data))); rr_graph_builder.set_node_direction(chanx_node, direction); short seg_index = 0; @@ -364,7 +325,8 @@ int ClockRib::create_chanx_wire(int layer, VTR_ASSERT_MSG(false, "Unidentified direction type for clock rib"); break; } - rr_graph_builder.set_node_cost_index(chanx_node, RRIndexedDataId(CHANX_COST_INDEX_START + seg_index)); // Actual value set later + rr_graph_builder.set_node_cost_index(chanx_node, + RRIndexedDataId(CHANX_COST_INDEX_START + seg_index)); // Actual value set later /* Add the node to spatial lookup */ //auto& rr_graph = (*rr_nodes); @@ -373,7 +335,8 @@ int ClockRib::create_chanx_wire(int layer, for (int ix = rr_graph.node_xlow(chanx_node); ix <= rr_graph.node_xhigh(chanx_node); ++ix) { for (int iy = rr_graph.node_ylow(chanx_node); iy <= rr_graph.node_yhigh(chanx_node); ++iy) { //TODO: CHANX uses odd swapped x/y indices here. Will rework once rr_node_indices is shadowed - rr_graph_builder.node_lookup().add_node(chanx_node, layer, iy, ix, rr_graph.node_type(chanx_node), rr_graph.node_track_num(chanx_node)); + rr_graph_builder.node_lookup().add_node(chanx_node, layer, iy, ix, rr_graph.node_type(chanx_node), + rr_graph.node_track_num(chanx_node)); } } @@ -395,7 +358,9 @@ void ClockRib::record_tap_locations(unsigned x_start, } } -static void get_parallel_seg_index(int& unified_seg_index, enum e_parallel_axis axis, const t_unified_to_parallel_seg_index& indices_map) { +static void get_parallel_seg_index(int& unified_seg_index, + enum e_parallel_axis axis, + const t_unified_to_parallel_seg_index& indices_map) { auto itr_pair = indices_map.equal_range(unified_seg_index); for (auto itr = itr_pair.first; itr != itr_pair.second; ++itr) { @@ -427,9 +392,7 @@ void ClockRib::map_relative_seg_indices(const t_unified_to_parallel_seg_index& i * ClockSpine (getters) */ -ClockType ClockSpine::get_network_type() const { - return ClockType::SPINE; -} +ClockType ClockSpine::get_network_type() const { return ClockType::SPINE; } /* * ClockSpine (setters) @@ -440,9 +403,7 @@ void ClockSpine::set_metal_layer(float r_metal, float c_metal) { y_chan_wire.layer.c_metal = c_metal; } -void ClockSpine::set_metal_layer(MetalLayer metal_layer) { - y_chan_wire.layer = metal_layer; -} +void ClockSpine::set_metal_layer(MetalLayer metal_layer) { y_chan_wire.layer = metal_layer; } void ClockSpine::set_initial_wire_location(int start_y, int end_y, int x) { if (end_y <= start_y) { @@ -460,34 +421,26 @@ void ClockSpine::set_initial_wire_location(int start_y, int end_y, int x) { void ClockSpine::set_wire_repeat(int repeat_x, int repeat_y) { if (repeat_x <= 0 || repeat_y <= 0) { // Avoid an infinte loop when creating spines - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Clock Network wire repeat (%d,%d) must be greater than zero\n", - repeat_x, repeat_y); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Clock Network wire repeat (%d,%d) must be greater than zero\n", repeat_x, + repeat_y); } repeat.x = repeat_x; repeat.y = repeat_y; } -void ClockSpine::set_drive_location(int offset_y) { - drive.offset = offset_y; -} +void ClockSpine::set_drive_location(int offset_y) { drive.offset = offset_y; } -void ClockSpine::set_drive_switch(int switch_idx) { - drive.switch_idx = switch_idx; -} +void ClockSpine::set_drive_switch(int switch_idx) { drive.switch_idx = switch_idx; } -void ClockSpine::set_drive_name(std::string name) { - drive.name = name; -} +void ClockSpine::set_drive_name(std::string name) { drive.name = name; } void ClockSpine::set_tap_locations(int offset_y, int increment_y) { tap.offset = offset_y; tap.increment = increment_y; } -void ClockSpine::set_tap_name(std::string name) { - tap.name = name; -} +void ClockSpine::set_tap_name(std::string name) { tap.name = name; } /* * ClockSpine (member functions) @@ -622,49 +575,25 @@ void ClockSpine::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGrap } //create drive point (length zero wire) - auto drive_node_idx = create_chany_wire(layer_num, - drive_y, - drive_y, - x, - ptc_num, - Direction::BIDIR, - rr_nodes, - rr_graph_builder, - num_segments_x); + auto drive_node_idx = create_chany_wire(layer_num, drive_y, drive_y, x, ptc_num, Direction::BIDIR, rr_nodes, + rr_graph_builder, num_segments_x); clock_graph.add_switch_location(get_name(), drive.name, x, drive_y, drive_node_idx); // create spine wire above and below the drive point - auto left_node_idx = create_chany_wire(layer_num, - y_start + y_offset, - drive_y - 1, - x, - ptc_num, - Direction::DEC, - rr_nodes, - rr_graph_builder, - num_segments_x); - auto right_node_idx = create_chany_wire(layer_num, - drive_y + 1, - y_end, - x, - ptc_num, - Direction::INC, - rr_nodes, - rr_graph_builder, - num_segments_x); + auto left_node_idx = create_chany_wire(layer_num, y_start + y_offset, drive_y - 1, x, ptc_num, + Direction::DEC, rr_nodes, rr_graph_builder, num_segments_x); + auto right_node_idx = create_chany_wire(layer_num, drive_y + 1, y_end, x, ptc_num, Direction::INC, rr_nodes, + rr_graph_builder, num_segments_x); // Keep a record of the rr_node idx that we will use to connects switches to at // the tap point - record_tap_locations(y_start + y_offset, - y_end, - x, - left_node_idx, - right_node_idx, - clock_graph); + record_tap_locations(y_start + y_offset, y_end, x, left_node_idx, right_node_idx, clock_graph); // connect drive point to each half spine using a directed switch - clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(left_node_idx), drive.switch_idx, false); - clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(right_node_idx), drive.switch_idx, false); + clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(left_node_idx), + drive.switch_idx, false); + clock_graph.add_edge(rr_edges_to_create, RRNodeId(drive_node_idx), RRNodeId(right_node_idx), + drive.switch_idx, false); } } } @@ -687,8 +616,9 @@ int ClockSpine::create_chany_wire(int layer, rr_graph_builder.set_node_layer(chany_node, layer); rr_graph_builder.set_node_capacity(chany_node, 1); rr_graph_builder.set_node_track_num(chany_node, ptc_num); - rr_graph_builder.set_node_rc_index(chany_node, NodeRCIndex(find_create_rr_rc_data( - y_chan_wire.layer.r_metal, y_chan_wire.layer.c_metal, g_vpr_ctx.mutable_device().rr_rc_data))); + rr_graph_builder.set_node_rc_index( + chany_node, NodeRCIndex(find_create_rr_rc_data(y_chan_wire.layer.r_metal, y_chan_wire.layer.c_metal, + g_vpr_ctx.mutable_device().rr_rc_data))); rr_graph_builder.set_node_direction(chany_node, direction); short seg_index = 0; @@ -706,7 +636,8 @@ int ClockSpine::create_chany_wire(int layer, VTR_ASSERT_MSG(false, "Unidentified direction type for clock rib"); break; } - rr_graph_builder.set_node_cost_index(chany_node, RRIndexedDataId(CHANX_COST_INDEX_START + num_segments_x + seg_index)); + rr_graph_builder.set_node_cost_index(chany_node, + RRIndexedDataId(CHANX_COST_INDEX_START + num_segments_x + seg_index)); /* Add the node to spatial lookup */ //auto& rr_graph = (*rr_nodes); @@ -714,7 +645,8 @@ int ClockSpine::create_chany_wire(int layer, /* TODO: Will replace these codes with an API add_node_to_all_locs() of RRGraphBuilder */ for (int ix = rr_graph.node_xlow(chany_node); ix <= rr_graph.node_xhigh(chany_node); ++ix) { for (int iy = rr_graph.node_ylow(chany_node); iy <= rr_graph.node_yhigh(chany_node); ++iy) { - rr_graph_builder.node_lookup().add_node(chany_node, layer, ix, iy, rr_graph.node_type(chany_node), rr_graph.node_ptc_num(chany_node)); + rr_graph_builder.node_lookup().add_node(chany_node, layer, ix, iy, rr_graph.node_type(chany_node), + rr_graph.node_ptc_num(chany_node)); } } @@ -765,9 +697,7 @@ void ClockHTree::create_segments(std::vector& segment_inf) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "HTrees are not yet supported.\n"); } -size_t ClockHTree::estimate_additional_nodes(const DeviceGrid& /*grid*/) { - return 0; -} +size_t ClockHTree::estimate_additional_nodes(const DeviceGrid& /*grid*/) { return 0; } void ClockHTree::create_rr_nodes_and_internal_edges_for_one_instance(ClockRRGraphBuilder& clock_graph, t_rr_graph_storage* rr_nodes, diff --git a/vpr/src/route/clock_network_builders.h b/vpr/src/route/clock_network_builders.h index f9983cd85e9..4a00716e895 100644 --- a/vpr/src/route/clock_network_builders.h +++ b/vpr/src/route/clock_network_builders.h @@ -15,11 +15,7 @@ class t_rr_graph_storage; class ClockRRGraphBuilder; -enum class ClockType { - SPINE, - RIB, - H_TREE -}; +enum class ClockType { SPINE, RIB, H_TREE }; struct MetalLayer { float r_metal = std::numeric_limits::quiet_NaN(); diff --git a/vpr/src/route/connection_based_routing.cpp b/vpr/src/route/connection_based_routing.cpp index a8f3d1b0a86..be7850e481c 100644 --- a/vpr/src/route/connection_based_routing.cpp +++ b/vpr/src/route/connection_based_routing.cpp @@ -3,9 +3,10 @@ #include "route_profiling.h" // incremental rerouting resources class definitions -Connection_based_routing_resources::Connection_based_routing_resources(const Netlist<>& net_list, - const vtr::vector>& net_terminals, - bool is_flat) +Connection_based_routing_resources::Connection_based_routing_resources( + const Netlist<>& net_list, + const vtr::vector>& net_terminals, + bool is_flat) : net_list_(net_list) , net_terminals_(net_terminals) , is_flat_(is_flat) @@ -29,9 +30,10 @@ Connection_based_routing_resources::Connection_based_routing_resources(const Net auto& net_lower_bound_connection_delay = lower_bound_connection_delay[net_id]; auto& net_forcible_reroute_connection_flag = forcible_reroute_connection_flag[net_id]; - unsigned int num_pins = net_list_.net_pins(net_id).size(); // not looking up on the SOURCE pin - net_lower_bound_connection_delay.resize(num_pins, std::numeric_limits::infinity()); // will be filled in after the 1st iteration's - net_forcible_reroute_connection_flag.reserve(num_pins); // all false to begin with + unsigned int num_pins = net_list_.net_pins(net_id).size(); // not looking up on the SOURCE pin + net_lower_bound_connection_delay.resize( + num_pins, std::numeric_limits::infinity()); // will be filled in after the 1st iteration's + net_forcible_reroute_connection_flag.reserve(num_pins); // all false to begin with for (unsigned int ipin = 1; ipin < num_pins; ++ipin) { // rr sink node index corresponding to this connection terminal @@ -67,10 +69,11 @@ void Connection_based_routing_resources::update_lower_bound_connection_delay(Par * The connection must satisfy all following criteria: * 1. the connection is critical enough * 2. the connection is suboptimal, in comparison to lower_bound_connection_delay */ -bool Connection_based_routing_resources::forcibly_reroute_connections(float max_criticality, - std::shared_ptr timing_info, - const ClusteredPinAtomPinsLookup& netlist_pin_lookup, - NetPinsMatrix& net_delay) { +bool Connection_based_routing_resources::forcibly_reroute_connections( + float max_criticality, + std::shared_ptr timing_info, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup, + NetPinsMatrix& net_delay) { bool any_connection_rerouted = false; // true if any connection has been marked for rerouting for (auto net_id : net_list_.nets()) { @@ -95,12 +98,14 @@ bool Connection_based_routing_resources::forcibly_reroute_connections(float max_ // skip if connection criticality is too low (not a problem connection) //#TODO: Check pin_id - float pin_criticality = calculate_clb_net_pin_criticality(*timing_info, netlist_pin_lookup, pin_id, is_flat_); + float pin_criticality + = calculate_clb_net_pin_criticality(*timing_info, netlist_pin_lookup, pin_id, is_flat_); if (pin_criticality < (max_criticality * connection_criticality_tolerance)) continue; // skip if connection's delay is close to optimal - if (net_delay[net_id][ipin] < (lower_bound_connection_delay[net_id][ipin - 1] * connection_delay_optimality_tolerance)) + if (net_delay[net_id][ipin] + < (lower_bound_connection_delay[net_id][ipin - 1] * connection_delay_optimality_tolerance)) continue; forcible_reroute_connection_flag[net_id][rr_sink_node] = true; diff --git a/vpr/src/route/connection_based_routing.h b/vpr/src/route/connection_based_routing.h index 0f0faaaace5..0ee99ac8160 100644 --- a/vpr/src/route/connection_based_routing.h +++ b/vpr/src/route/connection_based_routing.h @@ -70,7 +70,9 @@ class Connection_based_routing_resources { } // for updating the last stable path delay - void set_stable_critical_path_delay(float stable_critical_path_delay) { last_stable_critical_path_delay = stable_critical_path_delay; } + void set_stable_critical_path_delay(float stable_critical_path_delay) { + last_stable_critical_path_delay = stable_critical_path_delay; + } // get whether the connection to rr_sink_node of net_id should be forcibly rerouted (can either assign or just read) bool should_force_reroute_connection(ParentNetId net_id, RRNodeId rr_sink_node) const { diff --git a/vpr/src/route/connection_router.cpp b/vpr/src/route/connection_router.cpp index 23fedf6c262..3505918cf0f 100644 --- a/vpr/src/route/connection_router.cpp +++ b/vpr/src/route/connection_router.cpp @@ -4,9 +4,7 @@ #include "rr_graph.h" #include "rr_graph_fwd.h" -static bool relevant_node_to_target(const RRGraphView* rr_graph, - RRNodeId node_to_add, - RRNodeId target_node); +static bool relevant_node_to_target(const RRGraphView* rr_graph, RRNodeId node_to_add, RRNodeId target_node); #ifdef VTR_ENABLE_DEBUG_LOGGING static void update_router_stats(RouterStats* router_stats, @@ -59,11 +57,10 @@ std::tuple ConnectionRouter::timing_driven_rou /** Return whether to retry with full bb */ template -bool ConnectionRouter::timing_driven_route_connection_common_setup( - const RouteTreeNode& rt_root, - RRNodeId sink_node, - const t_conn_cost_params& cost_params, - const t_bb& bounding_box) { +bool ConnectionRouter::timing_driven_route_connection_common_setup(const RouteTreeNode& rt_root, + RRNodeId sink_node, + const t_conn_cost_params& cost_params, + const t_bb& bounding_box) { //Re-add route nodes from the existing route tree to the heap. //They need to be repushed onto the heap since each node's cost is target specific. @@ -73,27 +70,23 @@ bool ConnectionRouter::timing_driven_route_connection_common_setup( RRNodeId source_node = rt_root.inode; if (heap_.is_empty_heap()) { - VTR_LOG("No source in route tree: %s\n", describe_unrouteable_connection(source_node, sink_node, is_flat_).c_str()); + VTR_LOG("No source in route tree: %s\n", + describe_unrouteable_connection(source_node, sink_node, is_flat_).c_str()); return false; } VTR_LOGV_DEBUG(router_debug_, " Routing to %d as normal net (BB: %d,%d,%d x %d,%d,%d)\n", sink_node, - bounding_box.layer_min, bounding_box.xmin, bounding_box.ymin, - bounding_box.layer_max, bounding_box.xmax, bounding_box.ymax); + bounding_box.layer_min, bounding_box.xmin, bounding_box.ymin, bounding_box.layer_max, + bounding_box.xmax, bounding_box.ymax); - timing_driven_route_connection_from_heap(sink_node, - cost_params, - bounding_box); + timing_driven_route_connection_from_heap(sink_node, cost_params, bounding_box); if (std::isinf(rr_node_route_inf_[sink_node].path_cost)) { // No path found within the current bounding box. // // If the bounding box is already max size, just fail - if (bounding_box.xmin == 0 - && bounding_box.ymin == 0 - && bounding_box.xmax == (int)(grid_.width() - 1) - && bounding_box.ymax == (int)(grid_.height() - 1) - && bounding_box.layer_min == 0 + if (bounding_box.xmin == 0 && bounding_box.ymin == 0 && bounding_box.xmax == (int)(grid_.width() - 1) + && bounding_box.ymax == (int)(grid_.height() - 1) && bounding_box.layer_min == 0 && bounding_box.layer_max == (int)(grid_.get_num_layers() - 1)) { VTR_LOG("%s\n", describe_unrouteable_connection(source_node, sink_node, is_flat_).c_str()); return false; @@ -113,7 +106,8 @@ bool ConnectionRouter::timing_driven_route_connection_common_setup( // which is spatially close to the sink is added to the heap. // Returns a tuple of */ template -std::tuple ConnectionRouter::timing_driven_route_connection_from_route_tree_high_fanout( +std::tuple +ConnectionRouter::timing_driven_route_connection_from_route_tree_high_fanout( const RouteTreeNode& rt_root, RRNodeId sink_node, const t_conn_cost_params& cost_params, @@ -126,39 +120,40 @@ std::tuple ConnectionRouter::timing_driven_rou // re-explore route tree from root to add any new nodes (buildheap afterwards) // route tree needs to be repushed onto the heap since each node's cost is target specific - t_bb high_fanout_bb = add_high_fanout_route_tree_to_heap(rt_root, sink_node, cost_params, spatial_rt_lookup, net_bounding_box); + t_bb high_fanout_bb + = add_high_fanout_route_tree_to_heap(rt_root, sink_node, cost_params, spatial_rt_lookup, net_bounding_box); heap_.build_heap(); RRNodeId source_node = rt_root.inode; if (heap_.is_empty_heap()) { - VTR_LOG("No source in route tree: %s\n", describe_unrouteable_connection(source_node, sink_node, is_flat_).c_str()); + VTR_LOG("No source in route tree: %s\n", + describe_unrouteable_connection(source_node, sink_node, is_flat_).c_str()); return std::make_tuple(false, false, RTExploredNode()); } VTR_LOGV_DEBUG(router_debug_, " Routing to %d as high fanout net (BB: %d,%d,%d x %d,%d,%d)\n", sink_node, - high_fanout_bb.layer_min, high_fanout_bb.xmin, high_fanout_bb.ymin, - high_fanout_bb.layer_max, high_fanout_bb.xmax, high_fanout_bb.ymax); + high_fanout_bb.layer_min, high_fanout_bb.xmin, high_fanout_bb.ymin, high_fanout_bb.layer_max, + high_fanout_bb.xmax, high_fanout_bb.ymax); bool retry_with_full_bb = false; - timing_driven_route_connection_from_heap(sink_node, - cost_params, - high_fanout_bb); + timing_driven_route_connection_from_heap(sink_node, cost_params, high_fanout_bb); if (std::isinf(rr_node_route_inf_[sink_node].path_cost)) { //Found no path, that may be due to an unlucky choice of existing route tree sub-set, //try again with the full route tree to be sure this is not an artifact of high-fanout routing - VTR_LOG_WARN("No routing path found in high-fanout mode for net %zu connection (to sink_rr %d), retrying with full route tree\n", size_t(conn_params.net_id_), sink_node); + VTR_LOG_WARN( + "No routing path found in high-fanout mode for net %zu connection (to sink_rr %d), retrying with full " + "route tree\n", + size_t(conn_params.net_id_), sink_node); //Reset any previously recorded node costs so timing_driven_route_connection() //starts over from scratch. reset_path_costs(); clear_modified_rr_node_info(); - retry_with_full_bb = timing_driven_route_connection_common_setup(rt_root, - sink_node, - cost_params, - net_bounding_box); + retry_with_full_bb + = timing_driven_route_connection_common_setup(rt_root, sink_node, cost_params, net_bounding_box); } if (std::isinf(rr_node_route_inf_[sink_node].path_cost)) { @@ -202,9 +197,8 @@ void ConnectionRouter::timing_driven_route_connection_from_heap(RRNodeId s t_bb target_bb; if (rr_graph_->node_type(sink_node) == SINK) { // We need to get a bounding box for the sink's entire tile - vtr::Rect tile_bb = grid_.get_tile_bb({rr_graph_->node_xlow(sink_node), - rr_graph_->node_ylow(sink_node), - rr_graph_->node_layer(sink_node)}); + vtr::Rect tile_bb = grid_.get_tile_bb( + {rr_graph_->node_xlow(sink_node), rr_graph_->node_ylow(sink_node), rr_graph_->node_layer(sink_node)}); target_bb.xmin = tile_bb.xmin(); target_bb.ymin = tile_bb.ymin(); @@ -226,14 +220,10 @@ void ConnectionRouter::timing_driven_route_connection_from_heap(RRNodeId s HeapNode cheapest; while (heap_.try_pop(cheapest)) { // inode with cheapest total cost in current route tree to be expanded on - const auto& [ new_total_cost, inode ] = cheapest; - update_router_stats(router_stats_, - false, - inode, - rr_graph_); + const auto& [new_total_cost, inode] = cheapest; + update_router_stats(router_stats_, false, inode, rr_graph_); - VTR_LOGV_DEBUG(router_debug_, " Popping node %d (cost: %g)\n", - inode, new_total_cost); + VTR_LOGV_DEBUG(router_debug_, " Popping node %d (cost: %g)\n", inode, new_total_cost); // Have we found the target? if (inode == sink_node) { @@ -241,22 +231,19 @@ void ConnectionRouter::timing_driven_route_connection_from_heap(RRNodeId s // This is then placed into the traceback so that the correct path is returned // TODO: This can be eliminated by modifying the actual traceback function in route_timing if (rcv_path_manager.is_enabled()) { - rcv_path_manager.insert_backwards_path_into_traceback(rcv_path_data[inode], - rr_node_route_inf_[inode].path_cost, - rr_node_route_inf_[inode].backward_path_cost, - route_ctx); + rcv_path_manager.insert_backwards_path_into_traceback( + rcv_path_data[inode], rr_node_route_inf_[inode].path_cost, + rr_node_route_inf_[inode].backward_path_cost, route_ctx); } - VTR_LOGV_DEBUG(router_debug_, " Found target %8d (%s)\n", inode, describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat_).c_str()); + VTR_LOGV_DEBUG( + router_debug_, " Found target %8d (%s)\n", inode, + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat_) + .c_str()); break; } // If not, keep searching - timing_driven_expand_cheapest(inode, - new_total_cost, - sink_node, - cost_params, - bounding_box, - target_bb); + timing_driven_expand_cheapest(inode, new_total_cost, sink_node, cost_params, bounding_box, target_bb); } // Stop measuring path search time @@ -308,14 +295,10 @@ vtr::vector ConnectionRouter::timing_driven_find HeapNode cheapest; while (heap_.try_pop(cheapest)) { // inode with cheapest total cost in current route tree to be expanded on - const auto& [ new_total_cost, inode ] = cheapest; - update_router_stats(router_stats_, - false, - inode, - rr_graph_); + const auto& [new_total_cost, inode] = cheapest; + update_router_stats(router_stats_, false, inode, rr_graph_); - VTR_LOGV_DEBUG(router_debug_, " Popping node %d (cost: %g)\n", - inode, new_total_cost); + VTR_LOGV_DEBUG(router_debug_, " Popping node %d (cost: %g)\n", inode, new_total_cost); // Since we want to find shortest paths to all nodes in the graph // we do not specify a target node. @@ -324,20 +307,17 @@ vtr::vector ConnectionRouter::timing_driven_find // lookahead we can re-use the node exploration code from the regular router RRNodeId target_node = RRNodeId::INVALID(); - timing_driven_expand_cheapest(inode, - new_total_cost, - target_node, - cost_params, - bounding_box, - t_bb()); + timing_driven_expand_cheapest(inode, new_total_cost, target_node, cost_params, bounding_box, t_bb()); if (cheapest_paths[inode].index == RRNodeId::INVALID() || cheapest_paths[inode].total_cost >= new_total_cost) { - VTR_LOGV_DEBUG(router_debug_, " Better cost to node %d: %g (was %g)\n", inode, new_total_cost, cheapest_paths[inode].total_cost); + VTR_LOGV_DEBUG(router_debug_, " Better cost to node %d: %g (was %g)\n", inode, new_total_cost, + cheapest_paths[inode].total_cost); // Only the `index` and `prev_edge` fields of `cheapest_paths[inode]` are used after this function returns cheapest_paths[inode].index = inode; cheapest_paths[inode].prev_edge = rr_node_route_inf_[inode].prev_edge; } else { - VTR_LOGV_DEBUG(router_debug_, " Worse cost to node %d: %g (better %g)\n", inode, new_total_cost, cheapest_paths[inode].total_cost); + VTR_LOGV_DEBUG(router_debug_, " Worse cost to node %d: %g (better %g)\n", inode, new_total_cost, + cheapest_paths[inode].total_cost); } } @@ -381,8 +361,7 @@ void ConnectionRouter::timing_driven_expand_cheapest(RRNodeId from_node, VTR_LOGV_DEBUG(router_debug_, " Better cost to %d\n", from_node); VTR_LOGV_DEBUG(router_debug_, " New total cost: %g\n", new_total_cost); VTR_LOGV_DEBUG(router_debug_ && (current.prev_edge != RREdgeId::INVALID()), - " Setting path costs for associated node %d (from %d edge %zu)\n", - from_node, + " Setting path costs for associated node %d (from %d edge %zu)\n", from_node, static_cast(rr_graph_->edge_src_node(current.prev_edge)), static_cast(current.prev_edge)); @@ -434,13 +413,7 @@ void ConnectionRouter::timing_driven_expand_neighbours(const RTExploredNod for (RREdgeId from_edge : edges) { RRNodeId to_node = rr_nodes_.edge_sink_node(from_edge); - timing_driven_expand_neighbour(current, - from_edge, - to_node, - cost_params, - bounding_box, - target_node, - target_bb); + timing_driven_expand_neighbour(current, from_edge, to_node, cost_params, bounding_box, target_node, target_bb); } } @@ -462,17 +435,16 @@ void ConnectionRouter::timing_driven_expand_neighbour(const RTExploredNode // BB-pruning // Disable BB-pruning if RCV is enabled, as this can make it harder for circuits with high negative hold slack to resolve this // TODO: Only disable pruning if the net has negative hold slack, maybe go off budgets - if (!inside_bb(to_node, bounding_box) - && !rcv_path_manager.is_enabled()) { + if (!inside_bb(to_node, bounding_box) && !rcv_path_manager.is_enabled()) { VTR_LOGV_DEBUG(router_debug_, " Pruned expansion of node %d edge %zu -> %d" " (to node location %d,%d,%d x %d,%d,%d outside of expanded" " net bounding box %d,%d,%d x %d,%d,%d)\n", - from_node, size_t(from_edge), size_t(to_node), - rr_graph_->node_xlow(to_node), rr_graph_->node_ylow(to_node), rr_graph_->node_layer(to_node), - rr_graph_->node_xhigh(to_node), rr_graph_->node_yhigh(to_node), rr_graph_->node_layer(to_node), - bounding_box.xmin, bounding_box.ymin, bounding_box.layer_min, - bounding_box.xmax, bounding_box.ymax, bounding_box.layer_max); + from_node, size_t(from_edge), size_t(to_node), rr_graph_->node_xlow(to_node), + rr_graph_->node_ylow(to_node), rr_graph_->node_layer(to_node), rr_graph_->node_xhigh(to_node), + rr_graph_->node_yhigh(to_node), rr_graph_->node_layer(to_node), bounding_box.xmin, + bounding_box.ymin, bounding_box.layer_min, bounding_box.xmax, bounding_box.ymax, + bounding_box.layer_max); return; /* Node is outside (expanded) bounding box. */ } @@ -490,43 +462,32 @@ void ConnectionRouter::timing_driven_expand_neighbour(const RTExploredNode int to_layer = rr_graph_->node_layer(to_node); int to_xhigh = rr_graph_->node_xhigh(to_node); int to_yhigh = rr_graph_->node_yhigh(to_node); - if (to_xlow < target_bb.xmin - || to_ylow < target_bb.ymin - || to_xhigh > target_bb.xmax - || to_yhigh > target_bb.ymax - || to_layer < target_bb.layer_min - || to_layer > target_bb.layer_max) { + if (to_xlow < target_bb.xmin || to_ylow < target_bb.ymin || to_xhigh > target_bb.xmax + || to_yhigh > target_bb.ymax || to_layer < target_bb.layer_min || to_layer > target_bb.layer_max) { VTR_LOGV_DEBUG(router_debug_, " Pruned expansion of node %d edge %zu -> %d" " (to node is IPIN at %d,%d,%d x %d,%d,%d which does not" " lead to target block %d,%d,%d x %d,%d,%d)\n", - from_node, size_t(from_edge), size_t(to_node), - to_xlow, to_ylow, to_layer, - to_xhigh, to_yhigh, to_layer, - target_bb.xmin, target_bb.ymin, target_bb.layer_min, - target_bb.xmax, target_bb.ymax, target_bb.layer_max); + from_node, size_t(from_edge), size_t(to_node), to_xlow, to_ylow, to_layer, to_xhigh, + to_yhigh, to_layer, target_bb.xmin, target_bb.ymin, target_bb.layer_min, target_bb.xmax, + target_bb.ymax, target_bb.layer_max); return; } } } - VTR_LOGV_DEBUG(router_debug_, " Expanding node %d edge %zu -> %d\n", - from_node, size_t(from_edge), size_t(to_node)); + VTR_LOGV_DEBUG(router_debug_, " Expanding node %d edge %zu -> %d\n", from_node, size_t(from_edge), + size_t(to_node)); // Check if the node exists in the route tree when RCV is enabled // Other pruning methods have been disabled when RCV is on, so this method is required to prevent "loops" from being created bool node_exists = false; if (rcv_path_manager.is_enabled()) { - node_exists = rcv_path_manager.node_exists_in_tree(rcv_path_data[from_node], - to_node); + node_exists = rcv_path_manager.node_exists_in_tree(rcv_path_data[from_node], to_node); } if (!node_exists || !rcv_path_manager.is_enabled()) { - timing_driven_add_to_heap(cost_params, - current, - to_node, - from_edge, - target_node); + timing_driven_add_to_heap(cost_params, current, to_node, from_edge, target_node); } } @@ -556,10 +517,7 @@ void ConnectionRouter::timing_driven_add_to_heap(const t_conn_cost_params& next.path_data->backward_delay = rcv_path_data[from_node]->backward_delay; } - evaluate_timing_driven_node_costs(&next, - cost_params, - from_node, - target_node); + evaluate_timing_driven_node_costs(&next, cost_params, from_node, target_node); float best_total_cost = rr_node_route_inf_[to_node].path_cost; float best_back_cost = rr_node_route_inf_[to_node].backward_path_cost; @@ -578,15 +536,12 @@ void ConnectionRouter::timing_driven_add_to_heap(const t_conn_cost_params& // When RCV is enabled, prune based on the RCV-specific total path cost (see // in `compute_node_cost_using_rcv` in `evaluate_timing_driven_node_costs`) // to allow detours to get better QoR. - if ((!rcv_path_manager.is_enabled() && best_back_cost > new_back_cost) || - (rcv_path_manager.is_enabled() && best_total_cost > new_total_cost)) { - VTR_LOGV_DEBUG(router_debug_, " Expanding to node %d (%s)\n", to_node, - describe_rr_node(device_ctx.rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - to_node, - is_flat_) - .c_str()); + if ((!rcv_path_manager.is_enabled() && best_back_cost > new_back_cost) + || (rcv_path_manager.is_enabled() && best_total_cost > new_total_cost)) { + VTR_LOGV_DEBUG( + router_debug_, " Expanding to node %d (%s)\n", to_node, + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, to_node, is_flat_) + .c_str()); VTR_LOGV_DEBUG(router_debug_, " New Total Cost %g New back Cost %g\n", new_total_cost, new_back_cost); //Add node to the heap only if the cost via the current partial path is less than the //best known cost, since there is no reason for the router to expand more expensive paths. @@ -597,14 +552,15 @@ void ConnectionRouter::timing_driven_add_to_heap(const t_conn_cost_params& update_cheapest(next, from_node); heap_.add_to_heap({new_total_cost, to_node}); - update_router_stats(router_stats_, - true, - to_node, - rr_graph_); + update_router_stats(router_stats_, true, to_node, rr_graph_); } else { - VTR_LOGV_DEBUG(router_debug_, " Didn't expand to %d (%s)\n", to_node, describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, to_node, is_flat_).c_str()); - VTR_LOGV_DEBUG(router_debug_, " Prev Total Cost %g Prev back Cost %g \n", best_total_cost, best_back_cost); + VTR_LOGV_DEBUG( + router_debug_, " Didn't expand to %d (%s)\n", to_node, + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, to_node, is_flat_) + .c_str()); + VTR_LOGV_DEBUG(router_debug_, " Prev Total Cost %g Prev back Cost %g \n", best_total_cost, + best_back_cost); VTR_LOGV_DEBUG(router_debug_, " New Total Cost %g New back Cost %g \n", new_total_cost, new_back_cost); } @@ -645,7 +601,8 @@ float ConnectionRouter::compute_node_cost_using_rcv(const t_conn_cost_para const t_conn_delay_budget* delay_budget = cost_params.delay_budget; // TODO: This function is not tested for is_flat == true VTR_ASSERT(is_flat_ != true); - std::tie(expected_delay, expected_cong) = router_lookahead_.get_expected_delay_and_cong(to_node, target_node, cost_params, R_upstream); + std::tie(expected_delay, expected_cong) + = router_lookahead_.get_expected_delay_and_cong(to_node, target_node, cost_params, R_upstream); float expected_total_delay_cost; float expected_total_cong_cost; @@ -662,9 +619,11 @@ float ConnectionRouter::compute_node_cost_using_rcv(const t_conn_cost_para constexpr float NORMALIZATION_CONSTANT = 100e-12; expected_total_delay_cost = expected_total_delay; - expected_total_delay_cost += (delay_budget->short_path_criticality + cost_params.criticality) * std::max(0.f, delay_budget->target_delay - expected_total_delay); + expected_total_delay_cost += (delay_budget->short_path_criticality + cost_params.criticality) + * std::max(0.f, delay_budget->target_delay - expected_total_delay); // expected_total_delay_cost += std::pow(std::max(0.f, expected_total_delay - delay_budget->max_delay), 2) / NORMALIZATION_CONSTANT; - expected_total_delay_cost += std::pow(std::max(0.f, delay_budget->min_delay - expected_total_delay), 2) / NORMALIZATION_CONSTANT; + expected_total_delay_cost + += std::pow(std::max(0.f, delay_budget->min_delay - expected_total_delay), 2) / NORMALIZATION_CONSTANT; expected_total_cong_cost = expected_total_cong; float total_cost = expected_total_delay_cost + expected_total_cong_cost; @@ -787,21 +746,27 @@ void ConnectionRouter::evaluate_timing_driven_node_costs(RTExploredNode* t if (rcv_path_manager.is_enabled() && to->path_data != nullptr) { to->path_data->backward_delay += cost_params.criticality * Tdel; - to->path_data->backward_cong += (1. - cost_params.criticality) * get_rr_cong_cost(to->index, cost_params.pres_fac); + to->path_data->backward_cong + += (1. - cost_params.criticality) * get_rr_cong_cost(to->index, cost_params.pres_fac); - total_cost = compute_node_cost_using_rcv(cost_params, to->index, target_node, to->path_data->backward_delay, to->path_data->backward_cong, to->R_upstream); + total_cost = compute_node_cost_using_rcv(cost_params, to->index, target_node, to->path_data->backward_delay, + to->path_data->backward_cong, to->R_upstream); } else { const auto& device_ctx = g_vpr_ctx.device(); //Update total cost float expected_cost = router_lookahead_.get_expected_cost(to->index, target_node, cost_params, to->R_upstream); - VTR_LOGV_DEBUG(router_debug_ && !std::isfinite(expected_cost), - " Lookahead from %s (%s) to %s (%s) is non-finite, expected_cost = %f, to->R_upstream = %f\n", - rr_node_arch_name(to->index, is_flat_).c_str(), - describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, to->index, is_flat_).c_str(), - rr_node_arch_name(target_node, is_flat_).c_str(), - describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, target_node, is_flat_).c_str(), - expected_cost, to->R_upstream); - total_cost += to->backward_path_cost + cost_params.astar_fac * std::max(0.f, expected_cost - cost_params.astar_offset); + VTR_LOGV_DEBUG( + router_debug_ && !std::isfinite(expected_cost), + " Lookahead from %s (%s) to %s (%s) is non-finite, expected_cost = %f, to->R_upstream = %f\n", + rr_node_arch_name(to->index, is_flat_).c_str(), + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, to->index, is_flat_) + .c_str(), + rr_node_arch_name(target_node, is_flat_).c_str(), + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, target_node, is_flat_) + .c_str(), + expected_cost, to->R_upstream); + total_cost + += to->backward_path_cost + cost_params.astar_fac * std::max(0.f, expected_cost - cost_params.astar_offset); } to->total_cost = total_cost; } @@ -809,11 +774,10 @@ void ConnectionRouter::evaluate_timing_driven_node_costs(RTExploredNode* t //Adds the route tree rooted at rt_node to the heap, preparing it to be //used as branch-points for further routing. template -void ConnectionRouter::add_route_tree_to_heap( - const RouteTreeNode& rt_node, - RRNodeId target_node, - const t_conn_cost_params& cost_params, - const t_bb& net_bb) { +void ConnectionRouter::add_route_tree_to_heap(const RouteTreeNode& rt_node, + RRNodeId target_node, + const t_conn_cost_params& cost_params, + const t_bb& net_bb) { /* Puts the entire partial routing below and including rt_node onto the heap * * (except for those parts marked as not to be expanded) by calling itself * * recursively. */ @@ -821,27 +785,16 @@ void ConnectionRouter::add_route_tree_to_heap( /* Pre-order depth-first traversal */ // IPINs and SINKS are not re_expanded if (rt_node.re_expand) { - add_route_tree_node_to_heap(rt_node, - target_node, - cost_params, - net_bb); + add_route_tree_node_to_heap(rt_node, target_node, cost_params, net_bb); } for (const RouteTreeNode& child_node : rt_node.child_nodes()) { if (is_flat_) { - if (relevant_node_to_target(rr_graph_, - child_node.inode, - target_node)) { - add_route_tree_to_heap(child_node, - target_node, - cost_params, - net_bb); + if (relevant_node_to_target(rr_graph_, child_node.inode, target_node)) { + add_route_tree_to_heap(child_node, target_node, cost_params, net_bb); } } else { - add_route_tree_to_heap(child_node, - target_node, - cost_params, - net_bb); + add_route_tree_to_heap(child_node, target_node, cost_params, net_bb); } } } @@ -851,11 +804,10 @@ void ConnectionRouter::add_route_tree_to_heap( //Note that if you want to respect rt_node.re_expand that is the caller's //responsibility. template -void ConnectionRouter::add_route_tree_node_to_heap( - const RouteTreeNode& rt_node, - RRNodeId target_node, - const t_conn_cost_params& cost_params, - const t_bb& net_bb) { +void ConnectionRouter::add_route_tree_node_to_heap(const RouteTreeNode& rt_node, + RRNodeId target_node, + const t_conn_cost_params& cost_params, + const t_bb& net_bb) { const auto& device_ctx = g_vpr_ctx.device(); const RRNodeId inode = rt_node.inode; float backward_path_cost = cost_params.criticality * rt_node.Tdel; @@ -874,14 +826,15 @@ void ConnectionRouter::add_route_tree_node_to_heap( if (!rcv_path_manager.is_enabled()) { // tot_cost = backward_path_cost + cost_params.astar_fac * expected_cost; float expected_cost = router_lookahead_.get_expected_cost(inode, target_node, cost_params, R_upstream); - float tot_cost = backward_path_cost + cost_params.astar_fac * std::max(0.f, expected_cost - cost_params.astar_offset); - VTR_LOGV_DEBUG(router_debug_, " Adding node %8d to heap from init route tree with cost %g (%s)\n", - inode, - tot_cost, - describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat_).c_str()); + float tot_cost + = backward_path_cost + cost_params.astar_fac * std::max(0.f, expected_cost - cost_params.astar_offset); + VTR_LOGV_DEBUG( + router_debug_, " Adding node %8d to heap from init route tree with cost %g (%s)\n", inode, tot_cost, + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat_) + .c_str()); if (tot_cost > rr_node_route_inf_[inode].path_cost) { - return ; + return; } add_to_mod_list(inode); rr_node_route_inf_[inode].path_cost = tot_cost; @@ -894,7 +847,8 @@ void ConnectionRouter::add_route_tree_node_to_heap( // inode, tot_cost, RREdgeId::INVALID(), // backward_path_cost, R_upstream); } else { - float expected_total_cost = compute_node_cost_using_rcv(cost_params, inode, target_node, rt_node.Tdel, 0, R_upstream); + float expected_total_cost + = compute_node_cost_using_rcv(cost_params, inode, target_node, rt_node.Tdel, 0, R_upstream); add_to_mod_list(inode); rr_node_route_inf_[inode].path_cost = expected_total_cost; @@ -911,10 +865,7 @@ void ConnectionRouter::add_route_tree_node_to_heap( // backward_path_cost, R_upstream, rt_node.Tdel, &rcv_path_manager); } - update_router_stats(router_stats_, - true, - inode, - rr_graph_); + update_router_stats(router_stats_, true, inode, rr_graph_); #ifdef VTR_ENABLE_DEBUG_LOGGING router_stats_->rt_node_pushes[rr_graph_->node_type(inode)]++; @@ -944,12 +895,11 @@ inline void adjust_highfanout_bounding_box(t_bb& bb, const t_bb& net_bb) { } template -t_bb ConnectionRouter::add_high_fanout_route_tree_to_heap( - const RouteTreeNode& rt_root, - RRNodeId target_node, - const t_conn_cost_params& cost_params, - const SpatialRouteTreeLookup& spatial_rt_lookup, - const t_bb& net_bounding_box) { +t_bb ConnectionRouter::add_high_fanout_route_tree_to_heap(const RouteTreeNode& rt_root, + RRNodeId target_node, + const t_conn_cost_params& cost_params, + const SpatialRouteTreeLookup& spatial_rt_lookup, + const t_bb& net_bounding_box) { //For high fanout nets we only add those route tree nodes which are spatially close //to the sink. // @@ -984,12 +934,14 @@ t_bb ConnectionRouter::add_high_fanout_route_tree_to_heap( for (int dx : {0, -1, +1}) { size_t bin_x = target_bin_x + dx; - if (bin_x > spatial_rt_lookup.dim_size(0) - 1) continue; //Out of range + if (bin_x > spatial_rt_lookup.dim_size(0) - 1) + continue; //Out of range for (int dy : {0, -1, +1}) { size_t bin_y = target_bin_y + dy; - if (bin_y > spatial_rt_lookup.dim_size(1) - 1) continue; //Out of range + if (bin_y > spatial_rt_lookup.dim_size(1) - 1) + continue; //Out of range for (const RouteTreeNode& rt_node : spatial_rt_lookup[bin_x][bin_y]) { if (!rt_node.re_expand) // Some nodes (like IPINs) shouldn't be re-expanded @@ -1033,10 +985,12 @@ t_bb ConnectionRouter::add_high_fanout_route_tree_to_heap( break; } } - if (done) break; + if (done) + break; } - if (chan_nodes_added == 0 || !found_node_on_same_layer) { //If the target bin, and it's surrounding bins were empty, just add the full route tree + if (chan_nodes_added == 0 + || !found_node_on_same_layer) { //If the target bin, and it's surrounding bins were empty, just add the full route tree add_route_tree_to_heap(rt_root, target_node, cost_params, net_bounding_box); return net_bounding_box; } else { @@ -1046,12 +1000,11 @@ t_bb ConnectionRouter::add_high_fanout_route_tree_to_heap( } } -static inline bool relevant_node_to_target(const RRGraphView* rr_graph, - RRNodeId node_to_add, - RRNodeId target_node) { +static inline bool relevant_node_to_target(const RRGraphView* rr_graph, RRNodeId node_to_add, RRNodeId target_node) { VTR_ASSERT(rr_graph->node_type(target_node) == t_rr_type::SINK); auto node_to_add_type = rr_graph->node_type(node_to_add); - if (node_to_add_type == t_rr_type::OPIN || node_to_add_type == t_rr_type::SOURCE || node_to_add_type == t_rr_type::CHANX || node_to_add_type == t_rr_type::CHANY || node_to_add_type == SINK) { + if (node_to_add_type == t_rr_type::OPIN || node_to_add_type == t_rr_type::SOURCE + || node_to_add_type == t_rr_type::CHANX || node_to_add_type == t_rr_type::CHANY || node_to_add_type == SINK) { return true; } else if (node_in_same_physical_tile(node_to_add, target_node)) { VTR_ASSERT(node_to_add_type == IPIN); @@ -1101,38 +1054,24 @@ static inline void update_router_stats(RouterStats* router_stats, #endif } -std::unique_ptr make_connection_router(e_heap_type heap_type, - const DeviceGrid& grid, - const RouterLookahead& router_lookahead, - const t_rr_graph_storage& rr_nodes, - const RRGraphView* rr_graph, - const std::vector& rr_rc_data, - const vtr::vector& rr_switch_inf, - vtr::vector& rr_node_route_inf, - bool is_flat) { +std::unique_ptr make_connection_router( + e_heap_type heap_type, + const DeviceGrid& grid, + const RouterLookahead& router_lookahead, + const t_rr_graph_storage& rr_nodes, + const RRGraphView* rr_graph, + const std::vector& rr_rc_data, + const vtr::vector& rr_switch_inf, + vtr::vector& rr_node_route_inf, + bool is_flat) { switch (heap_type) { case e_heap_type::BINARY_HEAP: return std::make_unique>( - grid, - router_lookahead, - rr_nodes, - rr_graph, - rr_rc_data, - rr_switch_inf, - rr_node_route_inf, - is_flat); + grid, router_lookahead, rr_nodes, rr_graph, rr_rc_data, rr_switch_inf, rr_node_route_inf, is_flat); case e_heap_type::FOUR_ARY_HEAP: return std::make_unique>( - grid, - router_lookahead, - rr_nodes, - rr_graph, - rr_rc_data, - rr_switch_inf, - rr_node_route_inf, - is_flat); + grid, router_lookahead, rr_nodes, rr_graph, rr_rc_data, rr_switch_inf, rr_node_route_inf, is_flat); default: - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Unknown heap_type %d", - heap_type); + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Unknown heap_type %d", heap_type); } } diff --git a/vpr/src/route/connection_router.h b/vpr/src/route/connection_router.h index cee93384974..47c548648e2 100644 --- a/vpr/src/route/connection_router.h +++ b/vpr/src/route/connection_router.h @@ -23,15 +23,14 @@ template class ConnectionRouter : public ConnectionRouterInterface { public: - ConnectionRouter( - const DeviceGrid& grid, - const RouterLookahead& router_lookahead, - const t_rr_graph_storage& rr_nodes, - const RRGraphView* rr_graph, - const std::vector& rr_rc_data, - const vtr::vector& rr_switch_inf, - vtr::vector& rr_node_route_inf, - bool is_flat) + ConnectionRouter(const DeviceGrid& grid, + const RouterLookahead& router_lookahead, + const t_rr_graph_storage& rr_nodes, + const RRGraphView* rr_graph, + const std::vector& rr_rc_data, + const vtr::vector& rr_switch_inf, + vtr::vector& rr_node_route_inf, + bool is_flat) : grid_(grid) , router_lookahead_(router_lookahead) , rr_nodes_(rr_nodes.view()) @@ -51,14 +50,12 @@ class ConnectionRouter : public ConnectionRouterInterface { ~ConnectionRouter() { VTR_LOG("Serial Connection Router is being destroyed. Time spent on path search: %.3f seconds.\n", - std::chrono::duration(path_search_cumulative_time).count()); + std::chrono::duration(path_search_cumulative_time).count()); } // Clear's the modified list. Should be called after reset_path_costs // have been called. - void clear_modified_rr_node_info() final { - modified_rr_node_inf_.clear(); - } + void clear_modified_rr_node_info() final { modified_rr_node_inf_.clear(); } // Reset modified data in rr_node_route_inf based on modified_rr_node_inf. void reset_path_costs() final { @@ -126,9 +123,7 @@ class ConnectionRouter : public ConnectionRouterInterface { RouterStats& router_stats, const ConnectionParameters& conn_params) final; - void set_router_debug(bool router_debug) final { - router_debug_ = router_debug; - } + void set_router_debug(bool router_debug) final { router_debug_ = router_debug; } // Empty the route tree set used for RCV node detection // Will return if RCV is disabled @@ -178,11 +173,10 @@ class ConnectionRouter : public ConnectionRouterInterface { * @param[in] cost_params * @param[in] bounding_box Keep search confined to this bounding box * @return bool Signal to retry this connection with a full-device bounding box */ - bool timing_driven_route_connection_common_setup( - const RouteTreeNode& rt_root, - RRNodeId sink_node, - const t_conn_cost_params& cost_params, - const t_bb& bounding_box); + bool timing_driven_route_connection_common_setup(const RouteTreeNode& rt_root, + RRNodeId sink_node, + const t_conn_cost_params& cost_params, + const t_bb& bounding_box); // Finds a path to sink_node, starting from the elements currently in the // heap. @@ -195,57 +189,51 @@ class ConnectionRouter : public ConnectionRouterInterface { // This is the core maze routing routine. // // Note: For understanding the connection router, start here. - void timing_driven_route_connection_from_heap( - RRNodeId sink_node, - const t_conn_cost_params& cost_params, - const t_bb& bounding_box); + void timing_driven_route_connection_from_heap(RRNodeId sink_node, + const t_conn_cost_params& cost_params, + const t_bb& bounding_box); // Expand this current node if it is a cheaper path. - void timing_driven_expand_cheapest( - RRNodeId from_node, - float new_total_cost, - RRNodeId target_node, - const t_conn_cost_params& cost_params, - const t_bb& bounding_box, - const t_bb& target_bb); + void timing_driven_expand_cheapest(RRNodeId from_node, + float new_total_cost, + RRNodeId target_node, + const t_conn_cost_params& cost_params, + const t_bb& bounding_box, + const t_bb& target_bb); // Expand each neighbor of the current node. - void timing_driven_expand_neighbours( - const RTExploredNode& current, - const t_conn_cost_params& cost_params, - const t_bb& bounding_box, - RRNodeId target_node, - const t_bb& target_bb); + void timing_driven_expand_neighbours(const RTExploredNode& current, + const t_conn_cost_params& cost_params, + const t_bb& bounding_box, + RRNodeId target_node, + const t_bb& target_bb); // Conditionally adds to_node to the router heap (via path from current.index // via from_edge). // // RR nodes outside bounding box specified in bounding_box are not added // to the heap. - void timing_driven_expand_neighbour( - const RTExploredNode& current, - RREdgeId from_edge, - RRNodeId to_node, - const t_conn_cost_params& cost_params, - const t_bb& bounding_box, - RRNodeId target_node, - const t_bb& target_bb); + void timing_driven_expand_neighbour(const RTExploredNode& current, + RREdgeId from_edge, + RRNodeId to_node, + const t_conn_cost_params& cost_params, + const t_bb& bounding_box, + RRNodeId target_node, + const t_bb& target_bb); // Add to_node to the heap, and also add any nodes which are connected by // non-configurable edges - void timing_driven_add_to_heap( - const t_conn_cost_params& cost_params, - const RTExploredNode& current, - RRNodeId to_node, - RREdgeId from_edge, - RRNodeId target_node); + void timing_driven_add_to_heap(const t_conn_cost_params& cost_params, + const RTExploredNode& current, + RRNodeId to_node, + RREdgeId from_edge, + RRNodeId target_node); // Calculates the cost of reaching to_node - void evaluate_timing_driven_node_costs( - RTExploredNode* to, - const t_conn_cost_params& cost_params, - RRNodeId from_node, - RRNodeId target_node); + void evaluate_timing_driven_node_costs(RTExploredNode* to, + const t_conn_cost_params& cost_params, + RRNodeId from_node, + RRNodeId target_node); // Find paths from current heap to all nodes in the RR graph vtr::vector timing_driven_find_all_shortest_paths_from_heap( @@ -271,18 +259,16 @@ class ConnectionRouter : public ConnectionRouterInterface { // //Note that if you want to respect rt_node->re_expand that is the caller's //responsibility. - void add_route_tree_node_to_heap( - const RouteTreeNode& rt_node, - RRNodeId target_node, - const t_conn_cost_params& cost_params, - const t_bb& net_bb); - - t_bb add_high_fanout_route_tree_to_heap( - const RouteTreeNode& rt_root, - RRNodeId target_node, - const t_conn_cost_params& cost_params, - const SpatialRouteTreeLookup& spatial_route_tree_lookup, - const t_bb& net_bounding_box); + void add_route_tree_node_to_heap(const RouteTreeNode& rt_node, + RRNodeId target_node, + const t_conn_cost_params& cost_params, + const t_bb& net_bb); + + t_bb add_high_fanout_route_tree_to_heap(const RouteTreeNode& rt_root, + RRNodeId target_node, + const t_conn_cost_params& cost_params, + const SpatialRouteTreeLookup& spatial_route_tree_lookup, + const t_bb& net_bounding_box); const DeviceGrid& grid_; const RouterLookahead& router_lookahead_; diff --git a/vpr/src/route/d_ary_heap.h b/vpr/src/route/d_ary_heap.h index 5ac59f1eef2..403a531bcfb 100644 --- a/vpr/src/route/d_ary_heap.h +++ b/vpr/src/route/d_ary_heap.h @@ -17,7 +17,7 @@ * to BinaryHeap. This is likely because FourAryHeap has lower tree height, and as we can fit 8 * heap node (each is 8 bytes) on a cache line (commonly 64 bytes on modern architectures), each * heap operation (the comparison among sibling nodes) tends to benefit from the caches. -*/ + */ template class DAryHeap : public HeapInterface { public: @@ -40,9 +40,7 @@ class DAryHeap : public HeapInterface { } } - void add_to_heap(const HeapNode& heap_node) { - pq_.push(heap_node); - } + void add_to_heap(const HeapNode& heap_node) { pq_.push(heap_node); } void push_back(const HeapNode& heap_node) { pq_.push(heap_node); // FIXME: add to heap without maintaining the heap property @@ -56,13 +54,9 @@ class DAryHeap : public HeapInterface { return true; // FIXME: checking if the heap property is maintained or not } - void empty_heap() { - pq_.clear(); - } + void empty_heap() { pq_.clear(); } - bool is_empty_heap() const { - return (bool)(pq_.empty()); - } + bool is_empty_heap() const { return (bool)(pq_.empty()); } private: priority_queue pq_; diff --git a/vpr/src/route/d_ary_heap.tpp b/vpr/src/route/d_ary_heap.tpp index 565b8bac72b..d59751083d3 100644 --- a/vpr/src/route/d_ary_heap.tpp +++ b/vpr/src/route/d_ary_heap.tpp @@ -3,7 +3,10 @@ #include #include -template, class Compare = std::less> +template, + class Compare = std::less> class customized_d_ary_priority_queue { static_assert(D == 2 || D == 4, "Only support binary or 4-ary priority queue"); @@ -52,13 +55,14 @@ class customized_d_ary_priority_queue { const size_t child_4 = child_1 + 3; const size_t first_half_largest = child_1 + !!comp_(heap_[child_1], heap_[child_2]); const size_t second_half_largest = child_3 + !!comp_(heap_[child_3], heap_[child_4]); - return comp_(heap_[first_half_largest], heap_[second_half_largest]) ? second_half_largest : first_half_largest; + return comp_(heap_[first_half_largest], heap_[second_half_largest]) ? second_half_largest + : first_half_largest; } } inline size_t largest_child_index_partial(const size_t first_child, const size_t num_children /*must < `D`*/) { if constexpr (D == 2) { - (void) num_children; + (void)num_children; return first_child; } else { switch (num_children) { @@ -67,7 +71,8 @@ class customized_d_ary_priority_queue { const size_t child_2 = child_1 + 1; const size_t child_3 = child_1 + 2; const size_t first_two_children_largest = child_1 + !!comp_(heap_[child_1], heap_[child_2]); - return comp_(heap_[first_two_children_largest], heap_[child_3]) ? child_3 : first_two_children_largest; + return comp_(heap_[first_two_children_largest], heap_[child_3]) ? child_3 + : first_two_children_largest; } case 2: { return first_child + !!comp_(heap_[first_child], heap_[first_child + 1]); @@ -124,8 +129,7 @@ class customized_d_ary_priority_queue { } public: - explicit customized_d_ary_priority_queue(const Compare& compare = Compare(), - const Container& cont = Container()) + explicit customized_d_ary_priority_queue(const Compare& compare = Compare(), const Container& cont = Container()) : comp_(compare) , heap_(cont) { heap_.resize(1); // FIXME: currently do not support `make_heap` from cont (heap_) diff --git a/vpr/src/route/edge_groups.cpp b/vpr/src/route/edge_groups.cpp index 6b63f7d8823..9cc0255f157 100644 --- a/vpr/src/route/edge_groups.cpp +++ b/vpr/src/route/edge_groups.cpp @@ -75,8 +75,7 @@ void EdgeGroups::set_device_context(DeviceContext& device_ctx) { std::unordered_map rr_node_to_non_config_node_set; for (size_t set = 0; set < rr_non_config_node_sets.size(); ++set) { for (const auto inode : rr_non_config_node_sets[set]) { - rr_node_to_non_config_node_set.insert( - std::make_pair(inode, set)); + rr_node_to_non_config_node_set.insert(std::make_pair(inode, set)); } } diff --git a/vpr/src/route/heap_type.h b/vpr/src/route/heap_type.h index dd722928bcc..48f01c43100 100644 --- a/vpr/src/route/heap_type.h +++ b/vpr/src/route/heap_type.h @@ -34,9 +34,7 @@ struct HeapNode { * @brief The comparison function object used to sort heap, following the STL style. */ struct HeapNodeComparator { - bool operator()(const HeapNode& u, const HeapNode& v) { - return u.prio > v.prio; - } + bool operator()(const HeapNode& u, const HeapNode& v) { return u.prio > v.prio; } }; /** diff --git a/vpr/src/route/netlist_routers.h b/vpr/src/route/netlist_routers.h index d5f5354a392..8d6ce3c0a0e 100644 --- a/vpr/src/route/netlist_routers.h +++ b/vpr/src/route/netlist_routers.h @@ -64,8 +64,8 @@ class NetlistRouter { /* Include the derived classes here to get the HeapType-templated impls */ #include "SerialNetlistRouter.h" #ifdef VPR_USE_TBB -# include "ParallelNetlistRouter.h" -# include "DecompNetlistRouter.h" +#include "ParallelNetlistRouter.h" +#include "DecompNetlistRouter.h" #endif template @@ -84,51 +84,21 @@ inline std::unique_ptr make_netlist_router_with_heap( bool is_flat) { if (router_opts.router_algorithm == e_router_algorithm::TIMING_DRIVEN) { return std::make_unique>( - net_list, - router_lookahead, - router_opts, - connections_inf, - net_delay, - netlist_pin_lookup, - timing_info, - pin_timing_invalidator, - budgeting_inf, - routing_predictor, - choking_spots, - is_flat); + net_list, router_lookahead, router_opts, connections_inf, net_delay, netlist_pin_lookup, timing_info, + pin_timing_invalidator, budgeting_inf, routing_predictor, choking_spots, is_flat); } else if (router_opts.router_algorithm == e_router_algorithm::PARALLEL) { #ifdef VPR_USE_TBB return std::make_unique>( - net_list, - router_lookahead, - router_opts, - connections_inf, - net_delay, - netlist_pin_lookup, - timing_info, - pin_timing_invalidator, - budgeting_inf, - routing_predictor, - choking_spots, - is_flat); + net_list, router_lookahead, router_opts, connections_inf, net_delay, netlist_pin_lookup, timing_info, + pin_timing_invalidator, budgeting_inf, routing_predictor, choking_spots, is_flat); #else VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "VPR isn't compiled with TBB support required for parallel routing"); #endif } else if (router_opts.router_algorithm == e_router_algorithm::PARALLEL_DECOMP) { #ifdef VPR_USE_TBB return std::make_unique>( - net_list, - router_lookahead, - router_opts, - connections_inf, - net_delay, - netlist_pin_lookup, - timing_info, - pin_timing_invalidator, - budgeting_inf, - routing_predictor, - choking_spots, - is_flat); + net_list, router_lookahead, router_opts, connections_inf, net_delay, netlist_pin_lookup, timing_info, + pin_timing_invalidator, budgeting_inf, routing_predictor, choking_spots, is_flat); #else VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "VPR isn't compiled with TBB support required for parallel routing"); #endif @@ -153,32 +123,12 @@ inline std::unique_ptr make_netlist_router( bool is_flat) { if (router_opts.router_heap == e_heap_type::BINARY_HEAP) { return make_netlist_router_with_heap( - net_list, - router_lookahead, - router_opts, - connections_inf, - net_delay, - netlist_pin_lookup, - timing_info, - pin_timing_invalidator, - budgeting_inf, - routing_predictor, - choking_spots, - is_flat); + net_list, router_lookahead, router_opts, connections_inf, net_delay, netlist_pin_lookup, timing_info, + pin_timing_invalidator, budgeting_inf, routing_predictor, choking_spots, is_flat); } else if (router_opts.router_heap == e_heap_type::FOUR_ARY_HEAP) { return make_netlist_router_with_heap( - net_list, - router_lookahead, - router_opts, - connections_inf, - net_delay, - netlist_pin_lookup, - timing_info, - pin_timing_invalidator, - budgeting_inf, - routing_predictor, - choking_spots, - is_flat); + net_list, router_lookahead, router_opts, connections_inf, net_delay, netlist_pin_lookup, timing_info, + pin_timing_invalidator, budgeting_inf, routing_predictor, choking_spots, is_flat); } else { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Unknown heap type %d", router_opts.router_heap); } diff --git a/vpr/src/route/overuse_report.cpp b/vpr/src/route/overuse_report.cpp index 688388b8689..7e65302e3dc 100644 --- a/vpr/src/route/overuse_report.cpp +++ b/vpr/src/route/overuse_report.cpp @@ -75,16 +75,13 @@ void log_overused_nodes_status(int max_logged_overused_rr_nodes) { * This report will be generated only if the last routing attempt fails, which * causes the whole VPR flow to fail. */ -void report_overused_nodes(const Netlist<>& net_list, - const RRGraphView& rr_graph, - bool is_flat) { +void report_overused_nodes(const Netlist<>& net_list, const RRGraphView& rr_graph, bool is_flat) { const auto& route_ctx = g_vpr_ctx.routing(); /* Generate overuse info lookup table */ std::map> over_used_nodes_to_nets_lookup; std::map> rr_node_to_net_map; - generate_overused_nodes_to_congested_net_lookup(net_list, - over_used_nodes_to_nets_lookup); + generate_overused_nodes_to_congested_net_lookup(net_list, over_used_nodes_to_nets_lookup); generate_node_to_net_lookup(net_list, rr_node_to_net_map); /* Open the report file and print header info */ @@ -116,9 +113,7 @@ void report_overused_nodes(const Netlist<>& net_list, switch (node_type) { case IPIN: case OPIN: - report_overused_ipin_opin(os, - node_id, - rr_node_to_net_map); + report_overused_ipin_opin(os, node_id, rr_node_to_net_map); report_sinks = true; x -= g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num})->width; y -= g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num})->width; @@ -140,14 +135,7 @@ void report_overused_nodes(const Netlist<>& net_list, /* Finished printing the node info. Now print out the * * info on the nets passing through this overused node */ os << "-----------------------------\n"; //Separation line - report_congested_nets(net_list, - g_vpr_ctx.atom().lookup, - os, - congested_nets, - is_flat, - layer_num, - x, - y, + report_congested_nets(net_list, g_vpr_ctx.atom().lookup, os, congested_nets, is_flat, layer_num, x, y, report_sinks); ++inode; @@ -215,29 +203,26 @@ static void report_overused_ipin_opin(std::ostream& os, auto grid_y = rr_graph.node_ylow(node_id); auto grid_layer = rr_graph.node_layer(node_id); - VTR_ASSERT_MSG( - grid_x == rr_graph.node_xhigh(node_id) && grid_y == rr_graph.node_yhigh(node_id), - "Non-track RR node should not span across multiple grid blocks."); + VTR_ASSERT_MSG(grid_x == rr_graph.node_xhigh(node_id) && grid_y == rr_graph.node_yhigh(node_id), + "Non-track RR node should not span across multiple grid blocks."); os << "Pin physical number = " << rr_graph.node_pin_num(node_id) << '\n'; if (is_inter_cluster_node(rr_graph, node_id)) { os << "On Tile Pin" << "\n"; } else { - auto pb_type_name = get_pb_graph_node_from_pin_physical_num(device_ctx.grid.get_physical_type({grid_x, grid_y, grid_layer}), - rr_graph.node_ptc_num(node_id)) - ->pb_type->name; + auto pb_type_name + = get_pb_graph_node_from_pin_physical_num(device_ctx.grid.get_physical_type({grid_x, grid_y, grid_layer}), + rr_graph.node_ptc_num(node_id)) + ->pb_type->name; auto pb_pin = get_pb_pin_from_pin_physical_num(device_ctx.grid.get_physical_type({grid_x, grid_y, grid_layer}), rr_graph.node_ptc_num(node_id)); os << "Intra-Tile Pin - Port : " << pb_pin->port->name << " - PB Type : " << std::string(pb_type_name) << "\n"; } - print_block_pins_nets(os, - device_ctx.grid.get_physical_type({grid_x, grid_y, grid_layer}), - grid_layer, + print_block_pins_nets(os, device_ctx.grid.get_physical_type({grid_x, grid_y, grid_layer}), grid_layer, grid_x - device_ctx.grid.get_width_offset({grid_x, grid_y, grid_layer}), grid_y - device_ctx.grid.get_height_offset({grid_x, grid_y, grid_layer}), - rr_graph.node_ptc_num(node_id), - rr_node_to_net_map); + rr_graph.node_ptc_num(node_id), rr_node_to_net_map); os << "Side = " << rr_graph.node_side_string(node_id) << "\n\n"; //Add block type for IPINs/OPINs in overused rr-node report @@ -245,7 +230,8 @@ static void report_overused_ipin_opin(std::ostream& os, const auto& grid_info = place_ctx.grid_blocks(); os << "Grid location: X = " << grid_x << ", Y = " << grid_y << '\n'; - os << "Number of blocks currently occupying this grid location = " << grid_info.get_usage({grid_x, grid_y, grid_layer}) << '\n'; + os << "Number of blocks currently occupying this grid location = " + << grid_info.get_usage({grid_x, grid_y, grid_layer}) << '\n'; size_t iblock = 0; for (int isubtile = 0; isubtile < (int)grid_info.num_blocks_at_location({grid_x, grid_y, grid_layer}); ++isubtile) { @@ -285,9 +271,8 @@ static void report_overused_source_sink(std::ostream& os, RRNodeId node_id) { auto grid_x = rr_graph.node_xlow(node_id); auto grid_y = rr_graph.node_ylow(node_id); - VTR_ASSERT_MSG( - grid_x == rr_graph.node_xhigh(node_id) && grid_y == rr_graph.node_yhigh(node_id), - "Non-track RR node should not span across multiple grid blocks."); + VTR_ASSERT_MSG(grid_x == rr_graph.node_xhigh(node_id) && grid_y == rr_graph.node_yhigh(node_id), + "Non-track RR node should not span across multiple grid blocks."); os << "Class number = " << rr_graph.node_class_num(node_id) << '\n'; os << "Grid location: X = " << grid_x << ", Y = " << grid_y << '\n'; @@ -320,7 +305,8 @@ static void report_congested_nets(const Netlist<>& net_list, if (is_flat) { AtomBlockId atom_blk_id = convert_to_atom_block_id(block_id); os << "Driving block name = " << atom_lookup.atom_pb(atom_blk_id)->name << ", "; - os << "Driving block type = " << g_vpr_ctx.clustering().clb_nlist.block_type(atom_lookup.atom_clb(atom_blk_id))->name << '\n'; + os << "Driving block type = " + << g_vpr_ctx.clustering().clb_nlist.block_type(atom_lookup.atom_clb(atom_blk_id))->name << '\n'; } else { ClusterBlockId clb_blk_id = convert_to_cluster_block_id(block_id); os << "Driving block name = " << g_vpr_ctx.clustering().clb_nlist.block_pb(clb_blk_id)->name << ", "; @@ -339,17 +325,30 @@ static void report_congested_nets(const Netlist<>& net_list, auto cluster_loc = g_vpr_ctx.placement().block_locs()[cluster_block_id]; auto physical_type = g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num}); int cluster_layer_num = cluster_loc.loc.layer; - int cluster_x = cluster_loc.loc.x - g_vpr_ctx.device().grid.get_physical_type({cluster_loc.loc.x, cluster_loc.loc.y, cluster_layer_num})->width; - int cluster_y = cluster_loc.loc.y - g_vpr_ctx.device().grid.get_physical_type({cluster_loc.loc.x, cluster_loc.loc.y, cluster_layer_num})->height; + int cluster_x + = cluster_loc.loc.x + - g_vpr_ctx.device() + .grid.get_physical_type({cluster_loc.loc.x, cluster_loc.loc.y, cluster_layer_num}) + ->width; + int cluster_y + = cluster_loc.loc.y + - g_vpr_ctx.device() + .grid.get_physical_type({cluster_loc.loc.x, cluster_loc.loc.y, cluster_layer_num}) + ->height; if (cluster_x == x && cluster_y == y) { - VTR_ASSERT(physical_type == g_vpr_ctx.device().grid.get_physical_type({cluster_x, cluster_y, cluster_layer_num})); + VTR_ASSERT(physical_type + == g_vpr_ctx.device().grid.get_physical_type({cluster_x, cluster_y, cluster_layer_num})); os << "Sink in the same location = " << "\n"; if (is_flat) { auto pb_pin = atom_lookup.atom_pin_pb_graph_pin(convert_to_atom_pin_id(sink_id)); auto pb_net_list = atom_lookup.atom_pb(convert_to_atom_block_id(net_list.pin_block(sink_id))); os << " " - << "Pin Logical Num: " << pb_pin->pin_count_in_cluster << " PB Type: " << pb_pin->parent_node->pb_type->name << " Netlist PB: " << pb_net_list->name << " Parent PB Type: " << pb_net_list->parent_pb->pb_graph_node->pb_type->name << "Parent Netlist PB : " << pb_net_list->parent_pb->name << "\n"; + << "Pin Logical Num: " << pb_pin->pin_count_in_cluster + << " PB Type: " << pb_pin->parent_node->pb_type->name + << " Netlist PB: " << pb_net_list->name + << " Parent PB Type: " << pb_net_list->parent_pb->pb_graph_node->pb_type->name + << "Parent Netlist PB : " << pb_net_list->parent_pb->name << "\n"; os << " " << "Hierarchical Type Name : " << pb_pin->parent_node->hierarchical_type_name() << "\n"; } else { @@ -366,10 +365,18 @@ static void report_congested_nets(const Netlist<>& net_list, ///@brief Print out a single-line info that corresponds to a single overused rr node in the logfile static void log_overused_nodes_header() { VTR_LOG("Routing Failure Diagnostics: Printing Overused Nodes Information\n"); - VTR_LOG("------ ------- ---------- --------- -------- ------------ ------- ------- ------- ------- ------- ------- -------\n"); - VTR_LOG(" No. NodeId Occupancy Capacity RR Node Direction Side PTC Block Xlow Ylow Xhigh Yhigh\n"); - VTR_LOG(" type NUM Name \n"); - VTR_LOG("------ ------- ---------- --------- -------- ------------ ------- ------- ------- ------- ------- ------- -------\n"); + VTR_LOG( + "------ ------- ---------- --------- -------- ------------ ------- ------- ------- ------- ------- ------- " + "-------\n"); + VTR_LOG( + " No. NodeId Occupancy Capacity RR Node Direction Side PTC Block Xlow Ylow Xhigh " + "Yhigh\n"); + VTR_LOG( + " type NUM Name " + " \n"); + VTR_LOG( + "------ ------- ---------- --------- -------- ------------ ------- ------- ------- ------- ------- ------- " + "-------\n"); } ///@brief Print out a single-line info that corresponds to a single overused rr node in the logfile @@ -459,15 +466,13 @@ void print_block_pins_nets(std::ostream& os, VTR_ASSERT(logical_block != nullptr); auto pb_graph_node = get_pb_pin_from_pin_physical_num(physical_type, pin_physical_num); VTR_ASSERT(pb_graph_node != nullptr); - pin_num_range = get_pb_graph_node_pins(physical_type, - sub_tile, - logical_block, - rel_cap, - pb_graph_node->parent_node); + pin_num_range + = get_pb_graph_node_pins(physical_type, sub_tile, logical_block, rel_cap, pb_graph_node->parent_node); } for (int pin = pin_num_range.low; pin <= pin_num_range.high; pin++) { - t_rr_type rr_type = (get_pin_type_from_pin_physical_num(physical_type, pin) == DRIVER) ? t_rr_type::OPIN : t_rr_type::IPIN; + t_rr_type rr_type + = (get_pin_type_from_pin_physical_num(physical_type, pin) == DRIVER) ? t_rr_type::OPIN : t_rr_type::IPIN; RRNodeId node_id = get_pin_rr_node_id(rr_graph.node_lookup(), physical_type, layer, root_x, root_y, pin); VTR_ASSERT(node_id != RRNodeId::INVALID()); auto search_result = rr_node_to_net_map.find(node_id); diff --git a/vpr/src/route/overuse_report.h b/vpr/src/route/overuse_report.h index ff48e170cfe..1f62398bcd3 100644 --- a/vpr/src/route/overuse_report.h +++ b/vpr/src/route/overuse_report.h @@ -24,9 +24,7 @@ void log_overused_nodes_status(int max_logged_overused_rr_nodes); ///@brief Print out RR node overuse info in a post-VPR report file. -void report_overused_nodes(const Netlist<>& net_list, - const RRGraphView& rr_graph, - bool is_flat); +void report_overused_nodes(const Netlist<>& net_list, const RRGraphView& rr_graph, bool is_flat); ///@brief Generate a overused RR nodes to congested nets lookup table. void generate_overused_nodes_to_congested_net_lookup(const Netlist<>& net_list, diff --git a/vpr/src/route/partition_tree.cpp b/vpr/src/route/partition_tree.cpp index b679fb90a17..277132ea12a 100644 --- a/vpr/src/route/partition_tree.cpp +++ b/vpr/src/route/partition_tree.cpp @@ -14,7 +14,12 @@ PartitionTree::PartitionTree(const Netlist<>& netlist) { _root = build_helper(netlist, all_nets, 0, 0, device_ctx.grid.width() - 1, device_ctx.grid.height() - 1); } -std::unique_ptr PartitionTree::build_helper(const Netlist<>& netlist, const std::vector& nets, int x1, int y1, int x2, int y2) { +std::unique_ptr PartitionTree::build_helper(const Netlist<>& netlist, + const std::vector& nets, + int x1, + int y1, + int x2, + int y2) { if (nets.empty()) return nullptr; diff --git a/vpr/src/route/partition_tree.h b/vpr/src/route/partition_tree.h index ac15fea4bcd..94c6f5218e1 100644 --- a/vpr/src/route/partition_tree.h +++ b/vpr/src/route/partition_tree.h @@ -9,21 +9,17 @@ #include #ifdef VPR_USE_TBB -# include +#include #endif /** Self-descriptive */ -enum class Axis { X, - Y }; +enum class Axis { X, Y }; /** Which side of a line? */ -enum class Side { LEFT = 0, - RIGHT = 1 }; +enum class Side { LEFT = 0, RIGHT = 1 }; /** Invert side */ -inline Side operator!(const Side& rhs) { - return Side(!size_t(rhs)); -} +inline Side operator!(const Side& rhs) { return Side(!size_t(rhs)); } /** Part of a net in the context of the \ref DecompNetlistRouter. Sinks and routing resources * routable/usable by the \ref ConnectionRouter are constrained to ones inside clipped_bb @@ -85,7 +81,12 @@ class PartitionTree { private: std::unique_ptr _root; - std::unique_ptr build_helper(const Netlist<>& netlist, const std::vector& nets, int x1, int y1, int x2, int y2); + std::unique_ptr build_helper(const Netlist<>& netlist, + const std::vector& nets, + int x1, + int y1, + int x2, + int y2); }; #ifdef VPR_DEBUG_PARTITION_TREE diff --git a/vpr/src/route/route.cpp b/vpr/src/route/route.cpp index ffc430f6fce..ce047534520 100644 --- a/vpr/src/route/route.cpp +++ b/vpr/src/route/route.cpp @@ -51,17 +51,8 @@ bool route(const Netlist<>& net_list, /* Set up the routing resource graph defined by this FPGA architecture. */ int warning_count; - create_rr_graph(graph_type, - device_ctx.physical_tile_types, - device_ctx.grid, - chan_width, - det_routing_arch, - segment_inf, - router_opts, - directs, - num_directs, - &warning_count, - is_flat); + create_rr_graph(graph_type, device_ctx.physical_tile_types, device_ctx.grid, chan_width, det_routing_arch, + segment_inf, router_opts, directs, num_directs, &warning_count, is_flat); //Initialize drawing, now that we have an RR graph init_draw_coords(width_fac, g_vpr_ctx.placement().blk_loc_registry()); @@ -69,19 +60,13 @@ bool route(const Netlist<>& net_list, /* Allocate and load additional rr_graph information needed only by the router. */ alloc_and_load_rr_node_route_structs(); - init_route_structs(net_list, - router_opts.bb_factor, - router_opts.has_choke_point, - is_flat); + init_route_structs(net_list, router_opts.bb_factor, router_opts.has_choke_point, is_flat); IntraLbPbPinLookup intra_lb_pb_pin_lookup(device_ctx.logical_block_types); ClusteredPinAtomPinsLookup netlist_pin_lookup(cluster_ctx.clb_nlist, atom_ctx.nlist, intra_lb_pb_pin_lookup); - auto choking_spots = set_nets_choking_spots(net_list, - route_ctx.net_terminal_groups, - route_ctx.net_terminal_group_num, - router_opts.has_choke_point, - is_flat); + auto choking_spots = set_nets_choking_spots(net_list, route_ctx.net_terminal_groups, + route_ctx.net_terminal_group_num, router_opts.has_choke_point, is_flat); //Initially, the router runs normally trying to reduce congestion while //balancing other metrics (timing, wirelength, run-time etc.) @@ -98,12 +83,14 @@ bool route(const Netlist<>& net_list, if (router_opts.routing_failure_predictor == SAFE) { abort_iteration_threshold = ROUTING_PREDICTOR_ITERATION_ABORT_FACTOR_SAFE * router_opts.max_router_iterations; } else if (router_opts.routing_failure_predictor == AGGRESSIVE) { - abort_iteration_threshold = ROUTING_PREDICTOR_ITERATION_ABORT_FACTOR_AGGRESSIVE * router_opts.max_router_iterations; + abort_iteration_threshold + = ROUTING_PREDICTOR_ITERATION_ABORT_FACTOR_AGGRESSIVE * router_opts.max_router_iterations; } else { VTR_ASSERT_MSG(router_opts.routing_failure_predictor == OFF, "Unrecognized routing failure predictor setting"); } - float high_effort_congestion_mode_iteration_threshold = router_opts.congested_routing_iteration_threshold_frac * router_opts.max_router_iterations; + float high_effort_congestion_mode_iteration_threshold + = router_opts.congested_routing_iteration_threshold_frac * router_opts.max_router_iterations; /* Set delay of ignored signals to zero. Non-ignored net delays are set by * update_net_delays_from_route_tree() inside timing_driven_route_net(), @@ -121,12 +108,9 @@ bool route(const Netlist<>& net_list, route_budgets budgeting_inf(net_list, is_flat); // This needs to be called before filling intra-cluster lookahead maps to ensure that the intra-cluster lookahead maps are initialized. - const RouterLookahead* router_lookahead = get_cached_router_lookahead(*det_routing_arch, - router_opts.lookahead_type, - router_opts.write_router_lookahead, - router_opts.read_router_lookahead, - segment_inf, - is_flat); + const RouterLookahead* router_lookahead + = get_cached_router_lookahead(*det_routing_arch, router_opts.lookahead_type, router_opts.write_router_lookahead, + router_opts.read_router_lookahead, segment_inf, is_flat); if (is_flat) { // If is_flat is true, the router lookahead maps related to intra-cluster resources should be initialized since @@ -141,12 +125,9 @@ bool route(const Netlist<>& net_list, mut_router_lookahead->compute_intra_tile(); } route_ctx.cached_router_lookahead_.set(cache_key, std::move(mut_router_lookahead)); - router_lookahead = get_cached_router_lookahead(*det_routing_arch, - router_opts.lookahead_type, + router_lookahead = get_cached_router_lookahead(*det_routing_arch, router_opts.lookahead_type, router_opts.write_router_lookahead, - router_opts.read_router_lookahead, - segment_inf, - is_flat); + router_opts.read_router_lookahead, segment_inf, is_flat); if (!router_opts.write_intra_cluster_router_lookahead.empty()) { router_lookahead->write_intra_cluster(router_opts.write_intra_cluster_router_lookahead); } @@ -184,12 +165,8 @@ bool route(const Netlist<>& net_list, if (router_opts.with_timing_analysis && router_opts.initial_timing == e_router_initial_timing::LOOKAHEAD) { vtr::ScopedStartFinishTimer init_timing_timer("Initializing router criticalities"); //Estimate initial connection delays from the router lookahead - init_net_delay_from_lookahead(*router_lookahead, - net_list, - route_ctx.net_rr_terminals, - net_delay, - device_ctx.rr_graph, - is_flat); + init_net_delay_from_lookahead(*router_lookahead, net_list, route_ctx.net_rr_terminals, net_delay, + device_ctx.rr_graph, is_flat); //Run STA to get estimated criticalities timing_info->update(); @@ -198,28 +175,13 @@ bool route(const Netlist<>& net_list, } std::unique_ptr pin_timing_invalidator; - pin_timing_invalidator = make_net_pin_timing_invalidator( - router_opts.timing_update_type, - net_list, - netlist_pin_lookup, - atom_ctx.nlist, - atom_ctx.lookup, - *timing_info->timing_graph(), - is_flat); + pin_timing_invalidator + = make_net_pin_timing_invalidator(router_opts.timing_update_type, net_list, netlist_pin_lookup, atom_ctx.nlist, + atom_ctx.lookup, *timing_info->timing_graph(), is_flat); std::unique_ptr netlist_router = make_netlist_router( - net_list, - router_lookahead, - router_opts, - connections_inf, - net_delay, - netlist_pin_lookup, - timing_info, - pin_timing_invalidator.get(), - budgeting_inf, - routing_predictor, - choking_spots, - is_flat); + net_list, router_lookahead, router_opts, connections_inf, net_delay, netlist_pin_lookup, timing_info, + pin_timing_invalidator.get(), budgeting_inf, routing_predictor, choking_spots, is_flat); RouterStats router_stats; float prev_iter_cumm_time = 0; @@ -273,8 +235,7 @@ bool route(const Netlist<>& net_list, // Make sure any CLB OPINs used up by subblocks being hooked directly to them are reserved for that purpose bool rip_up_local_opins = (itry == 1 ? false : true); if (!is_flat) { - reserve_locally_used_opins(&small_heap, pres_fac, - router_opts.acc_fac, rip_up_local_opins, is_flat); + reserve_locally_used_opins(&small_heap, pres_fac, router_opts.acc_fac, rip_up_local_opins, is_flat); } /* @@ -311,7 +272,8 @@ bool route(const Netlist<>& net_list, float iter_elapsed_time = iter_cumm_time - prev_iter_cumm_time; //Output progress - print_route_status(itry, iter_elapsed_time, pres_fac, num_net_bounding_boxes_updated, iter_results.stats, overuse_info, wirelength_info, timing_info, est_success_iteration); + print_route_status(itry, iter_elapsed_time, pres_fac, num_net_bounding_boxes_updated, iter_results.stats, + overuse_info, wirelength_info, timing_info, est_success_iteration); prev_iter_cumm_time = iter_cumm_time; @@ -382,9 +344,9 @@ bool route(const Netlist<>& net_list, //Have we converged the maximum number of times, did not make any changes, or does it seem //unlikely additional convergences will improve QoR? - if (legal_convergence_count >= router_opts.max_convergence_count - || iter_results.stats.connections_routed == 0 - || early_reconvergence_exit_heuristic(router_opts, itry_since_last_convergence, timing_info, best_routing_metrics)) { + if (legal_convergence_count >= router_opts.max_convergence_count || iter_results.stats.connections_routed == 0 + || early_reconvergence_exit_heuristic(router_opts, itry_since_last_convergence, timing_info, + best_routing_metrics)) { #ifndef NO_GRAPHICS update_router_info_and_check_bp(BP_ROUTE_ITER, -1); #endif @@ -406,8 +368,10 @@ bool route(const Netlist<>& net_list, if (overuse_info.overused_nodes > ROUTING_PREDICTOR_MIN_ABSOLUTE_OVERUSE_THRESHOLD) { //Only consider aborting if we have a significant number of overused resources - if (!std::isnan(est_success_iteration) && est_success_iteration > abort_iteration_threshold && router_opts.routing_budgets_algorithm != YOYO) { - VTR_LOG("Routing aborted, the predicted iteration for a successful route (%.1f) is too high.\n", est_success_iteration); + if (!std::isnan(est_success_iteration) && est_success_iteration > abort_iteration_threshold + && router_opts.routing_budgets_algorithm != YOYO) { + VTR_LOG("Routing aborted, the predicted iteration for a successful route (%.1f) is too high.\n", + est_success_iteration); #ifndef NO_GRAPHICS update_router_info_and_check_bp(BP_ROUTE_ITER, -1); #endif @@ -458,7 +422,8 @@ bool route(const Netlist<>& net_list, constexpr float budget_increase_factor = 300e-12; if (itry > 5 && worst_negative_slack != 0) - rcv_finished = budgeting_inf.increase_min_budgets_if_struggling(budget_increase_factor, timing_info, worst_negative_slack, netlist_pin_lookup); + rcv_finished = budgeting_inf.increase_min_budgets_if_struggling( + budget_increase_factor, timing_info, worst_negative_slack, netlist_pin_lookup); if (rcv_finished) rcv_finished_count--; else @@ -535,10 +500,8 @@ bool route(const Netlist<>& net_list, if (should_ripup_for_delay) { if (connections_inf.critical_path_delay_grew_significantly(critical_path.delay())) { // only need to forcibly reroute if critical path grew significantly - stable_routing_configuration = connections_inf.forcibly_reroute_connections(router_opts.max_criticality, - timing_info, - netlist_pin_lookup, - net_delay); + stable_routing_configuration = connections_inf.forcibly_reroute_connections( + router_opts.max_criticality, timing_info, netlist_pin_lookup, net_delay); } } @@ -558,8 +521,10 @@ bool route(const Netlist<>& net_list, } } - if (router_opts.congestion_analysis) profiling::congestion_analysis(); - if (router_opts.fanout_analysis) profiling::time_on_fanout_analysis(); + if (router_opts.congestion_analysis) + profiling::congestion_analysis(); + if (router_opts.fanout_analysis) + profiling::time_on_fanout_analysis(); // profiling::time_on_criticality_analysis(); } @@ -608,18 +573,24 @@ bool route(const Netlist<>& net_list, VTR_ASSERT(router_stats.heap_pushes >= router_stats.intra_cluster_node_pushes); VTR_ASSERT(router_stats.heap_pops >= router_stats.intra_cluster_node_pops); VTR_LOG( - "Router Stats: total_nets_routed: %zu total_connections_routed: %zu total_heap_pushes: %zu total_heap_pops: %zu ", + "Router Stats: total_nets_routed: %zu total_connections_routed: %zu total_heap_pushes: %zu total_heap_pops: " + "%zu ", router_stats.nets_routed, router_stats.connections_routed, router_stats.heap_pushes, router_stats.heap_pops); #ifdef VTR_ENABLE_DEBUG_LOGGING VTR_LOG( - "total_internal_heap_pushes: %zu total_internal_heap_pops: %zu total_external_heap_pushes: %zu total_external_heap_pops: %zu ", + "total_internal_heap_pushes: %zu total_internal_heap_pops: %zu total_external_heap_pushes: %zu " + "total_external_heap_pops: %zu ", router_stats.intra_cluster_node_pushes, router_stats.intra_cluster_node_pops, router_stats.inter_cluster_node_pushes, router_stats.inter_cluster_node_pops); for (int node_type_idx = 0; node_type_idx < t_rr_type::NUM_RR_TYPES; node_type_idx++) { - VTR_LOG("total_external_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.inter_cluster_node_type_cnt_pushes[node_type_idx]); - VTR_LOG("total_external_%s_pops: %zu ", rr_node_typename[node_type_idx], router_stats.inter_cluster_node_type_cnt_pops[node_type_idx]); - VTR_LOG("total_internal_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.intra_cluster_node_type_cnt_pushes[node_type_idx]); - VTR_LOG("total_internal_%s_pops: %zu ", rr_node_typename[node_type_idx], router_stats.intra_cluster_node_type_cnt_pops[node_type_idx]); + VTR_LOG("total_external_%s_pushes: %zu ", rr_node_typename[node_type_idx], + router_stats.inter_cluster_node_type_cnt_pushes[node_type_idx]); + VTR_LOG("total_external_%s_pops: %zu ", rr_node_typename[node_type_idx], + router_stats.inter_cluster_node_type_cnt_pops[node_type_idx]); + VTR_LOG("total_internal_%s_pushes: %zu ", rr_node_typename[node_type_idx], + router_stats.intra_cluster_node_type_cnt_pushes[node_type_idx]); + VTR_LOG("total_internal_%s_pops: %zu ", rr_node_typename[node_type_idx], + router_stats.intra_cluster_node_type_cnt_pops[node_type_idx]); VTR_LOG("rt_node_%s_pushes: %zu ", rr_node_typename[node_type_idx], router_stats.rt_node_pushes[node_type_idx]); } #endif diff --git a/vpr/src/route/route_budgets.cpp b/vpr/src/route/route_budgets.cpp index 00dd14ae2bc..1face64438f 100644 --- a/vpr/src/route/route_budgets.cpp +++ b/vpr/src/route/route_budgets.cpp @@ -57,12 +57,9 @@ route_budgets::route_budgets(const Netlist<>& net_list, bool is_flat) : net_list_(net_list) , is_flat_(is_flat) - , set(false) { -} + , set(false) {} -route_budgets::~route_budgets() { - free_budgets(); -} +route_budgets::~route_budgets() { free_budgets(); } void route_budgets::free_budgets() { /*Free associated budget memory if set @@ -171,13 +168,16 @@ void route_budgets::calculate_delay_targets(ParentNetId net_id, ParentPinId pin_ // The minimum difference between target delay and minimum delay, mentioned in RCV paper constexpr double MIN_BUDGET_BUFFER = 0.1e-9; - delay_target[net_id][ipin] = std::min(0.5 * (delay_min_budget[net_id][ipin] + delay_max_budget[net_id][ipin]), delay_min_budget[net_id][ipin] + MIN_BUDGET_BUFFER); + delay_target[net_id][ipin] = std::min(0.5 * (delay_min_budget[net_id][ipin] + delay_max_budget[net_id][ipin]), + delay_min_budget[net_id][ipin] + MIN_BUDGET_BUFFER); } else { delay_target[net_id][ipin] = 0; } } -void route_budgets::allocate_slack_using_weights(NetPinsMatrix& net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup, bool negative_hold_slack) { +void route_budgets::allocate_slack_using_weights(NetPinsMatrix& net_delay, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup, + bool negative_hold_slack) { /*The minimax PERT algorithm uses a weight based approach to allocate slack for each connection * The formula used where c is a connection is * slack_allocated(c) = (slack(c)*weight(c)/max_weight_of_all_path_through(c)). @@ -210,7 +210,8 @@ void route_budgets::allocate_slack_using_weights(NetPinsMatrix& net_delay while ((iteration > 3 && max_budget_change > MAX_BUDGET_CHANGE_THRESHOLD) || iteration <= 3) { timing_info = perform_sta(delay_max_budget); - max_budget_change = minimax_PERT(original_timing_info, timing_info, delay_max_budget, net_delay, netlist_pin_lookup, SETUP, true, BOTH); + max_budget_change = minimax_PERT(original_timing_info, timing_info, delay_max_budget, net_delay, + netlist_pin_lookup, SETUP, true, BOTH); iteration++; if (iteration > 20) @@ -238,7 +239,8 @@ void route_budgets::allocate_slack_using_weights(NetPinsMatrix& net_delay /*Allocate the short path slack to decrease the budgets accordingly*/ while ((iteration > 3 && max_budget_change > MAX_BUDGET_CHANGE_THRESHOLD) || iteration <= 3) { timing_info_min = perform_sta(delay_min_budget); - max_budget_change = minimax_PERT(original_timing_info, timing_info_min, delay_min_budget, net_delay, netlist_pin_lookup, HOLD, true, POSITIVE); + max_budget_change = minimax_PERT(original_timing_info, timing_info_min, delay_min_budget, net_delay, + netlist_pin_lookup, HOLD, true, POSITIVE); iteration++; if (iteration > 20) @@ -259,14 +261,16 @@ void route_budgets::allocate_slack_using_weights(NetPinsMatrix& net_delay keep_budget_in_bounds(delay_min_budget); } timing_info_min = perform_sta(delay_min_budget); - max_budget_change = minimax_PERT(original_timing_info, timing_info_min, delay_min_budget, net_delay, netlist_pin_lookup, HOLD, false, POSITIVE); + max_budget_change = minimax_PERT(original_timing_info, timing_info_min, delay_min_budget, net_delay, + netlist_pin_lookup, HOLD, false, POSITIVE); iteration++; } /*budgets may go below minimum delay bound to optimize for setup time*/ keep_budget_above_value(delay_min_budget, bottom_range); } -void route_budgets::process_negative_slack_using_minimax(NetPinsMatrix& net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup) { +void route_budgets::process_negative_slack_using_minimax(NetPinsMatrix& net_delay, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup) { /*This function is an optional pre-processing for the maximum budgets. * This ensures that the short path slacks are also taken into account for the maximum budgets. * Ensures that maximum budgets will always be above minimum budgets. @@ -286,10 +290,12 @@ void route_budgets::process_negative_slack_using_minimax(NetPinsMatrix& n while (iteration < 20 && max_budget_change > MAX_BUDGET_CHANGE_THRESHOLD_PREPROCESSING) { if (iteration == 0) { - max_budget_change = minimax_PERT(original_timing_info, original_timing_info, delay_max_budget, net_delay, netlist_pin_lookup, HOLD, true, NEGATIVE); + max_budget_change = minimax_PERT(original_timing_info, original_timing_info, delay_max_budget, net_delay, + netlist_pin_lookup, HOLD, true, NEGATIVE); timing_info = perform_sta(delay_max_budget); } else { - second_max_budget_change = minimax_PERT(original_timing_info, timing_info, delay_max_budget, net_delay, netlist_pin_lookup, HOLD, true, NEGATIVE); + second_max_budget_change = minimax_PERT(original_timing_info, timing_info, delay_max_budget, net_delay, + netlist_pin_lookup, HOLD, true, NEGATIVE); max_budget_change = std::max(max_budget_change, second_max_budget_change); timing_info = perform_sta(delay_max_budget); } @@ -385,7 +391,8 @@ float route_budgets::minimax_PERT(std::shared_ptr orig_timi hold_path_slack = path_slack; } else { path_slack = calculate_clb_pin_slack(net_id, ipin, timing_info, netlist_pin_lookup, SETUP, atom_pin); - hold_path_slack = calculate_clb_pin_slack(net_id, ipin, orig_timing_info, netlist_pin_lookup, HOLD, atom_pin); + hold_path_slack + = calculate_clb_pin_slack(net_id, ipin, orig_timing_info, netlist_pin_lookup, HOLD, atom_pin); if (hold_path_slack > 0) { hold_path_slack = hold_path_slack * 0.70 - 300e-12; } else { @@ -405,14 +412,17 @@ float route_budgets::minimax_PERT(std::shared_ptr orig_timi /*During hold analysis, increase the budgets when there is negative slack. * During setup analysis, decrease the budgets when there is negative slack*/ - if ((slack_type == NEGATIVE && path_slack < 0) || (slack_type == POSITIVE && path_slack > 0) || slack_type == BOTH) { + if ((slack_type == NEGATIVE && path_slack < 0) || (slack_type == POSITIVE && path_slack > 0) + || slack_type == BOTH) { if (analysis_type == HOLD) { temp_budgets[net_id][ipin] += -1 * net_delay[net_id][ipin] * path_slack / total_path_delay; - max_budget_change = std::max(max_budget_change, std::abs(net_delay[net_id][ipin] * path_slack / total_path_delay)); + max_budget_change = std::max(max_budget_change, + std::abs(net_delay[net_id][ipin] * path_slack / total_path_delay)); } else { if ((slack_type == POSITIVE) || (hold_path_slack > 0)) { temp_budgets[net_id][ipin] += net_delay[net_id][ipin] * path_slack / total_path_delay; - max_budget_change = std::max(max_budget_change, std::abs(net_delay[net_id][ipin] * path_slack / total_path_delay)); + max_budget_change = std::max(max_budget_change, + std::abs(net_delay[net_id][ipin] * path_slack / total_path_delay)); } } } @@ -457,12 +467,14 @@ float route_budgets::calculate_clb_pin_slack(ParentNetId net_id, * minimum slack is used since it is guarantee then to be freed from long path problems */ for (const AtomPinId curr_atom_pin : netlist_pin_lookup.connected_atom_pins(convert_to_cluster_pin_id(pin))) { - if (timing_info->setup_pin_slack(curr_atom_pin) == std::numeric_limits::infinity() && type == SETUP) { + if (timing_info->setup_pin_slack(curr_atom_pin) == std::numeric_limits::infinity() + && type == SETUP) { if (curr_min_slack == delay_upper_bound[net_id][ipin]) { atom_pin = curr_atom_pin; } continue; - } else if (timing_info->hold_pin_slack(curr_atom_pin) == std::numeric_limits::infinity() && type == HOLD) { + } else if (timing_info->hold_pin_slack(curr_atom_pin) == std::numeric_limits::infinity() + && type == HOLD) { if (curr_min_slack == delay_upper_bound[net_id][ipin]) { atom_pin = curr_atom_pin; } @@ -627,12 +639,15 @@ void route_budgets::allocate_slack_using_delays_and_criticalities(NetPinsMatrix< //prevent invalid division delay_max_budget[net_id][ipin] = delay_upper_bound[net_id][ipin]; } else { - delay_max_budget[net_id][ipin] = std::min(net_delay[net_id][ipin] / pin_criticality, delay_upper_bound[net_id][ipin]); + delay_max_budget[net_id][ipin] + = std::min(net_delay[net_id][ipin] / pin_criticality, delay_upper_bound[net_id][ipin]); } check_if_budgets_in_bounds(net_id, pin_id); /*Use RCV algorithm for delay target * Tend towards minimum to consider short path timing delay more*/ - delay_target[net_id][ipin] = std::min(0.5 * (delay_min_budget[net_id][ipin] + delay_max_budget[net_id][ipin]), delay_min_budget[net_id][ipin] + 0.1e-9); + delay_target[net_id][ipin] + = std::min(0.5 * (delay_min_budget[net_id][ipin] + delay_max_budget[net_id][ipin]), + delay_min_budget[net_id][ipin] + 0.1e-9); } } } @@ -660,11 +675,13 @@ void route_budgets::check_if_budgets_in_bounds() { std::shared_ptr route_budgets::perform_sta(NetPinsMatrix& temp_budgets) { auto& atom_ctx = g_vpr_ctx.atom(); /*Perform static timing analysis to get the delay and path weights for slack allocation*/ - std::shared_ptr routing_delay_calc = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, temp_budgets, is_flat_); + std::shared_ptr routing_delay_calc + = std::make_shared(atom_ctx.nlist, atom_ctx.lookup, temp_budgets, is_flat_); //TODO: now that we support incremental timing updates, we should avoid re-building the timing analyzer from scratch and try // to calculate this incrementally - std::shared_ptr timing_info = make_setup_hold_timing_info(routing_delay_calc, e_timing_update_type::AUTO); + std::shared_ptr timing_info + = make_setup_hold_timing_info(routing_delay_calc, e_timing_update_type::AUTO); /*Unconstrained nodes should be warned in the main routing function, do not report it here*/ timing_info->set_warn_unconstrained(false); @@ -717,7 +734,8 @@ bool route_budgets::increase_min_budgets_if_struggling(float delay_increment, if ((negative_hold_slacks.size() == NUM_ITERATIONS_LOOKBACK)) { // Check if it's within a PERCENTAGE_CHANGE_THRESHOLD% difference float d_slack = negative_hold_slacks.back() - negative_hold_slacks.front(); - if (std::abs(d_slack) < std::abs(negative_hold_slacks.front() * PERCENT_CHANGE_THRESHOLD) && negative_hold_slacks.front() != 0) { + if (std::abs(d_slack) < std::abs(negative_hold_slacks.front() * PERCENT_CHANGE_THRESHOLD) + && negative_hold_slacks.front() != 0) { /*Increase the budgets by a delay increment when the congested times is high enough*/ for (auto net_id : net_list_.nets()) { for (auto pin_id : net_list_.net_sinks(net_id)) { @@ -734,7 +752,8 @@ bool route_budgets::increase_min_budgets_if_struggling(float delay_increment, break; } } else { - for (auto& atom_pin : netlist_pin_lookup.connected_atom_pins(convert_to_cluster_pin_id(pin_id))) { + for (auto& atom_pin : + netlist_pin_lookup.connected_atom_pins(convert_to_cluster_pin_id(pin_id))) { float hold_slack = timing_info->hold_pin_slack(atom_pin); if (hold_slack <= 0) { @@ -765,7 +784,8 @@ bool route_budgets::increase_min_budgets_if_struggling(float delay_increment, } // Increase short path criticality as well, this encourages the router to meet the lower delay budgets more aggresively - if (short_path_crit[net_id][ipin] < MAX_SHORT_PATH_CRIT) short_path_crit[net_id][ipin] *= 2; + if (short_path_crit[net_id][ipin] < MAX_SHORT_PATH_CRIT) + short_path_crit[net_id][ipin] *= 2; } } } @@ -851,63 +871,49 @@ void route_budgets::print_route_budget(std::string filename, NetPinsMatrix& temp_b fp << "Temporary Budgets:" << std::endl; for (auto net_id : net_list_.nets()) { - fp << std::endl - << "Net: " << size_t(net_id) << " "; + fp << std::endl << "Net: " << size_t(net_id) << " "; for (auto pin_id : net_list_.net_sinks(net_id)) { int ipin = net_list_.pin_net_index(pin_id); fp << temp_budgets[net_id][ipin] << " "; diff --git a/vpr/src/route/route_budgets.h b/vpr/src/route/route_budgets.h index 7518027b85f..e151f995ca9 100644 --- a/vpr/src/route/route_budgets.h +++ b/vpr/src/route/route_budgets.h @@ -9,16 +9,9 @@ #include #include "RoutingDelayCalculator.h" -enum analysis_type { - SETUP, - HOLD -}; +enum analysis_type { SETUP, HOLD }; -enum slack_allocated_type { - POSITIVE, - NEGATIVE, - BOTH -}; +enum slack_allocated_type { POSITIVE, NEGATIVE, BOTH }; #define UNINITIALIZED_PATH_DELAY -2. class route_budgets { @@ -47,7 +40,10 @@ class route_budgets { /*lower budgets during congestion*/ void update_congestion_times(ParentNetId net_id); - bool increase_min_budgets_if_struggling(float delay_decrement, std::shared_ptr timing_info, float worst_neg_slack, const ClusteredPinAtomPinsLookup& netlist_pin_lookup); + bool increase_min_budgets_if_struggling(float delay_decrement, + std::shared_ptr timing_info, + float worst_neg_slack, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup); void increase_short_crit(ParentNetId net_id, float delay_decs); void not_congested_this_iteration(ParentNetId net_id); @@ -67,7 +63,9 @@ class route_budgets { std::shared_ptr timing_info, const ClusteredPinAtomPinsLookup& netlist_pin_lookup, const t_router_opts& router_opts); - void allocate_slack_using_weights(NetPinsMatrix& net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup, bool negative_hold_slack); + void allocate_slack_using_weights(NetPinsMatrix& net_delay, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup, + bool negative_hold_slack); /*Sometimes want to allocate only positive or negative slack. * By default, allocate both*/ float minimax_PERT(std::shared_ptr orig_timing_info, @@ -79,7 +77,8 @@ class route_budgets { bool keep_in_bounds, slack_allocated_type slack_type = BOTH); - void process_negative_slack_using_minimax(NetPinsMatrix& net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup); + void process_negative_slack_using_minimax(NetPinsMatrix& net_delay, + const ClusteredPinAtomPinsLookup& netlist_pin_lookup); /*Perform static timing analysis*/ std::shared_ptr perform_sta(NetPinsMatrix& temp_budgets); diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp index 7fd9720e450..24dbe886683 100644 --- a/vpr/src/route/route_common.cpp +++ b/vpr/src/route/route_common.cpp @@ -43,8 +43,7 @@ static vtr::vector> load_net_rr_terminals(con const Netlist<>& net_list, bool is_flat); -static std::tuple>>, - vtr::vector>> +static std::tuple>>, vtr::vector>> load_net_terminal_groups(const RRGraphView& rr_graph, const Netlist<>& net_list, const vtr::vector>& net_rr_terminals, @@ -58,10 +57,12 @@ static t_clb_opins_used alloc_and_load_clb_opins_used_locally(); static void adjust_one_rr_occ_and_acc_cost(RRNodeId inode, int add_or_sub, float acc_fac); -static vtr::vector load_is_clock_net(const Netlist<>& net_list, - bool is_flat); +static vtr::vector load_is_clock_net(const Netlist<>& net_list, bool is_flat); -static bool classes_in_same_block(ParentBlockId blk_id, int first_class_ptc_num, int second_class_ptc_num, bool is_flat); +static bool classes_in_same_block(ParentBlockId blk_id, + int first_class_ptc_num, + int second_class_ptc_num, + bool is_flat); /************************** Subroutine definitions ***************************/ @@ -246,10 +247,7 @@ void pathfinder_update_cost_from_route_tree(const RouteTreeNode& root, int add_o /* Call this before you route any nets. It frees any old route trees and * sets the list of rr_nodes touched to empty. */ -void init_route_structs(const Netlist<>& net_list, - int bb_factor, - bool has_choking_point, - bool is_flat) { +void init_route_structs(const Netlist<>& net_list, int bb_factor, bool has_choking_point, bool is_flat) { auto& device_ctx = g_vpr_ctx.device(); auto& route_ctx = g_vpr_ctx.mutable_routing(); @@ -258,27 +256,19 @@ void init_route_structs(const Netlist<>& net_list, std::fill(route_ctx.route_trees.begin(), route_ctx.route_trees.end(), vtr::nullopt); //Various look-ups - route_ctx.net_rr_terminals = load_net_rr_terminals(device_ctx.rr_graph, - device_ctx.grid, - net_list, - is_flat); + route_ctx.net_rr_terminals = load_net_rr_terminals(device_ctx.rr_graph, device_ctx.grid, net_list, is_flat); route_ctx.is_clock_net = load_is_clock_net(net_list, is_flat); - route_ctx.route_bb = load_route_bb(net_list, - bb_factor); - route_ctx.rr_blk_source = load_rr_clb_sources(device_ctx.rr_graph, - net_list, - is_flat); + route_ctx.route_bb = load_route_bb(net_list, bb_factor); + route_ctx.rr_blk_source = load_rr_clb_sources(device_ctx.rr_graph, net_list, is_flat); route_ctx.clb_opins_used_locally = alloc_and_load_clb_opins_used_locally(); route_ctx.net_status.resize(net_list.nets().size()); route_ctx.is_flat = is_flat; if (has_choking_point && is_flat) { - std::tie(route_ctx.net_terminal_groups, route_ctx.net_terminal_group_num) = load_net_terminal_groups(device_ctx.rr_graph, - net_list, - route_ctx.net_rr_terminals, - is_flat); + std::tie(route_ctx.net_terminal_groups, route_ctx.net_terminal_group_num) + = load_net_terminal_groups(device_ctx.rr_graph, net_list, route_ctx.net_rr_terminals, is_flat); } } @@ -354,7 +344,8 @@ static t_clb_opins_used alloc_and_load_clb_opins_used_locally() { clb_opins_used_locally[blk_id].resize((int)type->class_inf.size()); - if (is_io_type(type)) continue; + if (is_io_type(type)) + continue; const auto [pin_low, pin_high] = get_pin_range_for_block(blk_id); @@ -457,22 +448,12 @@ static vtr::vector> load_net_rr_terminals(con int iclass = get_block_pin_class_num(block_id, pin_id, is_flat); RRNodeId inode; if (pin_count == 0) { /* First pin is driver */ - inode = rr_graph.node_lookup().find_node(blk_loc.loc.layer, - blk_loc.loc.x, - blk_loc.loc.y, - SOURCE, - iclass); + inode + = rr_graph.node_lookup().find_node(blk_loc.loc.layer, blk_loc.loc.x, blk_loc.loc.y, SOURCE, iclass); } else { - vtr::Rect tile_bb = grid.get_tile_bb({blk_loc.loc.x, - blk_loc.loc.y, - blk_loc.loc.layer}); - std::vector sink_nodes = rr_graph.node_lookup().find_nodes_in_range(blk_loc.loc.layer, - tile_bb.xmin(), - tile_bb.ymin(), - tile_bb.xmax(), - tile_bb.ymax(), - SINK, - iclass); + vtr::Rect tile_bb = grid.get_tile_bb({blk_loc.loc.x, blk_loc.loc.y, blk_loc.loc.layer}); + std::vector sink_nodes = rr_graph.node_lookup().find_nodes_in_range( + blk_loc.loc.layer, tile_bb.xmin(), tile_bb.ymin(), tile_bb.xmax(), tile_bb.ymax(), SINK, iclass); VTR_ASSERT_SAFE(sink_nodes.size() == 1); inode = sink_nodes[0]; } @@ -487,8 +468,7 @@ static vtr::vector> load_net_rr_terminals(con return net_rr_terminals; } -static std::tuple>>, - vtr::vector>> +static std::tuple>>, vtr::vector>> load_net_terminal_groups(const RRGraphView& rr_graph, const Netlist<>& net_list, const vtr::vector>& net_rr_terminals, @@ -522,10 +502,8 @@ load_net_terminal_groups(const RRGraphView& rr_graph, const auto& curr_grp = net_terminal_groups[net_id][curr_grp_num]; auto group_loc = get_block_loc(net_pin_blk_id[rr_node_pin_num.at(RRNodeId(curr_grp[0]))], is_flat); if (blk_loc.loc == group_loc.loc) { - if (classes_in_same_block(block_id, - rr_graph.node_ptc_num(RRNodeId(curr_grp[0])), - rr_graph.node_ptc_num(net_rr_terminals[net_id][pin_count]), - is_flat)) { + if (classes_in_same_block(block_id, rr_graph.node_ptc_num(RRNodeId(curr_grp[0])), + rr_graph.node_ptc_num(net_rr_terminals[net_id][pin_count]), is_flat)) { group_num = curr_grp_num; break; } @@ -584,11 +562,8 @@ static vtr::vector> load_rr_clb_sources(con rr_type = SINK; } - RRNodeId inode = rr_graph.node_lookup().find_node(blk_loc.loc.layer, - blk_loc.loc.x, - blk_loc.loc.y, - rr_type, - iclass); + RRNodeId inode = rr_graph.node_lookup().find_node(blk_loc.loc.layer, blk_loc.loc.x, blk_loc.loc.y, + rr_type, iclass); rr_blk_source[blk_id][iclass] = inode; } else { rr_blk_source[blk_id][iclass] = RRNodeId::INVALID(); @@ -599,8 +574,7 @@ static vtr::vector> load_rr_clb_sources(con return rr_blk_source; } -static vtr::vector load_is_clock_net(const Netlist<>& net_list, - bool is_flat) { +static vtr::vector load_is_clock_net(const Netlist<>& net_list, bool is_flat) { vtr::vector is_clock_net; auto& atom_ctx = g_vpr_ctx.atom(); @@ -621,13 +595,15 @@ static vtr::vector load_is_clock_net(const Netlist<>& net_ return is_clock_net; } -static bool classes_in_same_block(ParentBlockId blk_id, int first_class_ptc_num, int second_class_ptc_num, bool is_flat) { +static bool classes_in_same_block(ParentBlockId blk_id, + int first_class_ptc_num, + int second_class_ptc_num, + bool is_flat) { t_physical_tile_type_ptr physical_tile = physical_tile_type(blk_id, is_flat); return classes_in_same_block(physical_tile, first_class_ptc_num, second_class_ptc_num, is_flat); } -vtr::vector load_route_bb(const Netlist<>& net_list, - int bb_factor) { +vtr::vector load_route_bb(const Netlist<>& net_list, int bb_factor) { vtr::vector route_bb; auto& route_ctx = g_vpr_ctx.routing(); @@ -647,9 +623,7 @@ vtr::vector load_route_bb(const Netlist<>& net_list, route_bb.resize(nets.size()); for (auto net_id : nets) { if (!route_ctx.is_clock_net[net_id]) { - route_bb[net_id] = load_net_route_bb(net_list, - net_id, - bb_factor); + route_bb[net_id] = load_net_route_bb(net_list, net_id, bb_factor); } else { // Clocks should use a bounding box that includes the entire // fabric. This is because when a clock spine extends from a global @@ -674,9 +648,7 @@ vtr::vector load_route_bb(const Netlist<>& net_list, return route_bb; } -t_bb load_net_route_bb(const Netlist<>& net_list, - ParentNetId net_id, - int bb_factor) { +t_bb load_net_route_bb(const Netlist<>& net_list, ParentNetId net_id, int bb_factor) { /* * This routine loads the bounding box used to limit the space * searched by the maze router when routing a specific net. The search is @@ -725,9 +697,8 @@ t_bb load_net_route_bb(const Netlist<>& net_list, VTR_ASSERT(rr_graph.node_layer(sink_rr) >= 0); VTR_ASSERT(rr_graph.node_layer(sink_rr) <= device_ctx.grid.get_num_layers() - 1); - vtr::Rect tile_bb = device_ctx.grid.get_tile_bb({rr_graph.node_xlow(sink_rr), - rr_graph.node_ylow(sink_rr), - rr_graph.node_layer(sink_rr)}); + vtr::Rect tile_bb = device_ctx.grid.get_tile_bb( + {rr_graph.node_xlow(sink_rr), rr_graph.node_ylow(sink_rr), rr_graph.node_layer(sink_rr)}); xmin = std::min(xmin, tile_bb.xmin()); xmax = std::max(xmax, tile_bb.xmax()); @@ -779,7 +750,11 @@ void add_to_mod_list(RRNodeId inode, std::vector& modified_rr_node_inf // // To model this we 'reserve' these locally used outputs, ensuring that the router will not use them (as if it did // this would equate to duplicating a BLE into an already in-use BLE instance, which is clearly incorrect). -void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_fac, bool rip_up_local_opins, bool is_flat) { +void reserve_locally_used_opins(HeapInterface* heap, + float pres_fac, + float acc_fac, + bool rip_up_local_opins, + bool is_flat) { VTR_ASSERT(is_flat == false); int num_local_opin, iconn, num_edges; int iclass, ipin; @@ -800,7 +775,8 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f for (iclass = 0; iclass < (int)type->class_inf.size(); iclass++) { num_local_opin = route_ctx.clb_opins_used_locally[blk_id][iclass].size(); - if (num_local_opin == 0) continue; + if (num_local_opin == 0) + continue; auto port_eq = get_port_equivalency_from_class_physical_num(type, iclass); VTR_ASSERT(port_eq == PortEquivalence::INSTANCE); @@ -823,7 +799,8 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f for (iclass = 0; iclass < (int)type->class_inf.size(); iclass++) { num_local_opin = route_ctx.clb_opins_used_locally[blk_id][iclass].size(); - if (num_local_opin == 0) continue; + if (num_local_opin == 0) + continue; auto class_eq = get_port_equivalency_from_class_physical_num(type, iclass); VTR_ASSERT(class_eq == PortEquivalence::INSTANCE); @@ -910,7 +887,9 @@ void print_invalid_routing_info(const Netlist<>& net_list, bool is_flat) { int occ = route_ctx.rr_node_route_inf[inode].occ(); int cap = rr_graph.node_capacity(inode); if (occ > cap) { - VTR_LOG(" %s is overused (occ=%d capacity=%d)\n", describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat).c_str(), occ, cap); + VTR_LOG(" %s is overused (occ=%d capacity=%d)\n", + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, inode, is_flat).c_str(), + occ, cap); auto range = rr_node_nets.equal_range(inode); for (auto itr = range.first; itr != range.second; ++itr) { @@ -921,9 +900,10 @@ void print_invalid_routing_info(const Netlist<>& net_list, bool is_flat) { auto blk = net_list.pin_block(pin); blk_loc = get_block_loc(blk, is_flat); if (blk_loc.loc.x == node_x && blk_loc.loc.y == node_y) { - VTR_LOG(" Is in the same cluster: %s \n", describe_rr_node(rr_graph, device_ctx.grid, - device_ctx.rr_indexed_data, itr->first, is_flat) - .c_str()); + VTR_LOG( + " Is in the same cluster: %s \n", + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, itr->first, is_flat) + .c_str()); } } } @@ -941,15 +921,14 @@ void print_rr_node_route_inf() { RREdgeId prev_edge = inf.prev_edge; RRNodeId prev_node = rr_graph.edge_src_node(prev_edge); auto switch_id = rr_graph.rr_nodes().edge_switch(prev_edge); - VTR_LOG("rr_node: %d prev_node: %d prev_edge: %zu", - inode, prev_node, (size_t)prev_edge); + VTR_LOG("rr_node: %d prev_node: %d prev_edge: %zu", inode, prev_node, (size_t)prev_edge); - if (prev_node.is_valid() && bool(prev_edge) && !rr_graph.rr_switch_inf(RRSwitchId(switch_id)).configurable()) { + if (prev_node.is_valid() && bool(prev_edge) + && !rr_graph.rr_switch_inf(RRSwitchId(switch_id)).configurable()) { VTR_LOG("*"); } - VTR_LOG(" pcost: %g back_pcost: %g\n", - inf.path_cost, inf.backward_path_cost); + VTR_LOG(" pcost: %g back_pcost: %g\n", inf.path_cost, inf.backward_path_cost); } } } @@ -998,7 +977,8 @@ std::string describe_unrouteable_connection(RRNodeId source_node, RRNodeId sink_ "Cannot route from %s (%s) to " "%s (%s) -- no possible path", rr_node_arch_name(source_node, is_flat).c_str(), - describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, source_node, is_flat).c_str(), + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, source_node, is_flat) + .c_str(), rr_node_arch_name(sink_node, is_flat).c_str(), describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, sink_node, is_flat).c_str()); diff --git a/vpr/src/route/route_common.h b/vpr/src/route/route_common.h index 1d6bfb58082..94f80e1a31d 100644 --- a/vpr/src/route/route_common.h +++ b/vpr/src/route/route_common.h @@ -37,12 +37,9 @@ inline bool inside_bb(RRNodeId inode, const t_bb& bb) { return x >= bb.xmin && x <= bb.xmax && y >= bb.ymin && y <= bb.ymax && z >= bb.layer_min && z <= bb.layer_max; } -vtr::vector load_route_bb(const Netlist<>& net_list, - int bb_factor); +vtr::vector load_route_bb(const Netlist<>& net_list, int bb_factor); -t_bb load_net_route_bb(const Netlist<>& net_list, - ParentNetId net_id, - int bb_factor); +t_bb load_net_route_bb(const Netlist<>& net_list, ParentNetId net_id, int bb_factor); void pathfinder_update_single_node_occupancy(RRNodeId inode, int add_or_sub); @@ -104,27 +101,30 @@ inline float get_single_rr_cong_cost(RRNodeId inode, float pres_fac) { auto cost_index = rr_graph.node_cost_index(inode); - float cost = device_ctx.rr_indexed_data[cost_index].base_cost * route_ctx.rr_node_route_inf[inode].acc_cost * pres_cost; + float cost + = device_ctx.rr_indexed_data[cost_index].base_cost * route_ctx.rr_node_route_inf[inode].acc_cost * pres_cost; - VTR_ASSERT_DEBUG_MSG( - cost == get_single_rr_cong_base_cost(inode) * get_single_rr_cong_acc_cost(inode) * get_single_rr_cong_pres_cost(inode, pres_fac), - "Single rr node congestion cost is inaccurate"); + VTR_ASSERT_DEBUG_MSG(cost + == get_single_rr_cong_base_cost(inode) * get_single_rr_cong_acc_cost(inode) + * get_single_rr_cong_pres_cost(inode, pres_fac), + "Single rr node congestion cost is inaccurate"); return cost; } void add_to_mod_list(RRNodeId inode, std::vector& modified_rr_node_inf); -void init_route_structs(const Netlist<>& net_list, - int bb_factor, - bool has_choking_point, - bool is_flat); +void init_route_structs(const Netlist<>& net_list, int bb_factor, bool has_choking_point, bool is_flat); void alloc_and_load_rr_node_route_structs(); void reset_rr_node_route_structs(); -void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_fac, bool rip_up_local_opins, bool is_flat); +void reserve_locally_used_opins(HeapInterface* heap, + float pres_fac, + float acc_fac, + bool rip_up_local_opins, + bool is_flat); void print_rr_node_route_inf(); void print_rr_node_route_inf_dot(); diff --git a/vpr/src/route/route_debug.cpp b/vpr/src/route/route_debug.cpp index 022b8da8071..171487eadb8 100644 --- a/vpr/src/route/route_debug.cpp +++ b/vpr/src/route/route_debug.cpp @@ -2,29 +2,33 @@ std::atomic_bool f_router_debug = false; -void enable_router_debug( - const t_router_opts& router_opts, - ParentNetId net, - RRNodeId sink_rr, - int router_iteration, - ConnectionRouterInterface* router) { +void enable_router_debug(const t_router_opts& router_opts, + ParentNetId net, + RRNodeId sink_rr, + int router_iteration, + ConnectionRouterInterface* router) { bool active_net_debug = (router_opts.router_debug_net >= -1); bool active_sink_debug = (router_opts.router_debug_sink_rr >= 0); bool active_iteration_debug = (router_opts.router_debug_iteration >= 0); bool match_net = (ParentNetId(router_opts.router_debug_net) == net || router_opts.router_debug_net == -1); bool match_sink = (router_opts.router_debug_sink_rr == int(sink_rr) || router_opts.router_debug_sink_rr < 0); - bool match_iteration = (router_opts.router_debug_iteration == router_iteration || router_opts.router_debug_iteration < 0); + bool match_iteration + = (router_opts.router_debug_iteration == router_iteration || router_opts.router_debug_iteration < 0); f_router_debug = active_net_debug || active_sink_debug || active_iteration_debug; - if (active_net_debug) f_router_debug = f_router_debug && match_net; - if (active_sink_debug) f_router_debug = f_router_debug && match_sink; - if (active_iteration_debug) f_router_debug = f_router_debug && match_iteration; + if (active_net_debug) + f_router_debug = f_router_debug && match_net; + if (active_sink_debug) + f_router_debug = f_router_debug && match_sink; + if (active_iteration_debug) + f_router_debug = f_router_debug && match_iteration; router->set_router_debug(f_router_debug); #ifndef VTR_ENABLE_DEBUG_LOGGING - VTR_LOGV_WARN(f_router_debug, "Limited router debug output provided since compiled without VTR_ENABLE_DEBUG_LOGGING defined\n"); + VTR_LOGV_WARN(f_router_debug, + "Limited router debug output provided since compiled without VTR_ENABLE_DEBUG_LOGGING defined\n"); #endif } diff --git a/vpr/src/route/route_debug.h b/vpr/src/route/route_debug.h index 94c874da706..676beb4e9ad 100644 --- a/vpr/src/route/route_debug.h +++ b/vpr/src/route/route_debug.h @@ -17,4 +17,8 @@ extern std::atomic_bool f_router_debug; /** Enable f_router_debug if specific sink/net debugging is set in \p router_opts */ -void enable_router_debug(const t_router_opts& router_opts, ParentNetId net, RRNodeId sink_rr, int router_iteration, ConnectionRouterInterface* router); +void enable_router_debug(const t_router_opts& router_opts, + ParentNetId net, + RRNodeId sink_rr, + int router_iteration, + ConnectionRouterInterface* router); diff --git a/vpr/src/route/route_net.cpp b/vpr/src/route/route_net.cpp index b8ba1227322..7862f0004bb 100644 --- a/vpr/src/route/route_net.cpp +++ b/vpr/src/route/route_net.cpp @@ -105,9 +105,11 @@ void update_rr_base_costs(int fanout) { for (index = CHANX_COST_INDEX_START; index < device_ctx.rr_indexed_data.size(); index++) { if (device_ctx.rr_indexed_data[RRIndexedDataId(index)].T_quadratic > 0.) { /* pass transistor */ - device_ctx.rr_indexed_data[RRIndexedDataId(index)].base_cost = device_ctx.rr_indexed_data[RRIndexedDataId(index)].saved_base_cost * factor; + device_ctx.rr_indexed_data[RRIndexedDataId(index)].base_cost + = device_ctx.rr_indexed_data[RRIndexedDataId(index)].saved_base_cost * factor; } else { - device_ctx.rr_indexed_data[RRIndexedDataId(index)].base_cost = device_ctx.rr_indexed_data[RRIndexedDataId(index)].saved_base_cost; + device_ctx.rr_indexed_data[RRIndexedDataId(index)].base_cost + = device_ctx.rr_indexed_data[RRIndexedDataId(index)].saved_base_cost; } } } @@ -142,7 +144,8 @@ bool should_route_net(const Netlist<>& net_list, if (!route_ctx.route_trees[net_id]) /* No routing yet */ return true; - if (worst_negative_slack != 0 && budgeting_inf.if_set() && budgeting_inf.get_should_reroute(net_id)) /* Reroute for hold */ + if (worst_negative_slack != 0 && budgeting_inf.if_set() + && budgeting_inf.get_should_reroute(net_id)) /* Reroute for hold */ return true; const RouteTree& tree = route_ctx.route_trees[net_id].value(); @@ -177,8 +180,7 @@ bool should_route_net(const Netlist<>& net_list, bool early_exit_heuristic(const t_router_opts& router_opts, const WirelengthInfo& wirelength_info) { if (wirelength_info.used_wirelength_ratio() > router_opts.init_wirelength_abort_threshold) { VTR_LOG("Wire length usage ratio %g exceeds limit of %g, fail routing.\n", - wirelength_info.used_wirelength_ratio(), - router_opts.init_wirelength_abort_threshold); + wirelength_info.used_wirelength_ratio(), router_opts.init_wirelength_abort_threshold); return true; } return false; @@ -197,10 +199,7 @@ float get_net_pin_criticality(const SetupHoldTimingInfo* timing_info, if (route_ctx.is_clock_net[net_id]) { pin_criticality = max_criticality; } else { - pin_criticality = calculate_clb_net_pin_criticality(*timing_info, - netlist_pin_lookup, - pin_id, - is_flat); + pin_criticality = calculate_clb_net_pin_criticality(*timing_info, netlist_pin_lookup, pin_id, is_flat); } /* Pin criticality is between 0 and 1. @@ -246,8 +245,7 @@ WirelengthInfo calculate_wirelength_info(const Netlist<>& net_list, size_t avail tbb::combinable thread_used_wirelength(0); tbb::parallel_for_each(net_list.nets().begin(), net_list.nets().end(), [&](ParentNetId net_id) { - if (!net_list.net_is_ignored(net_id) - && net_list.net_sinks(net_id).size() != 0 /* Globals don't count. */ + if (!net_list.net_is_ignored(net_id) && net_list.net_sinks(net_id).size() != 0 /* Globals don't count. */ && route_ctx.route_trees[net_id]) { int bends, wirelength, segments; bool is_absorbed; @@ -260,8 +258,7 @@ WirelengthInfo calculate_wirelength_info(const Netlist<>& net_list, size_t avail used_wirelength = thread_used_wirelength.combine(std::plus()); #else for (auto net_id : net_list.nets()) { - if (!net_list.net_is_ignored(net_id) - && net_list.net_sinks(net_id).size() != 0 /* Globals don't count. */ + if (!net_list.net_is_ignored(net_id) && net_list.net_sinks(net_id).size() != 0 /* Globals don't count. */ && route_ctx.route_trees[net_id]) { int bends = 0, wirelength = 0, segments = 0; bool is_absorbed; @@ -318,20 +315,16 @@ void init_net_delay_from_lookahead(const RouterLookahead& router_lookahead, cost_params.criticality = 1.; // Ensures lookahead returns delay value for (auto net_id : net_list.nets()) { - if (net_list.net_is_ignored(net_id)) continue; + if (net_list.net_is_ignored(net_id)) + continue; RRNodeId source_rr = net_rr_terminals[net_id][0]; for (size_t ipin = 1; ipin < net_list.net_pins(net_id).size(); ++ipin) { RRNodeId sink_rr = net_rr_terminals[net_id][ipin]; - float est_delay = get_cost_from_lookahead(router_lookahead, - rr_graph, - source_rr, - sink_rr, - 0., - cost_params, - is_flat); + float est_delay + = get_cost_from_lookahead(router_lookahead, rr_graph, source_rr, sink_rr, 0., cost_params, is_flat); VTR_ASSERT(std::isfinite(est_delay) && est_delay < std::numeric_limits::max()); net_delay[net_id][ipin] = est_delay; diff --git a/vpr/src/route/route_net.tpp b/vpr/src/route/route_net.tpp index 0e8c4c268a5..76069ce0e83 100644 --- a/vpr/src/route/route_net.tpp +++ b/vpr/src/route/route_net.tpp @@ -83,13 +83,7 @@ inline NetResultFlags route_net(ConnectionRouter& router, /* Prune or rip-up existing routing for the net */ if (should_setup) { - setup_net( - itry, - net_id, - net_list, - connections_inf, - router_opts, - worst_negative_slack); + setup_net(itry, net_id, net_list, connections_inf, router_opts, worst_negative_slack); } VTR_ASSERT(route_ctx.route_trees[net_id]); @@ -99,10 +93,7 @@ inline NetResultFlags route_net(ConnectionRouter& router, SpatialRouteTreeLookup spatial_route_tree_lookup; if (high_fanout) { - spatial_route_tree_lookup = build_route_tree_spatial_lookup(net_list, - route_ctx.route_bb, - net_id, - tree.root()); + spatial_route_tree_lookup = build_route_tree_spatial_lookup(net_list, route_ctx.route_bb, net_id, tree.root()); } /* 1-indexed! */ @@ -119,19 +110,13 @@ inline NetResultFlags route_net(ConnectionRouter& router, // calculate criticality of remaining target pins for (int ipin : remaining_targets) { auto pin = net_list.net_pin(net_id, ipin); - pin_criticality[ipin] = get_net_pin_criticality(timing_info, - netlist_pin_lookup, - router_opts.max_criticality, - router_opts.criticality_exp, - net_id, - pin, - is_flat); + pin_criticality[ipin] = get_net_pin_criticality(timing_info, netlist_pin_lookup, router_opts.max_criticality, + router_opts.criticality_exp, net_id, pin, is_flat); } // compare the criticality of different sink nodes - std::stable_sort(begin(remaining_targets), end(remaining_targets), [&](int a, int b) { - return pin_criticality[a] > pin_criticality[b]; - }); + std::stable_sort(begin(remaining_targets), end(remaining_targets), + [&](int a, int b) { return pin_criticality[a] > pin_criticality[b]; }); /* Update base costs according to fanout and criticality rules */ update_rr_base_costs(num_sinks); @@ -153,7 +138,8 @@ inline NetResultFlags route_net(ConnectionRouter& router, // and the clock modelling is set to dedicated network or //there is a routing constraint for the current net setting routing model // to the dedicated network run the first stage router. - if ((!route_constraints.has_routing_constraint(net_name) && router_opts.clock_modeling == e_clock_modeling::DEDICATED_NETWORK) + if ((!route_constraints.has_routing_constraint(net_name) + && router_opts.clock_modeling == e_clock_modeling::DEDICATED_NETWORK) || route_constraints.get_route_model_by_net_name(net_name) == e_clock_modeling::DEDICATED_NETWORK) { std::string clock_network_name = ""; @@ -177,19 +163,15 @@ inline NetResultFlags route_net(ConnectionRouter& router, cost_params.criticality = router_opts.max_criticality; if (sink_node == RRNodeId::INVALID()) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Cannot route net \"%s\" through given clock network. Unknown clock network name \"%s\"", net_name.c_str(), clock_network_name.c_str()); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "Cannot route net \"%s\" through given clock network. Unknown clock network name \"%s\"", + net_name.c_str(), clock_network_name.c_str()); } - flags = pre_route_to_clock_root(router, - net_id, - net_list, - sink_node, - cost_params, - router_opts.high_fanout_threshold, - tree, - spatial_route_tree_lookup, - router_stats, - is_flat); + flags = pre_route_to_clock_root(router, net_id, net_list, sink_node, cost_params, + router_opts.high_fanout_threshold, tree, spatial_route_tree_lookup, + router_stats, is_flat); if (flags.success == false) return flags; @@ -221,21 +203,9 @@ inline NetResultFlags route_net(ConnectionRouter& router, profiling::conn_start(); // build a branch in the route tree to the target - auto sink_flags = route_sink(router, - net_list, - net_id, - itarget, - target_pin, - cost_params, - router_opts, - tree, - spatial_route_tree_lookup, - router_stats, - budgeting_inf, - routing_predictor, - choking_spots, - is_flat, - net_bb); + auto sink_flags = route_sink(router, net_list, net_id, itarget, target_pin, cost_params, router_opts, tree, + spatial_route_tree_lookup, router_stats, budgeting_inf, routing_predictor, + choking_spots, is_flat, net_bb); flags.retry_with_full_bb |= sink_flags.retry_with_full_bb; @@ -245,8 +215,7 @@ inline NetResultFlags route_net(ConnectionRouter& router, return flags; } - profiling::conn_finish(size_t(route_ctx.net_rr_terminals[net_id][0]), - size_t(sink_rr), + profiling::conn_finish(size_t(route_ctx.net_rr_terminals[net_id][0]), size_t(sink_rr), pin_criticality[target_pin]); ++router_stats.connections_routed; @@ -260,11 +229,7 @@ inline NetResultFlags route_net(ConnectionRouter& router, float* net_delay = net_delays[net_id].data(); // may have to update timing delay of the previously legally reached sinks since downstream capacitance could be changed - update_net_delays_from_route_tree(net_delay, - net_list, - net_id, - timing_info, - pin_timing_invalidator); + update_net_delays_from_route_tree(net_delay, net_list, net_id, timing_info, pin_timing_invalidator); if (router_opts.update_lower_bound_delays) { for (int ipin : remaining_targets) { @@ -272,7 +237,9 @@ inline NetResultFlags route_net(ConnectionRouter& router, } } - VTR_ASSERT_MSG(g_vpr_ctx.routing().rr_node_route_inf[tree.root().inode].occ() <= rr_graph.node_capacity(tree.root().inode), "SOURCE should never be congested"); + VTR_ASSERT_MSG( + g_vpr_ctx.routing().rr_node_route_inf[tree.root().inode].occ() <= rr_graph.node_capacity(tree.root().inode), + "SOURCE should never be congested"); VTR_LOGV_DEBUG(f_router_debug, "Routed Net %zu (%zu sinks)\n", size_t(net_id), num_sinks); router.empty_rcv_route_tree_set(); // ? @@ -305,7 +272,9 @@ inline NetResultFlags pre_route_to_clock_root(ConnectionRouter& router, bool high_fanout = is_high_fanout(net_list.net_sinks(net_id).size(), high_fanout_threshold); - VTR_LOGV_DEBUG(f_router_debug, "Net %zu pre-route to (%s)\n", size_t(net_id), describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, sink_node, is_flat).c_str()); + VTR_LOGV_DEBUG( + f_router_debug, "Net %zu pre-route to (%s)\n", size_t(net_id), + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, sink_node, is_flat).c_str()); profiling::sink_criticality_start(); t_bb bounding_box = route_ctx.route_bb[net_id]; @@ -314,27 +283,19 @@ inline NetResultFlags pre_route_to_clock_root(ConnectionRouter& router, bool found_path, retry_with_full_bb; RTExploredNode cheapest; - ConnectionParameters conn_params(net_id, - -1, - false, - std::unordered_map()); + ConnectionParameters conn_params(net_id, -1, false, std::unordered_map()); std::tie(found_path, retry_with_full_bb, cheapest) = router.timing_driven_route_connection_from_route_tree( - tree.root(), - sink_node, - cost_params, - bounding_box, - router_stats, - conn_params); + tree.root(), sink_node, cost_params, bounding_box, router_stats, conn_params); // TODO: Parts of the rest of this function are repetitive to code in route_sink. Should refactor. if (!found_path) { ParentBlockId src_block = net_list.net_driver_block(net_id); VTR_LOG("Failed to route connection from '%s' to '%s' for net '%s' (#%zu)\n", net_list.block_name(src_block).c_str(), - describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, sink_node, is_flat).c_str(), - net_list.net_name(net_id).c_str(), - size_t(net_id)); + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, sink_node, is_flat) + .c_str(), + net_list.net_name(net_id).c_str(), size_t(net_id)); if (f_router_debug) { update_screen(ScreenUpdatePriority::MAJOR, "Unable to route connection.", ROUTING, nullptr); } @@ -351,12 +312,14 @@ inline NetResultFlags pre_route_to_clock_root(ConnectionRouter& router, * points. Therefore, we can set the net pin index of the sink node to * * OPEN (meaning illegal) as it is not meaningful for this sink. */ vtr::optional new_branch, new_sink; - std::tie(new_branch, new_sink) = tree.update_from_heap(&cheapest, OPEN, ((high_fanout) ? &spatial_rt_lookup : nullptr), is_flat); + std::tie(new_branch, new_sink) + = tree.update_from_heap(&cheapest, OPEN, ((high_fanout) ? &spatial_rt_lookup : nullptr), is_flat); VTR_ASSERT_DEBUG(!high_fanout || validate_route_tree_spatial_lookup(tree.root(), spatial_rt_lookup)); if (f_router_debug) { - std::string msg = vtr::string_fmt("Routed Net %zu connection to RR node %d successfully", size_t(net_id), sink_node); + std::string msg + = vtr::string_fmt("Routed Net %zu connection to RR node %d successfully", size_t(net_id), sink_node); update_screen(ScreenUpdatePriority::MAJOR, msg.c_str(), ROUTING, nullptr); } @@ -423,7 +386,9 @@ inline NetResultFlags route_sink(ConnectionRouter& router, profiling::sink_criticality_start(); RRNodeId sink_node = route_ctx.net_rr_terminals[net_id][target_pin]; - VTR_LOGV_DEBUG(f_router_debug, "Net %zu Target %d (%s)\n", size_t(net_id), itarget, describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, sink_node, is_flat).c_str()); + VTR_LOGV_DEBUG( + f_router_debug, "Net %zu Target %d (%s)\n", size_t(net_id), itarget, + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, sink_node, is_flat).c_str()); router.clear_modified_rr_node_info(); @@ -442,31 +407,23 @@ inline NetResultFlags route_sink(ConnectionRouter& router, //We normally route high fanout nets by only adding spatially close-by routing to the heap (reduces run-time). //However, if the current sink is 'critical' from a timing perspective, we put the entire route tree back onto //the heap to ensure it has more flexibility to find the best path. - if (high_fanout && !sink_critical && !net_is_global && !net_is_clock && -routing_predictor.get_slope() > router_opts.high_fanout_max_slope) { - std::tie(found_path, flags.retry_with_full_bb, cheapest) = router.timing_driven_route_connection_from_route_tree_high_fanout(tree.root(), - sink_node, - cost_params, - net_bb, - spatial_rt_lookup, - router_stats, - conn_params); + if (high_fanout && !sink_critical && !net_is_global && !net_is_clock + && -routing_predictor.get_slope() > router_opts.high_fanout_max_slope) { + std::tie(found_path, flags.retry_with_full_bb, cheapest) + = router.timing_driven_route_connection_from_route_tree_high_fanout( + tree.root(), sink_node, cost_params, net_bb, spatial_rt_lookup, router_stats, conn_params); } else { - std::tie(found_path, flags.retry_with_full_bb, cheapest) = router.timing_driven_route_connection_from_route_tree(tree.root(), - sink_node, - cost_params, - net_bb, - router_stats, - conn_params); + std::tie(found_path, flags.retry_with_full_bb, cheapest) + = router.timing_driven_route_connection_from_route_tree(tree.root(), sink_node, cost_params, net_bb, + router_stats, conn_params); } if (!found_path) { ParentBlockId src_block = net_list.net_driver_block(net_id); ParentBlockId sink_block = net_list.pin_block(*(net_list.net_pins(net_id).begin() + target_pin)); VTR_LOG("Failed to route connection from '%s' to '%s' for net '%s' (#%zu)\n", - net_list.block_name(src_block).c_str(), - net_list.block_name(sink_block).c_str(), - net_list.net_name(net_id).c_str(), - size_t(net_id)); + net_list.block_name(src_block).c_str(), net_list.block_name(sink_block).c_str(), + net_list.net_name(net_id).c_str(), size_t(net_id)); if (f_router_debug) { update_screen(ScreenUpdatePriority::MAJOR, "Unable to route connection.", ROUTING, nullptr); } @@ -478,16 +435,19 @@ inline NetResultFlags route_sink(ConnectionRouter& router, profiling::sink_criticality_end(cost_params.criticality); vtr::optional new_branch, new_sink; - std::tie(new_branch, new_sink) = tree.update_from_heap(&cheapest, target_pin, ((high_fanout) ? &spatial_rt_lookup : nullptr), is_flat); + std::tie(new_branch, new_sink) + = tree.update_from_heap(&cheapest, target_pin, ((high_fanout) ? &spatial_rt_lookup : nullptr), is_flat); VTR_ASSERT_DEBUG(!high_fanout || validate_route_tree_spatial_lookup(tree.root(), spatial_rt_lookup)); if (f_router_debug) { - std::string msg = vtr::string_fmt("Routed Net %zu connection %d to RR node %d successfully", size_t(net_id), itarget, sink_node); + std::string msg = vtr::string_fmt("Routed Net %zu connection %d to RR node %d successfully", size_t(net_id), + itarget, sink_node); update_screen(ScreenUpdatePriority::MAJOR, msg.c_str(), ROUTING, nullptr); } - if (budgeting_inf.if_set() && cheapest.rcv_path_backward_delay != std::numeric_limits::infinity() && cost_params.delay_budget) { + if (budgeting_inf.if_set() && cheapest.rcv_path_backward_delay != std::numeric_limits::infinity() + && cost_params.delay_budget) { if (cheapest.rcv_path_backward_delay < cost_params.delay_budget->min_delay) { budgeting_inf.set_should_reroute(net_id, true); } diff --git a/vpr/src/route/route_path_manager.cpp b/vpr/src/route/route_path_manager.cpp index 03dec823993..5a219cdd704 100644 --- a/vpr/src/route/route_path_manager.cpp +++ b/vpr/src/route/route_path_manager.cpp @@ -7,14 +7,12 @@ PathManager::PathManager() { is_enabled_ = false; } -PathManager::~PathManager() { - free_all_memory(); -} +PathManager::~PathManager() { free_all_memory(); } -bool PathManager::node_exists_in_tree(t_heap_path* path_data, - RRNodeId to_node) { +bool PathManager::node_exists_in_tree(t_heap_path* path_data, RRNodeId to_node) { // Prevent seg faults for searching path data structures that haven't been created yet - if (!path_data || !is_enabled_) return false; + if (!path_data || !is_enabled_) + return false; // First check the smaller current path, the ordering of these checks might effect runtime slightly for (auto& node : path_data->path_rr) { @@ -39,8 +37,12 @@ void PathManager::mark_node_visited(RRNodeId node) { } } -void PathManager::insert_backwards_path_into_traceback(t_heap_path* path_data, float cost, float backward_path_cost, RoutingContext& route_ctx) { - if (!is_enabled_) return; +void PathManager::insert_backwards_path_into_traceback(t_heap_path* path_data, + float cost, + float backward_path_cost, + RoutingContext& route_ctx) { + if (!is_enabled_) + return; for (unsigned i = 1; i < path_data->edge.size() - 1; i++) { RRNodeId node_2 = path_data->path_rr[i]; @@ -51,13 +53,9 @@ void PathManager::insert_backwards_path_into_traceback(t_heap_path* path_data, f } } -bool PathManager::is_enabled() { - return is_enabled_; -} +bool PathManager::is_enabled() { return is_enabled_; } -void PathManager::set_enabled(bool enable) { - is_enabled_ = enable; -} +void PathManager::set_enabled(bool enable) { is_enabled_ = enable; } void PathManager::alloc_path_struct(t_heap_path*& tptr) { // TODO: Use arena allocation for this part @@ -102,7 +100,8 @@ void PathManager::free_all_memory() { } void PathManager::empty_heap() { - if (!is_enabled_) return; + if (!is_enabled_) + return; freed_nodes_.resize(alloc_list_.size()); @@ -111,14 +110,16 @@ void PathManager::empty_heap() { } void PathManager::update_route_tree_set(t_heap_path* cheapest_path_struct) { - if (!is_enabled_) return; + if (!is_enabled_) + return; // Add all values in path struct to the route tree nodes set route_tree_nodes_.insert(cheapest_path_struct->path_rr.begin(), cheapest_path_struct->path_rr.end()); } void PathManager::empty_route_tree_nodes() { - if (!is_enabled_) return; + if (!is_enabled_) + return; route_tree_nodes_.clear(); } diff --git a/vpr/src/route/route_path_manager.h b/vpr/src/route/route_path_manager.h index f1673772193..9e0980de8b3 100644 --- a/vpr/src/route/route_path_manager.h +++ b/vpr/src/route/route_path_manager.h @@ -60,8 +60,7 @@ class PathManager { // Checks if the target node exists in the route tree, or current backwards path variable // This is needed for RCV as the non minimum distance pathfinding can lead to illegal loops // By keeping a set of the current route tree for a net, as well as checking the current path we can prevent this - bool node_exists_in_tree(t_heap_path* path_data, - RRNodeId to_node); + bool node_exists_in_tree(t_heap_path* path_data, RRNodeId to_node); // Insert a node into the current route tree set indicating that it's currently in routing // Use this whenever updating the route tree @@ -74,7 +73,10 @@ class PathManager { void set_enabled(bool enable); // Insert the partial path data into the main route context traceback - void insert_backwards_path_into_traceback(t_heap_path* path_data, float cost, float backward_path_cost, RoutingContext& route_ctx); + void insert_backwards_path_into_traceback(t_heap_path* path_data, + float cost, + float backward_path_cost, + RoutingContext& route_ctx); // Dynamically create a t_heap_path structure to be used in the heap // Will return unless RCV is enabled diff --git a/vpr/src/route/route_profiling.cpp b/vpr/src/route/route_profiling.cpp index b7c88749335..e8a15ffaf0a 100644 --- a/vpr/src/route/route_profiling.cpp +++ b/vpr/src/route/route_profiling.cpp @@ -69,7 +69,8 @@ void sink_criticality_start() { sink_criticality_clock = clock(); } void sink_criticality_end(float target_criticality) { if (!time_on_criticality.empty()) { - time_on_criticality[target_criticality / criticality_per_bin] += static_cast(clock() - sink_criticality_clock) / CLOCKS_PER_SEC; + time_on_criticality[target_criticality / criticality_per_bin] + += static_cast(clock() - sink_criticality_clock) / CLOCKS_PER_SEC; ++itry_on_criticality[target_criticality / criticality_per_bin]; } } @@ -88,9 +89,7 @@ void net_rebuild_end(unsigned net_fanout, unsigned sinks_left_to_route) { } static clock_t net_fanout_clock; -void net_fanout_start() { - net_fanout_clock = clock(); -} +void net_fanout_start() { net_fanout_clock = clock(); } void net_fanout_end(unsigned net_fanout) { float time_for_net = static_cast(clock() - net_fanout_clock) / CLOCKS_PER_SEC; @@ -101,18 +100,14 @@ void net_fanout_end(unsigned net_fanout) { void time_on_fanout_analysis() { VTR_LOG("%d entire net rerouted, %d entire trees pruned (route to each sink from scratch), %d partially rerouted\n", entire_net_rerouted, entire_tree_pruned, part_tree_preserved); - VTR_LOG("%d connections marked for forced reroute, %d forced reroutes performed\n", connections_forced_to_reroute, connections_rerouted_due_to_forcing); + VTR_LOG("%d connections marked for forced reroute, %d forced reroutes performed\n", connections_forced_to_reroute, + connections_rerouted_due_to_forcing); // using the global time_on_fanout and itry_on_fanout VTR_LOG("fanout low time (s) attemps rebuild tree time (s) finished sinks rerouted sinks\n"); for (size_t bin = 0; bin < time_on_fanout.size(); ++bin) { if (itry_on_fanout[bin]) { // avoid printing the many 0 bins - VTR_LOG("%4d %14.3f %12d %14.3f %12d %12d\n", - bin * fanout_per_bin, - time_on_fanout[bin], - itry_on_fanout[bin], - time_on_fanout_rebuild[bin], - finished_sinks[bin], - rerouted_sinks[bin]); + VTR_LOG("%4d %14.3f %12d %14.3f %12d %12d\n", bin * fanout_per_bin, time_on_fanout[bin], + itry_on_fanout[bin], time_on_fanout_rebuild[bin], finished_sinks[bin], rerouted_sinks[bin]); } // clear the non-cumulative values finished_sinks[bin] = 0; @@ -127,7 +122,8 @@ void time_on_criticality_analysis() { VTR_LOG("criticality low time (s) attemps\n"); for (size_t bin = 0; bin < time_on_criticality.size(); ++bin) { if (itry_on_criticality[bin]) { // avoid printing the many 0 bins - VTR_LOG("%4f %14.3f %12d\n", bin * criticality_per_bin, time_on_criticality[bin], itry_on_criticality[bin]); + VTR_LOG("%4f %14.3f %12d\n", bin * criticality_per_bin, time_on_criticality[bin], + itry_on_criticality[bin]); } } return; @@ -146,7 +142,7 @@ struct Congested_node_types { }; void congestion_analysis() { -# if 0 +#if 0 // each type indexes into array which holds the congestion for that type std::vector congestion_per_type((size_t)NUM_RR_TYPES, 0); // print out specific node information if congestion for type is low enough @@ -183,7 +179,7 @@ void congestion_analysis() { } } return; -# endif +#endif } static clock_t conn_start_time; @@ -210,9 +206,7 @@ void profiling_initialization(unsigned max_fanout) { return; } -void conn_start() { - conn_start_time = clock(); -} +void conn_start() { conn_start_time = clock(); } void conn_finish(int src_rr, int sink_rr, float criticality) { const auto& device_ctx = g_vpr_ctx.device(); float route_time = static_cast(clock() - conn_start_time) / CLOCKS_PER_SEC; @@ -226,17 +220,16 @@ void conn_finish(int src_rr, int sink_rr, float criticality) { VTR_LOG("%s to %s (crit: %f) took %f\n", describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, src_rr).c_str(), describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, sink_rr).c_str(), - criticality, - route_time); + criticality, route_time); } void net_finish() { if (worst_conn_time > 0.f) { const auto& device_ctx = g_vpr_ctx.device(); - VTR_LOG("Worst conn was %s to %s (crit: %f) took %f\n", - describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, worst_src_rr).c_str(), - describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, worst_sink_rr).c_str(), - worst_crit, - worst_conn_time); + VTR_LOG( + "Worst conn was %s to %s (crit: %f) took %f\n", + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, worst_src_rr).c_str(), + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, worst_sink_rr).c_str(), + worst_crit, worst_conn_time); } } #endif diff --git a/vpr/src/route/route_tree.cpp b/vpr/src/route/route_tree.cpp index 799fa185fbd..a32334a7c99 100644 --- a/vpr/src/route/route_tree.cpp +++ b/vpr/src/route/route_tree.cpp @@ -29,9 +29,7 @@ RouteTreeNode::RouteTreeNode(RRNodeId _inode, RRSwitchId _parent_switch, RouteTr } /** Print information about this subtree to stdout. */ -void RouteTreeNode::print(void) const { - print_x(0); -} +void RouteTreeNode::print(void) const { print_x(0); } /** Helper function for print. */ void RouteTreeNode::print_x(int depth) const { @@ -42,14 +40,8 @@ void RouteTreeNode::print_x(int depth) const { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - VTR_LOG("%srt_node: %d (%s) \t ipin: %d \t R: %g \t C: %g \t delay: %g \t", - indent.c_str(), - inode, - rr_graph.node_type_string(inode), - net_pin_index, - R_upstream, - C_downstream, - Tdel); + VTR_LOG("%srt_node: %d (%s) \t ipin: %d \t R: %g \t C: %g \t delay: %g \t", indent.c_str(), inode, + rr_graph.node_type_string(inode), net_pin_index, R_upstream, C_downstream, Tdel); if (_parent) { VTR_LOG("parent: %d \t parent_switch: %d", _parent->inode, parent_switch); @@ -271,8 +263,7 @@ float RouteTree::load_new_subtree_C_downstream(RouteTreeNode& from_node) { * a buffered switch is found amongst the ancestors, no more ancestors are * affected. Returns the root of the "unbuffered subtree" whose Tdel * values are affected by the new path's addition. */ -RouteTreeNode& -RouteTree::update_unbuffered_ancestors_C_downstream(RouteTreeNode& from_node) { +RouteTreeNode& RouteTree::update_unbuffered_ancestors_C_downstream(RouteTreeNode& from_node) { if (!from_node.parent()) return from_node; @@ -360,9 +351,7 @@ vtr::optional RouteTree::find_by_rr_id(RRNodeId rr_node) c * - invalid timing values * - congested SINKs * Returns true if OK. */ -bool RouteTree::is_valid(void) const { - return is_valid_x(*_root); -} +bool RouteTree::is_valid(void) const { return is_valid_x(*_root); } /** Helper for is_valid */ bool RouteTree::is_valid_x(const RouteTreeNode& rt_node) const { @@ -385,7 +374,8 @@ bool RouteTree::is_valid_x(const RouteTreeNode& rt_node) const { return false; } } else { - float R_upstream_check = rr_graph.node_R(inode) + rt_node.parent().value().R_upstream + rr_graph.rr_switch_inf(iswitch).R; + float R_upstream_check + = rr_graph.node_R(inode) + rt_node.parent().value().R_upstream + rr_graph.rr_switch_inf(iswitch).R; if (!vtr::isclose(rt_node.R_upstream, R_upstream_check, RES_REL_TOL, RES_ABS_TOL)) { VTR_LOG("%d mismatch R upstream %e supposed %e\n", inode, rt_node.R_upstream, R_upstream_check); return false; @@ -417,9 +407,8 @@ bool RouteTree::is_valid_x(const RouteTreeNode& rt_node) const { float C_downstream_children = 0; for (auto& child : rt_node.child_nodes()) { if (child._parent != std::addressof(rt_node)) { - VTR_LOG("parent-child relationship not mutually acknowledged by parent %d->%d child %d<-%d\n", - inode, child.inode, - child.inode, rt_node.inode); + VTR_LOG("parent-child relationship not mutually acknowledged by parent %d->%d child %d<-%d\n", inode, + child.inode, child.inode, rt_node.inode); return false; } C_downstream_children += rr_graph.rr_switch_inf(child.parent_switch).Cinternal; @@ -444,9 +433,7 @@ bool RouteTree::is_valid_x(const RouteTreeNode& rt_node) const { /** Check if the tree has any overused nodes (-> the tree is congested). * Returns true if not congested */ -bool RouteTree::is_uncongested(void) const { - return is_uncongested_x(*_root); -} +bool RouteTree::is_uncongested(void) const { return is_uncongested_x(*_root); } /** Helper for is_uncongested */ bool RouteTree::is_uncongested_x(const RouteTreeNode& rt_node) const { @@ -472,9 +459,7 @@ bool RouteTree::is_uncongested_x(const RouteTreeNode& rt_node) const { } /** Print information about this route tree to stdout. */ -void RouteTree::print(void) const { - _root->print(); -} +void RouteTree::print(void) const { _root->print(); } /** Add the most recently finished wire segment to the routing tree, and * update the Tdel, etc. numbers for the rest of the routing tree. hptr @@ -485,8 +470,11 @@ void RouteTree::print(void) const { * dedicated clock networks. * This routine returns a tuple: RouteTreeNode of the branch it adds to the route tree and * RouteTreeNode of the SINK it adds to the routing. */ -std::tuple, vtr::optional> -RouteTree::update_from_heap(RTExploredNode* hptr, int target_net_pin_index, SpatialRouteTreeLookup* spatial_rt_lookup, bool is_flat) { +std::tuple, vtr::optional> RouteTree::update_from_heap( + RTExploredNode* hptr, + int target_net_pin_index, + SpatialRouteTreeLookup* spatial_rt_lookup, + bool is_flat) { /* Lock the route tree for writing. At least on Linux this shouldn't have an impact on single-threaded code */ std::unique_lock write_lock(_write_mutex); @@ -504,7 +492,8 @@ RouteTree::update_from_heap(RTExploredNode* hptr, int target_net_pin_index, Spat update_route_tree_spatial_lookup_recur(*start_of_new_subtree_rt_node, *spatial_rt_lookup); } - if (_net_id.is_valid() && target_net_pin_index != OPEN) /* We don't have this lookup if the tree isn't associated with a net */ + if (_net_id.is_valid() + && target_net_pin_index != OPEN) /* We don't have this lookup if the tree isn't associated with a net */ _is_isink_reached.set(target_net_pin_index, true); return {*start_of_new_subtree_rt_node, *sink_rt_node}; @@ -589,7 +578,8 @@ RouteTree::add_subtree_from_heap(RTExploredNode* hptr, int target_net_pin_index, /* the first and last nodes we added. * vec[size-1] works, because new_branch_inodes is guaranteed to contain at least [sink, found_node] */ - vtr::optional downstream_rt_node = *_rr_node_to_rt_node.at(new_branch_inodes[new_branch_inodes.size() - 1]); + vtr::optional downstream_rt_node + = *_rr_node_to_rt_node.at(new_branch_inodes[new_branch_inodes.size() - 1]); vtr::optional sink_rt_node = *_rr_node_to_rt_node.at(new_branch_inodes[0]); return {downstream_rt_node, sink_rt_node}; @@ -642,8 +632,7 @@ void RouteTree::add_non_configurable_nodes(RouteTreeNode* rt_node, * legally. * * Note: does not update R_upstream/C_downstream */ -vtr::optional -RouteTree::prune(CBRR& connections_inf, std::vector* non_config_node_set_usage) { +vtr::optional RouteTree::prune(CBRR& connections_inf, std::vector* non_config_node_set_usage) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; auto& route_ctx = g_vpr_ctx.routing(); @@ -667,8 +656,10 @@ RouteTree::prune(CBRR& connections_inf, std::vector* non_config_node_set_us /** Helper for prune. * Recursively traverse the route tree rooted at node and remove any congested subtrees. * Returns nullopt if pruned */ -vtr::optional -RouteTree::prune_x(RouteTreeNode& rt_node, CBRR& connections_inf, bool force_prune, std::vector* non_config_node_set_usage) { +vtr::optional RouteTree::prune_x(RouteTreeNode& rt_node, + CBRR& connections_inf, + bool force_prune, + std::vector* non_config_node_set_usage) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; auto& route_ctx = g_vpr_ctx.routing(); @@ -693,7 +684,8 @@ RouteTree::prune_x(RouteTreeNode& rt_node, CBRR& connections_inf, bool force_pru // Recursively prune child nodes bool all_children_pruned = true; remove_child_if(rt_node, [&](auto& child) { - vtr::optional child_maybe = prune_x(child, connections_inf, force_prune, non_config_node_set_usage); + vtr::optional child_maybe + = prune_x(child, connections_inf, force_prune, non_config_node_set_usage); if (child_maybe.has_value()) { // Not pruned all_children_pruned = false; @@ -701,7 +693,8 @@ RouteTree::prune_x(RouteTreeNode& rt_node, CBRR& connections_inf, bool force_pru } else { // Pruned // After removing a child node, check if non_config_node_set_usage // needs an update. - if (non_config_node_set_usage != nullptr && node_set != -1 && rr_graph.rr_switch_inf(child.parent_switch).configurable()) { + if (non_config_node_set_usage != nullptr && node_set != -1 + && rr_graph.rr_switch_inf(child.parent_switch).configurable()) { (*non_config_node_set_usage)[node_set] -= 1; VTR_ASSERT((*non_config_node_set_usage)[node_set] >= 0); } @@ -779,7 +772,9 @@ RouteTree::prune_x(RouteTreeNode& rt_node, CBRR& connections_inf, bool force_pru // // Then prune this node. // - if (non_config_node_set_usage != nullptr && node_set != -1 && rr_graph.rr_switch_inf(rt_node.parent_switch).configurable() && (*non_config_node_set_usage)[node_set] == 0) { + if (non_config_node_set_usage != nullptr && node_set != -1 + && rr_graph.rr_switch_inf(rt_node.parent_switch).configurable() + && (*non_config_node_set_usage)[node_set] == 0) { // This node should be pruned, re-prune edges once more. // // If the following is true: @@ -836,13 +831,11 @@ void RouteTree::freeze_x(RouteTreeNode& rt_node) { remove_child_if(rt_node, [&](RouteTreeNode& child) { if (rr_graph.node_type(child.inode) == SINK) { - VTR_LOGV_DEBUG(f_router_debug, - "Removing sink %d from route tree\n", child.inode); + VTR_LOGV_DEBUG(f_router_debug, "Removing sink %d from route tree\n", child.inode); return true; } else { rt_node.re_expand = false; - VTR_LOGV_DEBUG(f_router_debug, - "unexpanding: %d in route tree\n", rt_node.inode); + VTR_LOGV_DEBUG(f_router_debug, "unexpanding: %d in route tree\n", rt_node.inode); freeze_x(child); return false; } diff --git a/vpr/src/route/route_tree.h b/vpr/src/route/route_tree.h index 37e89db16ae..6870021212b 100644 --- a/vpr/src/route/route_tree.h +++ b/vpr/src/route/route_tree.h @@ -165,9 +165,7 @@ class RouteTreeNode { constexpr RTIterator(RouteTreeNode* p) : _p(p) {} - constexpr reference operator*() const { - return const_cast(*_p); - } + constexpr reference operator*() const { return const_cast(*_p); } inline RTIterator& operator++() { _p = _p->_next_sibling; return *this; @@ -202,9 +200,7 @@ class RouteTreeNode { constexpr RTRecIterator(RouteTreeNode* p) : _p(p) {} - constexpr reference operator*() const { - return const_cast(*_p); - } + constexpr reference operator*() const { return const_cast(*_p); } inline RTRecIterator& operator++() { _p = _p->_next; return *this; @@ -275,12 +271,8 @@ class RouteTreeNode { constexpr bool is_leaf(void) const { return _is_leaf; } /** Equality operator. For now, just compare the addresses */ - friend bool operator==(const RouteTreeNode& lhs, const RouteTreeNode& rhs) { - return &lhs == &rhs; - } - friend bool operator!=(const RouteTreeNode& lhs, const RouteTreeNode& rhs) { - return !(lhs == rhs); - } + friend bool operator==(const RouteTreeNode& lhs, const RouteTreeNode& rhs) { return &lhs == &rhs; } + friend bool operator!=(const RouteTreeNode& lhs, const RouteTreeNode& rhs) { return !(lhs == rhs); } private: void print_x(int depth) const; @@ -394,8 +386,11 @@ class RouteTree { * returns a tuple: RouteTreeNode of the branch it adds to the route tree and * RouteTreeNode of the SINK it adds to the routing. * Locking operation: only one thread can update_from_heap() a RouteTree at a time. */ - std::tuple, vtr::optional> - update_from_heap(RTExploredNode* hptr, int target_net_pin_index, SpatialRouteTreeLookup* spatial_rt_lookup, bool is_flat); + std::tuple, vtr::optional> update_from_heap( + RTExploredNode* hptr, + int target_net_pin_index, + SpatialRouteTreeLookup* spatial_rt_lookup, + bool is_flat); /** Reload timing values (R_upstream, C_downstream, Tdel). * Can take a RouteTreeNode& to do an incremental update. @@ -416,9 +411,7 @@ class RouteTree { } /** Get the number of sinks in associated net. */ - constexpr size_t num_sinks(void) const { - return _num_sinks; - } + constexpr size_t num_sinks(void) const { return _num_sinks; } /** Check the consistency of this route tree. Looks for: * - invalid parent-child links @@ -477,9 +470,7 @@ class RouteTree { if (_x < _bitset.size() && _bitset.get(_x) != sink_state) /* Iterate forward to a valid state */ ++(*this); } - constexpr value_type operator*() const { - return _x; - } + constexpr value_type operator*() const { return _x; } inline IsinkIterator& operator++() { _x++; for (; _x < _bitset.size() && _bitset.get(_x) != sink_state; _x++) @@ -517,14 +508,16 @@ class RouteTree { * Otherwise it doesn't guarantee legality. * Builds and returns a value: use get_is_isink_reached directly if you want speed. */ constexpr reached_isink_range get_reached_isinks(void) const { - return vtr::make_range(IsinkIterator(_is_isink_reached, 1), IsinkIterator(_is_isink_reached, _num_sinks + 1)); + return vtr::make_range(IsinkIterator(_is_isink_reached, 1), + IsinkIterator(_is_isink_reached, _num_sinks + 1)); } /** Get remaining (not routed (legally?)) isinks: * 1-indexed pin indices enumerating the sinks in this net. * Caveats in get_reached_isinks() apply. */ constexpr remaining_isink_range get_remaining_isinks(void) const { - return vtr::make_range(IsinkIterator(_is_isink_reached, 1), IsinkIterator(_is_isink_reached, _num_sinks + 1)); + return vtr::make_range(IsinkIterator(_is_isink_reached, 1), + IsinkIterator(_is_isink_reached, _num_sinks + 1)); } private: @@ -545,11 +538,10 @@ class RouteTree { bool is_valid_x(const RouteTreeNode& rt_node) const; bool is_uncongested_x(const RouteTreeNode& rt_node) const; - vtr::optional - prune_x(RouteTreeNode& rt_node, - CBRR& connections_inf, - bool force_prune, - std::vector* non_config_node_set_usage); + vtr::optional prune_x(RouteTreeNode& rt_node, + CBRR& connections_inf, + bool force_prune, + std::vector* non_config_node_set_usage); void freeze_x(RouteTreeNode& rt_node); diff --git a/vpr/src/route/route_utils.cpp b/vpr/src/route/route_utils.cpp index b67b544b47a..8edeeded965 100644 --- a/vpr/src/route/route_utils.cpp +++ b/vpr/src/route/route_utils.cpp @@ -154,7 +154,10 @@ bool early_reconvergence_exit_heuristic(const t_router_opts& router_opts, // improvements are needed to see an actual improvement // in final legal routing quality. if (cpd_ratio >= router_opts.reconvergence_cpd_threshold) { - VTR_LOG("Giving up routing since additional routing convergences seem unlikely to improve quality (CPD ratio: %g)\n", cpd_ratio); + VTR_LOG( + "Giving up routing since additional routing convergences seem unlikely to improve quality (CPD ratio: " + "%g)\n", + cpd_ratio); return true; // Potential CPD improvement is small, don't spend run-time trying to improve it } } @@ -201,11 +204,16 @@ bool is_better_quality_routing(const vtr::vector timing_info, bool rcv_finished) { +bool is_iteration_complete(bool routing_is_feasible, + const t_router_opts& router_opts, + int itry, + std::shared_ptr timing_info, + bool rcv_finished) { if (routing_is_feasible) { if (router_opts.routing_budgets_algorithm != YOYO) { return true; - } else if (router_opts.routing_budgets_algorithm == YOYO && (timing_info->hold_worst_negative_slack() == 0 || rcv_finished) && itry != 1) { + } else if (router_opts.routing_budgets_algorithm == YOYO + && (timing_info->hold_worst_negative_slack() == 0 || rcv_finished) && itry != 1) { return true; } } @@ -221,12 +229,14 @@ void generate_route_timing_reports(const t_router_opts& router_opts, auto& atom_ctx = g_vpr_ctx.atom(); const auto& blk_loc_registry = g_vpr_ctx.placement().blk_loc_registry(); - VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, blk_loc_registry); + VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, delay_calc, is_flat, + blk_loc_registry); resolver.set_detail_level(analysis_opts.timing_report_detail); tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, *timing_ctx.constraints); - timing_reporter.report_timing_setup(router_opts.first_iteration_timing_report_file, *timing_info.setup_analyzer(), analysis_opts.timing_report_npaths); + timing_reporter.report_timing_setup(router_opts.first_iteration_timing_report_file, *timing_info.setup_analyzer(), + analysis_opts.timing_report_npaths); } int get_max_pins_per_net(const Netlist<>& net_list) { @@ -248,7 +258,8 @@ void print_overused_nodes_status(const t_router_opts& router_opts, const Overuse //Overused nodes info logging upper limit VTR_LOG("Total number of overused nodes: %d\n", num_overused); if (num_overused > max_logged_overused_rr_nodes) { - VTR_LOG("Total number of overused nodes is larger than the logging limit (%d).\n", max_logged_overused_rr_nodes); + VTR_LOG("Total number of overused nodes is larger than the logging limit (%d).\n", + max_logged_overused_rr_nodes); VTR_LOG("Displaying the first %d entries.\n", max_logged_overused_rr_nodes); } @@ -256,7 +267,15 @@ void print_overused_nodes_status(const t_router_opts& router_opts, const Overuse VTR_LOG("\n"); } -void print_route_status(int itry, double elapsed_sec, float pres_fac, int num_bb_updated, const RouterStats& router_stats, const OveruseInfo& overuse_info, const WirelengthInfo& wirelength_info, std::shared_ptr timing_info, float est_success_iteration) { +void print_route_status(int itry, + double elapsed_sec, + float pres_fac, + int num_bb_updated, + const RouterStats& router_stats, + const OveruseInfo& overuse_info, + const WirelengthInfo& wirelength_info, + std::shared_ptr timing_info, + float est_success_iteration) { //Iteration VTR_LOG("%4d", itry); @@ -353,10 +372,18 @@ void print_route_status(int itry, double elapsed_sec, float pres_fac, int num_bb } void print_route_status_header() { - VTR_LOG("---- ------ ------- ---- ------- ------- ------- ----------------- --------------- -------- ---------- ---------- ---------- ---------- --------\n"); - VTR_LOG("Iter Time pres BBs Heap Re-Rtd Re-Rtd Overused RR Nodes Wirelength CPD sTNS sWNS hTNS hWNS Est Succ\n"); - VTR_LOG(" (sec) fac Updt push Nets Conns (ns) (ns) (ns) (ns) (ns) Iter\n"); - VTR_LOG("---- ------ ------- ---- ------- ------- ------- ----------------- --------------- -------- ---------- ---------- ---------- ---------- --------\n"); + VTR_LOG( + "---- ------ ------- ---- ------- ------- ------- ----------------- --------------- -------- ---------- " + "---------- ---------- ---------- --------\n"); + VTR_LOG( + "Iter Time pres BBs Heap Re-Rtd Re-Rtd Overused RR Nodes Wirelength CPD sTNS " + "sWNS hTNS hWNS Est Succ\n"); + VTR_LOG( + " (sec) fac Updt push Nets Conns (ns) (ns) " + "(ns) (ns) (ns) Iter\n"); + VTR_LOG( + "---- ------ ------- ---- ------- ------- ------- ----------------- --------------- -------- ---------- " + "---------- ---------- ---------- --------\n"); } void print_router_criticality_histogram(const Netlist<>& net_list, @@ -366,8 +393,7 @@ void print_router_criticality_histogram(const Netlist<>& net_list, print_histogram(create_criticality_histogram(net_list, timing_info, netlist_pin_lookup, is_flat, 10)); } -void prune_unused_non_configurable_nets(CBRR& connections_inf, - const Netlist<>& net_list) { +void prune_unused_non_configurable_nets(CBRR& connections_inf, const Netlist<>& net_list) { auto& device_ctx = g_vpr_ctx.device(); auto& route_ctx = g_vpr_ctx.mutable_routing(); @@ -386,13 +412,12 @@ void prune_unused_non_configurable_nets(CBRR& connections_inf, } } -vtr::vector>> set_nets_choking_spots(const Netlist<>& net_list, - const vtr::vector>>& net_terminal_groups, - const vtr::vector>& net_terminal_group_num, - bool router_opt_choke_points, - bool is_flat) { +vtr::vector>> set_nets_choking_spots( + const Netlist<>& net_list, + const vtr::vector>>& net_terminal_groups, + const vtr::vector>& net_terminal_group_num, + bool router_opt_choke_points, + bool is_flat) { vtr::vector>> choking_spots(net_list.nets().size()); for (const auto& net_id : net_list.nets()) { choking_spots[net_id].resize(net_list.net_pins(net_id).size()); @@ -436,21 +461,17 @@ vtr::vector>> set_net std::for_each(sink_grp.begin(), sink_grp.end(), [&rr_graph](int& sink_rr_num) { sink_rr_num = rr_graph.node_ptc_num(RRNodeId(sink_rr_num)); }); - auto physical_type = device_ctx.grid.get_physical_type({blk_loc.loc.x, blk_loc.loc.y, blk_loc.loc.layer}); + auto physical_type + = device_ctx.grid.get_physical_type({blk_loc.loc.x, blk_loc.loc.y, blk_loc.loc.layer}); // Get the choke points of the sink corresponds to pin_count given the sink group - auto sink_choking_spots = get_sink_choking_points(physical_type, - rr_graph.node_ptc_num(RRNodeId(net_rr_terminal[net_id][pin_count])), - sink_grp); + auto sink_choking_spots = get_sink_choking_points( + physical_type, rr_graph.node_ptc_num(RRNodeId(net_rr_terminal[net_id][pin_count])), sink_grp); // Store choke points rr_node_id and the number reachable sinks for (const auto& choking_spot : sink_choking_spots) { int pin_physical_num = choking_spot.first; int num_reachable_sinks = choking_spot.second; - auto pin_rr_node_id = get_pin_rr_node_id(rr_graph.node_lookup(), - physical_type, - blk_loc.loc.layer, - blk_loc.loc.x, - blk_loc.loc.y, - pin_physical_num); + auto pin_rr_node_id = get_pin_rr_node_id(rr_graph.node_lookup(), physical_type, blk_loc.loc.layer, + blk_loc.loc.x, blk_loc.loc.y, pin_physical_num); if (pin_rr_node_id != RRNodeId::INVALID()) { choking_spots[net_id][pin_count].insert(std::make_pair(pin_rr_node_id, num_reachable_sinks)); } @@ -492,16 +513,8 @@ void try_graph(int width_fac, /* Set up the routing resource graph defined by this FPGA architecture. */ int warning_count; - create_rr_graph(graph_type, - device_ctx.physical_tile_types, - device_ctx.grid, - chan_width, - det_routing_arch, - segment_inf, - router_opts, - directs, num_directs, - &warning_count, - is_flat); + create_rr_graph(graph_type, device_ctx.physical_tile_types, device_ctx.grid, chan_width, det_routing_arch, + segment_inf, router_opts, directs, num_directs, &warning_count, is_flat); } #ifndef NO_GRAPHICS @@ -526,7 +539,8 @@ void update_router_info_and_check_bp(bp_router_type type, int net_id) { get_bp_state_globals()->get_glob_breakpoint_state()->route_net_id = net_id; f_router_debug = check_for_breakpoints(false); if (f_router_debug) { - breakpoint_info_window(get_bp_state_globals()->get_glob_breakpoint_state()->bp_description, *get_bp_state_globals()->get_glob_breakpoint_state(), false); + breakpoint_info_window(get_bp_state_globals()->get_glob_breakpoint_state()->bp_description, + *get_bp_state_globals()->get_glob_breakpoint_state(), false); update_screen(ScreenUpdatePriority::MAJOR, "Breakpoint Encountered", ROUTING, nullptr); } } diff --git a/vpr/src/route/route_utils.h b/vpr/src/route/route_utils.h index c7d79a61fbf..d942bc7f705 100644 --- a/vpr/src/route/route_utils.h +++ b/vpr/src/route/route_utils.h @@ -12,16 +12,10 @@ constexpr float CONGESTED_SLOPE_VAL = -0.04; /** Identifies the two breakpoint types in routing */ -typedef enum router_breakpoint_type { - BP_ROUTE_ITER, - BP_NET_ID -} bp_router_type; +typedef enum router_breakpoint_type { BP_ROUTE_ITER, BP_NET_ID } bp_router_type; /** Per-iteration congestion mode for the router: focus more on routability after a certain threshold */ -enum class RouterCongestionMode { - NORMAL, - CONFLICTED -}; +enum class RouterCongestionMode { NORMAL, CONFLICTED }; struct RoutingMetrics { size_t used_wirelength = 0; @@ -72,11 +66,11 @@ int get_max_pins_per_net(const Netlist<>& net_list); /** Get the RouteTree associated with the ClusterNetId. * Flat routing maps AtomNetIds to RouteTrees instead, so we need to first look up the associated AtomNetId. */ -inline const vtr::optional& get_route_tree_from_cluster_net_id(ClusterNetId net_id){ +inline const vtr::optional& get_route_tree_from_cluster_net_id(ClusterNetId net_id) { auto& route_ctx = g_vpr_ctx.routing(); - if(!route_ctx.is_flat){ + if (!route_ctx.is_flat) { return route_ctx.route_trees[ParentNetId(net_id)]; - }else{ + } else { auto& atom_lookup = g_vpr_ctx.atom().lookup; AtomNetId atom_id = atom_lookup.atom_net(net_id); return route_ctx.route_trees[ParentNetId(atom_id)]; @@ -100,11 +94,23 @@ bool is_better_quality_routing(const vtr::vector timing_info, bool rcv_finished); +bool is_iteration_complete(bool routing_is_feasible, + const t_router_opts& router_opts, + int itry, + std::shared_ptr timing_info, + bool rcv_finished); void print_overused_nodes_status(const t_router_opts& router_opts, const OveruseInfo& overuse_info); -void print_route_status(int itry, double elapsed_sec, float pres_fac, int num_bb_updated, const RouterStats& router_stats, const OveruseInfo& overuse_info, const WirelengthInfo& wirelength_info, std::shared_ptr timing_info, float est_success_iteration); +void print_route_status(int itry, + double elapsed_sec, + float pres_fac, + int num_bb_updated, + const RouterStats& router_stats, + const OveruseInfo& overuse_info, + const WirelengthInfo& wirelength_info, + std::shared_ptr timing_info, + float est_success_iteration); void print_route_status_header(); @@ -118,8 +124,7 @@ void print_router_criticality_histogram(const Netlist<>& net_list, * behind. As a result, the final routing may have stubs at * non-configurable sets. This function tracks non-configurable set usage, * and if the sets are unused, prunes them. */ -void prune_unused_non_configurable_nets(CBRR& connections_inf, - const Netlist<>& net_list); +void prune_unused_non_configurable_nets(CBRR& connections_inf, const Netlist<>& net_list); /** If flat_routing and router_opt_choke_points are true, there are some choke points inside the cluster which would increase the convergence time of routing. * To address this issue, the congestion cost of those choke points needs to decrease. This function identify those choke points for each net, @@ -131,13 +136,12 @@ void prune_unused_non_configurable_nets(CBRR& connections_inf, * @param router_opt_choke_points is true if the given architecture has choking spots inside the cluster * @param is_flat is true if flat_routing is enabled * @return [Net_id][pin_id] -> [choke_point_rr_node_id, number of sinks reachable by this choke point] */ -vtr::vector>> set_nets_choking_spots(const Netlist<>& net_list, - const vtr::vector>>& net_terminal_groups, - const vtr::vector>& net_terminal_group_num, - bool router_opt_choke_points, - bool is_flat); +vtr::vector>> set_nets_choking_spots( + const Netlist<>& net_list, + const vtr::vector>>& net_terminal_groups, + const vtr::vector>& net_terminal_group_num, + bool router_opt_choke_points, + bool is_flat); /** Wrapper for create_rr_graph() with extra checks */ void try_graph(int width_fac, diff --git a/vpr/src/route/router_delay_profiling.cpp b/vpr/src/route/router_delay_profiling.cpp index ae25d5cdf78..7c0244ffeed 100644 --- a/vpr/src/route/router_delay_profiling.cpp +++ b/vpr/src/route/router_delay_profiling.cpp @@ -8,30 +8,26 @@ #include "vtr_time.h" #include "draw.h" -RouterDelayProfiler::RouterDelayProfiler(const Netlist<>& net_list, - const RouterLookahead* lookahead, - bool is_flat) +RouterDelayProfiler::RouterDelayProfiler(const Netlist<>& net_list, const RouterLookahead* lookahead, bool is_flat) : net_list_(net_list) - , router_( - g_vpr_ctx.device().grid, - *lookahead, - g_vpr_ctx.device().rr_graph.rr_nodes(), - &g_vpr_ctx.device().rr_graph, - g_vpr_ctx.device().rr_rc_data, - g_vpr_ctx.device().rr_graph.rr_switch(), - g_vpr_ctx.mutable_routing().rr_node_route_inf, - is_flat) + , router_(g_vpr_ctx.device().grid, + *lookahead, + g_vpr_ctx.device().rr_graph.rr_nodes(), + &g_vpr_ctx.device().rr_graph, + g_vpr_ctx.device().rr_rc_data, + g_vpr_ctx.device().rr_graph.rr_switch(), + g_vpr_ctx.mutable_routing().rr_node_route_inf, + is_flat) , is_flat_(is_flat) { const auto& grid = g_vpr_ctx.device().grid; int num_layers = grid.get_num_layers(); - min_delays_.resize({g_vpr_ctx.device().physical_tile_types.size(), - static_cast(num_layers), - static_cast(num_layers), - grid.width(), - grid.height()}); + min_delays_.resize({g_vpr_ctx.device().physical_tile_types.size(), static_cast(num_layers), + static_cast(num_layers), grid.width(), grid.height()}); - for (int physical_tile_type_idx = 0; physical_tile_type_idx < static_cast(g_vpr_ctx.device().physical_tile_types.size()); ++physical_tile_type_idx) { + for (int physical_tile_type_idx = 0; + physical_tile_type_idx < static_cast(g_vpr_ctx.device().physical_tile_types.size()); + ++physical_tile_type_idx) { for (int from_layer = 0; from_layer < num_layers; ++from_layer) { for (int to_layer = 0; to_layer < num_layers; ++to_layer) { for (int dx = 0; dx < static_cast(grid.width()); ++dx) { @@ -39,7 +35,8 @@ RouterDelayProfiler::RouterDelayProfiler(const Netlist<>& net_list, // For the current distance that is under consideration, get the minimum cost from router lookahead. Also, // since the cost is used for placement, the source would be on OPINs; thus, we need to get the minimum distance on OPINs // not on channels. - float min_delay = lookahead->get_opin_distance_min_delay(physical_tile_type_idx, from_layer, to_layer, dx, dy); + float min_delay = lookahead->get_opin_distance_min_delay(physical_tile_type_idx, from_layer, + to_layer, dx, dy); min_delays_[physical_tile_type_idx][from_layer][to_layer][dx][dy] = min_delay; } } @@ -98,20 +95,12 @@ bool RouterDelayProfiler::calculate_delay(RRNodeId source_node, bool found_path; RTExploredNode cheapest; - ConnectionParameters conn_params(ParentNetId::INVALID(), - -1, - false, - std::unordered_map()); + ConnectionParameters conn_params(ParentNetId::INVALID(), -1, false, std::unordered_map()); if (size_t(sink_node) == 778060 && size_t(source_node) == 14) { router_.set_router_debug(true); } std::tie(found_path, std::ignore, cheapest) = router_.timing_driven_route_connection_from_route_tree( - tree.root(), - sink_node, - cost_params, - bounding_box, - router_stats, - conn_params); + tree.root(), sink_node, cost_params, bounding_box, router_stats, conn_params); router_.set_router_debug(false); @@ -124,7 +113,9 @@ bool RouterDelayProfiler::calculate_delay(RRNodeId source_node, //find delay *net_delay = rt_node_of_sink->Tdel; - VTR_ASSERT_MSG(route_ctx.rr_node_route_inf[tree.root().inode].occ() <= rr_graph.node_capacity(tree.root().inode), "SOURCE should never be congested"); + VTR_ASSERT_MSG( + route_ctx.rr_node_route_inf[tree.root().inode].occ() <= rr_graph.node_capacity(tree.root().inode), + "SOURCE should never be congested"); } //VTR_LOG("Explored %zu of %zu (%.2f) RR nodes: path delay %g\n", router_stats.heap_pops, device_ctx.rr_nodes.size(), float(router_stats.heap_pops) / device_ctx.rr_nodes.size(), *net_delay); @@ -137,7 +128,11 @@ bool RouterDelayProfiler::calculate_delay(RRNodeId source_node, return found_path; } -float RouterDelayProfiler::get_min_delay(int physical_tile_type_idx, int from_layer, int to_layer, int dx, int dy) const { +float RouterDelayProfiler::get_min_delay(int physical_tile_type_idx, + int from_layer, + int to_layer, + int dx, + int dy) const { return min_delays_[physical_tile_type_idx][from_layer][to_layer][dx][dy]; } @@ -148,7 +143,8 @@ vtr::vector calculate_all_path_delays_from_rr_node(RRNodeId src auto& device_ctx = g_vpr_ctx.device(); auto& route_ctx = g_vpr_ctx.mutable_routing(); - vtr::vector path_delays_to(device_ctx.rr_graph.num_nodes(), std::numeric_limits::quiet_NaN()); + vtr::vector path_delays_to(device_ctx.rr_graph.num_nodes(), + std::numeric_limits::quiet_NaN()); RouteTree tree(src_rr_node); @@ -172,25 +168,15 @@ vtr::vector calculate_all_path_delays_from_rr_node(RRNodeId src t_det_routing_arch det_routing_arch; auto router_lookahead = make_router_lookahead(det_routing_arch, e_router_lookahead::NO_OP, /*write_lookahead=*/"", /*read_lookahead=*/"", - /*segment_inf=*/{}, - is_flat); - - ConnectionRouter router( - device_ctx.grid, - *router_lookahead, - device_ctx.rr_graph.rr_nodes(), - &g_vpr_ctx.device().rr_graph, - device_ctx.rr_rc_data, - device_ctx.rr_graph.rr_switch(), - route_ctx.rr_node_route_inf, - is_flat); + /*segment_inf=*/{}, is_flat); + + ConnectionRouter router(device_ctx.grid, *router_lookahead, device_ctx.rr_graph.rr_nodes(), + &g_vpr_ctx.device().rr_graph, device_ctx.rr_rc_data, + device_ctx.rr_graph.rr_switch(), route_ctx.rr_node_route_inf, is_flat); RouterStats router_stats; ConnectionParameters conn_params(ParentNetId::INVALID(), OPEN, false, std::unordered_map()); - vtr::vector shortest_paths = router.timing_driven_find_all_shortest_paths_from_route_tree(tree.root(), - cost_params, - bounding_box, - router_stats, - conn_params); + vtr::vector shortest_paths = router.timing_driven_find_all_shortest_paths_from_route_tree( + tree.root(), cost_params, bounding_box, router_stats, conn_params); VTR_ASSERT(shortest_paths.size() == device_ctx.rr_graph.num_nodes()); for (int isink = 0; isink < (int)device_ctx.rr_graph.num_nodes(); ++isink) { @@ -198,14 +184,16 @@ vtr::vector calculate_all_path_delays_from_rr_node(RRNodeId src if (RRNodeId(sink_rr_node) == src_rr_node) { path_delays_to[sink_rr_node] = 0.; } else { - if (!shortest_paths[sink_rr_node].index.is_valid()) continue; + if (!shortest_paths[sink_rr_node].index.is_valid()) + continue; VTR_ASSERT(RRNodeId(shortest_paths[sink_rr_node].index) == sink_rr_node); //Build the routing tree to get the delay tree = RouteTree(RRNodeId(src_rr_node)); vtr::optional rt_node_of_sink; - std::tie(std::ignore, rt_node_of_sink) = tree.update_from_heap(&shortest_paths[sink_rr_node], OPEN, nullptr, router_opts.flat_routing); + std::tie(std::ignore, rt_node_of_sink) + = tree.update_from_heap(&shortest_paths[sink_rr_node], OPEN, nullptr, router_opts.flat_routing); VTR_ASSERT(rt_node_of_sink->inode == RRNodeId(sink_rr_node)); @@ -261,20 +249,10 @@ void alloc_routing_structs(const t_chan_width& chan_width, graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR); } - create_rr_graph(graph_type, - device_ctx.physical_tile_types, - device_ctx.grid, - chan_width, - det_routing_arch, - segment_inf, - router_opts, - directs, num_directs, - &warnings, - is_flat); + create_rr_graph(graph_type, device_ctx.physical_tile_types, device_ctx.grid, chan_width, det_routing_arch, + segment_inf, router_opts, directs, num_directs, &warnings, is_flat); alloc_and_load_rr_node_route_structs(); } -void free_routing_structs() { - free_route_structs(); -} +void free_routing_structs() { free_route_structs(); } diff --git a/vpr/src/route/router_delay_profiling.h b/vpr/src/route/router_delay_profiling.h index 1d5ae1b21c1..d03889bc319 100644 --- a/vpr/src/route/router_delay_profiling.h +++ b/vpr/src/route/router_delay_profiling.h @@ -8,9 +8,7 @@ class RouterDelayProfiler { public: - RouterDelayProfiler(const Netlist<>& net_list, - const RouterLookahead* lookahead, - bool is_flat); + RouterDelayProfiler(const Netlist<>& net_list, const RouterLookahead* lookahead, bool is_flat); /** * @brief Returns true as long as found some way to hook up this net, even if that @@ -24,10 +22,7 @@ class RouterDelayProfiler { * @param layer_num * @return */ - bool calculate_delay(RRNodeId source_node, - RRNodeId sink_node, - const t_router_opts& router_opts, - float* net_delay); + bool calculate_delay(RRNodeId source_node, RRNodeId sink_node, const t_router_opts& router_opts, float* net_delay); /** * @param physical_tile_type_idx diff --git a/vpr/src/route/router_lookahead.cpp b/vpr/src/route/router_lookahead.cpp index 240aeafbd61..9b5ce2c6550 100644 --- a/vpr/src/route/router_lookahead.cpp +++ b/vpr/src/route/router_lookahead.cpp @@ -44,9 +44,8 @@ std::unique_ptr make_router_lookahead(const t_det_routing_arch& const std::string& read_lookahead, const std::vector& segment_inf, bool is_flat) { - std::unique_ptr router_lookahead = make_router_lookahead_object(det_routing_arch, - router_lookahead_type, - is_flat); + std::unique_ptr router_lookahead + = make_router_lookahead_object(det_routing_arch, router_lookahead_type, is_flat); if (read_lookahead.empty()) { router_lookahead->compute(segment_inf); @@ -61,13 +60,19 @@ std::unique_ptr make_router_lookahead(const t_det_routing_arch& return router_lookahead; } -float ClassicLookahead::get_expected_cost(RRNodeId current_node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const { +float ClassicLookahead::get_expected_cost(RRNodeId current_node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const { auto [delay_cost, cong_cost] = get_expected_delay_and_cong(current_node, target_node, params, R_upstream); return delay_cost + cong_cost; } -std::pair ClassicLookahead::get_expected_delay_and_cong(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const { +std::pair ClassicLookahead::get_expected_delay_and_cong(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -84,13 +89,10 @@ std::pair ClassicLookahead::get_expected_delay_and_cong(RRNodeId n const auto& ipin_data = device_ctx.rr_indexed_data[RRIndexedDataId(IPIN_COST_INDEX)]; const auto& sink_data = device_ctx.rr_indexed_data[RRIndexedDataId(SINK_COST_INDEX)]; - float cong_cost = num_segs_same_dir * same_data.base_cost - + num_segs_ortho_dir * ortho_data.base_cost - + ipin_data.base_cost - + sink_data.base_cost; + float cong_cost = num_segs_same_dir * same_data.base_cost + num_segs_ortho_dir * ortho_data.base_cost + + ipin_data.base_cost + sink_data.base_cost; - float Tdel = num_segs_same_dir * same_data.T_linear - + num_segs_ortho_dir * ortho_data.T_linear + float Tdel = num_segs_same_dir * same_data.T_linear + num_segs_ortho_dir * ortho_data.T_linear + num_segs_same_dir * num_segs_same_dir * same_data.T_quadratic + num_segs_ortho_dir * num_segs_ortho_dir * ortho_data.T_quadratic + R_upstream * (num_segs_same_dir * same_data.C_load + num_segs_ortho_dir * ortho_data.C_load) @@ -105,19 +107,23 @@ std::pair ClassicLookahead::get_expected_delay_and_cong(RRNodeId n } } -float NoOpLookahead::get_expected_cost(RRNodeId /*current_node*/, RRNodeId /*target_node*/, const t_conn_cost_params& /*params*/, float /*R_upstream*/) const { +float NoOpLookahead::get_expected_cost(RRNodeId /*current_node*/, + RRNodeId /*target_node*/, + const t_conn_cost_params& /*params*/, + float /*R_upstream*/) const { return 0.; } -std::pair NoOpLookahead::get_expected_delay_and_cong(RRNodeId /*node*/, RRNodeId /*target_node*/, const t_conn_cost_params& /*params*/, float /*R_upstream*/) const { +std::pair NoOpLookahead::get_expected_delay_and_cong(RRNodeId /*node*/, + RRNodeId /*target_node*/, + const t_conn_cost_params& /*params*/, + float /*R_upstream*/) const { return std::make_pair(0., 0.); } /* Used below to ensure that fractions are rounded up, but floating * * point values very close to an integer are rounded to that integer. */ -static int round_up(float x) { - return std::ceil(x - 0.001); -} +static int round_up(float x) { return std::ceil(x - 0.001); } static std::pair get_expected_segs_to_target(RRNodeId inode, RRNodeId target_node) { /* Returns the number of segments the same type as inode that will be needed * @@ -223,12 +229,7 @@ const RouterLookahead* get_cached_router_lookahead(const t_det_routing_arch& det return router_lookahead; } else { return mut_router_ctx.cached_router_lookahead_.set( - cache_key, - make_router_lookahead(det_routing_arch, - router_lookahead_type, - write_lookahead, - read_lookahead, - segment_inf, - is_flat)); + cache_key, make_router_lookahead(det_routing_arch, router_lookahead_type, write_lookahead, read_lookahead, + segment_inf, is_flat)); } } diff --git a/vpr/src/route/router_lookahead.h b/vpr/src/route/router_lookahead.h index 2a13dd55aa1..2a754900e80 100644 --- a/vpr/src/route/router_lookahead.h +++ b/vpr/src/route/router_lookahead.h @@ -22,8 +22,14 @@ class RouterLookahead { * @param R_upstream Upstream resistance to get to the "node". * @return */ - virtual float get_expected_cost(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const = 0; - virtual std::pair get_expected_delay_and_cong(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const = 0; + virtual float get_expected_cost(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const = 0; + virtual std::pair get_expected_delay_and_cong(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const = 0; /** * @brief Compute router lookahead (if needed) @@ -74,7 +80,11 @@ class RouterLookahead { * @param dy Vertical distance to the destination * @return Minimum delay to a point which is dx and dy away from a point on the die number "from_layer" to a point on the die number "to_layer". */ - virtual float get_opin_distance_min_delay(int physical_tile_idx, int from_layer, int to_layer, int dx, int dy) const = 0; + virtual float get_opin_distance_min_delay(int physical_tile_idx, + int from_layer, + int to_layer, + int dx, + int dy) const = 0; virtual ~RouterLookahead() {} }; @@ -122,11 +132,16 @@ const RouterLookahead* get_cached_router_lookahead(const t_det_routing_arch& det class ClassicLookahead : public RouterLookahead { public: - float get_expected_cost(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const override; - std::pair get_expected_delay_and_cong(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const override; + float get_expected_cost(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const override; + std::pair get_expected_delay_and_cong(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const override; - void compute(const std::vector& /*segment_inf*/) override { - } + void compute(const std::vector& /*segment_inf*/) override {} void compute_intra_tile() override { VPR_THROW(VPR_ERROR_ROUTE, "ClassicLookahead::compute_intra_time unimplemented"); @@ -148,7 +163,11 @@ class ClassicLookahead : public RouterLookahead { VPR_THROW(VPR_ERROR_ROUTE, "ClassicLookahead::write_intra_cluster unimplemented"); } - float get_opin_distance_min_delay(int /*physical_tile_idx*/, int /*from_layer*/, int /*to_layer*/, int /*dx*/, int /*dy*/) const override { + float get_opin_distance_min_delay(int /*physical_tile_idx*/, + int /*from_layer*/, + int /*to_layer*/, + int /*dx*/, + int /*dy*/) const override { return -1.; } @@ -158,11 +177,16 @@ class ClassicLookahead : public RouterLookahead { class NoOpLookahead : public RouterLookahead { protected: - float get_expected_cost(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const override; - std::pair get_expected_delay_and_cong(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const override; + float get_expected_cost(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const override; + std::pair get_expected_delay_and_cong(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const override; - void compute(const std::vector& /*segment_inf*/) override { - } + void compute(const std::vector& /*segment_inf*/) override {} void compute_intra_tile() override { VPR_THROW(VPR_ERROR_ROUTE, "ClassicLookahead::compute_intra_time unimplemented"); @@ -184,7 +208,11 @@ class NoOpLookahead : public RouterLookahead { VPR_THROW(VPR_ERROR_ROUTE, "write_intra_cluster not supported for NoOpLookahead"); } - float get_opin_distance_min_delay(int /*physical_tile_idx*/, int /*from_layer*/, int /*to_layer*/, int /*dx*/, int /*dy*/) const override { + float get_opin_distance_min_delay(int /*physical_tile_idx*/, + int /*from_layer*/, + int /*to_layer*/, + int /*dx*/, + int /*dy*/) const override { return -1.; } }; diff --git a/vpr/src/route/router_lookahead_compressed_map.cpp b/vpr/src/route/router_lookahead_compressed_map.cpp index 4c50beb175e..dfb6a601d4a 100644 --- a/vpr/src/route/router_lookahead_compressed_map.cpp +++ b/vpr/src/route/router_lookahead_compressed_map.cpp @@ -33,10 +33,15 @@ static int initialize_compressed_loc_structs(const std::vector& s static void compute_router_wire_compressed_lookahead(const std::vector& segment_inf_vec); /* sets the lookahead cost map entries based on representative cost entries from routing_cost_map */ -static void set_compressed_lookahead_map_costs(int from_layer_num, int segment_index, e_rr_type chan_type, util::t_routing_cost_map& routing_cost_map); +static void set_compressed_lookahead_map_costs(int from_layer_num, + int segment_index, + e_rr_type chan_type, + util::t_routing_cost_map& routing_cost_map); /* fills in missing lookahead map entries by copying the cost of the closest valid entry */ -static void fill_in_missing_compressed_lookahead_entries(const std::map>& sorted_sample_loc, int segment_index, e_rr_type chan_type); +static void fill_in_missing_compressed_lookahead_entries(const std::map>& sorted_sample_loc, + int segment_index, + e_rr_type chan_type); /* returns a cost entry in the f_wire_cost_map that is near the specified coordinates (and preferably towards (0,0)) */ static util::Cost_Entry get_nearby_cost_entry_compressed_lookahead(int from_layer_num, @@ -54,7 +59,12 @@ static util::Cost_Entry get_nearby_cost_entry_average_neighbour(const std::map& segment_inf_vec) { const auto& grid = g_vpr_ctx.device().grid; @@ -128,11 +138,9 @@ static void compute_router_wire_compressed_lookahead(const std::vector(grid.get_num_layers()), - 2, - segment_inf_vec.size(), - static_cast(grid.get_num_layers()), - static_cast(num_sampling_points)}); + f_compressed_wire_cost_map = t_compressed_wire_cost_map( + {static_cast(grid.get_num_layers()), 2, segment_inf_vec.size(), + static_cast(grid.get_num_layers()), static_cast(num_sampling_points)}); int longest_seg_length = 0; for (const auto& seg_inf : segment_inf_vec) { @@ -156,12 +164,8 @@ static void compute_router_wire_compressed_lookahead(const std::vector(routing_cost_map.dim_size(2)); for (int iy = 0; iy < y_dim; iy++) { - if (sample_locations.find(ix) == sample_locations.end() || sample_locations.at(ix).find(iy) == sample_locations[ix].end()) { + if (sample_locations.find(ix) == sample_locations.end() + || sample_locations.at(ix).find(iy) == sample_locations[ix].end()) { continue; } util::Expansion_Cost_Entry& expansion_cost_entry = routing_cost_map[to_layer][ix][iy]; int compressed_idx = compressed_loc_index_map[ix][iy]; VTR_ASSERT(compressed_idx != OPEN); - f_compressed_wire_cost_map[from_layer_num][chan_index][segment_index][to_layer][compressed_idx] = expansion_cost_entry.get_representative_cost_entry(util::e_representative_entry_method::SMALLEST); + f_compressed_wire_cost_map[from_layer_num][chan_index][segment_index][to_layer][compressed_idx] + = expansion_cost_entry.get_representative_cost_entry(util::e_representative_entry_method::SMALLEST); } } } @@ -220,21 +229,20 @@ static void fill_in_missing_compressed_lookahead_entries(const std::map::max() / 1e12, std::numeric_limits::max() / 1e12); + copy_entry = util::Cost_Entry(std::numeric_limits::max() / 1e12, + std::numeric_limits::max() / 1e12); } } else { - copy_entry = get_nearby_cost_entry_compressed_lookahead(from_layer_num, copy_x, copy_y, to_layer_num, segment_index, chan_index); + copy_entry = get_nearby_cost_entry_compressed_lookahead(from_layer_num, copy_x, copy_y, to_layer_num, + segment_index, chan_index); } } @@ -307,8 +318,11 @@ static util::Cost_Entry get_nearby_cost_entry_average_neighbour(const std::mapfirst != missing_dx) { @@ -362,7 +376,8 @@ static util::Cost_Entry get_nearby_cost_entry_average_neighbour(const std::map(neighbour_num), neighbour_cong_sum / static_cast(neighbour_num)}; } else { - return get_nearby_cost_entry_compressed_lookahead(from_layer_num, missing_dx, missing_dy, to_layer_num, segment_index, chan_index); + return get_nearby_cost_entry_compressed_lookahead(from_layer_num, missing_dx, missing_dy, to_layer_num, + segment_index, chan_index); } } -static util::Cost_Entry get_wire_cost_entry_compressed_lookahead(e_rr_type rr_type, int seg_index, int from_layer_num, int delta_x, int delta_y, int to_layer_num) { +static util::Cost_Entry get_wire_cost_entry_compressed_lookahead(e_rr_type rr_type, + int seg_index, + int from_layer_num, + int delta_x, + int delta_y, + int to_layer_num) { VTR_ASSERT_SAFE(rr_type == CHANX || rr_type == CHANY); int chan_index = 0; @@ -401,7 +422,10 @@ CompressedMapLookahead::CompressedMapLookahead(const t_det_routing_arch& det_rou : det_routing_arch_(det_routing_arch) , is_flat_(is_flat) {} -float CompressedMapLookahead::get_expected_cost(RRNodeId current_node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const { +float CompressedMapLookahead::get_expected_cost(RRNodeId current_node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -444,33 +468,26 @@ std::pair CompressedMapLookahead::get_expected_delay_and_cong(RRNo //reachable, we query the f_wire_cost_map (i.e. the wire lookahead) to get the final //delay to reach the sink. - t_physical_tile_type_ptr from_tile_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(from_node), - rr_graph.node_ylow(from_node), - from_layer_num}); + t_physical_tile_type_ptr from_tile_type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(from_node), rr_graph.node_ylow(from_node), from_layer_num}); auto from_tile_index = std::distance(&device_ctx.physical_tile_types[0], from_tile_type); auto from_ptc = rr_graph.node_ptc_num(from_node); - std::tie(expected_delay_cost, expected_cong_cost) = util::get_cost_from_src_opin(src_opin_delays[from_layer_num][from_tile_index][from_ptc][to_layer_num], - delta_x, - delta_y, - to_layer_num, - get_wire_cost_entry_compressed_lookahead); + std::tie(expected_delay_cost, expected_cong_cost) + = util::get_cost_from_src_opin(src_opin_delays[from_layer_num][from_tile_index][from_ptc][to_layer_num], + delta_x, delta_y, to_layer_num, get_wire_cost_entry_compressed_lookahead); expected_delay_cost *= params.criticality; expected_cong_cost *= (1 - params.criticality); - VTR_ASSERT_SAFE_MSG(std::isfinite(expected_delay_cost), - vtr::string_fmt("Lookahead failed to estimate cost from %s: %s", - rr_node_arch_name(from_node, is_flat_).c_str(), - describe_rr_node(rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - from_node, - is_flat_) - .c_str()) - .c_str()); + VTR_ASSERT_SAFE_MSG( + std::isfinite(expected_delay_cost), + vtr::string_fmt( + "Lookahead failed to estimate cost from %s: %s", rr_node_arch_name(from_node, is_flat_).c_str(), + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, from_node, is_flat_).c_str()) + .c_str()); } else if (from_type == CHANX || from_type == CHANY) { //When estimating costs from a wire, we directly look-up the result in the wire lookahead (f_wire_cost_map) @@ -481,25 +498,17 @@ std::pair CompressedMapLookahead::get_expected_delay_and_cong(RRNo VTR_ASSERT(from_seg_index >= 0); /* now get the expected cost from our lookahead map */ - util::Cost_Entry cost_entry = get_wire_cost_entry_compressed_lookahead(from_type, - from_seg_index, - from_layer_num, - delta_x, - delta_y, - to_layer_num); + util::Cost_Entry cost_entry = get_wire_cost_entry_compressed_lookahead( + from_type, from_seg_index, from_layer_num, delta_x, delta_y, to_layer_num); expected_delay_cost = cost_entry.delay; expected_cong_cost = cost_entry.congestion; - VTR_ASSERT_SAFE_MSG(std::isfinite(expected_delay_cost), - vtr::string_fmt("Lookahead failed to estimate cost from %s: %s", - rr_node_arch_name(from_node, is_flat_).c_str(), - describe_rr_node(rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - from_node, - is_flat_) - .c_str()) - .c_str()); + VTR_ASSERT_SAFE_MSG( + std::isfinite(expected_delay_cost), + vtr::string_fmt( + "Lookahead failed to estimate cost from %s: %s", rr_node_arch_name(from_node, is_flat_).c_str(), + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, from_node, is_flat_).c_str()) + .c_str()); expected_delay_cost = cost_entry.delay * params.criticality; expected_cong_cost = cost_entry.congestion * (1 - params.criticality); } else if (from_type == IPIN) { /* Change if you're allowing route-throughs */ diff --git a/vpr/src/route/router_lookahead_compressed_map.h b/vpr/src/route/router_lookahead_compressed_map.h index a111089c826..07556d62f82 100644 --- a/vpr/src/route/router_lookahead_compressed_map.h +++ b/vpr/src/route/router_lookahead_compressed_map.h @@ -25,7 +25,10 @@ class CompressedMapLookahead : public RouterLookahead { bool is_flat_; protected: - float get_expected_cost(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const override; + float get_expected_cost(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const override; std::pair get_expected_delay_and_cong(RRNodeId from_node, RRNodeId to_node, @@ -52,24 +55,32 @@ class CompressedMapLookahead : public RouterLookahead { VPR_THROW(VPR_ERROR_ROUTE, "CompressedMapLookahead::write_intra_cluster unimplemented"); } - float get_opin_distance_min_delay(int /*physical_tile_idx*/, int /*from_layer*/, int /*to_layer*/, int /*dx*/, int /*dy*/) const override { + float get_opin_distance_min_delay(int /*physical_tile_idx*/, + int /*from_layer*/, + int /*to_layer*/, + int /*dx*/, + int /*dy*/) const override { return -1.; } }; -// This is a 5D array that stores estimates of the cost to reach a location at a particular distance away from the current location. -// The router look-ahead is built under the assumption of translation-invariance, meaning the current location (in terms of x-y coordinates) is not crucial. -// The indices of this array are as follows: -// from_layer: The layer number that the node under consideration is on. -// Chan type: The type of channel (x/y) that the node under consideration belongs to. -// Seg type: The type of segment (listed under "segmentlist" tag in the architecture file) that the node under consideration belongs to. -// to_layer: The layer number that the target node is on. -// compressed index: In this type of router look-ahead, we do not sample every x and y. Another data structure maps every x and y to -// an index. That index should be used here. - -typedef vtr::NdMatrix t_compressed_wire_cost_map; //[0..num_layers][0..1][[0..num_seg_types-1][0..num_layers][compressed_idx] - //[0..1] entry distinguish between CHANX/CHANY start nodes respectively - // The first index is the layer number that the node under consideration is on, and the forth index - // is the layer number that the target node is on. +/** + * This is a 5D array that stores estimates of the cost to reach a location at a particular distance away from the current location. + * + * The router look-ahead is built under the assumption of translation-invariance, meaning the current location (in terms of x-y coordinates) is not crucial. + * The indices of this array are as follows: + * from_layer: The layer number that the node under consideration is on. + * Chan type: The type of channel (x/y) that the node under consideration belongs to. + * Seg type: The type of segment (listed under "segmentlist" tag in the architecture file) that the node under consideration belongs to. + * to_layer: The layer number that the target node is on. + * compressed index: In this type of router look-ahead, we do not sample every x and y. Another data structure maps every x and y to + * an index. That index should be used here. + * + * [0..num_layers][0..1][[0..num_seg_types-1][0..num_layers][compressed_idx] + * [0..1] entry distinguish between CHANX/CHANY start nodes respectively + * The first index is the layer number that the node under consideration is on, and the forth index + * is the layer number that the target node is on. + */ +typedef vtr::NdMatrix t_compressed_wire_cost_map; #endif //VTR_ROUTER_LOOKAHEAD_COMPRESSED_MAP_H diff --git a/vpr/src/route/router_lookahead_cost_map.cpp b/vpr/src/route/router_lookahead_cost_map.cpp index ec27878b3a1..decc53c845e 100644 --- a/vpr/src/route/router_lookahead_cost_map.cpp +++ b/vpr/src/route/router_lookahead_cost_map.cpp @@ -6,11 +6,11 @@ #include "vtr_geometry.h" #ifdef VTR_ENABLE_CAPNPROTO -# include "capnp/serialize.h" -# include "extended_map_lookahead.capnp.h" -# include "ndmatrix_serdes.h" -# include "mmap_file.h" -# include "serdes_utils.h" +#include "capnp/serialize.h" +#include "extended_map_lookahead.capnp.h" +#include "ndmatrix_serdes.h" +#include "mmap_file.h" +#include "serdes_utils.h" #endif // Lookahead penalties constants @@ -93,8 +93,7 @@ int CostMap::node_to_segment(int from_node_ind) const { */ static util::Cost_Entry penalize(const util::Cost_Entry& entry, int distance, float penalty) { penalty = std::max(penalty, PENALTY_MIN); - return util::Cost_Entry(entry.delay + distance * penalty * PENALTY_FACTOR, - entry.congestion, entry.fill); + return util::Cost_Entry(entry.delay + distance * penalty * PENALTY_FACTOR, entry.congestion, entry.fill); } /** @@ -118,8 +117,7 @@ util::Cost_Entry CostMap::find_cost(int from_seg_index, int delta_x, int delta_y } // Delta coordinate with the offset adjusted to fit the segment bounding box - vtr::Point coord(delta_x - offset_[0][from_seg_index].first, - delta_y - offset_[0][from_seg_index].second); + vtr::Point coord(delta_x - offset_[0][from_seg_index].first, delta_y - offset_[0][from_seg_index].second); vtr::Rect bounds(0, 0, cost_map.dim_size(0), cost_map.dim_size(1)); // Get the closest point in the bounding box: @@ -162,13 +160,18 @@ float CostMap::get_penalty(vtr::NdMatrix& matrix) const { } } - float delay_penalty = (max_delay - min_delay) / static_cast(std::max(1, manhattan_distance(max_location, min_location))); + float delay_penalty + = (max_delay - min_delay) / static_cast(std::max(1, manhattan_distance(max_location, min_location))); return delay_penalty; } // fills the holes in the cost map matrix -void CostMap::fill_holes(vtr::NdMatrix& matrix, int seg_index, int bounding_box_width, int bounding_box_height, float delay_penalty) { +void CostMap::fill_holes(vtr::NdMatrix& matrix, + int seg_index, + int bounding_box_width, + int bounding_box_height, + float delay_penalty) { // find missing cost entries and fill them in by copying a nearby cost entry std::vector> missing; bool couldnt_fill = false; @@ -206,8 +209,8 @@ void CostMap::fill_holes(vtr::NdMatrix& matrix, int seg_ind } if (couldnt_fill) { - VTR_LOG_WARN("Couldn't fill holes in the cost matrix for %ld, %d x %d bounding box\n", - seg_index, bounding_box_width, bounding_box_height); + VTR_LOG_WARN("Couldn't fill holes in the cost matrix for %ld, %d x %d bounding box\n", seg_index, + bounding_box_width, bounding_box_height); for (unsigned y = 0; y < matrix.dim_size(1); y++) { for (unsigned x = 0; x < matrix.dim_size(0); x++) { VTR_ASSERT(!matrix[x][y].valid()); @@ -251,13 +254,12 @@ void CostMap::set_cost_map(const util::RoutingCosts& delay_costs, const util::Ro if (seg_bounds.empty()) { // Didn't find any sample routes, so routing isn't possible between these segment/chan types. offset_[0][seg] = std::make_pair(0, 0); - cost_map_[0][seg] = vtr::NdMatrix( - {size_t(0), size_t(0)}); + cost_map_[0][seg] = vtr::NdMatrix({size_t(0), size_t(0)}); continue; } else { offset_[0][seg] = std::make_pair(seg_bounds.xmin(), seg_bounds.ymin()); - cost_map_[0][seg] = vtr::NdMatrix( - {size_t(seg_bounds.width()), size_t(seg_bounds.height())}); + cost_map_[0][seg] + = vtr::NdMatrix({size_t(seg_bounds.width()), size_t(seg_bounds.height())}); } } @@ -343,7 +345,8 @@ std::vector> CostMap::list_empty() const { std::vector> results; for (int iseg = 0; iseg < (int)cost_map_.dim_size(0); iseg++) { auto& matrix = cost_map_[0][iseg]; - if (matrix.dim_size(0) == 0 || matrix.dim_size(1) == 0) results.push_back(std::make_pair(0, iseg)); + if (matrix.dim_size(0) == 0 || matrix.dim_size(1) == 0) + results.push_back(std::make_pair(0, iseg)); } return results; @@ -438,16 +441,12 @@ static void FromVprVector2D(VprVector2D::Builder* out, const std::pair out->setY(in.second); } -static void ToMatrixCostEntry(vtr::NdMatrix* out, - const Matrix::Reader& in) { +static void ToMatrixCostEntry(vtr::NdMatrix* out, const Matrix::Reader& in) { ToNdMatrix<2, VprCostEntry, util::Cost_Entry>(out, in, ToCostEntry); } -static void FromMatrixCostEntry( - Matrix::Builder* out, - const vtr::NdMatrix& in) { - FromNdMatrix<2, VprCostEntry, util::Cost_Entry>( - out, in, FromCostEntry); +static void FromMatrixCostEntry(Matrix::Builder* out, const vtr::NdMatrix& in) { + FromNdMatrix<2, VprCostEntry, util::Cost_Entry>(out, in, FromCostEntry); } static void ToFloat(float* out, const VprFloatEntry::Reader& in) { @@ -469,20 +468,18 @@ void CostMap::read(const std::string& file) { auto cost_map = reader.getRoot(); { const auto& offset = cost_map.getOffset(); - ToNdMatrix<2, VprVector2D, std::pair>( - &offset_, offset, ToVprVector2D); + ToNdMatrix<2, VprVector2D, std::pair>(&offset_, offset, ToVprVector2D); } { const auto& cost_maps = cost_map.getCostMap(); - ToNdMatrix<2, Matrix, vtr::NdMatrix>( - &cost_map_, cost_maps, ToMatrixCostEntry); + ToNdMatrix<2, Matrix, vtr::NdMatrix>(&cost_map_, cost_maps, + ToMatrixCostEntry); } { const auto& penalty = cost_map.getPenalty(); - ToNdMatrix<2, VprFloatEntry, float>( - &penalty_, penalty, ToFloat); + ToNdMatrix<2, VprFloatEntry, float>(&penalty_, penalty, ToFloat); } } @@ -493,20 +490,18 @@ void CostMap::write(const std::string& file) const { { auto offset = cost_map.initOffset(); - FromNdMatrix<2, VprVector2D, std::pair>( - &offset, offset_, FromVprVector2D); + FromNdMatrix<2, VprVector2D, std::pair>(&offset, offset_, FromVprVector2D); } { auto cost_maps = cost_map.initCostMap(); - FromNdMatrix<2, Matrix, vtr::NdMatrix>( - &cost_maps, cost_map_, FromMatrixCostEntry); + FromNdMatrix<2, Matrix, vtr::NdMatrix>(&cost_maps, cost_map_, + FromMatrixCostEntry); } { auto penalty = cost_map.initPenalty(); - FromNdMatrix<2, VprFloatEntry, float>( - &penalty, penalty_, FromFloat); + FromNdMatrix<2, VprFloatEntry, float>(&penalty, penalty_, FromFloat); } writeMessageToFile(file, &builder); diff --git a/vpr/src/route/router_lookahead_cost_map.h b/vpr/src/route/router_lookahead_cost_map.h index 39b0fd21751..82c03de570b 100644 --- a/vpr/src/route/router_lookahead_cost_map.h +++ b/vpr/src/route/router_lookahead_cost_map.h @@ -66,7 +66,10 @@ class CostMap { * * The coordinates identifying the cost map location to fill (cx, cy) need to fall within the bounding box provided as input (bounds). If the (cx, cy) point falls out of the bounds, a default cost entry is returned instead. */ - std::pair get_nearby_cost_entry(const vtr::NdMatrix& matrix, int cx, int cy, const vtr::Rect& bounds); + std::pair get_nearby_cost_entry(const vtr::NdMatrix& matrix, + int cx, + int cy, + const vtr::Rect& bounds); /** * @brief Reads the lookahead file @@ -86,15 +89,21 @@ class CostMap { std::vector> list_empty() const; private: - vtr::Matrix> cost_map_; ///> cost_map_; - vtr::Matrix> offset_; ///> offset_; vtr::Matrix penalty_; ///& matrix, int seg_index, int bounding_box_width, int bounding_box_height, float delay_penalty); + void fill_holes(vtr::NdMatrix& matrix, + int seg_index, + int bounding_box_width, + int bounding_box_height, + float delay_penalty); }; #endif diff --git a/vpr/src/route/router_lookahead_extended_map.cpp b/vpr/src/route/router_lookahead_extended_map.cpp index d72f5471130..03b7b53662f 100644 --- a/vpr/src/route/router_lookahead_extended_map.cpp +++ b/vpr/src/route/router_lookahead_extended_map.cpp @@ -19,15 +19,15 @@ #include "route_debug.h" #ifdef VTR_ENABLE_CAPNPROTO -# include "capnp/serialize.h" -# include "extended_map_lookahead.capnp.h" -# include "ndmatrix_serdes.h" -# include "mmap_file.h" -# include "serdes_utils.h" +#include "capnp/serialize.h" +#include "extended_map_lookahead.capnp.h" +#include "ndmatrix_serdes.h" +#include "mmap_file.h" +#include "serdes_utils.h" #endif #if defined(VPR_USE_TBB) -# include +#include #endif /* we're profiling routing cost over many tracks for each wire type, so we'll @@ -65,7 +65,11 @@ static std::pair run_dijkstra(RRNodeId start_node, std::vector* paths, util::RoutingCosts* routing_costs); -std::pair ExtendedMapLookahead::get_src_opin_cost(RRNodeId from_node, int delta_x, int delta_y, int to_layer_num, const t_conn_cost_params& params) const { +std::pair ExtendedMapLookahead::get_src_opin_cost(RRNodeId from_node, + int delta_x, + int delta_y, + int to_layer_num, + const t_conn_cost_params& params) const { auto& device_ctx = g_vpr_ctx.device(); auto& rr_graph = device_ctx.rr_graph; @@ -74,9 +78,8 @@ std::pair ExtendedMapLookahead::get_src_opin_cost(RRNodeId from_no //reachable, we query the f_wire_cost_map (i.e. the wire lookahead) to get the final //delay to reach the sink. - t_physical_tile_type_ptr tile_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(from_node), - rr_graph.node_ylow(from_node), - rr_graph.node_layer(from_node)}); + t_physical_tile_type_ptr tile_type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(from_node), rr_graph.node_ylow(from_node), rr_graph.node_layer(from_node)}); auto tile_index = tile_type->index; auto from_ptc = rr_graph.node_ptc_num(from_node); @@ -136,16 +139,12 @@ std::pair ExtendedMapLookahead::get_src_opin_cost(RRNodeId from_no return std::make_pair(expected_delay_cost, expected_cong_cost); } - VTR_ASSERT_SAFE_MSG(false, - vtr::string_fmt("Lookahead failed to estimate cost from %s: %s", - rr_node_arch_name(from_node, is_flat_).c_str(), - describe_rr_node(device_ctx.rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - from_node, - is_flat_) - .c_str()) - .c_str()); + VTR_ASSERT_SAFE_MSG(false, vtr::string_fmt("Lookahead failed to estimate cost from %s: %s", + rr_node_arch_name(from_node, is_flat_).c_str(), + describe_rr_node(device_ctx.rr_graph, device_ctx.grid, + device_ctx.rr_indexed_data, from_node, is_flat_) + .c_str()) + .c_str()); } float ExtendedMapLookahead::get_chan_ipin_delays(RRNodeId to_node) const { @@ -155,9 +154,8 @@ float ExtendedMapLookahead::get_chan_ipin_delays(RRNodeId to_node) const { e_rr_type to_type = rr_graph.node_type(to_node); VTR_ASSERT(to_type == SINK || to_type == IPIN); - auto to_tile_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(to_node), - rr_graph.node_ylow(to_node), - rr_graph.node_layer(to_node)}); + auto to_tile_type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(to_node), rr_graph.node_ylow(to_node), rr_graph.node_layer(to_node)}); auto to_tile_index = to_tile_type->index; auto to_ptc = rr_graph.node_ptc_num(to_node); @@ -181,7 +179,10 @@ float ExtendedMapLookahead::get_chan_ipin_delays(RRNodeId to_node) const { // // The from_node can be of one of the following types: CHANX, CHANY, SOURCE, OPIN // The to_node is always a SINK -std::pair ExtendedMapLookahead::get_expected_delay_and_cong(RRNodeId from_node, RRNodeId to_node, const t_conn_cost_params& params, float /*R_upstream*/) const { +std::pair ExtendedMapLookahead::get_expected_delay_and_cong(RRNodeId from_node, + RRNodeId to_node, + const t_conn_cost_params& params, + float /*R_upstream*/) const { if (from_node == to_node) { return std::make_pair(0., 0.); } @@ -213,10 +214,9 @@ std::pair ExtendedMapLookahead::get_expected_delay_and_cong(RRNode if (!cost_entry.valid()) { // there is no route - VTR_LOGV_DEBUG(f_router_debug, - "Not connected %d (%s, %d) -> %d (%s)\n", - size_t(from_node), rr_graph.node_type_string(from_node), from_seg_index, - size_t(to_node), rr_graph.node_type_string(to_node)); + VTR_LOGV_DEBUG(f_router_debug, "Not connected %d (%s, %d) -> %d (%s)\n", size_t(from_node), + rr_graph.node_type_string(from_node), from_seg_index, size_t(to_node), + rr_graph.node_type_string(to_node)); float infinity = std::numeric_limits::infinity(); return std::make_pair(infinity, infinity); } @@ -244,9 +244,8 @@ std::pair ExtendedMapLookahead::get_expected_delay_and_cong(RRNode VTR_LOGV_DEBUG(f_router_debug, "Requested lookahead from node %d to %d\n", size_t(from_node), size_t(to_node)); const std::string& segment_name = rr_graph.rr_segments(RRSegmentId(from_seg_index)).name; - VTR_LOGV_DEBUG(f_router_debug, "Lookahead returned %s (%d) with distance (%d, %d)\n", - segment_name.c_str(), from_seg_index, - dx, dy); + VTR_LOGV_DEBUG(f_router_debug, "Lookahead returned %s (%d) with distance (%d, %d)\n", segment_name.c_str(), + from_seg_index, dx, dy); VTR_LOGV_DEBUG(f_router_debug, "Lookahead delay: %g\n", expected_delay_cost); VTR_LOGV_DEBUG(f_router_debug, "Lookahead congestion: %g\n", expected_cong_cost); VTR_LOGV_DEBUG(f_router_debug, "Criticality: %g\n", params.criticality); @@ -320,9 +319,7 @@ bool ExtendedMapLookahead::add_paths(RRNodeId start_node, vtr::Point delta(delta_x, delta_y); - util::RoutingCostKey key = { - seg_index, - delta}; + util::RoutingCostKey key = {seg_index, delta}; if (size_t(this_node) != size_t(start_node)) { start_to_here = Entry(this_node, rr_graph.edge_switch(RRNodeId(parent), paths[*it].edge), &start_to_here); @@ -383,7 +380,8 @@ std::pair ExtendedMapLookahead::run_dijkstra(RRNodeId start_node, * visited (used to determine whether to push a candidate node onto the * expansion queue. * Also store the parent node so we can reconstruct a specific path. */ - std::fill(paths->begin(), paths->end(), util::Search_Path{std::numeric_limits::infinity(), std::numeric_limits::max(), -1}); + std::fill(paths->begin(), paths->end(), + util::Search_Path{std::numeric_limits::infinity(), std::numeric_limits::max(), -1}); /* a priority queue for expansion */ std::priority_queue, std::greater> pq; @@ -488,12 +486,12 @@ void ExtendedMapLookahead::compute(const std::vector& segment_inf } if (path_count > 0) { - VTR_LOG("Expanded %d paths of segment type %s(%d) starting at (%d, %d) from %d segments, max_cost %e %e (%g paths/sec)\n", - path_count, segment_inf[region.segment_type].name.c_str(), region.segment_type, - point.location.x(), point.location.y(), - (int)point.nodes.size(), - max_delay_cost, max_base_cost, - path_count / run_timer.elapsed_sec()); + VTR_LOG( + "Expanded %d paths of segment type %s(%d) starting at (%d, %d) from %d segments, max_cost %e %e " + "(%g paths/sec)\n", + path_count, segment_inf[region.segment_type].name.c_str(), region.segment_type, point.location.x(), + point.location.y(), (int)point.nodes.size(), max_delay_cost, max_base_cost, + path_count / run_timer.elapsed_sec()); } total_path_count += path_count; @@ -514,8 +512,8 @@ void ExtendedMapLookahead::compute(const std::vector& segment_inf #endif if (total_path_count == 0) { - VTR_LOG_WARN("No paths found for sample region %s(%d, %d)\n", - segment_inf[region.segment_type].name.c_str(), region.grid_location.x(), region.grid_location.y()); + VTR_LOG_WARN("No paths found for sample region %s(%d, %d)\n", segment_inf[region.segment_type].name.c_str(), + region.grid_location.x(), region.grid_location.y()); } // combine the cost map from this run with the final cost maps for each segment @@ -553,17 +551,14 @@ void ExtendedMapLookahead::compute(const std::vector& segment_inf for (auto& cost : all_costs) { const auto& key = cost.first; const auto& val = cost.second; - VTR_LOG("%d -> %d (%d, %d): %g, %g\n", - val.from_node, val.to_node, - key.delta.x(), key.delta.y(), + VTR_LOG("%d -> %d (%d, %d): %g, %g\n", val.from_node, val.to_node, key.delta.x(), key.delta.y(), val.cost_entry.delay, val.cost_entry.congestion); } #endif #if defined(CONNECTION_BOX_LOOKAHEAD_MAP_PRINT_COST_MAPS) for (int iseg = 0; iseg < (ssize_t)num_segments; iseg++) { - VTR_LOG("cost map for %s(%d)\n", - segment_inf[iseg].name.c_str(), iseg); + VTR_LOG("cost map for %s(%d)\n", segment_inf[iseg].name.c_str(), iseg); cost_map_.print(iseg); } #endif @@ -572,18 +567,16 @@ void ExtendedMapLookahead::compute(const std::vector& segment_inf for (std::pair p : cost_map_.list_empty()) { int ichan, iseg; std::tie(ichan, iseg) = p; - VTR_LOG("cost map for %s(%d), chan %d EMPTY\n", - segment_inf[iseg].name.c_str(), iseg, box_id); + VTR_LOG("cost map for %s(%d), chan %d EMPTY\n", segment_inf[iseg].name.c_str(), iseg, box_id); } #endif } // get an expected minimum cost for routing from the current node to the target node -float ExtendedMapLookahead::get_expected_cost( - RRNodeId current_node, - RRNodeId target_node, - const t_conn_cost_params& params, - float R_upstream) const { +float ExtendedMapLookahead::get_expected_cost(RRNodeId current_node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; diff --git a/vpr/src/route/router_lookahead_extended_map.h b/vpr/src/route/router_lookahead_extended_map.h index 589ea06e6a4..afba6dd6d2b 100644 --- a/vpr/src/route/router_lookahead_extended_map.h +++ b/vpr/src/route/router_lookahead_extended_map.h @@ -30,7 +30,11 @@ class ExtendedMapLookahead : public RouterLookahead { * @param criticality_fac criticality of the current connection between 0 (all congestion) and 1 (all timing) * @return expected cost to get to the destination */ - std::pair get_src_opin_cost(RRNodeId from_node, int delta_x, int delta_y, int to_layer_num, const t_conn_cost_params& params) const; + std::pair get_src_opin_cost(RRNodeId from_node, + int delta_x, + int delta_y, + int to_layer_num, + const t_conn_cost_params& params) const; /** * @brief Returns the CHAN -> IPIN delay that gets added to the final expected delay @@ -64,12 +68,18 @@ class ExtendedMapLookahead : public RouterLookahead { /** * @brief Returns the expected cost to get to a destination node */ - float get_expected_cost(RRNodeId node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const override; + float get_expected_cost(RRNodeId node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const override; /** * @brief Returns a pair of expected delay and congestion */ - std::pair get_expected_delay_and_cong(RRNodeId inode, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const override; + std::pair get_expected_delay_and_cong(RRNodeId inode, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const override; /** * @brief Computes the extended lookahead map @@ -104,7 +114,11 @@ class ExtendedMapLookahead : public RouterLookahead { VPR_THROW(VPR_ERROR_ROUTE, "ExtendedMapLookahead::write_intra_cluster unimplemented"); } - float get_opin_distance_min_delay(int /*physical_tile_idx*/, int /*from_layer*/, int /*to_layer*/, int /*dx*/, int /*dy*/) const override { + float get_opin_distance_min_delay(int /*physical_tile_idx*/, + int /*from_layer*/, + int /*to_layer*/, + int /*dx*/, + int /*dy*/) const override { return -1.; } }; diff --git a/vpr/src/route/router_lookahead_map.cpp b/vpr/src/route/router_lookahead_map.cpp index 80cac91ee16..aef390078e3 100644 --- a/vpr/src/route/router_lookahead_map.cpp +++ b/vpr/src/route/router_lookahead_map.cpp @@ -40,12 +40,12 @@ #include "route_common.h" #ifdef VTR_ENABLE_CAPNPROTO -# include "capnp/serialize.h" -# include "map_lookahead.capnp.h" -# include "ndmatrix_serdes.h" -# include "intra_cluster_serdes.h" -# include "mmap_file.h" -# include "serdes_utils.h" +#include "capnp/serialize.h" +#include "map_lookahead.capnp.h" +#include "ndmatrix_serdes.h" +#include "intra_cluster_serdes.h" +#include "mmap_file.h" +#include "serdes_utils.h" #endif /* VTR_ENABLE_CAPNPROTO */ static constexpr int VALID_NEIGHBOR_NUMBER = 3; @@ -88,10 +88,11 @@ static void compute_router_wire_lookahead(const std::vector& segm * @param det_routing_arch * @param device_ctx */ -static void compute_tiles_lookahead(std::unordered_map& intra_tile_pin_primitive_pin_delay, - std::unordered_map>& tile_min_cost, - const t_det_routing_arch& det_routing_arch, - const DeviceContext& device_ctx); +static void compute_tiles_lookahead( + std::unordered_map& intra_tile_pin_primitive_pin_delay, + std::unordered_map>& tile_min_cost, + const t_det_routing_arch& det_routing_arch, + const DeviceContext& device_ctx); /*** * @brief Compute the cose from tile pins to tile sinks * @param intra_tile_pin_primitive_pin_delay [physical_tile_type_idx][from_pin_ptc_num][sink_ptc_num] -> cost @@ -99,10 +100,11 @@ static void compute_tiles_lookahead(std::unordered_map& intra_tile_pin_primitive_pin_delay, - t_physical_tile_type_ptr physical_tile, - const t_det_routing_arch& det_routing_arch, - const int delayless_switch); +static void compute_tile_lookahead( + std::unordered_map& intra_tile_pin_primitive_pin_delay, + t_physical_tile_type_ptr physical_tile, + const t_det_routing_arch& det_routing_arch, + const int delayless_switch); /*** * @brief Compute the minimum cost to get to the sinks from pins on the cluster @@ -110,9 +112,10 @@ static void compute_tile_lookahead(std::unordered_map cost */ -static void store_min_cost_to_sinks(std::unordered_map>& tile_min_cost, - t_physical_tile_type_ptr physical_tile, - const std::unordered_map& intra_tile_pin_primitive_pin_delay); +static void store_min_cost_to_sinks( + std::unordered_map>& tile_min_cost, + t_physical_tile_type_ptr physical_tile, + const std::unordered_map& intra_tile_pin_primitive_pin_delay); /** * @brief Iterate over the first (channel type) and second (segment type) dimensions of f_wire_cost_map to get the minimum cost for each dx and dy_ @@ -126,22 +129,33 @@ static void min_chann_global_cost_map(vtr::NdMatrix& distan * @param src_opin_delays * @param distance_min_cost */ -static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_delays, vtr::NdMatrix& distance_min_cost); +static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_delays, + vtr::NdMatrix& distance_min_cost); // Read the file and fill intra_tile_pin_primitive_pin_delay and tile_min_cost -static void read_intra_cluster_router_lookahead(std::unordered_map& intra_tile_pin_primitive_pin_delay, - const std::string& file); +static void read_intra_cluster_router_lookahead( + std::unordered_map& intra_tile_pin_primitive_pin_delay, + const std::string& file); // Write the file with intra_tile_pin_primitive_pin_delay and tile_min_cost -static void write_intra_cluster_router_lookahead(const std::string& file, - const std::unordered_map& intra_tile_pin_primitive_pin_delay); +static void write_intra_cluster_router_lookahead( + const std::string& file, + const std::unordered_map& intra_tile_pin_primitive_pin_delay); /* sets the lookahead cost map entries based on representative cost entries from routing_cost_map */ -static void set_lookahead_map_costs(int from_layer_num, int segment_index, e_rr_type chan_type, util::t_routing_cost_map& routing_cost_map); +static void set_lookahead_map_costs(int from_layer_num, + int segment_index, + e_rr_type chan_type, + util::t_routing_cost_map& routing_cost_map); /* fills in missing lookahead map entries by copying the cost of the closest valid entry */ static void fill_in_missing_lookahead_entries(int segment_index, e_rr_type chan_type); /* returns a cost entry in the f_wire_cost_map that is near the specified coordinates (and preferably towards (0,0)) */ -static util::Cost_Entry get_nearby_cost_entry(int from_layer_num, int x, int y, int to_layer_num, int segment_index, int chan_index); +static util::Cost_Entry get_nearby_cost_entry(int from_layer_num, + int x, + int y, + int to_layer_num, + int segment_index, + int chan_index); /** * @brief Fill in the missing entry in router lookahead map @@ -167,7 +181,10 @@ MapLookahead::MapLookahead(const t_det_routing_arch& det_routing_arch, bool is_f : det_routing_arch_(det_routing_arch) , is_flat_(is_flat) {} -float MapLookahead::get_expected_cost(RRNodeId current_node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const { +float MapLookahead::get_expected_cost(RRNodeId current_node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -190,7 +207,10 @@ float MapLookahead::get_expected_cost(RRNodeId current_node, RRNodeId target_nod } } -float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const { +float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -201,13 +221,11 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI float delay_cost = 0.; float cong_cost = 0.; - t_physical_tile_type_ptr from_physical_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(current_node), - rr_graph.node_ylow(current_node), - rr_graph.node_layer(current_node)}); + t_physical_tile_type_ptr from_physical_type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(current_node), rr_graph.node_ylow(current_node), rr_graph.node_layer(current_node)}); int from_node_ptc_num = rr_graph.node_ptc_num(current_node); - t_physical_tile_type_ptr to_physical_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(target_node), - rr_graph.node_ylow(target_node), - rr_graph.node_layer(target_node)}); + t_physical_tile_type_ptr to_physical_type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(target_node), rr_graph.node_ylow(target_node), rr_graph.node_layer(target_node)}); float delay_offset_cost = 0.; float cong_offset_cost = 0.; int to_node_ptc_num = rr_graph.node_ptc_num(target_node); @@ -220,29 +238,36 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI // delay_cost and cong_cost only represent the cost to get to the root-level pins. The below offsets are used to represent the intra-cluster cost // of getting to a sink delay_offset_cost = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; - cong_offset_cost = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; + cong_offset_cost + = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; return delay_cost + cong_cost + delay_offset_cost + cong_offset_cost; } else if (from_rr_type == OPIN) { if (is_inter_cluster_node(rr_graph, current_node)) { // Similar to CHANX and CHANY - std::tie(delay_cost, cong_cost) = get_expected_delay_and_cong(current_node, target_node, params, R_upstream); + std::tie(delay_cost, cong_cost) + = get_expected_delay_and_cong(current_node, target_node, params, R_upstream); - delay_offset_cost = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; - cong_offset_cost = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; + delay_offset_cost + = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; + cong_offset_cost + = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; return delay_cost + cong_cost + delay_offset_cost + cong_offset_cost; } else { if (node_in_same_physical_tile(current_node, target_node)) { delay_offset_cost = 0.; cong_offset_cost = 0.; - const auto& pin_delays = intra_tile_pin_primitive_pin_delay.at(from_physical_type->index)[from_node_ptc_num]; + const auto& pin_delays + = intra_tile_pin_primitive_pin_delay.at(from_physical_type->index)[from_node_ptc_num]; auto pin_delay_itr = pin_delays.find(rr_graph.node_ptc_num(target_node)); if (pin_delay_itr == pin_delays.end()) { // There isn't any intra-cluster path to connect the current OPIN to the SINK, thus it has to outside. // The best estimation we have now, it the minimum intra-cluster delay to the sink. However, this cost is incomplete, // since it does not consider the cost of going outside of the cluster and, then, returning to it. - delay_cost = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; - cong_cost = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; + delay_cost + = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; + cong_cost = (1. - params.criticality) + * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; return delay_cost + cong_cost; } else { delay_cost = params.criticality * pin_delay_itr->second.delay; @@ -255,11 +280,19 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI auto [delta_x, delta_y] = util::get_xy_deltas(current_node, target_node); delta_x = abs(delta_x); delta_y = abs(delta_y); - delay_cost = params.criticality * chann_distance_based_min_cost[rr_graph.node_layer(current_node)][to_layer_num][delta_x][delta_y].delay; - cong_cost = (1. - params.criticality) * chann_distance_based_min_cost[rr_graph.node_layer(current_node)][to_layer_num][delta_x][delta_y].congestion; - - delay_offset_cost = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; - cong_offset_cost = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; + delay_cost + = params.criticality + * chann_distance_based_min_cost[rr_graph.node_layer(current_node)][to_layer_num][delta_x][delta_y] + .delay; + cong_cost + = (1. - params.criticality) + * chann_distance_based_min_cost[rr_graph.node_layer(current_node)][to_layer_num][delta_x][delta_y] + .congestion; + + delay_offset_cost + = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; + cong_offset_cost = (1. - params.criticality) + * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; } return delay_cost + cong_cost + delay_offset_cost + cong_offset_cost; } @@ -286,11 +319,19 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI auto [delta_x, delta_y] = util::get_xy_deltas(current_node, target_node); delta_x = abs(delta_x); delta_y = abs(delta_y); - delay_cost = params.criticality * chann_distance_based_min_cost[rr_graph.node_layer(current_node)][to_layer_num][delta_x][delta_y].delay; - cong_cost = (1. - params.criticality) * chann_distance_based_min_cost[rr_graph.node_layer(current_node)][to_layer_num][delta_x][delta_y].congestion; - - delay_offset_cost = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; - cong_offset_cost = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; + delay_cost + = params.criticality + * chann_distance_based_min_cost[rr_graph.node_layer(current_node)][to_layer_num][delta_x][delta_y] + .delay; + cong_cost + = (1. - params.criticality) + * chann_distance_based_min_cost[rr_graph.node_layer(current_node)][to_layer_num][delta_x][delta_y] + .congestion; + + delay_offset_cost + = params.criticality * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).delay; + cong_offset_cost + = (1. - params.criticality) * tile_min_cost.at(to_physical_type->index).at(to_node_ptc_num).congestion; } return delay_cost + cong_cost + delay_offset_cost + cong_offset_cost; } else { @@ -302,7 +343,10 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI /******** Function Definitions ********/ /* queries the lookahead_map (should have been computed prior to routing) to get the expected cost * from the specified source to the specified target */ -std::pair MapLookahead::get_expected_delay_and_cong(RRNodeId from_node, RRNodeId to_node, const t_conn_cost_params& params, float /*R_upstream*/) const { +std::pair MapLookahead::get_expected_delay_and_cong(RRNodeId from_node, + RRNodeId to_node, + const t_conn_cost_params& params, + float /*R_upstream*/) const { auto& device_ctx = g_vpr_ctx.device(); auto& rr_graph = device_ctx.rr_graph; @@ -322,33 +366,26 @@ std::pair MapLookahead::get_expected_delay_and_cong(RRNodeId from_ //reachable, we query the f_wire_cost_map (i.e. the wire lookahead) to get the final //delay to reach the sink. - t_physical_tile_type_ptr from_tile_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(from_node), - rr_graph.node_ylow(from_node), - from_layer_num}); + t_physical_tile_type_ptr from_tile_type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(from_node), rr_graph.node_ylow(from_node), from_layer_num}); auto from_tile_index = std::distance(&device_ctx.physical_tile_types[0], from_tile_type); auto from_ptc = rr_graph.node_ptc_num(from_node); - std::tie(expected_delay_cost, expected_cong_cost) = util::get_cost_from_src_opin(src_opin_delays[from_layer_num][from_tile_index][from_ptc][to_layer_num], - delta_x, - delta_y, - to_layer_num, - get_wire_cost_entry); + std::tie(expected_delay_cost, expected_cong_cost) + = util::get_cost_from_src_opin(src_opin_delays[from_layer_num][from_tile_index][from_ptc][to_layer_num], + delta_x, delta_y, to_layer_num, get_wire_cost_entry); expected_delay_cost *= params.criticality; expected_cong_cost *= (1 - params.criticality); - VTR_ASSERT_SAFE_MSG(std::isfinite(expected_delay_cost), - vtr::string_fmt("Lookahead failed to estimate cost from %s: %s", - rr_node_arch_name(from_node, is_flat_).c_str(), - describe_rr_node(rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - from_node, - is_flat_) - .c_str()) - .c_str()); + VTR_ASSERT_SAFE_MSG( + std::isfinite(expected_delay_cost), + vtr::string_fmt( + "Lookahead failed to estimate cost from %s: %s", rr_node_arch_name(from_node, is_flat_).c_str(), + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, from_node, is_flat_).c_str()) + .c_str()); } else if (from_type == CHANX || from_type == CHANY) { //When estimating costs from a wire, we directly look-up the result in the wire lookahead (f_wire_cost_map) @@ -359,25 +396,17 @@ std::pair MapLookahead::get_expected_delay_and_cong(RRNodeId from_ VTR_ASSERT(from_seg_index >= 0); /* now get the expected cost from our lookahead map */ - util::Cost_Entry cost_entry = get_wire_cost_entry(from_type, - from_seg_index, - from_layer_num, - delta_x, - delta_y, - to_layer_num); + util::Cost_Entry cost_entry + = get_wire_cost_entry(from_type, from_seg_index, from_layer_num, delta_x, delta_y, to_layer_num); expected_delay_cost = cost_entry.delay; expected_cong_cost = cost_entry.congestion; - VTR_ASSERT_SAFE_MSG(std::isfinite(expected_delay_cost), - vtr::string_fmt("Lookahead failed to estimate cost from %s: %s", - rr_node_arch_name(from_node, is_flat_).c_str(), - describe_rr_node(rr_graph, - device_ctx.grid, - device_ctx.rr_indexed_data, - from_node, - is_flat_) - .c_str()) - .c_str()); + VTR_ASSERT_SAFE_MSG( + std::isfinite(expected_delay_cost), + vtr::string_fmt( + "Lookahead failed to estimate cost from %s: %s", rr_node_arch_name(from_node, is_flat_).c_str(), + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, from_node, is_flat_).c_str()) + .c_str()); expected_delay_cost = cost_entry.delay * params.criticality; expected_cong_cost = cost_entry.congestion * (1 - params.criticality); } else if (from_type == IPIN) { /* Change if you're allowing route-throughs */ @@ -410,10 +439,7 @@ void MapLookahead::compute_intra_tile() { VTR_ASSERT(intra_tile_pin_primitive_pin_delay.empty()); VTR_ASSERT(tile_min_cost.empty()); - compute_tiles_lookahead(intra_tile_pin_primitive_pin_delay, - tile_min_cost, - det_routing_arch_, - g_vpr_ctx.device()); + compute_tiles_lookahead(intra_tile_pin_primitive_pin_delay, tile_min_cost, det_routing_arch_, g_vpr_ctx.device()); } void MapLookahead::read(const std::string& file) { @@ -432,17 +458,14 @@ void MapLookahead::read_intra_cluster(const std::string& file) { is_flat_ = true; // Maps related to global resources should not be empty VTR_ASSERT(!f_wire_cost_map.empty()); - read_intra_cluster_router_lookahead(intra_tile_pin_primitive_pin_delay, - file); + read_intra_cluster_router_lookahead(intra_tile_pin_primitive_pin_delay, file); const auto& tiles = g_vpr_ctx.device().physical_tile_types; for (const auto& tile : tiles) { if (is_empty_type(&tile)) { continue; } - store_min_cost_to_sinks(tile_min_cost, - &tile, - intra_tile_pin_primitive_pin_delay); + store_min_cost_to_sinks(tile_min_cost, &tile, intra_tile_pin_primitive_pin_delay); } } @@ -454,23 +477,32 @@ void MapLookahead::write(const std::string& file_name) const { } dump_readable_router_lookahead_map(file_name, wire_cost_map_size, get_wire_cost_entry); } else { - VTR_ASSERT(vtr::check_file_name_extension(file_name, ".capnp") || vtr::check_file_name_extension(file_name, ".bin")); + VTR_ASSERT(vtr::check_file_name_extension(file_name, ".capnp") + || vtr::check_file_name_extension(file_name, ".bin")); write_router_lookahead(file_name); } } void MapLookahead::write_intra_cluster(const std::string& file) const { - write_intra_cluster_router_lookahead(file, - intra_tile_pin_primitive_pin_delay); + write_intra_cluster_router_lookahead(file, intra_tile_pin_primitive_pin_delay); } -float MapLookahead::get_opin_distance_min_delay(int physical_tile_idx, int from_layer, int to_layer, int dx, int dy) const { +float MapLookahead::get_opin_distance_min_delay(int physical_tile_idx, + int from_layer, + int to_layer, + int dx, + int dy) const { return opin_distance_based_min_cost[physical_tile_idx][from_layer][to_layer][dx][dy].delay; } /******** Function Definitions ********/ -static util::Cost_Entry get_wire_cost_entry(e_rr_type rr_type, int seg_index, int from_layer_num, int delta_x, int delta_y, int to_layer_num) { +static util::Cost_Entry get_wire_cost_entry(e_rr_type rr_type, + int seg_index, + int from_layer_num, + int delta_x, + int delta_y, + int to_layer_num) { VTR_ASSERT_SAFE(rr_type == CHANX || rr_type == CHANY); int chan_index = 0; @@ -495,12 +527,9 @@ static void compute_router_wire_lookahead(const std::vector& segm auto& grid = device_ctx.grid; //Re-allocate - f_wire_cost_map = t_wire_cost_map({static_cast(grid.get_num_layers()), - static_cast(grid.get_num_layers()), - 2, - segment_inf_vec.size(), - device_ctx.grid.width(), - device_ctx.grid.height()}); + f_wire_cost_map = t_wire_cost_map({static_cast(grid.get_num_layers()), + static_cast(grid.get_num_layers()), 2, segment_inf_vec.size(), + device_ctx.grid.width(), device_ctx.grid.height()}); int longest_seg_length = 0; for (const auto& seg_inf : segment_inf_vec) { @@ -519,12 +548,9 @@ static void compute_router_wire_lookahead(const std::vector& segm chan_types.insert(chan_types.end(), {CHANX, CHANY}); for (e_rr_type chan_type : chan_types) { - util::t_routing_cost_map routing_cost_map = util::get_routing_cost_map(longest_seg_length, - from_layer_num, - chan_type, - segment_inf, - std::unordered_map>(), - true); + util::t_routing_cost_map routing_cost_map + = util::get_routing_cost_map(longest_seg_length, from_layer_num, chan_type, segment_inf, + std::unordered_map>(), true); if (routing_cost_map.empty()) { continue; } @@ -542,7 +568,10 @@ static void compute_router_wire_lookahead(const std::vector& segm } /* sets the lookahead cost map entries based on representative cost entries from routing_cost_map */ -static void set_lookahead_map_costs(int from_layer_num, int segment_index, e_rr_type chan_type, util::t_routing_cost_map& routing_cost_map) { +static void set_lookahead_map_costs(int from_layer_num, + int segment_index, + e_rr_type chan_type, + util::t_routing_cost_map& routing_cost_map) { int chan_index = (chan_type == CHANX) ? 0 : 1; /* set the lookahead cost map entries with a representative cost entry from routing_cost_map */ @@ -551,7 +580,8 @@ static void set_lookahead_map_costs(int from_layer_num, int segment_index, e_rr_ for (unsigned iy = 0; iy < routing_cost_map.dim_size(2); iy++) { util::Expansion_Cost_Entry& expansion_cost_entry = routing_cost_map[to_layer][ix][iy]; - f_wire_cost_map[from_layer_num][to_layer][chan_index][segment_index][ix][iy] = expansion_cost_entry.get_representative_cost_entry(util::e_representative_entry_method::SMALLEST); + f_wire_cost_map[from_layer_num][to_layer][chan_index][segment_index][ix][iy] + = expansion_cost_entry.get_representative_cost_entry(util::e_representative_entry_method::SMALLEST); } } } @@ -568,15 +598,13 @@ static void fill_in_missing_lookahead_entries(int segment_index, e_rr_type chan_ for (int to_layer_num = 0; to_layer_num < device_ctx.grid.get_num_layers(); ++to_layer_num) { for (unsigned ix = 0; ix < device_ctx.grid.width(); ix++) { for (unsigned iy = 0; iy < device_ctx.grid.height(); iy++) { - util::Cost_Entry cost_entry = f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][ix][iy]; + util::Cost_Entry cost_entry + = f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][ix][iy]; if (std::isnan(cost_entry.delay) && std::isnan(cost_entry.congestion)) { - util::Cost_Entry copied_entry = get_nearby_cost_entry_average_neighbour(from_layer_num, - static_cast(ix), - static_cast(iy), - to_layer_num, - segment_index, - chan_index); + util::Cost_Entry copied_entry = get_nearby_cost_entry_average_neighbour( + from_layer_num, static_cast(ix), static_cast(iy), to_layer_num, segment_index, + chan_index); f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][ix][iy] = copied_entry; } } @@ -586,7 +614,12 @@ static void fill_in_missing_lookahead_entries(int segment_index, e_rr_type chan_ } /* returns a cost entry in the f_wire_cost_map that is near the specified coordinates (and preferably towards (0,0)) */ -static util::Cost_Entry get_nearby_cost_entry(int from_layer_num, int x, int y, int to_layer_num, int segment_index, int chan_index) { +static util::Cost_Entry get_nearby_cost_entry(int from_layer_num, + int x, + int y, + int to_layer_num, + int segment_index, + int chan_index) { /* compute the slope from x,y to 0,0 and then move towards 0,0 by one unit to get the coordinates * of the cost entry to be copied */ @@ -613,7 +646,8 @@ static util::Cost_Entry get_nearby_cost_entry(int from_layer_num, int x, int y, copy_y = std::max(copy_y, 0); //Clip to zero copy_x = std::max(copy_x, 0); //Clip to zero - util::Cost_Entry copy_entry = f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][copy_x][copy_y]; + util::Cost_Entry copy_entry + = f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][copy_x][copy_y]; /* if the entry to be copied is also empty, recurse */ if (std::isnan(copy_entry.delay) && std::isnan(copy_entry.congestion)) { @@ -624,7 +658,8 @@ static util::Cost_Entry get_nearby_cost_entry(int from_layer_num, int x, int y, if (from_layer_num == to_layer_num) { copy_entry = util::Cost_Entry(0., 0.); } else { - copy_entry = util::Cost_Entry(std::numeric_limits::max() / 1e12, std::numeric_limits::max() / 1e12); + copy_entry = util::Cost_Entry(std::numeric_limits::max() / 1e12, + std::numeric_limits::max() / 1e12); } } else { copy_entry = get_nearby_cost_entry(from_layer_num, copy_x, copy_y, to_layer_num, segment_index, chan_index); @@ -641,8 +676,10 @@ static util::Cost_Entry get_nearby_cost_entry_average_neighbour(int from_layer_n int segment_index, int chan_index) { // Make sure that the given location doesn't have a valid entry - VTR_ASSERT(std::isnan(f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][missing_dx][missing_dy].delay)); - VTR_ASSERT(std::isnan(f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][missing_dx][missing_dy].congestion)); + VTR_ASSERT(std::isnan( + f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][missing_dx][missing_dy].delay)); + VTR_ASSERT(std::isnan( + f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][missing_dx][missing_dy].congestion)); int neighbour_num = 0; // Number of neighbours with valid entry float neighbour_delay_sum = 0; // Acc of valid delay costs @@ -658,7 +695,8 @@ static util::Cost_Entry get_nearby_cost_entry_average_neighbour(int from_layer_n if (neighbour_y < 0 || neighbour_y >= (int)f_wire_cost_map.dim_size(5)) { continue; } - util::Cost_Entry copy_entry = f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][neighbour_x][neighbour_y]; + util::Cost_Entry copy_entry + = f_wire_cost_map[from_layer_num][to_layer_num][chan_index][segment_index][neighbour_x][neighbour_y]; if (std::isnan(copy_entry.delay) || std::isnan(copy_entry.congestion)) { continue; } @@ -678,10 +716,11 @@ static util::Cost_Entry get_nearby_cost_entry_average_neighbour(int from_layer_n } } -static void compute_tiles_lookahead(std::unordered_map& intra_tile_pin_primitive_pin_delay, - std::unordered_map>& tile_min_cost, - const t_det_routing_arch& det_routing_arch, - const DeviceContext& device_ctx) { +static void compute_tiles_lookahead( + std::unordered_map& intra_tile_pin_primitive_pin_delay, + std::unordered_map>& tile_min_cost, + const t_det_routing_arch& det_routing_arch, + const DeviceContext& device_ctx) { const auto& tiles = device_ctx.physical_tile_types; for (const auto& tile : tiles) { @@ -689,46 +728,30 @@ static void compute_tiles_lookahead(std::unordered_map& intra_tile_pin_primitive_pin_delay, - t_physical_tile_type_ptr physical_tile, - const t_det_routing_arch& det_routing_arch, - const int delayless_switch) { +static void compute_tile_lookahead( + std::unordered_map& intra_tile_pin_primitive_pin_delay, + t_physical_tile_type_ptr physical_tile, + const t_det_routing_arch& det_routing_arch, + const int delayless_switch) { RRGraphBuilder rr_graph_builder; int layer = 0; int x = 1; int y = 1; - build_tile_rr_graph(rr_graph_builder, - det_routing_arch, - physical_tile, - layer, - x, - y, - delayless_switch); - - RRGraphView rr_graph{rr_graph_builder.rr_nodes(), - rr_graph_builder.node_lookup(), - rr_graph_builder.rr_node_metadata(), - rr_graph_builder.rr_edge_metadata(), - g_vpr_ctx.device().rr_indexed_data, - g_vpr_ctx.device().rr_rc_data, - rr_graph_builder.rr_segments(), - rr_graph_builder.rr_switch()}; - - util::t_ipin_primitive_sink_delays pin_delays = util::compute_intra_tile_dijkstra(rr_graph, - physical_tile, - layer, - x, - y); + build_tile_rr_graph(rr_graph_builder, det_routing_arch, physical_tile, layer, x, y, delayless_switch); + + RRGraphView rr_graph{rr_graph_builder.rr_nodes(), rr_graph_builder.node_lookup(), + rr_graph_builder.rr_node_metadata(), rr_graph_builder.rr_edge_metadata(), + g_vpr_ctx.device().rr_indexed_data, g_vpr_ctx.device().rr_rc_data, + rr_graph_builder.rr_segments(), rr_graph_builder.rr_switch()}; + + util::t_ipin_primitive_sink_delays pin_delays + = util::compute_intra_tile_dijkstra(rr_graph, physical_tile, layer, x, y); auto insert_res = intra_tile_pin_primitive_pin_delay.insert(std::make_pair(physical_tile->index, pin_delays)); VTR_ASSERT(insert_res.second); @@ -736,15 +759,16 @@ static void compute_tile_lookahead(std::unordered_map>& tile_min_cost, - t_physical_tile_type_ptr physical_tile, - const std::unordered_map& intra_tile_pin_primitive_pin_delay) { +static void store_min_cost_to_sinks( + std::unordered_map>& tile_min_cost, + t_physical_tile_type_ptr physical_tile, + const std::unordered_map& intra_tile_pin_primitive_pin_delay) { const auto& tile_pin_delays = intra_tile_pin_primitive_pin_delay.at(physical_tile->index); std::unordered_map min_cost_map; for (auto& primitive_sink_pair : physical_tile->primitive_class_inf) { int primitive_sink = primitive_sink_pair.first; - auto min_cost = util::Cost_Entry(std::numeric_limits::max() / 1e12, - std::numeric_limits::max() / 1e12); + auto min_cost + = util::Cost_Entry(std::numeric_limits::max() / 1e12, std::numeric_limits::max() / 1e12); for (int pin_physical_num = 0; pin_physical_num < physical_tile->num_pins; pin_physical_num++) { if (get_pin_type_from_pin_physical_num(physical_tile, pin_physical_num) != e_pin_type::RECEIVER) { @@ -770,10 +794,8 @@ static void min_chann_global_cost_map(vtr::NdMatrix& distan int num_layers = g_vpr_ctx.device().grid.get_num_layers(); int width = (int)g_vpr_ctx.device().grid.width(); int height = (int)g_vpr_ctx.device().grid.height(); - distance_min_cost.resize({static_cast(num_layers), - static_cast(num_layers), - static_cast(width), - static_cast(height)}); + distance_min_cost.resize({static_cast(num_layers), static_cast(num_layers), + static_cast(width), static_cast(height)}); for (int from_layer_num = 0; from_layer_num < num_layers; from_layer_num++) { for (int to_layer_num = 0; to_layer_num < num_layers; to_layer_num++) { @@ -782,8 +804,9 @@ static void min_chann_global_cost_map(vtr::NdMatrix& distan util::Cost_Entry min_cost(std::numeric_limits::max(), std::numeric_limits::max()); for (int chan_idx = 0; chan_idx < (int)f_wire_cost_map.dim_size(2); chan_idx++) { for (int seg_idx = 0; seg_idx < (int)f_wire_cost_map.dim_size(3); seg_idx++) { - auto cost = util::Cost_Entry(f_wire_cost_map[from_layer_num][to_layer_num][chan_idx][seg_idx][dx][dy].delay, - f_wire_cost_map[from_layer_num][to_layer_num][chan_idx][seg_idx][dx][dy].congestion); + auto cost = util::Cost_Entry( + f_wire_cost_map[from_layer_num][to_layer_num][chan_idx][seg_idx][dx][dy].delay, + f_wire_cost_map[from_layer_num][to_layer_num][chan_idx][seg_idx][dx][dy].congestion); if (cost.delay < min_cost.delay) { min_cost.delay = cost.delay; min_cost.congestion = cost.congestion; @@ -797,7 +820,8 @@ static void min_chann_global_cost_map(vtr::NdMatrix& distan } } -static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_delays, vtr::NdMatrix& distance_min_cost) { +static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_delays, + vtr::NdMatrix& distance_min_cost) { /** * This function calculates and stores the minimum cost to reach a point on layer `n_sink`, which is `dx` and `dy` further from the current point * on layer `n_source` and is located on physical tile type `t`. To compute this cost, the function iterates over all output pins of tile `t`, @@ -809,10 +833,8 @@ static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_d int num_layers = g_vpr_ctx.device().grid.get_num_layers(); int width = (int)g_vpr_ctx.device().grid.width(); int height = (int)g_vpr_ctx.device().grid.height(); - distance_min_cost.resize({static_cast(num_tile_types), - static_cast(num_layers), - static_cast(num_layers), - static_cast(width), + distance_min_cost.resize({static_cast(num_tile_types), static_cast(num_layers), + static_cast(num_layers), static_cast(width), static_cast(height)}); for (int tile_type_idx = 0; tile_type_idx < num_tile_types; tile_type_idx++) { @@ -820,7 +842,8 @@ static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_d for (int to_layer_num = 0; to_layer_num < num_layers; to_layer_num++) { for (int dx = 0; dx < width; dx++) { for (int dy = 0; dy < height; dy++) { - util::Cost_Entry min_cost(std::numeric_limits::infinity(), std::numeric_limits::infinity()); + util::Cost_Entry min_cost(std::numeric_limits::infinity(), + std::numeric_limits::infinity()); for (const auto& tile_opin_map : src_opin_delays[from_layer_num][tile_type_idx]) { float expected_delay_cost = std::numeric_limits::infinity(); float expected_cong_cost = std::numeric_limits::infinity(); @@ -839,17 +862,16 @@ static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_d } util::Cost_Entry wire_cost_entry; - wire_cost_entry = get_wire_cost_entry(reachable_wire_inf.wire_rr_type, - reachable_wire_inf.wire_seg_index, - reachable_wire_inf.layer_number, - dx, - dy, - to_layer_num); + wire_cost_entry = get_wire_cost_entry( + reachable_wire_inf.wire_rr_type, reachable_wire_inf.wire_seg_index, + reachable_wire_inf.layer_number, dx, dy, to_layer_num); float this_delay_cost = reachable_wire_inf.delay + wire_cost_entry.delay; - float this_cong_cost = reachable_wire_inf.congestion + wire_cost_entry.congestion; + float this_cong_cost + = reachable_wire_inf.congestion + wire_cost_entry.congestion; - layer_expected_delay_cost = std::min(layer_expected_delay_cost, this_delay_cost); + layer_expected_delay_cost + = std::min(layer_expected_delay_cost, this_delay_cost); layer_expected_cong_cost = std::min(layer_expected_cong_cost, this_cong_cost); } } @@ -877,9 +899,9 @@ static void min_opin_distance_cost_map(const util::t_src_opin_delays& src_opin_d // #ifndef VTR_ENABLE_CAPNPROTO -# define DISABLE_ERROR \ - "is disabled because VTR_ENABLE_CAPNPROTO=OFF." \ - "Re-compile with CMake option VTR_ENABLE_CAPNPROTO=ON to enable." +#define DISABLE_ERROR \ + "is disabled because VTR_ENABLE_CAPNPROTO=OFF." \ + "Re-compile with CMake option VTR_ENABLE_CAPNPROTO=ON to enable." void read_router_lookahead(const std::string& /*file*/) { VPR_THROW(VPR_ERROR_PLACE, "MapLookahead::read_router_lookahead " DISABLE_ERROR); @@ -889,13 +911,15 @@ void write_router_lookahead(const std::string& /*file*/) { VPR_THROW(VPR_ERROR_PLACE, "MapLookahead::write_router_lookahead " DISABLE_ERROR); } -static void read_intra_cluster_router_lookahead(std::unordered_map& /*intra_tile_pin_primitive_pin_delay*/, - const std::string& /*file*/) { +static void read_intra_cluster_router_lookahead( + std::unordered_map& /*intra_tile_pin_primitive_pin_delay*/, + const std::string& /*file*/) { VPR_THROW(VPR_ERROR_PLACE, "MapLookahead::read_intra_cluster_router_lookahead " DISABLE_ERROR); } -static void write_intra_cluster_router_lookahead(const std::string& /*file*/, - const std::unordered_map& /*intra_tile_pin_primitive_pin_delay*/) { +static void write_intra_cluster_router_lookahead( + const std::string& /*file*/, + const std::unordered_map& /*intra_tile_pin_primitive_pin_delay*/) { VPR_THROW(VPR_ERROR_PLACE, "MapLookahead::write_intra_cluster_router_lookahead " DISABLE_ERROR); } @@ -911,15 +935,9 @@ static void FromCostEntry(VprMapCostEntry::Builder* out, const util::Cost_Entry& out->setCongestion(in.congestion); } -static void toIntEntry(std::vector& out, - int idx, - const int& cost) { - out[idx] = cost; -} +static void toIntEntry(std::vector& out, int idx, const int& cost) { out[idx] = cost; } -static void fromIntEntry(::capnp::List::Builder& out, - int idx, - const int& cost) { +static void fromIntEntry(::capnp::List::Builder& out, int idx, const int& cost) { out.set(idx, cost); } @@ -941,10 +959,11 @@ static void fromPairEntry(::capnp::List::Buil out_val[flat_idx].setCongestion(cost.congestion); } -static void getIntraClusterArrayFlatSize(int& num_tile_types, - int& num_pins, - int& num_sinks, - const std::unordered_map& intra_tile_pin_primitive_pin_delay) { +static void getIntraClusterArrayFlatSize( + int& num_tile_types, + int& num_pins, + int& num_sinks, + const std::unordered_map& intra_tile_pin_primitive_pin_delay) { const auto& physical_tile_types = g_vpr_ctx.device().physical_tile_types; num_tile_types = (int)physical_tile_types.size(); @@ -961,8 +980,9 @@ static void getIntraClusterArrayFlatSize(int& num_tile_types, } } -static void read_intra_cluster_router_lookahead(std::unordered_map& intra_tile_pin_primitive_pin_delay, - const std::string& file) { +static void read_intra_cluster_router_lookahead( + std::unordered_map& intra_tile_pin_primitive_pin_delay, + const std::string& file) { MmapFile f(file); /* Increase reader limit to 1G words to allow for large files. */ @@ -972,14 +992,10 @@ static void read_intra_cluster_router_lookahead(std::unordered_map(); std::vector physical_tile_num_pin_arr; - toVector(physical_tile_num_pin_arr, - map.getPhysicalTileNumPins(), - toIntEntry); + toVector(physical_tile_num_pin_arr, map.getPhysicalTileNumPins(), toIntEntry); std::vector pin_num_sink_arr; - toVector(pin_num_sink_arr, - map.getPinNumSinks(), - toIntEntry); + toVector(pin_num_sink_arr, map.getPinNumSinks(), toIntEntry); int num_seen_pair = 0; int num_seen_pin = 0; @@ -989,12 +1005,9 @@ static void read_intra_cluster_router_lookahead(std::unordered_map pin_sink_cost_map; - toUnorderedMap(pin_sink_cost_map, - num_seen_pair, - num_seen_pair + pin_num_sink_arr[num_seen_pin], - map.getPinSinks(), - map.getPinSinkCosts(), - toPairEntry); + toUnorderedMap( + pin_sink_cost_map, num_seen_pair, num_seen_pair + pin_num_sink_arr[num_seen_pin], map.getPinSinks(), + map.getPinSinkCosts(), toPairEntry); tile_pin_sink_cost_map[pin_num] = pin_sink_cost_map; num_seen_pair += (int)pin_sink_cost_map.size(); VTR_ASSERT((int)pin_sink_cost_map.size() == pin_num_sink_arr[num_seen_pin]); @@ -1004,17 +1017,15 @@ static void read_intra_cluster_router_lookahead(std::unordered_map& intra_tile_pin_primitive_pin_delay) { +static void write_intra_cluster_router_lookahead( + const std::string& file, + const std::unordered_map& intra_tile_pin_primitive_pin_delay) { ::capnp::MallocMessageBuilder builder; auto vpr_intra_cluster_lookahead_builder = builder.initRoot(); int num_tile_types, num_pins, num_sinks; - getIntraClusterArrayFlatSize(num_tile_types, - num_pins, - num_sinks, - intra_tile_pin_primitive_pin_delay); + getIntraClusterArrayFlatSize(num_tile_types, num_pins, num_sinks, intra_tile_pin_primitive_pin_delay); std::vector physical_tile_num_pin_arr(num_tile_types, 0); { @@ -1023,17 +1034,17 @@ static void write_intra_cluster_router_lookahead(const std::string& file, physical_tile_num_pin_arr[physical_type_idx] = (int)physical_type.second.size(); } - ::capnp::List::Builder physical_tile_num_pin_arr_builder = vpr_intra_cluster_lookahead_builder.initPhysicalTileNumPins(num_tile_types); - fromVector(physical_tile_num_pin_arr_builder, - physical_tile_num_pin_arr, - fromIntEntry); + ::capnp::List::Builder physical_tile_num_pin_arr_builder + = vpr_intra_cluster_lookahead_builder.initPhysicalTileNumPins(num_tile_types); + fromVector(physical_tile_num_pin_arr_builder, physical_tile_num_pin_arr, fromIntEntry); } std::vector pin_num_sink_arr(num_pins, 0); { int num_seen_pin = 0; for (int physical_tile_idx = 0; physical_tile_idx < num_tile_types; ++physical_tile_idx) { - if (intra_tile_pin_primitive_pin_delay.find(physical_tile_idx) == intra_tile_pin_primitive_pin_delay.end()) { + if (intra_tile_pin_primitive_pin_delay.find(physical_tile_idx) + == intra_tile_pin_primitive_pin_delay.end()) { continue; } for (const auto& pin_sinks : intra_tile_pin_primitive_pin_delay.at(physical_tile_idx)) { @@ -1041,26 +1052,24 @@ static void write_intra_cluster_router_lookahead(const std::string& file, ++num_seen_pin; } } - ::capnp::List::Builder pin_num_sink_arr_builder = vpr_intra_cluster_lookahead_builder.initPinNumSinks(num_pins); - fromVector(pin_num_sink_arr_builder, - pin_num_sink_arr, - fromIntEntry); + ::capnp::List::Builder pin_num_sink_arr_builder + = vpr_intra_cluster_lookahead_builder.initPinNumSinks(num_pins); + fromVector(pin_num_sink_arr_builder, pin_num_sink_arr, fromIntEntry); } { - ::capnp::List::Builder pin_sink_arr_builder = vpr_intra_cluster_lookahead_builder.initPinSinks(num_sinks); - ::capnp::List::Builder pin_sink_cost_builder = vpr_intra_cluster_lookahead_builder.initPinSinkCosts(num_sinks); + ::capnp::List::Builder pin_sink_arr_builder + = vpr_intra_cluster_lookahead_builder.initPinSinks(num_sinks); + ::capnp::List::Builder pin_sink_cost_builder + = vpr_intra_cluster_lookahead_builder.initPinSinkCosts(num_sinks); int num_seen_pin = 0; for (int physical_tile_idx = 0; physical_tile_idx < num_tile_types; ++physical_tile_idx) { for (int pin_num = 0; pin_num < physical_tile_num_pin_arr[physical_tile_idx]; ++pin_num) { - const std::unordered_map& pin_sinks = intra_tile_pin_primitive_pin_delay.at(physical_tile_idx).at(pin_num); + const std::unordered_map& pin_sinks + = intra_tile_pin_primitive_pin_delay.at(physical_tile_idx).at(pin_num); FromUnorderedMap( - pin_sink_arr_builder, - pin_sink_cost_builder, - num_seen_pin, - pin_sinks, - fromPairEntry); + pin_sink_arr_builder, pin_sink_cost_builder, num_seen_pin, pin_sinks, fromPairEntry); num_seen_pin += (int)pin_sinks.size(); } } diff --git a/vpr/src/route/router_lookahead_map.h b/vpr/src/route/router_lookahead_map.h index 29293020078..c67cdcbc9df 100644 --- a/vpr/src/route/router_lookahead_map.h +++ b/vpr/src/route/router_lookahead_map.h @@ -14,23 +14,35 @@ class MapLookahead : public RouterLookahead { explicit MapLookahead(const t_det_routing_arch& det_routing_arch, bool is_flat); private: - float get_expected_cost_flat_router(RRNodeId current_node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const; + float get_expected_cost_flat_router(RRNodeId current_node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const; //Look-up table from SOURCE/OPIN to CHANX/CHANY of various types util::t_src_opin_delays src_opin_delays; // Lookup table from a tile pins to the primitive classes inside that tile - std::unordered_map intra_tile_pin_primitive_pin_delay; // [physical_tile_type][from_pin_physical_num][sink_physical_num] -> cost + std::unordered_map + intra_tile_pin_primitive_pin_delay; // [physical_tile_type][from_pin_physical_num][sink_physical_num] -> cost // Lookup table to store the minimum cost to reach to a primitive pin from the root-level IPINs - std::unordered_map> tile_min_cost; // [physical_tile_type][sink_physical_num] -> cost - // Lookup table to store the minimum cost for each dx and dy - vtr::NdMatrix chann_distance_based_min_cost; // [from_layer_num][to_layer_num][dx][dy] -> cost - vtr::NdMatrix opin_distance_based_min_cost; // [physical_tile_idx][from_layer_num][to_layer_num][dx][dy] -> cost + std::unordered_map> + tile_min_cost; // [physical_tile_type][sink_physical_num] -> cost + /// Lookup table to store the minimum cost for each dx and dy. [from_layer_num][to_layer_num][dx][dy] -> cost + vtr::NdMatrix chann_distance_based_min_cost; + /// [physical_tile_idx][from_layer_num][to_layer_num][dx][dy] -> cost + vtr::NdMatrix opin_distance_based_min_cost; const t_det_routing_arch& det_routing_arch_; bool is_flat_; protected: - float get_expected_cost(RRNodeId current_node, RRNodeId target_node, const t_conn_cost_params& params, float R_upstream) const override; - std::pair get_expected_delay_and_cong(RRNodeId from_node, RRNodeId to_node, const t_conn_cost_params& params, float R_upstream) const override; + float get_expected_cost(RRNodeId current_node, + RRNodeId target_node, + const t_conn_cost_params& params, + float R_upstream) const override; + std::pair get_expected_delay_and_cong(RRNodeId from_node, + RRNodeId to_node, + const t_conn_cost_params& params, + float R_upstream) const override; void compute(const std::vector& segment_inf) override; void compute_intra_tile() override; @@ -38,7 +50,11 @@ class MapLookahead : public RouterLookahead { void read_intra_cluster(const std::string& file) override; void write(const std::string& file_name) const override; void write_intra_cluster(const std::string& file) const override; - float get_opin_distance_min_delay(int physical_tile_idx, int from_layer, int to_layer, int dx, int dy) const override; + float get_opin_distance_min_delay(int physical_tile_idx, + int from_layer, + int to_layer, + int dx, + int dy) const override; }; /* provides delay/congestion estimates to travel specified distances @@ -47,10 +63,11 @@ class MapLookahead : public RouterLookahead { // To store this information, the first index is the layer number that the node under consideration is on, the second index is the layer number of the target node, the third index represents the type of channel (X/Y) // that the node under consideration belongs to, the forth is the segment type (specified in the architecture file under the "segmentlist" tag), the fourth is the // target "layer_num" mentioned above, the fifth is dx, and the last one is dy. -typedef vtr::NdMatrix t_wire_cost_map; //[0..num_layers][0..num_layers][0..1][[0..num_seg_types-1][0..device_ctx.grid.width()-1][0..device_ctx.grid.height()-1] - //[0..1] entry distinguish between CHANX/CHANY start nodes respectively - // The first index is the layer number that the node under consideration is on, and the second index - // is the layer number that the target node is on. +// [0..num_layers][0..num_layers][0..1][[0..num_seg_types-1][0..device_ctx.grid.width()-1][0..device_ctx.grid.height()-1] +typedef vtr::NdMatrix t_wire_cost_map; +//[0..1] entry distinguish between CHANX/CHANY start nodes respectively +// The first index is the layer number that the node under consideration is on, and the second index +// is the layer number that the target node is on. void read_router_lookahead(const std::string& file); void write_router_lookahead(const std::string& file); diff --git a/vpr/src/route/router_lookahead_map_utils.cpp b/vpr/src/route/router_lookahead_map_utils.cpp index 798ebcccf37..c4cea632b14 100644 --- a/vpr/src/route/router_lookahead_map_utils.cpp +++ b/vpr/src/route/router_lookahead_map_utils.cpp @@ -35,7 +35,9 @@ static void dijkstra_flood_to_ipins(RRNodeId node, util::t_chan_ipins_delays& ch */ static int get_tile_src_opin_max_ptc(int itile); -static t_physical_tile_loc pick_sample_tile(int layer_num, t_physical_tile_type_ptr tile_type, t_physical_tile_loc prev); +static t_physical_tile_loc pick_sample_tile(int layer_num, + t_physical_tile_type_ptr tile_type, + t_physical_tile_loc prev); static void run_intra_tile_dijkstra(const RRGraphView& rr_graph, util::t_ipin_primitive_sink_delays& pin_delays, @@ -58,7 +60,6 @@ static void expand_dijkstra_neighbours(util::PQ_Entry parent_entry, vtr::vector& node_expanded, std::priority_queue& pq); - /** * @brief Computes the adjusted position of an RR graph node. * This function does not modify the position of the given node. @@ -130,7 +131,12 @@ static constexpr int DIRECT_CONNECT_SPECIAL_SEG_TYPE = -1; namespace util { -PQ_Entry::PQ_Entry(RRNodeId set_rr_node, int /*switch_ind*/, float parent_delay, float parent_R_upstream, float parent_congestion_upstream, bool starting_node) { +PQ_Entry::PQ_Entry(RRNodeId set_rr_node, + int /*switch_ind*/, + float parent_delay, + float parent_R_upstream, + float parent_congestion_upstream, + bool starting_node) { this->rr_node = set_rr_node; auto& device_ctx = g_vpr_ctx.device(); @@ -166,10 +172,7 @@ PQ_Entry::PQ_Entry(RRNodeId set_rr_node, int /*switch_ind*/, float parent_delay, this->cost = this->delay; } -PQ_Entry_Delay::PQ_Entry_Delay( - RRNodeId set_rr_node, - int switch_ind, - const PQ_Entry_Delay* parent) { +PQ_Entry_Delay::PQ_Entry_Delay(RRNodeId set_rr_node, int switch_ind, const PQ_Entry_Delay* parent) { this->rr_node = set_rr_node; if (parent != nullptr) { @@ -194,10 +197,7 @@ PQ_Entry_Delay::PQ_Entry_Delay( } } -PQ_Entry_Base_Cost::PQ_Entry_Base_Cost( - RRNodeId set_rr_node, - int switch_ind, - const PQ_Entry_Base_Cost* parent) { +PQ_Entry_Base_Cost::PQ_Entry_Base_Cost(RRNodeId set_rr_node, int switch_ind, const PQ_Entry_Base_Cost* parent) { this->rr_node = set_rr_node; if (parent != nullptr) { @@ -318,9 +318,7 @@ void expand_dijkstra_neighbours(const RRGraphView& rr_graph, const Entry& parent_entry, std::vector* paths, std::vector* node_expanded, - std::priority_queue, - std::greater>* pq) { + std::priority_queue, std::greater>* pq) { RRNodeId parent = parent_entry.rr_node; for (int iedge = 0; iedge < rr_graph.num_edges(parent); iedge++) { @@ -346,20 +344,18 @@ void expand_dijkstra_neighbours(const RRGraphView& rr_graph, } } -template void expand_dijkstra_neighbours(const RRGraphView& rr_graph, - const PQ_Entry_Delay& parent_entry, - std::vector* paths, - std::vector* node_expanded, - std::priority_queue, - std::greater>* pq); -template void expand_dijkstra_neighbours(const RRGraphView& rr_graph, - const PQ_Entry_Base_Cost& parent_entry, - std::vector* paths, - std::vector* node_expanded, - std::priority_queue, - std::greater>* pq); +template void expand_dijkstra_neighbours( + const RRGraphView& rr_graph, + const PQ_Entry_Delay& parent_entry, + std::vector* paths, + std::vector* node_expanded, + std::priority_queue, std::greater>* pq); +template void expand_dijkstra_neighbours( + const RRGraphView& rr_graph, + const PQ_Entry_Base_Cost& parent_entry, + std::vector* paths, + std::vector* node_expanded, + std::priority_queue, std::greater>* pq); t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { vtr::ScopedStartFinishTimer timer("Computing src/opin lookahead"); @@ -403,21 +399,20 @@ t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { while (ptcs_with_no_delays) { //Haven't found wire connected to ptc ptcs_with_no_delays = false; - sample_loc = pick_sample_tile(from_layer_num, - &device_ctx.physical_tile_types[itile], - sample_loc); + sample_loc = pick_sample_tile(from_layer_num, &device_ctx.physical_tile_types[itile], sample_loc); if (sample_loc.x == OPEN && sample_loc.y == OPEN && sample_loc.layer_num == OPEN) { //No untried instances of the current tile type left VTR_LOG_WARN("Found no %ssample locations for %s in %s\n", - (num_sampled_locs == 0) ? "" : "more ", - rr_node_typename[rr_type], + (num_sampled_locs == 0) ? "" : "more ", rr_node_typename[rr_type], device_ctx.physical_tile_types[itile].name); break; } //VTR_LOG("Sampling %s at (%d,%d)\n", device_ctx.physical_tile_types[itile].name, sample_loc.x(), sample_loc.y()); - const std::vector& rr_nodes_at_loc = device_ctx.rr_graph.node_lookup().find_grid_nodes_at_all_sides(sample_loc.layer_num, sample_loc.x, sample_loc.y, rr_type); + const std::vector& rr_nodes_at_loc + = device_ctx.rr_graph.node_lookup().find_grid_nodes_at_all_sides( + sample_loc.layer_num, sample_loc.x, sample_loc.y, rr_type); for (RRNodeId node_id : rr_nodes_at_loc) { int ptc = rr_graph.node_ptc_num(node_id); // For the time being, we decide to not let the lookahead explore the node inside the clusters @@ -429,9 +424,7 @@ t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { //Find the wire types which are reachable from inode and record them and //the cost to reach them - dijkstra_flood_to_wires(itile, - node_id, - src_opin_delays); + dijkstra_flood_to_wires(itile, node_id, src_opin_delays); bool reachable_wire_found = false; for (int to_layer_num = 0; to_layer_num < num_layers; to_layer_num++) { @@ -442,12 +435,8 @@ t_src_opin_delays compute_router_src_opin_lookahead(bool is_flat) { } if (reachable_wire_found) { VTR_LOGV_DEBUG(f_router_debug, "Found no reachable wires from %s (%s) at (%d,%d,%d)\n", - rr_node_typename[rr_type], - rr_node_arch_name(node_id, is_flat).c_str(), - sample_loc.x, - sample_loc.y, - sample_loc.layer_num, - is_flat); + rr_node_typename[rr_type], rr_node_arch_name(node_id, is_flat).c_str(), + sample_loc.x, sample_loc.y, sample_loc.layer_num, is_flat); ptcs_with_no_delays = true; } @@ -490,8 +479,7 @@ t_chan_ipins_delays compute_router_chan_ipin_lookahead() { if (sample_loc.x == OPEN && sample_loc.y == OPEN && sample_loc.layer_num == OPEN) { //No untried instances of the current tile type left - VTR_LOG_WARN("Found no sample locations for %s\n", - tile_type.name); + VTR_LOG_WARN("Found no sample locations for %s\n", tile_type.name); continue; } @@ -503,7 +491,8 @@ t_chan_ipins_delays compute_router_chan_ipin_lookahead() { for (int ix = min_x; ix < max_x; ix++) { for (int iy = min_y; iy < max_y; iy++) { for (auto rr_type : {CHANX, CHANY}) { - for (const RRNodeId& node_id : node_lookup.find_channel_nodes(sample_loc.layer_num, ix, iy, rr_type)) { + for (const RRNodeId& node_id : + node_lookup.find_channel_nodes(sample_loc.layer_num, ix, iy, rr_type)) { //Find the IPINs which are reachable from the wires within the bounding box //around the selected tile location dijkstra_flood_to_ipins(node_id, chan_ipins_delays); @@ -529,12 +518,7 @@ t_ipin_primitive_sink_delays compute_intra_tile_dijkstra(const RRGraphView& rr_g pin_delays.resize(max_ptc_num); for (int pin_physical_num : tile_pins_vec) { - RRNodeId pin_node_id = get_pin_rr_node_id(rr_graph.node_lookup(), - physical_tile, - layer, - x, - y, - pin_physical_num); + RRNodeId pin_node_id = get_pin_rr_node_id(rr_graph.node_lookup(), physical_tile, layer, x, y, pin_physical_num); VTR_ASSERT(pin_node_id != RRNodeId::INVALID()); run_intra_tile_dijkstra(rr_graph, pin_delays, physical_tile, pin_node_id); @@ -544,7 +528,14 @@ t_ipin_primitive_sink_delays compute_intra_tile_dijkstra(const RRGraphView& rr_g } /* returns index of a node from which to start routing */ -RRNodeId get_start_node(int layer, int start_x, int start_y, int target_x, int target_y, t_rr_type rr_type, int seg_index, int track_offset) { +RRNodeId get_start_node(int layer, + int start_x, + int start_y, + int target_x, + int target_y, + t_rr_type rr_type, + int seg_index, + int track_offset) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; const auto& node_lookup = rr_graph.node_lookup(); @@ -629,7 +620,8 @@ std::pair get_xy_deltas(RRNodeId from_node, RRNodeId to_node) { int delta_seg, delta_chan; /* orthogonal to wire */ - int no_need_to_pass_by_clb = 0; //if we need orthogonal wires then we don't need to pass by the target CLB along the current wire direction + int no_need_to_pass_by_clb + = 0; //if we need orthogonal wires then we don't need to pass by the target CLB along the current wire direction if (to_chan > from_chan + 1) { /* above */ delta_chan = to_chan - from_chan; @@ -660,7 +652,8 @@ std::pair get_xy_deltas(RRNodeId from_node, RRNodeId to_node) { * that are opposite of the wire direction, let's add 1 to delta_seg */ Direction from_dir = rr_graph.node_direction(from_node); if (is_chan(from_type) - && ((to_seg < from_seg_low && from_dir == Direction::INC) || (to_seg > from_seg_high && from_dir == Direction::DEC))) { + && ((to_seg < from_seg_low && from_dir == Direction::INC) + || (to_seg > from_seg_high && from_dir == Direction::DEC))) { delta_seg++; } @@ -696,10 +689,7 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length, //Sample from locations near the reference location (to capture maximum distance paths) //Also sample from locations at least the longest wire length away from the edge (to avoid //edge effects for shorter distances) - std::vector ref_increments = {0, - 1, - longest_seg_length, - longest_seg_length + 1}; + std::vector ref_increments = {0, 1, longest_seg_length, longest_seg_length + 1}; //Uniquify the increments (avoid sampling the same locations repeatedly if they happen to //overlap) @@ -731,14 +721,16 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length, int sample_x = ref_x + ref_inc; int sample_y = ref_y + ref_inc; - if (sample_x >= int(grid.width())) continue; - if (sample_y >= int(grid.height())) continue; + if (sample_x >= int(grid.width())) + continue; + if (sample_y >= int(grid.height())) + continue; for (int track_offset = 0; track_offset < MAX_TRACK_OFFSET; track_offset += 2) { /* get the rr node index from which to start routing */ - RRNodeId start_node = get_start_node(from_layer_num, sample_x, sample_y, - target_x, target_y, //non-corner upper right - chan_type, segment_inf.seg_index, track_offset); + RRNodeId start_node + = get_start_node(from_layer_num, sample_x, sample_y, target_x, target_y, //non-corner upper right + chan_type, segment_inf.seg_index, track_offset); if (!start_node) { continue; @@ -758,8 +750,10 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length, //Try an exhaustive search to find a suitable sample point for (RRNodeId rr_node : rr_graph.nodes()) { auto rr_type = rr_graph.node_type(rr_node); - if (rr_type != chan_type) continue; - if (rr_graph.node_layer(rr_node) != from_layer_num) continue; + if (rr_type != chan_type) + continue; + if (rr_graph.node_layer(rr_node) != from_layer_num) + continue; auto cost_index = rr_graph.node_cost_index(rr_node); VTR_ASSERT(cost_index != RRIndexedDataId(OPEN)); @@ -779,14 +773,12 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length, //Finally, now that we have a list of sample locations, run a Dijkstra flood from //each sample location to profile the routing network from this type - - t_routing_cost_map routing_cost_map({static_cast(device_ctx.grid.get_num_layers()), device_ctx.grid.width(), device_ctx.grid.height()}); + t_routing_cost_map routing_cost_map({static_cast(device_ctx.grid.get_num_layers()), + device_ctx.grid.width(), device_ctx.grid.height()}); if (sample_nodes.empty()) { VTR_LOG_WARN("Unable to find any sample location for segment %s type '%s' (length %d)\n", - rr_node_typename[chan_type], - segment_inf.name.c_str(), - segment_inf.length); + rr_node_typename[chan_type], segment_inf.name.c_str(), segment_inf.length); } else { //reset cost for this segment routing_cost_map.fill(Expansion_Cost_Entry()); @@ -804,12 +796,7 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length, sample_y = rr_graph.node_yhigh(sample_node); } - run_dijkstra(sample_node, - sample_x, - sample_y, - routing_cost_map, - dijkstra_data, - sample_locs, + run_dijkstra(sample_node, sample_x, sample_y, routing_cost_map, dijkstra_data, sample_locs, sample_all_locs); } } @@ -849,7 +836,6 @@ std::pair get_cost_from_src_opin(const std::map IPIN) connection. @@ -860,12 +846,8 @@ std::pair get_cost_from_src_opin(const std::map get_cost_from_src_opin(const std::map& dim_sizes, WireCostCallBackFunction wire_cost_func) { +void dump_readable_router_lookahead_map(const std::string& file_name, + const std::vector& dim_sizes, + WireCostCallBackFunction wire_cost_func) { VTR_ASSERT(vtr::check_file_name_extension(file_name, ".csv")); const auto& grid = g_vpr_ctx.device().grid; @@ -895,7 +879,8 @@ void dump_readable_router_lookahead_map(const std::string& file_name, const std: VTR_ASSERT(dim_sizes[0] == num_layers); VTR_ASSERT(dim_sizes[1] == num_layers); VTR_ASSERT(dim_sizes[2] == 2); - VTR_ASSERT(dim_sizes.size() == 5 || (dim_sizes.size() == 6 && dim_sizes[4] == grid_width && dim_sizes[5] == grid_height)); + VTR_ASSERT(dim_sizes.size() == 5 + || (dim_sizes.size() == 6 && dim_sizes[4] == grid_width && dim_sizes[5] == grid_height)); ofs << "from_layer," "to_layer," @@ -913,14 +898,9 @@ void dump_readable_router_lookahead_map(const std::string& file_name, const std: for (int dx = 0; dx < grid_width; dx++) { for (int dy = 0; dy < grid_height; dy++) { auto cost = wire_cost_func(chan_type, seg_index, from_layer_num, dx, dy, to_layer_num); - ofs << from_layer_num << "," - << to_layer_num << "," - << rr_node_typename[chan_type] << "," - << seg_index << "," - << dx << "," - << dy << "," - << cost.congestion << "," - << cost.delay << "\n"; + ofs << from_layer_num << "," << to_layer_num << "," << rr_node_typename[chan_type] << "," + << seg_index << "," << dx << "," << dy << "," << cost.congestion << "," << cost.delay + << "\n"; } } } @@ -931,9 +911,7 @@ void dump_readable_router_lookahead_map(const std::string& file_name, const std: } // namespace util -static void dijkstra_flood_to_wires(int itile, - RRNodeId node, - util::t_src_opin_delays& src_opin_delays) { +static void dijkstra_flood_to_wires(int itile, RRNodeId node, util::t_src_opin_delays& src_opin_delays) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -942,9 +920,7 @@ static void dijkstra_flood_to_wires(int itile, float congestion; RRNodeId node; - bool operator<(const t_pq_entry& rhs) const { - return this->delay < rhs.delay; - } + bool operator<(const t_pq_entry& rhs) const { return this->delay < rhs.delay; } }; std::priority_queue pq; @@ -1052,9 +1028,7 @@ static void dijkstra_flood_to_ipins(RRNodeId node, util::t_chan_ipins_delays& ch RRNodeId node; int level; - bool operator<(const t_pq_entry& rhs) const { - return this->delay < rhs.delay; - } + bool operator<(const t_pq_entry& rhs) const { return this->delay < rhs.delay; } }; std::priority_queue pq; @@ -1165,7 +1139,9 @@ static int get_tile_src_opin_max_ptc(int itile) { return max_ptc; } -static t_physical_tile_loc pick_sample_tile(int layer_num, t_physical_tile_type_ptr tile_type, t_physical_tile_loc prev) { +static t_physical_tile_loc pick_sample_tile(int layer_num, + t_physical_tile_type_ptr tile_type, + t_physical_tile_loc prev) { //Very simple for now, just pick the fist matching tile found t_physical_tile_loc loc(OPEN, OPEN, OPEN); @@ -1180,12 +1156,14 @@ static t_physical_tile_loc pick_sample_tile(int layer_num, t_physical_tile_type_ return loc; } for (int x = prev.x; x < int(grid.width()); ++x) { - if (x < 0) continue; + if (x < 0) + continue; //VTR_LOG(" x: %d\n", x); for (int y = y_init; y < int(grid.height()); ++y) { - if (y < 0) continue; + if (y < 0) + continue; //VTR_LOG(" y: %d\n", y); if (grid.get_physical_type(t_physical_tile_loc(x, y, layer_num)) == tile_type) { @@ -1228,13 +1206,9 @@ static void run_intra_tile_dijkstra(const RRGraphView& rr_graph, float congestion; RRNodeId node; - bool operator<(const t_pq_entry& rhs) const { - return this->delay < rhs.delay; - } + bool operator<(const t_pq_entry& rhs) const { return this->delay < rhs.delay; } - bool operator>(const t_pq_entry& rhs) const { - return this->delay > rhs.delay; - } + bool operator>(const t_pq_entry& rhs) const { return this->delay > rhs.delay; } }; std::priority_queue, std::greater> pq; @@ -1279,7 +1253,8 @@ static void run_intra_tile_dijkstra(const RRGraphView& rr_graph, } } else { int curr_ptc = rr_graph.node_ptc_num(curr.node); - if (starting_pin_delay_map.find(curr_ptc) == starting_pin_delay_map.end() || starting_pin_delay_map.at(curr_ptc).delay > curr.delay) { + if (starting_pin_delay_map.find(curr_ptc) == starting_pin_delay_map.end() + || starting_pin_delay_map.at(curr_ptc).delay > curr.delay) { starting_pin_delay_map[curr_ptc] = util::Cost_Entry(curr.delay, curr.congestion); } } @@ -1356,9 +1331,8 @@ static void run_dijkstra(RRNodeId start_node, } if (store_this_pin) { - routing_cost_map[ipin_layer][delta_x][delta_y].add_cost_entry(util::e_representative_entry_method::SMALLEST, - current.delay, - current.congestion_upstream); + routing_cost_map[ipin_layer][delta_x][delta_y].add_cost_entry( + util::e_representative_entry_method::SMALLEST, current.delay, current.congestion_upstream); } } } @@ -1387,15 +1361,16 @@ static void expand_dijkstra_neighbours(util::PQ_Entry parent_entry, } int switch_ind = size_t(rr_graph.edge_switch(parent, edge)); - if (rr_graph.node_type(child_node) == SINK) return; + if (rr_graph.node_type(child_node) == SINK) + return; /* skip this child if it has already been expanded from */ if (node_expanded[child_node]) { continue; } - util::PQ_Entry child_entry(child_node, switch_ind, parent_entry.delay, - parent_entry.R_upstream, parent_entry.congestion_upstream, false); + util::PQ_Entry child_entry(child_node, switch_ind, parent_entry.delay, parent_entry.R_upstream, + parent_entry.congestion_upstream, false); //VTR_ASSERT(child_entry.cost >= 0); //Asertion fails in practise. TODO: debug @@ -1501,11 +1476,9 @@ static std::pair get_adjusted_rr_wire_position(const RRNodeId rr) { Direction rr_dir = rr_graph.node_direction(rr); if (rr_dir == Direction::DEC) { - return {rr_graph.node_xhigh(rr), - rr_graph.node_yhigh(rr)}; + return {rr_graph.node_xhigh(rr), rr_graph.node_yhigh(rr)}; } else if (rr_dir == Direction::INC) { - return {rr_graph.node_xlow(rr), - rr_graph.node_ylow(rr)}; + return {rr_graph.node_xlow(rr), rr_graph.node_ylow(rr)}; } else { VTR_ASSERT_SAFE(rr_dir == Direction::BIDIR); //Not sure what to do here... diff --git a/vpr/src/route/router_lookahead_map_utils.h b/vpr/src/route/router_lookahead_map_utils.h index 217bd0d2206..3541333dbd1 100644 --- a/vpr/src/route/router_lookahead_map_utils.h +++ b/vpr/src/route/router_lookahead_map_utils.h @@ -32,7 +32,8 @@ class Cost_Entry; class Expansion_Cost_Entry; /* used during Dijkstra expansion to store delay/congestion info lists for each relative coordinate for a given segment and channel type. * the list at each coordinate is later boiled down to a single representative cost entry to be stored in the final cost map */ -typedef vtr::NdMatrix t_routing_cost_map; //[0..num_layers][0..device_ctx.grid.width()-1][0..device_ctx.grid.height()-1] +typedef vtr::NdMatrix + t_routing_cost_map; //[0..num_layers][0..device_ctx.grid.width()-1][0..device_ctx.grid.height()-1] typedef Cost_Entry (*WireCostCallBackFunction)(e_rr_type, int, int, int, int, int); @@ -47,7 +48,12 @@ class PQ_Entry { float R_upstream; float congestion_upstream; - PQ_Entry(RRNodeId set_rr_node, int /*switch_ind*/, float parent_delay, float parent_R_upstream, float parent_congestion_upstream, bool starting_node); + PQ_Entry(RRNodeId set_rr_node, + int /*switch_ind*/, + float parent_delay, + float parent_R_upstream, + float parent_congestion_upstream, + bool starting_node); bool operator<(const PQ_Entry& obj) const { /* inserted into max priority queue so want queue entries with a lower cost to be greater */ @@ -98,13 +104,9 @@ class Cost_Entry { : delay(set_delay) , congestion(set_congestion) , fill(set_fill) {} - bool valid() const { - return !(std::isnan(delay) || std::isnan(congestion)); - } + bool valid() const { return !(std::isnan(delay) || std::isnan(congestion)); } - bool operator==(const Cost_Entry& other) const { - return delay == other.delay && congestion == other.congestion; - } + bool operator==(const Cost_Entry& other) const { return delay == other.delay && congestion == other.congestion; } }; /** @@ -118,10 +120,10 @@ class Cost_Entry { class Expansion_Cost_Entry { private: std::vector cost_vector; ///cost_vector.push_back(cost_entry); } } - void clear_cost_entries() { - this->cost_vector.clear(); - } + void clear_cost_entries() { this->cost_vector.clear(); } Cost_Entry get_representative_cost_entry(e_representative_entry_method method) const { Cost_Entry entry; @@ -193,9 +191,7 @@ struct RoutingCostKey { : seg_index(seg_index_arg) , delta(delta_arg) {} - bool operator==(const RoutingCostKey& other) const { - return seg_index == other.seg_index && delta == other.delta; - } + bool operator==(const RoutingCostKey& other) const { return seg_index == other.seg_index && delta == other.delta; } }; // hash implementation for RoutingCostKey @@ -219,17 +215,11 @@ class PQ_Entry_Delay { PQ_Entry_Delay(RRNodeId set_rr_node, int /*switch_ind*/, const PQ_Entry_Delay* parent); - float cost() const { - return delay_cost; - } + float cost() const { return delay_cost; } - void adjust_Tsw(float amount) { - delay_cost += amount; - } + void adjust_Tsw(float amount) { delay_cost += amount; } - bool operator>(const PQ_Entry_Delay& obj) const { - return (this->delay_cost > obj.delay_cost); - } + bool operator>(const PQ_Entry_Delay& obj) const { return (this->delay_cost > obj.delay_cost); } }; // A version of PQ_Entry that only calculates and stores the base cost. @@ -240,17 +230,13 @@ class PQ_Entry_Base_Cost { PQ_Entry_Base_Cost(RRNodeId set_rr_node, int /*switch_ind*/, const PQ_Entry_Base_Cost* parent); - float cost() const { - return base_cost; - } + float cost() const { return base_cost; } void adjust_Tsw(float /* amount */) { // do nothing } - bool operator>(const PQ_Entry_Base_Cost& obj) const { - return (this->base_cost > obj.base_cost); - } + bool operator>(const PQ_Entry_Base_Cost& obj) const { return (this->base_cost > obj.base_cost); } }; struct Search_Path { @@ -265,9 +251,7 @@ void expand_dijkstra_neighbours(const RRGraphView& rr_graph, const Entry& parent_entry, std::vector* paths, std::vector* node_expanded, - std::priority_queue, - std::greater>* pq); + std::priority_queue, std::greater>* pq); struct t_reachable_wire_inf { e_rr_type wire_rr_type; @@ -325,7 +309,14 @@ t_ipin_primitive_sink_delays compute_intra_tile_dijkstra(const RRGraphView& rr_g int y); /* returns index of a node from which to start routing */ -RRNodeId get_start_node(int layer, int start_x, int start_y, int target_x, int target_y, t_rr_type rr_type, int seg_index, int track_offset); +RRNodeId get_start_node(int layer, + int start_x, + int start_y, + int target_x, + int target_y, + t_rr_type rr_type, + int seg_index, + int track_offset); /** * @brief Computes the absolute delta_x and delta_y offset @@ -360,7 +351,9 @@ std::pair get_cost_from_src_opin(const std::map& dim_sizes, WireCostCallBackFunction wire_cost_func); +void dump_readable_router_lookahead_map(const std::string& file_name, + const std::vector& dim_sizes, + WireCostCallBackFunction wire_cost_func); } // namespace util #endif diff --git a/vpr/src/route/router_lookahead_sampling.cpp b/vpr/src/route/router_lookahead_sampling.cpp index c7f2221ff9c..0224792fe24 100644 --- a/vpr/src/route/router_lookahead_sampling.cpp +++ b/vpr/src/route/router_lookahead_sampling.cpp @@ -34,8 +34,7 @@ static vtr::Rect bounding_box_for_node(RRNodeId node) { // Returns a sub-rectangle from bounding_box split into an n x n grid, // with sx and sy in [0, n-1] selecting the column and row, respectively. static vtr::Rect sample_window(const vtr::Rect& bounding_box, int sx, int sy, int n) { - return vtr::Rect(sample(bounding_box, sx, sy, n), - sample(bounding_box, sx + 1, sy + 1, n)); + return vtr::Rect(sample(bounding_box, sx, sy, n), sample(bounding_box, sx + 1, sy + 1, n)); } // Chooses all points within the sample window within the given count range, @@ -59,10 +58,9 @@ static std::vector choose_points(const vtr::Matrix& counts, vtr::Point center = sample(window, 1, 1, 2); // sort by distance from center - std::stable_sort(points.begin(), points.end(), - [&](const SamplePoint& a, const SamplePoint& b) { - return manhattan_distance(a.location, center) < manhattan_distance(b.location, center); - }); + std::stable_sort(points.begin(), points.end(), [&](const SamplePoint& a, const SamplePoint& b) { + return manhattan_distance(a.location, center) < manhattan_distance(b.location, center); + }); return points; } @@ -158,18 +156,21 @@ static void compute_sample_regions(std::vector& sample_regions, for (int i = 0; i < num_segments; i++) { const auto& counts = segment_counts[i]; const auto& bounding_box = bounding_box_for_segment[i]; - if (bounding_box.empty()) continue; + if (bounding_box.empty()) + continue; for (int y = 0; y < SAMPLE_GRID_SIZE; y++) { for (int x = 0; x < SAMPLE_GRID_SIZE; x++) { vtr::Rect window = sample_window(bounding_box, x, y, SAMPLE_GRID_SIZE); - if (window.empty()) continue; + if (window.empty()) + continue; auto histogram = count_histogram(window, segment_counts[i]); - SampleRegion region = { - /* .segment_type = */ i, - /* .grid_location = */ vtr::Point(x, y), - /* .points = */ choose_points(counts, window, quantile(histogram, kSamplingCountLowerQuantile), quantile(histogram, kSamplingCountUpperQuantile)), - /* .order = */ 0}; + SampleRegion region = {/* .segment_type = */ i, + /* .grid_location = */ vtr::Point(x, y), + /* .points = */ + choose_points(counts, window, quantile(histogram, kSamplingCountLowerQuantile), + quantile(histogram, kSamplingCountUpperQuantile)), + /* .order = */ 0}; if (!region.points.empty()) { /* In order to improve caching, the list of sample points are * sorted to keep points that are nearby on the Euclidean plane also @@ -203,8 +204,10 @@ std::vector find_sample_regions(int num_segments) { // compute bounding boxes for each segment type std::vector> bounding_box_for_segment(num_segments, vtr::Rect()); for (auto& node : rr_graph.rr_nodes()) { - if (rr_graph.node_type(node.id()) != CHANX && rr_graph.node_type(node.id()) != CHANY) continue; - if (rr_graph.node_capacity(node.id()) == 0 || rr_graph.num_edges(node.id()) == 0) continue; + if (rr_graph.node_type(node.id()) != CHANX && rr_graph.node_type(node.id()) != CHANY) + continue; + if (rr_graph.node_capacity(node.id()) == 0 || rr_graph.num_edges(node.id()) == 0) + continue; int seg_index = device_ctx.rr_indexed_data[rr_graph.node_cost_index(node.id())].seg_index; VTR_ASSERT(seg_index != OPEN); @@ -224,7 +227,8 @@ std::vector find_sample_regions(int num_segments) { int seg_index, x, y; std::tie(seg_index, x, y) = get_node_info(node, num_segments); - if (seg_index == OPEN) continue; + if (seg_index == OPEN) + continue; segment_counts[seg_index][x][y] += 1; } @@ -233,9 +237,7 @@ std::vector find_sample_regions(int num_segments) { // sort regions std::stable_sort(sample_regions.begin(), sample_regions.end(), - [](const SampleRegion& a, const SampleRegion& b) { - return a.order < b.order; - }); + [](const SampleRegion& a, const SampleRegion& b) { return a.order < b.order; }); // build an index of sample points on segment type and location std::map, SamplePoint*> sample_point_index; @@ -250,7 +252,8 @@ std::vector find_sample_regions(int num_segments) { int seg_index, x, y; std::tie(seg_index, x, y) = get_node_info(node, num_segments); - if (seg_index == OPEN) continue; + if (seg_index == OPEN) + continue; auto point = sample_point_index.find(std::make_tuple(seg_index, x, y)); if (point != sample_point_index.end()) { diff --git a/vpr/src/route/router_stats.h b/vpr/src/route/router_stats.h index 4336d419083..aca04e09a30 100644 --- a/vpr/src/route/router_stats.h +++ b/vpr/src/route/router_stats.h @@ -70,16 +70,11 @@ class WirelengthInfo { public: WirelengthInfo(size_t available = 0u, size_t used = 0u) : available_wirelength_(available) - , used_wirelength_(used) { - } + , used_wirelength_(used) {} - size_t available_wirelength() const { - return available_wirelength_; - } + size_t available_wirelength() const { return available_wirelength_; } - size_t used_wirelength() const { - return used_wirelength_; - } + size_t used_wirelength() const { return used_wirelength_; } float used_wirelength_ratio() const { if (available_wirelength() > 0) { @@ -96,9 +91,7 @@ class WirelengthInfo { }; struct OveruseInfo { - OveruseInfo(size_t total_nodes_ = 0u) { - total_nodes = total_nodes_; - } + OveruseInfo(size_t total_nodes_ = 0u) { total_nodes = total_nodes_; } size_t total_nodes = 0u; size_t overused_nodes = 0u; diff --git a/vpr/src/route/routing_predictor.cpp b/vpr/src/route/routing_predictor.cpp index 4f0f69a28a0..1e882a87239 100644 --- a/vpr/src/route/routing_predictor.cpp +++ b/vpr/src/route/routing_predictor.cpp @@ -9,10 +9,10 @@ class LinearModel { public: - LinearModel(float slope = std::numeric_limits::quiet_NaN(), float y_intercept = std::numeric_limits::quiet_NaN()) + LinearModel(float slope = std::numeric_limits::quiet_NaN(), + float y_intercept = std::numeric_limits::quiet_NaN()) : slope_(slope) - , y_intercept_(y_intercept) { - } + , y_intercept_(y_intercept) {} float find_x_for_y_value(float y_value) const { //y = m*x + b @@ -21,9 +21,7 @@ class LinearModel { return (y_value - y_intercept_) / slope_; } - float get_slope() { - return slope_; - } + float get_slope() { return slope_; } float find_y_for_x_value(float x_value) const { //y = m*x + b diff --git a/vpr/src/route/rr_graph.cpp b/vpr/src/route/rr_graph.cpp index dc678d20913..4239b6bbb74 100644 --- a/vpr/src/route/rr_graph.cpp +++ b/vpr/src/route/rr_graph.cpp @@ -114,14 +114,15 @@ bool channel_widths_unchanged(const t_chan_width& current, const t_chan_width& p * @return an 5D matrix which keeps the track indicies connected to each pin ([0..num_pins-1][0..width-1][0..height-1][0..layer-1][0..sides-1]). * */ -static vtr::NdMatrix, 5> alloc_and_load_pin_to_track_map(const e_pin_type pin_type, - const vtr::Matrix& Fc, - const t_physical_tile_type_ptr tile_type, - const std::set type_layer, - const std::vector& perturb_switch_pattern, - const e_directionality directionality, - const std::vector& seg_inf, - const int* sets_per_seg_type); +static vtr::NdMatrix, 5> alloc_and_load_pin_to_track_map( + const e_pin_type pin_type, + const vtr::Matrix& Fc, + const t_physical_tile_type_ptr tile_type, + const std::set type_layer, + const std::vector& perturb_switch_pattern, + const e_directionality directionality, + const std::vector& seg_inf, + const int* sets_per_seg_type); /** * @brief This routine calculates pin connections to tracks for a specific type and a specific segment based on the Fc value * defined for each pin in the architecture file. This routine is called twice for each combination of block type and segment @@ -150,17 +151,21 @@ static vtr::NdMatrix alloc_and_load_pin_to_seg_type(const e_pin_type pin const bool perturb_switch_pattern, const e_directionality directionality); -static void advance_to_next_block_side(t_physical_tile_type_ptr tile_type, int& width_offset, int& height_offset, e_side& side); - -static vtr::NdMatrix, 5> alloc_and_load_track_to_pin_lookup(vtr::NdMatrix, 5> pin_to_track_map, - const vtr::Matrix& Fc, - const t_physical_tile_type_ptr tile_type, - const std::set type_layer, - const int width, - const int height, - const int num_pins, - const int max_chan_width, - const std::vector& seg_inf); +static void advance_to_next_block_side(t_physical_tile_type_ptr tile_type, + int& width_offset, + int& height_offset, + e_side& side); + +static vtr::NdMatrix, 5> alloc_and_load_track_to_pin_lookup( + vtr::NdMatrix, 5> pin_to_track_map, + const vtr::Matrix& Fc, + const t_physical_tile_type_ptr tile_type, + const std::set type_layer, + const int width, + const int height, + const int num_pins, + const int max_chan_width, + const std::vector& seg_inf); static void build_bidir_rr_opins(RRGraphBuilder& rr_graph_builder, const RRGraphView& rr_graph, @@ -214,55 +219,58 @@ static int get_opin_direct_connections(RRGraphBuilder& rr_graph_builder, const int num_directs, const t_clb_to_clb_directs* clb_to_clb_directs); -static std::function alloc_and_load_rr_graph(RRGraphBuilder& rr_graph_builder, - t_rr_graph_storage& L_rr_node, - const RRGraphView& rr_graph, - const int num_seg_types, - const int num_seg_types_x, - const t_unified_to_parallel_seg_index& seg_index_map, - const t_chan_details& chan_details_x, - const t_chan_details& chan_details_y, - const t_track_to_pin_lookup& track_to_pin_lookup_x, - const t_track_to_pin_lookup& track_to_pin_lookup_y, - const t_pin_to_track_lookup& opin_to_track_map, - const vtr::NdMatrix, 3>& switch_block_conn, - t_sb_connection_map* sb_conn_map, - const DeviceGrid& grid, - const int Fs, - t_sblock_pattern& sblock_pattern, - const std::vector>& Fc_out, - vtr::NdMatrix& Fc_xofs, - vtr::NdMatrix& Fc_yofs, - const t_chan_width& chan_width, - const int wire_to_ipin_switch, - const int wire_to_pin_between_dice_switch, - const int custom_3d_sb_fanin_fanout, - const int delayless_switch, - const enum e_directionality directionality, - bool* Fc_clipped, - const t_direct_inf* directs, - const int num_directs, - const t_clb_to_clb_directs* clb_to_clb_directs, - bool is_global_graph, - const enum e_clock_modeling clock_modeling, - bool is_flat, - const int route_verbosity); - -static void alloc_and_load_intra_cluster_rr_graph(RRGraphBuilder& rr_graph_builder, - const DeviceGrid& grid, - const int delayless_switch, - const vtr::vector& pin_chains, - const vtr::vector>& chain_pin_nums, - float R_minW_nmos, - float R_minW_pmos, - bool is_flat, - bool load_rr_graph); +static std::function alloc_and_load_rr_graph( + RRGraphBuilder& rr_graph_builder, + t_rr_graph_storage& L_rr_node, + const RRGraphView& rr_graph, + const int num_seg_types, + const int num_seg_types_x, + const t_unified_to_parallel_seg_index& seg_index_map, + const t_chan_details& chan_details_x, + const t_chan_details& chan_details_y, + const t_track_to_pin_lookup& track_to_pin_lookup_x, + const t_track_to_pin_lookup& track_to_pin_lookup_y, + const t_pin_to_track_lookup& opin_to_track_map, + const vtr::NdMatrix, 3>& switch_block_conn, + t_sb_connection_map* sb_conn_map, + const DeviceGrid& grid, + const int Fs, + t_sblock_pattern& sblock_pattern, + const std::vector>& Fc_out, + vtr::NdMatrix& Fc_xofs, + vtr::NdMatrix& Fc_yofs, + const t_chan_width& chan_width, + const int wire_to_ipin_switch, + const int wire_to_pin_between_dice_switch, + const int custom_3d_sb_fanin_fanout, + const int delayless_switch, + const enum e_directionality directionality, + bool* Fc_clipped, + const t_direct_inf* directs, + const int num_directs, + const t_clb_to_clb_directs* clb_to_clb_directs, + bool is_global_graph, + const enum e_clock_modeling clock_modeling, + bool is_flat, + const int route_verbosity); + +static void alloc_and_load_intra_cluster_rr_graph( + RRGraphBuilder& rr_graph_builder, + const DeviceGrid& grid, + const int delayless_switch, + const vtr::vector& pin_chains, + const vtr::vector>& chain_pin_nums, + float R_minW_nmos, + float R_minW_pmos, + bool is_flat, + bool load_rr_graph); static void set_clusters_pin_chains(const ClusteredNetlist& clb_nlist, vtr::vector& pin_chains, bool is_flat); -static vtr::vector> get_pin_chains_flat(const vtr::vector& pin_chains); +static vtr::vector> get_pin_chains_flat( + const vtr::vector& pin_chains); static void add_classes_rr_graph(RRGraphBuilder& rr_graph_builder, const std::vector& class_num_vec, @@ -335,7 +343,6 @@ static void alloc_and_load_tile_rr_graph(RRGraphBuilder& rr_graph_builder, static float pattern_fmod(float a, float b); - /** * @brief Loads the tracks_connected_to_pin array with an even distribution of switches across the tracks for each pin. * @@ -376,7 +383,10 @@ static void load_perturbed_connection_block_pattern(vtr::NdMatrix& track const int seg_index, const enum e_directionality directionality); -static std::vector alloc_and_load_perturb_opins(const t_physical_tile_type_ptr type, const vtr::Matrix& Fc_out, const int max_chan_width, const std::vector& segment_inf); +static std::vector alloc_and_load_perturb_opins(const t_physical_tile_type_ptr type, + const vtr::Matrix& Fc_out, + const int max_chan_width, + const std::vector& segment_inf); #ifdef ENABLE_CHECK_ALL_TRACKS static void check_all_tracks_reach_pins(t_logical_block_type_ptr type, @@ -589,8 +599,7 @@ static void build_inter_die_custom_sb_rr_chan(RRGraphBuilder& rr_graph_builder, void uniquify_edges(t_rr_edge_info_set& rr_edges_to_create); -void alloc_and_load_edges(RRGraphBuilder& rr_graph_builder, - const t_rr_edge_info_set& rr_edges_to_create); +void alloc_and_load_edges(RRGraphBuilder& rr_graph_builder, const t_rr_edge_info_set& rr_edges_to_create); static void alloc_and_load_rr_switch_inf(RRGraphBuilder& rr_graph_builder, std::vector>& switch_fanin_remap, @@ -600,8 +609,7 @@ static void alloc_and_load_rr_switch_inf(RRGraphBuilder& rr_graph_builder, const int wire_to_arch_ipin_switch, int* wire_to_rr_ipin_switch); -static void remap_rr_node_switch_indices(RRGraphBuilder& rr_graph_builder, - const t_arch_switch_fanin& switch_fanin); +static void remap_rr_node_switch_indices(RRGraphBuilder& rr_graph_builder, const t_arch_switch_fanin& switch_fanin); static void load_rr_switch_inf(RRGraphBuilder& rr_graph_builder, std::vector>& switch_fanin_remap, @@ -620,7 +628,9 @@ static void rr_graph_externals(const std::vector& segment_inf, int wire_to_rr_ipin_switch, enum e_base_cost_type base_cost_type); -static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const t_direct_inf* directs, const int num_directs, const int delayless_switch); +static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const t_direct_inf* directs, + const int num_directs, + const int delayless_switch); static t_seg_details* alloc_and_load_global_route_seg_details(const int global_route_switch, int* num_seg_details = nullptr); @@ -768,8 +778,7 @@ static void build_intra_cluster_rr_graph(const t_graph_type graph_type, * @param det_routing_arch Contain the information from architecture file * @param load_rr_graph Indicate whether the RR graph is loaded from a file */ -static int get_delayless_switch_id(t_det_routing_arch* det_routing_arch, - bool load_rr_graph); +static int get_delayless_switch_id(t_det_routing_arch* det_routing_arch, bool load_rr_graph); /******************* Subroutine definitions *******************************/ @@ -803,27 +812,15 @@ void create_rr_graph(const t_graph_type graph_type, if (device_ctx.read_rr_graph_filename != det_routing_arch->read_rr_graph_filename) { free_rr_graph(); - load_rr_file(&mutable_device_ctx.rr_graph_builder, - &mutable_device_ctx.rr_graph, - device_ctx.physical_tile_types, - segment_inf, - &mutable_device_ctx.rr_indexed_data, - &mutable_device_ctx.rr_rc_data, - grid, - device_ctx.arch_switch_inf, - graph_type, - device_ctx.arch, - &mutable_device_ctx.chan_width, - router_opts.base_cost_type, + load_rr_file(&mutable_device_ctx.rr_graph_builder, &mutable_device_ctx.rr_graph, + device_ctx.physical_tile_types, segment_inf, &mutable_device_ctx.rr_indexed_data, + &mutable_device_ctx.rr_rc_data, grid, device_ctx.arch_switch_inf, graph_type, + device_ctx.arch, &mutable_device_ctx.chan_width, router_opts.base_cost_type, &det_routing_arch->wire_to_rr_ipin_switch, &det_routing_arch->wire_to_arch_ipin_switch_between_dice, det_routing_arch->read_rr_graph_filename.c_str(), - &det_routing_arch->read_rr_graph_filename, - router_opts.read_rr_edge_metadata, - router_opts.do_check_rr_graph, - echo_enabled, - echo_file_name, - is_flat); + &det_routing_arch->read_rr_graph_filename, router_opts.read_rr_edge_metadata, + router_opts.do_check_rr_graph, echo_enabled, echo_file_name, is_flat); if (router_opts.reorder_rr_graph_nodes_algorithm != DONT_REORDER) { mutable_device_ctx.rr_graph_builder.reorder_nodes(router_opts.reorder_rr_graph_nodes_algorithm, router_opts.reorder_rr_graph_nodes_threshold, @@ -832,44 +829,23 @@ void create_rr_graph(const t_graph_type graph_type, } } else { free_rr_graph(); - build_rr_graph(graph_type, - block_types, - grid, - nodes_per_chan, - det_routing_arch->switch_block_type, - det_routing_arch->Fs, - det_routing_arch->switchblocks, - segment_inf, - det_routing_arch->global_route_switch, - det_routing_arch->wire_to_arch_ipin_switch, + build_rr_graph(graph_type, block_types, grid, nodes_per_chan, det_routing_arch->switch_block_type, + det_routing_arch->Fs, det_routing_arch->switchblocks, segment_inf, + det_routing_arch->global_route_switch, det_routing_arch->wire_to_arch_ipin_switch, det_routing_arch->wire_to_arch_ipin_switch_between_dice, - router_opts.custom_3d_sb_fanin_fanout, - det_routing_arch->delayless_switch, - det_routing_arch->R_minW_nmos, - det_routing_arch->R_minW_pmos, - router_opts.base_cost_type, - router_opts.clock_modeling, - directs, num_directs, - &det_routing_arch->wire_to_rr_ipin_switch, - is_flat, - Warnings, - router_opts.route_verbosity); + router_opts.custom_3d_sb_fanin_fanout, det_routing_arch->delayless_switch, + det_routing_arch->R_minW_nmos, det_routing_arch->R_minW_pmos, router_opts.base_cost_type, + router_opts.clock_modeling, directs, num_directs, &det_routing_arch->wire_to_rr_ipin_switch, + is_flat, Warnings, router_opts.route_verbosity); } } if (is_flat) { int delayless_switch = get_delayless_switch_id(det_routing_arch, load_rr_graph); VTR_ASSERT(delayless_switch != OPEN); - build_intra_cluster_rr_graph(graph_type, - grid, - block_types, - device_ctx.rr_graph, - delayless_switch, - det_routing_arch->R_minW_nmos, - det_routing_arch->R_minW_pmos, - mutable_device_ctx.rr_graph_builder, - is_flat, - load_rr_graph); + build_intra_cluster_rr_graph(graph_type, grid, block_types, device_ctx.rr_graph, delayless_switch, + det_routing_arch->R_minW_nmos, det_routing_arch->R_minW_pmos, + mutable_device_ctx.rr_graph_builder, is_flat, load_rr_graph); if (router_opts.reorder_rr_graph_nodes_algorithm != DONT_REORDER) { mutable_device_ctx.rr_graph_builder.reorder_nodes(router_opts.reorder_rr_graph_nodes_algorithm, @@ -884,10 +860,7 @@ void create_rr_graph(const t_graph_type graph_type, rr_set_sink_locs(device_ctx.rr_graph, mutable_device_ctx.rr_graph_builder, grid); - verify_rr_node_indices(grid, - device_ctx.rr_graph, - device_ctx.rr_indexed_data, - device_ctx.rr_graph.rr_nodes(), + verify_rr_node_indices(grid, device_ctx.rr_graph, device_ctx.rr_indexed_data, device_ctx.rr_graph.rr_nodes(), is_flat); print_rr_graph_stats(); @@ -897,19 +870,11 @@ void create_rr_graph(const t_graph_type graph_type, // through command line. So, the graph corresponding to global resources will be created and written down to file if needed. During routing, if flat-routing // is enabled, intra-cluster resources will be added to the graph, but this new bigger graph will not be written down. if (!det_routing_arch->write_rr_graph_filename.empty() && !is_flat) { - write_rr_graph(&mutable_device_ctx.rr_graph_builder, - &mutable_device_ctx.rr_graph, - device_ctx.physical_tile_types, - &mutable_device_ctx.rr_indexed_data, - &mutable_device_ctx.rr_rc_data, - grid, - device_ctx.arch_switch_inf, - device_ctx.arch, - &mutable_device_ctx.chan_width, - det_routing_arch->write_rr_graph_filename.c_str(), - echo_enabled, - echo_file_name, - is_flat); + write_rr_graph(&mutable_device_ctx.rr_graph_builder, &mutable_device_ctx.rr_graph, + device_ctx.physical_tile_types, &mutable_device_ctx.rr_indexed_data, + &mutable_device_ctx.rr_rc_data, grid, device_ctx.arch_switch_inf, device_ctx.arch, + &mutable_device_ctx.chan_width, det_routing_arch->write_rr_graph_filename.c_str(), echo_enabled, + echo_file_name, is_flat); } } @@ -934,20 +899,9 @@ static void add_intra_cluster_edges_rr_graph(RRGraphBuilder& rr_graph_builder, int j = block_loc.y; int layer = block_loc.layer; int abs_cap = block_loc.sub_tile; - build_cluster_internal_edges(rr_graph_builder, - num_collapsed_nodes, - cluster_blk_id, - layer, - i, - j, - abs_cap, - R_minW_nmos, - R_minW_pmos, - rr_edges_to_create, - nodes_to_collapse[cluster_blk_id], - grid, - is_flat, - load_rr_graph); + build_cluster_internal_edges(rr_graph_builder, num_collapsed_nodes, cluster_blk_id, layer, i, j, abs_cap, + R_minW_nmos, R_minW_pmos, rr_edges_to_create, nodes_to_collapse[cluster_blk_id], + grid, is_flat, load_rr_graph); uniquify_edges(rr_edges_to_create); alloc_and_load_edges(rr_graph_builder, rr_edges_to_create); num_edges += rr_edges_to_create.size(); @@ -968,28 +922,17 @@ static void add_intra_tile_edges_rr_graph(RRGraphBuilder& rr_graph_builder, if (is_pin_on_tile(physical_tile, pin_physical_num)) { continue; } - auto pin_rr_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), - physical_tile, - layer, - i, - j, - pin_physical_num); + auto pin_rr_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_tile, layer, i, j, pin_physical_num); VTR_ASSERT(pin_rr_node_id != RRNodeId::INVALID()); auto logical_block = get_logical_block_from_pin_physical_num(physical_tile, pin_physical_num); auto driving_pins = get_physical_pin_src_pins(physical_tile, logical_block, pin_physical_num); for (auto driving_pin : driving_pins) { - auto driving_pin_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), - physical_tile, - layer, - i, - j, - driving_pin); + auto driving_pin_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_tile, layer, i, j, driving_pin); VTR_ASSERT(driving_pin_node_id != RRNodeId::INVALID()); - int sw_idx = get_edge_sw_arch_idx(physical_tile, - logical_block, - driving_pin, - pin_physical_num); + int sw_idx = get_edge_sw_arch_idx(physical_tile, logical_block, driving_pin, pin_physical_num); VTR_ASSERT(sw_idx != -1); rr_edges_to_create.emplace_back(driving_pin_node_id, pin_rr_node_id, sw_idx, false); @@ -1045,12 +988,8 @@ std::set get_layers_connected_to_pin(const t_physical_tile_type_ptr type, i } bool channel_widths_unchanged(const t_chan_width& current, const t_chan_width& proposed) { - if (current.max != proposed.max - || current.x_max != proposed.x_max - || current.y_max != proposed.y_max - || current.x_min != proposed.x_min - || current.y_min != proposed.y_min - || current.x_list != proposed.x_list + if (current.max != proposed.max || current.x_max != proposed.x_max || current.y_max != proposed.y_max + || current.x_min != proposed.x_min || current.y_min != proposed.y_min || current.x_list != proposed.x_list || current.y_list != proposed.y_list) { return false; //Different max/min or channel widths } @@ -1143,15 +1082,11 @@ static void build_rr_graph(const t_graph_type graph_type, size_t max_dim = std::max(grid.width(), grid.height()) - 2; //-2 for no perim channels /*Get x & y segments separately*/ - seg_details_x = alloc_and_load_seg_details(&max_chan_width_x, - max_dim, segment_inf_x, - use_full_seg_groups, directionality, - &num_seg_details_x); + seg_details_x = alloc_and_load_seg_details(&max_chan_width_x, max_dim, segment_inf_x, use_full_seg_groups, + directionality, &num_seg_details_x); - seg_details_y = alloc_and_load_seg_details(&max_chan_width_y, - max_dim, segment_inf_y, - use_full_seg_groups, directionality, - &num_seg_details_y); + seg_details_y = alloc_and_load_seg_details(&max_chan_width_y, max_dim, segment_inf_y, use_full_seg_groups, + directionality, &num_seg_details_y); if (nodes_per_chan.x_max != max_chan_width_x || nodes_per_chan.y_max != max_chan_width_y) { nodes_per_chan.x_max = max_chan_width_x; @@ -1180,14 +1115,11 @@ static void build_rr_graph(const t_graph_type graph_type, t_chan_details chan_details_x; t_chan_details chan_details_y; - alloc_and_load_chan_details(grid, &nodes_per_chan, - num_seg_details_x, num_seg_details_y, - seg_details_x, seg_details_y, - chan_details_x, chan_details_y); + alloc_and_load_chan_details(grid, &nodes_per_chan, num_seg_details_x, num_seg_details_y, seg_details_x, + seg_details_y, chan_details_x, chan_details_y); if (getEchoEnabled() && isEchoFileEnabled(E_ECHO_CHAN_DETAILS)) { - dump_chan_details(chan_details_x, chan_details_y, &nodes_per_chan, - grid, getEchoFileName(E_ECHO_CHAN_DETAILS)); + dump_chan_details(chan_details_x, chan_details_y, &nodes_per_chan, grid, getEchoFileName(E_ECHO_CHAN_DETAILS)); } /* END CHAN_DETAILS */ @@ -1223,7 +1155,8 @@ static void build_rr_graph(const t_graph_type graph_type, auto sets_per_seg_type_y = get_seg_track_counts(total_sets_y, segment_inf_y, use_full_seg_groups); auto sets_per_seg_type = get_seg_track_counts(total_sets, segment_inf, use_full_seg_groups); - auto sets_test = get_ordered_seg_track_counts(segment_inf_x, segment_inf_y, segment_inf, sets_per_seg_type_x, sets_per_seg_type_y); + auto sets_test = get_ordered_seg_track_counts(segment_inf_x, segment_inf_y, segment_inf, sets_per_seg_type_x, + sets_per_seg_type_y); //VTR_ASSERT_MSG(sets_test==sets_per_seg_type, // "Not equal combined output after combining segs " ); @@ -1261,13 +1194,8 @@ static void build_rr_graph(const t_graph_type graph_type, VTR_LOG( "Fc Actual Values: type = %s, pin = %d (%s), " "seg = %d (%s), Fc_out = %d, Fc_in = %d.\n", - type.name, - j, - block_type_pin_index_to_name(&type, j, is_flat).c_str(), - k, - segment_inf[k].name.c_str(), - Fc_out[i][j][k], - Fc_in[i][j][k]); + type.name, j, block_type_pin_index_to_name(&type, j, is_flat).c_str(), k, + segment_inf[k].name.c_str(), Fc_out[i][j][k], Fc_in[i][j][k]); #endif VTR_ASSERT_MSG(Fc_out[i][j][k] == 0 || Fc_in[i][j][k] == 0, "Pins must be inputs or outputs (i.e. can not have both non-zero Fc_out and Fc_in)"); @@ -1276,21 +1204,16 @@ static void build_rr_graph(const t_graph_type graph_type, } } - auto perturb_ipins = alloc_and_load_perturb_ipins(types.size(), segment_inf.size(), - sets_per_seg_type.get(), Fc_in, Fc_out, directionality); + auto perturb_ipins = alloc_and_load_perturb_ipins(types.size(), segment_inf.size(), sets_per_seg_type.get(), Fc_in, + Fc_out, directionality); /* END FC */ /* Alloc node lookups, count nodes, alloc rr nodes */ int num_rr_nodes = 0; // Add routing resources to rr_graph lookup table - alloc_and_load_rr_node_indices(device_ctx.rr_graph_builder, - &nodes_per_chan, - grid, - &num_rr_nodes, - chan_details_x, - chan_details_y, - is_flat); + alloc_and_load_rr_node_indices(device_ctx.rr_graph_builder, &nodes_per_chan, grid, &num_rr_nodes, chan_details_x, + chan_details_y, is_flat); size_t expected_node_count = num_rr_nodes; if (clock_modeling == DEDICATED_NETWORK) { @@ -1302,13 +1225,9 @@ static void build_rr_graph(const t_graph_type graph_type, /* These are data structures used by the unidir opin mapping. They are used * to spread connections evenly for each segment type among the available * wire start points */ - vtr::NdMatrix Fc_xofs({grid.height() - 1, - grid.width() - 1, - segment_inf_x.size()}, + vtr::NdMatrix Fc_xofs({grid.height() - 1, grid.width() - 1, segment_inf_x.size()}, 0); //[0..grid.height()-2][0..grid.width()-2][0..num_seg_types_x-1] - vtr::NdMatrix Fc_yofs({grid.width() - 1, - grid.height() - 1, - segment_inf_y.size()}, + vtr::NdMatrix Fc_yofs({grid.width() - 1, grid.height() - 1, segment_inf_y.size()}, 0); //[0..grid.width()-2][0..grid.height()-2][0..num_seg_types_y-1] /* START SB LOOKUP */ @@ -1329,10 +1248,9 @@ static void build_rr_graph(const t_graph_type graph_type, switch_block_conn = alloc_and_load_switch_block_conn(&nodes_per_chan, SUBSET, 3); } else if (BI_DIRECTIONAL == directionality) { if (sb_type == CUSTOM) { - sb_conn_map = alloc_and_load_switchblock_permutations(chan_details_x, chan_details_y, - grid, inter_cluster_prog_rr, - switchblocks, &nodes_per_chan, directionality, - switchpoint_rand_state); + sb_conn_map = alloc_and_load_switchblock_permutations(chan_details_x, chan_details_y, grid, + inter_cluster_prog_rr, switchblocks, &nodes_per_chan, + directionality, switchpoint_rand_state); } else { switch_block_conn = alloc_and_load_switch_block_conn(&nodes_per_chan, sb_type, Fs); } @@ -1340,11 +1258,9 @@ static void build_rr_graph(const t_graph_type graph_type, VTR_ASSERT(UNI_DIRECTIONAL == directionality); if (sb_type == CUSTOM) { - sb_conn_map = alloc_and_load_switchblock_permutations(chan_details_x, chan_details_y, - grid, - inter_cluster_prog_rr, - switchblocks, &nodes_per_chan, directionality, - switchpoint_rand_state); + sb_conn_map = alloc_and_load_switchblock_permutations(chan_details_x, chan_details_y, grid, + inter_cluster_prog_rr, switchblocks, &nodes_per_chan, + directionality, switchpoint_rand_state); } else { /* it looks like we get unbalanced muxing from this switch block code with Fs > 3 */ VTR_ASSERT(Fs == 3); @@ -1352,15 +1268,13 @@ static void build_rr_graph(const t_graph_type graph_type, unidir_sb_pattern = alloc_sblock_pattern_lookup(grid, &nodes_per_chan); for (size_t i = 0; i < grid.width() - 1; i++) { for (size_t j = 0; j < grid.height() - 1; j++) { - load_sblock_pattern_lookup(i, j, grid, &nodes_per_chan, - chan_details_x, chan_details_y, - Fs, sb_type, unidir_sb_pattern); + load_sblock_pattern_lookup(i, j, grid, &nodes_per_chan, chan_details_x, chan_details_y, Fs, sb_type, + unidir_sb_pattern); } } if (getEchoEnabled() && isEchoFileEnabled(E_ECHO_SBLOCK_PATTERN)) { - dump_sblock_pattern(unidir_sb_pattern, max_chan_width, grid, - getEchoFileName(E_ECHO_SBLOCK_PATTERN)); + dump_sblock_pattern(unidir_sb_pattern, max_chan_width, grid, getEchoFileName(E_ECHO_SBLOCK_PATTERN)); } } } @@ -1372,9 +1286,11 @@ static void build_rr_graph(const t_graph_type graph_type, */ if (grid.get_num_layers() > 1 && sb_type == CUSTOM) { //keep how many nodes each switchblock requires for each x,y location - auto extra_nodes_per_switchblock = get_number_track_to_track_inter_die_conn(sb_conn_map,custom_3d_sb_fanin_fanout, device_ctx.rr_graph_builder); + auto extra_nodes_per_switchblock = get_number_track_to_track_inter_die_conn( + sb_conn_map, custom_3d_sb_fanin_fanout, device_ctx.rr_graph_builder); //allocate new nodes in each switchblocks - alloc_and_load_inter_die_rr_node_indices(device_ctx.rr_graph_builder, &nodes_per_chan, grid, extra_nodes_per_switchblock, &num_rr_nodes); + alloc_and_load_inter_die_rr_node_indices(device_ctx.rr_graph_builder, &nodes_per_chan, grid, + extra_nodes_per_switchblock, &num_rr_nodes); device_ctx.rr_graph_builder.resize_nodes(num_rr_nodes); extra_nodes_per_switchblock.clear(); } @@ -1382,8 +1298,12 @@ static void build_rr_graph(const t_graph_type graph_type, /* START IPIN MAP */ /* Create ipin map lookups */ - t_pin_to_track_lookup ipin_to_track_map_x(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width-1][0..height-1][0..layers-1][0..sides-1][0..Fc-1] */ - t_pin_to_track_lookup ipin_to_track_map_y(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width-1][0..height-1][0..layers-1][0..sides-1][0..Fc-1] */ + t_pin_to_track_lookup ipin_to_track_map_x( + types + .size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width-1][0..height-1][0..layers-1][0..sides-1][0..Fc-1] */ + t_pin_to_track_lookup ipin_to_track_map_y( + types + .size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width-1][0..height-1][0..layers-1][0..sides-1][0..Fc-1] */ t_track_to_pin_lookup track_to_pin_lookup_x(types.size()); t_track_to_pin_lookup track_to_pin_lookup_y(types.size()); @@ -1391,29 +1311,21 @@ static void build_rr_graph(const t_graph_type graph_type, for (unsigned int itype = 0; itype < types.size(); ++itype) { auto type_layer = get_layers_of_physical_types(&types[itype]); - ipin_to_track_map_x[itype] = alloc_and_load_pin_to_track_map(RECEIVER, - Fc_in[itype], &types[itype], type_layer, - perturb_ipins[itype], directionality, - segment_inf_x, sets_per_seg_type_x.get()); - - ipin_to_track_map_y[itype] = alloc_and_load_pin_to_track_map(RECEIVER, - Fc_in[itype], &types[itype], type_layer, - perturb_ipins[itype], directionality, - segment_inf_y, sets_per_seg_type_y.get()); - - track_to_pin_lookup_x[itype] = alloc_and_load_track_to_pin_lookup(ipin_to_track_map_x[itype], Fc_in[itype], - &types[itype], - type_layer, types[itype].width, - types[itype].height, - types[itype].num_pins, - nodes_per_chan.x_max, segment_inf_x); - - track_to_pin_lookup_y[itype] = alloc_and_load_track_to_pin_lookup(ipin_to_track_map_y[itype], Fc_in[itype], - &types[itype], - type_layer, types[itype].width, - types[itype].height, - types[itype].num_pins, - nodes_per_chan.y_max, segment_inf_y); + ipin_to_track_map_x[itype] + = alloc_and_load_pin_to_track_map(RECEIVER, Fc_in[itype], &types[itype], type_layer, perturb_ipins[itype], + directionality, segment_inf_x, sets_per_seg_type_x.get()); + + ipin_to_track_map_y[itype] + = alloc_and_load_pin_to_track_map(RECEIVER, Fc_in[itype], &types[itype], type_layer, perturb_ipins[itype], + directionality, segment_inf_y, sets_per_seg_type_y.get()); + + track_to_pin_lookup_x[itype] = alloc_and_load_track_to_pin_lookup( + ipin_to_track_map_x[itype], Fc_in[itype], &types[itype], type_layer, types[itype].width, + types[itype].height, types[itype].num_pins, nodes_per_chan.x_max, segment_inf_x); + + track_to_pin_lookup_y[itype] = alloc_and_load_track_to_pin_lookup( + ipin_to_track_map_y[itype], Fc_in[itype], &types[itype], type_layer, types[itype].width, + types[itype].height, types[itype].num_pins, nodes_per_chan.y_max, segment_inf_y); } if (getEchoEnabled() && isEchoFileEnabled(E_ECHO_TRACK_TO_PIN_MAP)) { @@ -1428,15 +1340,17 @@ static void build_rr_graph(const t_graph_type graph_type, /* START OPIN MAP */ /* Create opin map lookups */ - t_pin_to_track_lookup opin_to_track_map(types.size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width][0..height][0..3][0..Fc-1] */ + t_pin_to_track_lookup opin_to_track_map( + types + .size()); /* [0..device_ctx.physical_tile_types.size()-1][0..num_pins-1][0..width][0..height][0..3][0..Fc-1] */ if (BI_DIRECTIONAL == directionality) { for (unsigned int itype = 0; itype < types.size(); ++itype) { auto type_layer = get_layers_of_physical_types(&types[itype]); - auto perturb_opins = alloc_and_load_perturb_opins(&types[itype], Fc_out[itype], - max_chan_width, segment_inf); - opin_to_track_map[itype] = alloc_and_load_pin_to_track_map(DRIVER, - Fc_out[itype], &types[itype], type_layer, perturb_opins, directionality, - segment_inf, sets_per_seg_type.get()); + auto perturb_opins + = alloc_and_load_perturb_opins(&types[itype], Fc_out[itype], max_chan_width, segment_inf); + opin_to_track_map[itype] + = alloc_and_load_pin_to_track_map(DRIVER, Fc_out[itype], &types[itype], type_layer, perturb_opins, + directionality, segment_inf, sets_per_seg_type.get()); } } /* END OPIN MAP */ @@ -1452,43 +1366,26 @@ static void build_rr_graph(const t_graph_type graph_type, // Create the switches for (const auto& sw_pair : device_ctx.all_sw_inf) { const auto& arch_sw = sw_pair.second; - t_rr_switch_inf rr_switch = create_rr_switch_from_arch_switch(arch_sw, - R_minW_nmos, - R_minW_pmos); + t_rr_switch_inf rr_switch = create_rr_switch_from_arch_switch(arch_sw, R_minW_nmos, R_minW_pmos); device_ctx.rr_graph_builder.add_rr_switch(rr_switch); } auto update_chan_width = alloc_and_load_rr_graph( device_ctx.rr_graph_builder, - device_ctx.rr_graph_builder.rr_nodes(), device_ctx.rr_graph, segment_inf.size(), - segment_inf_x.size(), - segment_index_map, - chan_details_x, chan_details_y, - track_to_pin_lookup_x, track_to_pin_lookup_y, - opin_to_track_map, - switch_block_conn, sb_conn_map, grid, Fs, unidir_sb_pattern, - Fc_out, Fc_xofs, Fc_yofs, - nodes_per_chan, - wire_to_arch_ipin_switch, - wire_to_pin_between_dice_switch, - custom_3d_sb_fanin_fanout, - delayless_switch, - directionality, - &Fc_clipped, - directs, num_directs, clb_to_clb_directs, - is_global_graph, - clock_modeling, - is_flat, - route_verbosity); + device_ctx.rr_graph_builder.rr_nodes(), device_ctx.rr_graph, segment_inf.size(), segment_inf_x.size(), + segment_index_map, chan_details_x, chan_details_y, track_to_pin_lookup_x, track_to_pin_lookup_y, + opin_to_track_map, switch_block_conn, sb_conn_map, grid, Fs, unidir_sb_pattern, Fc_out, Fc_xofs, Fc_yofs, + nodes_per_chan, wire_to_arch_ipin_switch, wire_to_pin_between_dice_switch, custom_3d_sb_fanin_fanout, + delayless_switch, directionality, &Fc_clipped, directs, num_directs, clb_to_clb_directs, is_global_graph, + clock_modeling, is_flat, route_verbosity); // Verify no incremental node allocation. - // AA: Note that in the case of dedicated networks, we are currently underestimating the additional node count due to the clock networks. + // AA: Note that in the case of dedicated networks, we are currently underestimating the additional node count due to the clock networks. /* For now, the node count comparison is being skipped in the presence of clock networks. - * TODO: The node estimation needs to be fixed for dedicated clock networks. */ + * TODO: The node estimation needs to be fixed for dedicated clock networks. */ if (rr_graph.num_nodes() > expected_node_count && clock_modeling != DEDICATED_NETWORK) { - VTR_LOG_ERROR("Expected no more than %zu nodes, have %zu nodes\n", - expected_node_count, rr_graph.num_nodes()); + VTR_LOG_ERROR("Expected no more than %zu nodes, have %zu nodes\n", expected_node_count, rr_graph.num_nodes()); } /* Update rr_nodes capacities if global routing */ @@ -1533,12 +1430,8 @@ static void build_rr_graph(const t_graph_type graph_type, /* Allocate and load routing resource switches, which are derived from the switches from the architecture file, * based on their fanin in the rr graph. This routine also adjusts the rr nodes to point to these new rr switches */ alloc_and_load_rr_switch_inf(g_vpr_ctx.mutable_device().rr_graph_builder, - g_vpr_ctx.mutable_device().switch_fanin_remap, - device_ctx.all_sw_inf, - R_minW_nmos, - R_minW_pmos, - wire_to_arch_ipin_switch, - wire_to_rr_ipin_switch); + g_vpr_ctx.mutable_device().switch_fanin_remap, device_ctx.all_sw_inf, R_minW_nmos, + R_minW_pmos, wire_to_arch_ipin_switch, wire_to_rr_ipin_switch); //Partition the rr graph edges for efficient access to configurable/non-configurable //edge subsets. Must be done after RR switches have been allocated @@ -1549,12 +1442,7 @@ static void build_rr_graph(const t_graph_type graph_type, rr_graph_externals(segment_inf, segment_inf_x, segment_inf_y, *wire_to_rr_ipin_switch, base_cost_type); - check_rr_graph(device_ctx.rr_graph, - types, - device_ctx.rr_indexed_data, - grid, - device_ctx.chan_width, - graph_type, + check_rr_graph(device_ctx.rr_graph, types, device_ctx.rr_indexed_data, grid, device_ctx.chan_width, graph_type, is_flat); /* Free all temp structs */ @@ -1609,32 +1497,20 @@ static void build_intra_cluster_rr_graph(const t_graph_type graph_type, vtr::vector> cluster_flat_chain_pins = get_pin_chains_flat(pin_chains); int num_rr_nodes = rr_graph.num_nodes(); - alloc_and_load_intra_cluster_rr_node_indices(rr_graph_builder, - grid, - pin_chains, - cluster_flat_chain_pins, + alloc_and_load_intra_cluster_rr_node_indices(rr_graph_builder, grid, pin_chains, cluster_flat_chain_pins, &num_rr_nodes); size_t expected_node_count = num_rr_nodes; rr_graph_builder.resize_nodes(num_rr_nodes); - alloc_and_load_intra_cluster_rr_graph(rr_graph_builder, - grid, - delayless_switch, - pin_chains, - cluster_flat_chain_pins, - R_minW_nmos, - R_minW_pmos, - is_flat, - load_rr_graph); + alloc_and_load_intra_cluster_rr_graph(rr_graph_builder, grid, delayless_switch, pin_chains, cluster_flat_chain_pins, + R_minW_nmos, R_minW_pmos, is_flat, load_rr_graph); if (rr_graph.num_nodes() > expected_node_count) { - VTR_LOG_ERROR("Expected no more than %zu nodes, have %zu nodes\n", - expected_node_count, rr_graph.num_nodes()); + VTR_LOG_ERROR("Expected no more than %zu nodes, have %zu nodes\n", expected_node_count, rr_graph.num_nodes()); } if (!load_rr_graph) { - remap_rr_node_switch_indices(rr_graph_builder, - g_vpr_ctx.device().switch_fanin_remap); + remap_rr_node_switch_indices(rr_graph_builder, g_vpr_ctx.device().switch_fanin_remap); } else { rr_graph_builder.mark_edges_as_rr_switch_ids(); } @@ -1643,22 +1519,16 @@ static void build_intra_cluster_rr_graph(const t_graph_type graph_type, rr_graph_builder.clear_temp_storage(); - check_rr_graph(device_ctx.rr_graph, - types, - device_ctx.rr_indexed_data, - grid, - device_ctx.chan_width, - graph_type, + check_rr_graph(device_ctx.rr_graph, types, device_ctx.rr_indexed_data, grid, device_ctx.chan_width, graph_type, is_flat); } -static int get_delayless_switch_id(t_det_routing_arch* det_routing_arch, - bool load_rr_graph) { +static int get_delayless_switch_id(t_det_routing_arch* det_routing_arch, bool load_rr_graph) { const auto& device_ctx = g_vpr_ctx.device(); int delayless_switch = OPEN; if (load_rr_graph) { const auto& rr_switches = device_ctx.rr_graph.rr_switch(); - for (size_t switch_id = 0; switch_id < rr_switches.size(); switch_id++){ + for (size_t switch_id = 0; switch_id < rr_switches.size(); switch_id++) { const auto& rr_switch = rr_switches[RRSwitchId(switch_id)]; if (rr_switch.name.find("delayless") != std::string::npos) { delayless_switch = static_cast(switch_id); @@ -1682,31 +1552,15 @@ void build_tile_rr_graph(RRGraphBuilder& rr_graph_builder, std::map sw_map = g_vpr_ctx.device().all_sw_inf; int num_rr_nodes = 0; - alloc_and_load_tile_rr_node_indices(rr_graph_builder, - physical_tile, - layer, - x, - y, - &num_rr_nodes); + alloc_and_load_tile_rr_node_indices(rr_graph_builder, physical_tile, layer, x, y, &num_rr_nodes); rr_graph_builder.resize_nodes(num_rr_nodes); - alloc_and_load_tile_rr_graph(rr_graph_builder, - sw_map, - physical_tile, - layer, - x, - y, - delayless_switch); + alloc_and_load_tile_rr_graph(rr_graph_builder, sw_map, physical_tile, layer, x, y, delayless_switch); std::vector> switch_fanin_remap; int dummy_int; - alloc_and_load_rr_switch_inf(rr_graph_builder, - switch_fanin_remap, - sw_map, - det_routing_arch.R_minW_nmos, - det_routing_arch.R_minW_pmos, - det_routing_arch.wire_to_arch_ipin_switch, - &dummy_int); + alloc_and_load_rr_switch_inf(rr_graph_builder, switch_fanin_remap, sw_map, det_routing_arch.R_minW_nmos, + det_routing_arch.R_minW_pmos, det_routing_arch.wire_to_arch_ipin_switch, &dummy_int); rr_graph_builder.partition_edges(); } @@ -1745,22 +1599,14 @@ static void alloc_and_load_rr_switch_inf(RRGraphBuilder& rr_graph_builder, /* Determine what the different fan-ins are for each arch switch, and also * how many entries the rr_switch_inf array should have */ - alloc_rr_switch_inf(rr_graph_builder, - arch_switch_fanins, - arch_sw_inf); + alloc_rr_switch_inf(rr_graph_builder, arch_switch_fanins, arch_sw_inf); /* create the rr switches. also keep track of, for each arch switch, what index of the rr_switch_inf * array each version of its fanin has been mapped to */ - load_rr_switch_inf(rr_graph_builder, - switch_fanin_remap, - arch_sw_inf, - R_minW_nmos, - R_minW_pmos, - arch_switch_fanins); + load_rr_switch_inf(rr_graph_builder, switch_fanin_remap, arch_sw_inf, R_minW_nmos, R_minW_pmos, arch_switch_fanins); /* next, walk through rr nodes again and remap their switch indices to rr_switch_inf */ - remap_rr_node_switch_indices(rr_graph_builder, - arch_switch_fanins); + remap_rr_node_switch_indices(rr_graph_builder, arch_switch_fanins); /* now we need to set the wire_to_rr_ipin_switch variable which points the detailed routing architecture * to the representative ipin cblock switch. currently we're not allowing the specification of an ipin cblock switch @@ -1770,8 +1616,7 @@ static void alloc_and_load_rr_switch_inf(RRGraphBuilder& rr_graph_builder, /* only have one ipin cblock switch. OK. */ (*wire_to_rr_ipin_switch) = arch_switch_fanins[wire_to_arch_ipin_switch][UNDEFINED]; } else if (arch_switch_fanins[wire_to_arch_ipin_switch].size() != 0) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, - "Not currently allowing an ipin cblock switch to have multiple fan-ins"); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Not currently allowing an ipin cblock switch to have multiple fan-ins"); } else { //This likely indicates that no connection block has been constructed, indicating significant issues with //the generated RR graph. @@ -1779,7 +1624,9 @@ static void alloc_and_load_rr_switch_inf(RRGraphBuilder& rr_graph_builder, //Instead of throwing an error we issue a warning. This means that check_rr_graph() etc. will run to give more information //and allow graphics to be brought up for users to debug their architectures. (*wire_to_rr_ipin_switch) = OPEN; - VTR_LOG_WARN("No switch found for the ipin cblock in RR graph. Check if there is an error in arch file, or if no connection blocks are being built in RR graph\n"); + VTR_LOG_WARN( + "No switch found for the ipin cblock in RR graph. Check if there is an error in arch file, or if no " + "connection blocks are being built in RR graph\n"); } } @@ -1792,9 +1639,7 @@ static void alloc_rr_switch_inf(RRGraphBuilder& rr_graph_builder, for (const auto& map_it : arch_sw_map) { all_sw_inf[map_it.first] = map_it.second; } - size_t num_rr_switches = rr_graph_builder.count_rr_switches( - all_sw_inf, - arch_switch_fanins); + size_t num_rr_switches = rr_graph_builder.count_rr_switches(all_sw_inf, arch_switch_fanins); rr_graph_builder.resize_switches(num_rr_switches); } @@ -1826,12 +1671,7 @@ static void load_rr_switch_inf(RRGraphBuilder& rr_graph_builder, // setup device_ctx.switch_fanin_remap, for future swich usage analysis switch_fanin_remap[arch_sw_id][fanin] = i_rr_switch; - load_rr_switch_from_arch_switch(rr_graph_builder, - arch_sw_inf, - arch_sw_id, - i_rr_switch, - fanin, - R_minW_nmos, + load_rr_switch_from_arch_switch(rr_graph_builder, arch_sw_inf, arch_sw_id, i_rr_switch, fanin, R_minW_nmos, R_minW_pmos); } } @@ -1893,25 +1733,28 @@ void load_rr_switch_from_arch_switch(RRGraphBuilder& rr_graph_builder, rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].Cinternal = arch_sw_inf.at(arch_switch_idx).Cinternal; rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].Cout = arch_sw_inf.at(arch_switch_idx).Cout; rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].Tdel = rr_switch_Tdel; - rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].mux_trans_size = arch_sw_inf.at(arch_switch_idx).mux_trans_size; + rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].mux_trans_size + = arch_sw_inf.at(arch_switch_idx).mux_trans_size; if (arch_sw_inf.at(arch_switch_idx).buf_size_type == BufferSize::AUTO) { //Size based on resistance - rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].buf_size = trans_per_buf(arch_sw_inf.at(arch_switch_idx).R, R_minW_nmos, R_minW_pmos); + rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].buf_size + = trans_per_buf(arch_sw_inf.at(arch_switch_idx).R, R_minW_nmos, R_minW_pmos); } else { VTR_ASSERT(arch_sw_inf.at(arch_switch_idx).buf_size_type == BufferSize::ABSOLUTE); //Use the specified size rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].buf_size = arch_sw_inf.at(arch_switch_idx).buf_size; } rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].name = arch_sw_inf.at(arch_switch_idx).name; - rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].power_buffer_type = arch_sw_inf.at(arch_switch_idx).power_buffer_type; - rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].power_buffer_size = arch_sw_inf.at(arch_switch_idx).power_buffer_size; + rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].power_buffer_type + = arch_sw_inf.at(arch_switch_idx).power_buffer_type; + rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].power_buffer_size + = arch_sw_inf.at(arch_switch_idx).power_buffer_size; } /* switch indices of each rr_node original point into the global device_ctx.arch_switch_inf array. * now we want to remap these indices to point into the global device_ctx.rr_switch_inf array * which contains switch info at different fan-in values */ -static void remap_rr_node_switch_indices(RRGraphBuilder& rr_graph_builder, - const t_arch_switch_fanin& switch_fanin) { +static void remap_rr_node_switch_indices(RRGraphBuilder& rr_graph_builder, const t_arch_switch_fanin& switch_fanin) { rr_graph_builder.remap_rr_node_switch_indices(switch_fanin); } @@ -1928,8 +1771,8 @@ static void rr_graph_externals(const std::vector& segment_inf, bool echo_enabled = getEchoEnabled() && isEchoFileEnabled(E_ECHO_RR_GRAPH_INDEXED_DATA); const char* echo_file_name = getEchoFileName(E_ECHO_RR_GRAPH_INDEXED_DATA); add_rr_graph_C_from_switches(rr_graph.rr_switch_inf(RRSwitchId(wire_to_rr_ipin_switch)).Cin); - alloc_and_load_rr_indexed_data(rr_graph, grid, segment_inf, segment_inf_x, - segment_inf_y, rr_indexed_data, wire_to_rr_ipin_switch, base_cost_type, echo_enabled, echo_file_name); + alloc_and_load_rr_indexed_data(rr_graph, grid, segment_inf, segment_inf_x, segment_inf_y, rr_indexed_data, + wire_to_rr_ipin_switch, base_cost_type, echo_enabled, echo_file_name); //load_rr_index_segments(segment_inf.size()); } @@ -1967,8 +1810,7 @@ static std::vector> alloc_and_load_perturb_ipins(const int L_n } if ((Fc_in[itype][0][iseg] <= tracks_in_seg_type - 2) - && (fabs(Fc_ratio - vtr::nint(Fc_ratio)) - < (0.5 / (float)tracks_in_seg_type))) { + && (fabs(Fc_ratio - vtr::nint(Fc_ratio)) < (0.5 / (float)tracks_in_seg_type))) { result[itype][iseg] = true; } } @@ -1986,8 +1828,7 @@ static std::vector> alloc_and_load_perturb_ipins(const int L_n return result; } -static t_seg_details* alloc_and_load_global_route_seg_details(const int global_route_switch, - int* num_seg_details) { +static t_seg_details* alloc_and_load_global_route_seg_details(const int global_route_switch, int* num_seg_details) { t_seg_details* seg_details = new t_seg_details[1]; seg_details->index = 0; @@ -2044,7 +1885,8 @@ static std::vector> alloc_and_load_actual_fc(const std::vector< int itype = type.index; for (const t_fc_specification& fc_spec : type.fc_specs) { - if (fc_type != fc_spec.fc_type) continue; + if (fc_type != fc_spec.fc_type) + continue; VTR_ASSERT(fc_spec.pins.size() > 0); @@ -2068,17 +1910,21 @@ static std::vector> alloc_and_load_actual_fc(const std::vector< VTR_ASSERT(fc_spec.fc_value_type == e_fc_value_type::ABSOLUTE); if (std::fmod(fc_spec.fc_value, fac) != 0.) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Absolute Fc value must be a multiple of %d (was %f) between block pin '%s' and wire segment '%s'", + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "Absolute Fc value must be a multiple of %d (was %f) between block pin '%s' " + "and wire segment '%s'", fac, fc_spec.fc_value, block_type_pin_index_to_name(&type, fc_spec.pins[0], is_flat).c_str(), segment_inf[iseg].name.c_str()); } if (fc_spec.fc_value < fac) { - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Absolute Fc value must be at least %d (was %f) between block pin '%s' to wire segment %s", - fac, fc_spec.fc_value, - block_type_pin_index_to_name(&type, fc_spec.pins[0], is_flat).c_str(), - segment_inf[iseg].name.c_str()); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, + "Absolute Fc value must be at least %d (was %f) between block pin '%s' to wire segment %s", + fac, fc_spec.fc_value, + block_type_pin_index_to_name(&type, fc_spec.pins[0], is_flat).c_str(), + segment_inf[iseg].name.c_str()); } total_connections = vtr::nint(fc_spec.fc_value) * fc_spec.pins.size(); @@ -2121,7 +1967,9 @@ static std::vector> alloc_and_load_actual_fc(const std::vector< } VTR_ASSERT_MSG(Fc[itype][ipin][iseg] >= 0, "Calculated absolute Fc must be positive"); - VTR_ASSERT_MSG(Fc[itype][ipin][iseg] % fac == 0, "Calculated absolute Fc must be divisible by 1 (bidir architecture) or 2 (unidir architecture)"); //Required by connection block construction code + VTR_ASSERT_MSG(Fc[itype][ipin][iseg] % fac == 0, + "Calculated absolute Fc must be divisible by 1 (bidir architecture) or 2 (unidir " + "architecture)"); //Required by connection block construction code } } } @@ -2132,39 +1980,40 @@ static std::vector> alloc_and_load_actual_fc(const std::vector< /* Does the actual work of allocating the rr_graph and filling all the * * appropriate values. Everything up to this was just a prelude! */ -static std::function alloc_and_load_rr_graph(RRGraphBuilder& rr_graph_builder, - t_rr_graph_storage& L_rr_node, - const RRGraphView& rr_graph, - const int num_seg_types, - const int num_seg_types_x, - const t_unified_to_parallel_seg_index& seg_index_map, - const t_chan_details& chan_details_x, - const t_chan_details& chan_details_y, - const t_track_to_pin_lookup& track_to_pin_lookup_x, - const t_track_to_pin_lookup& track_to_pin_lookup_y, - const t_pin_to_track_lookup& opin_to_track_map, - const vtr::NdMatrix, 3>& switch_block_conn, - t_sb_connection_map* sb_conn_map, - const DeviceGrid& grid, - const int Fs, - t_sblock_pattern& sblock_pattern, - const std::vector>& Fc_out, - vtr::NdMatrix& Fc_xofs, - vtr::NdMatrix& Fc_yofs, - const t_chan_width& chan_width, - const int wire_to_ipin_switch, - const int wire_to_pin_between_dice_switch, - const int custom_3d_sb_fanin_fanout, - const int delayless_switch, - const enum e_directionality directionality, - bool* Fc_clipped, - const t_direct_inf* directs, - const int num_directs, - const t_clb_to_clb_directs* clb_to_clb_directs, - bool is_global_graph, - const enum e_clock_modeling clock_modeling, - bool /*is_flat*/, - const int route_verbosity) { +static std::function alloc_and_load_rr_graph( + RRGraphBuilder& rr_graph_builder, + t_rr_graph_storage& L_rr_node, + const RRGraphView& rr_graph, + const int num_seg_types, + const int num_seg_types_x, + const t_unified_to_parallel_seg_index& seg_index_map, + const t_chan_details& chan_details_x, + const t_chan_details& chan_details_y, + const t_track_to_pin_lookup& track_to_pin_lookup_x, + const t_track_to_pin_lookup& track_to_pin_lookup_y, + const t_pin_to_track_lookup& opin_to_track_map, + const vtr::NdMatrix, 3>& switch_block_conn, + t_sb_connection_map* sb_conn_map, + const DeviceGrid& grid, + const int Fs, + t_sblock_pattern& sblock_pattern, + const std::vector>& Fc_out, + vtr::NdMatrix& Fc_xofs, + vtr::NdMatrix& Fc_yofs, + const t_chan_width& chan_width, + const int wire_to_ipin_switch, + const int wire_to_pin_between_dice_switch, + const int custom_3d_sb_fanin_fanout, + const int delayless_switch, + const enum e_directionality directionality, + bool* Fc_clipped, + const t_direct_inf* directs, + const int num_directs, + const t_clb_to_clb_directs* clb_to_clb_directs, + bool is_global_graph, + const enum e_clock_modeling clock_modeling, + bool /*is_flat*/, + const int route_verbosity) { //We take special care when creating RR graph edges (there are typically many more //edges than nodes in an RR graph). // @@ -2184,7 +2033,7 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder *Fc_clipped = false; /* This function is called to build the general routing graph resoruces. Thus, - the edges are not remapped yet.*/ + * the edges are not remapped yet.*/ bool switches_remapped = false; int num_edges = 0; @@ -2198,29 +2047,12 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder std::vector pin_num_vec; class_num_vec = get_tile_root_classes(physical_tile); pin_num_vec = get_tile_root_pins(physical_tile); - add_classes_rr_graph(rr_graph_builder, - class_num_vec, - layer, - i, - j, - physical_tile); - - add_pins_rr_graph(rr_graph_builder, - pin_num_vec, - layer, - i, - j, - physical_tile); - - connect_src_sink_to_pins(rr_graph_builder, - class_num_vec, - layer, - i, - j, - rr_edges_to_create, - delayless_switch, - physical_tile, - switches_remapped); + add_classes_rr_graph(rr_graph_builder, class_num_vec, layer, i, j, physical_tile); + + add_pins_rr_graph(rr_graph_builder, pin_num_vec, layer, i, j, physical_tile); + + connect_src_sink_to_pins(rr_graph_builder, class_num_vec, layer, i, j, rr_edges_to_create, + delayless_switch, physical_tile, switches_remapped); //Create the actual SOURCE->OPIN, IPIN->SINK edges uniquify_edges(rr_edges_to_create); @@ -2232,7 +2064,7 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder } } - VTR_LOGV(route_verbosity > 1,"SOURCE->OPIN and IPIN->SINK edge count:%d\n", num_edges); + VTR_LOGV(route_verbosity > 1, "SOURCE->OPIN and IPIN->SINK edge count:%d\n", num_edges); num_edges = 0; /* Build opins */ int rr_edges_before_directs = 0; @@ -2241,19 +2073,16 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder for (size_t j = 0; j < grid.height(); ++j) { for (e_side side : TOTAL_2D_SIDES) { if (BI_DIRECTIONAL == directionality) { - build_bidir_rr_opins(rr_graph_builder, rr_graph, layer, i, j, side, - opin_to_track_map, Fc_out, rr_edges_to_create, chan_details_x, - chan_details_y, - grid, - directs, num_directs, clb_to_clb_directs, num_seg_types); + build_bidir_rr_opins(rr_graph_builder, rr_graph, layer, i, j, side, opin_to_track_map, Fc_out, + rr_edges_to_create, chan_details_x, chan_details_y, grid, directs, + num_directs, clb_to_clb_directs, num_seg_types); } else { VTR_ASSERT(UNI_DIRECTIONAL == directionality); bool clipped; build_unidir_rr_opins(rr_graph_builder, rr_graph, layer, i, j, side, grid, Fc_out, chan_width, - chan_details_x, chan_details_y, Fc_xofs, Fc_yofs, - rr_edges_to_create, &clipped, seg_index_map, - directs, num_directs, clb_to_clb_directs, num_seg_types, - rr_edges_before_directs); + chan_details_x, chan_details_y, Fc_xofs, Fc_yofs, rr_edges_to_create, + &clipped, seg_index_map, directs, num_directs, clb_to_clb_directs, + num_seg_types, rr_edges_before_directs); if (clipped) { *Fc_clipped = true; } @@ -2269,8 +2098,9 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder } } - VTR_LOGV(route_verbosity > 1,"OPIN->CHANX/CHANY edge count before creating direct connections: %d\n", rr_edges_before_directs); - VTR_LOGV(route_verbosity > 1,"OPIN->CHANX/CHANY edge count after creating direct connections: %d\n", num_edges); + VTR_LOGV(route_verbosity > 1, "OPIN->CHANX/CHANY edge count before creating direct connections: %d\n", + rr_edges_before_directs); + VTR_LOGV(route_verbosity > 1, "OPIN->CHANX/CHANY edge count after creating direct connections: %d\n", num_edges); num_edges = 0; /* Build channels */ @@ -2280,14 +2110,14 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder vtr::NdMatrix num_of_3d_conns_custom_SB; t_rr_edge_info_set des_3d_rr_edges_to_create; - if(grid.get_num_layers() > 1 && sb_conn_map != nullptr){ - num_of_3d_conns_custom_SB.resize(std::array{grid.width(), grid.height()}, 0); + if (grid.get_num_layers() > 1 && sb_conn_map != nullptr) { + num_of_3d_conns_custom_SB.resize(std::array{grid.width(), grid.height()}, 0); } for (size_t i = 0; i < grid.width() - 1; ++i) { for (size_t j = 0; j < grid.height() - 1; ++j) { for (int layer = 0; layer < grid.get_num_layers(); ++layer) { - auto &device_ctx = g_vpr_ctx.device(); + auto& device_ctx = g_vpr_ctx.device(); /* Skip the current die if architecture file specifies that it doesn't require inter-cluster programmable resource routing */ if (!device_ctx.inter_cluster_prog_routing_resources.at(layer)) { continue; @@ -2306,15 +2136,10 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder if (i > 0) { int tracks_per_chan = ((is_global_graph) ? 1 : chan_width.x_list[j]); build_rr_chan(rr_graph_builder, layer, i, j, CHANX, track_to_pin_lookup_x, sb_conn_map, - switch_block_conn, - num_of_3d_conns_custom_SB, CHANX_COST_INDEX_START, - chan_width, grid, tracks_per_chan, - sblock_pattern, Fs / 3, chan_details_x, chan_details_y, - rr_edges_to_create, des_3d_rr_edges_to_create, - wire_to_ipin_switch, - wire_to_pin_between_dice_switch, - custom_3d_sb_fanin_fanout, - delayless_switch, + switch_block_conn, num_of_3d_conns_custom_SB, CHANX_COST_INDEX_START, chan_width, + grid, tracks_per_chan, sblock_pattern, Fs / 3, chan_details_x, chan_details_y, + rr_edges_to_create, des_3d_rr_edges_to_create, wire_to_ipin_switch, + wire_to_pin_between_dice_switch, custom_3d_sb_fanin_fanout, delayless_switch, directionality); //Create the actual CHAN->CHAN edges @@ -2327,16 +2152,11 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder if (j > 0) { int tracks_per_chan = ((is_global_graph) ? 1 : chan_width.y_list[i]); build_rr_chan(rr_graph_builder, layer, i, j, CHANY, track_to_pin_lookup_y, sb_conn_map, - switch_block_conn, - num_of_3d_conns_custom_SB, CHANX_COST_INDEX_START + num_seg_types_x, - chan_width, grid, tracks_per_chan, - sblock_pattern, Fs / 3, chan_details_x, chan_details_y, - rr_edges_to_create, des_3d_rr_edges_to_create, - wire_to_ipin_switch, - wire_to_pin_between_dice_switch, - custom_3d_sb_fanin_fanout, - delayless_switch, - directionality); + switch_block_conn, num_of_3d_conns_custom_SB, + CHANX_COST_INDEX_START + num_seg_types_x, chan_width, grid, tracks_per_chan, + sblock_pattern, Fs / 3, chan_details_x, chan_details_y, rr_edges_to_create, + des_3d_rr_edges_to_create, wire_to_ipin_switch, wire_to_pin_between_dice_switch, + custom_3d_sb_fanin_fanout, delayless_switch, directionality); //Create the actual CHAN->CHAN edges uniquify_edges(rr_edges_to_create); @@ -2349,15 +2169,14 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder } } - if(grid.get_num_layers() > 1 && sb_conn_map != nullptr){ + if (grid.get_num_layers() > 1 && sb_conn_map != nullptr) { uniquify_edges(des_3d_rr_edges_to_create); alloc_and_load_edges(rr_graph_builder, des_3d_rr_edges_to_create); num_edges += des_3d_rr_edges_to_create.size(); des_3d_rr_edges_to_create.clear(); } - - VTR_LOGV(route_verbosity > 1,"CHAN->CHAN type edge count:%d\n", num_edges); + VTR_LOGV(route_verbosity > 1, "CHAN->CHAN type edge count:%d\n", num_edges); num_edges = 0; std::function update_chan_width = [](t_chan_width*) noexcept {}; @@ -2369,9 +2188,7 @@ static std::function alloc_and_load_rr_graph(RRGraphBuilder num_edges += rr_edges_to_create.size(); rr_edges_to_create.clear(); - update_chan_width = [builder](t_chan_width* c) { - builder.update_chan_width(c); - }; + update_chan_width = [builder](t_chan_width* c) { builder.update_chan_width(c); }; VTR_LOG("\n Dedicated clock network edge count: %d \n", num_edges); } @@ -2392,19 +2209,16 @@ static void set_clusters_pin_chains(const ClusteredNetlist& clb_nlist, int abs_cap = block_loc.sub_tile; const auto [physical_type, sub_tile, rel_cap, logical_block] = get_cluster_blk_physical_spec(cluster_blk_id); - auto cluster_pins = get_cluster_block_pins(physical_type, - cluster_blk_id, - abs_cap); + auto cluster_pins = get_cluster_block_pins(physical_type, cluster_blk_id, abs_cap); // Get the chains of nodes - Each chain would collapse into a single node - t_cluster_pin_chain nodes_to_collapse = get_cluster_directly_connected_nodes(cluster_pins, - physical_type, - logical_block, - is_flat); + t_cluster_pin_chain nodes_to_collapse + = get_cluster_directly_connected_nodes(cluster_pins, physical_type, logical_block, is_flat); pin_chains[cluster_blk_id] = std::move(nodes_to_collapse); } } -static vtr::vector> get_pin_chains_flat(const vtr::vector& pin_chains) { +static vtr::vector> get_pin_chains_flat( + const vtr::vector& pin_chains) { vtr::vector> chain_pin_nums(pin_chains.size()); for (int cluster_id_num = 0; cluster_id_num < (int)pin_chains.size(); cluster_id_num++) { @@ -2420,15 +2234,16 @@ static vtr::vector> get_pin_chains_flat( return chain_pin_nums; } -static void alloc_and_load_intra_cluster_rr_graph(RRGraphBuilder& rr_graph_builder, - const DeviceGrid& grid, - const int delayless_switch, - const vtr::vector& pin_chains, - const vtr::vector>& chain_pin_nums, - float R_minW_nmos, - float R_minW_pmos, - bool is_flat, - bool load_rr_graph) { +static void alloc_and_load_intra_cluster_rr_graph( + RRGraphBuilder& rr_graph_builder, + const DeviceGrid& grid, + const int delayless_switch, + const vtr::vector& pin_chains, + const vtr::vector>& chain_pin_nums, + float R_minW_nmos, + float R_minW_pmos, + bool is_flat, + bool load_rr_graph) { t_rr_edge_info_set rr_edges_to_create; int num_edges = 0; @@ -2440,35 +2255,14 @@ static void alloc_and_load_intra_cluster_rr_graph(RRGraphBuilder& rr_graph_build std::vector class_num_vec; std::vector pin_num_vec; class_num_vec = get_cluster_netlist_intra_tile_classes_at_loc(layer, i, j, physical_tile); - pin_num_vec = get_cluster_netlist_intra_tile_pins_at_loc(layer, - i, - j, - pin_chains, - chain_pin_nums, + pin_num_vec = get_cluster_netlist_intra_tile_pins_at_loc(layer, i, j, pin_chains, chain_pin_nums, physical_tile); - add_classes_rr_graph(rr_graph_builder, - class_num_vec, - layer, - i, - j, - physical_tile); - - add_pins_rr_graph(rr_graph_builder, - pin_num_vec, - layer, - i, - j, - physical_tile); - - connect_src_sink_to_pins(rr_graph_builder, - class_num_vec, - layer, - i, - j, - rr_edges_to_create, - delayless_switch, - physical_tile, - load_rr_graph); + add_classes_rr_graph(rr_graph_builder, class_num_vec, layer, i, j, physical_tile); + + add_pins_rr_graph(rr_graph_builder, pin_num_vec, layer, i, j, physical_tile); + + connect_src_sink_to_pins(rr_graph_builder, class_num_vec, layer, i, j, rr_edges_to_create, + delayless_switch, physical_tile, load_rr_graph); //Create the actual SOURCE->OPIN, IPIN->SINK edges uniquify_edges(rr_edges_to_create); @@ -2485,15 +2279,8 @@ static void alloc_and_load_intra_cluster_rr_graph(RRGraphBuilder& rr_graph_build { vtr::ScopedStartFinishTimer timer("Adding Internal Edges"); // Add intra-tile edges - add_intra_cluster_edges_rr_graph(rr_graph_builder, - rr_edges_to_create, - grid, - pin_chains, - R_minW_nmos, - R_minW_pmos, - num_edges, - is_flat, - load_rr_graph); + add_intra_cluster_edges_rr_graph(rr_graph_builder, rr_edges_to_create, grid, pin_chains, R_minW_nmos, + R_minW_pmos, num_edges, is_flat, load_rr_graph); } VTR_LOG("Internal edge count:%d\n", num_edges); @@ -2511,7 +2298,8 @@ static void add_classes_rr_graph(RRGraphBuilder& rr_graph_builder, for (auto class_num : class_num_vec) { auto class_type = get_class_type_from_class_physical_num(physical_type, class_num); - RRNodeId class_inode = get_class_rr_node_id(rr_graph_builder.node_lookup(), physical_type, layer, root_x, root_y, class_num); + RRNodeId class_inode + = get_class_rr_node_id(rr_graph_builder.node_lookup(), physical_type, layer, root_x, root_y, class_num); VTR_ASSERT(class_inode != RRNodeId::INVALID()); int class_num_pins = get_class_num_pins_from_class_physical_num(physical_type, class_num); if (class_type == DRIVER) { @@ -2526,12 +2314,15 @@ static void add_classes_rr_graph(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(class_num_pins <= std::numeric_limits::max()); rr_graph_builder.set_node_capacity(class_inode, (short)class_num_pins); VTR_ASSERT(root_x <= std::numeric_limits::max() && root_y <= std::numeric_limits::max()); - rr_graph_builder.set_node_coordinates(class_inode, (short)root_x, (short)root_y, (short)(root_x + physical_type->width - 1), (short)(root_y + physical_type->height - 1)); + rr_graph_builder.set_node_coordinates(class_inode, (short)root_x, (short)root_y, + (short)(root_x + physical_type->width - 1), + (short)(root_y + physical_type->height - 1)); VTR_ASSERT(layer <= std::numeric_limits::max()); rr_graph_builder.set_node_layer(class_inode, layer); float R = 0.; float C = 0.; - rr_graph_builder.set_node_rc_index(class_inode, NodeRCIndex(find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); + rr_graph_builder.set_node_rc_index(class_inode, + NodeRCIndex(find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); rr_graph_builder.set_node_class_num(class_inode, class_num); } } @@ -2550,19 +2341,15 @@ static void add_pins_rr_graph(RRGraphBuilder& rr_graph_builder, std::vector x_offset_vec; std::vector y_offset_vec; std::vector pin_sides_vec; - std::tie(x_offset_vec, y_offset_vec, pin_sides_vec) = get_pin_coordinates(physical_type, pin_num, std::vector(TOTAL_2D_SIDES.begin(), TOTAL_2D_SIDES.end())); + std::tie(x_offset_vec, y_offset_vec, pin_sides_vec) = get_pin_coordinates( + physical_type, pin_num, std::vector(TOTAL_2D_SIDES.begin(), TOTAL_2D_SIDES.end())); VTR_ASSERT(!pin_sides_vec.empty()); for (int pin_coord = 0; pin_coord < (int)pin_sides_vec.size(); pin_coord++) { int x_offset = x_offset_vec[pin_coord]; int y_offset = y_offset_vec[pin_coord]; e_side pin_side = pin_sides_vec[pin_coord]; auto node_type = (pin_type == DRIVER) ? OPIN : IPIN; - RRNodeId node_id = node_lookup.find_node(layer, - i + x_offset, - j + y_offset, - node_type, - pin_num, - pin_side); + RRNodeId node_id = node_lookup.find_node(layer, i + x_offset, j + y_offset, node_type, pin_num, pin_side); if (node_id != RRNodeId::INVALID()) { if (pin_type == RECEIVER) { rr_graph_builder.set_node_cost_index(node_id, RRIndexedDataId(IPIN_COST_INDEX)); @@ -2575,18 +2362,15 @@ static void add_pins_rr_graph(RRGraphBuilder& rr_graph_builder, rr_graph_builder.set_node_capacity(node_id, 1); float R = 0.; float C = 0.; - rr_graph_builder.set_node_rc_index(node_id, NodeRCIndex(find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); + rr_graph_builder.set_node_rc_index( + node_id, NodeRCIndex(find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); rr_graph_builder.set_node_pin_num(node_id, pin_num); //Note that we store the grid tile location and side where the pin is located, //which greatly simplifies the drawing code //For those pins located on multiple sides, we save the rr node index //for the pin on all sides at which it exists //As such, multipler driver problem can be avoided. - rr_graph_builder.set_node_coordinates(node_id, - i + x_offset, - j + y_offset, - i + x_offset, - j + y_offset); + rr_graph_builder.set_node_coordinates(node_id, i + x_offset, j + y_offset, i + x_offset, j + y_offset); rr_graph_builder.set_node_layer(node_id, layer); rr_graph_builder.add_node_side(node_id, pin_side); } @@ -2606,19 +2390,17 @@ static void connect_tile_src_sink_to_pins(RRGraphBuilder& rr_graph_builder, for (auto class_num : class_num_vec) { const auto& pin_list = get_pin_list_from_class_physical_num(physical_type_ptr, class_num); auto class_type = get_class_type_from_class_physical_num(physical_type_ptr, class_num); - RRNodeId class_rr_node_id = get_class_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, layer, i, j, class_num); + RRNodeId class_rr_node_id + = get_class_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, layer, i, j, class_num); VTR_ASSERT(class_rr_node_id != RRNodeId::INVALID()); //bool is_primitive = is_primitive_pin(physical_type_ptr, pin_list[0]); //t_logical_block_type_ptr logical_block = is_primitive ? get_logical_block_from_pin_physical_num(physical_type_ptr, pin_list[0]) : nullptr; for (auto pin_num : pin_list) { - RRNodeId pin_rr_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, layer, i, j, pin_num); + RRNodeId pin_rr_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, layer, i, j, pin_num); if (pin_rr_node_id == RRNodeId::INVALID()) { - VTR_LOG_ERROR("In block (%d, %d, %d) pin num: %d doesn't exist to be connected to class %d\n", - layer, - i, - j, - pin_num, - class_num); + VTR_LOG_ERROR("In block (%d, %d, %d) pin num: %d doesn't exist to be connected to class %d\n", layer, i, + j, pin_num, class_num); continue; } auto pin_type = get_pin_type_from_pin_physical_num(physical_type_ptr, pin_num); @@ -2646,17 +2428,15 @@ static void connect_src_sink_to_pins(RRGraphBuilder& rr_graph_builder, for (auto class_num : class_num_vec) { const auto& pin_list = get_pin_list_from_class_physical_num(physical_type_ptr, class_num); auto class_type = get_class_type_from_class_physical_num(physical_type_ptr, class_num); - RRNodeId class_rr_node_id = get_class_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, layer, i, j, class_num); + RRNodeId class_rr_node_id + = get_class_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, layer, i, j, class_num); VTR_ASSERT(class_rr_node_id != RRNodeId::INVALID()); for (auto pin_num : pin_list) { - RRNodeId pin_rr_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, layer, i, j, pin_num); + RRNodeId pin_rr_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type_ptr, layer, i, j, pin_num); if (pin_rr_node_id == RRNodeId::INVALID()) { - VTR_LOG_ERROR("In block (%d, %d, %d) pin num: %d doesn't exist to be connected to class %d\n", - layer, - i, - j, - pin_num, - class_num); + VTR_LOG_ERROR("In block (%d, %d, %d) pin num: %d doesn't exist to be connected to class %d\n", layer, i, + j, pin_num, class_num); continue; } auto pin_type = get_pin_type_from_pin_physical_num(physical_type_ptr, pin_num); @@ -2687,40 +2467,18 @@ static void alloc_and_load_tile_rr_graph(RRGraphBuilder& rr_graph_builder, std::vector class_num_vec(class_num_range.total_num()); std::iota(class_num_vec.begin(), class_num_vec.end(), class_num_range.low); - add_classes_rr_graph(rr_graph_builder, - class_num_vec, - layer, - root_x, - root_y, - physical_tile); - - add_pins_rr_graph(rr_graph_builder, - pin_num_vec, - layer, - root_x, - root_y, - physical_tile); - - connect_tile_src_sink_to_pins(rr_graph_builder, - arch_sw_inf_map, - class_num_vec, - layer, - root_x, - root_y, - rr_edges_to_create, - delayless_switch, - physical_tile); + add_classes_rr_graph(rr_graph_builder, class_num_vec, layer, root_x, root_y, physical_tile); + + add_pins_rr_graph(rr_graph_builder, pin_num_vec, layer, root_x, root_y, physical_tile); + + connect_tile_src_sink_to_pins(rr_graph_builder, arch_sw_inf_map, class_num_vec, layer, root_x, root_y, + rr_edges_to_create, delayless_switch, physical_tile); uniquify_edges(rr_edges_to_create); alloc_and_load_edges(rr_graph_builder, rr_edges_to_create); rr_edges_to_create.clear(); - add_intra_tile_edges_rr_graph(rr_graph_builder, - rr_edges_to_create, - physical_tile, - layer, - root_x, - root_y); + add_intra_tile_edges_rr_graph(rr_graph_builder, rr_edges_to_create, physical_tile, layer, root_x, root_y); uniquify_edges(rr_edges_to_create); alloc_and_load_edges(rr_graph_builder, rr_edges_to_create); @@ -2748,9 +2506,7 @@ static void build_bidir_rr_opins(RRGraphBuilder& rr_graph_builder, const t_clb_to_clb_directs* clb_to_clb_directs, const int num_seg_types) { //Don't connect pins which are not adjacent to channels around the perimeter - if ((i == 0 && side != RIGHT) - || (i == int(grid.width() - 1) && side != LEFT) - || (j == 0 && side != TOP) + if ((i == 0 && side != RIGHT) || (i == int(grid.width() - 1) && side != LEFT) || (j == 0 && side != TOP) || (j == int(grid.height() - 1) && side != BOTTOM)) { return; } @@ -2783,17 +2539,14 @@ static void build_bidir_rr_opins(RRGraphBuilder& rr_graph_builder, for (auto connected_layer : get_layers_pin_is_connected_to(type, layer, pin_index)) { if (total_pin_Fc > 0) { - get_bidir_opin_connections(rr_graph_builder, layer, connected_layer, i, j, pin_index, - node_index, rr_edges_to_create, opin_to_track_map, - chan_details_x, - chan_details_y); + get_bidir_opin_connections(rr_graph_builder, layer, connected_layer, i, j, pin_index, node_index, + rr_edges_to_create, opin_to_track_map, chan_details_x, chan_details_y); } } /* Add in direct connections */ - get_opin_direct_connections(rr_graph_builder, rr_graph, layer, i, j, side, pin_index, - node_index, rr_edges_to_create, - directs, num_directs, clb_to_clb_directs); + get_opin_direct_connections(rr_graph_builder, rr_graph, layer, i, j, side, pin_index, node_index, + rr_edges_to_create, directs, num_directs, clb_to_clb_directs); } } @@ -2851,9 +2604,7 @@ static void build_cluster_internal_edges(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(abs_cap < physical_type->capacity); VTR_ASSERT(rel_cap >= 0); - auto cluster_pins = get_cluster_block_pins(physical_type, - cluster_blk_id, - abs_cap); + auto cluster_pins = get_cluster_block_pins(physical_type, cluster_blk_id, abs_cap); const t_pb* pb = cluster_net_list.block_pb(cluster_blk_id); std::list pb_q; @@ -2863,38 +2614,17 @@ static void build_cluster_internal_edges(RRGraphBuilder& rr_graph_builder, pb = pb_q.front(); pb_q.pop_front(); - add_pb_edges(rr_graph_builder, - rr_edges_to_create, - physical_type, - sub_tile, - logical_block, - pb, - nodes_to_collapse, - R_minW_nmos, - R_minW_pmos, - rel_cap, - layer, - i, - j, - load_rr_graph); + add_pb_edges(rr_graph_builder, rr_edges_to_create, physical_type, sub_tile, logical_block, pb, + nodes_to_collapse, R_minW_nmos, R_minW_pmos, rel_cap, layer, i, j, load_rr_graph); add_pb_child_to_list(pb_q, pb); } // Edges going in/out of the nodes on the chain are not added by the previous funtions, they are added // by this function - num_collapsed_nodes += add_edges_for_collapsed_nodes(rr_graph_builder, - rr_edges_to_create, - physical_type, - logical_block, - cluster_pins, - nodes_to_collapse, - R_minW_nmos, - R_minW_pmos, - layer, - i, - j, - load_rr_graph); + num_collapsed_nodes += add_edges_for_collapsed_nodes(rr_graph_builder, rr_edges_to_create, physical_type, + logical_block, cluster_pins, nodes_to_collapse, R_minW_nmos, + R_minW_pmos, layer, i, j, load_rr_graph); } static void add_pb_edges(RRGraphBuilder& rr_graph_builder, @@ -2911,11 +2641,7 @@ static void add_pb_edges(RRGraphBuilder& rr_graph_builder, int i, int j, bool switches_remapped) { - auto pin_num_range = get_pb_pins(physical_type, - sub_tile, - logical_block, - pb, - rel_cap); + auto pin_num_range = get_pb_pins(physical_type, sub_tile, logical_block, pb, rel_cap); const auto& chain_sinks = nodes_to_collapse.chain_sink; const auto& pin_chain_idx = nodes_to_collapse.pin_chain_idx; for (auto pin_physical_num = pin_num_range.low; pin_physical_num <= pin_num_range.high; pin_physical_num++) { @@ -2928,52 +2654,36 @@ static void add_pb_edges(RRGraphBuilder& rr_graph_builder, if (chain_num != OPEN && chain_sinks[chain_num] != pin_physical_num && !primitive_pin && !pin_on_tile) { continue; } - auto parent_pin_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), - physical_type, - layer, - i, - j, - pin_physical_num); + auto parent_pin_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type, layer, i, j, pin_physical_num); VTR_ASSERT(parent_pin_node_id != RRNodeId::INVALID()); - auto conn_pins_physical_num = get_physical_pin_sink_pins(physical_type, - logical_block, - pin_physical_num); + auto conn_pins_physical_num = get_physical_pin_sink_pins(physical_type, logical_block, pin_physical_num); for (auto conn_pin_physical_num : conn_pins_physical_num) { // The pin belongs to a chain - incoming edges to this pin will be added later unless it is the sink of the chain int conn_pin_chain_num = pin_chain_idx[conn_pin_physical_num]; primitive_pin = is_primitive_pin(physical_type, conn_pin_physical_num); pin_on_tile = is_pin_on_tile(physical_type, conn_pin_physical_num); - if (conn_pin_chain_num != OPEN && chain_sinks[conn_pin_chain_num] != conn_pin_physical_num && !primitive_pin && !pin_on_tile) { + if (conn_pin_chain_num != OPEN && chain_sinks[conn_pin_chain_num] != conn_pin_physical_num && !primitive_pin + && !pin_on_tile) { continue; } - auto conn_pin_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), - physical_type, - layer, - i, - j, - conn_pin_physical_num); + auto conn_pin_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type, layer, i, j, conn_pin_physical_num); // If the node_id is INVALID it means that it belongs to a pin which is not added to the RR Graph. The pin is not added // since it belongs to a certain mode or block which is not used in clustered netlist if (conn_pin_node_id == RRNodeId::INVALID()) { continue; } - int sw_idx = get_edge_sw_arch_idx(physical_type, - logical_block, - pin_physical_num, - conn_pin_physical_num); + int sw_idx = get_edge_sw_arch_idx(physical_type, logical_block, pin_physical_num, conn_pin_physical_num); if (switches_remapped) { auto& all_sw_inf = g_vpr_ctx.mutable_device().all_sw_inf; float delay = g_vpr_ctx.device().all_sw_inf.at(sw_idx).Tdel(); bool is_new_sw; - std::tie(is_new_sw, sw_idx) = find_create_intra_cluster_sw(rr_graph_builder, - all_sw_inf, - R_minW_nmos, - R_minW_pmos, - switches_remapped, - delay); + std::tie(is_new_sw, sw_idx) = find_create_intra_cluster_sw(rr_graph_builder, all_sw_inf, R_minW_nmos, + R_minW_pmos, switches_remapped, delay); } rr_edges_to_create.emplace_back(parent_pin_node_id, conn_pin_node_id, sw_idx, switches_remapped); } @@ -3004,22 +2714,9 @@ static int add_edges_for_collapsed_nodes(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(num_nodes > 1); std::unordered_set chain_pins = get_chain_pins(nodes_to_collapse.chains[chain_idx]); for (int node_idx = 0; node_idx < num_nodes; node_idx++) { - add_chain_node_fan_in_edges(rr_graph_builder, - rr_edges_to_create, - num_collapsed_pins, - physical_type, - logical_block, - nodes_to_collapse, - cluster_pins_set, - chain_pins, - R_minW_nmos, - R_minW_pmos, - chain_idx, - node_idx, - layer, - i, - j, - load_rr_graph); + add_chain_node_fan_in_edges(rr_graph_builder, rr_edges_to_create, num_collapsed_pins, physical_type, + logical_block, nodes_to_collapse, cluster_pins_set, chain_pins, R_minW_nmos, + R_minW_pmos, chain_idx, node_idx, layer, i, j, load_rr_graph); } } return num_collapsed_pins; @@ -3057,12 +2754,8 @@ static void add_chain_node_fan_in_edges(RRGraphBuilder& rr_graph_builder, std::unordered_map src_node_edge_pair; // Get the chain's sink node rr node it. - RRNodeId sink_rr_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), - physical_type, - layer, - i, - j, - sink_pin_num); + RRNodeId sink_rr_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type, layer, i, j, sink_pin_num); VTR_ASSERT(sink_rr_node_id != RRNodeId::INVALID()); // None of the incoming/outgoing edges of the chain node, except for the chain sink pins, has been added in the previous functions. @@ -3083,27 +2776,17 @@ static void add_chain_node_fan_in_edges(RRGraphBuilder& rr_graph_builder, return; } - float chain_delay = get_delay_directly_connected_pins(physical_type, - logical_block, - cluster_pins, - pin_physical_num, - sink_pin_num); - RRNodeId rr_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), - physical_type, - layer, - i, - j, - pin_physical_num); + float chain_delay = get_delay_directly_connected_pins(physical_type, logical_block, cluster_pins, + pin_physical_num, sink_pin_num); + RRNodeId rr_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type, layer, i, j, pin_physical_num); VTR_ASSERT(rr_node_id != RRNodeId::INVALID()); src_node_edge_pair.insert(std::make_pair(rr_node_id, chain_delay)); } else { num_collapsed_pins++; - auto src_pins = get_src_pins_in_cluster(cluster_pins, - physical_type, - logical_block, - pin_physical_num); + auto src_pins = get_src_pins_in_cluster(cluster_pins, physical_type, logical_block, pin_physical_num); for (auto src_pin : src_pins) { // If the source pin is located on the current chain no edge should be added since the nodes should be collapsed. if (pin_chain_idx[src_pin] != OPEN) { @@ -3114,18 +2797,10 @@ static void add_chain_node_fan_in_edges(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(src_pin == nodes_to_collapse.chain_sink[pin_chain_idx[src_pin]]); } } - float delay = get_min_delay_to_chain(physical_type, - logical_block, - cluster_pins, - chain_pins, - src_pin, + float delay = get_min_delay_to_chain(physical_type, logical_block, cluster_pins, chain_pins, src_pin, sink_pin_num); - RRNodeId rr_node_id = get_pin_rr_node_id(rr_graph_builder.node_lookup(), - physical_type, - layer, - i, - j, - src_pin); + RRNodeId rr_node_id + = get_pin_rr_node_id(rr_graph_builder.node_lookup(), physical_type, layer, i, j, src_pin); VTR_ASSERT(rr_node_id != RRNodeId::INVALID()); src_node_edge_pair.insert(std::make_pair(rr_node_id, delay)); @@ -3137,12 +2812,8 @@ static void add_chain_node_fan_in_edges(RRGraphBuilder& rr_graph_builder, bool is_rr_sw_id = load_rr_graph; bool is_new_sw; int sw_id; - std::tie(is_new_sw, sw_id) = find_create_intra_cluster_sw(rr_graph_builder, - all_sw_inf, - R_minW_nmos, - R_minW_pmos, - is_rr_sw_id, - delay); + std::tie(is_new_sw, sw_id) = find_create_intra_cluster_sw(rr_graph_builder, all_sw_inf, R_minW_nmos, + R_minW_pmos, is_rr_sw_id, delay); rr_edges_to_create.emplace_back(src_pair.first, sink_rr_node_id, sw_id, is_rr_sw_id); } @@ -3157,10 +2828,7 @@ static float get_min_delay_to_chain(t_physical_tile_type_ptr physical_type, int chain_sink_pin) { VTR_ASSERT(std::find(chain_pins.begin(), chain_pins.end(), pin_physical_num) == chain_pins.end()); float min_delay = std::numeric_limits::max(); - auto sink_pins = get_sink_pins_in_cluster(cluster_pins, - physical_type, - logical_block, - pin_physical_num); + auto sink_pins = get_sink_pins_in_cluster(cluster_pins, physical_type, logical_block, pin_physical_num); bool sink_pin_found = false; for (auto sink_pin : sink_pins) { // If the sink is not on the chain, then we do not need to consider it. @@ -3169,7 +2837,9 @@ static float get_min_delay_to_chain(t_physical_tile_type_ptr physical_type, } sink_pin_found = true; // Delay to the sink is equal to the delay to chain + chain's delay - float delay = get_delay_directly_connected_pins(physical_type, logical_block, cluster_pins, sink_pin, chain_sink_pin) + get_edge_delay(physical_type, logical_block, pin_physical_num, sink_pin); + float delay + = get_delay_directly_connected_pins(physical_type, logical_block, cluster_pins, sink_pin, chain_sink_pin) + + get_edge_delay(physical_type, logical_block, pin_physical_num, sink_pin); if (delay < min_delay) { min_delay = delay; } @@ -3275,8 +2945,8 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, /* Add the edges from this track to all it's connected pins into the list */ get_track_to_pins(rr_graph_builder, layer, start, chan_coord, track, tracks_per_chan, node, rr_edges_to_create, - track_to_pin_lookup, seg_details, chan_type, seg_dimension, - wire_to_ipin_switch, wire_to_pin_between_dice_switch, directionality); + track_to_pin_lookup, seg_details, chan_type, seg_dimension, wire_to_ipin_switch, + wire_to_pin_between_dice_switch, directionality); /* get edges going from the current track into channel segments which are perpendicular to it */ if (chan_coord > 0) { @@ -3292,11 +2962,11 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, } if (to_seg_details->length() > 0) { get_track_to_tracks(rr_graph_builder, layer, chan_coord, start, track, chan_type, chan_coord, - opposite_chan_type, seg_dimension, max_opposite_chan_width, grid, - Fs_per_side, sblock_pattern, num_of_3d_conns_custom_SB, node, rr_edges_to_create, + opposite_chan_type, seg_dimension, max_opposite_chan_width, grid, Fs_per_side, + sblock_pattern, num_of_3d_conns_custom_SB, node, rr_edges_to_create, des_3d_rr_edges_to_create, from_seg_details, to_seg_details, opposite_chan_details, - directionality,custom_3d_sb_fanin_fanout,delayless_switch, - switch_block_conn, sb_conn_map); + directionality, custom_3d_sb_fanin_fanout, delayless_switch, switch_block_conn, + sb_conn_map); } } if (chan_coord < chan_dimension) { @@ -3312,10 +2982,11 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, } if (to_seg_details->length() > 0) { get_track_to_tracks(rr_graph_builder, layer, chan_coord, start, track, chan_type, chan_coord + 1, - opposite_chan_type, seg_dimension, max_opposite_chan_width, grid, - Fs_per_side, sblock_pattern, num_of_3d_conns_custom_SB, node, rr_edges_to_create, + opposite_chan_type, seg_dimension, max_opposite_chan_width, grid, Fs_per_side, + sblock_pattern, num_of_3d_conns_custom_SB, node, rr_edges_to_create, des_3d_rr_edges_to_create, from_seg_details, to_seg_details, opposite_chan_details, - directionality,custom_3d_sb_fanin_fanout, delayless_switch, switch_block_conn, sb_conn_map); + directionality, custom_3d_sb_fanin_fanout, delayless_switch, switch_block_conn, + sb_conn_map); } } @@ -3344,11 +3015,10 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, } if (to_seg_details->length() > 0) { get_track_to_tracks(rr_graph_builder, layer, chan_coord, start, track, chan_type, target_seg, - chan_type, seg_dimension, max_chan_width, grid, - Fs_per_side, sblock_pattern, num_of_3d_conns_custom_SB, node, rr_edges_to_create, - des_3d_rr_edges_to_create, from_seg_details, to_seg_details, from_chan_details, - directionality,custom_3d_sb_fanin_fanout, delayless_switch, - switch_block_conn, sb_conn_map); + chan_type, seg_dimension, max_chan_width, grid, Fs_per_side, sblock_pattern, + num_of_3d_conns_custom_SB, node, rr_edges_to_create, des_3d_rr_edges_to_create, + from_seg_details, to_seg_details, from_chan_details, directionality, + custom_3d_sb_fanin_fanout, delayless_switch, switch_block_conn, sb_conn_map); } } } @@ -3374,7 +3044,8 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder, int length = end - start + 1; float R = length * seg_details[track].Rmetal(); float C = length * seg_details[track].Cmetal(); - rr_graph_builder.set_node_rc_index(node, NodeRCIndex(find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); + rr_graph_builder.set_node_rc_index(node, + NodeRCIndex(find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); rr_graph_builder.set_node_type(node, chan_type); rr_graph_builder.set_node_track_num(node, track); @@ -3412,13 +3083,13 @@ static void build_inter_die_custom_sb_rr_chan(RRGraphBuilder& rr_graph_builder, if (node) { rr_graph_builder.set_node_layer(node, layer); rr_graph_builder.set_node_coordinates(node, x_coord, y_coord, x_coord, y_coord); - rr_graph_builder.set_node_cost_index(node, RRIndexedDataId( - const_index_offset + seg_details[start_track - 1].index())); + rr_graph_builder.set_node_cost_index( + node, RRIndexedDataId(const_index_offset + seg_details[start_track - 1].index())); rr_graph_builder.set_node_capacity(node, 1); /* GLOBAL routing handled elsewhere */ float R = 0; float C = 0; - rr_graph_builder.set_node_rc_index(node, NodeRCIndex( - find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); + rr_graph_builder.set_node_rc_index( + node, NodeRCIndex(find_create_rr_rc_data(R, C, mutable_device_ctx.rr_rc_data))); rr_graph_builder.set_node_type(node, CHANX); rr_graph_builder.set_node_track_num(node, start_track + offset); @@ -3433,7 +3104,8 @@ static void build_inter_die_custom_sb_rr_chan(RRGraphBuilder& rr_graph_builder, void uniquify_edges(t_rr_edge_info_set& rr_edges_to_create) { std::stable_sort(rr_edges_to_create.begin(), rr_edges_to_create.end()); - rr_edges_to_create.erase(std::unique(rr_edges_to_create.begin(), rr_edges_to_create.end()), rr_edges_to_create.end()); + rr_edges_to_create.erase(std::unique(rr_edges_to_create.begin(), rr_edges_to_create.end()), + rr_edges_to_create.end()); } void alloc_and_load_edges(RRGraphBuilder& rr_graph_builder, const t_rr_edge_info_set& rr_edges_to_create) { @@ -3442,21 +3114,22 @@ void alloc_and_load_edges(RRGraphBuilder& rr_graph_builder, const t_rr_edge_info /* allocate pin to track map for each segment type individually and then combine into a single * vector */ -static vtr::NdMatrix, 5> alloc_and_load_pin_to_track_map(const e_pin_type pin_type, - const vtr::Matrix& Fc, - const t_physical_tile_type_ptr tile_type, - const std::set type_layer, - const std::vector& perturb_switch_pattern, - const e_directionality directionality, - const std::vector& seg_inf, - const int* sets_per_seg_type) { +static vtr::NdMatrix, 5> alloc_and_load_pin_to_track_map( + const e_pin_type pin_type, + const vtr::Matrix& Fc, + const t_physical_tile_type_ptr tile_type, + const std::set type_layer, + const std::vector& perturb_switch_pattern, + const e_directionality directionality, + const std::vector& seg_inf, + const int* sets_per_seg_type) { /* allocate 'result' matrix and initialize entries to OPEN. also allocate and intialize matrix which will be * used to index into the correct entries when loading up 'result' */ auto& grid = g_vpr_ctx.device().grid; auto result = vtr::NdMatrix, 5>({ - size_t(tile_type->num_pins), //[0..num_pins-1] - size_t(tile_type->width), //[0..width-1] - size_t(tile_type->height), //[0..height-1] + size_t(tile_type->num_pins), //[0..num_pins-1] + size_t(tile_type->width), //[0..width-1] + size_t(tile_type->height), //[0..height-1] size_t(grid.get_num_layers()), //[0..layer-1] 4, //[0..sides-1] }); @@ -3483,7 +3156,9 @@ static vtr::NdMatrix, 5> alloc_and_load_pin_to_track_map(const } /* get pin connections to tracks of the current segment type */ - auto pin_to_seg_type_map = alloc_and_load_pin_to_seg_type(pin_type, Fc, num_seg_type_tracks, seg_inf[iseg].seg_index, max_Fc, tile_type, type_layer, perturb_switch_pattern[seg_inf[iseg].seg_index], directionality); + auto pin_to_seg_type_map = alloc_and_load_pin_to_seg_type( + pin_type, Fc, num_seg_type_tracks, seg_inf[iseg].seg_index, max_Fc, tile_type, type_layer, + perturb_switch_pattern[seg_inf[iseg].seg_index], directionality); /* connections in pin_to_seg_type_map are within that seg type -- i.e. in the [0,num_seg_type_tracks-1] range. * now load up 'result' array with these connections, but offset them so they are relative to the channel @@ -3495,8 +3170,10 @@ static vtr::NdMatrix, 5> alloc_and_load_pin_to_track_map(const for (int iheight = 0; iheight < tile_type->height; iheight++) { for (int iside = 0; iside < 4; iside++) { for (int iconn = 0; iconn < cur_Fc; iconn++) { - for (auto connected_layer : get_layers_pin_is_connected_to(tile_type, type_layer_index, ipin)) { - int relative_track_ind = pin_to_seg_type_map[ipin][iwidth][iheight][connected_layer][iside][iconn]; + for (auto connected_layer : + get_layers_pin_is_connected_to(tile_type, type_layer_index, ipin)) { + int relative_track_ind + = pin_to_seg_type_map[ipin][iwidth][iheight][connected_layer][iside][iconn]; if (relative_track_ind != OPEN) { VTR_ASSERT(relative_track_ind <= num_seg_type_tracks); int absolute_track_ind = relative_track_ind + seg_type_start_track; @@ -3545,50 +3222,54 @@ static vtr::NdMatrix alloc_and_load_pin_to_seg_type(const e_pin_type pin return vtr::NdMatrix(); } - auto tracks_connected_to_pin = vtr::NdMatrix({ - size_t(tile_type->num_pins), //[0..num_pins-1] - size_t(tile_type->width), //[0..width-1] - size_t(tile_type->height), //[0..height-1] - size_t(grid.get_num_layers()), //[0..layer-1] - NUM_2D_SIDES, //[0..NUM_2D_SIDES-1] - size_t(max_Fc) //[0..Fc-1] - }, - OPEN); //Unconnected + auto tracks_connected_to_pin = vtr::NdMatrix( + { + size_t(tile_type->num_pins), //[0..num_pins-1] + size_t(tile_type->width), //[0..width-1] + size_t(tile_type->height), //[0..height-1] + size_t(grid.get_num_layers()), //[0..layer-1] + NUM_2D_SIDES, //[0..NUM_2D_SIDES-1] + size_t(max_Fc) //[0..Fc-1] + }, + OPEN); //Unconnected //Number of *physical* pins on each side. //Note that his may be more than the logical number of pins (i.e. //Type->num_pins) if a logical pin has multiple specified physical //pinlocations (i.e. appears on multiple sides of the block) - auto num_dir = vtr::NdMatrix({ - size_t(tile_type->width), //[0..width-1] - size_t(tile_type->height), //[0..height-1] - size_t(grid.get_num_layers()), //[0..layer-1] - NUM_2D_SIDES //[0..NUM_2D_SIDES-1] - }, - 0); + auto num_dir = vtr::NdMatrix( + { + size_t(tile_type->width), //[0..width-1] + size_t(tile_type->height), //[0..height-1] + size_t(grid.get_num_layers()), //[0..layer-1] + NUM_2D_SIDES //[0..NUM_2D_SIDES-1] + }, + 0); //List of *physical* pins of the correct type on each side of the current //block type. For a specific width/height/side the valid enteries in the //last dimension are [0 .. num_dir[width][height][side]-1] // //Max possible space alloced for simplicity - auto dir_list = vtr::NdMatrix({ - size_t(tile_type->width), //[0..width-1] - size_t(tile_type->height), //[0..height-1] - size_t(grid.get_num_layers()), //[0..layer-1] - NUM_2D_SIDES, //[0..NUM_2D_SIDES-1] - size_t(tile_type->num_pins) * size_t(grid.get_num_layers()) //[0..num_pins * num_layers-1] - }, - -1); //Defensive coding: Initialize to invalid + auto dir_list = vtr::NdMatrix( + { + size_t(tile_type->width), //[0..width-1] + size_t(tile_type->height), //[0..height-1] + size_t(grid.get_num_layers()), //[0..layer-1] + NUM_2D_SIDES, //[0..NUM_2D_SIDES-1] + size_t(tile_type->num_pins) * size_t(grid.get_num_layers()) //[0..num_pins * num_layers-1] + }, + -1); //Defensive coding: Initialize to invalid //Number of currently assigned physical pins - auto num_done_per_dir = vtr::NdMatrix({ - size_t(tile_type->width), //[0..width-1] - size_t(tile_type->height), //[0..height-1] - size_t(grid.get_num_layers()), //[0..layer-1] - NUM_2D_SIDES //[0..NUM_2D_SIDES-1] - }, - 0); + auto num_done_per_dir = vtr::NdMatrix( + { + size_t(tile_type->width), //[0..width-1] + size_t(tile_type->height), //[0..height-1] + size_t(grid.get_num_layers()), //[0..layer-1] + NUM_2D_SIDES //[0..NUM_2D_SIDES-1] + }, + 0); //Record the physical pin locations and counts per side/offsets combination for (int pin = 0; pin < tile_type->num_pins; ++pin) { @@ -3605,8 +3286,11 @@ static vtr::NdMatrix alloc_and_load_pin_to_seg_type(const e_pin_type pin for (int height = 0; height < tile_type->height; ++height) { for (e_side side : TOTAL_2D_SIDES) { if (tile_type->pinloc[width][height][side][pin] == 1) { - for (auto i = 0; i < (int)get_layers_connected_to_pin(tile_type, type_layer_index, pin).size(); i++) { - dir_list[width][height][type_layer_index][side][num_dir[width][height][type_layer_index][side]] = pin; + for (auto i = 0; + i < (int)get_layers_connected_to_pin(tile_type, type_layer_index, pin).size(); i++) { + dir_list[width][height][type_layer_index][side] + [num_dir[width][height][type_layer_index][side]] + = pin; num_dir[width][height][type_layer_index][side]++; } } @@ -3662,7 +3346,8 @@ static vtr::NdMatrix alloc_and_load_pin_to_seg_type(const e_pin_type pin advance_to_next_block_side(tile_type, width, height, side); - VTR_ASSERT_MSG(pin_index < num_phys_pins_per_layer[layer_index], "Physical block pins bound number of logical block pins"); + VTR_ASSERT_MSG(pin_index < num_phys_pins_per_layer[layer_index], + "Physical block pins bound number of logical block pins"); if (num_done_per_dir[width][height][layer_index][side] >= num_dir[width][height][layer_index][side]) { continue; @@ -3689,24 +3374,24 @@ static vtr::NdMatrix alloc_and_load_pin_to_seg_type(const e_pin_type pin } if (perturb_switch_pattern) { - load_perturbed_connection_block_pattern(tracks_connected_to_pin, - pin_ordering, - num_seg_type_tracks, num_seg_type_tracks, Fc, seg_index, directionality); + load_perturbed_connection_block_pattern(tracks_connected_to_pin, pin_ordering, num_seg_type_tracks, + num_seg_type_tracks, Fc, seg_index, directionality); } else { - load_uniform_connection_block_pattern(tracks_connected_to_pin, - pin_ordering, Fc, seg_index, - num_seg_type_tracks, num_seg_type_tracks, directionality); + load_uniform_connection_block_pattern(tracks_connected_to_pin, pin_ordering, Fc, seg_index, num_seg_type_tracks, + num_seg_type_tracks, directionality); } #ifdef ENABLE_CHECK_ALL_TRACKS - check_all_tracks_reach_pins(tile_type, tracks_connected_to_pin, num_seg_type_tracks, - Fc, pin_type); + check_all_tracks_reach_pins(tile_type, tracks_connected_to_pin, num_seg_type_tracks, Fc, pin_type); #endif return tracks_connected_to_pin; } -static void advance_to_next_block_side(t_physical_tile_type_ptr tile_type, int& width_offset, int& height_offset, e_side& side) { +static void advance_to_next_block_side(t_physical_tile_type_ptr tile_type, + int& width_offset, + int& height_offset, + e_side& side) { //State-machine transitions for advancing around all sides of a block //This state-machine transitions in the following order: @@ -3978,7 +3663,8 @@ static void load_uniform_connection_block_pattern(vtr::NdMatrix& tracks_ int num_total_tracks = 0; for (int j2 = 0; j2 < (pin_fc / group_size); ++j2) { - ftrack = pattern_fmod((i + offset + offset_increment) * step_size, fc_step) + (j2 * fc_step); + ftrack + = pattern_fmod((i + offset + offset_increment) * step_size, fc_step) + (j2 * fc_step); itrack = ((int)ftrack) * group_size; for (int k = 0; k < group_size; ++k) { @@ -4029,7 +3715,8 @@ static void load_uniform_connection_block_pattern(vtr::NdMatrix& tracks_ /* Assign the group of tracks for the Fc pattern */ for (int k = 0; k < group_size; ++k) { - tracks_connected_to_pin[pin][width][height][layer][side][group_size * j + k] = (itrack + k) % max_chan_width; + tracks_connected_to_pin[pin][width][height][layer][side][group_size * j + k] + = (itrack + k) % max_chan_width; excess_tracks_selected[side][width][height][(itrack + k) % max_chan_width]++; } } @@ -4078,7 +3765,7 @@ static void load_perturbed_connection_block_pattern(vtr::NdMatrix& track int layer = pin_locations[i].layer_offset; int pin_Fc = Fc[pin][seg_index]; - int Fc_dense = ( pin_Fc / 2) + 1; + int Fc_dense = (pin_Fc / 2) + 1; int Fc_sparse = pin_Fc - Fc_dense; int Fc_half[2]; @@ -4143,8 +3830,8 @@ static void check_all_tracks_reach_pins(t_logical_block_type_ptr type, for (int track = 0; track < max_chan_width; ++track) { if (num_conns_to_track[track] <= 0) { - VTR_LOG_ERROR("check_all_tracks_reach_pins: Track %d does not connect to any CLB %ss.\n", - track, (ipin_or_opin == DRIVER ? "OPIN" : "IPIN")); + VTR_LOG_ERROR("check_all_tracks_reach_pins: Track %d does not connect to any CLB %ss.\n", track, + (ipin_or_opin == DRIVER ? "OPIN" : "IPIN")); } } } @@ -4153,15 +3840,16 @@ static void check_all_tracks_reach_pins(t_logical_block_type_ptr type, /* Allocates and loads the track to ipin lookup for each physical grid type. This * is the same information as the ipin_to_track map but accessed in a different way. */ -static vtr::NdMatrix, 5> alloc_and_load_track_to_pin_lookup(vtr::NdMatrix, 5> pin_to_track_map, - const vtr::Matrix& Fc, - const t_physical_tile_type_ptr tile_type, - const std::set type_layer, - const int type_width, - const int type_height, - const int num_pins, - const int max_chan_width, - const std::vector& seg_inf) { +static vtr::NdMatrix, 5> alloc_and_load_track_to_pin_lookup( + vtr::NdMatrix, 5> pin_to_track_map, + const vtr::Matrix& Fc, + const t_physical_tile_type_ptr tile_type, + const std::set type_layer, + const int type_width, + const int type_height, + const int num_pins, + const int max_chan_width, + const std::vector& seg_inf) { /* [0..max_chan_width-1][0..width][0..height][0..layer-1][0..3]. For each track number * it stores a vector for each of the four sides. x-directed channels will * use the TOP and BOTTOM vectors to figure out what clb input pins they @@ -4181,7 +3869,8 @@ static vtr::NdMatrix, 5> alloc_and_load_track_to_pin_lookup(vtr const int num_seg_types = seg_inf.size(); auto& grid = g_vpr_ctx.device().grid; /* Alloc and zero the the lookup table */ - auto track_to_pin_lookup = vtr::NdMatrix, 5>({size_t(max_chan_width), size_t(type_width), size_t(type_height), size_t(grid.get_num_layers()), 4}); + auto track_to_pin_lookup = vtr::NdMatrix, 5>( + {size_t(max_chan_width), size_t(type_width), size_t(type_height), size_t(grid.get_num_layers()), 4}); /* Count number of pins to which each track connects */ for (auto type_layer_index : type_layer) { @@ -4192,12 +3881,16 @@ static vtr::NdMatrix, 5> alloc_and_load_track_to_pin_lookup(vtr /* get number of tracks to which this pin connects */ int num_tracks = 0; for (int iseg = 0; iseg < num_seg_types; iseg++) { - num_tracks += Fc[pin][seg_inf[iseg].seg_index]; // AA: Fc_in and Fc_out matrices are unified for all segments so need to map index. + num_tracks += Fc + [pin] + [seg_inf[iseg] + .seg_index]; // AA: Fc_in and Fc_out matrices are unified for all segments so need to map index. } for (auto connected_layer : get_layers_pin_is_connected_to(tile_type, type_layer_index, pin)) { if (!pin_to_track_map[pin][width][height][connected_layer][side].empty()) { - num_tracks = std::min(num_tracks, - (int)pin_to_track_map[pin][width][height][connected_layer][side].size()); + num_tracks + = std::min(num_tracks, + (int)pin_to_track_map[pin][width][height][connected_layer][side].size()); for (int conn = 0; conn < num_tracks; ++conn) { int track = pin_to_track_map[pin][width][height][connected_layer][side][conn]; VTR_ASSERT(track < max_chan_width); @@ -4272,7 +3965,8 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, } RRNodeId opin_node_index = rr_graph_builder.node_lookup().find_node(layer, i, j, OPIN, pin_index, side); - if (!opin_node_index) continue; //No valid from node + if (!opin_node_index) + continue; //No valid from node for (int iseg = 0; iseg < num_seg_types; iseg++) { /* get Fc for this segment type */ @@ -4321,7 +4015,8 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, continue; } - const t_chan_seg_details* seg_details = (chan_type == CHANX ? chan_details_x[seg][chan] : chan_details_y[chan][seg]).data(); + const t_chan_seg_details* seg_details + = (chan_type == CHANX ? chan_details_x[seg][chan] : chan_details_y[chan][seg]).data(); if (seg_details[0].length() == 0) continue; @@ -4331,12 +4026,9 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, for (auto connected_layer : get_layers_pin_is_connected_to(type, layer, pin_index)) { /* Check the pin physical layer and connect it to the same layer if necessary */ - rr_edge_count += get_unidir_opin_connections(rr_graph_builder, layer, connected_layer, chan, seg, - seg_type_Fc, seg_index, chan_type, seg_details, - opin_node_index, - rr_edges_to_create, - Fc_ofs, max_len, nodes_per_chan, - &clipped); + rr_edge_count += get_unidir_opin_connections( + rr_graph_builder, layer, connected_layer, chan, seg, seg_type_Fc, seg_index, chan_type, seg_details, + opin_node_index, rr_edges_to_create, Fc_ofs, max_len, nodes_per_chan, &clipped); } if (clipped) { @@ -4345,8 +4037,8 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, } /* Add in direct connections */ - get_opin_direct_connections(rr_graph_builder, rr_graph, layer, i, j, side, pin_index, opin_node_index, rr_edges_to_create, - directs, num_directs, clb_to_clb_directs); + get_opin_direct_connections(rr_graph_builder, rr_graph, layer, i, j, side, pin_index, opin_node_index, + rr_edges_to_create, directs, num_directs, clb_to_clb_directs); } } @@ -4355,7 +4047,9 @@ static void build_unidir_rr_opins(RRGraphBuilder& rr_graph_builder, * This data structure supplements the the info in the "directs" data structure * TODO: The function that does this parsing in placement is poorly done because it lacks generality on heterogeniety, should replace with this one */ -static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const t_direct_inf* directs, const int num_directs, int delayless_switch) { +static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const t_direct_inf* directs, + const int num_directs, + int delayless_switch) { int i; t_clb_to_clb_directs* clb_to_clb_directs; char *tile_name, *port_name; @@ -4384,7 +4078,8 @@ static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const t_direct_in // Load from pins // Parse out the pb_type name, port name, and pin range - parse_direct_pin_name(directs[i].from_pin, directs[i].line, &start_pin_index, &end_pin_index, tile_name, port_name); + parse_direct_pin_name(directs[i].from_pin, directs[i].line, &start_pin_index, &end_pin_index, tile_name, + port_name); // Figure out which type, port, and pin is used for (const auto& type : device_ctx.physical_tile_types) { @@ -4415,7 +4110,8 @@ static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const t_direct_in // Load to pins // Parse out the pb_type name, port name, and pin range - parse_direct_pin_name(directs[i].to_pin, directs[i].line, &start_pin_index, &end_pin_index, tile_name, port_name); + parse_direct_pin_name(directs[i].to_pin, directs[i].line, &start_pin_index, &end_pin_index, tile_name, + port_name); // Figure out which type, port, and pin is used for (const auto& type : device_ctx.physical_tile_types) { @@ -4444,9 +4140,10 @@ static t_clb_to_clb_directs* alloc_and_load_clb_to_clb_directs(const t_direct_in clb_to_clb_directs[i].to_clb_pin_start_index = tile_port.absolute_first_pin_index + start_pin_index; clb_to_clb_directs[i].to_clb_pin_end_index = tile_port.absolute_first_pin_index + end_pin_index; - if (abs(clb_to_clb_directs[i].from_clb_pin_start_index - clb_to_clb_directs[i].from_clb_pin_end_index) != abs(clb_to_clb_directs[i].to_clb_pin_start_index - clb_to_clb_directs[i].to_clb_pin_end_index)) { - vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), directs[i].line, - "Range mismatch from %s to %s.\n", directs[i].from_pin, directs[i].to_pin); + if (abs(clb_to_clb_directs[i].from_clb_pin_start_index - clb_to_clb_directs[i].from_clb_pin_end_index) + != abs(clb_to_clb_directs[i].to_clb_pin_start_index - clb_to_clb_directs[i].to_clb_pin_end_index)) { + vpr_throw(VPR_ERROR_ARCH, get_arch_file_name(), directs[i].line, "Range mismatch from %s to %s.\n", + directs[i].from_pin, directs[i].to_pin); } //Set the switch index @@ -4502,17 +4199,15 @@ static int get_opin_direct_connections(RRGraphBuilder& rr_graph_builder, /* Find matching direct clb-to-clb connections with the same type as current grid location */ if (clb_to_clb_directs[i].from_clb_type == curr_type) { //We are at a valid starting point - if (directs[i].from_side != NUM_2D_SIDES && directs[i].from_side != side) continue; + if (directs[i].from_side != NUM_2D_SIDES && directs[i].from_side != side) + continue; //Offset must be in range - if (x + directs[i].x_offset < int(device_ctx.grid.width() - 1) - && x + directs[i].x_offset > 0 - && y + directs[i].y_offset < int(device_ctx.grid.height() - 1) - && y + directs[i].y_offset > 0) { + if (x + directs[i].x_offset < int(device_ctx.grid.width() - 1) && x + directs[i].x_offset > 0 + && y + directs[i].y_offset < int(device_ctx.grid.height() - 1) && y + directs[i].y_offset > 0) { //Only add connections if the target clb type matches the type in the direct specification - t_physical_tile_type_ptr target_type = device_ctx.grid.get_physical_type({x + directs[i].x_offset, - y + directs[i].y_offset, - layer}); + t_physical_tile_type_ptr target_type + = device_ctx.grid.get_physical_type({x + directs[i].x_offset, y + directs[i].y_offset, layer}); if (clb_to_clb_directs[i].to_clb_type == target_type && z + directs[i].sub_tile_offset < int(target_type->capacity) @@ -4561,7 +4256,8 @@ static int get_opin_direct_connections(RRGraphBuilder& rr_graph_builder, } } VTR_ASSERT(target_sub_tile != nullptr); - if (relative_ipin >= target_sub_tile->num_phy_pins) continue; + if (relative_ipin >= target_sub_tile->num_phy_pins) + continue; //If this block has capacity > 1 then the pins of z position > 0 are offset //by the number of pins per capacity instance @@ -4572,13 +4268,16 @@ static int get_opin_direct_connections(RRGraphBuilder& rr_graph_builder, if (directs[i].to_side != NUM_2D_SIDES) { //Explicit side specified, only create if pin exists on that side - RRNodeId inode = rr_graph_builder.node_lookup().find_node(layer, x + directs[i].x_offset, y + directs[i].y_offset, IPIN, ipin, directs[i].to_side); + RRNodeId inode = rr_graph_builder.node_lookup().find_node(layer, x + directs[i].x_offset, + y + directs[i].y_offset, IPIN, + ipin, directs[i].to_side); if (inode) { inodes.push_back(inode); } } else { //No side specified, get all candidates - inodes = rr_graph_builder.node_lookup().find_nodes_at_all_sides(layer, x + directs[i].x_offset, y + directs[i].y_offset, IPIN, ipin); + inodes = rr_graph_builder.node_lookup().find_nodes_at_all_sides( + layer, x + directs[i].x_offset, y + directs[i].y_offset, IPIN, ipin); } if (inodes.size() > 0) { @@ -4588,7 +4287,8 @@ static int get_opin_direct_connections(RRGraphBuilder& rr_graph_builder, //back fairly directly to the architecture file in the case of pin equivalence RRNodeId inode = pick_best_direct_connect_target_rr_node(rr_graph, from_rr_node, inodes); - rr_edges_to_create.emplace_back(from_rr_node, inode, clb_to_clb_directs[i].switch_index, false); + rr_edges_to_create.emplace_back(from_rr_node, inode, clb_to_clb_directs[i].switch_index, + false); ++num_pins; } } @@ -4734,10 +4434,8 @@ static RRNodeId pick_best_direct_connect_target_rr_node(const RRGraphView& rr_gr //Include a partial unit of distance based on side alignment to ensure //we prefer facing sides - if ((from_side == RIGHT && to_side == LEFT) - || (from_side == LEFT && to_side == RIGHT) - || (from_side == TOP && to_side == BOTTOM) - || (from_side == BOTTOM && to_side == TOP)) { + if ((from_side == RIGHT && to_side == LEFT) || (from_side == LEFT && to_side == RIGHT) + || (from_side == TOP && to_side == BOTTOM) || (from_side == BOTTOM && to_side == TOP)) { //Facing sides to_dist += 0.25; } else if (((from_side == RIGHT || from_side == LEFT) && (to_side == TOP || to_side == BOTTOM)) @@ -4767,12 +4465,11 @@ static RRNodeId pick_best_direct_connect_target_rr_node(const RRGraphView& rr_gr static void create_edge_groups(EdgeGroups* groups) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - rr_graph.rr_nodes().for_each_edge( - [&](RREdgeId edge, RRNodeId src, RRNodeId sink) { - if (!rr_graph.rr_switch_inf(RRSwitchId(rr_graph.rr_nodes().edge_switch(edge))).configurable()) { - groups->add_non_config_edge(src, sink); - } - }); + rr_graph.rr_nodes().for_each_edge([&](RREdgeId edge, RRNodeId src, RRNodeId sink) { + if (!rr_graph.rr_switch_inf(RRSwitchId(rr_graph.rr_nodes().edge_switch(edge))).configurable()) { + groups->add_non_config_edge(src, sink); + } + }); groups->create_sets(); } @@ -4809,19 +4506,11 @@ bool pins_connected(t_block_loc cluster_loc, VTR_ASSERT(rel_cap >= 0); auto from_pb_pin = logical_block->pin_logical_num_to_pb_pin_mapping.at(from_pin_logical_num); - int from_pin_physical_num = get_pb_pin_physical_num(physical_type, - sub_tile, - logical_block, - rel_cap, - from_pb_pin); + int from_pin_physical_num = get_pb_pin_physical_num(physical_type, sub_tile, logical_block, rel_cap, from_pb_pin); VTR_ASSERT(from_pin_physical_num != OPEN); auto to_pb_pin = logical_block->pin_logical_num_to_pb_pin_mapping.at(to_pin_logical_num); - int to_pin_physical_num = get_pb_pin_physical_num(physical_type, - sub_tile, - logical_block, - rel_cap, - to_pb_pin); + int to_pin_physical_num = get_pb_pin_physical_num(physical_type, sub_tile, logical_block, rel_cap, to_pb_pin); VTR_ASSERT(to_pin_physical_num != OPEN); @@ -4854,40 +4543,27 @@ static t_cluster_pin_chain get_cluster_directly_connected_nodes(const std::vecto std::vector> chains; for (auto pin_physical_num : cluster_pins) { auto pin_type = get_pin_type_from_pin_physical_num(physical_type, pin_physical_num); - auto conn_sink_pins = get_sink_pins_in_cluster(cluster_pins_set, - physical_type, - logical_block, - pin_physical_num); + auto conn_sink_pins + = get_sink_pins_in_cluster(cluster_pins_set, physical_type, logical_block, pin_physical_num); VTR_ASSERT(pin_type != OPEN); // Continue if the fan-out or fan-in of pin_physical_num is not equal to one or pin is already assigned to a chain. if (pin_index_vec[pin_physical_num] >= 0 || conn_sink_pins.size() != 1) { continue; } else { - auto node_chain = get_directly_connected_nodes(physical_type, - logical_block, - cluster_pins_set, - pin_physical_num, - is_flat); + auto node_chain = get_directly_connected_nodes(physical_type, logical_block, cluster_pins_set, + pin_physical_num, is_flat); // node_chain contains the pin_physical_num itself to. Thus, we store the chain if its size is greater than 1. if (node_chain.size() > 1) { int num_chain = (int)chains.size(); int chain_idx = get_chain_idx(pin_index_vec, node_chain, num_chain); - add_pin_chain(node_chain, - chain_idx, - pin_index_vec, - chains, - (chain_idx == num_chain)); + add_pin_chain(node_chain, chain_idx, pin_index_vec, chains, (chain_idx == num_chain)); } } } auto chain_sinks = get_node_chain_sinks(chains); - VTR_ASSERT(is_node_chain_sorted(physical_type, - logical_block, - cluster_pins_set, - pin_index_vec, - chains)); + VTR_ASSERT(is_node_chain_sorted(physical_type, logical_block, cluster_pins_set, pin_index_vec, chains)); return {pin_index_vec, chains, chain_sinks}; } @@ -4908,23 +4584,18 @@ static std::vector get_directly_connected_nodes(t_physical_tile_type_ptr ph { conn_node_chain.push_back(pin_physical_num); int last_pin_num = pin_physical_num; - auto sink_pins = get_sink_pins_in_cluster(pins_in_cluster, - physical_type, - logical_block, - pin_physical_num); + auto sink_pins = get_sink_pins_in_cluster(pins_in_cluster, physical_type, logical_block, pin_physical_num); while (sink_pins.size() == 1) { last_pin_num = sink_pins[0]; - if (is_primitive_pin(physical_type, last_pin_num) || pin_type != get_pin_type_from_pin_physical_num(physical_type, last_pin_num)) { + if (is_primitive_pin(physical_type, last_pin_num) + || pin_type != get_pin_type_from_pin_physical_num(physical_type, last_pin_num)) { break; } conn_node_chain.push_back(sink_pins[0]); - sink_pins = get_sink_pins_in_cluster(pins_in_cluster, - physical_type, - logical_block, - last_pin_num); + sink_pins = get_sink_pins_in_cluster(pins_in_cluster, physical_type, logical_block, last_pin_num); } } return conn_node_chain; @@ -4949,7 +4620,8 @@ static bool is_node_chain_sorted(t_physical_tile_type_ptr physical_type, if (nxt_idx == OPEN) { continue; } - auto conn_pin_vec = get_sink_pins_in_cluster(pins_in_cluster, physical_type, logical_block, curr_node.pin_physical_num); + auto conn_pin_vec + = get_sink_pins_in_cluster(pins_in_cluster, physical_type, logical_block, curr_node.pin_physical_num); if (conn_pin_vec.size() != 1 || conn_pin_vec[0] != curr_chain[nxt_idx].pin_physical_num) { return false; } @@ -4988,9 +4660,7 @@ static std::vector get_sink_pins_in_cluster(const std::unordered_set& t_logical_block_type_ptr logical_block, const int pin_physical_num) { std::vector sink_pins_in_cluster; - auto all_conn_pins = get_physical_pin_sink_pins(physical_type, - logical_block, - pin_physical_num); + auto all_conn_pins = get_physical_pin_sink_pins(physical_type, logical_block, pin_physical_num); sink_pins_in_cluster.reserve(all_conn_pins.size()); for (auto conn_pin : all_conn_pins) { if (pins_in_cluster.find(conn_pin) != pins_in_cluster.end()) { @@ -5006,9 +4676,7 @@ static std::vector get_src_pins_in_cluster(const std::unordered_set& p t_logical_block_type_ptr logical_block, const int pin_physical_num) { std::vector src_pins_in_cluster; - auto all_conn_pins = get_physical_pin_src_pins(physical_type, - logical_block, - pin_physical_num); + auto all_conn_pins = get_physical_pin_src_pins(physical_type, logical_block, pin_physical_num); for (auto conn_pin : all_conn_pins) { if (pins_in_cluster.find(conn_pin) != pins_in_cluster.end()) { src_pins_in_cluster.push_back(conn_pin); @@ -5122,9 +4790,8 @@ static std::pair find_create_intra_cluster_sw(RRGraphBuilder& rr_grap } } } - t_rr_switch_inf new_rr_switch_inf = create_rr_switch_from_arch_switch(create_internal_arch_sw(delay), - R_minW_nmos, - R_minW_pmos); + t_rr_switch_inf new_rr_switch_inf + = create_rr_switch_from_arch_switch(create_internal_arch_sw(delay), R_minW_nmos, R_minW_pmos); RRSwitchId rr_sw_id = rr_graph.add_rr_switch(new_rr_switch_inf); return std::make_pair(true, (size_t)rr_sw_id); @@ -5157,15 +4824,14 @@ static std::pair find_create_intra_cluster_sw(RRGraphBuilder& rr_grap // If this assumption proven to not be accurate, the implementation needs to be changed. VTR_ASSERT(arch_sw.fixed_Tdel()); - t_rr_switch_inf new_rr_switch_inf = create_rr_switch_from_arch_switch(create_internal_arch_sw(delay), - R_minW_nmos, - R_minW_pmos); + t_rr_switch_inf new_rr_switch_inf + = create_rr_switch_from_arch_switch(create_internal_arch_sw(delay), R_minW_nmos, R_minW_pmos); RRSwitchId rr_switch_id = rr_graph.add_rr_switch(new_rr_switch_inf); /*If the switch found inside the cluster has not seen before and RR graph is not read from a file, - we need to add this switch to switch_fanin_remap data strcutre which is used later to remap switch IDs - from architecture ID to RR graph switch ID. The reason why we don't this when RR graph is read from a file - is that in that case, the switch IDs of edges are alreay RR graph switch IDs. */ + * we need to add this switch to switch_fanin_remap data strcutre which is used later to remap switch IDs + * from architecture ID to RR graph switch ID. The reason why we don't this when RR graph is read from a file + * is that in that case, the switch IDs of edges are alreay RR graph switch IDs. */ auto& switch_fanin_remap = g_vpr_ctx.mutable_device().switch_fanin_remap; switch_fanin_remap.push_back({{UNDEFINED, size_t(rr_switch_id)}}); @@ -5185,16 +4851,10 @@ static float get_delay_directly_connected_pins(t_physical_tile_type_ptr physical int curr_pin = first_pin_num; while (true) { - auto sink_pins = get_sink_pins_in_cluster(cluster_pins, - physical_type, - logical_block, - curr_pin); + auto sink_pins = get_sink_pins_in_cluster(cluster_pins, physical_type, logical_block, curr_pin); // We expect the pins to be located on a chain VTR_ASSERT(sink_pins.size() == 1); - delay += get_edge_delay(physical_type, - logical_block, - curr_pin, - sink_pins[0]); + delay += get_edge_delay(physical_type, logical_block, curr_pin, sink_pins[0]); if (sink_pins[0] == second_pin_num) { break; } diff --git a/vpr/src/route/rr_graph2.cpp b/vpr/src/route/rr_graph2.cpp index 39c1e0ab697..6d7d27e8564 100644 --- a/vpr/src/route/rr_graph2.cpp +++ b/vpr/src/route/rr_graph2.cpp @@ -35,10 +35,7 @@ static void load_chan_rr_indices(const int max_chan_width, RRGraphBuilder& rr_graph_builder, int* index); -static void load_block_rr_indices(RRGraphBuilder& rr_graph_builder, - const DeviceGrid& grid, - int* index, - bool is_flat); +static void load_block_rr_indices(RRGraphBuilder& rr_graph_builder, const DeviceGrid& grid, int* index, bool is_flat); static void add_pins_spatial_lookup(RRGraphBuilder& rr_graph_builder, t_physical_tile_type_ptr physical_type_ptr, @@ -237,13 +234,9 @@ static void label_incoming_wires(const int chan_num, int* num_incoming_wires, int* num_ending_wires); -static int find_label_of_track(const std::vector& wire_mux_on_track, - int num_wire_muxes, - int from_track); +static int find_label_of_track(const std::vector& wire_mux_on_track, int num_wire_muxes, int from_track); -void dump_seg_details(t_seg_details* seg_details, - int max_chan_width, - const char* fname); +void dump_seg_details(t_seg_details* seg_details, int max_chan_width, const char* fname); //Returns how the switch type for the switch block at the specified location should be created // grid: The device grid @@ -251,7 +244,12 @@ void dump_seg_details(t_seg_details* seg_details, // from_seg_coord: The horizontal or vertical location along the channel (i.e. y-coord for CHANY, x-coord for CHANX) // from_chan_type: The from channel type // to_chan_type: The to channel type -static int should_create_switchblock(const DeviceGrid& grid, int layer_num, int from_chan_coord, int from_seg_coord, t_rr_type from_chan_type, t_rr_type to_chan_type); +static int should_create_switchblock(const DeviceGrid& grid, + int layer_num, + int from_chan_coord, + int from_seg_coord, + t_rr_type from_chan_type, + t_rr_type to_chan_type); static bool should_apply_switch_override(int switch_override); @@ -371,7 +369,8 @@ std::unique_ptr get_ordered_seg_track_counts(const std::vector 0) continue; - adjust_seg_details(x, y, grid, nodes_per_chan, - chan_details_x, X_AXIS); + adjust_seg_details(x, y, grid, nodes_per_chan, chan_details_x, X_AXIS); } } @@ -648,8 +644,7 @@ void adjust_chan_details(const DeviceGrid& grid, if (chan_details_y[x][y][0].length() > 0) continue; - adjust_seg_details(x, y, grid, nodes_per_chan, - chan_details_y, Y_AXIS); + adjust_seg_details(x, y, grid, nodes_per_chan, chan_details_y, Y_AXIS); } } } @@ -689,31 +684,29 @@ void adjust_seg_details(const int x, for (int track = 0; track < max_chan_width; ++track) { size_t lx = (seg_parallel_axis == X_AXIS ? x + 1 : x); size_t ly = (seg_parallel_axis == X_AXIS ? y : y + 1); - if (lx > grid.width() - 2 || ly > grid.height() - 2 || chan_details[lx][ly][track].length() == 0) //-2 for no perim channels + if (lx > grid.width() - 2 || ly > grid.height() - 2 + || chan_details[lx][ly][track].length() == 0) //-2 for no perim channels continue; while (chan_details[lx][ly][track].seg_start() <= seg_index) { chan_details[lx][ly][track].set_seg_start(seg_index + 1); lx = (seg_parallel_axis == X_AXIS ? lx + 1 : lx); ly = (seg_parallel_axis == X_AXIS ? ly : ly + 1); - if (lx > grid.width() - 2 || ly > grid.height() - 2 || chan_details[lx][ly][track].length() == 0) //-2 for no perim channels + if (lx > grid.width() - 2 || ly > grid.height() - 2 + || chan_details[lx][ly][track].length() == 0) //-2 for no perim channels break; } } } -void free_chan_details(t_chan_details& chan_details_x, - t_chan_details& chan_details_y) { +void free_chan_details(t_chan_details& chan_details_x, t_chan_details& chan_details_y) { chan_details_x.clear(); chan_details_y.clear(); } /* Returns the segment number at which the segment this track lies on * * started. */ -int get_seg_start(const t_chan_seg_details* seg_details, - const int itrack, - const int chan_num, - const int seg_num) { +int get_seg_start(const t_chan_seg_details* seg_details, const int itrack, const int chan_num, const int seg_num) { int seg_start = 0; if (seg_details[itrack].seg_start() >= 0) { seg_start = seg_details[itrack].seg_start(); @@ -743,7 +736,11 @@ int get_seg_start(const t_chan_seg_details* seg_details, return seg_start; } -int get_seg_end(const t_chan_seg_details* seg_details, const int itrack, const int istart, const int chan_num, const int seg_max) { +int get_seg_end(const t_chan_seg_details* seg_details, + const int itrack, + const int istart, + const int chan_num, + const int seg_max) { if (seg_details[itrack].longline()) { return seg_max; } @@ -844,7 +841,8 @@ int get_bidir_opin_connections(RRGraphBuilder& rr_graph_builder, /* Skip unconnected connections */ if (OPEN == to_track || is_connected_track) { is_connected_track = true; - VTR_ASSERT(OPEN == opin_to_track_map[type->index][ipin][width_offset][height_offset][track_layer][side][0]); + VTR_ASSERT(OPEN + == opin_to_track_map[type->index][ipin][width_offset][height_offset][track_layer][side][0]); continue; } @@ -856,7 +854,8 @@ int get_bidir_opin_connections(RRGraphBuilder& rr_graph_builder, continue; } - to_switch = (track_layer == opin_layer) ? seg_details[to_track].arch_wire_switch() : seg_details[to_track].arch_opin_between_dice_switch(); + to_switch = (track_layer == opin_layer) ? seg_details[to_track].arch_wire_switch() + : seg_details[to_track].arch_opin_between_dice_switch(); rr_edges_to_create.emplace_back(from_rr_node, to_node, to_switch, false); ++num_conn; @@ -915,10 +914,10 @@ int get_unidir_opin_connections(RRGraphBuilder& rr_graph_builder, /* AA: Determine the channel width instead of using max channels to not create hanging nodes*/ int max_chan_width = (CHANX == chan_type) ? nodes_per_chan.x_list[y] : nodes_per_chan.y_list[x]; - label_wire_muxes(chan, seg, seg_details, seg_type_index, max_len, - Direction::INC, max_chan_width, true, inc_muxes, &num_inc_muxes, &dummy); - label_wire_muxes(chan, seg, seg_details, seg_type_index, max_len, - Direction::DEC, max_chan_width, true, dec_muxes, &num_dec_muxes, &dummy); + label_wire_muxes(chan, seg, seg_details, seg_type_index, max_len, Direction::INC, max_chan_width, true, inc_muxes, + &num_inc_muxes, &dummy); + label_wire_muxes(chan, seg, seg_details, seg_type_index, max_len, Direction::DEC, max_chan_width, true, dec_muxes, + &num_dec_muxes, &dummy); /* Clip Fc to the number of muxes. */ if (((Fc / 2) > num_inc_muxes) || ((Fc / 2) > num_dec_muxes)) { @@ -947,11 +946,13 @@ int get_unidir_opin_connections(RRGraphBuilder& rr_graph_builder, } /* Add to the list. */ - auto to_switch = (opin_layer == track_layer) ? seg_details[inc_track].arch_opin_switch() : seg_details[inc_track].arch_opin_between_dice_switch(); + auto to_switch = (opin_layer == track_layer) ? seg_details[inc_track].arch_opin_switch() + : seg_details[inc_track].arch_opin_between_dice_switch(); rr_edges_to_create.emplace_back(from_rr_node, inc_inode_index, to_switch, false); ++num_edges; - to_switch = (opin_layer == track_layer) ? seg_details[dec_track].arch_opin_switch() : seg_details[dec_track].arch_opin_between_dice_switch(); + to_switch = (opin_layer == track_layer) ? seg_details[dec_track].arch_opin_switch() + : seg_details[dec_track].arch_opin_between_dice_switch(); rr_edges_to_create.emplace_back(from_rr_node, dec_inode_index, to_switch, false); ++num_edges; } @@ -980,30 +981,23 @@ bool is_cblock(const int chan, const int seg, const int track, const t_chan_seg_ return seg_details[track].cb(ofs); } -void dump_seg_details(const t_chan_seg_details* seg_details, - int max_chan_width, - FILE* fp) { +void dump_seg_details(const t_chan_seg_details* seg_details, int max_chan_width, FILE* fp) { for (int i = 0; i < max_chan_width; i++) { fprintf(fp, "track: %d\n", i); - fprintf(fp, "length: %d start: %d", - seg_details[i].length(), seg_details[i].start()); + fprintf(fp, "length: %d start: %d", seg_details[i].length(), seg_details[i].start()); if (seg_details[i].length() > 0) { if (seg_details[i].seg_start() >= 0 && seg_details[i].seg_end() >= 0) { - fprintf(fp, " [%d,%d]", - seg_details[i].seg_start(), seg_details[i].seg_end()); + fprintf(fp, " [%d,%d]", seg_details[i].seg_start(), seg_details[i].seg_end()); } - fprintf(fp, " longline: %d arch_wire_switch: %d arch_opin_switch: %d", - seg_details[i].longline(), + fprintf(fp, " longline: %d arch_wire_switch: %d arch_opin_switch: %d", seg_details[i].longline(), seg_details[i].arch_wire_switch(), seg_details[i].arch_opin_switch()); } fprintf(fp, "\n"); - fprintf(fp, "Rmetal: %g Cmetal: %g\n", - seg_details[i].Rmetal(), seg_details[i].Cmetal()); + fprintf(fp, "Rmetal: %g Cmetal: %g\n", seg_details[i].Rmetal(), seg_details[i].Cmetal()); - fprintf(fp, "direction: %s\n", - DIRECTION_STRING[static_cast(seg_details[i].direction())]); + fprintf(fp, "direction: %s\n", DIRECTION_STRING[static_cast(seg_details[i].direction())]); fprintf(fp, "cb list: "); for (int j = 0; j < seg_details[i].length(); j++) @@ -1021,9 +1015,7 @@ void dump_seg_details(const t_chan_seg_details* seg_details, /* Dumps out an array of seg_details structures to file fname. Used only * * for debugging. */ -void dump_seg_details(const t_chan_seg_details* seg_details, - int max_chan_width, - const char* fname) { +void dump_seg_details(const t_chan_seg_details* seg_details, int max_chan_width, const char* fname) { FILE* fp = vtr::fopen(fname, "w"); dump_seg_details(seg_details, max_chan_width, fp); fclose(fp); @@ -1039,7 +1031,8 @@ void dump_chan_details(const t_chan_details& chan_details_x, FILE* fp = vtr::fopen(fname, "w"); if (fp) { fprintf(fp, "************************\n"); - fprintf(fp, "max_chan_width= %d | max_chan_width_y= %d | max_chan_width_x= %d", nodes_per_chan->max, nodes_per_chan->y_max, nodes_per_chan->x_max); + fprintf(fp, "max_chan_width= %d | max_chan_width_y= %d | max_chan_width_x= %d", nodes_per_chan->max, + nodes_per_chan->y_max, nodes_per_chan->x_max); fprintf(fp, "************************\n"); for (size_t y = 0; y <= grid.height() - 2; ++y) { //-2 for no perim channels for (size_t x = 0; x <= grid.width() - 2; ++x) { //-2 for no perim channels @@ -1135,12 +1128,10 @@ void dump_sblock_pattern(const t_sblock_pattern& sblock_pattern, continue; if (alt_mux == UN_SET && alt_track == UN_SET) { - fprintf(fp, "%s %d => %s [%d][%d]\n", - psz_from_side, from_track, psz_to_side, - to_mux, to_track); + fprintf(fp, "%s %d => %s [%d][%d]\n", psz_from_side, from_track, psz_to_side, to_mux, + to_track); } else { - fprintf(fp, "%s %d => %s [%d][%d] [%d][%d]\n", - psz_from_side, from_track, psz_to_side, + fprintf(fp, "%s %d => %s [%d][%d] [%d][%d]\n", psz_from_side, from_track, psz_to_side, to_mux, to_track, alt_mux, alt_track); } } @@ -1165,9 +1156,11 @@ void dump_track_to_pin_map(t_track_to_pin_lookup& track_to_pin_map, for (int width = 0; width < types[i].width; ++width) { for (int height = 0; height < types[i].height; ++height) { for (int side = 0; side < 4; ++side) { - fprintf(fp, "\nTYPE:%s width:%d height:%d layer:%d\n", types[i].name, width, height, layer); + fprintf(fp, "\nTYPE:%s width:%d height:%d layer:%d\n", types[i].name, width, height, + layer); fprintf(fp, "\nSIDE:%d TRACK:%d \n", side, track); - for (size_t con = 0; con < track_to_pin_map[i][track][width][height][layer][side].size(); con++) { + for (size_t con = 0; + con < track_to_pin_map[i][track][width][height][layer][side].size(); con++) { fprintf(fp, "%d ", track_to_pin_map[i][track][width][height][layer][side][con]); } fprintf(fp, "\n=====================\n"); @@ -1248,7 +1241,15 @@ static bool is_sb_conn_layer_crossing(enum e_side src_side, enum e_side dest_sid return true; } -static bool check_3d_SB_RRnodes(RRGraphBuilder& rr_graph_builder, int x, int y, int from_wire, int from_wire_layer, e_rr_type from_wire_type, int to_wire, int to_wire_layer, e_rr_type to_wire_type) { +static bool check_3d_SB_RRnodes(RRGraphBuilder& rr_graph_builder, + int x, + int y, + int from_wire, + int from_wire_layer, + e_rr_type from_wire_type, + int to_wire, + int to_wire_layer, + e_rr_type to_wire_type) { RRNodeId from_inode = rr_graph_builder.node_lookup().find_node(from_wire_layer, x, y, from_wire_type, from_wire); RRNodeId to_inode = rr_graph_builder.node_lookup().find_node(to_wire_layer, x, y, to_wire_type, to_wire); @@ -1272,7 +1273,8 @@ vtr::NdMatrix get_number_track_to_track_inter_die_conn(t_sb_connection_m int num_of_3d_conn = 0; for (auto from_side : TOTAL_3D_SIDES) { for (auto to_side : TOTAL_3D_SIDES) { - if (!is_sb_conn_layer_crossing(from_side, to_side)) { //this connection is not crossing any layer + if (!is_sb_conn_layer_crossing(from_side, + to_side)) { //this connection is not crossing any layer continue; } else { Switchblock_Lookup sb_coord(x, y, layer, from_side, to_side); @@ -1281,17 +1283,17 @@ vtr::NdMatrix get_number_track_to_track_inter_die_conn(t_sb_connection_m for (int iconn = 0; iconn < (int)conn_vector.size(); ++iconn) { //check if both from_node and to_node exists in the rr-graph //CHANY -> CHANX connection - if(check_3d_SB_RRnodes(rr_graph_builder, x, y, conn_vector[iconn].from_wire, - conn_vector[iconn].from_wire_layer, CHANY, - conn_vector[iconn].to_wire, conn_vector[iconn].to_wire_layer, - CHANX)){ + if (check_3d_SB_RRnodes(rr_graph_builder, x, y, conn_vector[iconn].from_wire, + conn_vector[iconn].from_wire_layer, CHANY, + conn_vector[iconn].to_wire, + conn_vector[iconn].to_wire_layer, CHANX)) { num_of_3d_conn++; } //CHANX -> CHANY connection - if(check_3d_SB_RRnodes(rr_graph_builder, x, y, conn_vector[iconn].from_wire, - conn_vector[iconn].from_wire_layer, CHANX, - conn_vector[iconn].to_wire, conn_vector[iconn].to_wire_layer, - CHANY)){ + if (check_3d_SB_RRnodes(rr_graph_builder, x, y, conn_vector[iconn].from_wire, + conn_vector[iconn].from_wire_layer, CHANX, + conn_vector[iconn].to_wire, + conn_vector[iconn].to_wire_layer, CHANY)) { num_of_3d_conn++; } } @@ -1299,7 +1301,8 @@ vtr::NdMatrix get_number_track_to_track_inter_die_conn(t_sb_connection_m } } } - extra_nodes_per_switchblocks[x][y] += ((num_of_3d_conn + custom_3d_sb_fanin_fanout - 1)/ custom_3d_sb_fanin_fanout); + extra_nodes_per_switchblocks[x][y] + += ((num_of_3d_conn + custom_3d_sb_fanin_fanout - 1) / custom_3d_sb_fanin_fanout); } } } @@ -1340,11 +1343,13 @@ void alloc_and_load_inter_die_rr_node_indices(RRGraphBuilder& rr_graph_builder, //reserve extra nodes for inter-die track-to-track connection rr_graph_builder.node_lookup().reserve_nodes(layer, y, x, CHANX, conn_count + nodes_per_chan->max); for (int rr_node_offset = 0; rr_node_offset < conn_count; rr_node_offset++) { - RRNodeId inode = rr_graph_builder.node_lookup().find_node(layer, x, y, CHANX, nodes_per_chan->max + rr_node_offset); + RRNodeId inode = rr_graph_builder.node_lookup().find_node(layer, x, y, CHANX, + nodes_per_chan->max + rr_node_offset); if (!inode) { inode = RRNodeId(*index); ++(*index); - rr_graph_builder.node_lookup().add_node(inode, layer, y, x, CHANX, nodes_per_chan->max + rr_node_offset); + rr_graph_builder.node_lookup().add_node(inode, layer, y, x, CHANX, + nodes_per_chan->max + rr_node_offset); } } } @@ -1365,9 +1370,7 @@ static void load_block_rr_indices(RRGraphBuilder& rr_graph_builder, for (int y = 0; y < (int)grid.height(); y++) { //Process each block from its root location if (grid.get_width_offset({x, y, layer}) == 0 && grid.get_height_offset({x, y, layer}) == 0) { - t_physical_tile_type_ptr physical_type = grid.get_physical_type({x, - y, - layer}); + t_physical_tile_type_ptr physical_type = grid.get_physical_type({x, y, layer}); //Assign indices for SINKs and SOURCEs // Note that SINKS/SOURCES have no side, so we always use side 0 std::vector class_num_vec; @@ -1375,15 +1378,8 @@ static void load_block_rr_indices(RRGraphBuilder& rr_graph_builder, class_num_vec = get_tile_root_classes(physical_type); pin_num_vec = get_tile_root_pins(physical_type); - add_classes_spatial_lookup(rr_graph_builder, - physical_type, - class_num_vec, - layer, - x, - y, - physical_type->width, - physical_type->height, - index); + add_classes_spatial_lookup(rr_graph_builder, physical_type, class_num_vec, layer, x, y, + physical_type->width, physical_type->height, index); /* Limited sides for grids * The wanted side depends on the location of the grid. @@ -1438,13 +1434,7 @@ static void load_block_rr_indices(RRGraphBuilder& rr_graph_builder, } } - add_pins_spatial_lookup(rr_graph_builder, - physical_type, - pin_num_vec, - layer, - x, - y, - index, + add_pins_spatial_lookup(rr_graph_builder, physical_type, pin_num_vec, layer, x, y, index, wanted_sides); } } @@ -1465,8 +1455,10 @@ static void add_pins_spatial_lookup(RRGraphBuilder& rr_graph_builder, for (int height_offset = 0; height_offset < physical_type_ptr->height; ++height_offset) { int y_tile = root_y + height_offset; //only nodes on the tile may be located in a location other than the root-location - rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, OPIN, physical_type_ptr->num_pins, side); - rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, IPIN, physical_type_ptr->num_pins, side); + rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, OPIN, physical_type_ptr->num_pins, + side); + rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, IPIN, physical_type_ptr->num_pins, + side); } } } @@ -1519,8 +1511,10 @@ static void add_classes_spatial_lookup(RRGraphBuilder& rr_graph_builder, int* index) { for (int x_tile = root_x; x_tile < (root_x + block_width); x_tile++) { for (int y_tile = root_y; y_tile < (root_y + block_height); y_tile++) { - rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, SOURCE, class_num_vec.size(), TOTAL_2D_SIDES[0]); - rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, SINK, class_num_vec.size(), TOTAL_2D_SIDES[0]); + rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, SOURCE, class_num_vec.size(), + TOTAL_2D_SIDES[0]); + rr_graph_builder.node_lookup().reserve_nodes(layer, x_tile, y_tile, SINK, class_num_vec.size(), + TOTAL_2D_SIDES[0]); } } @@ -1570,9 +1564,11 @@ void alloc_and_load_rr_node_indices(RRGraphBuilder& rr_graph_builder, /* Alloc the lookup table */ for (t_rr_type rr_type : RR_TYPES) { if (rr_type == CHANX) { - rr_graph_builder.node_lookup().resize_nodes(grid.get_num_layers(), grid.height(), grid.width(), rr_type, NUM_2D_SIDES); + rr_graph_builder.node_lookup().resize_nodes(grid.get_num_layers(), grid.height(), grid.width(), rr_type, + NUM_2D_SIDES); } else { - rr_graph_builder.node_lookup().resize_nodes(grid.get_num_layers(), grid.width(), grid.height(), rr_type, NUM_2D_SIDES); + rr_graph_builder.node_lookup().resize_nodes(grid.get_num_layers(), grid.width(), grid.height(), rr_type, + NUM_2D_SIDES); } } @@ -1580,17 +1576,18 @@ void alloc_and_load_rr_node_indices(RRGraphBuilder& rr_graph_builder, load_block_rr_indices(rr_graph_builder, grid, index, is_flat); /* Load the data for x and y channels */ - load_chan_rr_indices(nodes_per_chan->x_max, grid, grid.width(), grid.height(), - CHANX, chan_details_x, rr_graph_builder, index); - load_chan_rr_indices(nodes_per_chan->y_max, grid, grid.height(), grid.width(), - CHANY, chan_details_y, rr_graph_builder, index); + load_chan_rr_indices(nodes_per_chan->x_max, grid, grid.width(), grid.height(), CHANX, chan_details_x, + rr_graph_builder, index); + load_chan_rr_indices(nodes_per_chan->y_max, grid, grid.height(), grid.width(), CHANY, chan_details_y, + rr_graph_builder, index); } -void alloc_and_load_intra_cluster_rr_node_indices(RRGraphBuilder& rr_graph_builder, - const DeviceGrid& grid, - const vtr::vector& pin_chains, - const vtr::vector>& pin_chains_num, - int* index) { +void alloc_and_load_intra_cluster_rr_node_indices( + RRGraphBuilder& rr_graph_builder, + const DeviceGrid& grid, + const vtr::vector& pin_chains, + const vtr::vector>& pin_chains_num, + int* index) { for (int layer = 0; layer < grid.get_num_layers(); layer++) { for (int x = 0; x < (int)grid.width(); x++) { for (int y = 0; y < (int)grid.height(); y++) { @@ -1602,31 +1599,14 @@ void alloc_and_load_intra_cluster_rr_node_indices(RRGraphBuilder& rr_graph_build std::vector class_num_vec; std::vector pin_num_vec; class_num_vec = get_cluster_netlist_intra_tile_classes_at_loc(layer, x, y, physical_type); - pin_num_vec = get_cluster_netlist_intra_tile_pins_at_loc(layer, - x, - y, - pin_chains, - pin_chains_num, + pin_num_vec = get_cluster_netlist_intra_tile_pins_at_loc(layer, x, y, pin_chains, pin_chains_num, physical_type); - add_classes_spatial_lookup(rr_graph_builder, - physical_type, - class_num_vec, - layer, - x, - y, - physical_type->width, - physical_type->height, - index); + add_classes_spatial_lookup(rr_graph_builder, physical_type, class_num_vec, layer, x, y, + physical_type->width, physical_type->height, index); std::vector wanted_sides; wanted_sides.push_back(e_side::TOP); - add_pins_spatial_lookup(rr_graph_builder, - physical_type, - pin_num_vec, - layer, - x, - y, - index, + add_pins_spatial_lookup(rr_graph_builder, physical_type, pin_num_vec, layer, x, y, index, wanted_sides); } } @@ -1669,60 +1649,64 @@ bool verify_rr_node_indices(const DeviceGrid& grid, rr_node_counts[inode]++; if (rr_graph.node_type(inode) != rr_type) { - VPR_ERROR(VPR_ERROR_ROUTE, "RR node type does not match between rr_nodes and rr_node_indices (%s/%s): %s", - rr_node_typename[rr_graph.node_type(inode)], - rr_node_typename[rr_type], + VPR_ERROR(VPR_ERROR_ROUTE, + "RR node type does not match between rr_nodes and rr_node_indices (%s/%s): %s", + rr_node_typename[rr_graph.node_type(inode)], rr_node_typename[rr_type], describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } if (rr_graph.node_type(inode) == CHANX) { - VTR_ASSERT_MSG(rr_graph.node_ylow(inode) == rr_graph.node_yhigh(inode), "CHANX should be horizontal"); + VTR_ASSERT_MSG(rr_graph.node_ylow(inode) == rr_graph.node_yhigh(inode), + "CHANX should be horizontal"); if (y != rr_graph.node_ylow(inode)) { - VPR_ERROR(VPR_ERROR_ROUTE, "RR node y position does not agree between rr_nodes (%d) and rr_node_indices (%d): %s", - rr_graph.node_ylow(inode), - y, + VPR_ERROR(VPR_ERROR_ROUTE, + "RR node y position does not agree between rr_nodes (%d) and rr_node_indices " + "(%d): %s", + rr_graph.node_ylow(inode), y, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } if (!rr_graph.x_in_node_range(x, inode)) { - VPR_ERROR(VPR_ERROR_ROUTE, "RR node x positions do not agree between rr_nodes (%d <-> %d) and rr_node_indices (%d): %s", - rr_graph.node_xlow(inode), - rr_graph.node_xlow(inode), - x, + VPR_ERROR(VPR_ERROR_ROUTE, + "RR node x positions do not agree between rr_nodes (%d <-> %d) and " + "rr_node_indices (%d): %s", + rr_graph.node_xlow(inode), rr_graph.node_xlow(inode), x, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } } else if (rr_graph.node_type(inode) == CHANY) { - VTR_ASSERT_MSG(rr_graph.node_xlow(inode) == rr_graph.node_xhigh(inode), "CHANY should be veritcal"); + VTR_ASSERT_MSG(rr_graph.node_xlow(inode) == rr_graph.node_xhigh(inode), + "CHANY should be veritcal"); if (x != rr_graph.node_xlow(inode)) { - VPR_ERROR(VPR_ERROR_ROUTE, "RR node x position does not agree between rr_nodes (%d) and rr_node_indices (%d): %s", - rr_graph.node_xlow(inode), - x, + VPR_ERROR(VPR_ERROR_ROUTE, + "RR node x position does not agree between rr_nodes (%d) and rr_node_indices " + "(%d): %s", + rr_graph.node_xlow(inode), x, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } if (!rr_graph.y_in_node_range(y, inode)) { - VPR_ERROR(VPR_ERROR_ROUTE, "RR node y positions do not agree between rr_nodes (%d <-> %d) and rr_node_indices (%d): %s", - rr_graph.node_ylow(inode), - rr_graph.node_ylow(inode), - y, + VPR_ERROR(VPR_ERROR_ROUTE, + "RR node y positions do not agree between rr_nodes (%d <-> %d) and " + "rr_node_indices (%d): %s", + rr_graph.node_ylow(inode), rr_graph.node_ylow(inode), y, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } } else if (rr_graph.node_type(inode) == SOURCE || rr_graph.node_type(inode) == SINK) { // Sources have co-ordinates covering the entire block they are in, but not sinks if (!rr_graph.x_in_node_range(x, inode)) { - VPR_ERROR(VPR_ERROR_ROUTE, "RR node x positions do not agree between rr_nodes (%d <-> %d) and rr_node_indices (%d): %s", - rr_graph.node_xlow(inode), - rr_graph.node_xlow(inode), - x, + VPR_ERROR(VPR_ERROR_ROUTE, + "RR node x positions do not agree between rr_nodes (%d <-> %d) and " + "rr_node_indices (%d): %s", + rr_graph.node_xlow(inode), rr_graph.node_xlow(inode), x, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } if (!rr_graph.y_in_node_range(y, inode)) { - VPR_ERROR(VPR_ERROR_ROUTE, "RR node y positions do not agree between rr_nodes (%d <-> %d) and rr_node_indices (%d): %s", - rr_graph.node_ylow(inode), - rr_graph.node_ylow(inode), - y, + VPR_ERROR(VPR_ERROR_ROUTE, + "RR node y positions do not agree between rr_nodes (%d <-> %d) and " + "rr_node_indices (%d): %s", + rr_graph.node_ylow(inode), rr_graph.node_ylow(inode), y, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } } else { @@ -1766,8 +1750,7 @@ bool verify_rr_node_indices(const DeviceGrid& grid, if (rr_node_counts.size() != rr_nodes.size()) { VPR_ERROR(VPR_ERROR_ROUTE, "Mismatch in number of unique RR nodes in rr_nodes (%zu) and rr_node_indices (%zu)", - rr_nodes.size(), - rr_node_counts.size()); + rr_nodes.size(), rr_node_counts.size()); } for (auto kv : rr_node_counts) { @@ -1781,10 +1764,9 @@ bool verify_rr_node_indices(const DeviceGrid& grid, int rr_height = (rr_graph.node_yhigh(rr_node.id()) - rr_graph.node_ylow(rr_node.id()) + 1); int rr_area = rr_width * rr_height; if (count != rr_area) { - VPR_ERROR(VPR_ERROR_ROUTE, "Mismatch between RR node size (%d) and count within rr_node_indices (%d): %s", - rr_area, - rr_node.length(), - count, + VPR_ERROR(VPR_ERROR_ROUTE, + "Mismatch between RR node size (%d) and count within rr_node_indices (%d): %s", rr_area, + rr_node.length(), count, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } /* As we allow a pin to be indexable on multiple sides, @@ -1792,9 +1774,10 @@ bool verify_rr_node_indices(const DeviceGrid& grid, */ } else if ((OPIN != rr_graph.node_type(inode)) && (IPIN != rr_graph.node_type(inode))) { if (count != rr_node.length() + 1) { - VPR_ERROR(VPR_ERROR_ROUTE, "Mismatch between RR node length (%d) and count within rr_node_indices (%d, should be length + 1): %s", - rr_node.length(), - count, + VPR_ERROR(VPR_ERROR_ROUTE, + "Mismatch between RR node length (%d) and count within rr_node_indices (%d, should be length " + "+ 1): %s", + rr_node.length(), count, describe_rr_node(rr_graph, grid, rr_indexed_data, inode, is_flat).c_str()); } } @@ -1865,17 +1848,22 @@ int get_track_to_pins(RRGraphBuilder& rr_graph_builder, int width_offset = device_ctx.grid.get_width_offset({x, y, layer_index}); int height_offset = device_ctx.grid.get_height_offset({x, y, layer_index}); - max_conn = track_to_pin_lookup[type->index][phy_track][width_offset][height_offset][layer][side].size(); + max_conn + = track_to_pin_lookup[type->index][phy_track][width_offset][height_offset][layer][side].size(); for (iconn = 0; iconn < max_conn; iconn++) { - ipin = track_to_pin_lookup[type->index][phy_track][width_offset][height_offset][layer][side][iconn]; - if (!is_pin_conencted_to_layer(type, ipin, layer_index, layer, device_ctx.grid.get_num_layers())) { + ipin = track_to_pin_lookup[type->index][phy_track][width_offset][height_offset][layer][side] + [iconn]; + if (!is_pin_conencted_to_layer(type, ipin, layer_index, layer, + device_ctx.grid.get_num_layers())) { continue; } /* Check there is a connection and Fc map isn't wrong */ /*int to_node = get_rr_node_index(L_rr_node_indices, x + width_offset, y + height_offset, IPIN, ipin, side);*/ - RRNodeId to_node = rr_graph_builder.node_lookup().find_node(layer_index, x, y, IPIN, ipin, side); - int switch_type = (layer_index == layer) ? wire_to_ipin_switch : wire_to_pin_between_dice_switch; + RRNodeId to_node + = rr_graph_builder.node_lookup().find_node(layer_index, x, y, IPIN, ipin, side); + int switch_type + = (layer_index == layer) ? wire_to_ipin_switch : wire_to_pin_between_dice_switch; if (to_node) { rr_edges_to_create.emplace_back(from_rr_node, to_node, switch_type, false); ++num_conn; @@ -1944,7 +1932,8 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(switch_block_conn.empty()); } - VTR_ASSERT_MSG(from_seg == get_seg_start(from_seg_details, from_track, from_chan, from_seg), "From segment location must be a the wire start point"); + VTR_ASSERT_MSG(from_seg == get_seg_start(from_seg_details, from_track, from_chan, from_seg), + "From segment location must be a the wire start point"); int from_switch = from_seg_details[from_track].arch_wire_switch(); @@ -1987,8 +1976,7 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, } /* Figure out if we are at a sblock */ - from_is_sblock = is_sblock(from_chan, from_seg, sb_seg, from_track, - from_seg_details, directionality); + from_is_sblock = is_sblock(from_chan, from_seg, sb_seg, from_track, from_seg_details, directionality); if (sb_seg == end_sb_seg || sb_seg == start_sb_seg) { /* end of wire must be an sblock */ from_is_sblock = true; @@ -2058,34 +2046,29 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, if (sb_seg < end_sb_seg) { if (custom_switch_block) { if (Direction::DEC == from_seg_details[from_track].direction() || BI_DIRECTIONAL == directionality) { - num_conn += get_track_to_chan_seg(rr_graph_builder, layer, max_chan_width, from_track, to_chan, to_seg, - to_type, from_side_a, to_side, - switch_override, custom_3d_sb_fanin_fanout, delayless_switch, - sb_conn_map, num_of_3d_conns_custom_SB, from_rr_node, rr_edges_to_create, des_3d_rr_edges_to_create); + num_conn += get_track_to_chan_seg( + rr_graph_builder, layer, max_chan_width, from_track, to_chan, to_seg, to_type, from_side_a, + to_side, switch_override, custom_3d_sb_fanin_fanout, delayless_switch, sb_conn_map, + num_of_3d_conns_custom_SB, from_rr_node, rr_edges_to_create, des_3d_rr_edges_to_create); } } else { if (BI_DIRECTIONAL == directionality) { /* For bidir, the target segment might have an unbuffered (bidir pass transistor) * switchbox, so we follow through regardless of whether the current segment has an SB */ conn_tracks = switch_block_conn[from_side_a][to_side][from_track]; - num_conn += get_bidir_track_to_chan_seg(rr_graph_builder, conn_tracks, layer, - to_chan, to_seg, to_sb, to_type, - to_seg_details, from_is_sblock, from_switch, - switch_override, - directionality, from_rr_node, rr_edges_to_create); + num_conn += get_bidir_track_to_chan_seg( + rr_graph_builder, conn_tracks, layer, to_chan, to_seg, to_sb, to_type, to_seg_details, + from_is_sblock, from_switch, switch_override, directionality, from_rr_node, rr_edges_to_create); } if (UNI_DIRECTIONAL == directionality) { /* No fanout if no SB. */ /* Also, we are connecting from the top or right of SB so it * makes the most sense to only get there from Direction::DEC wires. */ if ((from_is_sblock) && (Direction::DEC == from_seg_details[from_track].direction())) { - num_conn += get_unidir_track_to_chan_seg(rr_graph_builder, layer, from_track, to_chan, - to_seg, to_sb, to_type, max_chan_width, grid, - from_side_a, to_side, Fs_per_side, - sblock_pattern, - switch_override, - to_seg_details, - &Fs_clipped, from_rr_node, rr_edges_to_create); + num_conn += get_unidir_track_to_chan_seg( + rr_graph_builder, layer, from_track, to_chan, to_seg, to_sb, to_type, max_chan_width, grid, + from_side_a, to_side, Fs_per_side, sblock_pattern, switch_override, to_seg_details, + &Fs_clipped, from_rr_node, rr_edges_to_create); } } } @@ -2096,35 +2079,29 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, if (sb_seg > start_sb_seg) { if (custom_switch_block) { if (Direction::INC == from_seg_details[from_track].direction() || BI_DIRECTIONAL == directionality) { - num_conn += get_track_to_chan_seg(rr_graph_builder, layer, max_chan_width, from_track, to_chan, to_seg, - to_type, from_side_b, to_side, - switch_override,custom_3d_sb_fanin_fanout, delayless_switch, - sb_conn_map, num_of_3d_conns_custom_SB, from_rr_node, rr_edges_to_create, des_3d_rr_edges_to_create); + num_conn += get_track_to_chan_seg( + rr_graph_builder, layer, max_chan_width, from_track, to_chan, to_seg, to_type, from_side_b, + to_side, switch_override, custom_3d_sb_fanin_fanout, delayless_switch, sb_conn_map, + num_of_3d_conns_custom_SB, from_rr_node, rr_edges_to_create, des_3d_rr_edges_to_create); } } else { if (BI_DIRECTIONAL == directionality) { /* For bidir, the target segment might have an unbuffered (bidir pass transistor) * switchbox, so we follow through regardless of whether the current segment has an SB */ conn_tracks = switch_block_conn[from_side_b][to_side][from_track]; - num_conn += get_bidir_track_to_chan_seg(rr_graph_builder, conn_tracks, layer, - to_chan, to_seg, to_sb, to_type, - to_seg_details, from_is_sblock, from_switch, - switch_override, - directionality, from_rr_node, rr_edges_to_create); + num_conn += get_bidir_track_to_chan_seg( + rr_graph_builder, conn_tracks, layer, to_chan, to_seg, to_sb, to_type, to_seg_details, + from_is_sblock, from_switch, switch_override, directionality, from_rr_node, rr_edges_to_create); } if (UNI_DIRECTIONAL == directionality) { /* No fanout if no SB. */ /* Also, we are connecting from the bottom or left of SB so it * makes the most sense to only get there from Direction::INC wires. */ - if ((from_is_sblock) - && (Direction::INC == from_seg_details[from_track].direction())) { - num_conn += get_unidir_track_to_chan_seg(rr_graph_builder, layer, from_track, to_chan, - to_seg, to_sb, to_type, max_chan_width, grid, - from_side_b, to_side, Fs_per_side, - sblock_pattern, - switch_override, - to_seg_details, - &Fs_clipped, from_rr_node, rr_edges_to_create); + if ((from_is_sblock) && (Direction::INC == from_seg_details[from_track].direction())) { + num_conn += get_unidir_track_to_chan_seg( + rr_graph_builder, layer, from_track, to_chan, to_seg, to_sb, to_type, max_chan_width, grid, + from_side_b, to_side, Fs_per_side, sblock_pattern, switch_override, to_seg_details, + &Fs_clipped, from_rr_node, rr_edges_to_create); } } } @@ -2147,24 +2124,10 @@ void alloc_and_load_tile_rr_node_indices(RRGraphBuilder& rr_graph_builder, std::vector class_num_vec(class_num_range.total_num()); std::iota(class_num_vec.begin(), class_num_vec.end(), class_num_range.low); - add_classes_spatial_lookup(rr_graph_builder, - physical_tile, - class_num_vec, - layer, - x, - y, - physical_tile->width, - physical_tile->height, - num_rr_nodes); - - add_pins_spatial_lookup(rr_graph_builder, - physical_tile, - pin_num_vec, - layer, - x, - y, - num_rr_nodes, - wanted_sides); + add_classes_spatial_lookup(rr_graph_builder, physical_tile, class_num_vec, layer, x, y, physical_tile->width, + physical_tile->height, num_rr_nodes); + + add_pins_spatial_lookup(rr_graph_builder, physical_tile, pin_num_vec, layer, x, y, num_rr_nodes, wanted_sides); } static int get_bidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, @@ -2209,11 +2172,8 @@ static int get_bidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, /* Get the switches for any edges between the two tracks */ to_switch = seg_details[to_track].arch_wire_switch(); - to_is_sblock = is_sblock(to_chan, to_seg, to_sb, to_track, seg_details, - directionality); - get_switch_type(from_is_sblock, to_is_sblock, from_switch, to_switch, - switch_override, - switch_types); + to_is_sblock = is_sblock(to_chan, to_seg, to_sb, to_track, seg_details, directionality); + get_switch_type(from_is_sblock, to_is_sblock, from_switch, to_switch, switch_override, switch_types); /* There are up to two switch edges allowed from track to track */ for (i = 0; i < 2; ++i) { @@ -2262,7 +2222,8 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, /* go through the connections... */ for (int iconn = 0; iconn < (int)conn_vector.size(); ++iconn) { - if (conn_vector.at(iconn).from_wire != from_wire) continue; + if (conn_vector.at(iconn).from_wire != from_wire) + continue; int to_wire = conn_vector.at(iconn).to_wire; int to_layer = conn_vector.at(iconn).to_wire_layer; @@ -2272,7 +2233,8 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, int src_switch_betwen_layers = conn_vector[iconn].switch_ind_between_layers; if (to_layer == layer) { //track-to-track connection within the same layer - RRNodeId to_node = rr_graph_builder.node_lookup().find_node(to_layer, to_x, to_y, to_chan_type, to_wire); + RRNodeId to_node + = rr_graph_builder.node_lookup().find_node(to_layer, to_x, to_y, to_chan_type, to_wire); if (!to_node) { continue; @@ -2294,7 +2256,8 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(to_layer != layer); //check if current connection is valid, since switch block pattern is very general, //we might see invalid layer in connection, so we just skip those - if ((layer < 0 || layer >= device_ctx.grid.get_num_layers()) || (to_layer < 0 || to_layer >= device_ctx.grid.get_num_layers())) { + if ((layer < 0 || layer >= device_ctx.grid.get_num_layers()) + || (to_layer < 0 || to_layer >= device_ctx.grid.get_num_layers())) { continue; } @@ -2315,9 +2278,12 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, * * */ int offset = num_of_3d_conns_custom_SB[tile_x][tile_y] / custom_3d_sb_fanin_fanout; - RRNodeId track_to_chanx_node = rr_graph_builder.node_lookup().find_node(layer, tile_x, tile_y, CHANX, max_chan_width + offset); - RRNodeId diff_layer_chanx_node = rr_graph_builder.node_lookup().find_node(to_layer, tile_x, tile_y, CHANX, max_chan_width + offset); - RRNodeId chanx_to_track_node = rr_graph_builder.node_lookup().find_node(to_layer, to_x, to_y, to_chan_type, to_wire); + RRNodeId track_to_chanx_node + = rr_graph_builder.node_lookup().find_node(layer, tile_x, tile_y, CHANX, max_chan_width + offset); + RRNodeId diff_layer_chanx_node = rr_graph_builder.node_lookup().find_node( + to_layer, tile_x, tile_y, CHANX, max_chan_width + offset); + RRNodeId chanx_to_track_node + = rr_graph_builder.node_lookup().find_node(to_layer, to_x, to_y, to_chan_type, to_wire); if (!track_to_chanx_node || !diff_layer_chanx_node || !chanx_to_track_node) { continue; @@ -2334,12 +2300,14 @@ static void get_switchblocks_edges(RRGraphBuilder& rr_graph_builder, //add edge between intermediate node to destination node at to layer //might add the same edge more than once - des_3d_rr_edges_to_create.emplace_back(diff_layer_chanx_node, chanx_to_track_node, src_switch_betwen_layers, false); + des_3d_rr_edges_to_create.emplace_back(diff_layer_chanx_node, chanx_to_track_node, + src_switch_betwen_layers, false); ++edge_count; //we only add the following edge between intermediate nodes once for the first 3D connection for each pair of intermediate nodes if (num_of_3d_conns_custom_SB[tile_x][tile_y] % custom_3d_sb_fanin_fanout == 0) { - rr_edges_to_create.emplace_back(track_to_chanx_node, diff_layer_chanx_node, delayless_switch, false); + rr_edges_to_create.emplace_back(track_to_chanx_node, diff_layer_chanx_node, delayless_switch, + false); ++edge_count; } @@ -2386,49 +2354,17 @@ static int get_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, } } - get_switchblocks_edges(rr_graph_builder, - tile_x, - tile_y, - layer, - max_chan_width, - from_side, - from_wire, - from_rr_node, - to_side, - to_x, - to_y, - to_chan_type, - switch_override, - custom_3d_sb_fanin_fanout, - delayless_switch, - sb_conn_map, - num_of_3d_conns_custom_SB, - rr_edges_to_create, - des_3d_rr_edges_to_create, - edge_count); + get_switchblocks_edges(rr_graph_builder, tile_x, tile_y, layer, max_chan_width, from_side, from_wire, from_rr_node, + to_side, to_x, to_y, to_chan_type, switch_override, custom_3d_sb_fanin_fanout, + delayless_switch, sb_conn_map, num_of_3d_conns_custom_SB, rr_edges_to_create, + des_3d_rr_edges_to_create, edge_count); //check sb_conn_map for connections between two layers for (e_side to_another_die_side : {ABOVE, UNDER}) { - get_switchblocks_edges(rr_graph_builder, - tile_x, - tile_y, - layer, - max_chan_width, - from_side, - from_wire, - from_rr_node, - to_another_die_side, - to_x, - to_y, - to_chan_type, - switch_override, - custom_3d_sb_fanin_fanout, - delayless_switch, - sb_conn_map, - num_of_3d_conns_custom_SB, - rr_edges_to_create, - des_3d_rr_edges_to_create, - edge_count); + get_switchblocks_edges(rr_graph_builder, tile_x, tile_y, layer, max_chan_width, from_side, from_wire, + from_rr_node, to_another_die_side, to_x, to_y, to_chan_type, switch_override, + custom_3d_sb_fanin_fanout, delayless_switch, sb_conn_map, num_of_3d_conns_custom_SB, + rr_edges_to_create, des_3d_rr_edges_to_create, edge_count); } return edge_count; } @@ -2470,8 +2406,8 @@ static int get_unidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, /* get list of muxes to which we can connect */ int dummy; - label_wire_muxes(to_chan, to_seg, seg_details, UNDEFINED, max_len, - to_dir, max_chan_width, false, mux_labels, &num_labels, &dummy); + label_wire_muxes(to_chan, to_seg, seg_details, UNDEFINED, max_len, to_dir, max_chan_width, false, mux_labels, + &num_labels, &dummy); /* Can't connect if no muxes. */ if (num_labels < 1) { @@ -2529,7 +2465,12 @@ static int get_unidir_track_to_chan_seg(RRGraphBuilder& rr_graph_builder, return count; } -bool is_sblock(const int chan, int wire_seg, const int sb_seg, const int track, const t_chan_seg_details* seg_details, const enum e_directionality directionality) { +bool is_sblock(const int chan, + int wire_seg, + const int sb_seg, + const int track, + const t_chan_seg_details* seg_details, + const enum e_directionality directionality) { int length, ofs, fac; fac = 1; @@ -2607,13 +2548,17 @@ static void get_switch_type(bool is_from_sblock, } /* Take the larger switch if there are two of the same type */ - if (forward_switch - && backward_switch + if (forward_switch && backward_switch && (device_ctx.arch_switch_inf[from_node_switch].type() == device_ctx.arch_switch_inf[to_node_switch].type())) { //Sanity checks - VTR_ASSERT_SAFE_MSG(device_ctx.arch_switch_inf[from_node_switch].type() == device_ctx.arch_switch_inf[to_node_switch].type(), "Same switch type"); - VTR_ASSERT_MSG(device_ctx.arch_switch_inf[to_node_switch].directionality() == e_directionality::BI_DIRECTIONAL, "Bi-dir to switch"); - VTR_ASSERT_MSG(device_ctx.arch_switch_inf[from_node_switch].directionality() == e_directionality::BI_DIRECTIONAL, "Bi-dir from switch"); + VTR_ASSERT_SAFE_MSG( + device_ctx.arch_switch_inf[from_node_switch].type() == device_ctx.arch_switch_inf[to_node_switch].type(), + "Same switch type"); + VTR_ASSERT_MSG(device_ctx.arch_switch_inf[to_node_switch].directionality() == e_directionality::BI_DIRECTIONAL, + "Bi-dir to switch"); + VTR_ASSERT_MSG( + device_ctx.arch_switch_inf[from_node_switch].directionality() == e_directionality::BI_DIRECTIONAL, + "Bi-dir from switch"); /* Take the smaller index unless the other * switch is bigger (smaller R). */ @@ -2623,7 +2568,8 @@ static void get_switch_type(bool is_from_sblock, if (used < 2) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, - "Expected 2 switches (forward and back) between RR nodes (found %d switches, min switch index: %d max switch index: %d)", + "Expected 2 switches (forward and back) between RR nodes (found %d switches, min switch " + "index: %d max switch index: %d)", used, first_switch, second_switch); } @@ -2658,18 +2604,15 @@ static int vpr_to_phy_track(const int itrack, group_start = seg_details[itrack].group_start(); group_size = seg_details[itrack].group_size(); - vpr_offset_for_first_phy_track = (chan_num + seg_num - 1) - % (group_size / fac); + vpr_offset_for_first_phy_track = (chan_num + seg_num - 1) % (group_size / fac); vpr_offset = (itrack - group_start) / fac; - phy_offset = (vpr_offset_for_first_phy_track + vpr_offset) - % (group_size / fac); + phy_offset = (vpr_offset_for_first_phy_track + vpr_offset) % (group_size / fac); phy_track = group_start + (fac * phy_offset) + (itrack - group_start) % fac; return phy_track; } -t_sblock_pattern alloc_sblock_pattern_lookup(const DeviceGrid& grid, - t_chan_width* nodes_per_chan) { +t_sblock_pattern alloc_sblock_pattern_lookup(const DeviceGrid& grid, t_chan_width* nodes_per_chan) { /* loading up the sblock connection pattern matrix. It's a huge matrix because * for nonquantized W, it's impossible to make simple permutations to figure out * where muxes are and how to connect to them such that their sizes are balanced */ @@ -2687,8 +2630,7 @@ t_sblock_pattern alloc_sblock_pattern_lookup(const DeviceGrid& grid, VTR_ASSERT(nodes_per_chan->max >= 0); t_sblock_pattern sblock_pattern({{ - grid.width() - 1, - grid.height() - 1, + grid.width() - 1, grid.height() - 1, 4, //From side 4, //To side size_t(nodes_per_chan->max), @@ -2822,18 +2764,14 @@ void load_sblock_pattern_lookup(const int i, * AA: Different channel widths have different seg_details * warranting modified calls to static routines in this file. */ - label_incoming_wires(chan, seg, sb_seg, - seg_details, chan_len, end_dir, chan_width, - incoming_wire_label[side], - &num_incoming_wires[side], - &num_ending_wires[side]); + label_incoming_wires(chan, seg, sb_seg, seg_details, chan_len, end_dir, chan_width, incoming_wire_label[side], + &num_incoming_wires[side], &num_ending_wires[side]); /* Figure out all the tracks on a side that are starting. */ int dummy; enum Direction start_dir = (pos_dir ? Direction::INC : Direction::DEC); - label_wire_muxes(chan, seg, - seg_details, UNDEFINED, chan_len, start_dir, chan_width, - false, wire_mux_on_track[side], &num_wire_muxes[side], &dummy); + label_wire_muxes(chan, seg, seg_details, UNDEFINED, chan_len, start_dir, chan_width, false, + wire_mux_on_track[side], &num_wire_muxes[side], &dummy); } for (e_side to_side : TOTAL_2D_SIDES) { @@ -2868,12 +2806,9 @@ void load_sblock_pattern_lookup(const int i, } if (incoming_wire_label[side_cw][itrack] != UN_SET) { - int mux = get_simple_switch_block_track((enum e_side)side_cw, - (enum e_side)to_side, - incoming_wire_label[side_cw][ichan], - switch_block_type, - num_wire_muxes[to_side], - num_wire_muxes[to_side]); + int mux = get_simple_switch_block_track((enum e_side)side_cw, (enum e_side)to_side, + incoming_wire_label[side_cw][ichan], switch_block_type, + num_wire_muxes[to_side], num_wire_muxes[to_side]); if (sblock_pattern[i][j][side_cw][to_side][itrack][0] == UN_SET) { sblock_pattern[i][j][side_cw][to_side][itrack][0] = mux; @@ -2894,12 +2829,9 @@ void load_sblock_pattern_lookup(const int i, } if (incoming_wire_label[side_ccw][itrack] != UN_SET) { - int mux = get_simple_switch_block_track((enum e_side)side_ccw, - (enum e_side)to_side, - incoming_wire_label[side_ccw][ichan], - switch_block_type, - num_wire_muxes[to_side], - num_wire_muxes[to_side]); + int mux = get_simple_switch_block_track((enum e_side)side_ccw, (enum e_side)to_side, + incoming_wire_label[side_ccw][ichan], switch_block_type, + num_wire_muxes[to_side], num_wire_muxes[to_side]); if (sblock_pattern[i][j][side_ccw][to_side][itrack][0] == UN_SET) { sblock_pattern[i][j][side_ccw][to_side][itrack][0] = mux; @@ -2920,8 +2852,7 @@ void load_sblock_pattern_lookup(const int i, * use any pattern such as Wilton */ /* In the direct connect case, I know for sure the init mux is at the same track # * as this ending wire, but still need to find the init mux label for Fs > 3 */ - int mux = find_label_of_track(wire_mux_on_track[to_side], - num_wire_muxes[to_side], itrack); + int mux = find_label_of_track(wire_mux_on_track[to_side], num_wire_muxes[to_side], itrack); sblock_pattern[i][j][side_opp][to_side][itrack][0] = mux; } else { /* These are wire segments that pass through the switch block. @@ -3064,8 +2995,7 @@ static void label_incoming_wires(const int chan_num, } /* Determine if we have a sblock on the wire */ - sblock_exists = is_sblock(chan_num, seg_num, sb_seg, itrack, - seg_details, UNI_DIRECTIONAL); + sblock_exists = is_sblock(chan_num, seg_num, sb_seg, itrack, seg_details, UNI_DIRECTIONAL); switch (pass) { /* On first pass, only load ending wire labels. */ @@ -3096,9 +3026,7 @@ static void label_incoming_wires(const int chan_num, *num_ending_wires = num_ending; } -static int find_label_of_track(const std::vector& wire_mux_on_track, - int num_wire_muxes, - int from_track) { +static int find_label_of_track(const std::vector& wire_mux_on_track, int num_wire_muxes, int from_track) { /* Returns the index/label in array wire_mux_on_track whose entry equals from_tracks. If none are * found, then returns the index of the entry whose value is the largest */ int i_label = -1; @@ -3116,7 +3044,12 @@ static int find_label_of_track(const std::vector& wire_mux_on_track, return i_label; } -static int should_create_switchblock(const DeviceGrid& grid, int layer_num, int from_chan_coord, int from_seg_coord, t_rr_type from_chan_type, t_rr_type to_chan_type) { +static int should_create_switchblock(const DeviceGrid& grid, + int layer_num, + int from_chan_coord, + int from_seg_coord, + t_rr_type from_chan_type, + t_rr_type to_chan_type) { //Convert the chan/seg indices to real x/y coordinates int y_coord; int x_coord; diff --git a/vpr/src/route/rr_graph2.h b/vpr/src/route/rr_graph2.h index 348e5633708..13cea3817f2 100644 --- a/vpr/src/route/rr_graph2.h +++ b/vpr/src/route/rr_graph2.h @@ -52,11 +52,12 @@ void alloc_and_load_tile_rr_node_indices(RRGraphBuilder& rr_graph_builder, int y, int* num_rr_nodes); -void alloc_and_load_intra_cluster_rr_node_indices(RRGraphBuilder& rr_graph_builder, - const DeviceGrid& grid, - const vtr::vector& pin_chains, - const vtr::vector>& pin_chains_num, - int* index); +void alloc_and_load_intra_cluster_rr_node_indices( + RRGraphBuilder& rr_graph_builder, + const DeviceGrid& grid, + const vtr::vector& pin_chains, + const vtr::vector>& pin_chains_num, + int* index); bool verify_rr_node_indices(const DeviceGrid& grid, const RRGraphView& rr_graph, @@ -127,23 +128,16 @@ void adjust_seg_details(const int x, t_chan_details& chan_details, const enum e_parallel_axis seg_details_type); -void free_chan_details(t_chan_details& chan_details_x, - t_chan_details& chan_details_y); +void free_chan_details(t_chan_details& chan_details_x, t_chan_details& chan_details_y); -int get_seg_start(const t_chan_seg_details* seg_details, - const int itrack, - const int chan_num, - const int seg_num); +int get_seg_start(const t_chan_seg_details* seg_details, const int itrack, const int chan_num, const int seg_num); int get_seg_end(const t_chan_seg_details* seg_details, const int itrack, const int istart, const int chan_num, const int seg_max); -bool is_cblock(const int chan, - const int seg, - const int track, - const t_chan_seg_details* seg_details); +bool is_cblock(const int chan, const int seg, const int track, const t_chan_seg_details* seg_details); bool is_sblock(const int chan, int wire_seg, @@ -222,8 +216,7 @@ int get_track_to_tracks(RRGraphBuilder& rr_graph_builder, const vtr::NdMatrix, 3>& switch_block_conn, t_sb_connection_map* sb_conn_map); -t_sblock_pattern alloc_sblock_pattern_lookup(const DeviceGrid& grid, - t_chan_width* nodes_per_chan); +t_sblock_pattern alloc_sblock_pattern_lookup(const DeviceGrid& grid, t_chan_width* nodes_per_chan); void load_sblock_pattern_lookup(const int i, const int j, @@ -249,12 +242,8 @@ std::unique_ptr get_seg_track_counts(const int num_sets, const std::vector& segment_inf, const bool use_full_seg_groups); -void dump_seg_details(const t_chan_seg_details* seg_details, - int max_chan_width, - const char* fname); -void dump_seg_details(const t_chan_seg_details* seg_details, - int max_chan_width, - FILE* fp); +void dump_seg_details(const t_chan_seg_details* seg_details, int max_chan_width, const char* fname); +void dump_seg_details(const t_chan_seg_details* seg_details, int max_chan_width, FILE* fp); void dump_chan_details(const t_chan_details& chan_details_x, const t_chan_details& chan_details_y, const t_chan_width* nodes_per_chan, diff --git a/vpr/src/route/rr_graph_area.cpp b/vpr/src/route/rr_graph_area.cpp index 3ac736eebd8..16e448ef6c7 100644 --- a/vpr/src/route/rr_graph_area.cpp +++ b/vpr/src/route/rr_graph_area.cpp @@ -17,15 +17,20 @@ * (Should FPGAs Abandon the Pass Gate?), the traditional transistor area model * significantly overpredicts area at smaller process nodes. Their improved area models * were obtained based on TSMC's 65nm layout rules, and scaled down to 22nm */ -enum e_trans_area_eq { AREA_ORIGINAL, - AREA_IMPROVED_NMOS_ONLY, /* only NMOS transistors taken into account */ - AREA_IMPROVED_MIXED /* both NMOS and PMOS. extra spacing required for N-wells */ +enum e_trans_area_eq { + AREA_ORIGINAL, + AREA_IMPROVED_NMOS_ONLY, /* only NMOS transistors taken into account */ + AREA_IMPROVED_MIXED /* both NMOS and PMOS. extra spacing required for N-wells */ }; static const e_trans_area_eq trans_area_eq = AREA_IMPROVED_NMOS_ONLY; /************************ Subroutines local to this module *******************/ -static void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, float R_minW_nmos, float R_minW_pmos, const float trans_sram_bit); +static void count_bidir_routing_transistors(int num_switch, + int wire_to_ipin_switch, + float R_minW_nmos, + float R_minW_pmos, + const float trans_sram_bit); static void count_unidir_routing_transistors(std::vector& segment_inf, int wire_to_ipin_switch, @@ -34,15 +39,14 @@ static void count_unidir_routing_transistors(std::vector& segment const float trans_sram_bit, bool is_flat); -static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch, int max_inputs_to_cblock, float trans_sram_bit); +static float get_cblock_trans(int* num_inputs_to_cblock, + int wire_to_ipin_switch, + int max_inputs_to_cblock, + float trans_sram_bit); -static float* alloc_and_load_unsharable_switch_trans(int num_switch, - float trans_sram_bit, - float R_minW_nmos); +static float* alloc_and_load_unsharable_switch_trans(int num_switch, float trans_sram_bit, float R_minW_nmos); -static float* alloc_and_load_sharable_switch_trans(int num_switch, - float R_minW_nmos, - float R_minW_pmos); +static float* alloc_and_load_sharable_switch_trans(int num_switch, float R_minW_nmos, float R_minW_pmos); static float trans_per_mux(int num_inputs, float trans_sram_bit, float pass_trans_area); @@ -76,16 +80,16 @@ void count_routing_transistors(enum e_directionality directionality, count_bidir_routing_transistors(num_switch, wire_to_ipin_switch, R_minW_nmos, R_minW_pmos, trans_sram_bit); } else { VTR_ASSERT(directionality == UNI_DIRECTIONAL); - count_unidir_routing_transistors(segment_inf, - wire_to_ipin_switch, - R_minW_nmos, - R_minW_pmos, - trans_sram_bit, + count_unidir_routing_transistors(segment_inf, wire_to_ipin_switch, R_minW_nmos, R_minW_pmos, trans_sram_bit, is_flat); } } -void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, float R_minW_nmos, float R_minW_pmos, const float trans_sram_bit) { +void count_bidir_routing_transistors(int num_switch, + int wire_to_ipin_switch, + float R_minW_nmos, + float R_minW_pmos, + const float trans_sram_bit) { /* Tri-state buffers are designed as a buffer followed by a pass transistor. * * I make Rbuffer = Rpass_transitor = 1/2 Rtri-state_buffer. * * I make the pull-up and pull-down sides of the buffer the same strength -- * @@ -113,8 +117,8 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl /* corresponding to IPINs will be 0. */ - bool* cblock_counted; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] -- 0th element unused. */ - float* shared_buffer_trans; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] */ + bool* cblock_counted; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] -- 0th element unused. */ + float* shared_buffer_trans; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] */ float *unsharable_switch_trans, *sharable_switch_trans; /* [0..num_switch-1] */ t_rr_type from_rr_type, to_rr_type; @@ -146,8 +150,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl * wiring C plus the fanout. */ if (INCLUDE_TRACK_BUFFERS) { - trans_track_to_cblock_buf = trans_per_buf(R_minW_nmos / 4., R_minW_nmos, - R_minW_pmos); + trans_track_to_cblock_buf = trans_per_buf(R_minW_nmos / 4., R_minW_nmos, R_minW_pmos); } else { trans_track_to_cblock_buf = 0; } @@ -164,11 +167,9 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl shared_buffer_trans[b] = 0; } - unsharable_switch_trans = alloc_and_load_unsharable_switch_trans(num_switch, - trans_sram_bit, R_minW_nmos); + unsharable_switch_trans = alloc_and_load_unsharable_switch_trans(num_switch, trans_sram_bit, R_minW_nmos); - sharable_switch_trans = alloc_and_load_sharable_switch_trans(num_switch, - R_minW_nmos, R_minW_pmos); + sharable_switch_trans = alloc_and_load_sharable_switch_trans(num_switch, R_minW_nmos, R_minW_pmos); for (const RRNodeId& from_rr_node : device_ctx.rr_graph.nodes()) { size_t from_node = (size_t)from_rr_node; @@ -195,11 +196,10 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl if (rr_graph.rr_switch_inf(RRSwitchId(iswitch)).buffered()) { iseg = seg_index_of_sblock(rr_graph, from_node, size_t(to_node)); - shared_buffer_trans[iseg] = std::max(shared_buffer_trans[iseg], - sharable_switch_trans[iswitch]); + shared_buffer_trans[iseg] + = std::max(shared_buffer_trans[iseg], sharable_switch_trans[iswitch]); - ntrans_no_sharing += unsharable_switch_trans[iswitch] - + sharable_switch_trans[iswitch]; + ntrans_no_sharing += unsharable_switch_trans[iswitch] + sharable_switch_trans[iswitch]; ntrans_sharing += unsharable_switch_trans[iswitch]; } else if (from_node < size_t(to_node)) { /* Pass transistor shared by two edges -- only count once. * @@ -212,8 +212,8 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl case IPIN: num_inputs_to_cblock[size_t(to_node)]++; - max_inputs_to_cblock = std::max(max_inputs_to_cblock, - num_inputs_to_cblock[size_t(to_node)]); + max_inputs_to_cblock + = std::max(max_inputs_to_cblock, num_inputs_to_cblock[size_t(to_node)]); iseg = seg_index_of_cblock(rr_graph, from_rr_type, size_t(to_node)); @@ -228,7 +228,8 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl VPR_ERROR(VPR_ERROR_ROUTE, "in count_routing_transistors:\n" "\tUnexpected connection from node %d (type %s) to node %d (type %s).\n", - from_node, rr_node_typename[from_rr_type], size_t(to_node), rr_node_typename[to_rr_type]); + from_node, rr_node_typename[from_rr_type], size_t(to_node), + rr_node_typename[to_rr_type]); break; } /* End switch on to_rr_type. */ @@ -238,25 +239,21 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl /* Now add in the shared buffer transistors, and reset some flags. */ if (from_rr_type == CHANX) { - for (i = rr_graph.node_xlow(from_rr_node) - 1; - i <= rr_graph.node_xhigh(from_rr_node); i++) { + for (i = rr_graph.node_xlow(from_rr_node) - 1; i <= rr_graph.node_xhigh(from_rr_node); i++) { ntrans_sharing += shared_buffer_trans[i]; shared_buffer_trans[i] = 0.; } - for (i = rr_graph.node_xlow(from_rr_node); i <= rr_graph.node_xhigh(from_rr_node); - i++) + for (i = rr_graph.node_xlow(from_rr_node); i <= rr_graph.node_xhigh(from_rr_node); i++) cblock_counted[i] = false; } else { /* CHANY */ - for (j = rr_graph.node_ylow(from_rr_node) - 1; - j <= rr_graph.node_yhigh(from_rr_node); j++) { + for (j = rr_graph.node_ylow(from_rr_node) - 1; j <= rr_graph.node_yhigh(from_rr_node); j++) { ntrans_sharing += shared_buffer_trans[j]; shared_buffer_trans[j] = 0.; } - for (j = rr_graph.node_ylow(from_rr_node); j <= rr_graph.node_yhigh(from_rr_node); - j++) + for (j = rr_graph.node_ylow(from_rr_node); j <= rr_graph.node_yhigh(from_rr_node); j++) cblock_counted[j] = false; } break; @@ -267,12 +264,10 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl for (iedge = 0; iedge < num_edges; iedge++) { iswitch = rr_graph.edge_switch(RRNodeId(from_node), iedge); - ntrans_no_sharing += unsharable_switch_trans[iswitch] - + sharable_switch_trans[iswitch]; + ntrans_no_sharing += unsharable_switch_trans[iswitch] + sharable_switch_trans[iswitch]; ntrans_sharing += unsharable_switch_trans[iswitch]; - shared_opin_buffer_trans = std::max(shared_opin_buffer_trans, - sharable_switch_trans[iswitch]); + shared_opin_buffer_trans = std::max(shared_opin_buffer_trans, sharable_switch_trans[iswitch]); } ntrans_sharing += shared_opin_buffer_trans; @@ -291,8 +286,8 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl /* Now add in the input connection block transistors. */ - input_cblock_trans = get_cblock_trans(num_inputs_to_cblock, wire_to_ipin_switch, - max_inputs_to_cblock, trans_sram_bit); + input_cblock_trans + = get_cblock_trans(num_inputs_to_cblock, wire_to_ipin_switch, max_inputs_to_cblock, trans_sram_bit); delete[] num_inputs_to_cblock; @@ -301,10 +296,10 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl VTR_LOG("\n"); VTR_LOG("Routing area (in minimum width transistor areas)...\n"); - VTR_LOG("\tAssuming no buffer sharing (pessimistic). Total: %#g, per logic tile: %#g\n", - ntrans_no_sharing, ntrans_no_sharing / (float)(device_ctx.grid.width() * device_ctx.grid.height())); - VTR_LOG("\tAssuming buffer sharing (slightly optimistic). Total: %#g, per logic tile: %#g\n", - ntrans_sharing, ntrans_sharing / (float)(device_ctx.grid.width() * device_ctx.grid.height())); + VTR_LOG("\tAssuming no buffer sharing (pessimistic). Total: %#g, per logic tile: %#g\n", ntrans_no_sharing, + ntrans_no_sharing / (float)(device_ctx.grid.width() * device_ctx.grid.height())); + VTR_LOG("\tAssuming buffer sharing (slightly optimistic). Total: %#g, per logic tile: %#g\n", ntrans_sharing, + ntrans_sharing / (float)(device_ctx.grid.width() * device_ctx.grid.height())); VTR_LOG("\n"); } @@ -356,8 +351,7 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* * wiring C plus the fanout. */ if (INCLUDE_TRACK_BUFFERS) { - trans_track_to_cblock_buf = trans_per_buf(R_minW_nmos / 4., R_minW_nmos, - R_minW_pmos); + trans_track_to_cblock_buf = trans_per_buf(R_minW_nmos / 4., R_minW_nmos, R_minW_pmos); } else { trans_track_to_cblock_buf = 0; } @@ -404,8 +398,9 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* /* Each wire segment begins with a multipexer followed by a driver for unidirectional */ /* Each multiplexer contains all the fan-in to that routing node */ /* Add up area of multiplexer */ - ntrans += trans_per_mux(fan_in, trans_sram_bit, - rr_graph.rr_switch_inf(RRSwitchId(switch_index)).mux_trans_size); + ntrans += trans_per_mux( + fan_in, trans_sram_bit, + rr_graph.rr_switch_inf(RRSwitchId(switch_index)).mux_trans_size); /* Add up area of buffer */ /* The buffer size should already have been auto-sized (if required) when @@ -419,7 +414,9 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* "Uni-directional RR node driven by non-configurable " "BUFFER has fan in %d (expected 1)\n", fan_in); - msg += " " + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, to_node, is_flat); + msg += " " + + describe_rr_node(rr_graph, device_ctx.grid, device_ctx.rr_indexed_data, + to_node, is_flat); VPR_FATAL_ERROR(VPR_ERROR_OTHER, msg.c_str()); } @@ -427,7 +424,10 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* //only the buffer area ntrans += rr_graph.rr_switch_inf(RRSwitchId(switch_index)).buf_size; } else { - VPR_FATAL_ERROR(VPR_ERROR_OTHER, "Unexpected switch type %d while calculating area of uni-directional routing", switch_type); + VPR_FATAL_ERROR( + VPR_ERROR_OTHER, + "Unexpected switch type %d while calculating area of uni-directional routing", + switch_type); } chan_node_switch_done[size_t(to_node)] = true; } @@ -436,8 +436,8 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* case IPIN: num_inputs_to_cblock[size_t(to_node)]++; - max_inputs_to_cblock = std::max(max_inputs_to_cblock, - num_inputs_to_cblock[size_t(to_node)]); + max_inputs_to_cblock + = std::max(max_inputs_to_cblock, num_inputs_to_cblock[size_t(to_node)]); iseg = seg_index_of_cblock(rr_graph, from_rr_type, size_t(to_node)); if (cblock_counted[iseg] == false) { @@ -466,8 +466,7 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* cblock_counted[i] = false; } else { /* CHANY */ - for (j = rr_graph.node_ylow(from_rr_node); j <= rr_graph.node_yhigh(from_rr_node); - j++) + for (j = rr_graph.node_ylow(from_rr_node); j <= rr_graph.node_yhigh(from_rr_node); j++) cblock_counted[j] = false; } break; @@ -482,8 +481,8 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* /* Now add in the input connection block transistors. */ - input_cblock_trans = get_cblock_trans(num_inputs_to_cblock, wire_to_ipin_switch, - max_inputs_to_cblock, trans_sram_bit); + input_cblock_trans + = get_cblock_trans(num_inputs_to_cblock, wire_to_ipin_switch, max_inputs_to_cblock, trans_sram_bit); delete[] cblock_counted; delete[] num_inputs_to_cblock; @@ -492,10 +491,14 @@ void count_unidir_routing_transistors(std::vector& /*segment_inf* VTR_LOG("\n"); VTR_LOG("Routing area (in minimum width transistor areas)...\n"); - VTR_LOG("\tTotal routing area: %#g, per logic tile: %#g\n", ntrans, ntrans / (float)(device_ctx.grid.get_num_layers() * device_ctx.grid.width() * device_ctx.grid.height())); + VTR_LOG("\tTotal routing area: %#g, per logic tile: %#g\n", ntrans, + ntrans / (float)(device_ctx.grid.get_num_layers() * device_ctx.grid.width() * device_ctx.grid.height())); } -static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch, int max_inputs_to_cblock, float trans_sram_bit) { +static float get_cblock_trans(int* num_inputs_to_cblock, + int wire_to_ipin_switch, + int max_inputs_to_cblock, + float trans_sram_bit) { /* Computes the transistors in the input connection block multiplexers and * * the buffers from connection block outputs to the logic block input pins. * * For speed, I precompute the number of transistors in the multiplexers of * @@ -516,8 +519,8 @@ static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch * I need the drivability just for metal capacitance. */ for (int i = 1; i <= max_inputs_to_cblock; i++) { - trans_per_cblock[i] = trans_per_mux(i, trans_sram_bit, - rr_graph.rr_switch_inf(RRSwitchId(wire_to_ipin_switch)).mux_trans_size); + trans_per_cblock[i] + = trans_per_mux(i, trans_sram_bit, rr_graph.rr_switch_inf(RRSwitchId(wire_to_ipin_switch)).mux_trans_size); trans_per_cblock[i] += rr_graph.rr_switch_inf(RRSwitchId(wire_to_ipin_switch)).buf_size; } @@ -532,8 +535,7 @@ static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch return (trans_count); } -static float* -alloc_and_load_unsharable_switch_trans(int num_switch, float trans_sram_bit, float R_minW_nmos) { +static float* alloc_and_load_unsharable_switch_trans(int num_switch, float trans_sram_bit, float R_minW_nmos) { /* Loads up an array that says how many transistors are needed to implement * * the unsharable portion of each switch type. The SRAM bit of a switch and * * the pass transistor (forming either the entire switch or the output part * @@ -569,10 +571,7 @@ alloc_and_load_unsharable_switch_trans(int num_switch, float trans_sram_bit, flo return (unsharable_switch_trans); } -static float* -alloc_and_load_sharable_switch_trans(int num_switch, - float R_minW_nmos, - float R_minW_pmos) { +static float* alloc_and_load_sharable_switch_trans(int num_switch, float R_minW_nmos, float R_minW_pmos) { /* Loads up an array that says how many transistor are needed to implement * * the sharable portion of each switch type. The SRAM bit of a switch and * * the pass transistor (forming either the entire switch or the output part * @@ -591,8 +590,7 @@ alloc_and_load_sharable_switch_trans(int num_switch, sharable_switch_trans[i] = 0.; } else { /* Buffer. Set Rbuf = Rpass = 1/2 Rtotal. */ Rbuf = rr_graph.rr_switch_inf(RRSwitchId(i)).R / 2.; - sharable_switch_trans[i] = trans_per_buf(Rbuf, R_minW_nmos, - R_minW_pmos); + sharable_switch_trans[i] = trans_per_buf(Rbuf, R_minW_nmos, R_minW_pmos); } } @@ -608,8 +606,7 @@ float trans_per_buf(float Rbuf, float R_minW_nmos, float R_minW_pmos) { float trans_count, stage_ratio, Rstage; if (Rbuf > 0.6 * R_minW_nmos || Rbuf <= 0.) { /* Use a single-stage buffer */ - trans_count = trans_per_R(Rbuf, R_minW_nmos) - + trans_per_R(Rbuf, R_minW_pmos); + trans_count = trans_per_R(Rbuf, R_minW_nmos) + trans_per_R(Rbuf, R_minW_pmos); } else { /* Use a multi-stage buffer */ /* Target stage ratio = 4. 1 minimum width buffer, then num_stage bigger * @@ -623,8 +620,7 @@ float trans_per_buf(float Rbuf, float R_minW_nmos, float R_minW_pmos) { trans_count = 0.; for (istage = 0; istage <= num_stage; istage++) { - trans_count += trans_per_R(Rstage, R_minW_nmos) - + trans_per_R(Rstage, R_minW_pmos); + trans_count += trans_per_R(Rstage, R_minW_nmos) + trans_per_R(Rstage, R_minW_pmos); Rstage /= stage_ratio; } } @@ -656,9 +652,8 @@ static float trans_per_mux(int num_inputs, float trans_sram_bit, float pass_tran * to one lower level. */ num_second_stage_trans = (int)floor((float)sqrt((float)num_inputs) + 0.00001); pass_trans = (num_inputs + num_second_stage_trans) * pass_trans_area; - sram_trans = (ceil((float)num_inputs / num_second_stage_trans - 0.00001) - + num_second_stage_trans) - * trans_sram_bit; + sram_trans + = (ceil((float)num_inputs / num_second_stage_trans - 0.00001) + num_second_stage_trans) * trans_sram_bit; if (num_second_stage_trans == 2) { /* Can use one-bit instead of a two-bit one-hot encoding for the second stage */ /* Eliminates one sram bit counted earlier */ diff --git a/vpr/src/route/rr_graph_clock.cpp b/vpr/src/route/rr_graph_clock.cpp index 84872485f15..8383503cdc1 100644 --- a/vpr/src/route/rr_graph_clock.cpp +++ b/vpr/src/route/rr_graph_clock.cpp @@ -30,7 +30,8 @@ void ClockRRGraphBuilder::create_clock_networks_wires(const std::vectorcreate_rr_nodes_for_clock_network_wires(*this, rr_nodes_, *rr_graph_builder_, rr_edges_to_create, num_segments_x); + clock_network->create_rr_nodes_for_clock_network_wires(*this, rr_nodes_, *rr_graph_builder_, rr_edges_to_create, + num_segments_x); } // Reduce the capacity of rr_nodes for performance @@ -38,8 +39,9 @@ void ClockRRGraphBuilder::create_clock_networks_wires(const std::vector>& clock_connections, - t_rr_edge_info_set* rr_edges_to_create) { +void ClockRRGraphBuilder::create_clock_networks_switches( + const std::vector>& clock_connections, + t_rr_edge_info_set* rr_edges_to_create) { for (auto& clock_connection : clock_connections) { clock_connection->create_switches(*this, rr_edges_to_create); } @@ -87,9 +89,7 @@ std::vector ClockRRGraphBuilder::get_rr_node_indices_at_switch_location(std return switch_points.get_rr_node_indices_at_location(switch_point_name, x, y); } -std::vector SwitchPoints::get_rr_node_indices_at_location(std::string switch_point_name, - int x, - int y) const { +std::vector SwitchPoints::get_rr_node_indices_at_location(std::string switch_point_name, int x, int y) const { auto itter = switch_point_name_to_switch_location.find(switch_point_name); // assert that switch name exists in map diff --git a/vpr/src/route/rr_graph_clock.h b/vpr/src/route/rr_graph_clock.h index 6ce575b7423..27b6260ce3d 100644 --- a/vpr/src/route/rr_graph_clock.h +++ b/vpr/src/route/rr_graph_clock.h @@ -52,9 +52,7 @@ class SwitchPoints { /* Example: x,y = middle of the chip, switch_point_name == name of main drive * of global clock spine, returns the rr_nodes of all the clock spines that * start the newtork there*/ - std::vector get_rr_node_indices_at_location(std::string switch_point_name, - int x, - int y) const; + std::vector get_rr_node_indices_at_location(std::string switch_point_name, int x, int y) const; std::set> get_switch_locations(std::string switch_point_name) const; @@ -75,29 +73,21 @@ class ClockRRGraphBuilder { std::unordered_map clock_name_to_switch_points; public: - ClockRRGraphBuilder( - const t_chan_width& chan_width, - const DeviceGrid& grid, - t_rr_graph_storage* rr_nodes, - RRGraphBuilder* rr_graph_builder) + ClockRRGraphBuilder(const t_chan_width& chan_width, + const DeviceGrid& grid, + t_rr_graph_storage* rr_nodes, + RRGraphBuilder* rr_graph_builder) : chan_width_(chan_width) , grid_(grid) , rr_nodes_(rr_nodes) , rr_graph_builder_(rr_graph_builder) , chanx_ptc_idx_(0) - , chany_ptc_idx_(0) { - } + , chany_ptc_idx_(0) {} - const DeviceGrid& grid() const { - return grid_; - } + const DeviceGrid& grid() const { return grid_; } /* Saves a map from switch rr_node idx -> {x, y} location */ - void add_switch_location(std::string clock_name, - std::string switch_point_name, - int x, - int y, - int node_index); + void add_switch_location(std::string clock_name, std::string switch_point_name, int x, int y, int node_index); /* Returns the rr_node idx of the switch at location {x, y} */ std::vector get_rr_node_indices_at_switch_location(std::string clock_name, @@ -106,8 +96,7 @@ class ClockRRGraphBuilder { int y) const; /* Returns all the switch locations for the a certain clock network switch */ - std::set> get_switch_locations(std::string clock_name, - std::string switch_point_name) const; + std::set> get_switch_locations(std::string clock_name, std::string switch_point_name) const; void update_chan_width(t_chan_width* chan_width) const; @@ -135,8 +124,7 @@ class ClockRRGraphBuilder { public: /* Creates the routing resourse (rr) graph of the clock network and appends it to the * existing rr graph created in build_rr_graph for inter-block and intra-block routing. */ - void create_and_append_clock_rr_graph(int num_segments_x, - t_rr_edge_info_set* rr_edges_to_create); + void create_and_append_clock_rr_graph(int num_segments_x, t_rr_edge_info_set* rr_edges_to_create); private: /* loop over all of the clock networks and create their wires */ diff --git a/vpr/src/route/rr_graph_sbox.cpp b/vpr/src/route/rr_graph_sbox.cpp index 0e57727f056..8f2dfd1ee12 100644 --- a/vpr/src/route/rr_graph_sbox.cpp +++ b/vpr/src/route/rr_graph_sbox.cpp @@ -42,15 +42,15 @@ vtr::NdMatrix, 3> alloc_and_load_switch_block_conn(t_chan_width for (e_side from_side : TOTAL_2D_SIDES) { for (e_side to_side : TOTAL_2D_SIDES) { - int from_chan_width = (from_side == TOP || from_side == BOTTOM) ? nodes_per_chan->y_max : nodes_per_chan->x_max; + int from_chan_width + = (from_side == TOP || from_side == BOTTOM) ? nodes_per_chan->y_max : nodes_per_chan->x_max; int to_chan_width = (to_side == TOP || to_side == BOTTOM) ? nodes_per_chan->y_max : nodes_per_chan->x_max; for (int from_track = 0; from_track < from_chan_width; from_track++) { if (from_side != to_side) { switch_block_conn[from_side][to_side][from_track].resize(1); - switch_block_conn[from_side][to_side][from_track][0] = get_simple_switch_block_track(from_side, to_side, - from_track, switch_block_type, - from_chan_width, to_chan_width); + switch_block_conn[from_side][to_side][from_track][0] = get_simple_switch_block_track( + from_side, to_side, from_track, switch_block_type, from_chan_width, to_chan_width); } else { /* from_side == to_side -> no connection. */ switch_block_conn[from_side][to_side][from_track].clear(); } @@ -60,8 +60,7 @@ vtr::NdMatrix, 3> alloc_and_load_switch_block_conn(t_chan_width if (getEchoEnabled()) { FILE* out = vtr::fopen("switch_block_conn.echo", "w"); - fprintf(out, "Y-CHANNEL WIDTH: %d \n X-CHANNEL WIDTH: %d", nodes_per_chan->y_max, - nodes_per_chan->x_max); + fprintf(out, "Y-CHANNEL WIDTH: %d \n X-CHANNEL WIDTH: %d", nodes_per_chan->y_max, nodes_per_chan->x_max); for (int l = 0; l < 4; ++l) { for (int k = 0; k < 4; ++k) { fprintf(out, "Side %d to %d\n", l, k); diff --git a/vpr/src/route/rr_graph_sbox.h b/vpr/src/route/rr_graph_sbox.h index 87843f57a1a..3b92b22c976 100644 --- a/vpr/src/route/rr_graph_sbox.h +++ b/vpr/src/route/rr_graph_sbox.h @@ -16,6 +16,11 @@ vtr::NdMatrix, 3> alloc_and_load_switch_block_conn(t_chan_width enum e_switch_block_type switch_block_type, int Fs); -int get_simple_switch_block_track(enum e_side from_side, enum e_side to_side, int from_track, enum e_switch_block_type switch_block_type, const int from_chan_width, const int to_chan_width); +int get_simple_switch_block_track(enum e_side from_side, + enum e_side to_side, + int from_track, + enum e_switch_block_type switch_block_type, + const int from_chan_width, + const int to_chan_width); #endif diff --git a/vpr/src/route/rr_graph_timing_params.cpp b/vpr/src/route/rr_graph_timing_params.cpp index ae316cef2c7..f00904ede0e 100644 --- a/vpr/src/route/rr_graph_timing_params.cpp +++ b/vpr/src/route/rr_graph_timing_params.cpp @@ -187,7 +187,8 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { if (to_rr_type == CHANX || to_rr_type == CHANY) { if (rr_graph.node_direction(RRNodeId(to_node)) != Direction::BIDIR) { /* Cout was not added in these cases */ - Couts_to_add[to_node] = std::max(Couts_to_add[to_node], rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cout); + Couts_to_add[to_node] + = std::max(Couts_to_add[to_node], rr_graph.rr_switch_inf(RRSwitchId(switch_index)).Cout); } } } @@ -198,7 +199,9 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) { //Create the final flywieghted t_rr_rc_data for (const RRNodeId& rr_id : device_ctx.rr_graph.nodes()) { - mutable_device_ctx.rr_graph_builder.set_node_rc_index(rr_id, NodeRCIndex(find_create_rr_rc_data(rr_graph.node_R(rr_id), rr_node_C[(size_t)rr_id], mutable_device_ctx.rr_rc_data))); + mutable_device_ctx.rr_graph_builder.set_node_rc_index( + rr_id, NodeRCIndex(find_create_rr_rc_data(rr_graph.node_R(rr_id), rr_node_C[(size_t)rr_id], + mutable_device_ctx.rr_rc_data))); } delete[] Couts_to_add; diff --git a/vpr/src/route/segment_stats.cpp b/vpr/src/route/segment_stats.cpp index f05e0874cdb..4f9fde87f9b 100644 --- a/vpr/src/route/segment_stats.cpp +++ b/vpr/src/route/segment_stats.cpp @@ -28,13 +28,11 @@ void get_segment_usage_stats(std::vector& segment_inf) { auto& route_ctx = g_vpr_ctx.routing(); int max_segment_name_length = 0; - std::map> directed_occ_by_length = { - {X_AXIS, std::map()}, - {Y_AXIS, std::map()}}; + std::map> directed_occ_by_length + = {{X_AXIS, std::map()}, {Y_AXIS, std::map()}}; - std::map> directed_cap_by_length = { - {X_AXIS, std::map()}, - {Y_AXIS, std::map()}}; + std::map> directed_cap_by_length + = {{X_AXIS, std::map()}, {Y_AXIS, std::map()}}; std::set> segment_lengths; for (const auto& seg_inf : segment_inf) { @@ -50,13 +48,11 @@ void get_segment_usage_stats(std::vector& segment_inf) { max_segment_name_length = std::max(max_segment_name_length, static_cast(seg_inf.name.size())); } - std::map> directed_occ_by_type = { - {X_AXIS, std::vector(segment_inf.size(), 0)}, - {Y_AXIS, std::vector(segment_inf.size(), 0)}}; + std::map> directed_occ_by_type + = {{X_AXIS, std::vector(segment_inf.size(), 0)}, {Y_AXIS, std::vector(segment_inf.size(), 0)}}; - std::map> directed_cap_by_type = { - {X_AXIS, std::vector(segment_inf.size(), 0)}, - {Y_AXIS, std::vector(segment_inf.size(), 0)}}; + std::map> directed_cap_by_type + = {{X_AXIS, std::vector(segment_inf.size(), 0)}, {Y_AXIS, std::vector(segment_inf.size(), 0)}}; for (RRNodeId inode : device_ctx.rr_graph.nodes()) { auto node_type = rr_graph.node_type(inode); @@ -86,10 +82,8 @@ void get_segment_usage_stats(std::vector& segment_inf) { if (directed_cap_by_length[ax][length] != 0) { std::string length_str = (length == LONGLINE) ? "longline" : std::to_string(length); VTR_LOG(" %s%s %s%s %6d\n", - std::string(std::max(9 - (int)ax_name.length(), 0), ' ').c_str(), - ax_name.c_str(), - std::string(std::max(6 - (int)length_str.length(), 0), ' ').c_str(), - length_str.c_str(), + std::string(std::max(9 - (int)ax_name.length(), 0), ' ').c_str(), ax_name.c_str(), + std::string(std::max(6 - (int)length_str.length(), 0), ' ').c_str(), length_str.c_str(), directed_cap_by_length[ax][length]); } } @@ -105,8 +99,7 @@ void get_segment_usage_stats(std::vector& segment_inf) { std::string length_str = (length == LONGLINE) ? "longline" : std::to_string(length); utilization = (float)directed_occ_by_length[ax][length] / (float)directed_cap_by_length[ax][length]; VTR_LOG(" %s%s %11.3g\n", - std::string(std::max(7 - (int)length_str.length(), 0), ' ').c_str(), - length_str.c_str(), + std::string(std::max(7 - (int)length_str.length(), 0), ' ').c_str(), length_str.c_str(), utilization); } } @@ -131,8 +124,10 @@ void get_segment_usage_stats(std::vector& segment_inf) { } VTR_LOG("\n"); - VTR_LOG("Segment occupancy by type: %sname type utilization\n", std::string(std::max(max_segment_name_length - 4, 0), ' ').c_str()); - VTR_LOG(" %s ---- -----------\n", std::string(std::max(4, max_segment_name_length), '-').c_str()); + VTR_LOG("Segment occupancy by type: %sname type utilization\n", + std::string(std::max(max_segment_name_length - 4, 0), ' ').c_str()); + VTR_LOG(" %s ---- -----------\n", + std::string(std::max(4, max_segment_name_length), '-').c_str()); for (size_t seg_type = 0; seg_type < segment_inf.size(); seg_type++) { if (directed_cap_by_type[X_AXIS][seg_type] != 0 || directed_cap_by_type[Y_AXIS][seg_type] != 0) { @@ -145,7 +140,9 @@ void get_segment_usage_stats(std::vector& segment_inf) { cap += directed_cap_by_type[ax][seg_type]; } utilization = (float)occ / (float)cap; - VTR_LOG(" %s%s %4d %11.3g\n", std::string(std::max(4 - seg_name_size, (max_segment_name_length - seg_name_size)), ' ').c_str(), seg_name.c_str(), seg_type, utilization); + VTR_LOG(" %s%s %4d %11.3g\n", + std::string(std::max(4 - seg_name_size, (max_segment_name_length - seg_name_size)), ' ').c_str(), + seg_name.c_str(), seg_type, utilization); } } } diff --git a/vpr/src/route/sink_sampling.h b/vpr/src/route/sink_sampling.h index eb0df7f2620..3a559a06fea 100644 --- a/vpr/src/route/sink_sampling.h +++ b/vpr/src/route/sink_sampling.h @@ -26,9 +26,7 @@ struct SinkPoint { int isink; /** Operators to make this work with std::set */ - bool operator==(const SinkPoint& rhs) const { - return x == rhs.x && y == rhs.y; - } + bool operator==(const SinkPoint& rhs) const { return x == rhs.x && y == rhs.y; } bool operator<(const SinkPoint& rhs) const { if (x < rhs.x) return true; @@ -60,12 +58,14 @@ constexpr int side_of(const SinkPoint& p, const SinkPoint& v0, const SinkPoint& /** Perpendicular distance of p to v0v1 assuming |v0v1| = 1 * (it's not, so only use to compare when v0 and v1 is the same for different p's) */ -inline int dist(const SinkPoint& p, const SinkPoint& v0, const SinkPoint& v1) { - return abs(det(p, v0, v1)); -} +inline int dist(const SinkPoint& p, const SinkPoint& v0, const SinkPoint& v1) { return abs(det(p, v0, v1)); } /** Helper for quickhull() */ -inline void find_hull(std::set& out, const std::vector& points, const SinkPoint& v0, const SinkPoint& v1, int side) { +inline void find_hull(std::set& out, + const std::vector& points, + const SinkPoint& v0, + const SinkPoint& v1, + int side) { int max_dist = 0; const SinkPoint* max_p = nullptr; for (auto& point : points) { diff --git a/vpr/src/route/spatial_route_tree_lookup.cpp b/vpr/src/route/spatial_route_tree_lookup.cpp index 3d3f7a25460..cd8e79d9d7f 100644 --- a/vpr/src/route/spatial_route_tree_lookup.cpp +++ b/vpr/src/route/spatial_route_tree_lookup.cpp @@ -91,15 +91,17 @@ bool validate_route_tree_spatial_lookup(const RouteTreeNode& rt_node, const Spat auto& low_bin_rt_nodes = spatial_lookup[bin_xlow][bin_ylow]; if (std::find(low_bin_rt_nodes.begin(), low_bin_rt_nodes.end(), rt_node) == low_bin_rt_nodes.end()) { valid = false; - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Failed to find route tree node %d at (low coord %d,%d) in spatial lookup [bin %d,%d]", + VPR_FATAL_ERROR(VPR_ERROR_ROUTE, + "Failed to find route tree node %d at (low coord %d,%d) in spatial lookup [bin %d,%d]", rt_node.inode, rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), bin_xlow, bin_ylow); } auto& high_bin_rt_nodes = spatial_lookup[bin_xhigh][bin_yhigh]; if (std::find(high_bin_rt_nodes.begin(), high_bin_rt_nodes.end(), rt_node) == high_bin_rt_nodes.end()) { valid = false; - VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Failed to find route tree node %d at (high coord %d,%d) in spatial lookup [bin %d,%d]", - rt_node.inode, rr_graph.node_xhigh(rr_node), rr_graph.node_yhigh(rr_node), bin_xhigh, bin_yhigh); + VPR_FATAL_ERROR( + VPR_ERROR_ROUTE, "Failed to find route tree node %d at (high coord %d,%d) in spatial lookup [bin %d,%d]", + rt_node.inode, rr_graph.node_xhigh(rr_node), rr_graph.node_yhigh(rr_node), bin_xhigh, bin_yhigh); } // Recurse diff --git a/vpr/src/server/bytearray.h b/vpr/src/server/bytearray.h index 2a94927f0cc..f2e05b8d325 100644 --- a/vpr/src/server/bytearray.h +++ b/vpr/src/server/bytearray.h @@ -12,9 +12,9 @@ namespace comm { /** * @brief ByteArray is a simple wrapper over std::vector that provides a user-friendly interface for manipulating array data.. -*/ + */ class ByteArray : public std::vector { -public: + public: static const std::size_t DEFAULT_SIZE_HINT = 1024; /** @@ -27,8 +27,7 @@ class ByteArray : public std::vector { * @param data A pointer to the null-terminated C string from which to construct the ByteArray. */ explicit ByteArray(const char* data) - : std::vector(data, data + std::strlen(data)) - {} + : std::vector(data, data + std::strlen(data)) {} /** * @brief Constructs a ByteArray from a raw character array. @@ -41,8 +40,7 @@ class ByteArray : public std::vector { * @param size The size of the raw character array, in bytes. */ ByteArray(const char* data, std::size_t size) - : std::vector(data, data + size) - {} + : std::vector(data, data + size) {} /** * @brief Constructs a byte array with the specified size hint. @@ -51,9 +49,7 @@ class ByteArray : public std::vector { * * @param size_hint The initial capacity hint for the byte array. */ - explicit ByteArray(std::size_t size_hint = DEFAULT_SIZE_HINT) { - reserve(size_hint); - } + explicit ByteArray(std::size_t size_hint = DEFAULT_SIZE_HINT) { reserve(size_hint); } /** * @brief Constructs a byte array from the elements in the range [first, last). @@ -66,7 +62,8 @@ class ByteArray : public std::vector { * @param last An iterator to the last element in the range. */ template - ByteArray(Iterator first, Iterator last): std::vector(first, last) {} + ByteArray(Iterator first, Iterator last) + : std::vector(first, last) {} /** * @brief Appends the content of another byte array to the end of this byte array. @@ -76,9 +73,7 @@ class ByteArray : public std::vector { * * @param appendix The byte array whose content is to be appended. */ - void append(const ByteArray& appendix) { - insert(end(), appendix.begin(), appendix.end()); - } + void append(const ByteArray& appendix) { insert(end(), appendix.begin(), appendix.end()); } /** * @brief Appends a byte to the end of the byte array. @@ -87,9 +82,7 @@ class ByteArray : public std::vector { * * @param b The byte to append to the byte array. */ - void append(char b) { - push_back(b); - } + void append(char b) { push_back(b); } /** * @brief Finds the position of the specified sequence in the byte array. @@ -131,9 +124,7 @@ class ByteArray : public std::vector { * * @return A `std::string_view` representing the container's data. */ - operator std::string_view() const { - return std::string_view(this->data(), this->size()); - } + operator std::string_view() const { return std::string_view(this->data(), this->size()); } /** * @brief Calculates the checksum of the elements in the container. @@ -143,9 +134,7 @@ class ByteArray : public std::vector { * * @return The checksum of the elements in the container. */ - uint32_t calc_check_sum() { - return calc_check_sum(*this); - } + uint32_t calc_check_sum() { return calc_check_sum(*this); } /** * @brief Calculates the checksum of the elements in the given iterable container. diff --git a/vpr/src/server/commcmd.h b/vpr/src/server/commcmd.h index 28f3f69f452..29d1974ff23 100644 --- a/vpr/src/server/commcmd.h +++ b/vpr/src/server/commcmd.h @@ -5,11 +5,7 @@ namespace comm { -enum class CMD : int { - NONE=-1, - GET_PATH_LIST_ID=0, - DRAW_PATH_ID=1 -}; +enum class CMD : int { NONE = -1, GET_PATH_LIST_ID = 0, DRAW_PATH_ID = 1 }; } // namespace comm diff --git a/vpr/src/server/convertutils.cpp b/vpr/src/server/convertutils.cpp index f176e7ffee9..1ab74976cbc 100644 --- a/vpr/src/server/convertutils.cpp +++ b/vpr/src/server/convertutils.cpp @@ -11,14 +11,12 @@ std::optional try_convert_to_int(const std::string& str) { try { return vtr::atoi(str); - } catch (const vtr::VtrError&) { - return std::nullopt; - } + } catch (const vtr::VtrError&) { return std::nullopt; } } static std::string get_pretty_str_from_double(double value) { std::ostringstream ss; - ss << std::fixed << std::setprecision(2) << value; // Set precision to 2 digit after the decimal point + ss << std::fixed << std::setprecision(2) << value; // Set precision to 2 digit after the decimal point return ss.str(); } @@ -35,10 +33,10 @@ std::string get_pretty_duration_str_from_ms(int64_t duration_ms) { std::string get_pretty_size_str_from_bytes_num(int64_t bytes_num) { std::string result; - if (bytes_num >= 1024*1024*1024) { - result = get_pretty_str_from_double(bytes_num / double(1024*1024*1024)) + "Gb"; - } else if (bytes_num >= 1024*1024) { - result = get_pretty_str_from_double(bytes_num / double(1024*1024)) + "Mb"; + if (bytes_num >= 1024 * 1024 * 1024) { + result = get_pretty_str_from_double(bytes_num / double(1024 * 1024 * 1024)) + "Gb"; + } else if (bytes_num >= 1024 * 1024) { + result = get_pretty_str_from_double(bytes_num / double(1024 * 1024)) + "Mb"; } else if (bytes_num >= 1024) { result = get_pretty_str_from_double(bytes_num / double(1024)) + "Kb"; } else { diff --git a/vpr/src/server/gateio.cpp b/vpr/src/server/gateio.cpp index d40431e7da9..5856334a7f8 100644 --- a/vpr/src/server/gateio.cpp +++ b/vpr/src/server/gateio.cpp @@ -8,13 +8,9 @@ namespace server { -GateIO::GateIO() { - m_is_running.store(false); -} +GateIO::GateIO() { m_is_running.store(false); } -GateIO::~GateIO() { - stop(); -} +GateIO::~GateIO() { stop(); } void GateIO::start(int port_num) { if (!m_is_running.load()) { @@ -36,7 +32,7 @@ void GateIO::stop() { void GateIO::take_received_tasks(std::vector& tasks) { std::unique_lock lock(m_tasks_mutex); - for (TaskPtr& task: m_received_tasks) { + for (TaskPtr& task : m_received_tasks) { m_logger.queue(LogLevel::Debug, "move task id=", task->job_id(), "for processing"); tasks.push_back(std::move(task)); } @@ -45,20 +41,22 @@ void GateIO::take_received_tasks(std::vector& tasks) { void GateIO::move_tasks_to_send_queue(std::vector& tasks) { std::unique_lock lock(m_tasks_mutex); - for (TaskPtr& task: tasks) { - m_logger.queue(LogLevel::Debug, "move task id=", task->job_id(), "finished", (task->has_error() ? "with error" : "successfully"), task->error(), "to send queue"); + for (TaskPtr& task : tasks) { + m_logger.queue(LogLevel::Debug, "move task id=", task->job_id(), "finished", + (task->has_error() ? "with error" : "successfully"), task->error(), "to send queue"); m_send_tasks.push_back(std::move(task)); } tasks.clear(); } -GateIO::ActivityStatus GateIO::check_client_connection(sockpp::tcp6_acceptor& tcp_server, std::optional& client_opt) { +GateIO::ActivityStatus GateIO::check_client_connection(sockpp::tcp6_acceptor& tcp_server, + std::optional& client_opt) { ActivityStatus status = ActivityStatus::WAITING_ACTIVITY; sockpp::inet6_address peer; sockpp::tcp6_socket client = tcp_server.accept(&peer); if (client) { - m_logger.queue(LogLevel::Info, "client", client.address().to_string() , "connection accepted"); + m_logger.queue(LogLevel::Info, "client", client.address().to_string(), "connection accepted"); client.set_non_blocking(true); client_opt = std::move(client); @@ -79,13 +77,12 @@ GateIO::ActivityStatus GateIO::handle_sending_data(sockpp::tcp6_socket& client) std::size_t bytes_sent = client.write_n(task->response_buffer().data(), bytes_to_send); if (bytes_sent <= task->orig_reponse_bytes_num()) { task->chop_num_sent_bytes_from_response_buffer(bytes_sent); - m_logger.queue(LogLevel::Detail, - "sent chunk:", get_pretty_size_str_from_bytes_num(bytes_sent), - "from", get_pretty_size_str_from_bytes_num(task->orig_reponse_bytes_num()), - "left:", get_pretty_size_str_from_bytes_num(task->response_buffer().size())); + m_logger.queue(LogLevel::Detail, "sent chunk:", get_pretty_size_str_from_bytes_num(bytes_sent), "from", + get_pretty_size_str_from_bytes_num(task->orig_reponse_bytes_num()), + "left:", get_pretty_size_str_from_bytes_num(task->response_buffer().size())); status = ActivityStatus::CLIENT_ACTIVITY; } - } catch(...) { + } catch (...) { m_logger.queue(LogLevel::Detail, "error while writing chunk"); status = ActivityStatus::COMMUNICATION_PROBLEM; } @@ -99,7 +96,7 @@ GateIO::ActivityStatus GateIO::handle_sending_data(sockpp::tcp6_socket& client) std::size_t tasks_num_before_removing = m_send_tasks.size(); auto partition_iter = std::partition(m_send_tasks.begin(), m_send_tasks.end(), - [](const TaskPtr& task) { return !task->is_response_fully_sent(); }); + [](const TaskPtr& task) { return !task->is_response_fully_sent(); }); m_send_tasks.erase(partition_iter, m_send_tasks.end()); bool is_removing_took_place = tasks_num_before_removing != m_send_tasks.size(); if (!m_send_tasks.empty() && is_removing_took_place) { @@ -109,18 +106,21 @@ GateIO::ActivityStatus GateIO::handle_sending_data(sockpp::tcp6_socket& client) return status; } -GateIO::ActivityStatus GateIO::handle_receiving_data(sockpp::tcp6_socket& client, comm::TelegramBuffer& telegram_buff, std::string& received_message) { +GateIO::ActivityStatus GateIO::handle_receiving_data(sockpp::tcp6_socket& client, + comm::TelegramBuffer& telegram_buff, + std::string& received_message) { ActivityStatus status = ActivityStatus::WAITING_ACTIVITY; std::size_t bytes_actually_received{0}; try { bytes_actually_received = client.read_n(&received_message[0], CHUNK_MAX_BYTES_NUM); - } catch(...) { + } catch (...) { m_logger.queue(LogLevel::Error, "fail to receiving"); status = ActivityStatus::COMMUNICATION_PROBLEM; } if ((bytes_actually_received > 0) && (bytes_actually_received <= CHUNK_MAX_BYTES_NUM)) { - m_logger.queue(LogLevel::Detail, "received chunk:", get_pretty_size_str_from_bytes_num(bytes_actually_received)); + m_logger.queue(LogLevel::Detail, + "received chunk:", get_pretty_size_str_from_bytes_num(bytes_actually_received)); telegram_buff.append(comm::ByteArray{received_message.c_str(), bytes_actually_received}); status = ActivityStatus::CLIENT_ACTIVITY; } @@ -128,11 +128,12 @@ GateIO::ActivityStatus GateIO::handle_receiving_data(sockpp::tcp6_socket& client return status; } -GateIO::ActivityStatus GateIO::handle_telegrams(std::vector& telegram_frames, comm::TelegramBuffer& telegram_buff) { +GateIO::ActivityStatus GateIO::handle_telegrams(std::vector& telegram_frames, + comm::TelegramBuffer& telegram_buff) { ActivityStatus status = ActivityStatus::WAITING_ACTIVITY; telegram_frames.clear(); telegram_buff.take_telegram_frames(telegram_frames); - for (const comm::TelegramFramePtr& telegram_frame: telegram_frames) { + for (const comm::TelegramFramePtr& telegram_frame : telegram_frames) { // process received data std::string message{telegram_frame->body}; bool is_echo_telegram = false; @@ -143,14 +144,16 @@ GateIO::ActivityStatus GateIO::handle_telegrams(std::vector job_id_opt = comm::TelegramParser::try_extract_field_job_id(message); std::optional cmd_opt = comm::TelegramParser::try_extract_field_cmd(message); std::optional options_opt = comm::TelegramParser::try_extract_field_options(message); if (job_id_opt && cmd_opt && options_opt) { - TaskPtr task = std::make_unique(job_id_opt.value(), static_cast(cmd_opt.value()), options_opt.value()); + TaskPtr task = std::make_unique(job_id_opt.value(), static_cast(cmd_opt.value()), + options_opt.value()); const comm::TelegramHeader& header = telegram_frame->header; - m_logger.queue(LogLevel::Info, "received:", header.info(), task->info(/*skipDuration*/true)); + m_logger.queue(LogLevel::Info, "received:", header.info(), task->info(/*skipDuration*/ true)); std::unique_lock lock(m_tasks_mutex); m_received_tasks.push_back(std::move(task)); } else { @@ -162,7 +165,9 @@ GateIO::ActivityStatus GateIO::handle_telegrams(std::vector& client_alive_tracker_ptr) { +GateIO::ActivityStatus GateIO::handle_client_alive_tracker( + sockpp::tcp6_socket& client, + std::unique_ptr& client_alive_tracker_ptr) { ActivityStatus status = ActivityStatus::WAITING_ACTIVITY; if (client_alive_tracker_ptr) { /// handle sending echo to client @@ -176,7 +181,7 @@ GateIO::ActivityStatus GateIO::handle_client_alive_tracker(sockpp::tcp6_socket& m_logger.queue(LogLevel::Detail, "sent", comm::ECHO_TELEGRAM_BODY); client_alive_tracker_ptr->on_echo_sent(); } - } catch(...) { + } catch (...) { m_logger.queue(LogLevel::Debug, "fail to sent", comm::ECHO_TELEGRAM_BODY); status = ActivityStatus::COMMUNICATION_PROBLEM; } @@ -192,7 +197,9 @@ GateIO::ActivityStatus GateIO::handle_client_alive_tracker(sockpp::tcp6_socket& return status; } -void GateIO::handle_activity_status(ActivityStatus status, std::unique_ptr& client_alive_tracker_ptr, bool& is_communication_problem_detected) { +void GateIO::handle_activity_status(ActivityStatus status, + std::unique_ptr& client_alive_tracker_ptr, + bool& is_communication_problem_detected) { if (status == ActivityStatus::CLIENT_ACTIVITY) { if (client_alive_tracker_ptr) { client_alive_tracker_ptr->on_client_activity(); @@ -204,8 +211,8 @@ void GateIO::handle_activity_status(ActivityStatus status, std::unique_ptr client_alive_tracker_ptr = - std::make_unique(std::chrono::milliseconds{5000}, std::chrono::milliseconds{20000}); + std::unique_ptr client_alive_tracker_ptr + = std::make_unique(std::chrono::milliseconds{5000}, std::chrono::milliseconds{20000}); #else std::unique_ptr client_alive_tracker_ptr; #endif @@ -229,7 +236,7 @@ void GateIO::start_listening() { received_message.resize(CHUNK_MAX_BYTES_NUM); /// comm event loop - while(m_is_running.load()) { + while (m_is_running.load()) { bool is_communication_problem_detected = false; if (!client_opt) { @@ -259,7 +266,7 @@ void GateIO::start_listening() { // forward telegramBuffer errors std::vector telegram_buffer_errors; telegram_buff.take_errors(telegram_buffer_errors); - for (const std::string& error: telegram_buffer_errors) { + for (const std::string& error : telegram_buffer_errors) { m_logger.queue(LogLevel::Info, error); } @@ -281,9 +288,7 @@ void GateIO::start_listening() { } } -void GateIO::print_logs() { - m_logger.flush(); -} +void GateIO::print_logs() { m_logger.flush(); } } // namespace server diff --git a/vpr/src/server/gateio.h b/vpr/src/server/gateio.h index aa9036459c5..35df8d33c34 100644 --- a/vpr/src/server/gateio.h +++ b/vpr/src/server/gateio.h @@ -37,16 +37,11 @@ namespace server { * and responsiveness of the application. * - GateIO is not started automatically upon creation, you have to use the 'start' method with the port number. * - The socket is initialized in a non-blocking mode to function properly in a multithreaded environment. -*/ -class GateIO -{ - enum class ActivityStatus : int { - WAITING_ACTIVITY, - CLIENT_ACTIVITY, - COMMUNICATION_PROBLEM - }; + */ +class GateIO { + enum class ActivityStatus : int { WAITING_ACTIVITY, CLIENT_ACTIVITY, COMMUNICATION_PROBLEM }; - const std::size_t CHUNK_MAX_BYTES_NUM = 2*1024*1024; // 2Mb + const std::size_t CHUNK_MAX_BYTES_NUM = 2 * 1024 * 1024; // 2Mb /** * @brief Helper class aimed to help detecting a client offline. @@ -58,31 +53,28 @@ class GateIO * and it's time to start accepting new client connections in GateIO. */ class ClientAliveTracker { - public: - ClientAliveTracker(const std::chrono::milliseconds& echoIntervalMs, const std::chrono::milliseconds& clientTimeoutMs) - : m_echo_interval_ms(echoIntervalMs), m_client_timeout_ms(clientTimeoutMs) { + public: + ClientAliveTracker(const std::chrono::milliseconds& echoIntervalMs, + const std::chrono::milliseconds& clientTimeoutMs) + : m_echo_interval_ms(echoIntervalMs) + , m_client_timeout_ms(clientTimeoutMs) { reset(); } - ClientAliveTracker()=default; + ClientAliveTracker() = default; - void on_client_activity() { - m_last_client_activity_time = std::chrono::high_resolution_clock::now(); - } + void on_client_activity() { m_last_client_activity_time = std::chrono::high_resolution_clock::now(); } - void on_echo_sent() { - m_last_echo_sent_time = std::chrono::high_resolution_clock::now(); - } + void on_echo_sent() { m_last_echo_sent_time = std::chrono::high_resolution_clock::now(); } bool is_time_to_sent_echo() const { - return (duration_since_last_client_activity_ms() > m_echo_interval_ms) && (durationSinceLastEchoSentMs() > m_echo_interval_ms); + return (duration_since_last_client_activity_ms() > m_echo_interval_ms) + && (durationSinceLastEchoSentMs() > m_echo_interval_ms); } - bool is_client_timeout() const { return duration_since_last_client_activity_ms() > m_client_timeout_ms; } + bool is_client_timeout() const { return duration_since_last_client_activity_ms() > m_client_timeout_ms; } - void reset() { - on_client_activity(); - } + void reset() { on_client_activity(); } - private: + private: std::chrono::high_resolution_clock::time_point m_last_client_activity_time; std::chrono::high_resolution_clock::time_point m_last_echo_sent_time; std::chrono::milliseconds m_echo_interval_ms; @@ -98,18 +90,11 @@ class GateIO } }; - enum class LogLevel: int { - Error, - Info, - Detail, - Debug - }; + enum class LogLevel : int { Error, Info, Detail, Debug }; class TLogger { - public: - TLogger() { - m_log_level = static_cast(LogLevel::Info); - } + public: + TLogger() { m_log_level = static_cast(LogLevel::Info); } ~TLogger() {} template @@ -132,7 +117,7 @@ class GateIO } } - private: + private: std::stringstream m_log_stream; std::mutex m_log_stream_mutex; std::atomic m_log_level; @@ -140,7 +125,7 @@ class GateIO const int LOOP_INTERVAL_MS = 100; -public: + public: /** * @brief Default constructor for GateIO. */ @@ -154,10 +139,10 @@ class GateIO GateIO& operator=(GateIO&&) = delete; /** - * @brief Returns a bool indicating whether or not the port listening process is currently running. - * - * @return True if the port listening process is running, false otherwise. - */ + * @brief Returns a bool indicating whether or not the port listening process is currently running. + * + * @return True if the port listening process is running, false otherwise. + */ bool is_running() const { return m_is_running.load(); } /** @@ -178,7 +163,7 @@ class GateIO * remains empty after the operation. * * @param tasks A reference to a vector containing the tasks to be moved to the send queue. - */ + */ void move_tasks_to_send_queue(std::vector& tasks); /** @@ -187,7 +172,7 @@ class GateIO * @note Must be called from the main thread since it's invoke std::cout. * Calling this method from other threads may result in unexpected behavior. */ - void print_logs(); + void print_logs(); /** * @brief Starts the server on the specified port number. @@ -210,7 +195,7 @@ class GateIO */ void stop(); -private: + private: int m_port_num = -1; std::atomic m_is_running; // is true when started @@ -219,19 +204,26 @@ class GateIO std::mutex m_tasks_mutex; // we used single mutex to guard both vectors m_received_tasks and m_sendTasks std::vector m_received_tasks; // tasks from client (requests) - std::vector m_send_tasks; // tasks to client (responses) + std::vector m_send_tasks; // tasks to client (responses) TLogger m_logger; void start_listening(); // thread worker function /// helper functions to be executed inside startListening - ActivityStatus check_client_connection(sockpp::tcp6_acceptor& tcp_server, std::optional& client_opt); + ActivityStatus check_client_connection(sockpp::tcp6_acceptor& tcp_server, + std::optional& client_opt); ActivityStatus handle_sending_data(sockpp::tcp6_socket& client); - ActivityStatus handle_receiving_data(sockpp::tcp6_socket& client, comm::TelegramBuffer& telegram_buff, std::string& received_message); - ActivityStatus handle_telegrams(std::vector& telegram_frames, comm::TelegramBuffer& telegram_buff); - ActivityStatus handle_client_alive_tracker(sockpp::tcp6_socket& client, std::unique_ptr& client_alive_tracker_ptr); - void handle_activity_status(ActivityStatus status, std::unique_ptr& client_alive_tracker_ptr, bool& is_communication_problem_detected); + ActivityStatus handle_receiving_data(sockpp::tcp6_socket& client, + comm::TelegramBuffer& telegram_buff, + std::string& received_message); + ActivityStatus handle_telegrams(std::vector& telegram_frames, + comm::TelegramBuffer& telegram_buff); + ActivityStatus handle_client_alive_tracker(sockpp::tcp6_socket& client, + std::unique_ptr& client_alive_tracker_ptr); + void handle_activity_status(ActivityStatus status, + std::unique_ptr& client_alive_tracker_ptr, + bool& is_communication_problem_detected); /// }; @@ -240,4 +232,3 @@ class GateIO #endif /* NO_SERVER */ #endif /* GATEIO_H */ - diff --git a/vpr/src/server/pathhelper.cpp b/vpr/src/server/pathhelper.cpp index 9e9d8a7b576..0376a6703de 100644 --- a/vpr/src/server/pathhelper.cpp +++ b/vpr/src/server/pathhelper.cpp @@ -32,7 +32,10 @@ static void collect_crit_path_metadata(std::stringstream& ss, const std::vector< /** * @brief Helper function to calculate critical path timing report with specified parameters. */ -CritPathsResultPtr calc_critical_path(const std::string& report_type, int crit_path_num, e_timing_report_detail details_level, bool is_flat_routing) { +CritPathsResultPtr calc_critical_path(const std::string& report_type, + int crit_path_num, + e_timing_report_detail details_level, + bool is_flat_routing) { // shortcuts const std::shared_ptr& timing_info = g_vpr_ctx.server().timing_info; const std::shared_ptr& routing_delay_calc = g_vpr_ctx.server().routing_delay_calc; @@ -45,7 +48,8 @@ CritPathsResultPtr calc_critical_path(const std::string& report_type, int crit_p analysis_opts.timing_report_detail = details_level; analysis_opts.timing_report_npaths = crit_path_num; - VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, *routing_delay_calc, is_flat_routing, blk_loc_registry); + VprTimingGraphResolver resolver(atom_ctx.nlist, atom_ctx.lookup, *timing_ctx.graph, *routing_delay_calc, + is_flat_routing, blk_loc_registry); resolver.set_detail_level(analysis_opts.timing_report_detail); tatum::TimingReporter timing_reporter(resolver, *timing_ctx.graph, *timing_ctx.constraints); @@ -54,9 +58,11 @@ CritPathsResultPtr calc_critical_path(const std::string& report_type, int crit_p std::stringstream ss; if (report_type == comm::KEY_SETUP_PATH_LIST) { - timing_reporter.report_timing_setup(result->paths, ss, *timing_info->setup_analyzer(), analysis_opts.timing_report_npaths); + timing_reporter.report_timing_setup(result->paths, ss, *timing_info->setup_analyzer(), + analysis_opts.timing_report_npaths); } else if (report_type == comm::KEY_HOLD_PATH_LIST) { - timing_reporter.report_timing_hold(result->paths, ss, *timing_info->hold_analyzer(), analysis_opts.timing_report_npaths); + timing_reporter.report_timing_hold(result->paths, ss, *timing_info->hold_analyzer(), + analysis_opts.timing_report_npaths); } if (!result->paths.empty()) { diff --git a/vpr/src/server/pathhelper.h b/vpr/src/server/pathhelper.h index 8d2244a885a..e20d096823b 100644 --- a/vpr/src/server/pathhelper.h +++ b/vpr/src/server/pathhelper.h @@ -16,37 +16,40 @@ namespace server { * @brief Structure to retain the calculation result of the critical path. * * It contains the critical path list and the generated report as a string. -*/ + */ struct CritPathsResult { /** - * @brief Checks if the CritPathsResult contains report. - * @return True if contains report, false otherwise. - */ + * @brief Checks if the CritPathsResult contains report. + * @return True if contains report, false otherwise. + */ bool is_valid() const { return !report.empty(); } /** - * @brief Vector containing timing paths. - */ + * @brief Vector containing timing paths. + */ std::vector paths; /** - * @brief String containing the generated report. - */ + * @brief String containing the generated report. + */ std::string report; }; using CritPathsResultPtr = std::shared_ptr; /** -* @brief Calculates the critical path. - -* This function calculates the critical path based on the provided parameters. -* @param type The type of the critical path. Must be either "setup" or "hold". -* @param crit_path_num The max number of critical paths to record. -* @param details_level The level of detail for the timing report. See @ref e_timing_report_detail. -* @param is_flat_routing Indicates whether flat routing should be used. -* @return A `CritPathsResultPtr` which is a pointer to the result of the critical path calculation (see @ref CritPathsResult). -*/ -CritPathsResultPtr calc_critical_path(const std::string& type, int crit_path_num, e_timing_report_detail details_level, bool is_flat_routing); + * @brief Calculates the critical path. + * + * This function calculates the critical path based on the provided parameters. + * @param type The type of the critical path. Must be either "setup" or "hold". + * @param crit_path_num The max number of critical paths to record. + * @param details_level The level of detail for the timing report. See @ref e_timing_report_detail. + * @param is_flat_routing Indicates whether flat routing should be used. + * @return A `CritPathsResultPtr` which is a pointer to the result of the critical path calculation (see @ref CritPathsResult). + */ +CritPathsResultPtr calc_critical_path(const std::string& type, + int crit_path_num, + e_timing_report_detail details_level, + bool is_flat_routing); } // namespace server diff --git a/vpr/src/server/serverupdate.cpp b/vpr/src/server/serverupdate.cpp index de45c45936d..a78ef8a92b8 100644 --- a/vpr/src/server/serverupdate.cpp +++ b/vpr/src/server/serverupdate.cpp @@ -19,12 +19,13 @@ gboolean update(gpointer data) { std::vector tasks_buff; gate_io.take_received_tasks(tasks_buff); - for (TaskPtr& task: tasks_buff) { + for (TaskPtr& task : tasks_buff) { task_resolver.own_task(std::move(task)); } tasks_buff.clear(); - const bool is_server_context_initialized = g_vpr_ctx.server().timing_info && g_vpr_ctx.server().routing_delay_calc; + const bool is_server_context_initialized + = g_vpr_ctx.server().timing_info && g_vpr_ctx.server().routing_delay_calc; if (is_server_context_initialized) { bool has_finished_tasks = task_resolver.update(app); @@ -39,7 +40,7 @@ gboolean update(gpointer data) { } gate_io.print_logs(); } - + // Return TRUE to keep the timer running, or FALSE to stop it return is_running; } diff --git a/vpr/src/server/serverupdate.h b/vpr/src/server/serverupdate.h index f3add9ed269..2235c6910a3 100644 --- a/vpr/src/server/serverupdate.h +++ b/vpr/src/server/serverupdate.h @@ -21,4 +21,3 @@ gboolean update(gpointer); #endif /* NO_SERVER */ #endif /* SERVERUPDATE_H */ - diff --git a/vpr/src/server/task.cpp b/vpr/src/server/task.cpp index f05ada6d835..24a13658e21 100644 --- a/vpr/src/server/task.cpp +++ b/vpr/src/server/task.cpp @@ -11,7 +11,9 @@ namespace server { Task::Task(int jobId, comm::CMD cmd, const std::string& options) -: m_job_id(jobId), m_cmd(cmd), m_options(options) { + : m_job_id(jobId) + , m_cmd(cmd) + , m_options(options) { m_creation_time = std::chrono::high_resolution_clock::now(); } @@ -54,8 +56,7 @@ void Task::set_success(std::string&& result) { std::string Task::info(bool skip_duration) const { std::stringstream ss; ss << "task[" - << "id=" << std::to_string(m_job_id) - << ",cmd=" << std::to_string(static_cast(m_cmd)); + << "id=" << std::to_string(m_job_id) << ",cmd=" << std::to_string(static_cast(m_cmd)); if (!skip_duration) { ss << ",exists=" << get_pretty_duration_str_from_ms(time_ms_elapsed()); } diff --git a/vpr/src/server/task.h b/vpr/src/server/task.h index 3d29e49373f..696e2fb012d 100644 --- a/vpr/src/server/task.h +++ b/vpr/src/server/task.h @@ -19,7 +19,7 @@ namespace server { * It generates a JSON data structure to be sent back to the client as a response. */ class Task { -public: + public: /** * @brief Constructs a new Task object. * @@ -178,7 +178,7 @@ class Task { */ const std::string& options() const { return m_options; } -private: + private: int m_job_id = -1; comm::CMD m_cmd = comm::CMD::NONE; std::string m_options; diff --git a/vpr/src/server/taskresolver.cpp b/vpr/src/server/taskresolver.cpp index 5298521ece0..cc0ca856d51 100644 --- a/vpr/src/server/taskresolver.cpp +++ b/vpr/src/server/taskresolver.cpp @@ -14,10 +14,11 @@ namespace server { void TaskResolver::own_task(TaskPtr&& new_task) { // pre-process task before adding, where we could quickly detect failure scenarios - for (const auto& task: m_tasks) { + for (const auto& task : m_tasks) { if (task->cmd() == new_task->cmd()) { if (task->options_match(new_task)) { - std::string msg = "similar task is already in execution, reject new " + new_task->info() + " and waiting for old " + task->info() + " execution"; + std::string msg = "similar task is already in execution, reject new " + new_task->info() + + " and waiting for old " + task->info() + " execution"; new_task->set_fail(msg); } else { // handle case when task has same cmd but different options @@ -34,7 +35,7 @@ void TaskResolver::own_task(TaskPtr&& new_task) { } void TaskResolver::take_finished_tasks(std::vector& result) { - for (auto it=m_tasks.begin(); it != m_tasks.end();) { + for (auto it = m_tasks.begin(); it != m_tasks.end();) { TaskPtr& task = *it; if (task->is_finished()) { result.push_back(std::move(task)); @@ -45,7 +46,8 @@ void TaskResolver::take_finished_tasks(std::vector& result) { } } -std::optional TaskResolver::try_get_details_level_enum(const std::string& path_details_level_str) const { +std::optional TaskResolver::try_get_details_level_enum( + const std::string& path_details_level_str) const { if (path_details_level_str == "netlist") { return e_timing_report_detail::NETLIST; } else if (path_details_level_str == "aggregated") { @@ -61,21 +63,22 @@ std::optional TaskResolver::try_get_details_level_enum(c bool TaskResolver::update(ezgl::application* app) { bool has_processed_task = false; - for (auto& task: m_tasks) { + for (auto& task : m_tasks) { if (!task->is_finished()) { - switch(task->cmd()) { + switch (task->cmd()) { case comm::CMD::GET_PATH_LIST_ID: { process_get_path_list_task(app, task); has_processed_task = true; break; - } + } case comm::CMD::DRAW_PATH_ID: { process_draw_critical_path_task(app, task); has_processed_task = true; break; } - default: break; - } + default: + break; + } } } @@ -83,7 +86,8 @@ bool TaskResolver::update(ezgl::application* app) { } void TaskResolver::process_get_path_list_task(ezgl::application*, const TaskPtr& task) { - static const std::vector keys{comm::OPTION_PATH_NUM, comm::OPTION_PATH_TYPE, comm::OPTION_DETAILS_LEVEL, comm::OPTION_IS_FLAT_ROUTING}; + static const std::vector keys{comm::OPTION_PATH_NUM, comm::OPTION_PATH_TYPE, + comm::OPTION_DETAILS_LEVEL, comm::OPTION_IS_FLAT_ROUTING}; TelegramOptions options{task->options(), keys}; if (!options.has_errors()) { ServerContext& server_ctx = g_vpr_ctx.mutable_server(); // shortcut @@ -99,7 +103,8 @@ void TaskResolver::process_get_path_list_task(ezgl::application*, const TaskPtr& // calculate critical path depending on options and store result in server context std::optional details_level_opt = try_get_details_level_enum(details_level_str); if (details_level_opt) { - CritPathsResultPtr crit_paths_result = calc_critical_path(path_type, n_critical_path_num, details_level_opt.value(), is_flat); + CritPathsResultPtr crit_paths_result + = calc_critical_path(path_type, n_critical_path_num, details_level_opt.value(), is_flat); if (crit_paths_result->is_valid()) { server_ctx.crit_paths = std::move(crit_paths_result->paths); task->set_success(std::move(crit_paths_result->report)); @@ -121,11 +126,13 @@ void TaskResolver::process_get_path_list_task(ezgl::application*, const TaskPtr& } void TaskResolver::process_draw_critical_path_task(ezgl::application* app, const TaskPtr& task) { - TelegramOptions options{task->options(), {comm::OPTION_PATH_ELEMENTS, comm::OPTION_HIGHLIGHT_MODE, comm::OPTION_DRAW_PATH_CONTOUR}}; + TelegramOptions options{task->options(), + {comm::OPTION_PATH_ELEMENTS, comm::OPTION_HIGHLIGHT_MODE, comm::OPTION_DRAW_PATH_CONTOUR}}; if (!options.has_errors()) { ServerContext& server_ctx = g_vpr_ctx.mutable_server(); // shortcut - const std::map> path_elements = options.get_map_of_sets(comm::OPTION_PATH_ELEMENTS); + const std::map> path_elements + = options.get_map_of_sets(comm::OPTION_PATH_ELEMENTS); const std::string high_light_mode = options.get_string(comm::OPTION_HIGHLIGHT_MODE); const bool draw_path_contour = options.get_bool(comm::OPTION_DRAW_PATH_CONTOUR, false); diff --git a/vpr/src/server/taskresolver.h b/vpr/src/server/taskresolver.h index eca06bc1b74..ce38348a6b5 100644 --- a/vpr/src/server/taskresolver.h +++ b/vpr/src/server/taskresolver.h @@ -10,7 +10,7 @@ #include namespace ezgl { - class application; +class application; } namespace server { @@ -19,51 +19,51 @@ namespace server { * @brief Resolve server task. * * Process and resolve server task, store result and status for processed task. -*/ + */ class TaskResolver { -public: + public: /** * @brief Default constructor for TaskResolver. */ - TaskResolver()=default; + TaskResolver() = default; - ~TaskResolver()=default; + ~TaskResolver() = default; int tasks_num() const { return m_tasks.size(); } /** - * @brief Takes ownership of a task. - * - * This method takes ownership of a task by moving it into the TaskResolver's internal task queue. - * After calling this method, the task will be owned and managed by the TaskResolver. - * - * @param task The task to take ownership of. After calling this method, the task object will be in a valid but unspecified state. - * - * @note After calling this method, the caller should avoid accessing or modifying the task object. - */ + * @brief Takes ownership of a task. + * + * This method takes ownership of a task by moving it into the TaskResolver's internal task queue. + * After calling this method, the task will be owned and managed by the TaskResolver. + * + * @param task The task to take ownership of. After calling this method, the task object will be in a valid but unspecified state. + * + * @note After calling this method, the caller should avoid accessing or modifying the task object. + */ void own_task(TaskPtr&& task); /** - * @brief Resolve queued tasks. - * - * @param app A pointer to the ezgl::application object representing the application instance. - */ + * @brief Resolve queued tasks. + * + * @param app A pointer to the ezgl::application object representing the application instance. + */ bool update(ezgl::application* app); /** - * @brief Extracts finished tasks from the internal task queue. - * - * This function removes finished tasks from the internal task queue and appends them to the provided vector. - * After this operation, the internal task queue will no longer hold the extracted tasks. - * - * @param tasks A reference to a vector where the finished tasks will be appended. - */ + * @brief Extracts finished tasks from the internal task queue. + * + * This function removes finished tasks from the internal task queue and appends them to the provided vector. + * After this operation, the internal task queue will no longer hold the extracted tasks. + * + * @param tasks A reference to a vector where the finished tasks will be appended. + */ void take_finished_tasks(std::vector& tasks); // helper method used in tests const std::vector& tasks() const { return m_tasks; } -private: + private: std::vector m_tasks; void process_get_path_list_task(ezgl::application*, const TaskPtr&); @@ -77,4 +77,3 @@ class TaskResolver { #endif /* NO_SERVER */ #endif /* TASKRESOLVER_H */ - diff --git a/vpr/src/server/telegrambuffer.cpp b/vpr/src/server/telegrambuffer.cpp index 0aab6af8be1..9d0d33f7af5 100644 --- a/vpr/src/server/telegrambuffer.cpp +++ b/vpr/src/server/telegrambuffer.cpp @@ -4,12 +4,11 @@ namespace comm { -void TelegramBuffer::append(const ByteArray& bytes) { - m_raw_buffer.append(bytes); -} +void TelegramBuffer::append(const ByteArray& bytes) { m_raw_buffer.append(bytes); } bool TelegramBuffer::check_telegram_header_presence() { - auto [found, signature_start_index] = m_raw_buffer.find_sequence(TelegramHeader::SIGNATURE, TelegramHeader::SIGNATURE_SIZE); + auto [found, signature_start_index] + = m_raw_buffer.find_sequence(TelegramHeader::SIGNATURE, TelegramHeader::SIGNATURE_SIZE); if (found) { if (signature_start_index != 0) { // discard bytes preceding the header start position. @@ -44,7 +43,8 @@ void TelegramBuffer::take_telegram_frames(std::vector& r std::size_t expected_telegram_size = TelegramHeader::size() + header.body_bytes_num(); if (m_raw_buffer.size() >= expected_telegram_size) { // checksum validation - ByteArray body(m_raw_buffer.begin() + TelegramHeader::size(), m_raw_buffer.begin() + expected_telegram_size); + ByteArray body(m_raw_buffer.begin() + TelegramHeader::size(), + m_raw_buffer.begin() + expected_telegram_size); uint32_t actual_check_sum = body.calc_check_sum(); if (actual_check_sum == header.body_check_sum()) { // construct telegram frame if checksum matches @@ -55,7 +55,8 @@ void TelegramBuffer::take_telegram_frames(std::vector& r result.push_back(telegram_frame_ptr); } else { - m_errors.push_back("wrong checkSums " + std::to_string(actual_check_sum) +" for " + header.info() + " , drop this chunk"); + m_errors.push_back("wrong checkSums " + std::to_string(actual_check_sum) + " for " + header.info() + + " , drop this chunk"); } m_raw_buffer.erase(m_raw_buffer.begin(), m_raw_buffer.begin() + expected_telegram_size); m_header_opt.reset(); diff --git a/vpr/src/server/telegrambuffer.h b/vpr/src/server/telegrambuffer.h index b5822e9a5c6..f7e2abba229 100644 --- a/vpr/src/server/telegrambuffer.h +++ b/vpr/src/server/telegrambuffer.h @@ -17,20 +17,20 @@ namespace comm { * @brief Implements Telegram Buffer as a wrapper over BytesArray * * It aggregates received bytes and assists in extracting telegram frames ( @ref TelegramFrame ) from the raw byte buffer. -*/ -class TelegramBuffer -{ + */ +class TelegramBuffer { inline static const std::size_t DEFAULT_SIZE_HINT = 1024; -public: + public: /** * @brief Constructs a TelegramBuffer object with a specified size hint. * * This constructor initializes a TelegramBuffer object with a specified size hint for the raw buffer. */ - explicit TelegramBuffer(std::size_t size_hint = DEFAULT_SIZE_HINT): m_raw_buffer(size_hint) {} + explicit TelegramBuffer(std::size_t size_hint = DEFAULT_SIZE_HINT) + : m_raw_buffer(size_hint) {} - ~TelegramBuffer()=default; + ~TelegramBuffer() = default; /** * @brief Check if internal byte buffer is empty. @@ -77,7 +77,7 @@ class TelegramBuffer */ const ByteArray& data() const { return m_raw_buffer; } -private: + private: ByteArray m_raw_buffer; std::vector m_errors; std::optional m_header_opt; diff --git a/vpr/src/server/telegramframe.h b/vpr/src/server/telegramframe.h index e2237de3e36..2fc0c312a73 100644 --- a/vpr/src/server/telegramframe.h +++ b/vpr/src/server/telegramframe.h @@ -11,19 +11,19 @@ namespace comm { /** -* @brief Structure representing a TelegramFrame. -* -* A TelegramFrame consists of a TelegramHeader followed by data. -*/ + * @brief Structure representing a TelegramFrame. + * + * A TelegramFrame consists of a TelegramHeader followed by data. + */ struct TelegramFrame { /** - * @brief header The TelegramHeader containing metadata about the telegram message. - */ + * @brief header The TelegramHeader containing metadata about the telegram message. + */ TelegramHeader header; /** - * @brief body The actual data of the telegram message. - */ + * @brief body The actual data of the telegram message. + */ ByteArray body; }; using TelegramFramePtr = std::shared_ptr; diff --git a/vpr/src/server/telegramheader.cpp b/vpr/src/server/telegramheader.cpp index f1f05a4864e..96d9dbf5c8e 100644 --- a/vpr/src/server/telegramheader.cpp +++ b/vpr/src/server/telegramheader.cpp @@ -23,7 +23,8 @@ TelegramHeader::TelegramHeader(uint32_t length, uint32_t check_sum, uint8_t comp std::memcpy(m_buffer.data() + TelegramHeader::CHECKSUM_OFFSET, &check_sum, TelegramHeader::CHECKSUM_SIZE); // Write compressor id - std::memcpy(m_buffer.data() + TelegramHeader::COMPRESSORID_OFFSET, &compressor_id, TelegramHeader::COMPRESSORID_SIZE); + std::memcpy(m_buffer.data() + TelegramHeader::COMPRESSORID_OFFSET, &compressor_id, + TelegramHeader::COMPRESSORID_SIZE); m_is_valid = true; } @@ -46,7 +47,8 @@ TelegramHeader::TelegramHeader(const ByteArray& buffer) { std::memcpy(&m_body_check_sum, buffer.data() + TelegramHeader::CHECKSUM_OFFSET, TelegramHeader::CHECKSUM_SIZE); // Read the checksum from the buffer in big-endian byte order - std::memcpy(&m_compressor_id, buffer.data() + TelegramHeader::COMPRESSORID_OFFSET, TelegramHeader::COMPRESSORID_SIZE); + std::memcpy(&m_compressor_id, buffer.data() + TelegramHeader::COMPRESSORID_OFFSET, + TelegramHeader::COMPRESSORID_SIZE); if (m_body_bytes_num == 0) { has_error = false; @@ -64,8 +66,7 @@ TelegramHeader::TelegramHeader(const ByteArray& buffer) { std::string TelegramHeader::info() const { std::stringstream ss; ss << "header" << (m_is_valid ? "" : "(INVALID)") << "[" - << "l=" << get_pretty_size_str_from_bytes_num(m_body_bytes_num) - << "/s=" << m_body_check_sum; + << "l=" << get_pretty_size_str_from_bytes_num(m_body_bytes_num) << "/s=" << m_body_check_sum; if (m_compressor_id) { ss << "/c=" << m_compressor_id; } diff --git a/vpr/src/server/telegramheader.h b/vpr/src/server/telegramheader.h index ffe95b04ba2..833e87a4f36 100644 --- a/vpr/src/server/telegramheader.h +++ b/vpr/src/server/telegramheader.h @@ -25,7 +25,7 @@ namespace comm { * @note: The DATA_CHECKSUM field can be used to check the integrity of the telegram body on the client app side. */ class TelegramHeader { -public: + public: static constexpr const char SIGNATURE[] = "IPA"; static constexpr size_t SIGNATURE_SIZE = sizeof(SIGNATURE); static constexpr size_t LENGTH_SIZE = sizeof(uint32_t); @@ -36,7 +36,7 @@ class TelegramHeader { static constexpr size_t CHECKSUM_OFFSET = LENGTH_OFFSET + LENGTH_SIZE; static constexpr size_t COMPRESSORID_OFFSET = CHECKSUM_OFFSET + CHECKSUM_SIZE; - TelegramHeader()=default; + TelegramHeader() = default; /** * @brief Constructs a TelegramHeader object with the specified length, checksum, and optional compressor ID. @@ -56,7 +56,7 @@ class TelegramHeader { */ explicit TelegramHeader(const ByteArray& buffer); - ~TelegramHeader()=default; + ~TelegramHeader() = default; /** * @brief Constructs a TelegramHeader based on the provided body data. @@ -74,9 +74,7 @@ class TelegramHeader { * * @return The total size of the TelegramHeader. */ - static constexpr size_t size() { - return SIGNATURE_SIZE + LENGTH_SIZE + CHECKSUM_SIZE + COMPRESSORID_SIZE; - } + static constexpr size_t size() { return SIGNATURE_SIZE + LENGTH_SIZE + CHECKSUM_SIZE + COMPRESSORID_SIZE; } /** * @brief To checks if the TelegramHeader is valid. @@ -129,7 +127,7 @@ class TelegramHeader { */ std::string info() const; -private: + private: bool m_is_valid = false; ByteArray m_buffer; diff --git a/vpr/src/server/telegramoptions.cpp b/vpr/src/server/telegramoptions.cpp index fef982d1437..86c4803c0d9 100644 --- a/vpr/src/server/telegramoptions.cpp +++ b/vpr/src/server/telegramoptions.cpp @@ -8,11 +8,11 @@ #include namespace server { - + TelegramOptions::TelegramOptions(const std::string& data, const std::vector& expected_keys) { // parse data string std::vector options = vtr::split(data, ";"); - for (const std::string& option_str: options) { + for (const std::string& option_str : options) { std::vector fragments = vtr::split(option_str, ":"); if (fragments.size() == TOTAL_INDEXES_NUM) { std::string name{std::move(fragments[INDEX_NAME])}; @@ -36,14 +36,14 @@ std::map> TelegramOptions::get_map_of_sets(co std::string data_str = get_string(name); if (!data_str.empty()) { std::vector paths = vtr::split(data_str, "|"); - for (const std::string& path: paths) { + for (const std::string& path : paths) { std::vector path_struct = vtr::split(path, "#"); if (path_struct.size() == 2) { std::string path_index_str = path_struct[0]; std::string path_element_indexes_str = path_struct[1]; std::vector path_element_indexes = vtr::split(path_element_indexes_str, ","); std::set elements; - for (const std::string& path_element_index_Str: path_element_indexes) { + for (const std::string& path_element_index_Str : path_element_indexes) { if (std::optional opt_value = try_convert_to_int(path_element_index_Str)) { elements.insert(opt_value.value()); } else { @@ -91,10 +91,10 @@ bool TelegramOptions::get_bool(const std::string& name, bool fail_value) { std::string TelegramOptions::errors_str() const { std::string result; - for (const std::string& error: m_errors) { + for (const std::string& error : m_errors) { result += error + ';'; } - return result; + return result; } bool TelegramOptions::is_data_type_supported(const std::string& type) const { @@ -104,7 +104,7 @@ bool TelegramOptions::is_data_type_supported(const std::string& type) const { bool TelegramOptions::check_keys_presence(const std::vector& keys) { bool result = true; - for (const std::string& key: keys) { + for (const std::string& key : keys) { if (m_options.find(key) == m_options.end()) { m_errors.emplace_back("cannot find required option " + std::string(key)); result = false; diff --git a/vpr/src/server/telegramoptions.h b/vpr/src/server/telegramoptions.h index 41237cdde2e..41db004c8e8 100644 --- a/vpr/src/server/telegramoptions.h +++ b/vpr/src/server/telegramoptions.h @@ -10,30 +10,25 @@ #include namespace server { - + /** * @brief Option class Parser * * Parse the string of options in the format "TYPE:KEY1:VALUE1;TYPE:KEY2:VALUE2", * for example "int:path_num:11;string:path_type:debug;int:details_level:3;bool:is_flat_routing:0". * It provides a simple interface to check value presence and access them. -*/ + */ class TelegramOptions { -private: - enum { - INDEX_TYPE=0, - INDEX_NAME, - INDEX_VALUE, - TOTAL_INDEXES_NUM - }; + private: + enum { INDEX_TYPE = 0, INDEX_NAME, INDEX_VALUE, TOTAL_INDEXES_NUM }; struct Option { std::string type; std::string value; }; -public: + public: /** * @brief Constructs a TelegramOptions object with the provided data and expected keys. * @@ -45,7 +40,7 @@ class TelegramOptions { * @param expected_keys A vector of strings representing the expected keys in the options. */ TelegramOptions(const std::string& data, const std::vector& expected_keys); - ~TelegramOptions()=default; + ~TelegramOptions() = default; /** * @brief Checks if there are any errors present. @@ -115,7 +110,7 @@ class TelegramOptions { */ std::string errors_str() const; -private: + private: std::unordered_map m_options; std::vector m_errors; diff --git a/vpr/src/server/telegramparser.cpp b/vpr/src/server/telegramparser.cpp index ed691841097..482e570689d 100644 --- a/vpr/src/server/telegramparser.cpp +++ b/vpr/src/server/telegramparser.cpp @@ -8,7 +8,8 @@ namespace comm { -std::optional TelegramParser::try_extract_json_value_str(const std::string& json_string, const std::string& key) { +std::optional TelegramParser::try_extract_json_value_str(const std::string& json_string, + const std::string& key) { constexpr const char end_key_pattern[] = {"\":\""}; // Find the position of the key diff --git a/vpr/src/server/telegramparser.h b/vpr/src/server/telegramparser.h index 23e942f1d9d..3d91e245788 100644 --- a/vpr/src/server/telegramparser.h +++ b/vpr/src/server/telegramparser.h @@ -15,7 +15,7 @@ namespace comm { * from a JSON schema structured as follows: {JOB_ID:num, CMD:enum, OPTIONS:string, DATA:string, STATUS:num}. */ class TelegramParser { -public: + public: /** * @brief Attempts to extract the JOB_ID field from a given message. * @@ -76,8 +76,9 @@ class TelegramParser { */ static std::optional try_extract_field_status(const std::string& message); -private: - static std::optional try_extract_json_value_str(const std::string& json_string, const std::string& key); + private: + static std::optional try_extract_json_value_str(const std::string& json_string, + const std::string& key); }; } // namespace comm diff --git a/vpr/src/server/zlibutils.h b/vpr/src/server/zlibutils.h index a531fe2bcc9..c9ca7cded52 100644 --- a/vpr/src/server/zlibutils.h +++ b/vpr/src/server/zlibutils.h @@ -9,31 +9,31 @@ constexpr const int BYTES_NUM_IN_32KB = 32768; /** -* @brief Compresses the input sequence using zlib. -* -* This function takes a string representing the decompressed data as input -* and compresses it using zlib. If compression is successful, the compressed -* data is returned as an optional string. If compression fails, an empty optional -* is returned. -* -* @param decompressed The input string representing the decompressed data. -* @return An optional string containing the compressed data if compression is successful, -* or an empty optional if compression fails. -*/ + * @brief Compresses the input sequence using zlib. + * + * This function takes a string representing the decompressed data as input + * and compresses it using zlib. If compression is successful, the compressed + * data is returned as an optional string. If compression fails, an empty optional + * is returned. + * + * @param decompressed The input string representing the decompressed data. + * @return An optional string containing the compressed data if compression is successful, + * or an empty optional if compression fails. + */ std::optional try_compress(const std::string& decompressed); /** -* @brief Decompresses the compressed sequence using zlib. -* -* This function takes a string representing the compressed data as input -* and decompresses it using zlib. If decompression is successful, the decompressed -* data is returned as an optional string. If decompression fails, an empty optional -* is returned. -* -* @param compressed The input string representing the compressed data. -* @return An optional string containing the decompressed data if decompression is successful, -* or an empty optional if decompression fails. -*/ + * @brief Decompresses the compressed sequence using zlib. + * + * This function takes a string representing the compressed data as input + * and decompresses it using zlib. If decompression is successful, the decompressed + * data is returned as an optional string. If decompression fails, an empty optional + * is returned. + * + * @param compressed The input string representing the compressed data. + * @return An optional string containing the decompressed data if decompression is successful, + * or an empty optional if decompression fails. + */ std::optional try_decompress(const std::string& compressed); #endif /* NO_SERVER */ diff --git a/vpr/src/timing/DelayType.h b/vpr/src/timing/DelayType.h index 77d3144708b..c373ade4af3 100644 --- a/vpr/src/timing/DelayType.h +++ b/vpr/src/timing/DelayType.h @@ -1,10 +1,6 @@ #ifndef VPR_DELAY_TYPE #define VPR_DELAY_TYPE -enum class DelayType { - MAX = 0, - MIN, - NUM_DELAY_TYPES -}; +enum class DelayType { MAX = 0, MIN, NUM_DELAY_TYPES }; #endif diff --git a/vpr/src/timing/NetPinTimingInvalidator.h b/vpr/src/timing/NetPinTimingInvalidator.h index f452b95bd7a..022e0441d1b 100644 --- a/vpr/src/timing/NetPinTimingInvalidator.h +++ b/vpr/src/timing/NetPinTimingInvalidator.h @@ -8,7 +8,7 @@ #include "vtr_vec_id_set.h" #ifdef VPR_USE_TBB -# include +#include #endif /** Make NetPinTimingInvalidator a virtual class since it does nothing for the general case of non-incremental @@ -43,7 +43,8 @@ class IncrNetPinTimingInvalidator : public NetPinTimingInvalidator { for (ParentPinId pin_id : net_list.pins()) { pin_first_edge_.push_back(timing_edges_.size()); if (is_flat) { - tatum::EdgeId tedge = atom_pin_to_timing_edge(timing_graph, atom_nlist, atom_lookup, convert_to_atom_pin_id(pin_id)); + tatum::EdgeId tedge + = atom_pin_to_timing_edge(timing_graph, atom_nlist, atom_lookup, convert_to_atom_pin_id(pin_id)); if (!tedge) { continue; @@ -75,15 +76,15 @@ class IncrNetPinTimingInvalidator : public NetPinTimingInvalidator { //Returns the set of timing edges associated with the specified cluster pin tedge_range pin_timing_edges(ParentPinId pin) const { int ipin = size_t(pin); - return vtr::make_range(&timing_edges_[pin_first_edge_[ipin]], - &timing_edges_[pin_first_edge_[ipin + 1]]); + return vtr::make_range(&timing_edges_[pin_first_edge_[ipin]], &timing_edges_[pin_first_edge_[ipin + 1]]); } /** Invalidates all timing edges associated with the clustered netlist connection * driving the specified pin. * Is concurrently safe. */ void invalidate_connection(ParentPinId pin, TimingInfo* timing_info) { - if (invalidated_pins_.count(pin)) return; //Already invalidated + if (invalidated_pins_.count(pin)) + return; //Already invalidated for (tatum::EdgeId edge : pin_timing_edges(pin)) { timing_info->invalidate_delay(edge); @@ -94,9 +95,7 @@ class IncrNetPinTimingInvalidator : public NetPinTimingInvalidator { /** Resets invalidation state for this class * Not concurrently safe! */ - void reset() { - invalidated_pins_.clear(); - } + void reset() { invalidated_pins_.clear(); } private: tatum::EdgeId atom_pin_to_timing_edge(const tatum::TimingGraph& timing_graph, @@ -148,11 +147,9 @@ class NoopNetPinTimingInvalidator : public NetPinTimingInvalidator { return vtr::make_range((const tatum::EdgeId*)nullptr, (const tatum::EdgeId*)nullptr); } - void invalidate_connection(ParentPinId /* pin */, TimingInfo* /* timing_info */) { - } + void invalidate_connection(ParentPinId /* pin */, TimingInfo* /* timing_info */) {} - void reset() { - } + void reset() {} }; /** Make a NetPinTimingInvalidator depending on update_type. Will return a NoopInvalidator if it's not INCREMENTAL. */ @@ -168,6 +165,7 @@ inline std::unique_ptr make_net_pin_timing_invalidator( return std::make_unique(); } else { VTR_ASSERT(update_type == e_timing_update_type::INCREMENTAL); - return std::make_unique(net_list, clb_atom_pin_lookup, atom_nlist, atom_lookup, timing_graph, is_flat); + return std::make_unique(net_list, clb_atom_pin_lookup, atom_nlist, atom_lookup, + timing_graph, is_flat); } } \ No newline at end of file diff --git a/vpr/src/timing/PostClusterDelayCalculator.h b/vpr/src/timing/PostClusterDelayCalculator.h index fc89373b955..81b6d47ce4b 100644 --- a/vpr/src/timing/PostClusterDelayCalculator.h +++ b/vpr/src/timing/PostClusterDelayCalculator.h @@ -40,7 +40,9 @@ class PostClusterDelayCalculator : public tatum::DelayCalculator { //Returns the generic edge delay tatum::Time calc_edge_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id, DelayType delay_type) const; - tatum::Time atom_combinational_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id, DelayType delay_type) const; + tatum::Time atom_combinational_delay(const tatum::TimingGraph& tg, + tatum::EdgeId edge_id, + DelayType delay_type) const; tatum::Time atom_clock_to_q_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id, DelayType delay_type) const; tatum::Time atom_net_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id, DelayType delay_type) const; diff --git a/vpr/src/timing/PostClusterDelayCalculator.tpp b/vpr/src/timing/PostClusterDelayCalculator.tpp index 7f6cda39022..00e5ae8dc61 100644 --- a/vpr/src/timing/PostClusterDelayCalculator.tpp +++ b/vpr/src/timing/PostClusterDelayCalculator.tpp @@ -24,8 +24,10 @@ inline PostClusterDelayCalculator::PostClusterDelayCalculator(const AtomNetlist& , driver_clb_max_delay_cache_(g_vpr_ctx.timing().graph->edges().size(), tatum::Time(NAN)) , sink_clb_min_delay_cache_(g_vpr_ctx.timing().graph->edges().size(), tatum::Time(NAN)) , sink_clb_max_delay_cache_(g_vpr_ctx.timing().graph->edges().size(), tatum::Time(NAN)) - , pin_cache_min_(g_vpr_ctx.timing().graph->edges().size(), std::pair(ParentPinId::INVALID(), ParentPinId::INVALID())) - , pin_cache_max_(g_vpr_ctx.timing().graph->edges().size(), std::pair(ParentPinId::INVALID(), ParentPinId::INVALID())) + , pin_cache_min_(g_vpr_ctx.timing().graph->edges().size(), + std::pair(ParentPinId::INVALID(), ParentPinId::INVALID())) + , pin_cache_max_(g_vpr_ctx.timing().graph->edges().size(), + std::pair(ParentPinId::INVALID(), ParentPinId::INVALID())) , is_flat_(is_flat) {} inline void PostClusterDelayCalculator::clear_cache() { @@ -35,26 +37,26 @@ inline void PostClusterDelayCalculator::clear_cache() { std::fill(driver_clb_max_delay_cache_.begin(), driver_clb_max_delay_cache_.end(), tatum::Time(NAN)); std::fill(sink_clb_min_delay_cache_.begin(), sink_clb_min_delay_cache_.end(), tatum::Time(NAN)); std::fill(sink_clb_max_delay_cache_.begin(), sink_clb_max_delay_cache_.end(), tatum::Time(NAN)); - std::fill(pin_cache_min_.begin(), pin_cache_min_.end(), std::pair(ParentPinId::INVALID(), ParentPinId::INVALID())); - std::fill(pin_cache_max_.begin(), pin_cache_max_.end(), std::pair(ParentPinId::INVALID(), ParentPinId::INVALID())); + std::fill(pin_cache_min_.begin(), pin_cache_min_.end(), + std::pair(ParentPinId::INVALID(), ParentPinId::INVALID())); + std::fill(pin_cache_max_.begin(), pin_cache_max_.end(), + std::pair(ParentPinId::INVALID(), ParentPinId::INVALID())); } -inline void PostClusterDelayCalculator::set_tsu_margin_relative(float new_margin) { - tsu_margin_rel_ = new_margin; -} +inline void PostClusterDelayCalculator::set_tsu_margin_relative(float new_margin) { tsu_margin_rel_ = new_margin; } -inline void PostClusterDelayCalculator::set_tsu_margin_absolute(float new_margin) { - tsu_margin_abs_ = new_margin; -} +inline void PostClusterDelayCalculator::set_tsu_margin_absolute(float new_margin) { tsu_margin_abs_ = new_margin; } -inline tatum::Time PostClusterDelayCalculator::max_edge_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id) const { +inline tatum::Time PostClusterDelayCalculator::max_edge_delay(const tatum::TimingGraph& tg, + tatum::EdgeId edge_id) const { #ifdef POST_CLUSTER_DELAY_CALC_DEBUG VTR_LOG("=== Edge %zu (max) ===\n", size_t(edge_id)); #endif return calc_edge_delay(tg, edge_id, DelayType::MAX); } -inline tatum::Time PostClusterDelayCalculator::min_edge_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id) const { +inline tatum::Time PostClusterDelayCalculator::min_edge_delay(const tatum::TimingGraph& tg, + tatum::EdgeId edge_id) const { #ifdef POST_CLUSTER_DELAY_CALC_DEBUG VTR_LOG("=== Edge %zu (min) ===\n", size_t(edge_id)); #endif @@ -75,7 +77,9 @@ inline tatum::Time PostClusterDelayCalculator::hold_time(const tatum::TimingGrap return atom_hold_time(tg, edge_id); } -inline tatum::Time PostClusterDelayCalculator::calc_edge_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge, DelayType delay_type) const { +inline tatum::Time PostClusterDelayCalculator::calc_edge_delay(const tatum::TimingGraph& tg, + tatum::EdgeId edge, + DelayType delay_type) const { tatum::EdgeType edge_type = tg.edge_type(edge); if (edge_type == tatum::EdgeType::PRIMITIVE_COMBINATIONAL) { return atom_combinational_delay(tg, edge, delay_type); @@ -92,7 +96,9 @@ inline tatum::Time PostClusterDelayCalculator::calc_edge_delay(const tatum::Timi return tatum::Time(NAN); //Suppress compiler warning } -inline tatum::Time PostClusterDelayCalculator::atom_combinational_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id, DelayType delay_type) const { +inline tatum::Time PostClusterDelayCalculator::atom_combinational_delay(const tatum::TimingGraph& tg, + tatum::EdgeId edge_id, + DelayType delay_type) const { tatum::Time delay = get_cached_delay(edge_id, delay_type); if (std::isnan(delay.value())) { @@ -115,7 +121,8 @@ inline tatum::Time PostClusterDelayCalculator::atom_combinational_delay(const ta return delay; } -inline tatum::Time PostClusterDelayCalculator::atom_setup_time(const tatum::TimingGraph& tg, tatum::EdgeId edge_id) const { +inline tatum::Time PostClusterDelayCalculator::atom_setup_time(const tatum::TimingGraph& tg, + tatum::EdgeId edge_id) const { tatum::Time tsu = get_cached_setup_time(edge_id); if (std::isnan(tsu.value())) { @@ -140,7 +147,8 @@ inline tatum::Time PostClusterDelayCalculator::atom_setup_time(const tatum::Timi return tsu; } -inline tatum::Time PostClusterDelayCalculator::atom_hold_time(const tatum::TimingGraph& tg, tatum::EdgeId edge_id) const { +inline tatum::Time PostClusterDelayCalculator::atom_hold_time(const tatum::TimingGraph& tg, + tatum::EdgeId edge_id) const { tatum::Time thld = get_cached_hold_time(edge_id); if (std::isnan(thld.value())) { @@ -165,7 +173,9 @@ inline tatum::Time PostClusterDelayCalculator::atom_hold_time(const tatum::Timin return thld; } -inline tatum::Time PostClusterDelayCalculator::atom_clock_to_q_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id, DelayType delay_type) const { +inline tatum::Time PostClusterDelayCalculator::atom_clock_to_q_delay(const tatum::TimingGraph& tg, + tatum::EdgeId edge_id, + DelayType delay_type) const { tatum::Time tco = get_cached_delay(edge_id, delay_type); if (std::isnan(tco.value())) { @@ -190,7 +200,9 @@ inline tatum::Time PostClusterDelayCalculator::atom_clock_to_q_delay(const tatum return tco; } -inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::TimingGraph& tg, tatum::EdgeId edge_id, DelayType delay_type) const { +inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::TimingGraph& tg, + tatum::EdgeId edge_id, + DelayType delay_type) const { //A net in the atom netlist consists of several different delay components: // // delay = launch_cluster_delay + inter_cluster_delay + capture_cluster_delay @@ -263,8 +275,10 @@ inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::Timin int src_pb_route_id = src_gpin->pin_count_in_cluster; int sink_pb_route_id = sink_gpin->pin_count_in_cluster; - VTR_ASSERT(cluster_ctx.clb_nlist.block_pb(clb_src_block)->pb_route[src_pb_route_id].atom_net_id == atom_net); - VTR_ASSERT(cluster_ctx.clb_nlist.block_pb(clb_sink_block)->pb_route[sink_pb_route_id].atom_net_id == atom_net); + VTR_ASSERT(cluster_ctx.clb_nlist.block_pb(clb_src_block)->pb_route[src_pb_route_id].atom_net_id + == atom_net); + VTR_ASSERT(cluster_ctx.clb_nlist.block_pb(clb_sink_block)->pb_route[sink_pb_route_id].atom_net_id + == atom_net); //NOTE: even if both the source and sink atoms are contained in the same top-level // CLB, the connection between them may not have been absorbed, and may go @@ -273,9 +287,11 @@ inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::Timin //We trace the delay backward from the atom sink pin to the source //Either the atom source pin (in the same cluster), or a cluster input pin ClusterNetId cluster_net_id = ClusterNetId::INVALID(); - std::tie(cluster_net_id, sink_block_pin_index, sink_net_pin_index) = find_pb_route_clb_input_net_pin(clb_sink_block, sink_pb_route_id); + std::tie(cluster_net_id, sink_block_pin_index, sink_net_pin_index) + = find_pb_route_clb_input_net_pin(clb_sink_block, sink_pb_route_id); - if (cluster_net_id != ClusterNetId::INVALID() && sink_block_pin_index != -1 && sink_net_pin_index != -1) { + if (cluster_net_id != ClusterNetId::INVALID() && sink_block_pin_index != -1 + && sink_net_pin_index != -1) { //Connection leaves the CLB ClusterBlockId driver_block_id = cluster_ctx.clb_nlist.net_driver_block(cluster_net_id); VTR_ASSERT(driver_block_id == clb_src_block); @@ -283,17 +299,14 @@ inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::Timin src_block_pin_index = cluster_ctx.clb_nlist.net_pin_logical_index(cluster_net_id, 0); VTR_ASSERT(src_block_pin_index >= 0); - tatum::Time driver_clb_delay = tatum::Time(clb_delay_calc_.internal_src_to_clb_output_delay(driver_block_id, - src_block_pin_index, - src_pb_route_id, - delay_type)); + tatum::Time driver_clb_delay = tatum::Time(clb_delay_calc_.internal_src_to_clb_output_delay( + driver_block_id, src_block_pin_index, src_pb_route_id, delay_type)); - tatum::Time net_delay = tatum::Time(inter_cluster_delay((ParentNetId&)cluster_net_id, 0, sink_net_pin_index)); + tatum::Time net_delay + = tatum::Time(inter_cluster_delay((ParentNetId&)cluster_net_id, 0, sink_net_pin_index)); - tatum::Time sink_clb_delay = tatum::Time(clb_delay_calc_.clb_input_to_internal_sink_delay(clb_sink_block, - sink_block_pin_index, - sink_pb_route_id, - delay_type)); + tatum::Time sink_clb_delay = tatum::Time(clb_delay_calc_.clb_input_to_internal_sink_delay( + clb_sink_block, sink_block_pin_index, sink_pb_route_id, delay_type)); edge_delay = driver_clb_delay + net_delay + sink_clb_delay; @@ -303,24 +316,23 @@ inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::Timin set_sink_clb_cached_delay(edge_id, delay_type, sink_clb_delay); ClusterPinId cluster_src_pin = cluster_ctx.clb_nlist.net_driver(cluster_net_id); - ClusterPinId cluster_sink_pin = *(cluster_ctx.clb_nlist.net_pins(cluster_net_id).begin() + sink_net_pin_index); + ClusterPinId cluster_sink_pin + = *(cluster_ctx.clb_nlist.net_pins(cluster_net_id).begin() + sink_net_pin_index); VTR_ASSERT(cluster_src_pin != ClusterPinId::INVALID()); VTR_ASSERT(cluster_sink_pin != ClusterPinId::INVALID()); set_cached_pins(edge_id, delay_type, (ParentPinId&)cluster_src_pin, (ParentPinId&)cluster_sink_pin); #ifdef POST_CLUSTER_DELAY_CALC_DEBUG VTR_LOG(" Edge %zu net delay: %g = %g + %g + %g (= clb_driver + net + clb_sink) [UNcached]\n", - size_t(edge_id), - edge_delay.value(), - driver_clb_delay.value(), - net_delay.value(), + size_t(edge_id), edge_delay.value(), driver_clb_delay.value(), net_delay.value(), sink_clb_delay.value()); #endif } else { //Connection entirely within the CLB VTR_ASSERT(clb_src_block == clb_sink_block); - edge_delay = tatum::Time(clb_delay_calc_.internal_src_to_internal_sink_delay(clb_src_block, src_pb_route_id, sink_pb_route_id, delay_type)); + edge_delay = tatum::Time(clb_delay_calc_.internal_src_to_internal_sink_delay( + clb_src_block, src_pb_route_id, sink_pb_route_id, delay_type)); //Save the delay, since it won't change during placement or routing // Note that we cache the full edge delay for edges completely contained within CLBs @@ -342,9 +354,8 @@ inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::Timin AtomNetId atom_src_net = g_vpr_ctx.atom().nlist.pin_net((AtomPinId&)src_pin); VTR_ASSERT(atom_src_net == g_vpr_ctx.atom().nlist.pin_net((AtomPinId&)sink_pin)); sink_net_pin_index = g_vpr_ctx.atom().nlist.pin_net_index((AtomPinId&)sink_pin); - tatum::Time net_delay = tatum::Time(inter_cluster_delay((ParentNetId&)atom_src_net, - 0, - sink_net_pin_index)); + tatum::Time net_delay + = tatum::Time(inter_cluster_delay((ParentNetId&)atom_src_net, 0, sink_net_pin_index)); edge_delay = /* driver_clb_delay=0 + */ net_delay /* + sink_clb_delay=0 */; } else { @@ -357,18 +368,14 @@ inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::Timin ClusterNetId src_net = cluster_ctx.clb_nlist.pin_net((ClusterPinId&)src_pin); VTR_ASSERT(src_net == cluster_ctx.clb_nlist.pin_net((ClusterPinId&)sink_pin)); - tatum::Time net_delay = tatum::Time(inter_cluster_delay((ParentNetId&)src_net, - 0, - cluster_ctx.clb_nlist.pin_net_index((ClusterPinId&)sink_pin))); + tatum::Time net_delay = tatum::Time(inter_cluster_delay( + (ParentNetId&)src_net, 0, cluster_ctx.clb_nlist.pin_net_index((ClusterPinId&)sink_pin))); edge_delay = driver_clb_delay + net_delay + sink_clb_delay; } #ifdef POST_CLUSTER_DELAY_CALC_DEBUG VTR_LOG(" Edge %zu net delay: %g = %g + %g + %g (= clb_driver + net + clb_sink) [Cached]\n", - size_t(edge_id), - edge_delay.value(), - driver_clb_delay.value(), - net_delay.value(), + size_t(edge_id), edge_delay.value(), driver_clb_delay.value(), net_delay.value(), sink_clb_delay.value()); #endif } @@ -383,7 +390,9 @@ inline tatum::Time PostClusterDelayCalculator::atom_net_delay(const tatum::Timin return edge_delay; } -inline float PostClusterDelayCalculator::inter_cluster_delay(const ParentNetId net_id, const int src_net_pin_index, const int sink_net_pin_index) const { +inline float PostClusterDelayCalculator::inter_cluster_delay(const ParentNetId net_id, + const int src_net_pin_index, + const int sink_net_pin_index) const { VTR_ASSERT(src_net_pin_index == 0); //TODO: support minimum net delays @@ -399,7 +408,9 @@ inline tatum::Time PostClusterDelayCalculator::get_cached_delay(tatum::EdgeId ed } } -inline void PostClusterDelayCalculator::set_cached_delay(tatum::EdgeId edge, DelayType delay_type, tatum::Time delay) const { +inline void PostClusterDelayCalculator::set_cached_delay(tatum::EdgeId edge, + DelayType delay_type, + tatum::Time delay) const { if (delay_type == DelayType::MAX) { edge_max_delay_cache_[edge] = delay; } else { @@ -408,7 +419,9 @@ inline void PostClusterDelayCalculator::set_cached_delay(tatum::EdgeId edge, Del } } -inline void PostClusterDelayCalculator::set_driver_clb_cached_delay(tatum::EdgeId edge, DelayType delay_type, tatum::Time delay) const { +inline void PostClusterDelayCalculator::set_driver_clb_cached_delay(tatum::EdgeId edge, + DelayType delay_type, + tatum::Time delay) const { if (delay_type == DelayType::MAX) { driver_clb_max_delay_cache_[edge] = delay; } else { @@ -417,7 +430,8 @@ inline void PostClusterDelayCalculator::set_driver_clb_cached_delay(tatum::EdgeI } } -inline tatum::Time PostClusterDelayCalculator::get_driver_clb_cached_delay(tatum::EdgeId edge, DelayType delay_type) const { +inline tatum::Time PostClusterDelayCalculator::get_driver_clb_cached_delay(tatum::EdgeId edge, + DelayType delay_type) const { if (delay_type == DelayType::MAX) { return driver_clb_max_delay_cache_[edge]; } else { @@ -426,7 +440,9 @@ inline tatum::Time PostClusterDelayCalculator::get_driver_clb_cached_delay(tatum } } -inline void PostClusterDelayCalculator::set_sink_clb_cached_delay(tatum::EdgeId edge, DelayType delay_type, tatum::Time delay) const { +inline void PostClusterDelayCalculator::set_sink_clb_cached_delay(tatum::EdgeId edge, + DelayType delay_type, + tatum::Time delay) const { if (delay_type == DelayType::MAX) { sink_clb_max_delay_cache_[edge] = delay; } else { @@ -435,7 +451,8 @@ inline void PostClusterDelayCalculator::set_sink_clb_cached_delay(tatum::EdgeId } } -inline tatum::Time PostClusterDelayCalculator::get_sink_clb_cached_delay(tatum::EdgeId edge, DelayType delay_type) const { +inline tatum::Time PostClusterDelayCalculator::get_sink_clb_cached_delay(tatum::EdgeId edge, + DelayType delay_type) const { if (delay_type == DelayType::MAX) { return sink_clb_max_delay_cache_[edge]; } else { @@ -464,7 +481,8 @@ inline void PostClusterDelayCalculator::set_cached_hold_time(tatum::EdgeId edge, edge_min_delay_cache_[edge] = hold; } -inline std::pair PostClusterDelayCalculator::get_cached_pins(tatum::EdgeId edge, DelayType delay_type) const { +inline std::pair PostClusterDelayCalculator::get_cached_pins(tatum::EdgeId edge, + DelayType delay_type) const { if (delay_type == DelayType::MAX) { return pin_cache_max_[edge]; } else { @@ -473,7 +491,10 @@ inline std::pair PostClusterDelayCalculator::get_cache } } -inline void PostClusterDelayCalculator::set_cached_pins(tatum::EdgeId edge, DelayType delay_type, ParentPinId src_pin, ParentPinId sink_pin) const { +inline void PostClusterDelayCalculator::set_cached_pins(tatum::EdgeId edge, + DelayType delay_type, + ParentPinId src_pin, + ParentPinId sink_pin) const { if (delay_type == DelayType::MAX) { pin_cache_max_[edge] = std::make_pair(src_pin, sink_pin); } else { diff --git a/vpr/src/timing/PreClusterDelayCalculator.h b/vpr/src/timing/PreClusterDelayCalculator.h index a4177fd6126..ebf558a00c3 100644 --- a/vpr/src/timing/PreClusterDelayCalculator.h +++ b/vpr/src/timing/PreClusterDelayCalculator.h @@ -50,8 +50,10 @@ class PreClusterDelayCalculator : public tatum::DelayCalculator { tatum::NodeId sink_node = tg.edge_sink_node(edge_id); auto edge_type = tg.edge_type(edge_id); - VTR_ASSERT_MSG(tg.node_type(src_node) == tatum::NodeType::CPIN, "Edge setup time only valid if source node is a CPIN"); - VTR_ASSERT_MSG(tg.node_type(sink_node) == tatum::NodeType::SINK, "Edge setup time only valid if sink node is a SINK"); + VTR_ASSERT_MSG(tg.node_type(src_node) == tatum::NodeType::CPIN, + "Edge setup time only valid if source node is a CPIN"); + VTR_ASSERT_MSG(tg.node_type(sink_node) == tatum::NodeType::SINK, + "Edge setup time only valid if sink node is a SINK"); VTR_ASSERT(edge_type == tatum::EdgeType::PRIMITIVE_CLOCK_CAPTURE); AtomPinId sink_pin = netlist_lookup_.tnode_atom_pin(sink_node); @@ -79,9 +81,9 @@ class PreClusterDelayCalculator : public tatum::DelayCalculator { //TODO: use generic AtomDelayCalc class to avoid code duplication tatum::Time prim_tcq_delay(const tatum::TimingGraph& tg, tatum::NodeId src_node, tatum::NodeId sink_node) const { - VTR_ASSERT_MSG(tg.node_type(src_node) == tatum::NodeType::CPIN - && tg.node_type(sink_node) == tatum::NodeType::SOURCE, - "Tcq only defined from CPIN to SOURCE"); + VTR_ASSERT_MSG( + tg.node_type(src_node) == tatum::NodeType::CPIN && tg.node_type(sink_node) == tatum::NodeType::SOURCE, + "Tcq only defined from CPIN to SOURCE"); AtomPinId sink_pin = netlist_lookup_.tnode_atom_pin(sink_node); VTR_ASSERT(sink_pin); @@ -154,7 +156,8 @@ class PreClusterDelayCalculator : public tatum::DelayCalculator { if (!clock_gpin) { AtomBlockId blk = netlist_.pin_block(io_pin); const t_model* model = netlist_.block_model(blk); - VPR_FATAL_ERROR(VPR_ERROR_TIMING, "Failed to find clock pin associated with pin '%s' (model '%s')", netlist_.pin_name(io_pin).c_str(), model->name); + VPR_FATAL_ERROR(VPR_ERROR_TIMING, "Failed to find clock pin associated with pin '%s' (model '%s')", + netlist_.pin_name(io_pin).c_str(), model->name); } return clock_gpin; } diff --git a/vpr/src/timing/PreClusterTimingGraphResolver.cpp b/vpr/src/timing/PreClusterTimingGraphResolver.cpp index c94d961c84f..b7e466c281e 100644 --- a/vpr/src/timing/PreClusterTimingGraphResolver.cpp +++ b/vpr/src/timing/PreClusterTimingGraphResolver.cpp @@ -2,11 +2,10 @@ #include "atom_netlist.h" #include "atom_lookup.h" -PreClusterTimingGraphResolver::PreClusterTimingGraphResolver( - const AtomNetlist& netlist, - const AtomLookup& netlist_lookup, - const tatum::TimingGraph& timing_graph, - const tatum::DelayCalculator& delay_calc) +PreClusterTimingGraphResolver::PreClusterTimingGraphResolver(const AtomNetlist& netlist, + const AtomLookup& netlist_lookup, + const tatum::TimingGraph& timing_graph, + const tatum::DelayCalculator& delay_calc) : netlist_(netlist) , netlist_lookup_(netlist_lookup) , timing_graph_(timing_graph) @@ -40,7 +39,8 @@ std::string PreClusterTimingGraphResolver::node_type_name(tatum::NodeId node) co return name; } -tatum::EdgeDelayBreakdown PreClusterTimingGraphResolver::edge_delay_breakdown(tatum::EdgeId edge, tatum::DelayType tatum_delay_type) const { +tatum::EdgeDelayBreakdown PreClusterTimingGraphResolver::edge_delay_breakdown(tatum::EdgeId edge, + tatum::DelayType tatum_delay_type) const { tatum::EdgeDelayBreakdown delay_breakdown; if (edge && detail_level() == e_timing_report_detail::AGGREGATED) { @@ -113,9 +113,7 @@ tatum::EdgeDelayBreakdown PreClusterTimingGraphResolver::edge_delay_breakdown(ta return delay_breakdown; } -e_timing_report_detail PreClusterTimingGraphResolver::detail_level() const { - return detail_level_; -} +e_timing_report_detail PreClusterTimingGraphResolver::detail_level() const { return detail_level_; } void PreClusterTimingGraphResolver::set_detail_level(e_timing_report_detail report_detail) { detail_level_ = report_detail; diff --git a/vpr/src/timing/PreClusterTimingGraphResolver.h b/vpr/src/timing/PreClusterTimingGraphResolver.h index ce859c1ecd6..4d9e07c5e49 100644 --- a/vpr/src/timing/PreClusterTimingGraphResolver.h +++ b/vpr/src/timing/PreClusterTimingGraphResolver.h @@ -8,11 +8,10 @@ class PreClusterTimingGraphResolver : public tatum::TimingGraphNameResolver { public: - PreClusterTimingGraphResolver( - const AtomNetlist& netlist, - const AtomLookup& netlist_lookup, - const tatum::TimingGraph& timing_graph, - const tatum::DelayCalculator& delay_calc); + PreClusterTimingGraphResolver(const AtomNetlist& netlist, + const AtomLookup& netlist_lookup, + const tatum::TimingGraph& timing_graph, + const tatum::DelayCalculator& delay_calc); std::string node_name(tatum::NodeId node) const override; std::string node_type_name(tatum::NodeId node) const override; diff --git a/vpr/src/timing/VprTimingGraphResolver.cpp b/vpr/src/timing/VprTimingGraphResolver.cpp index fa5dc1ae960..be9c6f3ff74 100644 --- a/vpr/src/timing/VprTimingGraphResolver.cpp +++ b/vpr/src/timing/VprTimingGraphResolver.cpp @@ -49,10 +49,14 @@ std::string VprTimingGraphResolver::node_type_name(tatum::NodeId node) const { return name; } -tatum::EdgeDelayBreakdown VprTimingGraphResolver::edge_delay_breakdown(tatum::EdgeId edge, tatum::DelayType tatum_delay_type) const { +tatum::EdgeDelayBreakdown VprTimingGraphResolver::edge_delay_breakdown(tatum::EdgeId edge, + tatum::DelayType tatum_delay_type) const { tatum::EdgeDelayBreakdown delay_breakdown; - if (edge && (detail_level() == e_timing_report_detail::AGGREGATED || detail_level() == e_timing_report_detail::DETAILED_ROUTING || detail_level() == e_timing_report_detail::DEBUG)) { + if (edge + && (detail_level() == e_timing_report_detail::AGGREGATED + || detail_level() == e_timing_report_detail::DETAILED_ROUTING + || detail_level() == e_timing_report_detail::DEBUG)) { auto edge_type = timing_graph_.edge_type(edge); DelayType delay_type; //TODO: should unify vpr/tatum DelayType @@ -119,7 +123,8 @@ tatum::EdgeDelayBreakdown VprTimingGraphResolver::edge_delay_breakdown(tatum::Ed return delay_breakdown; } -std::vector VprTimingGraphResolver::interconnect_delay_breakdown(tatum::EdgeId edge, DelayType delay_type) const { +std::vector VprTimingGraphResolver::interconnect_delay_breakdown(tatum::EdgeId edge, + DelayType delay_type) const { VTR_ASSERT(timing_graph_.edge_type(edge) == tatum::EdgeType::INTERCONNECT); auto& cluster_ctx = g_vpr_ctx.clustering(); auto& atom_ctx = g_vpr_ctx.atom(); @@ -239,7 +244,8 @@ std::vector VprTimingGraphResolver::interconnect_delay_br interblock_component.type_name = "inter-block routing"; interblock_component.delay = net_delay; - if ((detail_level() == e_timing_report_detail::DETAILED_ROUTING || detail_level() == e_timing_report_detail::DEBUG) + if ((detail_level() == e_timing_report_detail::DETAILED_ROUTING + || detail_level() == e_timing_report_detail::DEBUG) && !route_ctx.route_trees.empty()) { // check if detailed timing report has been selected and that the routing // is not empty. @@ -274,15 +280,13 @@ std::vector VprTimingGraphResolver::interconnect_delay_br return components; } -e_timing_report_detail VprTimingGraphResolver::detail_level() const { - return detail_level_; -} +e_timing_report_detail VprTimingGraphResolver::detail_level() const { return detail_level_; } -void VprTimingGraphResolver::set_detail_level(e_timing_report_detail report_detail) { - detail_level_ = report_detail; -} +void VprTimingGraphResolver::set_detail_level(e_timing_report_detail report_detail) { detail_level_ = report_detail; } -void VprTimingGraphResolver::get_detailed_interconnect_components(std::vector& components, ParentNetId net_id, ParentPinId sink_pin) const { +void VprTimingGraphResolver::get_detailed_interconnect_components(std::vector& components, + ParentNetId net_id, + ParentPinId sink_pin) const { /* This routine obtains the interconnect components such as: OPIN, CHANX, CHANY, IPIN which join * two intra-block clusters in two parts. In part one, we construct the route tree * from the traceback and computes its value for R, C, and Tdel. Next, we find the pointer to @@ -295,17 +299,21 @@ void VprTimingGraphResolver::get_detailed_interconnect_components(std::vector&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; + auto& netlist + = is_flat_ ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; int ipin = netlist.pin_net_index(sink_pin); - RRNodeId sink_rr_inode = RRNodeId(route_ctx.net_rr_terminals[net_id][ipin]); //obtain the value of the routing resource sink + RRNodeId sink_rr_inode + = RRNodeId(route_ctx.net_rr_terminals[net_id][ipin]); //obtain the value of the routing resource sink auto rt_sink = route_ctx.route_trees[net_id].value().find_by_rr_id(sink_rr_inode); - get_detailed_interconnect_components_helper(components, rt_sink.value()); //from sink, walk up to source and add net components + get_detailed_interconnect_components_helper(components, + rt_sink.value()); //from sink, walk up to source and add net components } -void VprTimingGraphResolver::get_detailed_interconnect_components_helper(std::vector& components, const RouteTreeNode& node) const { +void VprTimingGraphResolver::get_detailed_interconnect_components_helper(std::vector& components, + const RouteTreeNode& node) const { /* This routine comprises the second part of obtaining the interconnect components. * We begin at the sink node and travel up the tree towards the source. For each node, we would * like to retrieve information such as the routing resource type, index, and incremental delay. @@ -342,24 +350,25 @@ void VprTimingGraphResolver::get_detailed_interconnect_components_helper(std::ve // Process the current interconnect component if it is of type OPIN, CHANX, CHANY, IPIN // Only process SOURCE, SINK in debug report mode auto rr_type = rr_graph.node_type(RRNodeId(current_node->inode)); - if (rr_type == OPIN - || rr_type == IPIN - || rr_type == CHANX - || rr_type == CHANY + if (rr_type == OPIN || rr_type == IPIN || rr_type == CHANX || rr_type == CHANY || ((rr_type == SOURCE || rr_type == SINK) && (detail_level() == e_timing_report_detail::DEBUG))) { tatum::DelayComponent net_component; // declare a new instance of DelayComponent net_component.type_name = rr_graph.node_coordinate_to_string(RRNodeId(current_node->inode)); if (current_node->parent()) { - net_component.delay = tatum::Time(current_node->Tdel - current_node->parent()->Tdel); // add the incremental delay + net_component.delay + = tatum::Time(current_node->Tdel - current_node->parent()->Tdel); // add the incremental delay } else { net_component.delay = tatum::Time(0.); // No delay on SOURCE } - interconnect_components.push_back(net_component); // insert net_component into the front of vector interconnect_component + interconnect_components.push_back( + net_component); // insert net_component into the front of vector interconnect_component } current_node = current_node->parent(); } - components.insert(components.end(), interconnect_components.rbegin(), interconnect_components.rend()); // append the completed "interconnect_component" to "component_vector" + components.insert( + components.end(), interconnect_components.rbegin(), + interconnect_components.rend()); // append the completed "interconnect_component" to "component_vector" } diff --git a/vpr/src/timing/VprTimingGraphResolver.h b/vpr/src/timing/VprTimingGraphResolver.h index 7bb9eb3ba6a..f714347ccb2 100644 --- a/vpr/src/timing/VprTimingGraphResolver.h +++ b/vpr/src/timing/VprTimingGraphResolver.h @@ -28,8 +28,11 @@ class VprTimingGraphResolver : public tatum::TimingGraphNameResolver { e_timing_report_detail detail_level() const; std::vector interconnect_delay_breakdown(tatum::EdgeId edge, DelayType) const; - void get_detailed_interconnect_components(std::vector& components, ParentNetId net_id, ParentPinId sink_pin) const; - void get_detailed_interconnect_components_helper(std::vector& components, const RouteTreeNode& node) const; + void get_detailed_interconnect_components(std::vector& components, + ParentNetId net_id, + ParentPinId sink_pin) const; + void get_detailed_interconnect_components_helper(std::vector& components, + const RouteTreeNode& node) const; const AtomNetlist& netlist_; const AtomLookup& netlist_lookup_; diff --git a/vpr/src/timing/clb_delay_calc.h b/vpr/src/timing/clb_delay_calc.h index c84a2d736de..3c099949adb 100644 --- a/vpr/src/timing/clb_delay_calc.h +++ b/vpr/src/timing/clb_delay_calc.h @@ -8,13 +8,22 @@ class ClbDelayCalc { ClbDelayCalc(); //Delay from a CLB input (driven outside the CLB) to specified internal sink pin - float clb_input_to_internal_sink_delay(const ClusterBlockId block_id, const int pin_index, int internal_sink_pin, DelayType delay_type) const; + float clb_input_to_internal_sink_delay(const ClusterBlockId block_id, + const int pin_index, + int internal_sink_pin, + DelayType delay_type) const; //Delay from an internal driver to the CLB's output pin - float internal_src_to_clb_output_delay(const ClusterBlockId block_id, const int pin_index, int internal_src_pin, DelayType delay_type) const; + float internal_src_to_clb_output_delay(const ClusterBlockId block_id, + const int pin_index, + int internal_src_pin, + DelayType delay_type) const; //Delay from an internal driver to an internal sink within the same CLB - float internal_src_to_internal_sink_delay(const ClusterBlockId clb, int internal_src_pin, int internal_sink_pin, DelayType delay_type) const; + float internal_src_to_internal_sink_delay(const ClusterBlockId clb, + int internal_src_pin, + int internal_sink_pin, + DelayType delay_type) const; private: float trace_delay(ClusterBlockId clb, int src_pb_route_pin, int sink_pb_route_pin, DelayType delay_type) const; diff --git a/vpr/src/timing/concrete_timing_info.h b/vpr/src/timing/concrete_timing_info.h index 9aaae0d82ff..5735931aba6 100644 --- a/vpr/src/timing/concrete_timing_info.h +++ b/vpr/src/timing/concrete_timing_info.h @@ -66,17 +66,11 @@ class ConcreteSetupTimingInfo : public SetupTimingInfo { return sWNS_; } - float setup_pin_slack(AtomPinId pin) const override { - return slack_crit_.setup_pin_slack(pin); - } + float setup_pin_slack(AtomPinId pin) const override { return slack_crit_.setup_pin_slack(pin); } - float setup_pin_criticality(AtomPinId pin) const override { - return slack_crit_.setup_pin_criticality(pin); - } + float setup_pin_criticality(AtomPinId pin) const override { return slack_crit_.setup_pin_criticality(pin); } - pin_range pins_with_modified_setup_slack() const override { - return slack_crit_.pins_with_modified_slack(); - } + pin_range pins_with_modified_setup_slack() const override { return slack_crit_.pins_with_modified_slack(); } pin_range pins_with_modified_setup_criticality() const override { return slack_crit_.pins_with_modified_criticality(); @@ -95,9 +89,7 @@ class ConcreteSetupTimingInfo : public SetupTimingInfo { public: //Mutators - void invalidate_delay(const tatum::EdgeId edge) override { - setup_analyzer_->invalidate_edge(edge); - } + void invalidate_delay(const tatum::EdgeId edge) override { setup_analyzer_->invalidate_edge(edge); } void update() override { update_setup(); @@ -190,21 +182,13 @@ class ConcreteHoldTimingInfo : public HoldTimingInfo { public: //Accessors - float hold_total_negative_slack() const override { - return find_hold_total_negative_slack(*hold_analyzer_); - } + float hold_total_negative_slack() const override { return find_hold_total_negative_slack(*hold_analyzer_); } - float hold_worst_negative_slack() const override { - return find_hold_worst_negative_slack(*hold_analyzer_); - } + float hold_worst_negative_slack() const override { return find_hold_worst_negative_slack(*hold_analyzer_); } - float hold_pin_slack(AtomPinId pin) const override { - return slack_crit_.hold_pin_slack(pin); - } + float hold_pin_slack(AtomPinId pin) const override { return slack_crit_.hold_pin_slack(pin); } - float hold_pin_criticality(AtomPinId pin) const override { - return slack_crit_.hold_pin_criticality(pin); - } + float hold_pin_criticality(AtomPinId pin) const override { return slack_crit_.hold_pin_criticality(pin); } std::shared_ptr analyzer() const override { return hold_analyzer(); } std::shared_ptr hold_analyzer() const override { return hold_analyzer_; } @@ -214,9 +198,7 @@ class ConcreteHoldTimingInfo : public HoldTimingInfo { public: //Mutators - void invalidate_delay(const tatum::EdgeId edge) override { - hold_analyzer_->invalidate_edge(edge); - } + void invalidate_delay(const tatum::EdgeId edge) override { hold_analyzer_->invalidate_edge(edge); } void update() override { update_hold(); @@ -252,9 +234,7 @@ class ConcreteHoldTimingInfo : public HoldTimingInfo { timing_ctx.stats.num_full_hold_updates += 1; } - void update_hold_slacks() { - slack_crit_.update_slacks_and_criticalities(*timing_graph_, *hold_analyzer_); - } + void update_hold_slacks() { slack_crit_.update_slacks_and_criticalities(*timing_graph_, *hold_analyzer_); } void set_warn_unconstrained(bool val) override { warn_unconstrained_ = val; } @@ -292,7 +272,9 @@ class ConcreteSetupHoldTimingInfo : public SetupHoldTimingInfo { //Setup related std::vector critical_paths() const override { return setup_timing_.critical_paths(); } - tatum::TimingPathInfo least_slack_critical_path() const override { return setup_timing_.least_slack_critical_path(); } + tatum::TimingPathInfo least_slack_critical_path() const override { + return setup_timing_.least_slack_critical_path(); + } tatum::TimingPathInfo longest_critical_path() const override { return setup_timing_.longest_critical_path(); } float setup_total_negative_slack() const override { return setup_timing_.setup_total_negative_slack(); } @@ -302,9 +284,13 @@ class ConcreteSetupHoldTimingInfo : public SetupHoldTimingInfo { float setup_pin_criticality(AtomPinId pin) const override { return setup_timing_.setup_pin_criticality(pin); } pin_range pins_with_modified_setup_slack() const override { return setup_timing_.pins_with_modified_setup_slack(); } - pin_range pins_with_modified_setup_criticality() const override { return setup_timing_.pins_with_modified_setup_slack(); } + pin_range pins_with_modified_setup_criticality() const override { + return setup_timing_.pins_with_modified_setup_slack(); + } - std::shared_ptr setup_analyzer() const override { return setup_timing_.setup_analyzer(); } + std::shared_ptr setup_analyzer() const override { + return setup_timing_.setup_analyzer(); + } //Hold related float hold_total_negative_slack() const override { return hold_timing_.hold_total_negative_slack(); } @@ -313,22 +299,28 @@ class ConcreteSetupHoldTimingInfo : public SetupHoldTimingInfo { float hold_pin_slack(AtomPinId pin) const override { return hold_timing_.hold_pin_slack(pin); } float hold_pin_criticality(AtomPinId pin) const override { return hold_timing_.hold_pin_criticality(pin); } - std::shared_ptr hold_analyzer() const override { return hold_timing_.hold_analyzer(); } + std::shared_ptr hold_analyzer() const override { + return hold_timing_.hold_analyzer(); + } //Combined setup-hold related - std::shared_ptr setup_hold_analyzer() const override { return setup_hold_analyzer_; } + std::shared_ptr setup_hold_analyzer() const override { + return setup_hold_analyzer_; + } //TimingInfo related std::shared_ptr analyzer() const override { return setup_hold_analyzer(); } std::shared_ptr timing_graph() const override { return setup_timing_.timing_graph(); } - std::shared_ptr delay_calculator() const override { return setup_timing_.delay_calculator(); } - std::shared_ptr timing_constraints() const override { return setup_timing_.timing_constraints(); } + std::shared_ptr delay_calculator() const override { + return setup_timing_.delay_calculator(); + } + std::shared_ptr timing_constraints() const override { + return setup_timing_.timing_constraints(); + } public: //Mutators - void invalidate_delay(const tatum::EdgeId edge) override { - setup_hold_analyzer_->invalidate_edge(edge); - } + void invalidate_delay(const tatum::EdgeId edge) override { setup_hold_analyzer_->invalidate_edge(edge); } //Update both setup and hold simultaneously // This is more efficient than calling update_hold() and update_setup() separately, since @@ -453,51 +445,63 @@ class ConstantTimingInfo : public SetupHoldTimingInfo { /** Create a SetupTimingInfo for the given delay calculator */ template -std::unique_ptr make_setup_timing_info(std::shared_ptr delay_calculator, e_timing_update_type update_type) { +std::unique_ptr make_setup_timing_info(std::shared_ptr delay_calculator, + e_timing_update_type update_type) { auto& timing_ctx = g_vpr_ctx.timing(); std::shared_ptr analyzer; if (update_type == e_timing_update_type::FULL || update_type == e_timing_update_type::AUTO) { - analyzer = tatum::AnalyzerFactory::make(*timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); + analyzer = tatum::AnalyzerFactory::make( + *timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); } else { VTR_ASSERT(update_type == e_timing_update_type::INCREMENTAL); - analyzer = tatum::AnalyzerFactory::make(*timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); + analyzer = tatum::AnalyzerFactory::make( + *timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); } - return std::make_unique>(timing_ctx.graph, timing_ctx.constraints, delay_calculator, analyzer); + return std::make_unique>(timing_ctx.graph, timing_ctx.constraints, + delay_calculator, analyzer); } /** Create a HoldTimingInfo for the given delay calculator */ template -std::unique_ptr make_hold_timing_info(std::shared_ptr delay_calculator, e_timing_update_type update_type) { +std::unique_ptr make_hold_timing_info(std::shared_ptr delay_calculator, + e_timing_update_type update_type) { auto& timing_ctx = g_vpr_ctx.timing(); std::shared_ptr analyzer; if (update_type == e_timing_update_type::FULL || update_type == e_timing_update_type::AUTO) { - analyzer = tatum::AnalyzerFactory::make(*timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); + analyzer = tatum::AnalyzerFactory::make( + *timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); } else { VTR_ASSERT(update_type == e_timing_update_type::INCREMENTAL); - analyzer = tatum::AnalyzerFactory::make(*timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); + analyzer = tatum::AnalyzerFactory::make( + *timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); } - return std::make_unique>(timing_ctx.graph, timing_ctx.constraints, delay_calculator, analyzer); + return std::make_unique>(timing_ctx.graph, timing_ctx.constraints, + delay_calculator, analyzer); } /** Create a SetupHoldTimingInfo for the given delay calculator */ template -std::unique_ptr make_setup_hold_timing_info(std::shared_ptr delay_calculator, e_timing_update_type update_type) { +std::unique_ptr make_setup_hold_timing_info(std::shared_ptr delay_calculator, + e_timing_update_type update_type) { auto& timing_ctx = g_vpr_ctx.timing(); std::shared_ptr analyzer; if (update_type == e_timing_update_type::FULL || update_type == e_timing_update_type::AUTO) { - analyzer = tatum::AnalyzerFactory::make(*timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); + analyzer = tatum::AnalyzerFactory::make( + *timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); } else { VTR_ASSERT(update_type == e_timing_update_type::INCREMENTAL); - analyzer = tatum::AnalyzerFactory::make(*timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); + analyzer = tatum::AnalyzerFactory::make( + *timing_ctx.graph, *timing_ctx.constraints, *delay_calculator); } - return std::make_unique>(timing_ctx.graph, timing_ctx.constraints, delay_calculator, analyzer); + return std::make_unique>(timing_ctx.graph, timing_ctx.constraints, + delay_calculator, analyzer); } /** Create a timing info object which does no timing analysis, and returns diff --git a/vpr/src/timing/net_delay.cpp b/vpr/src/timing/net_delay.cpp index 5420c197769..584a2512bae 100644 --- a/vpr/src/timing/net_delay.cpp +++ b/vpr/src/timing/net_delay.cpp @@ -33,9 +33,7 @@ static std::unordered_map ipin_to_Tdel_map; /*********************** Subroutines local to this module ********************/ -static void load_one_net_delay(const Netlist<>& net_list, - NetPinsMatrix& net_delay, - ParentNetId net_id); +static void load_one_net_delay(const Netlist<>& net_list, NetPinsMatrix& net_delay, ParentNetId net_id); static void load_one_net_delay_recurr(const RouteTreeNode& node, ParentNetId net_id); @@ -61,9 +59,7 @@ void load_net_delay_from_routing(const Netlist<>& net_list, NetPinsMatrix } } -static void load_one_net_delay(const Netlist<>& net_list, - NetPinsMatrix& net_delay, - ParentNetId net_id) { +static void load_one_net_delay(const Netlist<>& net_list, NetPinsMatrix& net_delay, ParentNetId net_id) { /* This routine loads delay values for one net in * * net_delay[net_id][1..num_pins-1]. First, from the traceback, it * * constructs the route tree and computes its values for R, C, and Tdel. * @@ -76,12 +72,13 @@ static void load_one_net_delay(const Netlist<>& net_list, auto& route_ctx = g_vpr_ctx.mutable_routing(); if (!route_ctx.route_trees[net_id]) { - VPR_FATAL_ERROR(VPR_ERROR_TIMING, - "in load_one_net_delay: Route tree for net %lu does not exist.\n", size_t(net_id)); + VPR_FATAL_ERROR(VPR_ERROR_TIMING, "in load_one_net_delay: Route tree for net %lu does not exist.\n", + size_t(net_id)); } RouteTree& tree = route_ctx.route_trees[net_id].value(); - load_one_net_delay_recurr(tree.root(), net_id); // recursively traverse the tree and load entries into the ipin_to_Tdel map + load_one_net_delay_recurr(tree.root(), + net_id); // recursively traverse the tree and load entries into the ipin_to_Tdel map for (unsigned int ipin = 1; ipin < net_list.net_pins(net_id).size(); ipin++) { auto itr = ipin_to_Tdel_map.find(ipin); diff --git a/vpr/src/timing/read_sdc.cpp b/vpr/src/timing/read_sdc.cpp index 202a3cfe6e0..5fdbc904607 100644 --- a/vpr/src/timing/read_sdc.cpp +++ b/vpr/src/timing/read_sdc.cpp @@ -34,9 +34,7 @@ void apply_multi_clock_default_timing_constraints(const AtomNetlist& netlist, const std::set& clock_drivers, tatum::TimingConstraints& timing_constraints); -void mark_constant_generators(const AtomNetlist& netlist, - const AtomLookup& lookup, - tatum::TimingConstraints& tc); +void mark_constant_generators(const AtomNetlist& netlist, const AtomLookup& lookup, tatum::TimingConstraints& tc); void constrain_all_ios(const AtomNetlist& netlist, const AtomLookup& lookup, @@ -85,8 +83,7 @@ class SdcParseCallback : public sdcparse::Callback { if (sdc_clocks_.count(virtual_clk)) { vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Found duplicate virtual clock definition for clock '%s'", - cmd.name.c_str()); + "Found duplicate virtual clock definition for clock '%s'", cmd.name.c_str()); } //Virtual clocks should have no targets @@ -121,7 +118,8 @@ class SdcParseCallback : public sdcparse::Callback { if (sdc_clocks_.count(netlist_clk)) { vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Found duplicate netlist clock definition for clock '%s' matching target pattern '%s'", + "Found duplicate netlist clock definition for clock '%s' matching target " + "pattern '%s'", clock_name.c_str(), clock_name_glob_pattern.c_str()); } @@ -166,7 +164,8 @@ class SdcParseCallback : public sdcparse::Callback { domain = tc_.find_clock_domain(clock_name); } else { vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Wildcard clock domain '%s' is ambiguous in multi-clock circuits, explicitly specify the target clock", + "Wildcard clock domain '%s' is ambiguous in multi-clock circuits, explicitly specify the " + "target clock", cmd.clock_name.c_str()); } } else { @@ -176,8 +175,7 @@ class SdcParseCallback : public sdcparse::Callback { //Error checks if (!domain) { - vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Failed to find clock domain '%s' for I/O constraint", + vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, "Failed to find clock domain '%s' for I/O constraint", cmd.clock_name.c_str()); } @@ -186,8 +184,7 @@ class SdcParseCallback : public sdcparse::Callback { if (io_pins.empty()) { //We treat this as a warning, since the primary I/Os in the target may have been swept away - VTR_LOGF_WARN(fname_.c_str(), lineno_, - "Found no matching primary inputs or primary outputs for %s\n", + VTR_LOGF_WARN(fname_.c_str(), lineno_, "Found no matching primary inputs or primary outputs for %s\n", (cmd.type == sdcparse::IoDelayType::INPUT) ? "set_input_delay" : "set_output_delay"); } @@ -252,8 +249,7 @@ class SdcParseCallback : public sdcparse::Callback { ++num_commands_; if (cmd.type != sdcparse::ClockGroupsType::EXCLUSIVE) { - vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "set_clock_groups only supports -exclusive groups"); + vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, "set_clock_groups only supports -exclusive groups"); } //FIXME: more efficient to collect per-group clocks once instead of at each iteration @@ -263,7 +259,8 @@ class SdcParseCallback : public sdcparse::Callback { auto src_clocks = get_clocks(cmd.clock_groups[src_group]); for (size_t sink_group = 0; sink_group < cmd.clock_groups.size(); ++sink_group) { - if (src_group == sink_group) continue; + if (src_group == sink_group) + continue; auto sink_clocks = get_clocks(cmd.clock_groups[sink_group]); @@ -347,8 +344,7 @@ class SdcParseCallback : public sdcparse::Callback { std::set to_clocks; std::set to_pins; - if (cmd.from.type == sdcparse::StringGroupType::CLOCK - || cmd.from.type == sdcparse::StringGroupType::STRING) { + if (cmd.from.type == sdcparse::StringGroupType::CLOCK || cmd.from.type == sdcparse::StringGroupType::STRING) { //Treat raw strings (i.e. no get_clocks) as clocks from_clocks = get_clocks(cmd.from); } else { @@ -356,8 +352,7 @@ class SdcParseCallback : public sdcparse::Callback { "set_multicycle_path only supports specifying clocks for -from"); } - if (cmd.to.type == sdcparse::StringGroupType::CLOCK - || cmd.to.type == sdcparse::StringGroupType::STRING) { + if (cmd.to.type == sdcparse::StringGroupType::CLOCK || cmd.to.type == sdcparse::StringGroupType::STRING) { //Treat raw strings (i.e. no get_clocks) as clocks to_clocks = get_clocks(cmd.to); } else if (cmd.to.type == sdcparse::StringGroupType::PIN) { @@ -457,7 +452,8 @@ class SdcParseCallback : public sdcparse::Callback { ++num_commands_; if (cmd.type != sdcparse::ClockLatencyType::SOURCE) { - vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, "set_clock_latency only supports specifying -source latency"); + vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, + "set_clock_latency only supports specifying -source latency"); } auto clocks = get_clocks(cmd.target_clocks); @@ -493,13 +489,11 @@ class SdcParseCallback : public sdcparse::Callback { auto to_pins = get_pins(cmd.to); if (from_pins.empty()) { - vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Found no matching -from pins"); + vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, "Found no matching -from pins"); } if (to_pins.empty()) { - vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Found no matching -to pins"); + vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, "Found no matching -to pins"); } //Disable any edges between the from and to sets @@ -532,7 +526,8 @@ class SdcParseCallback : public sdcparse::Callback { //a primary input). if (tg_.node_num_active_in_edges(to_tnode) == 0) { VTR_LOGF_WARN(fname_.c_str(), lineno_, - "set_disable_timing caused pin '%s' to have no active incoming edges. It is being marked as a constant generator.\n", + "set_disable_timing caused pin '%s' to have no active incoming edges. It is being " + "marked as a constant generator.\n", netlist_.pin_name(to_pin).c_str()); tc_.set_constant_generator(to_tnode); } @@ -572,7 +567,8 @@ class SdcParseCallback : public sdcparse::Callback { for (tatum::DomainId capture_clock : tc_.clock_domains()) { auto domain_pair = std::make_pair(launch_clock, capture_clock); - if (disabled_domain_pairs_.count(domain_pair)) continue; + if (disabled_domain_pairs_.count(domain_pair)) + continue; //Setup -- default { @@ -616,7 +612,9 @@ class SdcParseCallback : public sdcparse::Callback { } //Returns the setup constraint in seconds - tatum::Time calculate_setup_constraint(tatum::DomainId launch_domain, tatum::DomainId capture_domain, AtomPinId to_pin = AtomPinId::INVALID()) const { + tatum::Time calculate_setup_constraint(tatum::DomainId launch_domain, + tatum::DomainId capture_domain, + AtomPinId to_pin = AtomPinId::INVALID()) const { //Calculate the period-based constraint, including the effect of multi-cycle paths float min_launch_to_capture_time = calculate_min_launch_to_capture_edge_time(launch_domain, capture_domain); @@ -639,7 +637,8 @@ class SdcParseCallback : public sdcparse::Callback { VTR_LOG_WARN( "Added negative (%d) additional capture clock cycles to setup constraint" " for clock '%s' to clock '%s' transfers; check your set_multicycle_path specifications\n", - extra_cycles, tc_.clock_domain_name(launch_domain).c_str(), tc_.clock_domain_name(capture_domain).c_str()); + extra_cycles, tc_.clock_domain_name(launch_domain).c_str(), + tc_.clock_domain_name(capture_domain).c_str()); } //By default the period-based constraint is the constraint @@ -655,8 +654,7 @@ class SdcParseCallback : public sdcparse::Callback { VTR_LOG_WARN( "Override setup constraint (%g) overrides a tighter default period-based constraint (%g)" " for transfers from clock '%s' to clock '%s'\n", - override_setup_constraint, setup_constraint, - tc_.clock_domain_name(launch_domain).c_str(), + override_setup_constraint, setup_constraint, tc_.clock_domain_name(launch_domain).c_str(), tc_.clock_domain_name(capture_domain).c_str()); } @@ -670,8 +668,7 @@ class SdcParseCallback : public sdcparse::Callback { VPR_ERROR(VPR_ERROR_SDC, "Setup constraint %g for transfers from clock '%s' to clock '%s' is negative." " Requires data to arrive before launch edge (No time travelling allowed!)", - setup_constraint, - tc_.clock_domain_name(launch_domain).c_str(), + setup_constraint, tc_.clock_domain_name(launch_domain).c_str(), tc_.clock_domain_name(capture_domain).c_str()); } @@ -679,7 +676,9 @@ class SdcParseCallback : public sdcparse::Callback { } //Returns the hold constraint in seconds - tatum::Time calculate_hold_constraint(tatum::DomainId launch_domain, tatum::DomainId capture_domain, AtomPinId to_pin = AtomPinId::INVALID()) const { + tatum::Time calculate_hold_constraint(tatum::DomainId launch_domain, + tatum::DomainId capture_domain, + AtomPinId to_pin = AtomPinId::INVALID()) const { float min_launch_to_capture_time = calculate_min_launch_to_capture_edge_time(launch_domain, capture_domain); auto iter = sdc_clocks_.find(capture_domain); @@ -711,8 +710,7 @@ class SdcParseCallback : public sdcparse::Callback { VTR_LOG_WARN( "Override hold constraint (%g) overrides tighter default period-based constraint (%g)" " for transfers from clock '%s' to clock '%s'\n", - override_hold_constraint, hold_constraint, - tc_.clock_domain_name(launch_domain).c_str(), + override_hold_constraint, hold_constraint, tc_.clock_domain_name(launch_domain).c_str(), tc_.clock_domain_name(capture_domain).c_str()); } @@ -726,7 +724,8 @@ class SdcParseCallback : public sdcparse::Callback { } //Determine the minumum time (in SDC units) between the edges of the launch and capture clocks - float calculate_min_launch_to_capture_edge_time(tatum::DomainId launch_domain, tatum::DomainId capture_domain) const { + float calculate_min_launch_to_capture_edge_time(tatum::DomainId launch_domain, + tatum::DomainId capture_domain) const { constexpr int CLOCK_SCALE = 1000; auto launch_iter = sdc_clocks_.find(launch_domain); @@ -742,7 +741,9 @@ class SdcParseCallback : public sdcparse::Callback { float constraint = std::numeric_limits::quiet_NaN(); - if (std::fabs(launch_clock.period - capture_clock.period) < EPSILON && std::fabs(launch_clock.rise_edge - capture_clock.rise_edge) < EPSILON && std::fabs(launch_clock.fall_edge - capture_clock.fall_edge) < EPSILON) { + if (std::fabs(launch_clock.period - capture_clock.period) < EPSILON + && std::fabs(launch_clock.rise_edge - capture_clock.rise_edge) < EPSILON + && std::fabs(launch_clock.fall_edge - capture_clock.fall_edge) < EPSILON) { //The source and sink domains have the same period and edges, the constraint is the common clock period. constraint = launch_clock.period; @@ -790,7 +791,8 @@ class SdcParseCallback : public sdcparse::Callback { //Compare every edge in source_edges with every edge in sink_edges. //The lowest STRICTLY POSITIVE difference between a sink edge and a //source edge yeilds the setup time constraint. - int scaled_constraint = std::numeric_limits::max(); //Initialize to +inf, so any constraint will be less + int scaled_constraint + = std::numeric_limits::max(); //Initialize to +inf, so any constraint will be less for (int launch_edge : launch_edges) { for (int capture_edge : capture_edges) { @@ -865,8 +867,7 @@ class SdcParseCallback : public sdcparse::Callback { std::set get_ports(const sdcparse::StringGroup& port_group) { if (port_group.type != sdcparse::StringGroupType::PORT) { - vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Expected port collection via get_ports"); + vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, "Expected port collection via get_ports"); } std::set pins; @@ -886,8 +887,7 @@ class SdcParseCallback : public sdcparse::Callback { } if (!found) { - VTR_LOGF_WARN(fname_.c_str(), lineno_, - "get_ports target name or pattern '%s' matched no ports\n", + VTR_LOGF_WARN(fname_.c_str(), lineno_, "get_ports target name or pattern '%s' matched no ports\n", port_pattern.c_str()); } } @@ -903,8 +903,7 @@ class SdcParseCallback : public sdcparse::Callback { if (clock_group.type != sdcparse::StringGroupType::CLOCK && clock_group.type != sdcparse::StringGroupType::STRING) { - vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Expected clock names or collection via get_clocks"); + vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, "Expected clock names or collection via get_clocks"); } for (const auto& clock_glob_pattern : clock_group.strings) { @@ -946,8 +945,7 @@ class SdcParseCallback : public sdcparse::Callback { } if (!found) { - VTR_LOGF_WARN(fname_.c_str(), lineno_, - "get_clocks target name or pattern '%s' matched no clocks\n", + VTR_LOGF_WARN(fname_.c_str(), lineno_, "get_clocks target name or pattern '%s' matched no clocks\n", clock_glob_pattern.c_str()); } } @@ -964,8 +962,7 @@ class SdcParseCallback : public sdcparse::Callback { } if (pin_group.type != sdcparse::StringGroupType::PIN) { - vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, - "Expected pin collection via get_pins"); + vpr_throw(VPR_ERROR_SDC, fname_.c_str(), lineno_, "Expected pin collection via get_pins"); } for (const auto& pin_pattern : pin_group.strings) { @@ -983,8 +980,7 @@ class SdcParseCallback : public sdcparse::Callback { } if (!found) { - VTR_LOGF_WARN(fname_.c_str(), lineno_, - "get_pins target name or pattern '%s' matched no pins\n", + VTR_LOGF_WARN(fname_.c_str(), lineno_, "get_pins target name or pattern '%s' matched no pins\n", pin_pattern.c_str()); } } @@ -997,13 +993,9 @@ class SdcParseCallback : public sdcparse::Callback { return std::set(domains.begin(), domains.end()); } - float sdc_units_to_seconds(float val) const { - return val * unit_scale_; - } + float sdc_units_to_seconds(float val) const { return val * unit_scale_; } - float seconds_to_sdc_units(float val) const { - return val / unit_scale_; - } + float seconds_to_sdc_units(float val) const { return val / unit_scale_; } std::set setup_capture_pins_with_overrides() { std::set pins; @@ -1102,8 +1094,7 @@ std::unique_ptr read_sdc(const t_timing_inf& timing_in AtomPinId src_pin = lookup.tnode_atom_pin(src_tnode); VTR_ASSERT(src_pin); - VTR_LOG(" Constrained Clock '%s' Source: '%s'\n", - timing_constraints->clock_domain_name(domain).c_str(), + VTR_LOG(" Constrained Clock '%s' Source: '%s'\n", timing_constraints->clock_domain_name(domain).c_str(), netlist.pin_name(src_pin).c_str()); } } @@ -1141,7 +1132,8 @@ void apply_combinational_default_timing_constraints(const AtomNetlist& netlist, std::string clock_name = "virtual_io_clock"; VTR_LOG("Setting default timing constraints:\n"); - VTR_LOG(" * constrain all primay inputs and primary outputs on a virtual external clock '%s'\n", clock_name.c_str()); + VTR_LOG(" * constrain all primay inputs and primary outputs on a virtual external clock '%s'\n", + clock_name.c_str()); VTR_LOG(" * optimize virtual clock to run as fast as possible\n"); //Create a virtual clock, with 0 period @@ -1193,7 +1185,8 @@ void apply_multi_clock_default_timing_constraints(const AtomNetlist& netlist, tatum::TimingConstraints& tc) { std::string virtual_clock_name = "virtual_io_clock"; VTR_LOG("Setting default timing constraints:\n"); - VTR_LOG(" * constrain all primay inputs and primary outputs on a virtual external clock '%s'\n", virtual_clock_name.c_str()); + VTR_LOG(" * constrain all primay inputs and primary outputs on a virtual external clock '%s'\n", + virtual_clock_name.c_str()); VTR_LOG(" * optimize all netlist and virtual clocks to run as fast as possible\n"); VTR_LOG(" * ignore cross netlist clock domain timing paths\n"); @@ -1234,9 +1227,7 @@ void apply_multi_clock_default_timing_constraints(const AtomNetlist& netlist, //Look through the netlist to find any constant generators, and mark them as //constant generators in the timing constraints -void mark_constant_generators(const AtomNetlist& netlist, - const AtomLookup& lookup, - tatum::TimingConstraints& tc) { +void mark_constant_generators(const AtomNetlist& netlist, const AtomLookup& lookup, tatum::TimingConstraints& tc) { for (AtomPinId pin : netlist.pins()) { if (netlist.pin_is_constant(pin)) { tatum::NodeId tnode = lookup.atom_pin_tnode(pin); diff --git a/vpr/src/timing/slack_evaluation.cpp b/vpr/src/timing/slack_evaluation.cpp index 464bc4bc031..a246280ead6 100644 --- a/vpr/src/timing/slack_evaluation.cpp +++ b/vpr/src/timing/slack_evaluation.cpp @@ -8,9 +8,9 @@ #include "vtr_time.h" #if defined(VPR_USE_TBB) -# include -# include -# include +#include +#include +#include #endif template @@ -50,8 +50,10 @@ SetupSlackCrit::SetupSlackCrit(const AtomNetlist& netlist, const AtomLookup& net SetupSlackCrit::~SetupSlackCrit() { VTR_LOG("Incr Slack updates %zu in %g sec\n", incr_slack_updates_, incr_slack_update_time_sec_); - VTR_LOG("Full Max Req/Worst Slack updates %zu in %g sec\n", full_max_req_worst_slack_updates_, full_max_req_worst_slack_update_time_sec_); - VTR_LOG("Incr Max Req/Worst Slack updates %zu in %g sec\n", incr_max_req_worst_slack_updates_, incr_max_req_worst_slack_update_time_sec_); + VTR_LOG("Full Max Req/Worst Slack updates %zu in %g sec\n", full_max_req_worst_slack_updates_, + full_max_req_worst_slack_update_time_sec_); + VTR_LOG("Incr Max Req/Worst Slack updates %zu in %g sec\n", incr_max_req_worst_slack_updates_, + incr_max_req_worst_slack_update_time_sec_); VTR_LOG("Incr Criticality updates %zu in %g sec\n", incr_criticality_updates_, incr_criticality_update_time_sec_); VTR_LOG("Full Criticality updates %zu in %g sec\n", full_criticality_updates_, full_criticality_update_time_sec_); } @@ -72,7 +74,8 @@ SetupSlackCrit::modified_pin_range SetupSlackCrit::pins_with_modified_criticalit return vtr::make_range(pins_with_modified_criticalities_); } -void SetupSlackCrit::update_slacks_and_criticalities(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& analyzer) { +void SetupSlackCrit::update_slacks_and_criticalities(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& analyzer) { record_modified_nodes(timing_graph, analyzer); #if defined(VPR_USE_TBB) @@ -139,7 +142,8 @@ AtomPinId SetupSlackCrit::update_pin_slack(const tatum::NodeId node, const tatum return AtomPinId::INVALID(); //Unchanged } -void SetupSlackCrit::update_criticalities(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& analyzer) { +void SetupSlackCrit::update_criticalities(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& analyzer) { //Record the maximum required time, and wost slack per domain pair update_max_req_and_worst_slack(timing_graph, analyzer); @@ -160,9 +164,7 @@ void SetupSlackCrit::update_criticalities(const tatum::TimingGraph& timing_graph // // TODO: consider if incremental criticality update is feasible based only // on changed domain pairs.... - bool could_do_incremental_update = (previously_updated - && max_req_unchanged - && worst_slack_unchanged); + bool could_do_incremental_update = (previously_updated && max_req_unchanged && worst_slack_unchanged); //For debugability, only do incremental updates if INCR_UPDATE_ATOM_CRIT is true bool do_incremental_update = (INCR_UPDATE_ATOM_CRIT && could_do_incremental_update); @@ -171,7 +173,8 @@ void SetupSlackCrit::update_criticalities(const tatum::TimingGraph& timing_graph update_pin_criticalities_from_nodes(nodes, analyzer); - VTR_ASSERT_DEBUG_MSG(verify_pin_criticalities(timing_graph, analyzer), "Updated pin criticalities should match those computed from scratch"); + VTR_ASSERT_DEBUG_MSG(verify_pin_criticalities(timing_graph, analyzer), + "Updated pin criticalities should match those computed from scratch"); //Save the max required times and worst slacks so we can determine when next //updated whether the update can be done incrementally @@ -284,7 +287,8 @@ bool SetupSlackCrit::incr_update_max_req_and_worst_slack(const tatum::TimingGrap } } - VTR_ASSERT_DEBUG_MSG(verify_max_req_worst_slack(timing_graph, analyzer), "Calculated max required times and worst slacks should match those computed from scratch"); + VTR_ASSERT_DEBUG_MSG(verify_max_req_worst_slack(timing_graph, analyzer), + "Calculated max required times and worst slacks should match those computed from scratch"); ++incr_max_req_worst_slack_updates_; incr_max_req_worst_slack_update_time_sec_ += timer.elapsed_sec(); @@ -335,7 +339,8 @@ void SetupSlackCrit::recompute_max_req_and_worst_slack(const tatum::TimingGraph& } template -void SetupSlackCrit::update_pin_criticalities_from_nodes(const NodeRange& nodes, const tatum::SetupTimingAnalyzer& analyzer) { +void SetupSlackCrit::update_pin_criticalities_from_nodes(const NodeRange& nodes, + const tatum::SetupTimingAnalyzer& analyzer) { pins_with_modified_criticalities_.clear(); /** We could do this in parallel, but the overhead of combining the results is not worth it */ @@ -347,8 +352,7 @@ void SetupSlackCrit::update_pin_criticalities_from_nodes(const NodeRange& nodes, } } -AtomPinId SetupSlackCrit::update_pin_criticality(const tatum::NodeId node, - const tatum::SetupTimingAnalyzer& analyzer) { +AtomPinId SetupSlackCrit::update_pin_criticality(const tatum::NodeId node, const tatum::SetupTimingAnalyzer& analyzer) { AtomPinId pin = netlist_lookup_.tnode_atom_pin(node); VTR_ASSERT_SAFE(pin); @@ -371,7 +375,8 @@ AtomPinId SetupSlackCrit::update_pin_criticality(const tatum::NodeId node, return AtomPinId::INVALID(); //Unmodified } -void SetupSlackCrit::record_modified_nodes(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& analyzer) { +void SetupSlackCrit::record_modified_nodes(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& analyzer) { const auto& nodes = analyzer.modified_nodes(); modified_nodes_.clear(); @@ -396,7 +401,8 @@ bool SetupSlackCrit::is_external_tnode(const AtomPinId pin, const tatum::NodeId return netlist_lookup_.atom_pin_tnode(pin, BlockTnode::EXTERNAL) == node; } -bool SetupSlackCrit::verify_pin_criticalities(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& analyzer) const { +bool SetupSlackCrit::verify_pin_criticalities(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& analyzer) const { auto modified_nodes = nodes_to_update(/*incremental=*/true); auto check_nodes = timing_graph.nodes(); for (tatum::NodeId node : check_nodes) { @@ -421,11 +427,7 @@ bool SetupSlackCrit::verify_pin_criticalities(const tatum::TimingGraph& timing_g VPR_ERROR(VPR_ERROR_TIMING, "Mismatched pin criticality was %g, but expected %g, in modified %d: pin '%s' (%zu) tnode %zu\n", - pin_criticalities_[pin], - new_crit, - in_modified, - netlist_.pin_name(pin).c_str(), - size_t(pin), + pin_criticalities_[pin], new_crit, in_modified, netlist_.pin_name(pin).c_str(), size_t(pin), size_t(node)); return false; } @@ -434,7 +436,8 @@ bool SetupSlackCrit::verify_pin_criticalities(const tatum::TimingGraph& timing_g return true; } -bool SetupSlackCrit::verify_max_req_worst_slack(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& analyzer) { +bool SetupSlackCrit::verify_max_req_worst_slack(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& analyzer) { auto calc_max_req = max_req_; auto calc_worst_slack = worst_slack_; @@ -449,13 +452,11 @@ bool SetupSlackCrit::verify_max_req_worst_slack(const tatum::TimingGraph& timing // gets different nodes, this will not change the results of the // timing analysis. if (calc_max_req != max_req_) { - VPR_ERROR(VPR_ERROR_TIMING, - "Calculated max required times does not match value calculated from scratch"); + VPR_ERROR(VPR_ERROR_TIMING, "Calculated max required times does not match value calculated from scratch"); return false; } if (calc_worst_slack != worst_slack_) { - VPR_ERROR(VPR_ERROR_TIMING, - "Calculated worst slack does not match value calculated from scratch"); + VPR_ERROR(VPR_ERROR_TIMING, "Calculated worst slack does not match value calculated from scratch"); return false; } @@ -482,7 +483,8 @@ float HoldSlackCrit::hold_pin_slack(AtomPinId pin) const { return pin_slacks_[pi // 0. is non-critical and 1. is most-critical. float HoldSlackCrit::hold_pin_criticality(AtomPinId pin) const { return pin_criticalities_[pin]; } -void HoldSlackCrit::update_slacks_and_criticalities(const tatum::TimingGraph& timing_graph, const tatum::HoldTimingAnalyzer& analyzer) { +void HoldSlackCrit::update_slacks_and_criticalities(const tatum::TimingGraph& timing_graph, + const tatum::HoldTimingAnalyzer& analyzer) { #if defined(VPR_USE_TBB) tbb::task_group g; g.run([&] { update_slacks(analyzer); }); @@ -516,7 +518,8 @@ void HoldSlackCrit::update_pin_slack(const AtomPinId pin, const tatum::HoldTimin } } -void HoldSlackCrit::update_criticalities(const tatum::TimingGraph& timing_graph, const tatum::HoldTimingAnalyzer& analyzer) { +void HoldSlackCrit::update_criticalities(const tatum::TimingGraph& timing_graph, + const tatum::HoldTimingAnalyzer& analyzer) { //TODO: this calculates a simple shifted and scaled criticality, not clear if this is the //right approach (e.g. should we use a more intellegent method like the one used by setup slack?) float worst_slack = std::numeric_limits::infinity(); diff --git a/vpr/src/timing/slack_evaluation.h b/vpr/src/timing/slack_evaluation.h index 3cd75b6ce8b..359e8ba0e4e 100644 --- a/vpr/src/timing/slack_evaluation.h +++ b/vpr/src/timing/slack_evaluation.h @@ -43,7 +43,8 @@ class SetupSlackCrit { public: //Mutators //Incrementally updates all atom netlist connection (i.e. AtomPinId) slacks and criticalities, //based on the last timing analysis performed by analyzer. - void update_slacks_and_criticalities(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& analyzer); + void update_slacks_and_criticalities(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& analyzer); private: //Implementation //Updates slacks of all pins based on the last timing analyzer @@ -77,8 +78,7 @@ class SetupSlackCrit { //Updates the criticality of the pin associated with 'node' based on the last timing analysis //Returns the pin if it's criticality was modified, or AtomPinId::INVALID() if unchanged - AtomPinId update_pin_criticality(const tatum::NodeId node, - const tatum::SetupTimingAnalyzer& analyzer); + AtomPinId update_pin_criticality(const tatum::NodeId node, const tatum::SetupTimingAnalyzer& analyzer); //Records the timing graph nodes modified during the last timing analysis. //Updates modified_nodes_ and modified_sink_nodes @@ -99,7 +99,8 @@ class SetupSlackCrit { } //Sanity check that calculated pin criticalites match those calculated from scratch - bool verify_pin_criticalities(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& analyzer) const; + bool verify_pin_criticalities(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& analyzer) const; //Sanity check that calculated max required and worst slacks match those calculated from scratch //Note modifies max_req_* and worst_slack_* to from-scratch values @@ -115,12 +116,15 @@ class SetupSlackCrit { std::vector pins_with_modified_slacks_; //Set of pins with modified slacks std::vector pins_with_modified_criticalities_; //Set of pins with modified criticalities - std::map max_req_; //Maximum required times for all clock domains - std::map worst_slack_; //Worst slacks for all clock domains - std::map max_req_node_; //Timing graph nodes with maximum required times (for all clock domains) - std::map worst_slack_node_; //Timing graph nodes with worst slacks (for all clock domains) + std::map max_req_; //Maximum required times for all clock domains + std::map worst_slack_; //Worst slacks for all clock domains + std::map + max_req_node_; //Timing graph nodes with maximum required times (for all clock domains) + std::map + worst_slack_node_; //Timing graph nodes with worst slacks (for all clock domains) - std::map prev_max_req_; //Maximum required times from previous call to update_max_req_worst_slack() + std::map + prev_max_req_; //Maximum required times from previous call to update_max_req_worst_slack() std::map prev_worst_slack_; //Worst slacks from previous call to update_max_req_worst_slack() std::vector all_nodes_; //Set of all timing graph nodes (used only for non-incremental updates) @@ -156,7 +160,8 @@ class HoldSlackCrit { float hold_pin_criticality(AtomPinId pin) const; public: //Mutators - void update_slacks_and_criticalities(const tatum::TimingGraph& timing_graph, const tatum::HoldTimingAnalyzer& analyzer); + void update_slacks_and_criticalities(const tatum::TimingGraph& timing_graph, + const tatum::HoldTimingAnalyzer& analyzer); private: //Implementation void update_slacks(const tatum::HoldTimingAnalyzer& analyzer); diff --git a/vpr/src/timing/timing_graph_builder.cpp b/vpr/src/timing/timing_graph_builder.cpp index c0462429648..dfaa10637d9 100644 --- a/vpr/src/timing/timing_graph_builder.cpp +++ b/vpr/src/timing/timing_graph_builder.cpp @@ -235,7 +235,8 @@ using tatum::NodeType; using tatum::TimingGraph; template -tatum::util::linear_map remap_valid(const tatum::util::linear_map& data, const tatum::util::linear_map& id_map) { +tatum::util::linear_map remap_valid(const tatum::util::linear_map& data, + const tatum::util::linear_map& id_map) { tatum::util::linear_map new_data; for (size_t i = 0; i < data.size(); ++i) { @@ -250,8 +251,7 @@ tatum::util::linear_map remap_valid(const tatum::util::linear_map& d return new_data; } -TimingGraphBuilder::TimingGraphBuilder(const AtomNetlist& netlist, - AtomLookup& netlist_lookup) +TimingGraphBuilder::TimingGraphBuilder(const AtomNetlist& netlist, AtomLookup& netlist_lookup) : netlist_(netlist) , netlist_lookup_(netlist_lookup) , netlist_clock_drivers_(find_netlist_logical_clock_drivers(netlist_)) { @@ -484,7 +484,9 @@ std::set TimingGraphBuilder::create_block_timing_nodes(const Atom tg_->set_allow_dangling_combinational_nodes(true); } } else { - VTR_ASSERT_MSG(!model_port->is_clock, "Primitive data output (i.e. non-clock source output pin) should not be marked as a clock generator"); + VTR_ASSERT_MSG( + !model_port->is_clock, + "Primitive data output (i.e. non-clock source output pin) should not be marked as a clock generator"); if (model_port->clock.empty()) { //No clock => combinational output @@ -516,18 +518,23 @@ std::set TimingGraphBuilder::create_block_timing_nodes(const Atom return clock_generator_tnodes; } -void TimingGraphBuilder::create_block_internal_clock_timing_edges(const AtomBlockId blk, const std::set& clock_generator_tnodes) { +void TimingGraphBuilder::create_block_internal_clock_timing_edges( + const AtomBlockId blk, + const std::set& clock_generator_tnodes) { //Connect the clock pins to the sources and sinks for (AtomPinId pin : netlist_.block_pins(blk)) { for (auto blk_tnode_type : {BlockTnode::EXTERNAL, BlockTnode::INTERNAL}) { NodeId tnode = netlist_lookup_.atom_pin_tnode(pin, blk_tnode_type); - if (!tnode) continue; + if (!tnode) + continue; - if (clock_generator_tnodes.count(tnode)) continue; //Clock sources don't have incoming clock pin connections + if (clock_generator_tnodes.count(tnode)) + continue; //Clock sources don't have incoming clock pin connections auto node_type = tg_->node_type(tnode); - if (node_type != NodeType::SOURCE && node_type != NodeType::SINK) continue; + if (node_type != NodeType::SOURCE && node_type != NodeType::SINK) + continue; VTR_ASSERT_SAFE(node_type == NodeType::SOURCE || node_type == NodeType::SINK); @@ -574,7 +581,8 @@ void TimingGraphBuilder::create_block_internal_clock_timing_edges(const AtomBloc for (AtomPinId src_clock_pin : netlist_.block_clock_pins(blk)) { NodeId src_tnode = netlist_lookup_.atom_pin_tnode(src_clock_pin, BlockTnode::EXTERNAL); - if (!src_tnode) continue; + if (!src_tnode) + continue; //Look-up the combinationally connected sink ports name on the port model AtomPortId src_port = netlist_.pin_port(src_clock_pin); @@ -582,7 +590,8 @@ void TimingGraphBuilder::create_block_internal_clock_timing_edges(const AtomBloc for (const std::string& sink_port_name : model_port->combinational_sink_ports) { AtomPortId sink_port = netlist_.find_port(blk, sink_port_name); - if (!sink_port) continue; //Port may not be connected + if (!sink_port) + continue; //Port may not be connected //We now need to create edges between the source pin, and all the pins in the //output port @@ -591,13 +600,17 @@ void TimingGraphBuilder::create_block_internal_clock_timing_edges(const AtomBloc NodeId sink_tnode = netlist_lookup_.atom_pin_tnode(sink_pin, BlockTnode::EXTERNAL); tg_->add_edge(tatum::EdgeType::PRIMITIVE_COMBINATIONAL, src_tnode, sink_tnode); - VTR_LOG("Adding edge from '%s' (tnode: %zu) -> '%s' (tnode: %zu) to allow clocks to propagate\n", netlist_.pin_name(src_clock_pin).c_str(), size_t(src_tnode), netlist_.pin_name(sink_pin).c_str(), size_t(sink_tnode)); + VTR_LOG("Adding edge from '%s' (tnode: %zu) -> '%s' (tnode: %zu) to allow clocks to propagate\n", + netlist_.pin_name(src_clock_pin).c_str(), size_t(src_tnode), + netlist_.pin_name(sink_pin).c_str(), size_t(sink_tnode)); } } } } -void TimingGraphBuilder::create_block_internal_data_timing_edges(const AtomBlockId blk, const std::set& clock_generator_tnodes) { +void TimingGraphBuilder::create_block_internal_data_timing_edges( + const AtomBlockId blk, + const std::set& clock_generator_tnodes) { //Connect the combinational edges from data input pins // //These edges may represent an intermediate (combinational) sub-path of a @@ -613,7 +626,8 @@ void TimingGraphBuilder::create_block_internal_data_timing_edges(const AtomBlock //the edges within the current block. NodeId src_tnode = netlist_lookup_.atom_pin_tnode(src_pin, BlockTnode::INTERNAL); - if (!src_tnode) continue; + if (!src_tnode) + continue; auto src_type = tg_->node_type(src_tnode); @@ -624,7 +638,8 @@ void TimingGraphBuilder::create_block_internal_data_timing_edges(const AtomBlock for (const std::string& sink_port_name : model_port->combinational_sink_ports) { AtomPortId sink_port = netlist_.find_port(blk, sink_port_name); - if (!sink_port) continue; //Port may not be connected + if (!sink_port) + continue; //Port may not be connected //We now need to create edges between the source pin, and all the pins in the //output port @@ -641,11 +656,15 @@ void TimingGraphBuilder::create_block_internal_data_timing_edges(const AtomBlock //Is the sink a clock generator? if (sink_tnode && clock_generator_tnodes.count(sink_tnode)) { //Do not create the edge - VTR_LOG_WARN("Timing edge from %s to %s will not be created since %s has been identified as a clock generator\n", - netlist_.pin_name(src_pin).c_str(), netlist_.pin_name(sink_pin).c_str(), netlist_.pin_name(sink_pin).c_str()); + VTR_LOG_WARN( + "Timing edge from %s to %s will not be created since %s has been identified as a clock " + "generator\n", + netlist_.pin_name(src_pin).c_str(), netlist_.pin_name(sink_pin).c_str(), + netlist_.pin_name(sink_pin).c_str()); } else { //Unknown - VPR_FATAL_ERROR(VPR_ERROR_TIMING, "Unable to find matching sink tnode for timing edge from %s to %s", + VPR_FATAL_ERROR(VPR_ERROR_TIMING, + "Unable to find matching sink tnode for timing edge from %s to %s", netlist_.pin_name(src_pin).c_str(), netlist_.pin_name(src_pin).c_str()); } @@ -653,11 +672,12 @@ void TimingGraphBuilder::create_block_internal_data_timing_edges(const AtomBlock //Valid tnode create the edge auto sink_type = tg_->node_type(sink_tnode); - VTR_ASSERT_MSG((src_type == NodeType::IPIN && sink_type == NodeType::OPIN) - || (src_type == NodeType::SOURCE && sink_type == NodeType::SINK) - || (src_type == NodeType::SOURCE && sink_type == NodeType::OPIN) - || (src_type == NodeType::IPIN && sink_type == NodeType::SINK), - "Internal primitive combinational edges must be between {IPIN, SOURCE} and {OPIN, SINK}"); + VTR_ASSERT_MSG( + (src_type == NodeType::IPIN && sink_type == NodeType::OPIN) + || (src_type == NodeType::SOURCE && sink_type == NodeType::SINK) + || (src_type == NodeType::SOURCE && sink_type == NodeType::OPIN) + || (src_type == NodeType::IPIN && sink_type == NodeType::SINK), + "Internal primitive combinational edges must be between {IPIN, SOURCE} and {OPIN, SINK}"); //Add the edge between the pins tg_->add_edge(tatum::EdgeType::PRIMITIVE_COMBINATIONAL, src_tnode, sink_tnode); @@ -696,7 +716,8 @@ void TimingGraphBuilder::fix_comb_loops() { //For non-simple loops (i.e. SCCs with multiple loops) we may need to break //multiple edges, so repeatedly break edges until there are no SCCs left while (!sccs.empty()) { - VTR_LOG_WARN("Detected %zu strongly connected component(s) forming combinational loop(s) in timing graph\n", sccs.size()); + VTR_LOG_WARN("Detected %zu strongly connected component(s) forming combinational loop(s) in timing graph\n", + sccs.size()); for (const auto& scc : sccs) { EdgeId edge_to_break = find_scc_edge_to_break(scc); VTR_ASSERT(edge_to_break); @@ -715,7 +736,8 @@ tatum::EdgeId TimingGraphBuilder::find_scc_edge_to_break(std::vectornode_out_edges(src_node)) { - if (tg_->edge_disabled(edge)) continue; + if (tg_->edge_disabled(edge)) + continue; tatum::NodeId sink_node = tg_->edge_sink_node(edge); AtomPinId sink_pin = netlist_lookup_.tnode_atom_pin(sink_node); @@ -737,7 +759,8 @@ void TimingGraphBuilder::remap_ids(const tatum::GraphIdMaps& id_mapping) { AtomPinId pin = kv.first; tatum::NodeId old_tnode = kv.second; - if (!old_tnode) continue; + if (!old_tnode) + continue; tatum::NodeId new_tnode = id_mapping.node_id_map[old_tnode]; @@ -753,7 +776,8 @@ bool TimingGraphBuilder::is_netlist_clock_source(const AtomPinId pin) const { bool TimingGraphBuilder::validate_netlist_timing_graph_consistency() const { for (AtomPinId pin : netlist_.pins()) { tatum::NodeId ext_tnode = netlist_lookup_.atom_pin_tnode(pin, BlockTnode::EXTERNAL); - if (!ext_tnode) VPR_ERROR(VPR_ERROR_TIMING, "Found no external tnode for atom pin '%zu'", size_t(pin)); + if (!ext_tnode) + VPR_ERROR(VPR_ERROR_TIMING, "Found no external tnode for atom pin '%zu'", size_t(pin)); tatum::NodeId int_tnode = netlist_lookup_.atom_pin_tnode(pin, BlockTnode::INTERNAL); @@ -762,13 +786,17 @@ bool TimingGraphBuilder::validate_netlist_timing_graph_consistency() const { */ AtomPinId ext_tnode_pin = netlist_lookup_.tnode_atom_pin(ext_tnode); if (ext_tnode_pin != pin) { - VPR_ERROR(VPR_ERROR_TIMING, "Inconsistent external tnode -> atom pin lookup: atom pin %zu -> tnode %zu, but tnode %zu -> atom pin %zu", + VPR_ERROR(VPR_ERROR_TIMING, + "Inconsistent external tnode -> atom pin lookup: atom pin %zu -> tnode %zu, but tnode %zu -> " + "atom pin %zu", size_t(pin), size_t(ext_tnode), size_t(ext_tnode), size_t(ext_tnode_pin)); } if (int_tnode) { AtomPinId int_tnode_pin = netlist_lookup_.tnode_atom_pin(int_tnode); if (int_tnode_pin != pin) { - VPR_ERROR(VPR_ERROR_TIMING, "Inconsistent internal tnode -> atom pin lookup: atom pin %zu -> tnode %zu, but tnode %zu -> atom pin %zu", + VPR_ERROR(VPR_ERROR_TIMING, + "Inconsistent internal tnode -> atom pin lookup: atom pin %zu -> tnode %zu, but tnode %zu -> " + "atom pin %zu", size_t(pin), size_t(int_tnode), size_t(int_tnode), size_t(int_tnode_pin)); } } @@ -778,21 +806,31 @@ bool TimingGraphBuilder::validate_netlist_timing_graph_consistency() const { */ tatum::NodeType ext_tnode_type = tg_->node_type(ext_tnode); if (ext_tnode_type == tatum::NodeType::IPIN || ext_tnode_type == tatum::NodeType::OPIN) { - if (!int_tnode) VPR_ERROR(VPR_ERROR_TIMING, "Missing expected internal tnode for combinational atom pin %zu", size_t(pin)); - if (int_tnode != ext_tnode) VPR_ERROR(VPR_ERROR_TIMING, "Mismatch external/internal tnodes (%zu vs %zu) for combinational atom pin %zu", - size_t(ext_tnode), size_t(int_tnode), size_t(pin)); + if (!int_tnode) + VPR_ERROR(VPR_ERROR_TIMING, "Missing expected internal tnode for combinational atom pin %zu", + size_t(pin)); + if (int_tnode != ext_tnode) + VPR_ERROR(VPR_ERROR_TIMING, + "Mismatch external/internal tnodes (%zu vs %zu) for combinational atom pin %zu", + size_t(ext_tnode), size_t(int_tnode), size_t(pin)); } else if (ext_tnode_type == tatum::NodeType::CPIN) { - if (int_tnode) VPR_ERROR(VPR_ERROR_TIMING, "Unexpected internal tnode (%zu) for clock pin: atom pin %zu ,external tnode %zu", - size_t(int_tnode), size_t(pin), size_t(ext_tnode)); + if (int_tnode) + VPR_ERROR(VPR_ERROR_TIMING, + "Unexpected internal tnode (%zu) for clock pin: atom pin %zu ,external tnode %zu", + size_t(int_tnode), size_t(pin), size_t(ext_tnode)); } else if (ext_tnode_type == tatum::NodeType::SOURCE) { if (int_tnode && tg_->node_type(int_tnode) != tatum::NodeType::SINK) { - VPR_ERROR(VPR_ERROR_TIMING, "Found internal tnode (%zu) associated with atom pin %zu, but it is not a SINK (external tnode %zu was a SOURCE)", + VPR_ERROR(VPR_ERROR_TIMING, + "Found internal tnode (%zu) associated with atom pin %zu, but it is not a SINK (external " + "tnode %zu was a SOURCE)", size_t(int_tnode), size_t(pin), size_t(ext_tnode)); } } else if (ext_tnode_type == tatum::NodeType::SINK) { if (int_tnode && tg_->node_type(int_tnode) != tatum::NodeType::SOURCE) { - VPR_ERROR(VPR_ERROR_TIMING, "Found internal tnode (%zu) associated with atom pin %zu, but it is not a SOURCE (external tnode %zu was a SINK)", + VPR_ERROR(VPR_ERROR_TIMING, + "Found internal tnode (%zu) associated with atom pin %zu, but it is not a SOURCE (external " + "tnode %zu was a SINK)", size_t(int_tnode), size_t(pin), size_t(ext_tnode)); } } else { diff --git a/vpr/src/timing/timing_graph_builder.h b/vpr/src/timing/timing_graph_builder.h index 92de6afdf3d..27398ba4cae 100644 --- a/vpr/src/timing/timing_graph_builder.h +++ b/vpr/src/timing/timing_graph_builder.h @@ -18,8 +18,7 @@ */ class TimingGraphBuilder { public: - TimingGraphBuilder(const AtomNetlist& netlist, - AtomLookup& netlist_lookup); + TimingGraphBuilder(const AtomNetlist& netlist, AtomLookup& netlist_lookup); std::unique_ptr timing_graph(bool allow_dangling_combinational_nodes); @@ -33,8 +32,10 @@ class TimingGraphBuilder { //Helper functions for add_block_to_timing_graph() std::set create_block_timing_nodes(const AtomBlockId blk); - void create_block_internal_data_timing_edges(const AtomBlockId blk, const std::set& clock_generator_tnodes); - void create_block_internal_clock_timing_edges(const AtomBlockId blk, const std::set& clock_generator_tnodes); + void create_block_internal_data_timing_edges(const AtomBlockId blk, + const std::set& clock_generator_tnodes); + void create_block_internal_clock_timing_edges(const AtomBlockId blk, + const std::set& clock_generator_tnodes); void fix_comb_loops(); tatum::EdgeId find_scc_edge_to_break(std::vector scc); diff --git a/vpr/src/timing/timing_util.cpp b/vpr/src/timing/timing_util.cpp index 536667faa51..2993f973b63 100644 --- a/vpr/src/timing/timing_util.cpp +++ b/vpr/src/timing/timing_util.cpp @@ -12,18 +12,15 @@ #include "tatum/report/graphviz_dot_writer.hpp" -double sec_to_nanosec(double seconds) { - return 1e9 * seconds; -} +double sec_to_nanosec(double seconds) { return 1e9 * seconds; } -double sec_to_mhz(double seconds) { - return (1. / seconds) / 1e6; -} +double sec_to_mhz(double seconds) { return (1. / seconds) / 1e6; } /* * Setup-time related */ -tatum::TimingPathInfo find_longest_critical_path_delay(const tatum::TimingConstraints& constraints, const tatum::SetupTimingAnalyzer& setup_analyzer) { +tatum::TimingPathInfo find_longest_critical_path_delay(const tatum::TimingConstraints& constraints, + const tatum::SetupTimingAnalyzer& setup_analyzer) { tatum::TimingPathInfo crit_path_info; auto& timing_ctx = g_vpr_ctx.timing(); @@ -40,7 +37,8 @@ tatum::TimingPathInfo find_longest_critical_path_delay(const tatum::TimingConstr return crit_path_info; } -tatum::TimingPathInfo find_least_slack_critical_path_delay(const tatum::TimingConstraints& constraints, const tatum::SetupTimingAnalyzer& setup_analyzer) { +tatum::TimingPathInfo find_least_slack_critical_path_delay(const tatum::TimingConstraints& constraints, + const tatum::SetupTimingAnalyzer& setup_analyzer) { tatum::TimingPathInfo crit_path_info; auto& timing_ctx = g_vpr_ctx.timing(); @@ -88,7 +86,10 @@ float find_setup_worst_negative_slack(const tatum::SetupTimingAnalyzer& setup_an return wns; } -float find_node_setup_slack(const tatum::SetupTimingAnalyzer& setup_analyzer, tatum::NodeId node, tatum::DomainId launch_domain, tatum::DomainId capture_domain) { +float find_node_setup_slack(const tatum::SetupTimingAnalyzer& setup_analyzer, + tatum::NodeId node, + tatum::DomainId launch_domain, + tatum::DomainId capture_domain) { for (const auto& tag : setup_analyzer.setup_slacks(node)) { if (tag.launch_clock_domain() == launch_domain && tag.capture_clock_domain() == capture_domain) { return tag.time().value(); @@ -98,7 +99,8 @@ float find_node_setup_slack(const tatum::SetupTimingAnalyzer& setup_analyzer, ta return NAN; } -std::vector create_setup_slack_histogram(const tatum::SetupTimingAnalyzer& setup_analyzer, size_t num_bins) { +std::vector create_setup_slack_histogram(const tatum::SetupTimingAnalyzer& setup_analyzer, + size_t num_bins) { auto& timing_ctx = g_vpr_ctx.timing(); std::vector histogram; @@ -133,9 +135,7 @@ std::vector create_setup_slack_histogram(const tatum::SetupTimi histogram[histogram.size() - 1].max_value = max_slack; //Count the slacks into the buckets - auto comp = [](const HistogramBucket& bucket, float slack) { - return bucket.max_value < slack; - }; + auto comp = [](const HistogramBucket& bucket, float slack) { return bucket.max_value < slack; }; for (tatum::NodeId node : timing_ctx.graph->logical_outputs()) { for (tatum::TimingTag tag : setup_analyzer.setup_slacks(node)) { @@ -174,9 +174,7 @@ std::vector create_criticality_histogram(const Netlist<>& net_l //To avoid round-off errors we force the max value of the last bucket equal to the max criticalty histogram[histogram.size() - 1].max_value = 1.; - auto cmp = [](const HistogramBucket& bucket, float crit) { - return bucket.max_value < crit; - }; + auto cmp = [](const HistogramBucket& bucket, float crit) { return bucket.max_value < crit; }; //Count the criticalities into the buckets for (auto net_id : net_list.nets()) { @@ -221,10 +219,13 @@ void TimingStats::writeXML(std::ostream& output) const { output << "\n"; output << "\n"; - output << " \n"; + output << " \n"; output << " \n"; - output << " \n"; - output << " \n"; + output << " \n"; + output << " \n"; output << "\n"; } @@ -249,8 +250,7 @@ void TimingStats::write(OutputFormat fmt, std::ostream& output) const { writeXML(output); break; default: - VPR_FATAL_ERROR(VPR_ERROR_PACK, - "Unknown extension on in timing summary file"); + VPR_FATAL_ERROR(VPR_ERROR_PACK, "Unknown extension on in timing summary file"); break; } } @@ -292,8 +292,7 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, double setup_worst_neg_slack = sec_to_nanosec(find_setup_worst_negative_slack(setup_analyzer)); double setup_total_neg_slack = sec_to_nanosec(find_setup_total_negative_slack(setup_analyzer)); - const auto stats = TimingStats(prefix, least_slack_cpd_delay, fmax, - setup_worst_neg_slack, setup_total_neg_slack); + const auto stats = TimingStats(prefix, least_slack_cpd_delay, fmax, setup_worst_neg_slack, setup_total_neg_slack); if (!timing_summary_filename.empty()) write_setup_timing_summary(timing_summary_filename, stats); @@ -320,10 +319,8 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, VTR_LOG("%sintra-domain critical path delays (CPDs):\n", prefix.c_str()); for (const auto& path : crit_paths) { if (path.launch_domain() == path.capture_domain()) { - VTR_LOG(" %s to %s CPD: %g ns (%g MHz)\n", - constraints.clock_domain_name(path.launch_domain()).c_str(), - constraints.clock_domain_name(path.capture_domain()).c_str(), - sec_to_nanosec(path.delay()), + VTR_LOG(" %s to %s CPD: %g ns (%g MHz)\n", constraints.clock_domain_name(path.launch_domain()).c_str(), + constraints.clock_domain_name(path.capture_domain()).c_str(), sec_to_nanosec(path.delay()), sec_to_mhz(path.delay())); } } @@ -332,10 +329,8 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, VTR_LOG("%sinter-domain critical path delays (CPDs):\n", prefix.c_str()); for (const auto& path : crit_paths) { if (path.launch_domain() != path.capture_domain()) { - VTR_LOG(" %s to %s CPD: %g ns (%g MHz)\n", - constraints.clock_domain_name(path.launch_domain()).c_str(), - constraints.clock_domain_name(path.capture_domain()).c_str(), - sec_to_nanosec(path.delay()), + VTR_LOG(" %s to %s CPD: %g ns (%g MHz)\n", constraints.clock_domain_name(path.launch_domain()).c_str(), + constraints.clock_domain_name(path.capture_domain()).c_str(), sec_to_nanosec(path.delay()), sec_to_mhz(path.delay())); } } @@ -347,8 +342,7 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, if (path.launch_domain() == path.capture_domain()) { VTR_LOG(" %s to %s worst setup slack: %g ns\n", constraints.clock_domain_name(path.launch_domain()).c_str(), - constraints.clock_domain_name(path.capture_domain()).c_str(), - sec_to_nanosec(path.slack())); + constraints.clock_domain_name(path.capture_domain()).c_str(), sec_to_nanosec(path.slack())); } } VTR_LOG("\n"); @@ -358,8 +352,7 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, if (path.launch_domain() != path.capture_domain()) { VTR_LOG(" %s to %s worst setup slack: %g ns\n", constraints.clock_domain_name(path.launch_domain()).c_str(), - constraints.clock_domain_name(path.capture_domain()).c_str(), - sec_to_nanosec(path.slack())); + constraints.clock_domain_name(path.capture_domain()).c_str(), sec_to_nanosec(path.slack())); } } } @@ -373,8 +366,7 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, for (const auto& path : crit_paths) { if (path.launch_domain() == path.capture_domain() && !constraints.is_virtual_clock(path.launch_domain())) { if (path.delay() == 0.) { - VTR_LOG_WARN("%s%s to %s CPD is %g, skipping in geomean and fanout-weighted CPDs\n", - prefix.c_str(), + VTR_LOG_WARN("%s%s to %s CPD is %g, skipping in geomean and fanout-weighted CPDs\n", prefix.c_str(), constraints.clock_domain_name(path.launch_domain()).c_str(), constraints.clock_domain_name(path.capture_domain()).c_str(), sec_to_nanosec(path.delay())); @@ -397,10 +389,8 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, if (intra_domain_cpds.size() > 0) { geomean_intra_domain_cpd = vtr::geomean(intra_domain_cpds.begin(), intra_domain_cpds.end()); } - VTR_LOG("%sgeomean non-virtual intra-domain period: %g ns (%g MHz)\n", - prefix.c_str(), - sec_to_nanosec(geomean_intra_domain_cpd), - sec_to_mhz(geomean_intra_domain_cpd)); + VTR_LOG("%sgeomean non-virtual intra-domain period: %g ns (%g MHz)\n", prefix.c_str(), + sec_to_nanosec(geomean_intra_domain_cpd), sec_to_mhz(geomean_intra_domain_cpd)); //Normalize weighted fanouts by total fanouts for (auto& weighted_cpd : fanout_weighted_intra_domain_cpds) { @@ -409,12 +399,11 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, double fanout_weighted_geomean_intra_domain_cpd = std::numeric_limits::quiet_NaN(); if (fanout_weighted_intra_domain_cpds.size() > 0) { - fanout_weighted_geomean_intra_domain_cpd = vtr::geomean(fanout_weighted_intra_domain_cpds.begin(), - fanout_weighted_intra_domain_cpds.end()); + fanout_weighted_geomean_intra_domain_cpd + = vtr::geomean(fanout_weighted_intra_domain_cpds.begin(), fanout_weighted_intra_domain_cpds.end()); } - VTR_LOG("%sfanout-weighted geomean non-virtual intra-domain period: %g ns (%g MHz)\n", - prefix.c_str(), + VTR_LOG("%sfanout-weighted geomean non-virtual intra-domain period: %g ns (%g MHz)\n", prefix.c_str(), sec_to_nanosec(fanout_weighted_geomean_intra_domain_cpd), sec_to_mhz(fanout_weighted_geomean_intra_domain_cpd)); @@ -424,8 +413,10 @@ void print_setup_timing_summary(const tatum::TimingConstraints& constraints, * flow to fail if their design doesn't meet timing constraints. If both conditions are true, the function * adds details about the negative slack to a string that will be printed when VPR throws an error. */ - if (timing_ctx.terminate_if_timing_fails && (setup_worst_neg_slack < 0 || setup_total_neg_slack < 0) && prefix == "Final ") { - std::string msg = "\nDesign did not meet timing constraints.\nTiming failed and terminate_if_timing_fails set -- exiting"; + if (timing_ctx.terminate_if_timing_fails && (setup_worst_neg_slack < 0 || setup_total_neg_slack < 0) + && prefix == "Final ") { + std::string msg + = "\nDesign did not meet timing constraints.\nTiming failed and terminate_if_timing_fails set -- exiting"; VPR_FATAL_ERROR(VPR_ERROR_TIMING, msg.c_str()); } } @@ -503,7 +494,8 @@ float find_total_negative_slack_within_clb_blocks(const tatum::HoldTimingAnalyze int sink_pb_route_id = sink_gpin->pin_count_in_cluster; ClusterNetId net_id; int sink_block_pin_index, sink_net_pin_index; - std::tie(net_id, sink_block_pin_index, sink_net_pin_index) = find_pb_route_clb_input_net_pin(clb_sink_block, sink_pb_route_id); + std::tie(net_id, sink_block_pin_index, sink_net_pin_index) + = find_pb_route_clb_input_net_pin(clb_sink_block, sink_pb_route_id); if (net_id == ClusterNetId::INVALID() && sink_block_pin_index == -1 && sink_net_pin_index == -1) { /*Does not go out of the cluster*/ @@ -534,7 +526,9 @@ float find_hold_worst_negative_slack(const tatum::HoldTimingAnalyzer& hold_analy return wns; } -float find_hold_worst_slack(const tatum::HoldTimingAnalyzer& hold_analyzer, const tatum::DomainId launch, const tatum::DomainId capture) { +float find_hold_worst_slack(const tatum::HoldTimingAnalyzer& hold_analyzer, + const tatum::DomainId launch, + const tatum::DomainId capture) { auto& timing_ctx = g_vpr_ctx.timing(); float worst_slack = std::numeric_limits::infinity(); @@ -550,7 +544,8 @@ float find_hold_worst_slack(const tatum::HoldTimingAnalyzer& hold_analyzer, cons return worst_slack; } -std::vector create_hold_slack_histogram(const tatum::HoldTimingAnalyzer& hold_analyzer, size_t num_bins) { +std::vector create_hold_slack_histogram(const tatum::HoldTimingAnalyzer& hold_analyzer, + size_t num_bins) { auto& timing_ctx = g_vpr_ctx.timing(); std::vector histogram; @@ -585,9 +580,7 @@ std::vector create_hold_slack_histogram(const tatum::HoldTiming histogram[histogram.size() - 1].max_value = max_slack; //Count the slacks into the buckets - auto comp = [](const HistogramBucket& bucket, float slack) { - return bucket.max_value < slack; - }; + auto comp = [](const HistogramBucket& bucket, float slack) { return bucket.max_value < slack; }; for (tatum::NodeId node : timing_ctx.graph->logical_outputs()) { for (tatum::TimingTag tag : hold_analyzer.hold_slacks(node)) { @@ -605,7 +598,9 @@ std::vector create_hold_slack_histogram(const tatum::HoldTiming return histogram; } -void print_hold_timing_summary(const tatum::TimingConstraints& constraints, const tatum::HoldTimingAnalyzer& hold_analyzer, std::string prefix) { +void print_hold_timing_summary(const tatum::TimingConstraints& constraints, + const tatum::HoldTimingAnalyzer& hold_analyzer, + std::string prefix) { auto& timing_ctx = g_vpr_ctx.timing(); auto hold_worst_neg_slack = sec_to_nanosec(find_hold_worst_negative_slack(hold_analyzer)); @@ -630,12 +625,11 @@ void print_hold_timing_summary(const tatum::TimingConstraints& constraints, cons for (const auto& domain : constraints.clock_domains()) { float worst_slack = find_hold_worst_slack(hold_analyzer, domain, domain); - if (worst_slack == std::numeric_limits::infinity()) continue; //No path + if (worst_slack == std::numeric_limits::infinity()) + continue; //No path - VTR_LOG(" %s to %s worst hold slack: %g ns\n", - constraints.clock_domain_name(domain).c_str(), - constraints.clock_domain_name(domain).c_str(), - sec_to_nanosec(worst_slack)); + VTR_LOG(" %s to %s worst hold slack: %g ns\n", constraints.clock_domain_name(domain).c_str(), + constraints.clock_domain_name(domain).c_str(), sec_to_nanosec(worst_slack)); } VTR_LOG("\n"); @@ -645,12 +639,12 @@ void print_hold_timing_summary(const tatum::TimingConstraints& constraints, cons if (launch_domain != capture_domain) { float worst_slack = find_hold_worst_slack(hold_analyzer, launch_domain, capture_domain); - if (worst_slack == std::numeric_limits::infinity()) continue; //No path + if (worst_slack == std::numeric_limits::infinity()) + continue; //No path VTR_LOG(" %s to %s worst hold slack: %g ns\n", constraints.clock_domain_name(launch_domain).c_str(), - constraints.clock_domain_name(capture_domain).c_str(), - sec_to_nanosec(worst_slack)); + constraints.clock_domain_name(capture_domain).c_str(), sec_to_nanosec(worst_slack)); } } } @@ -661,8 +655,10 @@ void print_hold_timing_summary(const tatum::TimingConstraints& constraints, cons * flow to fail if their design doesn't meet timing constraints. If both conditions are true, the function * adds details about the negative slack to a string that will be printed when VPR throws an error. */ - if (timing_ctx.terminate_if_timing_fails && (hold_worst_neg_slack < 0 || hold_total_neg_slack < 0) && prefix == "Final ") { - std::string msg = "\nDesign did not meet timing constraints.\nTiming failed and terminate_if_timing_fails set -- exiting"; + if (timing_ctx.terminate_if_timing_fails && (hold_worst_neg_slack < 0 || hold_total_neg_slack < 0) + && prefix == "Final ") { + std::string msg + = "\nDesign did not meet timing constraints.\nTiming failed and terminate_if_timing_fails set -- exiting"; VPR_FATAL_ERROR(VPR_ERROR_TIMING, msg.c_str()); } } @@ -670,7 +666,8 @@ void print_hold_timing_summary(const tatum::TimingConstraints& constraints, cons /* * General utilities */ -std::map count_clock_fanouts(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& setup_analyzer) { +std::map count_clock_fanouts(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& setup_analyzer) { std::map fanouts; for (tatum::NodeId node : timing_graph.nodes()) { tatum::NodeType type = timing_graph.node_type(node); @@ -717,7 +714,9 @@ float calculate_clb_net_pin_criticality(const SetupTimingInfo& timing_info, * @brief Returns the raw setup slack of a net's pin in the CLB netlist. * Assumes that the timing graph is correct and up to date. */ -float calculate_clb_net_pin_setup_slack(const SetupTimingInfo& timing_info, const ClusteredPinAtomPinsLookup& pin_lookup, ClusterPinId clb_pin) { +float calculate_clb_net_pin_setup_slack(const SetupTimingInfo& timing_info, + const ClusteredPinAtomPinsLookup& pin_lookup, + ClusterPinId clb_pin) { //There may be multiple atom netlist pins connected to this CLB pin float clb_pin_setup_slack = std::numeric_limits::infinity(); for (const auto atom_pin : pin_lookup.connected_atom_pins(clb_pin)) { @@ -794,7 +793,8 @@ float calc_relaxed_criticality(const std::map& domains_max_re //Special case to avoid divide by zero crit = 1.; } else { - std::string msg = vtr::string_fmt("Invalid maximum required time %g (expected >= 0). Shifted slack was %g.", max_req, slack); + std::string msg = vtr::string_fmt("Invalid maximum required time %g (expected >= 0). Shifted slack was %g.", + max_req, slack); VPR_ERROR(VPR_ERROR_TIMING, msg.c_str()); } @@ -818,7 +818,8 @@ float calc_relaxed_criticality(const std::map& domains_max_re void print_tatum_cpds(std::vector cpds) { for (auto path : cpds) { - VTR_LOG("Tatum %zu -> %zu: least_slack=%g cpd=%g\n", size_t(path.launch_domain()), size_t(path.capture_domain()), float(path.slack()), float(path.delay())); + VTR_LOG("Tatum %zu -> %zu: least_slack=%g cpd=%g\n", size_t(path.launch_domain()), + size_t(path.capture_domain()), float(path.slack()), float(path.delay())); } } diff --git a/vpr/src/timing/timing_util.h b/vpr/src/timing/timing_util.h index 51fc0491c28..527aeef7d52 100644 --- a/vpr/src/timing/timing_util.h +++ b/vpr/src/timing/timing_util.h @@ -24,10 +24,12 @@ double sec_to_mhz(double seconds); */ //Returns the path delay of the longest critical timing path (i.e. across all domains) -tatum::TimingPathInfo find_longest_critical_path_delay(const tatum::TimingConstraints& constraints, const tatum::SetupTimingAnalyzer& setup_analyzer); +tatum::TimingPathInfo find_longest_critical_path_delay(const tatum::TimingConstraints& constraints, + const tatum::SetupTimingAnalyzer& setup_analyzer); //Returns the path delay of the least-slack critical timing path (i.e. across all domains) -tatum::TimingPathInfo find_least_slack_critical_path_delay(const tatum::TimingConstraints& constraints, const tatum::SetupTimingAnalyzer& setup_analyzer); +tatum::TimingPathInfo find_least_slack_critical_path_delay(const tatum::TimingConstraints& constraints, + const tatum::SetupTimingAnalyzer& setup_analyzer); //Returns the total negative slack (setup) of all timing end-points and clock domain pairs float find_setup_total_negative_slack(const tatum::SetupTimingAnalyzer& setup_analyzer); @@ -36,10 +38,14 @@ float find_setup_total_negative_slack(const tatum::SetupTimingAnalyzer& setup_an float find_setup_worst_negative_slack(const tatum::SetupTimingAnalyzer& setup_analyzer); //Returns the slack at a particular node for the specified clock domains (if found), otherwise NAN -float find_node_setup_slack(const tatum::SetupTimingAnalyzer& setup_analyzer, tatum::NodeId node, tatum::DomainId launch_domain, tatum::DomainId capture_domain); +float find_node_setup_slack(const tatum::SetupTimingAnalyzer& setup_analyzer, + tatum::NodeId node, + tatum::DomainId launch_domain, + tatum::DomainId capture_domain); //Returns a setup slack histogram -std::vector create_setup_slack_histogram(const tatum::SetupTimingAnalyzer& setup_analyzer, size_t num_bins = 10); +std::vector create_setup_slack_histogram(const tatum::SetupTimingAnalyzer& setup_analyzer, + size_t num_bins = 10); //Returns a criticality histogram std::vector create_criticality_histogram(const Netlist<>& net_list, @@ -49,7 +55,10 @@ std::vector create_criticality_histogram(const Netlist<>& net_l size_t num_bins = 10); //Print a useful summary of timing information -void print_setup_timing_summary(const tatum::TimingConstraints& constraints, const tatum::SetupTimingAnalyzer& setup_analyzer, std::string prefix, std::string timing_summary_filename); +void print_setup_timing_summary(const tatum::TimingConstraints& constraints, + const tatum::SetupTimingAnalyzer& setup_analyzer, + std::string prefix, + std::string timing_summary_filename); /* * Hold-time related statistics @@ -61,13 +70,18 @@ float find_hold_total_negative_slack(const tatum::HoldTimingAnalyzer& hold_analy float find_hold_worst_negative_slack(const tatum::HoldTimingAnalyzer& hold_analyzer); //Returns the worst slack (hold) between the specified launch and capture clock domains -float find_hold_worst_slack(const tatum::HoldTimingAnalyzer& hold_analyzer, const tatum::DomainId launch, const tatum::DomainId capture); +float find_hold_worst_slack(const tatum::HoldTimingAnalyzer& hold_analyzer, + const tatum::DomainId launch, + const tatum::DomainId capture); //Returns a setup slack histogram -std::vector create_hold_slack_histogram(const tatum::HoldTimingAnalyzer& hold_analyzer, size_t num_bins = 10); +std::vector create_hold_slack_histogram(const tatum::HoldTimingAnalyzer& hold_analyzer, + size_t num_bins = 10); //Print a useful summary of timing information -void print_hold_timing_summary(const tatum::TimingConstraints& constraints, const tatum::HoldTimingAnalyzer& hold_analyzer, std::string prefix); +void print_hold_timing_summary(const tatum::TimingConstraints& constraints, + const tatum::HoldTimingAnalyzer& hold_analyzer, + std::string prefix); float find_total_negative_slack_within_clb_blocks(const tatum::HoldTimingAnalyzer& hold_analyzer); @@ -80,7 +94,8 @@ tatum::NodeId find_origin_node_for_hold_slack(const tatum::TimingTags::tag_range */ //Returns the a map of domain's and their clock fanout (i.e. logical outputs at which the clock captures) -std::map count_clock_fanouts(const tatum::TimingGraph& timing_graph, const tatum::SetupTimingAnalyzer& setup_analyzer); +std::map count_clock_fanouts(const tatum::TimingGraph& timing_graph, + const tatum::SetupTimingAnalyzer& setup_analyzer); /* * Slack and criticality calculation utilities @@ -93,7 +108,9 @@ float calculate_clb_net_pin_criticality(const SetupTimingInfo& timing_info, bool is_flat); //Return the setup slack of a net's pin in the CLB netlist -float calculate_clb_net_pin_setup_slack(const SetupTimingInfo& timing_info, const ClusteredPinAtomPinsLookup& pin_lookup, ClusterPinId clb_pin); +float calculate_clb_net_pin_setup_slack(const SetupTimingInfo& timing_info, + const ClusteredPinAtomPinsLookup& pin_lookup, + ClusterPinId clb_pin); //Returns the worst (maximum) criticality of the set of slack tags specified. Requires the maximum //required time and worst slack for all domain pairs represent by the slack tags @@ -119,8 +136,12 @@ void print_tatum_cpds(std::vector cpds); tatum::NodeId id_or_pin_name_to_tnode(std::string name_or_id); tatum::NodeId pin_name_to_tnode(std::string name); -void write_setup_timing_graph_dot(std::string filename, SetupTimingInfo& timing_info, tatum::NodeId debug_node = tatum::NodeId::INVALID()); -void write_hold_timing_graph_dot(std::string filename, HoldTimingInfo& timing_info, tatum::NodeId debug_node = tatum::NodeId::INVALID()); +void write_setup_timing_graph_dot(std::string filename, + SetupTimingInfo& timing_info, + tatum::NodeId debug_node = tatum::NodeId::INVALID()); +void write_hold_timing_graph_dot(std::string filename, + HoldTimingInfo& timing_info, + tatum::NodeId debug_node = tatum::NodeId::INVALID()); struct TimingStats { private: @@ -129,13 +150,13 @@ struct TimingStats { void writeXML(std::ostream& output) const; public: - TimingStats(std::string prefix, double least_slack_cpd_delay, double fmax, double setup_worst_neg_slack, double setup_total_neg_slack); + TimingStats(std::string prefix, + double least_slack_cpd_delay, + double fmax, + double setup_worst_neg_slack, + double setup_total_neg_slack); - enum OutputFormat { - HumanReadable, - JSON, - XML - }; + enum OutputFormat { HumanReadable, JSON, XML }; double least_slack_cpd_delay; double fmax; diff --git a/vpr/src/util/hash.cpp b/vpr/src/util/hash.cpp index 96271bfe996..4d5f701a4f2 100644 --- a/vpr/src/util/hash.cpp +++ b/vpr/src/util/hash.cpp @@ -181,8 +181,7 @@ void get_hash_stats(t_hash** hash_table, char* hash_table_name) { avg_num = (float)total_elements / ((float)HASHSIZE - (float)num_NULL); VTR_LOG("\n"); - VTR_LOG("The hash table '%s' is of size %d.\n", - hash_table_name, HASHSIZE); + VTR_LOG("The hash table '%s' is of size %d.\n", hash_table_name, HASHSIZE); VTR_LOG( "It has: %d keys that are never used; total of %d elements; " "an average linked-list length of %.1f; and a maximum linked-list length of %d.\n", diff --git a/vpr/src/util/hash.h b/vpr/src/util/hash.h index d37cbf51733..eb74effca8d 100644 --- a/vpr/src/util/hash.h +++ b/vpr/src/util/hash.h @@ -29,8 +29,7 @@ struct t_hash_iterator { t_hash** alloc_hash_table(); void free_hash_table(t_hash** hash_table); t_hash_iterator start_hash_table_iterator(); -t_hash* get_next_hash(t_hash** hash_table, - t_hash_iterator* hash_iterator); +t_hash* get_next_hash(t_hash** hash_table, t_hash_iterator* hash_iterator); t_hash* insert_in_hash_table(t_hash** hash_table, const char* name, int next_free_index); t_hash* get_hash_entry(t_hash** hash_table, const char* name); int hash_value(const char* name); diff --git a/vpr/src/util/vpr_net_pins_matrix.h b/vpr/src/util/vpr_net_pins_matrix.h index 585e7f3873a..f95ee9fc044 100644 --- a/vpr/src/util/vpr_net_pins_matrix.h +++ b/vpr/src/util/vpr_net_pins_matrix.h @@ -21,27 +21,21 @@ using AtomNetPinsMatrix = NetPinsMatrix_; template ClbNetPinsMatrix make_net_pins_matrix(const ClusteredNetlist& nlist, T default_value = T()) { - auto pins_in_net = [&](ClusterNetId net) { - return nlist.net_pins(net).size(); - }; + auto pins_in_net = [&](ClusterNetId net) { return nlist.net_pins(net).size(); }; return ClbNetPinsMatrix(nlist.nets().size(), pins_in_net, default_value); } template AtomNetPinsMatrix make_net_pins_matrix(const AtomNetlist& nlist, T default_value = T()) { - auto pins_in_net = [&](AtomNetId net) { - return nlist.net_pins(net).size(); - }; + auto pins_in_net = [&](AtomNetId net) { return nlist.net_pins(net).size(); }; return AtomNetPinsMatrix(nlist.nets().size(), pins_in_net, default_value); } template NetPinsMatrix make_net_pins_matrix(const Netlist<>& nlist, T default_value = T()) { - auto pins_in_net = [&](ParentNetId net) { - return nlist.net_pins(net).size(); - }; + auto pins_in_net = [&](ParentNetId net) { return nlist.net_pins(net).size(); }; return NetPinsMatrix(nlist.nets().size(), pins_in_net, default_value); } diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 3caf87e43ba..9a13f9e368e 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -57,21 +57,45 @@ static void alloc_and_load_blk_pin_from_port_pin(); * Then, check that whether start_pin_index and end_pin_index are specified. If * * they are, mark down the pins from start_pin_index to end_pin_index, inclusive. * * Otherwise, mark down all the pins in that port. */ -static void mark_direct_of_ports(int idirect, int direct_type, char* pb_type_name, char* port_name, int end_pin_index, int start_pin_index, char* src_string, int line, int** idirect_from_blk_pin, int** direct_type_from_blk_pin); +static void mark_direct_of_ports(int idirect, + int direct_type, + char* pb_type_name, + char* port_name, + int end_pin_index, + int start_pin_index, + char* src_string, + int line, + int** idirect_from_blk_pin, + int** direct_type_from_blk_pin); static void get_blk_pin_from_port_pin(int blk_type_index, int sub_tile, int port, int port_pin, int* blk_pin); /* Mark the pin entry in idirect_from_blk_pin with idirect and the pin entry in * * direct_type_from_blk_pin with direct_type from start_pin_index to * * end_pin_index. */ -static void mark_direct_of_pins(int start_pin_index, int end_pin_index, int itype, int isub_tile, int iport, int** idirect_from_blk_pin, int idirect, int** direct_type_from_blk_pin, int direct_type, int line, char* src_string); - -static void load_pb_graph_pin_lookup_from_index_rec(t_pb_graph_pin** pb_graph_pin_lookup_from_index, t_pb_graph_node* pb_graph_node); +static void mark_direct_of_pins(int start_pin_index, + int end_pin_index, + int itype, + int isub_tile, + int iport, + int** idirect_from_blk_pin, + int idirect, + int** direct_type_from_blk_pin, + int direct_type, + int line, + char* src_string); + +static void load_pb_graph_pin_lookup_from_index_rec(t_pb_graph_pin** pb_graph_pin_lookup_from_index, + t_pb_graph_node* pb_graph_node); static void load_pin_id_to_pb_mapping_rec(t_pb* cur_pb, t_pb** pin_id_to_pb_mapping); static std::vector find_connected_internal_clb_sink_pins(ClusterBlockId clb, int pb_pin); -static void find_connected_internal_clb_sink_pins_recurr(ClusterBlockId clb, int pb_pin, std::vector& connected_sink_pb_pins); -static AtomPinId find_atom_pin_for_pb_route_id(ClusterBlockId clb, int pb_route_id, const IntraLbPbPinLookup& pb_gpin_lookup); +static void find_connected_internal_clb_sink_pins_recurr(ClusterBlockId clb, + int pb_pin, + std::vector& connected_sink_pb_pins); +static AtomPinId find_atom_pin_for_pb_route_id(ClusterBlockId clb, + int pb_route_id, + const IntraLbPbPinLookup& pb_gpin_lookup); static bool block_type_contains_blif_model(t_logical_block_type_ptr type, const std::regex& blif_model_regex); static bool pb_type_contains_blif_model(const t_pb_type* pb_type, const std::regex& blif_model_regex); @@ -106,7 +130,8 @@ const t_model_ports* find_model_port(const t_model* model, const std::string& na } if (required) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find port '%s; on architecture model '%s'\n", name.c_str(), model->name); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find port '%s; on architecture model '%s'\n", name.c_str(), + model->name); } return nullptr; @@ -136,7 +161,6 @@ void sync_grid_to_blocks() { /* Reset usage and allocate blocks list if needed */ grid_blocks = GridBlock(device_grid.width(), device_grid.height(), device_ctx.grid.get_num_layers()); - for (int layer_num = 0; layer_num < num_layers; layer_num++) { for (int x = 0; x < (int)device_grid.width(); ++x) { for (int y = 0; y < (int)device_grid.height(); ++y) { @@ -158,30 +182,31 @@ void sync_grid_to_blocks() { auto type = physical_tile_type(blk_loc); /* Check range of block coords */ - if (blk_x < 0 || blk_y < 0 - || (blk_x + type->width - 1) > int(device_ctx.grid.width() - 1) - || (blk_y + type->height - 1) > int(device_ctx.grid.height() - 1) - || blk_z < 0 || blk_z > (type->capacity)) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Block %zu is at invalid location (%d, %d, %d).\n", - size_t(blk_id), blk_x, blk_y, blk_z); + if (blk_x < 0 || blk_y < 0 || (blk_x + type->width - 1) > int(device_ctx.grid.width() - 1) + || (blk_y + type->height - 1) > int(device_ctx.grid.height() - 1) || blk_z < 0 + || blk_z > (type->capacity)) { + VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Block %zu is at invalid location (%d, %d, %d).\n", size_t(blk_id), blk_x, + blk_y, blk_z); } /* Check types match */ if (type != device_ctx.grid.get_physical_type({blk_x, blk_y, blk_layer})) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE, "A block is in a grid location (%d x %d) layer (%d) with a conflicting types '%s' and '%s' .\n", - blk_x, blk_y, blk_layer, - type->name, - device_ctx.grid.get_physical_type({blk_x, blk_y, blk_layer})->name); + VPR_FATAL_ERROR( + VPR_ERROR_PLACE, + "A block is in a grid location (%d x %d) layer (%d) with a conflicting types '%s' and '%s' .\n", blk_x, + blk_y, blk_layer, type->name, device_ctx.grid.get_physical_type({blk_x, blk_y, blk_layer})->name); } /* Check already in use */ if (grid_blocks.block_at_location(blk_loc)) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Location (%d, %d, %d, %d) is used more than once.\n", - blk_x, blk_y, blk_z, blk_layer); + VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Location (%d, %d, %d, %d) is used more than once.\n", blk_x, blk_y, blk_z, + blk_layer); } - if (device_ctx.grid.get_width_offset({blk_x, blk_y, blk_layer}) != 0 || device_ctx.grid.get_height_offset({blk_x, blk_y, blk_layer}) != 0) { - VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Large block not aligned in placement for cluster_ctx.blocks %lu at (%d, %d, %d, %d).", + if (device_ctx.grid.get_width_offset({blk_x, blk_y, blk_layer}) != 0 + || device_ctx.grid.get_height_offset({blk_x, blk_y, blk_layer}) != 0) { + VPR_FATAL_ERROR(VPR_ERROR_PLACE, + "Large block not aligned in placement for cluster_ctx.blocks %lu at (%d, %d, %d, %d).", size_t(blk_id), blk_x, blk_y, blk_z, blk_layer); } @@ -207,15 +232,13 @@ std::string rr_node_arch_name(RRNodeId inode, bool is_flat) { std::string rr_node_arch_name; if (rr_graph.node_type(inode) == OPIN || rr_graph.node_type(inode) == IPIN) { //Pin names - auto type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(rr_node), - rr_graph.node_ylow(rr_node), - rr_graph.node_layer(rr_node)}); + auto type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), rr_graph.node_layer(rr_node)}); rr_node_arch_name += block_type_pin_index_to_name(type, rr_graph.node_pin_num(rr_node), is_flat); } else if (rr_graph.node_type(inode) == SOURCE || rr_graph.node_type(inode) == SINK) { //Set of pins associated with SOURCE/SINK - auto type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(rr_node), - rr_graph.node_ylow(rr_node), - rr_graph.node_layer(rr_node)}); + auto type = device_ctx.grid.get_physical_type( + {rr_graph.node_xlow(rr_node), rr_graph.node_ylow(rr_node), rr_graph.node_layer(rr_node)}); auto pin_names = block_type_class_index_to_pin_names(type, rr_graph.node_class_num(rr_node), is_flat); if (pin_names.size() > 1) { rr_node_arch_name += rr_graph.node_type_string(inode); @@ -277,7 +300,9 @@ void swap(IntraLbPbPinLookup& lhs, IntraLbPbPinLookup& rhs) { //Returns the set of pins which are connected to the top level clb pin // The pin(s) may be input(s) or and output (returning the connected sinks or drivers respectively) -std::vector find_clb_pin_connected_atom_pins(ClusterBlockId clb, int logical_pin, const IntraLbPbPinLookup& pb_gpin_lookup) { +std::vector find_clb_pin_connected_atom_pins(ClusterBlockId clb, + int logical_pin, + const IntraLbPbPinLookup& pb_gpin_lookup) { std::vector atom_pins; auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; @@ -332,7 +357,9 @@ AtomPinId find_clb_pin_driver_atom_pin(ClusterBlockId clb, int logical_pin, cons } //Returns the set of atom sink pins associated with the top level clb input pin -std::vector find_clb_pin_sink_atom_pins(ClusterBlockId clb, int logical_pin, const IntraLbPbPinLookup& pb_gpin_lookup) { +std::vector find_clb_pin_sink_atom_pins(ClusterBlockId clb, + int logical_pin, + const IntraLbPbPinLookup& pb_gpin_lookup) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& atom_ctx = g_vpr_ctx.atom(); @@ -341,7 +368,8 @@ std::vector find_clb_pin_sink_atom_pins(ClusterBlockId clb, int logic VTR_ASSERT_MSG(logical_pin < cluster_ctx.clb_nlist.block_type(clb)->pb_type->num_pins, "Must be a valid tile pin"); VTR_ASSERT(cluster_ctx.clb_nlist.block_pb(clb)); - VTR_ASSERT_MSG(logical_pin < cluster_ctx.clb_nlist.block_pb(clb)->pb_graph_node->num_pins(), "Pin must map to a top-level pb pin"); + VTR_ASSERT_MSG(logical_pin < cluster_ctx.clb_nlist.block_pb(clb)->pb_graph_node->num_pins(), + "Pin must map to a top-level pb pin"); VTR_ASSERT_MSG(pb_routes[logical_pin].driver_pb_pin_id < 0, "CLB input pin should have no internal drivers"); @@ -373,7 +401,9 @@ static std::vector find_connected_internal_clb_sink_pins(ClusterBlockId clb } //Recursive helper for find_connected_internal_clb_sink_pins() -static void find_connected_internal_clb_sink_pins_recurr(ClusterBlockId clb, int pb_pin, std::vector& connected_sink_pb_pins) { +static void find_connected_internal_clb_sink_pins_recurr(ClusterBlockId clb, + int pb_pin, + std::vector& connected_sink_pb_pins) { auto& cluster_ctx = g_vpr_ctx.clustering(); if (cluster_ctx.clb_nlist.block_pb(clb)->pb_route[pb_pin].sink_pb_pin_ids.empty()) { @@ -386,11 +416,14 @@ static void find_connected_internal_clb_sink_pins_recurr(ClusterBlockId clb, int } //Maps from a CLB's pb_route ID to it's matching AtomPinId (if the pb_route is a primitive pin) -static AtomPinId find_atom_pin_for_pb_route_id(ClusterBlockId clb, int pb_route_id, const IntraLbPbPinLookup& pb_gpin_lookup) { +static AtomPinId find_atom_pin_for_pb_route_id(ClusterBlockId clb, + int pb_route_id, + const IntraLbPbPinLookup& pb_gpin_lookup) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& atom_ctx = g_vpr_ctx.atom(); - VTR_ASSERT_MSG(cluster_ctx.clb_nlist.block_pb(clb)->pb_route[pb_route_id].atom_net_id, "PB route should correspond to a valid atom net"); + VTR_ASSERT_MSG(cluster_ctx.clb_nlist.block_pb(clb)->pb_route[pb_route_id].atom_net_id, + "PB route should correspond to a valid atom net"); //Find the graph pin associated with this pb_route const t_pb_graph_pin* gpin = pb_gpin_lookup.pb_gpin(cluster_ctx.clb_nlist.block_type(clb)->index, pb_route_id); @@ -480,11 +513,11 @@ std::tuple find_pb_route_clb_input_net_pin(ClusterBlockI auto remapped_clb = cluster_ctx.post_routing_clb_pin_nets.find(clb); if (remapped_clb != cluster_ctx.post_routing_clb_pin_nets.end()) { auto remapped_result = remapped_clb->second.find(curr_pb_pin_id); - if ((remapped_result != remapped_clb->second.end()) - && (remapped_result->second != clb_net_idx)) { + if ((remapped_result != remapped_clb->second.end()) && (remapped_result->second != clb_net_idx)) { clb_net_idx = remapped_result->second; VTR_ASSERT(clb_net_idx); - clb_net_pin_idx = cluster_ctx.clb_nlist.block_pin_net_index(clb, cluster_ctx.pre_routing_net_pin_mapping.at(clb).at(curr_pb_pin_id)); + clb_net_pin_idx = cluster_ctx.clb_nlist.block_pin_net_index( + clb, cluster_ctx.pre_routing_net_pin_mapping.at(clb).at(curr_pb_pin_id)); } } VTR_ASSERT(clb_net_pin_idx >= 0); @@ -546,8 +579,7 @@ t_physical_tile_type_ptr physical_tile_type(ParentBlockId blk_id, bool is_flat) } } -int get_sub_tile_index(ClusterBlockId blk, - const vtr::vector_map& block_locs) { +int get_sub_tile_index(ClusterBlockId blk, const vtr::vector_map& block_locs) { auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -562,7 +594,8 @@ int get_sub_tile_index(ClusterBlockId blk, if (sub_tile.capacity.is_in_range(sub_tile_coordinate)) { auto result = std::find(sub_tile.equivalent_sites.begin(), sub_tile.equivalent_sites.end(), logical_block); if (result == sub_tile.equivalent_sites.end()) { - VPR_THROW(VPR_ERROR_PLACE, "The Block Id %d has been placed in an incompatible sub tile location.\n", blk); + VPR_THROW(VPR_ERROR_PLACE, "The Block Id %d has been placed in an incompatible sub tile location.\n", + blk); } return sub_tile.index; @@ -635,11 +668,7 @@ t_class_range get_class_range_for_block(const AtomBlockId atom_blk) { auto [physical_tile, sub_tile, sub_tile_cap, logical_block] = get_cluster_blk_physical_spec(cluster_blk); const t_pb_graph_node* pb_graph_node = atom_look_up.atom_pb_graph_node(atom_blk); VTR_ASSERT(pb_graph_node != nullptr); - return get_pb_graph_node_class_physical_range(physical_tile, - sub_tile, - logical_block, - sub_tile_cap, - pb_graph_node); + return get_pb_graph_node_class_physical_range(physical_tile, sub_tile, logical_block, sub_tile_cap, pb_graph_node); } t_class_range get_class_range_for_block(const ParentBlockId blk_id, bool is_flat) { @@ -670,7 +699,8 @@ std::pair get_pin_range_for_block(const ClusterBlockId blk_id) { return {pin_low, pin_high}; } -t_physical_tile_type_ptr find_tile_type_by_name(const std::string& name, const std::vector& types) { +t_physical_tile_type_ptr find_tile_type_by_name(const std::string& name, + const std::vector& types) { for (auto const& type : types) { if (type.name == name) { return &type; @@ -825,7 +855,8 @@ InstPort parse_inst_port(const std::string& str) { int num_pins = find_tile_port_by_name(blk_type, inst_port.port_name().c_str()).num_pins; if (num_pins == OPEN) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find port %s on block type %s", inst_port.port_name().c_str(), inst_port.instance_name().c_str()); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find port %s on block type %s", inst_port.port_name().c_str(), + inst_port.instance_name().c_str()); } if (inst_port.port_low_index() == InstPort::UNSPECIFIED) { @@ -835,12 +866,12 @@ InstPort parse_inst_port(const std::string& str) { inst_port.set_port_high_index(num_pins - 1); } else { - if (inst_port.port_low_index() < 0 || inst_port.port_low_index() >= num_pins - || inst_port.port_high_index() < 0 || inst_port.port_high_index() >= num_pins) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Pin indices [%d:%d] on port %s of block type %s out of expected range [%d:%d]", - inst_port.port_low_index(), inst_port.port_high_index(), - inst_port.port_name().c_str(), inst_port.instance_name().c_str(), - 0, num_pins - 1); + if (inst_port.port_low_index() < 0 || inst_port.port_low_index() >= num_pins || inst_port.port_high_index() < 0 + || inst_port.port_high_index() >= num_pins) { + VPR_FATAL_ERROR(VPR_ERROR_ARCH, + "Pin indices [%d:%d] on port %s of block type %s out of expected range [%d:%d]", + inst_port.port_low_index(), inst_port.port_high_index(), inst_port.port_name().c_str(), + inst_port.instance_name().c_str(), 0, num_pins - 1); } } return inst_port; @@ -888,8 +919,7 @@ int get_max_primitives_in_pb_type(t_pb_type* pb_type) { for (i = 0; i < pb_type->num_modes; i++) { for (j = 0; j < pb_type->modes[i].num_pb_type_children; j++) { temp_size += pb_type->modes[i].pb_type_children[j].num_pb - * get_max_primitives_in_pb_type( - &pb_type->modes[i].pb_type_children[j]); + * get_max_primitives_in_pb_type(&pb_type->modes[i].pb_type_children[j]); } if (temp_size > max_size) { max_size = temp_size; @@ -911,8 +941,7 @@ int get_max_nets_in_pb_type(const t_pb_type* pb_type) { temp_nets = 0; for (j = 0; j < pb_type->modes[i].num_pb_type_children; j++) { temp_nets += pb_type->modes[i].pb_type_children[j].num_pb - * get_max_nets_in_pb_type( - &pb_type->modes[i].pb_type_children[j]); + * get_max_nets_in_pb_type(&pb_type->modes[i].pb_type_children[j]); } if (temp_nets > max_nets) { max_nets = temp_nets; @@ -920,8 +949,7 @@ int get_max_nets_in_pb_type(const t_pb_type* pb_type) { } } if (pb_type->parent_mode == nullptr) { - max_nets += pb_type->num_input_pins + pb_type->num_output_pins - + pb_type->num_clock_pins; + max_nets += pb_type->num_input_pins + pb_type->num_output_pins + pb_type->num_clock_pins; } return max_nets; } @@ -932,8 +960,7 @@ int get_max_depth_of_pb_type(t_pb_type* pb_type) { max_depth = pb_type->depth; for (i = 0; i < pb_type->num_modes; i++) { for (j = 0; j < pb_type->modes[i].num_pb_type_children; j++) { - temp_depth = get_max_depth_of_pb_type( - &pb_type->modes[i].pb_type_children[j]); + temp_depth = get_max_depth_of_pb_type(&pb_type->modes[i].pb_type_children[j]); if (temp_depth > max_depth) { max_depth = temp_depth; } @@ -1033,7 +1060,9 @@ AtomBlockId find_memory_sibling(const t_pb* pb) { * Return pb_graph_node pin from model port and pin * NULL if not found */ -t_pb_graph_pin* get_pb_graph_node_pin_from_model_port_pin(const t_model_ports* model_port, const int model_pin, const t_pb_graph_node* pb_graph_node) { +t_pb_graph_pin* get_pb_graph_node_pin_from_model_port_pin(const t_model_ports* model_port, + const int model_pin, + const t_pb_graph_node* pb_graph_node) { int i; if (model_port->dir == IN_PORT) { @@ -1104,7 +1133,9 @@ AtomPinId find_atom_pin(ClusterBlockId blk_id, const t_pb_graph_pin* pb_gpin) { //Retrieves the pb_graph_pin associated with an AtomPinId // Currently this function just wraps get_pb_graph_node_pin_from_model_port_pin() // in a more convenient interface. -const t_pb_graph_pin* find_pb_graph_pin(const AtomNetlist& netlist, const AtomLookup& netlist_lookup, const AtomPinId pin_id) { +const t_pb_graph_pin* find_pb_graph_pin(const AtomNetlist& netlist, + const AtomLookup& netlist_lookup, + const AtomPinId pin_id) { VTR_ASSERT(pin_id); //Get the graph node @@ -1126,8 +1157,7 @@ const t_pb_graph_pin* find_pb_graph_pin(const AtomNetlist& netlist, const AtomLo return get_pb_graph_node_pin_from_model_port_pin(model_port, ipin, pb_gnode); } -t_pb_graph_pin* get_pb_graph_node_pin_from_pb_graph_node(t_pb_graph_node* pb_graph_node, - int ipin) { +t_pb_graph_pin* get_pb_graph_node_pin_from_pb_graph_node(t_pb_graph_node* pb_graph_node, int ipin) { int i, count; const t_pb_type* pb_type = pb_graph_node->pb_type; @@ -1186,7 +1216,8 @@ const t_port* find_pb_graph_port(const t_pb_graph_node* pb_gnode, const std::str const t_pb_graph_pin* find_pb_graph_pin(const t_pb_graph_node* pb_gnode, const std::string& port_name, int index) { for (int iport = 0; iport < pb_gnode->num_input_ports; iport++) { - if (pb_gnode->num_input_pins[iport] < index) continue; + if (pb_gnode->num_input_pins[iport] < index) + continue; const t_pb_graph_pin* gpin = &pb_gnode->input_pins[iport][index]; @@ -1195,7 +1226,8 @@ const t_pb_graph_pin* find_pb_graph_pin(const t_pb_graph_node* pb_gnode, const s } } for (int iport = 0; iport < pb_gnode->num_output_ports; iport++) { - if (pb_gnode->num_output_pins[iport] < index) continue; + if (pb_gnode->num_output_pins[iport] < index) + continue; const t_pb_graph_pin* gpin = &pb_gnode->output_pins[iport][index]; @@ -1204,7 +1236,8 @@ const t_pb_graph_pin* find_pb_graph_pin(const t_pb_graph_node* pb_gnode, const s } } for (int iport = 0; iport < pb_gnode->num_clock_ports; iport++) { - if (pb_gnode->num_clock_pins[iport] < index) continue; + if (pb_gnode->num_clock_pins[iport] < index) + continue; const t_pb_graph_pin* gpin = &pb_gnode->clock_pins[iport][index]; @@ -1218,7 +1251,8 @@ const t_pb_graph_pin* find_pb_graph_pin(const t_pb_graph_node* pb_gnode, const s } /* Recusively visit through all pb_graph_nodes to populate pb_graph_pin_lookup_from_index */ -static void load_pb_graph_pin_lookup_from_index_rec(t_pb_graph_pin** pb_graph_pin_lookup_from_index, t_pb_graph_node* pb_graph_node) { +static void load_pb_graph_pin_lookup_from_index_rec(t_pb_graph_pin** pb_graph_pin_lookup_from_index, + t_pb_graph_node* pb_graph_node) { for (int iport = 0; iport < pb_graph_node->num_input_ports; iport++) { for (int ipin = 0; ipin < pb_graph_node->num_input_pins[iport]; ipin++) { t_pb_graph_pin* pb_pin = &pb_graph_node->input_pins[iport][ipin]; @@ -1244,7 +1278,8 @@ static void load_pb_graph_pin_lookup_from_index_rec(t_pb_graph_pin** pb_graph_pi for (int imode = 0; imode < pb_graph_node->pb_type->num_modes; imode++) { for (int ipb_type = 0; ipb_type < pb_graph_node->pb_type->modes[imode].num_pb_type_children; ipb_type++) { for (int ipb = 0; ipb < pb_graph_node->pb_type->modes[imode].pb_type_children[ipb_type].num_pb; ipb++) { - load_pb_graph_pin_lookup_from_index_rec(pb_graph_pin_lookup_from_index, &pb_graph_node->child_pb_graph_nodes[imode][ipb_type][ipb]); + load_pb_graph_pin_lookup_from_index_rec(pb_graph_pin_lookup_from_index, + &pb_graph_node->child_pb_graph_nodes[imode][ipb_type][ipb]); } } } @@ -1294,7 +1329,8 @@ vtr::vector alloc_and_load_pin_id_to_pb_mapping() { vtr::vector pin_id_to_pb_mapping(cluster_ctx.clb_nlist.blocks().size()); for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - pin_id_to_pb_mapping[blk_id] = new t_pb*[cluster_ctx.clb_nlist.block_type(blk_id)->pb_graph_head->total_pb_pins]; + pin_id_to_pb_mapping[blk_id] + = new t_pb*[cluster_ctx.clb_nlist.block_type(blk_id)->pb_graph_head->total_pb_pins]; for (int j = 0; j < cluster_ctx.clb_nlist.block_type(blk_id)->pb_graph_head->total_pb_pins; j++) { pin_id_to_pb_mapping[blk_id][j] = nullptr; } @@ -1349,13 +1385,15 @@ void free_pin_id_to_pb_mapping(vtr::vector& pin_id_to_pb pin_id_to_pb_mapping.clear(); } -std::tuple get_cluster_blk_physical_spec(ClusterBlockId cluster_blk_id) { +std::tuple get_cluster_blk_physical_spec( + ClusterBlockId cluster_blk_id) { auto& grid = g_vpr_ctx.device().grid; auto& block_locs = g_vpr_ctx.placement().block_locs(); auto& loc = block_locs[cluster_blk_id].loc; int cap = loc.sub_tile; const auto& physical_type = grid.get_physical_type({loc.x, loc.y, loc.layer}); - VTR_ASSERT(grid.get_width_offset({loc.x, loc.y, loc.layer}) == 0 && grid.get_height_offset(t_physical_tile_loc(loc.x, loc.y, loc.layer)) == 0); + VTR_ASSERT(grid.get_width_offset({loc.x, loc.y, loc.layer}) == 0 + && grid.get_height_offset(t_physical_tile_loc(loc.x, loc.y, loc.layer)) == 0); VTR_ASSERT(cap < physical_type->capacity); auto& cluster_net_list = g_vpr_ctx.clustering().clb_nlist; @@ -1367,8 +1405,7 @@ std::tuple get_cluster_internal_class_pairs(const AtomLookup& atom_lookup, - ClusterBlockId cluster_block_id) { +std::vector get_cluster_internal_class_pairs(const AtomLookup& atom_lookup, ClusterBlockId cluster_block_id) { const ClusteringContext& cluster_ctx = g_vpr_ctx.clustering(); std::vector class_num_vec; @@ -1378,10 +1415,7 @@ std::vector get_cluster_internal_class_pairs(const AtomLookup& atom_lookup, const auto& cluster_atoms = cluster_ctx.atoms_lookup[cluster_block_id]; for (AtomBlockId atom_blk_id : cluster_atoms) { auto atom_pb_graph_node = atom_lookup.atom_pb_graph_node(atom_blk_id); - auto class_range = get_pb_graph_node_class_physical_range(physical_tile, - sub_tile, - logical_block, - rel_cap, + auto class_range = get_pb_graph_node_class_physical_range(physical_tile, sub_tile, logical_block, rel_cap, atom_pb_graph_node); for (int class_num = class_range.low; class_num <= class_range.high; class_num++) { class_num_vec.push_back(class_num); @@ -1408,11 +1442,7 @@ std::vector get_cluster_internal_pins(ClusterBlockId cluster_blk_id) { pb = internal_pbs.front(); internal_pbs.pop_front(); - auto pin_num_range = get_pb_pins(physical_tile, - sub_tile, - logical_block, - pb, - rel_cap); + auto pin_num_range = get_pb_pins(physical_tile, sub_tile, logical_block, pb, rel_cap); for (int pin_num = pin_num_range.low; pin_num <= pin_num_range.high; pin_num++) { internal_pins.push_back(pin_num); } @@ -1440,11 +1470,7 @@ t_pin_range get_pb_pins(t_physical_tile_type_ptr physical_type, return {first_num_node, first_num_node + num_pins - 1}; } else { - return get_pb_graph_node_pins(physical_type, - sub_tile, - logical_block, - rel_cap, - pb->pb_graph_node); + return get_pb_graph_node_pins(physical_type, sub_tile, logical_block, rel_cap, pb->pb_graph_node); } } /** @@ -1452,8 +1478,7 @@ t_pin_range get_pb_pins(t_physical_tile_type_ptr physical_type, * For now, assume primitives that have a lot of pins are scarcer than those without so use primitives with less pins before those with more */ float compute_primitive_base_cost(const t_pb_graph_node* primitive) { - return (primitive->pb_type->num_input_pins - + primitive->pb_type->num_output_pins + return (primitive->pb_type->num_input_pins + primitive->pb_type->num_output_pins + primitive->pb_type->num_clock_pins); } @@ -1581,7 +1606,8 @@ void revalid_molecules(const t_pb* pb, const Prepacker& prepacker) { // have modified the chain_id value based on the stale packing // then reset the chain id and the first packed molecule pointer // this is packing is being reset - if (cur_molecule->is_chain() && cur_molecule->chain_info->is_long_chain && cur_molecule->chain_info->first_packed_molecule == cur_molecule) { + if (cur_molecule->is_chain() && cur_molecule->chain_info->is_long_chain + && cur_molecule->chain_info->first_packed_molecule == cur_molecule) { cur_molecule->chain_info->first_packed_molecule = nullptr; cur_molecule->chain_info->chain_id = -1; } @@ -1689,7 +1715,12 @@ static void alloc_and_load_blk_pin_from_port_pin() { * * ***************************************************************************************/ -void parse_direct_pin_name(char* src_string, int line, int* start_pin_index, int* end_pin_index, char* pb_type_name, char* port_name) { +void parse_direct_pin_name(char* src_string, + int line, + int* start_pin_index, + int* end_pin_index, + char* pb_type_name, + char* port_name) { /* Parses out the pb_type_name and port_name from the direct passed in. * * If the start_pin_index and end_pin_index is specified, parse them too. * * Return the values parsed by reference. */ @@ -1699,8 +1730,8 @@ void parse_direct_pin_name(char* src_string, int line, int* start_pin_index, int int ichar, match_count; if (vtr::split(src_string).size() > 1) { - VPR_THROW(VPR_ERROR_ARCH, - "Only a single port pin range specification allowed for direct connect (was: '%s')", src_string); + VPR_THROW(VPR_ERROR_ARCH, "Only a single port pin range specification allowed for direct connect (was: '%s')", + src_string); } // parse out the pb_type and port name, possibly pin_indices @@ -1712,8 +1743,7 @@ void parse_direct_pin_name(char* src_string, int line, int* start_pin_index, int if (strlen(src_string) + 1 <= MAX_STRING_LEN + 1) { strcpy(source_string, src_string); } else { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, - "Pin name exceeded buffer size of %zu characters", MAX_STRING_LEN + 1); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Pin name exceeded buffer size of %zu characters", MAX_STRING_LEN + 1); } for (ichar = 0; ichar < (int)(strlen(source_string)); ichar++) { if (source_string[ichar] == '.') @@ -1741,9 +1771,7 @@ void parse_direct_pin_name(char* src_string, int line, int* start_pin_index, int source_string[ichar] = ' '; } - match_count = sscanf(source_string, "%s %s %d:%d]", - pb_type_name, port_name, - end_pin_index, start_pin_index); + match_count = sscanf(source_string, "%s %s %d:%d]", pb_type_name, port_name, end_pin_index, start_pin_index); if (match_count != 4) { VTR_LOG_ERROR( "[LINE %d] Invalid pin - %s, name should be in the format " @@ -1769,7 +1797,17 @@ void parse_direct_pin_name(char* src_string, int line, int* start_pin_index, int } } -static void mark_direct_of_pins(int start_pin_index, int end_pin_index, int itype, int isub_tile, int iport, int** idirect_from_blk_pin, int idirect, int** direct_type_from_blk_pin, int direct_type, int line, char* src_string) { +static void mark_direct_of_pins(int start_pin_index, + int end_pin_index, + int itype, + int isub_tile, + int iport, + int** idirect_from_blk_pin, + int idirect, + int** direct_type_from_blk_pin, + int direct_type, + int line, + char* src_string) { /* Mark the pin entry in idirect_from_blk_pin with idirect and the pin entry in * * direct_type_from_blk_pin with direct_type from start_pin_index to * * end_pin_index. */ @@ -1790,7 +1828,8 @@ static void mark_direct_of_pins(int start_pin_index, int end_pin_index, int ityp break; } } - if (!all_fcs_0) break; + if (!all_fcs_0) + break; } // Check the fc for the pin, direct chain link only if fc == 0 @@ -1800,8 +1839,8 @@ static void mark_direct_of_pins(int start_pin_index, int end_pin_index, int ityp // Check whether the pins are marked, errors out if so if (direct_type_from_blk_pin[itype][iblk_pin] != OPEN) { VPR_FATAL_ERROR(VPR_ERROR_ARCH, - "[LINE %d] Invalid pin - %s, this pin is in more than one direct connection.\n", - line, src_string); + "[LINE %d] Invalid pin - %s, this pin is in more than one direct connection.\n", line, + src_string); } else { direct_type_from_blk_pin[itype][iblk_pin] = direct_type; } @@ -1809,7 +1848,16 @@ static void mark_direct_of_pins(int start_pin_index, int end_pin_index, int ityp } // Finish marking all the pins } -static void mark_direct_of_ports(int idirect, int direct_type, char* pb_type_name, char* port_name, int end_pin_index, int start_pin_index, char* src_string, int line, int** idirect_from_blk_pin, int** direct_type_from_blk_pin) { +static void mark_direct_of_ports(int idirect, + int direct_type, + char* pb_type_name, + char* port_name, + int end_pin_index, + int start_pin_index, + char* src_string, + int line, + int** idirect_from_blk_pin, + int** direct_type_from_blk_pin) { /* Go through all the ports in all the blocks to find the port that has the same * * name as port_name and belongs to the block type that has the name pb_type_name. * * Then, check that whether start_pin_index and end_pin_index are specified. If * @@ -1844,13 +1892,12 @@ static void mark_direct_of_ports(int idirect, int direct_type, char* pb_type_nam // Check whether the pin indices are specified if (start_pin_index >= 0 || end_pin_index >= 0) { - mark_direct_of_pins(start_pin_index, end_pin_index, itype, - isub_tile, iport, idirect_from_blk_pin, idirect, - direct_type_from_blk_pin, direct_type, line, src_string); + mark_direct_of_pins(start_pin_index, end_pin_index, itype, isub_tile, iport, + idirect_from_blk_pin, idirect, direct_type_from_blk_pin, direct_type, + line, src_string); } else { - mark_direct_of_pins(0, num_port_pins - 1, itype, - isub_tile, iport, idirect_from_blk_pin, idirect, - direct_type_from_blk_pin, direct_type, line, src_string); + mark_direct_of_pins(0, num_port_pins - 1, itype, isub_tile, iport, idirect_from_blk_pin, + idirect, direct_type_from_blk_pin, direct_type, line, src_string); } } // Do nothing if port_name does not match } // Finish going through all the ports @@ -1859,7 +1906,10 @@ static void mark_direct_of_ports(int idirect, int direct_type, char* pb_type_nam } // Finish going through all the blocks } -void alloc_and_load_idirect_from_blk_pin(t_direct_inf* directs, int num_directs, int*** idirect_from_blk_pin, int*** direct_type_from_blk_pin) { +void alloc_and_load_idirect_from_blk_pin(t_direct_inf* directs, + int num_directs, + int*** idirect_from_blk_pin, + int*** direct_type_from_blk_pin) { /* Allocates and loads idirect_from_blk_pin and direct_type_from_blk_pin arrays. * * * * For a bus (multiple bits) direct connection, all the pins in the bus are marked. * @@ -1881,8 +1931,8 @@ void alloc_and_load_idirect_from_blk_pin(t_direct_inf* directs, int num_directs, int iblk_pin, idirect, num_type_pins; int **temp_idirect_from_blk_pin, **temp_direct_type_from_blk_pin; - char to_pb_type_name[MAX_STRING_LEN + 1], to_port_name[MAX_STRING_LEN + 1], - from_pb_type_name[MAX_STRING_LEN + 1], from_port_name[MAX_STRING_LEN + 1]; + char to_pb_type_name[MAX_STRING_LEN + 1], to_port_name[MAX_STRING_LEN + 1], from_pb_type_name[MAX_STRING_LEN + 1], + from_port_name[MAX_STRING_LEN + 1]; int to_start_pin_index = -1, to_end_pin_index = -1; int from_start_pin_index = -1, from_end_pin_index = -1; auto& device_ctx = g_vpr_ctx.device(); @@ -1891,7 +1941,8 @@ void alloc_and_load_idirect_from_blk_pin(t_direct_inf* directs, int num_directs, temp_idirect_from_blk_pin = new int*[device_ctx.physical_tile_types.size()]; temp_direct_type_from_blk_pin = new int*[device_ctx.physical_tile_types.size()]; for (const auto& type : device_ctx.physical_tile_types) { - if (is_empty_type(&type)) continue; + if (is_empty_type(&type)) + continue; int itype = type.index; num_type_pins = type.num_pins; @@ -1910,12 +1961,12 @@ void alloc_and_load_idirect_from_blk_pin(t_direct_inf* directs, int num_directs, // Go through directs and find pins with possible direct connections for (idirect = 0; idirect < num_directs; idirect++) { // Parse out the pb_type and port name, possibly pin_indices from from_pin - parse_direct_pin_name(directs[idirect].from_pin, directs[idirect].line, - &from_end_pin_index, &from_start_pin_index, from_pb_type_name, from_port_name); + parse_direct_pin_name(directs[idirect].from_pin, directs[idirect].line, &from_end_pin_index, + &from_start_pin_index, from_pb_type_name, from_port_name); // Parse out the pb_type and port name, possibly pin_indices from to_pin - parse_direct_pin_name(directs[idirect].to_pin, directs[idirect].line, - &to_end_pin_index, &to_start_pin_index, to_pb_type_name, to_port_name); + parse_direct_pin_name(directs[idirect].to_pin, directs[idirect].line, &to_end_pin_index, &to_start_pin_index, + to_pb_type_name, to_port_name); /* Now I have all the data that I need, I could go through all the block pins * * in all the blocks to find all the pins that could have possible direct * @@ -1923,16 +1974,14 @@ void alloc_and_load_idirect_from_blk_pin(t_direct_inf* directs, int num_directs, * to and whether it is a source or a sink of the direct connection. */ // Find blocks with the same name as from_pb_type_name and from_port_name - mark_direct_of_ports(idirect, SOURCE, from_pb_type_name, from_port_name, - from_end_pin_index, from_start_pin_index, directs[idirect].from_pin, - directs[idirect].line, + mark_direct_of_ports(idirect, SOURCE, from_pb_type_name, from_port_name, from_end_pin_index, + from_start_pin_index, directs[idirect].from_pin, directs[idirect].line, temp_idirect_from_blk_pin, temp_direct_type_from_blk_pin); // Then, find blocks with the same name as to_pb_type_name and from_port_name - mark_direct_of_ports(idirect, SINK, to_pb_type_name, to_port_name, - to_end_pin_index, to_start_pin_index, directs[idirect].to_pin, - directs[idirect].line, - temp_idirect_from_blk_pin, temp_direct_type_from_blk_pin); + mark_direct_of_ports(idirect, SINK, to_pb_type_name, to_port_name, to_end_pin_index, to_start_pin_index, + directs[idirect].to_pin, directs[idirect].line, temp_idirect_from_blk_pin, + temp_direct_type_from_blk_pin); } // Finish going through all the directs @@ -1955,7 +2004,8 @@ static int convert_switch_index(int* switch_index, int* fanin) { auto& device_ctx = g_vpr_ctx.device(); for (int iswitch = 0; iswitch < (int)device_ctx.arch_switch_inf.size(); iswitch++) { - for (auto itr = device_ctx.switch_fanin_remap[iswitch].begin(); itr != device_ctx.switch_fanin_remap[iswitch].end(); itr++) { + for (auto itr = device_ctx.switch_fanin_remap[iswitch].begin(); + itr != device_ctx.switch_fanin_remap[iswitch].end(); itr++) { if (itr->second == *switch_index) { *switch_index = iswitch; *fanin = itr->first; @@ -2124,15 +2174,15 @@ void pretty_print_float(const char* prefix, double value, int num_digits, int sc void print_timing_stats(const std::string& name, const t_timing_analysis_profile_info& current, const t_timing_analysis_profile_info& past) { - VTR_LOG("%s timing analysis took %g seconds (%g STA, %g slack) (%zu full updates: %zu setup, %zu hold, %zu combined).\n", - name.c_str(), - current.timing_analysis_wallclock_time() - past.timing_analysis_wallclock_time(), - current.sta_wallclock_time - past.sta_wallclock_time, - current.slack_wallclock_time - past.slack_wallclock_time, - current.num_full_updates() - past.num_full_updates(), - current.num_full_setup_updates - past.num_full_setup_updates, - current.num_full_hold_updates - past.num_full_hold_updates, - current.num_full_setup_hold_updates - past.num_full_setup_hold_updates); + VTR_LOG( + "%s timing analysis took %g seconds (%g STA, %g slack) (%zu full updates: %zu setup, %zu hold, %zu " + "combined).\n", + name.c_str(), current.timing_analysis_wallclock_time() - past.timing_analysis_wallclock_time(), + current.sta_wallclock_time - past.sta_wallclock_time, current.slack_wallclock_time - past.slack_wallclock_time, + current.num_full_updates() - past.num_full_updates(), + current.num_full_setup_updates - past.num_full_setup_updates, + current.num_full_hold_updates - past.num_full_hold_updates, + current.num_full_setup_hold_updates - past.num_full_setup_hold_updates); } std::vector get_all_pb_graph_node_primitives(const t_pb_graph_node* pb_graph_node) { @@ -2147,7 +2197,8 @@ std::vector get_all_pb_graph_node_primitives(const t_pb_ for (int pb_type_idx = 0; pb_type_idx < (pb_type->modes[mode_idx]).num_pb_type_children; pb_type_idx++) { int num_pb = pb_type->modes[mode_idx].pb_type_children[pb_type_idx].num_pb; for (int pb_idx = 0; pb_idx < num_pb; pb_idx++) { - const t_pb_graph_node* child_pb_graph_node = &(pb_graph_node->child_pb_graph_nodes[mode_idx][pb_type_idx][pb_idx]); + const t_pb_graph_node* child_pb_graph_node + = &(pb_graph_node->child_pb_graph_nodes[mode_idx][pb_type_idx][pb_idx]); auto tmp_primitives = get_all_pb_graph_node_primitives(child_pb_graph_node); primitives.insert(std::end(primitives), std::begin(tmp_primitives), std::end(tmp_primitives)); } @@ -2156,8 +2207,7 @@ std::vector get_all_pb_graph_node_primitives(const t_pb_ return primitives; } -bool is_inter_cluster_node(const RRGraphView& rr_graph_view, - RRNodeId node_id) { +bool is_inter_cluster_node(const RRGraphView& rr_graph_view, RRNodeId node_id) { auto node_type = rr_graph_view.node_type(node_id); if (node_type == CHANX || node_type == CHANY) { return true; @@ -2176,17 +2226,14 @@ bool is_inter_cluster_node(const RRGraphView& rr_graph_view, } } -int get_rr_node_max_ptc(const RRGraphView& rr_graph_view, - RRNodeId node_id, - bool is_flat) { +int get_rr_node_max_ptc(const RRGraphView& rr_graph_view, RRNodeId node_id, bool is_flat) { auto node_type = rr_graph_view.node_type(node_id); VTR_ASSERT(node_type == IPIN || node_type == OPIN || node_type == SINK || node_type == SOURCE); const DeviceContext& device_ctx = g_vpr_ctx.device(); - auto physical_type = device_ctx.grid.get_physical_type({rr_graph_view.node_xlow(node_id), - rr_graph_view.node_ylow(node_id), - rr_graph_view.node_layer(node_id)}); + auto physical_type = device_ctx.grid.get_physical_type( + {rr_graph_view.node_xlow(node_id), rr_graph_view.node_ylow(node_id), rr_graph_view.node_layer(node_id)}); if (node_type == SINK || node_type == SOURCE) { return get_tile_class_max_ptc(physical_type, is_flat); @@ -2206,16 +2253,13 @@ RRNodeId get_pin_rr_node_id(const RRSpatialLookup& rr_spatial_lookup, std::vector x_offset; std::vector y_offset; std::vector pin_sides; - std::tie(x_offset, y_offset, pin_sides) = get_pin_coordinates(physical_tile, pin_physical_num, std::vector(TOTAL_2D_SIDES.begin(), TOTAL_2D_SIDES.end())); + std::tie(x_offset, y_offset, pin_sides) = get_pin_coordinates( + physical_tile, pin_physical_num, std::vector(TOTAL_2D_SIDES.begin(), TOTAL_2D_SIDES.end())); VTR_ASSERT(!x_offset.empty()); RRNodeId node_id = RRNodeId::INVALID(); for (int coord_idx = 0; coord_idx < (int)pin_sides.size(); coord_idx++) { - node_id = rr_spatial_lookup.find_node(layer, - root_i + x_offset[coord_idx], - root_j + y_offset[coord_idx], - node_type, - pin_physical_num, - pin_sides[coord_idx]); + node_id = rr_spatial_lookup.find_node(layer, root_i + x_offset[coord_idx], root_j + y_offset[coord_idx], + node_type, pin_physical_num, pin_sides[coord_idx]); if (node_id != RRNodeId::INVALID()) break; } @@ -2241,11 +2285,14 @@ bool node_in_same_physical_tile(RRNodeId node_first, RRNodeId node_second) { auto second_rr_type = rr_graph.node_type(node_second); // If one of the given node's type is CHANX/Y nodes are definitely not in the same physical tile - if (first_rr_type == t_rr_type::CHANX || first_rr_type == t_rr_type::CHANY || second_rr_type == t_rr_type::CHANX || second_rr_type == t_rr_type::CHANY) { + if (first_rr_type == t_rr_type::CHANX || first_rr_type == t_rr_type::CHANY || second_rr_type == t_rr_type::CHANX + || second_rr_type == t_rr_type::CHANY) { return false; } else { - VTR_ASSERT(first_rr_type == t_rr_type::IPIN || first_rr_type == t_rr_type::OPIN || first_rr_type == t_rr_type::SINK || first_rr_type == t_rr_type::SOURCE); - VTR_ASSERT(second_rr_type == t_rr_type::IPIN || second_rr_type == t_rr_type::OPIN || second_rr_type == t_rr_type::SINK || second_rr_type == t_rr_type::SOURCE); + VTR_ASSERT(first_rr_type == t_rr_type::IPIN || first_rr_type == t_rr_type::OPIN + || first_rr_type == t_rr_type::SINK || first_rr_type == t_rr_type::SOURCE); + VTR_ASSERT(second_rr_type == t_rr_type::IPIN || second_rr_type == t_rr_type::OPIN + || second_rr_type == t_rr_type::SINK || second_rr_type == t_rr_type::SOURCE); int first_layer = rr_graph.node_layer(node_first); int first_x = rr_graph.node_xlow(node_first); int first_y = rr_graph.node_ylow(node_first); @@ -2288,8 +2335,7 @@ std::vector get_cluster_netlist_intra_tile_classes_at_loc(int layer, auto cluster_blk_id = grid_block.block_at_location({i, j, abs_cap, layer}); VTR_ASSERT(cluster_blk_id != ClusterBlockId::INVALID()); - auto primitive_classes = get_cluster_internal_class_pairs(atom_lookup, - cluster_blk_id); + auto primitive_classes = get_cluster_internal_class_pairs(atom_lookup, cluster_blk_id); /* Initialize SINK/SOURCE nodes and connect them to their respective pins */ for (auto class_num : primitive_classes) { class_num_vec.push_back(class_num); @@ -2300,12 +2346,13 @@ std::vector get_cluster_netlist_intra_tile_classes_at_loc(int layer, return class_num_vec; } -std::vector get_cluster_netlist_intra_tile_pins_at_loc(const int layer, - const int i, - const int j, - const vtr::vector& pin_chains, - const vtr::vector>& pin_chains_num, - t_physical_tile_type_ptr physical_type) { +std::vector get_cluster_netlist_intra_tile_pins_at_loc( + const int layer, + const int i, + const int j, + const vtr::vector& pin_chains, + const vtr::vector>& pin_chains_num, + t_physical_tile_type_ptr physical_type) { const auto& place_ctx = g_vpr_ctx.placement(); const auto& grid_block = place_ctx.grid_blocks(); @@ -2332,7 +2379,8 @@ std::vector get_cluster_netlist_intra_tile_pins_at_loc(const int layer, pin_num_vec.push_back(pin); } else { VTR_ASSERT(cluster_pin_chain_idx[pin] != OPEN); - if (is_pin_on_tile(physical_type, pin) || is_primitive_pin(physical_type, pin) || cluster_chain_sinks[cluster_pin_chain_idx[pin]] == pin) { + if (is_pin_on_tile(physical_type, pin) || is_primitive_pin(physical_type, pin) + || cluster_chain_sinks[cluster_pin_chain_idx[pin]] == pin) { pin_num_vec.push_back(pin); } } @@ -2397,7 +2445,7 @@ void add_pb_child_to_list(std::list& pb_list, const t_pb* parent_pb void apply_route_constraints(const UserRouteConstraints& route_constraints) { ClusteringContext& mutable_cluster_ctx = g_vpr_ctx.mutable_clustering(); - // Iterate through all the nets + // Iterate through all the nets for (auto net_id : mutable_cluster_ctx.clb_nlist.nets()) { // Get the name of the current net std::string net_name = mutable_cluster_ctx.clb_nlist.net_name(net_id); diff --git a/vpr/src/util/vpr_utils.h b/vpr/src/util/vpr_utils.h index 9f08dcc0d2b..382d15cf986 100644 --- a/vpr/src/util/vpr_utils.h +++ b/vpr/src/util/vpr_utils.h @@ -41,8 +41,7 @@ t_physical_tile_type_ptr physical_tile_type(AtomBlockId atom_blk); t_physical_tile_type_ptr physical_tile_type(ParentBlockId blk_id, bool is_flat); //Returns the sub tile corresponding to the logical block location within a physical type -int get_sub_tile_index(ClusterBlockId blk, - const vtr::vector_map& block_locs); +int get_sub_tile_index(ClusterBlockId blk, const vtr::vector_map& block_locs); int get_sub_tile_index(ClusterBlockId blk); @@ -156,13 +155,17 @@ class IntraLbPbPinLookup { }; //Find the atom pins (driver or sinks) connected to the specified top-level CLB pin -std::vector find_clb_pin_connected_atom_pins(ClusterBlockId clb, int logical_pin, const IntraLbPbPinLookup& pb_gpin_lookup); +std::vector find_clb_pin_connected_atom_pins(ClusterBlockId clb, + int logical_pin, + const IntraLbPbPinLookup& pb_gpin_lookup); //Find the atom pin driving to the specified top-level CLB pin AtomPinId find_clb_pin_driver_atom_pin(ClusterBlockId clb, int logical_pin, const IntraLbPbPinLookup& pb_gpin_lookup); //Find the atom pins driven by the specified top-level CLB pin -std::vector find_clb_pin_sink_atom_pins(ClusterBlockId clb, int logical_pin, const IntraLbPbPinLookup& pb_gpin_lookup); +std::vector find_clb_pin_sink_atom_pins(ClusterBlockId clb, + int logical_pin, + const IntraLbPbPinLookup& pb_gpin_lookup); std::tuple find_pb_route_clb_input_net_pin(ClusterBlockId clb, int sink_pb_route_id); @@ -191,8 +194,12 @@ int get_max_primitives_in_pb_type(t_pb_type* pb_type); int get_max_depth_of_pb_type(t_pb_type* pb_type); int get_max_nets_in_pb_type(const t_pb_type* pb_type); bool primitive_type_feasible(AtomBlockId blk_id, const t_pb_type* cur_pb_type); -t_pb_graph_pin* get_pb_graph_node_pin_from_model_port_pin(const t_model_ports* model_port, const int model_pin, const t_pb_graph_node* pb_graph_node); -const t_pb_graph_pin* find_pb_graph_pin(const AtomNetlist& netlist, const AtomLookup& netlist_lookup, const AtomPinId pin_id); +t_pb_graph_pin* get_pb_graph_node_pin_from_model_port_pin(const t_model_ports* model_port, + const int model_pin, + const t_pb_graph_node* pb_graph_node); +const t_pb_graph_pin* find_pb_graph_pin(const AtomNetlist& netlist, + const AtomLookup& netlist_lookup, + const AtomPinId pin_id); /// @brief Gets the pb_graph_node pin at the given pin index for the given /// pb_graph_node. t_pb_graph_pin* get_pb_graph_node_pin_from_pb_graph_node(t_pb_graph_node* pb_graph_node, int ipin); @@ -200,10 +207,10 @@ t_pb_graph_pin* get_pb_graph_node_pin_from_block_pin(ClusterBlockId iblock, int vtr::vector alloc_and_load_pin_id_to_pb_mapping(); void free_pin_id_to_pb_mapping(vtr::vector& pin_id_to_pb_mapping); -std::tuple get_cluster_blk_physical_spec(ClusterBlockId cluster_blk_id); +std::tuple get_cluster_blk_physical_spec( + ClusterBlockId cluster_blk_id); -std::vector get_cluster_internal_class_pairs(const AtomLookup& atom_lookup, - ClusterBlockId cluster_block_id); +std::vector get_cluster_internal_class_pairs(const AtomLookup& atom_lookup, ClusterBlockId cluster_block_id); std::vector get_cluster_internal_pins(ClusterBlockId cluster_blk_id); @@ -216,9 +223,17 @@ t_pin_range get_pb_pins(t_physical_tile_type_ptr physical_type, float compute_primitive_base_cost(const t_pb_graph_node* primitive); int num_ext_inputs_atom_block(AtomBlockId blk_id); -void alloc_and_load_idirect_from_blk_pin(t_direct_inf* directs, int num_directs, int*** idirect_from_blk_pin, int*** direct_type_from_blk_pin); +void alloc_and_load_idirect_from_blk_pin(t_direct_inf* directs, + int num_directs, + int*** idirect_from_blk_pin, + int*** direct_type_from_blk_pin); -void parse_direct_pin_name(char* src_string, int line, int* start_pin_index, int* end_pin_index, char* pb_type_name, char* port_name); +void parse_direct_pin_name(char* src_string, + int line, + int* start_pin_index, + int* end_pin_index, + char* pb_type_name, + char* port_name); void free_pb_stats(t_pb* pb); void free_pb(t_pb* pb); @@ -242,12 +257,9 @@ void print_timing_stats(const std::string& name, std::vector get_all_pb_graph_node_primitives(const t_pb_graph_node* pb_graph_node); -bool is_inter_cluster_node(const RRGraphView& rr_graph_view, - RRNodeId node_id); +bool is_inter_cluster_node(const RRGraphView& rr_graph_view, RRNodeId node_id); -int get_rr_node_max_ptc(const RRGraphView& rr_graph_view, - RRNodeId node_id, - bool is_flat); +int get_rr_node_max_ptc(const RRGraphView& rr_graph_view, RRNodeId node_id, bool is_flat); RRNodeId get_pin_rr_node_id(const RRSpatialLookup& rr_spatial_lookup, t_physical_tile_type_ptr physical_tile, @@ -281,12 +293,13 @@ std::vector get_cluster_netlist_intra_tile_classes_at_loc(int layer, * @param physical_type * @return */ -std::vector get_cluster_netlist_intra_tile_pins_at_loc(const int layer, - const int i, - const int j, - const vtr::vector& pin_chains, - const vtr::vector>& pin_chains_num, - t_physical_tile_type_ptr physical_type); +std::vector get_cluster_netlist_intra_tile_pins_at_loc( + const int layer, + const int i, + const int j, + const vtr::vector& pin_chains, + const vtr::vector>& pin_chains_num, + t_physical_tile_type_ptr physical_type); std::vector get_cluster_block_pins(t_physical_tile_type_ptr physical_tile, ClusterBlockId cluster_blk_id, diff --git a/vpr/test/test_ap_netlist.cpp b/vpr/test/test_ap_netlist.cpp index 9dad87819ca..5e9c5ce92b5 100644 --- a/vpr/test/test_ap_netlist.cpp +++ b/vpr/test/test_ap_netlist.cpp @@ -74,4 +74,3 @@ TEST_CASE("test_ap_netlist_data_storage", "[vpr_ap_netlist]") { } } // namespace - diff --git a/vpr/test/test_ap_partial_placement.cpp b/vpr/test/test_ap_partial_placement.cpp index c460df48227..7f20a438eec 100644 --- a/vpr/test/test_ap_partial_placement.cpp +++ b/vpr/test/test_ap_partial_placement.cpp @@ -131,4 +131,3 @@ TEST_CASE("test_ap_partial_placement_verify", "[vpr_ap]") { } } // namespace - diff --git a/vpr/test/test_bfs_routing.cpp b/vpr/test/test_bfs_routing.cpp index c0c03a9ad1d..d97a28b33cb 100644 --- a/vpr/test/test_bfs_routing.cpp +++ b/vpr/test/test_bfs_routing.cpp @@ -43,19 +43,23 @@ TEST_CASE("test_route_flow", "[vpr_noc_bfs_routing]") { for (int j = 0; j < 4; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 1), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 1), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the top of the router if there exists another router there if ((i + 1) <= 3) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 4), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 4), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the right of the router if there exists another router there if ((j + 1) <= 3) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 1), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 1), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 4), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 4), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } } } @@ -73,7 +77,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_bfs_routing]") { std::vector found_path; // make sure that a legal route was found (no error should be thrown) - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // now make sure that the found route is empty, we shouldn't be moving anywhere as the start and end routers are the same REQUIRE(found_path.empty() == true); @@ -109,7 +114,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_bfs_routing]") { // now run the routinjg algorithm // make sure that a legal route was found (no error should be thrown) - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // check that the found route has the exact same number of links as the expected path REQUIRE(golden_path.size() == found_path.size()); @@ -134,8 +140,10 @@ TEST_CASE("test_route_flow", "[vpr_noc_bfs_routing]") { std::vector found_path; // run the routing algorithm and we expect ir ro fail - REQUIRE_THROWS_WITH(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model), - "No route could be found from starting router with id:'12' and the destination router with id:'3' using the breadth-first search routing algorithm."); + REQUIRE_THROWS_WITH( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model), + "No route could be found from starting router with id:'12' and the destination router with id:'3' using " + "the breadth-first search routing algorithm."); } } diff --git a/vpr/test/test_clustered_netlist.cpp b/vpr/test/test_clustered_netlist.cpp index cd0059c173e..626bb2ed69c 100644 --- a/vpr/test/test_clustered_netlist.cpp +++ b/vpr/test/test_clustered_netlist.cpp @@ -70,7 +70,8 @@ TEST_CASE("test_find_block_with_matching_name", "[vpr_clustered_netlist]") { std::string test_router_module_name = "(.*)(noc_router_one)(.*)"; //get the block id - ClusterBlockId test_router_id = test_netlist.find_block_by_name_fragment(test_router_module_name, noc_router_logical_type_clusters); + ClusterBlockId test_router_id + = test_netlist.find_block_by_name_fragment(test_router_module_name, noc_router_logical_type_clusters); // now check the block id with what we expect to be REQUIRE((size_t)(block_id_from_name.find("router:noc_router_one")->second) == (size_t)test_router_id); @@ -101,7 +102,8 @@ TEST_CASE("test_find_block_with_matching_name", "[vpr_clustered_netlist]") { std::string test_router_module_name = "(.*)(q_a\\[2\\])(.*)"; //get the block id - ClusterBlockId test_router_id = test_netlist.find_block_by_name_fragment(test_router_module_name, noc_router_logical_type_clusters); + ClusterBlockId test_router_id + = test_netlist.find_block_by_name_fragment(test_router_module_name, noc_router_logical_type_clusters); // now check the block id with what we expect to be REQUIRE((size_t)(block_id_from_name.find("router:new_router|q_a[2]")->second) == (size_t)test_router_id); @@ -119,7 +121,8 @@ TEST_CASE("test_find_block_with_matching_name", "[vpr_clustered_netlist]") { // add the routers and the IO block // add the IO block with a similiar name - block_id_from_name.emplace(i_o_block_with_same_name, test_netlist.create_block(i_o_block_with_same_name, &i_o_pb, i_o_ref)); + block_id_from_name.emplace(i_o_block_with_same_name, + test_netlist.create_block(i_o_block_with_same_name, &i_o_pb, i_o_ref)); // add routers block_id_from_name.emplace(router_one, test_netlist.create_block(router_one, &router_pb, router_ref)); @@ -138,12 +141,14 @@ TEST_CASE("test_find_block_with_matching_name", "[vpr_clustered_netlist]") { std::string test_router_module_name = "(.*)(noc_router_four\\|flit_out_two\\[0\\]~reg0)$"; //get the block id - ClusterBlockId test_router_id = test_netlist.find_block_by_name_fragment(test_router_module_name, noc_router_logical_type_clusters); + ClusterBlockId test_router_id + = test_netlist.find_block_by_name_fragment(test_router_module_name, noc_router_logical_type_clusters); // since we passed in the router logical type, we expect the router block to be the returned id // now check the block id with what we expect to be - REQUIRE((size_t)(block_id_from_name.find("router:noc_router_four|flit_out_two[0]~reg0")->second) == (size_t)test_router_id); + REQUIRE((size_t)(block_id_from_name.find("router:noc_router_four|flit_out_two[0]~reg0")->second) + == (size_t)test_router_id); } } } // namespace \ No newline at end of file diff --git a/vpr/test/test_compressed_grid.cpp b/vpr/test/test_compressed_grid.cpp index 86c2d1f6600..514ecfdca72 100644 --- a/vpr/test/test_compressed_grid.cpp +++ b/vpr/test/test_compressed_grid.cpp @@ -12,8 +12,7 @@ namespace { -void set_type_tile_to_empty(const int x, const int y, - vtr::NdMatrix& grid) { +void set_type_tile_to_empty(const int x, const int y, vtr::NdMatrix& grid) { t_physical_tile_type_ptr type = grid[0][x][y].type; const int width_offset = grid[0][x][y].width_offset; const int height_offset = grid[0][x][y].height_offset; @@ -22,20 +21,20 @@ void set_type_tile_to_empty(const int x, const int y, for (int i = x_anchor; i < x_anchor + type->width; i++) { for (int j = y_anchor; j < y_anchor + type->height; j++) { - if (grid[0][i][j].type == type && grid[0][i][j].width_offset == i - x_anchor && grid[0][i][j].height_offset == j - y_anchor) { + if (grid[0][i][j].type == type && grid[0][i][j].width_offset == i - x_anchor + && grid[0][i][j].height_offset == j - y_anchor) { grid[0][i][j].type = g_vpr_ctx.device().EMPTY_PHYSICAL_TILE_TYPE; grid[0][i][j].width_offset = 0; grid[0][i][j].height_offset = 0; } } } - } -void set_tile_type_at_loc(const int x_anchor, const int y_anchor, +void set_tile_type_at_loc(const int x_anchor, + const int y_anchor, vtr::NdMatrix& grid, const t_physical_tile_type& tile_type) { - for (int i = x_anchor; i < x_anchor + tile_type.width; i++) { for (int j = y_anchor; j < y_anchor + tile_type.height; j++) { if (grid[0][i][j].type != g_vpr_ctx.device().EMPTY_PHYSICAL_TILE_TYPE) { @@ -48,7 +47,6 @@ void set_tile_type_at_loc(const int x_anchor, const int y_anchor, } } - TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { // test device grid name std::string device_grid_name = "test"; @@ -70,7 +68,6 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { auto& logical_block_types = g_vpr_ctx.mutable_device().logical_block_types; logical_block_types.clear(); - t_physical_tile_type empty_tile; empty_tile.name = empty_tile_name; empty_tile.height = 1; @@ -87,7 +84,6 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { empty_tile.sub_tiles.back().index = 0; empty_tile.sub_tiles.back().equivalent_sites.push_back(&EMPTY_LOGICAL_BLOCK_TYPE); - // create an io physical tile and assign its parameters t_physical_tile_type io_tile; io_tile.name = io_tile_name; @@ -130,7 +126,6 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { tall_logical_type.equivalent_tiles.push_back(&tall_tile); logical_block_types.push_back(tall_logical_type); - tall_tile.sub_tiles.back().index = 0; tall_tile.sub_tiles.back().equivalent_sites.push_back(&tall_logical_type); @@ -148,7 +143,6 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { large_tile.sub_tiles.back().index = 0; large_tile.sub_tiles.back().equivalent_sites.push_back(&large_logical_type); - for (int x = 0; x < test_grid_width; x++) { for (int y = 0; y < test_grid_height; y++) { test_grid[0][x][y].type = &io_tile; @@ -195,7 +189,8 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { } SECTION("Exact mapped locations in the compressed grids") { - t_physical_tile_loc comp_loc = compressed_grids[large_logical_type.index].grid_loc_to_compressed_loc_approx({25, 33, 0}); + t_physical_tile_loc comp_loc + = compressed_grids[large_logical_type.index].grid_loc_to_compressed_loc_approx({25, 33, 0}); t_physical_tile_loc grid_loc = compressed_grids[large_logical_type.index].compressed_loc_to_grid_loc(comp_loc); REQUIRE(grid_loc == t_physical_tile_loc{25, 33, 0}); @@ -229,7 +224,8 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { } SECTION("Round to the nearest mapped location in the compressed grid") { - t_physical_tile_loc comp_loc = compressed_grids[large_logical_type.index].grid_loc_to_compressed_loc_approx({25, 33, 0}); + t_physical_tile_loc comp_loc + = compressed_grids[large_logical_type.index].grid_loc_to_compressed_loc_approx({25, 33, 0}); t_physical_tile_loc grid_loc = compressed_grids[large_logical_type.index].compressed_loc_to_grid_loc(comp_loc); REQUIRE(grid_loc == t_physical_tile_loc{25, 33, 0}); @@ -263,7 +259,8 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { } SECTION("Round down to the closest mapped location in the compressed grid") { - t_physical_tile_loc comp_loc = compressed_grids[large_logical_type.index].grid_loc_to_compressed_loc_approx_round_down({25, 33, 0}); + t_physical_tile_loc comp_loc + = compressed_grids[large_logical_type.index].grid_loc_to_compressed_loc_approx_round_down({25, 33, 0}); t_physical_tile_loc grid_loc = compressed_grids[large_logical_type.index].compressed_loc_to_grid_loc(comp_loc); REQUIRE(grid_loc == t_physical_tile_loc{25, 33, 0}); @@ -297,7 +294,8 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { } SECTION("Round up to the closest mapped location in the compressed grid") { - t_physical_tile_loc comp_loc = compressed_grids[large_logical_type.index].grid_loc_to_compressed_loc_approx_round_up({25, 33, 0}); + t_physical_tile_loc comp_loc + = compressed_grids[large_logical_type.index].grid_loc_to_compressed_loc_approx_round_up({25, 33, 0}); t_physical_tile_loc grid_loc = compressed_grids[large_logical_type.index].compressed_loc_to_grid_loc(comp_loc); REQUIRE(grid_loc == t_physical_tile_loc{25, 33, 0}); @@ -329,7 +327,6 @@ TEST_CASE("test_compressed_grid", "[vpr_compressed_grid]") { grid_loc = compressed_grids[small_logical_type.index].compressed_loc_to_grid_loc(comp_loc); REQUIRE(grid_loc == t_physical_tile_loc{98, 98, 0}); } - } } // namespace \ No newline at end of file diff --git a/vpr/test/test_connection_router.cpp b/vpr/test/test_connection_router.cpp index 568b2b175f7..0ffda96b7ae 100644 --- a/vpr/test/test_connection_router.cpp +++ b/vpr/test/test_connection_router.cpp @@ -44,40 +44,25 @@ static float do_one_route(RRNodeId source_node, cost_params.astar_offset = router_opts.astar_offset; cost_params.bend_cost = router_opts.bend_cost; - const Netlist<>& net_list = is_flat ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; + const Netlist<>& net_list + = is_flat ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist; route_budgets budgeting_inf(net_list, is_flat); RouterStats router_stats; - auto router_lookahead = make_router_lookahead(det_routing_arch, - router_opts.lookahead_type, - router_opts.write_router_lookahead, - router_opts.read_router_lookahead, - segment_inf, - is_flat); - - ConnectionRouter router( - device_ctx.grid, - *router_lookahead, - device_ctx.rr_graph.rr_nodes(), - &device_ctx.rr_graph, - device_ctx.rr_rc_data, - device_ctx.rr_graph.rr_switch(), - g_vpr_ctx.mutable_routing().rr_node_route_inf, - is_flat); + auto router_lookahead + = make_router_lookahead(det_routing_arch, router_opts.lookahead_type, router_opts.write_router_lookahead, + router_opts.read_router_lookahead, segment_inf, is_flat); + + ConnectionRouter router(device_ctx.grid, *router_lookahead, device_ctx.rr_graph.rr_nodes(), + &device_ctx.rr_graph, device_ctx.rr_rc_data, device_ctx.rr_graph.rr_switch(), + g_vpr_ctx.mutable_routing().rr_node_route_inf, is_flat); // Find the cheapest route if possible. bool found_path; RTExploredNode cheapest; - ConnectionParameters conn_params(ParentNetId::INVALID(), - -1, - false, - std::unordered_map()); - std::tie(found_path, std::ignore, cheapest) = router.timing_driven_route_connection_from_route_tree(tree.root(), - sink_node, - cost_params, - bounding_box, - router_stats, - conn_params); + ConnectionParameters conn_params(ParentNetId::INVALID(), -1, false, std::unordered_map()); + std::tie(found_path, std::ignore, cheapest) = router.timing_driven_route_connection_from_route_tree( + tree.root(), sink_node, cost_params, bounding_box, router_stats, conn_params); // Default delay is infinity, which indicates that a route was not found. float delay = std::numeric_limits::infinity(); @@ -87,7 +72,8 @@ static float do_one_route(RRNodeId source_node, // Get the delay vtr::optional rt_node_of_sink; - std::tie(std::ignore, rt_node_of_sink) = tree.update_from_heap(&cheapest, OPEN, nullptr, router_opts.flat_routing); + std::tie(std::ignore, rt_node_of_sink) + = tree.update_from_heap(&cheapest, OPEN, nullptr, router_opts.flat_routing); delay = rt_node_of_sink.value().Tdel; } @@ -137,13 +123,8 @@ TEST_CASE("connection_router", "[vpr]") { vpr_initialize_logging(); // Command line arguments - const char* argv[] = { - "test_vpr", - kArchFile, - "wire.eblif", - "--route_chan_width", "100"}; - vpr_init(sizeof(argv) / sizeof(argv[0]), argv, - &options, &vpr_setup, &arch); + const char* argv[] = {"test_vpr", kArchFile, "wire.eblif", "--route_chan_width", "100"}; + vpr_init(sizeof(argv) / sizeof(argv[0]), argv, &options, &vpr_setup, &arch); vpr_create_device_grid(vpr_setup, arch); vpr_setup_clock_networks(vpr_setup, arch); @@ -159,14 +140,8 @@ TEST_CASE("connection_router", "[vpr]") { auto chan_width = init_chan(vpr_setup.RouterOpts.fixed_channel_width, arch.Chans, graph_directionality); - alloc_routing_structs( - chan_width, - vpr_setup.RouterOpts, - &vpr_setup.RoutingArch, - vpr_setup.Segments, - arch.Directs, - arch.num_directs, - router_opts.flat_routing); + alloc_routing_structs(chan_width, vpr_setup.RouterOpts, &vpr_setup.RoutingArch, vpr_setup.Segments, arch.Directs, + arch.num_directs, router_opts.flat_routing); // Find a source and sink to route RRNodeId source_rr_node, sink_rr_node; @@ -178,19 +153,15 @@ TEST_CASE("connection_router", "[vpr]") { REQUIRE(hops >= 3); // Find the route - float delay = do_one_route(source_rr_node, - sink_rr_node, - vpr_setup.RoutingArch, - vpr_setup.RouterOpts, - vpr_setup.Segments); + float delay + = do_one_route(source_rr_node, sink_rr_node, vpr_setup.RoutingArch, vpr_setup.RouterOpts, vpr_setup.Segments); // Check that a route was found REQUIRE(delay < std::numeric_limits::infinity()); // Clean up free_routing_structs(); - vpr_free_all(arch, - vpr_setup); + vpr_free_all(arch, vpr_setup); } } // namespace diff --git a/vpr/test/test_edge_groups.cpp b/vpr/test/test_edge_groups.cpp index 80bfea5e133..38b4949da1b 100644 --- a/vpr/test/test_edge_groups.cpp +++ b/vpr/test/test_edge_groups.cpp @@ -13,21 +13,18 @@ namespace { TEST_CASE("edge_groups_create_sets", "[vpr]") { // Construct a set of edges that result in these connected sets - std::vector> connected_sets{{{1, 2, 3, 4, 5, 6, 7, 8}, - {9, 0}}}; + std::vector> connected_sets{{{1, 2, 3, 4, 5, 6, 7, 8}, {9, 0}}}; // Build chains from the given connected sets int max_node_id = 0; std::vector> edges; for (auto set : connected_sets) { int last = *set.cbegin(); - std::for_each(std::next(set.cbegin()), - set.cend(), - [&](int node) { - edges.push_back(std::make_pair(last, node)); - last = node; - max_node_id = std::max(max_node_id, node); - }); + std::for_each(std::next(set.cbegin()), set.cend(), [&](int node) { + edges.push_back(std::make_pair(last, node)); + last = node; + max_node_id = std::max(max_node_id, node); + }); } // Build the id map for node IDs diff --git a/vpr/test/test_interchange_device.cpp b/vpr/test/test_interchange_device.cpp index 276decccf13..1841bac0261 100644 --- a/vpr/test/test_interchange_device.cpp +++ b/vpr/test/test_interchange_device.cpp @@ -53,7 +53,8 @@ TEST_CASE("read_interchange_layout", "[vpr]") { REQUIRE(gd.height == 12); REQUIRE(gd.width == 12); - std::unordered_map tile_types({{"constant_block", false}, {"IB", false}, {"OB", false}, {"IOB", false}, {"CLB", false}}); + std::unordered_map tile_types( + {{"constant_block", false}, {"IB", false}, {"OB", false}, {"IOB", false}, {"CLB", false}}); for (auto& loc : gd.layers.at(0).loc_defs) { auto ret = tile_types.find(loc.block_type); REQUIRE(ret != tile_types.end()); @@ -136,24 +137,12 @@ TEST_CASE("read_interchange_pb_types", "[vpr]") { std::unordered_set ltypes = {"EMPTY", "IOPAD", "IPAD", "OPAD", "SLICE", "constant_block"}; - std::unordered_map slice_ports = { - {"L0_0", PORTS::IN_PORT}, - {"L1_0", PORTS::IN_PORT}, - {"L2_0", PORTS::IN_PORT}, - {"L3_0", PORTS::IN_PORT}, - {"R_0", PORTS::IN_PORT}, - {"D_0", PORTS::IN_PORT}, - {"O_0", PORTS::OUT_PORT}, - {"Q_0", PORTS::OUT_PORT}, - {"L0_1", PORTS::IN_PORT}, - {"L1_1", PORTS::IN_PORT}, - {"L2_1", PORTS::IN_PORT}, - {"L3_1", PORTS::IN_PORT}, - {"R_1", PORTS::IN_PORT}, - {"D_1", PORTS::IN_PORT}, - {"O_1", PORTS::OUT_PORT}, - {"Q_1", PORTS::OUT_PORT}, - {"CLK", PORTS::IN_PORT}}; + std::unordered_map slice_ports + = {{"L0_0", PORTS::IN_PORT}, {"L1_0", PORTS::IN_PORT}, {"L2_0", PORTS::IN_PORT}, {"L3_0", PORTS::IN_PORT}, + {"R_0", PORTS::IN_PORT}, {"D_0", PORTS::IN_PORT}, {"O_0", PORTS::OUT_PORT}, {"Q_0", PORTS::OUT_PORT}, + {"L0_1", PORTS::IN_PORT}, {"L1_1", PORTS::IN_PORT}, {"L2_1", PORTS::IN_PORT}, {"L3_1", PORTS::IN_PORT}, + {"R_1", PORTS::IN_PORT}, {"D_1", PORTS::IN_PORT}, {"O_1", PORTS::OUT_PORT}, {"Q_1", PORTS::OUT_PORT}, + {"CLK", PORTS::IN_PORT}}; // Check that there are exactly the expected models for (auto ltype : logical_block_types) { diff --git a/vpr/test/test_map_lookahead_serdes.cpp b/vpr/test/test_map_lookahead_serdes.cpp index 499326e2eb9..7d9bd8cf246 100644 --- a/vpr/test/test_map_lookahead_serdes.cpp +++ b/vpr/test/test_map_lookahead_serdes.cpp @@ -20,8 +20,10 @@ TEST_CASE("round_trip_map_lookahead", "[vpr]") { for (size_t w = 0; w < kDim[3]; ++w) { for (size_t x = 0; x < kDim[4]; ++x) { for (size_t y = 0; y < kDim[5]; ++y) { - f_wire_cost_map[from_layer][to_layer][z][w][x][y].delay = (x + 1) * (y + 1) * (z + 1) * (w + 1); - f_wire_cost_map[from_layer][to_layer][z][w][x][y].congestion = 2 * (x + 1) * (y + 1) * (z + 1) * (w + 1); + f_wire_cost_map[from_layer][to_layer][z][w][x][y].delay + = (x + 1) * (y + 1) * (z + 1) * (w + 1); + f_wire_cost_map[from_layer][to_layer][z][w][x][y].congestion + = 2 * (x + 1) * (y + 1) * (z + 1) * (w + 1); } } } @@ -60,8 +62,10 @@ TEST_CASE("round_trip_map_lookahead", "[vpr]") { for (size_t w = 0; w < kDim[3]; ++w) { for (size_t x = 0; x < kDim[4]; ++x) { for (size_t y = 0; y < kDim[5]; ++y) { - REQUIRE(f_wire_cost_map[from_layer][to_layer][z][w][x][y].delay == (x + 1) * (y + 1) * (z + 1) * (w + 1)); - REQUIRE(f_wire_cost_map[from_layer][to_layer][z][w][x][y].congestion == 2 * (x + 1) * (y + 1) * (z + 1) * (w + 1)); + REQUIRE(f_wire_cost_map[from_layer][to_layer][z][w][x][y].delay + == (x + 1) * (y + 1) * (z + 1) * (w + 1)); + REQUIRE(f_wire_cost_map[from_layer][to_layer][z][w][x][y].congestion + == 2 * (x + 1) * (y + 1) * (z + 1) * (w + 1)); } } } diff --git a/vpr/test/test_noc_place_utils.cpp b/vpr/test/test_noc_place_utils.cpp index 59e8ca70cf2..8f350ab9b6a 100644 --- a/vpr/test/test_noc_place_utils.cpp +++ b/vpr/test/test_noc_place_utils.cpp @@ -11,7 +11,8 @@ #define NUM_OF_ROUTERS_NOC_PLACE_UTILS_TEST 100 #define MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST 10 // this should be the square root of NUM_OF_ROUTERS #define NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST 100 // should be less than or equal to NUM_OF_ROUTERS -#define NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST 100 // this should be less than or equal to the NUM_OF_LOGICAL_ROUTER_BLOCKS +#define NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST \ + 100 // this should be less than or equal to the NUM_OF_LOGICAL_ROUTER_BLOCKS #define NUM_OF_PLACEMENT_MOVES_NOC_PLACE_UTILS_TEST 10000 namespace { @@ -22,7 +23,8 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { // setup random number generation std::random_device device; std::mt19937 rand_num_gen(device()); - std::uniform_int_distribution dist(0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 1); + std::uniform_int_distribution dist( + 0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 1); // this sets the range of possible bandwidths for a traffic flow std::uniform_int_distribution dist_2(0, 1000); @@ -68,10 +70,7 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { id_of_all_hard_routers_in_device.push_back(router_number); // add the router to the noc - noc_ctx.noc_model.add_router(curr_router_id, - router_grid_position_x, - router_grid_position_y, - 0, + noc_ctx.noc_model.add_router(curr_router_id, router_grid_position_x, router_grid_position_y, 0, noc_router_latency); } @@ -82,35 +81,45 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { for (int j = 0; j < MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), noc_link_bandwidth, noc_router_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), + noc_link_bandwidth, noc_router_latency); } // add a link to the top of the router if there exists another router there if ((i + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), noc_link_bandwidth, noc_router_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + noc_link_bandwidth, noc_router_latency); } // add a link to the right of the router if there exists another router there if ((j + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), noc_link_bandwidth, noc_router_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), + noc_link_bandwidth, noc_router_latency); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), noc_link_bandwidth, noc_router_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + noc_link_bandwidth, noc_router_latency); } } } // now we need to create router cluster blocks and passing them to placed at a router hard block - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; + cluster_block_number++) { // since the indexes for the hard router blocks start from 0, we will just place the router clusters on hard router blocks with the same id // // start by creating the placement grid location for the current router cluster by getting the grid location of the hard router block it will be placed on const NocRouter& hard_router_block = noc_ctx.noc_model.get_single_noc_router((NocRouterId)cluster_block_number); t_block_loc current_cluster_block_location; current_cluster_block_location.is_fixed = true; - current_cluster_block_location.loc = t_pl_loc(hard_router_block.get_router_grid_position_x(), - hard_router_block.get_router_grid_position_y(), - -1, - hard_router_block.get_router_layer_position()); + current_cluster_block_location.loc + = t_pl_loc(hard_router_block.get_router_grid_position_x(), hard_router_block.get_router_grid_position_y(), + -1, hard_router_block.get_router_layer_position()); // now add the cluster and its placed location to the placement data structures block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); @@ -124,7 +133,8 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { int traffic_flow_priority = 1; // now create a random number of traffic flows - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; + cluster_block_number++) { // the current cluster block number will act as the source router // and we will choose a random router to act as the sink router @@ -140,9 +150,9 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { double traffic_flow_bandwidth_usage = (double)dist_2(rand_num_gen); // create and add the traffic flow - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(source_traffic_flow_name, sink_traffic_flow_name, - source_router_for_traffic_flow, sink_router_for_traffic_flow, - traffic_flow_bandwidth_usage, traffic_flow_latency, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow( + source_traffic_flow_name, sink_traffic_flow_name, source_router_for_traffic_flow, + sink_router_for_traffic_flow, traffic_flow_bandwidth_usage, traffic_flow_latency, traffic_flow_priority); number_of_created_traffic_flows++; @@ -160,21 +170,21 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { // create a local routing algorithm for the unit test auto routing_algorithm = std::make_unique(); - vtr::vector> traffic_flow_routes(noc_ctx.noc_traffic_flows_storage.get_number_of_traffic_flows()); + vtr::vector> traffic_flow_routes( + noc_ctx.noc_traffic_flows_storage.get_number_of_traffic_flows()); - for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; traffic_flow_number++) { - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); + for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; + traffic_flow_number++) { + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); std::vector& traffic_flow_route = traffic_flow_routes[(NocTrafficFlowId)traffic_flow_number]; // get the source and sink routers of this traffic flow int source_hard_router_id = (size_t)curr_traffic_flow.source_router_cluster_id; int sink_hard_routed_id = (size_t)curr_traffic_flow.sink_router_cluster_id; // route it - routing_algorithm->route_flow((NocRouterId)source_hard_router_id, - (NocRouterId)sink_hard_routed_id, - (NocTrafficFlowId) traffic_flow_number, - traffic_flow_route, - noc_ctx.noc_model); + routing_algorithm->route_flow((NocRouterId)source_hard_router_id, (NocRouterId)sink_hard_routed_id, + (NocTrafficFlowId)traffic_flow_number, traffic_flow_route, noc_ctx.noc_model); } /* in the test function we will be routing all the traffic flows and then updating their link usages. So we will be generating a vector of all links @@ -185,8 +195,10 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { golden_link_bandwidths.resize(noc_ctx.noc_model.get_noc_links().size(), 0.0); // now go through the routed traffic flows and update the bandwidths of the links. Once a traffic flow has been processed, we need to clear it so that the test function can update it with the routes it finds - for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; traffic_flow_number++) { - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); + for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; + traffic_flow_number++) { + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); std::vector& traffic_flow_route = traffic_flow_routes[(NocTrafficFlowId)traffic_flow_number]; for (const NocLinkId link : traffic_flow_route) { @@ -219,7 +231,8 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { // setup random number generation std::random_device device; std::mt19937 rand_num_gen(device()); - std::uniform_int_distribution dist(0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 1); + std::uniform_int_distribution dist( + 0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 1); // this sets the range of possible priorities std::uniform_int_distribution dist_1(1, 100); // for random double number generation for the bandwidth and latency @@ -269,10 +282,7 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { id_of_all_hard_routers_in_device.push_back(router_number); // add the router to the noc - noc_ctx.noc_model.add_router(curr_router_id, - router_grid_position_x, - router_grid_position_y, - 0, + noc_ctx.noc_model.add_router(curr_router_id, router_grid_position_x, router_grid_position_y, 0, noc_router_latency); } @@ -283,35 +293,45 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { for (int j = 0; j < MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), noc_link_bandwidth, noc_link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), + noc_link_bandwidth, noc_link_latency); } // add a link to the top of the router if there exists another router there if ((i + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), noc_link_bandwidth, noc_link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + noc_link_bandwidth, noc_link_latency); } // add a link to the right of the router if there exists another router there if ((j + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), noc_link_bandwidth, noc_link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), + noc_link_bandwidth, noc_link_latency); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), noc_link_bandwidth, noc_link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + noc_link_bandwidth, noc_link_latency); } } } // now we need to create router cluster blocks and passing them to placed at a router hard block - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; + cluster_block_number++) { // since the indexes for the hard router blocks start from 0, we will just place the router clusters on hard router blocks with the same id // // start by creating the placement grid location for the current router cluster by getting the grid location of the hard router block it will be placed on const NocRouter& hard_router_block = noc_ctx.noc_model.get_single_noc_router((NocRouterId)cluster_block_number); t_block_loc current_cluster_block_location; current_cluster_block_location.is_fixed = true; - current_cluster_block_location.loc = t_pl_loc(hard_router_block.get_router_grid_position_x(), - hard_router_block.get_router_grid_position_y(), - -1, - hard_router_block.get_router_layer_position()); + current_cluster_block_location.loc + = t_pl_loc(hard_router_block.get_router_grid_position_x(), hard_router_block.get_router_grid_position_y(), + -1, hard_router_block.get_router_layer_position()); // now add the cluster and its placed location to the placement data structures block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); @@ -326,7 +346,8 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { int number_of_created_traffic_flows = 0; // now create a random number of traffic flows - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; + cluster_block_number++) { // the current cluster block number will act as the source router // and we will choose a random router to act as the sink router @@ -344,9 +365,10 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { int traffic_flow_priority = dist_1(rand_num_gen); // create and add the traffic flow - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(source_traffic_flow_name, sink_traffic_flow_name, - source_router_for_traffic_flow, sink_router_for_traffic_flow, - traffic_flow_bandwidth_usage, traffic_flow_latency_constraint, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow( + source_traffic_flow_name, sink_traffic_flow_name, source_router_for_traffic_flow, + sink_router_for_traffic_flow, traffic_flow_bandwidth_usage, traffic_flow_latency_constraint, + traffic_flow_priority); number_of_created_traffic_flows++; @@ -370,8 +392,10 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { auto routing_algorithm = std::make_unique(); // route all the traffic flows locally - for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; traffic_flow_number++) { - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); + for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; + traffic_flow_number++) { + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); std::vector traffic_flow_route; @@ -379,11 +403,8 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { int source_hard_router_id = (size_t)curr_traffic_flow.source_router_cluster_id; int sink_hard_routed_id = (size_t)curr_traffic_flow.sink_router_cluster_id; // route it - routing_algorithm->route_flow((NocRouterId)source_hard_router_id, - (NocRouterId)sink_hard_routed_id, - (NocTrafficFlowId)traffic_flow_number, - traffic_flow_route, - noc_ctx.noc_model); + routing_algorithm->route_flow((NocRouterId)source_hard_router_id, (NocRouterId)sink_hard_routed_id, + (NocTrafficFlowId)traffic_flow_number, traffic_flow_route, noc_ctx.noc_model); // store the number of links in the traffic flow golden_traffic_flow_route_sizes[traffic_flow_number] = traffic_flow_route.size(); @@ -398,11 +419,14 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { double golden_total_noc_bandwidth_costs = 0.; // now go through all the traffic flows and calculate the bandwidth cost - for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; traffic_flow_number++) { - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); + for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; + traffic_flow_number++) { + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); // calculate the bandwidth cost - double current_bandwidth_cost = golden_traffic_flow_route_sizes[traffic_flow_number] * curr_traffic_flow.traffic_flow_bandwidth; + double current_bandwidth_cost + = golden_traffic_flow_route_sizes[traffic_flow_number] * curr_traffic_flow.traffic_flow_bandwidth; current_bandwidth_cost *= curr_traffic_flow.traffic_flow_priority; golden_total_noc_bandwidth_costs += current_bandwidth_cost; @@ -430,15 +454,21 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { double link_latency = noc_ctx.noc_model.get_noc_link_latency(); // now go through all the traffic flows and calculate the latency cost - for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; traffic_flow_number++) { - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); + for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; + traffic_flow_number++) { + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_route_sizes[traffic_flow_number] + 1)) + (link_latency * golden_traffic_flow_route_sizes[traffic_flow_number]); - double curr_traffic_flow_latency_overrun = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + double curr_traffic_flow_latency + = (router_latency * (golden_traffic_flow_route_sizes[traffic_flow_number] + 1)) + + (link_latency * golden_traffic_flow_route_sizes[traffic_flow_number]); + double curr_traffic_flow_latency_overrun + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); // calculate the latency cost double current_latency_cost = curr_traffic_flow_latency * curr_traffic_flow.traffic_flow_priority; - double current_latency_overrun_cost = curr_traffic_flow_latency_overrun * curr_traffic_flow.traffic_flow_priority; + double current_latency_overrun_cost + = curr_traffic_flow_latency_overrun * curr_traffic_flow.traffic_flow_priority; golden_total_noc_latency_costs += current_latency_cost; golden_total_noc_latency_overrun_costs += current_latency_overrun_cost; @@ -475,11 +505,13 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { } } -TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_costs, test_recompute_noc_costs", "[noc_place_utils]") { +TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_costs, test_recompute_noc_costs", + "[noc_place_utils]") { // setup random number generation std::random_device device; std::mt19937 rand_num_gen(device()); - std::uniform_int_distribution dist(0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 3); + std::uniform_int_distribution dist( + 0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 3); // this sets the range of possible bandwidths for a traffic flow std::uniform_int_distribution dist_2(0, 1000); // this sets the range of possible priorities @@ -537,11 +569,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ router_grid_position_y = router_number / MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST; // add the router to the noc - noc_ctx.noc_model.add_router(curr_router_id, - router_grid_position_x, - router_grid_position_y, - 0, - router_latency); + noc_ctx.noc_model.add_router(curr_router_id, router_grid_position_x, router_grid_position_y, 0, router_latency); } noc_ctx.noc_model.make_room_for_noc_router_link_list(); @@ -551,35 +579,45 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ for (int j = 0; j < MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), + link_bandwidth, link_latency); } // add a link to the top of the router if there exists another router there if ((i + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + link_bandwidth, link_latency); } // add a link to the right of the router if there exists another router there if ((j + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), + link_bandwidth, link_latency); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + link_bandwidth, link_latency); } } } // now we need to create router cluster blocks and passing them to placed at a router hard block as an initial position - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; + cluster_block_number++) { // since the indexes for the hard router blocks start from 0, we will just place the router clusters on hard router blocks with the same id // // start by creating the placement grid location for the current router cluster by getting the grid location of the hard router block it will be placed on const NocRouter& hard_router_block = noc_ctx.noc_model.get_single_noc_router((NocRouterId)cluster_block_number); t_block_loc current_cluster_block_location; current_cluster_block_location.is_fixed = true; - current_cluster_block_location.loc = t_pl_loc(hard_router_block.get_router_grid_position_x(), - hard_router_block.get_router_grid_position_y(), - -1, - hard_router_block.get_router_layer_position()); + current_cluster_block_location.loc + = t_pl_loc(hard_router_block.get_router_grid_position_x(), hard_router_block.get_router_grid_position_y(), + -1, hard_router_block.get_router_layer_position()); router_where_cluster_is_placed.push_back((NocRouterId)cluster_block_number); @@ -594,7 +632,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // now create a random number of traffic flows // now we want the last two router clusters to not have any traffic flows associated to them, so restrict this loop to all router clusters except the last two - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 2; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 2; + cluster_block_number++) { // the current cluster block number will act as the source router // and we will choose a random router to act as the sink router @@ -614,9 +653,10 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ int traffic_flow_priority = dist_1(rand_num_gen); // create and add the traffic flow - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(source_traffic_flow_name, sink_traffic_flow_name, - source_router_for_traffic_flow, sink_router_for_traffic_flow, - traffic_flow_bandwidth_usage, traffic_flow_latency_constraint, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow( + source_traffic_flow_name, sink_traffic_flow_name, source_router_for_traffic_flow, + sink_router_for_traffic_flow, traffic_flow_bandwidth_usage, traffic_flow_latency_constraint, + traffic_flow_priority); number_of_created_traffic_flows++; @@ -653,17 +693,16 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // we need to route all the traffic flows based on their initial positions for (int traffic_flow_number = 0; traffic_flow_number < number_of_created_traffic_flows; traffic_flow_number++) { - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); // get the source and sink routers of this traffic flow int source_hard_router_id = (size_t)curr_traffic_flow.source_router_cluster_id; int sink_hard_routed_id = (size_t)curr_traffic_flow.sink_router_cluster_id; // route it - routing_algorithm->route_flow((NocRouterId)source_hard_router_id, - (NocRouterId)sink_hard_routed_id, - (NocTrafficFlowId)traffic_flow_number, - golden_traffic_flow_routes[(NocTrafficFlowId)traffic_flow_number], - noc_ctx.noc_model); + routing_algorithm->route_flow( + (NocRouterId)source_hard_router_id, (NocRouterId)sink_hard_routed_id, (NocTrafficFlowId)traffic_flow_number, + golden_traffic_flow_routes[(NocTrafficFlowId)traffic_flow_number], noc_ctx.noc_model); } NocCostHandler noc_cost_handler(block_locs); @@ -682,20 +721,24 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // and sum them up to calculate the total initial aggregate bandwidth and latency costs for the NoC for (int traffic_flow_number = 0; traffic_flow_number < number_of_created_traffic_flows; traffic_flow_number++) { const auto traffic_flow_id = (NocTrafficFlowId)traffic_flow_number; - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { golden_link_bandwidths[link] += curr_traffic_flow.traffic_flow_bandwidth; } // calculate the bandwidth cost - golden_traffic_flow_bandwidth_costs[traffic_flow_id] = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; + golden_traffic_flow_bandwidth_costs[traffic_flow_id] + = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; golden_traffic_flow_bandwidth_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); + double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); golden_traffic_flow_latency_costs[traffic_flow_id] = curr_traffic_flow_latency; - golden_traffic_flow_latency_overrun_costs[traffic_flow_id] = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + golden_traffic_flow_latency_overrun_costs[traffic_flow_id] + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); golden_traffic_flow_latency_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; golden_traffic_flow_latency_overrun_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; @@ -741,41 +784,61 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ blocks_affected.moved_blocks.resize(2); blocks_affected.moved_blocks[0].block_num = swap_router_block_one; - blocks_affected.moved_blocks[0].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); - blocks_affected.moved_blocks[0].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); + blocks_affected.moved_blocks[0].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); + blocks_affected.moved_blocks[0].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); blocks_affected.moved_blocks[1].block_num = swap_router_block_two; - blocks_affected.moved_blocks[1].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); - blocks_affected.moved_blocks[1].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); + blocks_affected.moved_blocks[1].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); + blocks_affected.moved_blocks[1].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; // get all the associated traffic flows of the moved cluster blocks - const std::vector& assoc_traffic_flows_block_one = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_one); - const std::vector& assoc_traffic_flows_block_two = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_two); + const std::vector& assoc_traffic_flows_block_one + = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_one); + const std::vector& assoc_traffic_flows_block_two + = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_two); // now go through the traffic flows and update the link bandwidths and traffic flow routes locally for (auto traffic_flow_id : assoc_traffic_flows_block_one) { if (routed_traffic_flows.find(traffic_flow_id) == routed_traffic_flows.end()) { // get the current traffic flow - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // go through the current traffic flow and reduce the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -784,11 +847,10 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ } // re-route the traffic flow - routing_algorithm->route_flow(router_where_cluster_is_placed[curr_traffic_flow.source_router_cluster_id], - router_where_cluster_is_placed[curr_traffic_flow.sink_router_cluster_id], - traffic_flow_id, - golden_traffic_flow_routes[traffic_flow_id], - noc_ctx.noc_model); + routing_algorithm->route_flow( + router_where_cluster_is_placed[curr_traffic_flow.source_router_cluster_id], + router_where_cluster_is_placed[curr_traffic_flow.sink_router_cluster_id], traffic_flow_id, + golden_traffic_flow_routes[traffic_flow_id], noc_ctx.noc_model); // go through the current traffic flow and increase the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -797,13 +859,17 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ } // update the costs now - golden_traffic_flow_bandwidth_costs[traffic_flow_id] = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; + golden_traffic_flow_bandwidth_costs[traffic_flow_id] + = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; golden_traffic_flow_bandwidth_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); + double curr_traffic_flow_latency + = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); golden_traffic_flow_latency_costs[traffic_flow_id] = curr_traffic_flow_latency; - golden_traffic_flow_latency_overrun_costs[traffic_flow_id] = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + golden_traffic_flow_latency_overrun_costs[traffic_flow_id] + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); golden_traffic_flow_latency_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; golden_traffic_flow_latency_overrun_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; @@ -815,7 +881,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ for (auto traffic_flow_id : assoc_traffic_flows_block_two) { if (routed_traffic_flows.find(traffic_flow_id) == routed_traffic_flows.end()) { // get the current traffic flow - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // go through the current traffic flow and reduce the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -824,11 +891,10 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ } // re-route the traffic flow - routing_algorithm->route_flow(router_where_cluster_is_placed[curr_traffic_flow.source_router_cluster_id], - router_where_cluster_is_placed[curr_traffic_flow.sink_router_cluster_id], - traffic_flow_id, - golden_traffic_flow_routes[traffic_flow_id], - noc_ctx.noc_model); + routing_algorithm->route_flow( + router_where_cluster_is_placed[curr_traffic_flow.source_router_cluster_id], + router_where_cluster_is_placed[curr_traffic_flow.sink_router_cluster_id], traffic_flow_id, + golden_traffic_flow_routes[traffic_flow_id], noc_ctx.noc_model); // go through the current traffic flow and increase the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -837,13 +903,17 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ } // update the costs now - golden_traffic_flow_bandwidth_costs[traffic_flow_id] = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; + golden_traffic_flow_bandwidth_costs[traffic_flow_id] + = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; golden_traffic_flow_bandwidth_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); + double curr_traffic_flow_latency + = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); golden_traffic_flow_latency_costs[traffic_flow_id] = curr_traffic_flow_latency; - golden_traffic_flow_latency_overrun_costs[traffic_flow_id] = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + golden_traffic_flow_latency_overrun_costs[traffic_flow_id] + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); golden_traffic_flow_latency_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; golden_traffic_flow_latency_overrun_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; @@ -883,7 +953,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ NocTrafficFlowId random_traffic_flow = (NocTrafficFlowId)dist(rand_num_gen); // get the current traffic flow - const t_noc_traffic_flow& chosen_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(random_traffic_flow); + const t_noc_traffic_flow& chosen_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(random_traffic_flow); // now swap the two blocks within this traffic flow ClusterBlockId swap_router_block_one = chosen_traffic_flow.sink_router_cluster_id; @@ -895,24 +966,40 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ blocks_affected.moved_blocks[0].block_num = swap_router_block_one; - blocks_affected.moved_blocks[0].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); - blocks_affected.moved_blocks[0].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); + blocks_affected.moved_blocks[0].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); + blocks_affected.moved_blocks[0].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); blocks_affected.moved_blocks[1].block_num = swap_router_block_two; - blocks_affected.moved_blocks[1].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); - blocks_affected.moved_blocks[1].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); + blocks_affected.moved_blocks[1].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); + blocks_affected.moved_blocks[1].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); // swap the hard router blocks where the two cluster blocks are placed on NocRouterId router_first_swap_cluster_location = router_where_cluster_is_placed[swap_router_block_one]; @@ -924,13 +1011,16 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; // get all the associated traffic flows of the moved cluster blocks - const std::vector& assoc_traffic_flows_block_one = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_one); - const std::vector& assoc_traffic_flows_block_two = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_two); + const std::vector& assoc_traffic_flows_block_one + = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_one); + const std::vector& assoc_traffic_flows_block_two + = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_two); // now go through the traffic flows and update the link bandwidths and traffic flow routes locally for (auto traffic_flow_id : assoc_traffic_flows_block_one) { // get the current traffic flow - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // go through the current traffic flow and reduce the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -941,9 +1031,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // re-route the traffic flow routing_algorithm->route_flow(router_where_cluster_is_placed[curr_traffic_flow.source_router_cluster_id], router_where_cluster_is_placed[curr_traffic_flow.sink_router_cluster_id], - traffic_flow_id, - golden_traffic_flow_routes[traffic_flow_id], - noc_ctx.noc_model); + traffic_flow_id, golden_traffic_flow_routes[traffic_flow_id], noc_ctx.noc_model); // go through the current traffic flow and increase the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -952,13 +1040,16 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ } // update the costs now - golden_traffic_flow_bandwidth_costs[traffic_flow_id] = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; + golden_traffic_flow_bandwidth_costs[traffic_flow_id] + = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; golden_traffic_flow_bandwidth_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); + double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); golden_traffic_flow_latency_costs[traffic_flow_id] = curr_traffic_flow_latency; - golden_traffic_flow_latency_overrun_costs[traffic_flow_id] = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + golden_traffic_flow_latency_overrun_costs[traffic_flow_id] + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); golden_traffic_flow_latency_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; golden_traffic_flow_latency_overrun_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; } @@ -966,7 +1057,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // this is for the second swapped block for (auto traffic_flow_id : assoc_traffic_flows_block_two) { // get the current traffic flow - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // go through the current traffic flow and reduce the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -977,9 +1069,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // re-route the traffic flow routing_algorithm->route_flow(router_where_cluster_is_placed[curr_traffic_flow.source_router_cluster_id], router_where_cluster_is_placed[curr_traffic_flow.sink_router_cluster_id], - traffic_flow_id, - golden_traffic_flow_routes[traffic_flow_id], - noc_ctx.noc_model); + traffic_flow_id, golden_traffic_flow_routes[traffic_flow_id], noc_ctx.noc_model); // go through the current traffic flow and increase the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -988,13 +1078,16 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ } // update the costs now - golden_traffic_flow_bandwidth_costs[traffic_flow_id] = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; + golden_traffic_flow_bandwidth_costs[traffic_flow_id] + = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; golden_traffic_flow_bandwidth_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); + double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); golden_traffic_flow_latency_costs[traffic_flow_id] = curr_traffic_flow_latency; - golden_traffic_flow_latency_overrun_costs[traffic_flow_id] = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + golden_traffic_flow_latency_overrun_costs[traffic_flow_id] + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); golden_traffic_flow_latency_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; golden_traffic_flow_latency_overrun_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; } @@ -1031,24 +1124,40 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ blocks_affected.moved_blocks[0].block_num = swap_router_block_one; - blocks_affected.moved_blocks[0].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); - blocks_affected.moved_blocks[0].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); + blocks_affected.moved_blocks[0].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); + blocks_affected.moved_blocks[0].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); blocks_affected.moved_blocks[1].block_num = swap_router_block_two; - blocks_affected.moved_blocks[1].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); - blocks_affected.moved_blocks[1].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); + blocks_affected.moved_blocks[1].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); + blocks_affected.moved_blocks[1].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); // swap the hard router blocks where the two cluster blocks are placed on router_first_swap_cluster_location = router_where_cluster_is_placed[swap_router_block_one]; @@ -1061,12 +1170,14 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // get all the associated traffic flows of the moved cluster blocks // remember that the first cluster block doesn't have any traffic flows associated to it - const auto& assoc_traffic_flows_block_2 = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_two); + const auto& assoc_traffic_flows_block_2 + = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_two); // this is for the second swapped block for (auto traffic_flow_id : assoc_traffic_flows_block_2) { // get the current traffic flow - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // go through the current traffic flow and reduce the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -1077,9 +1188,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // re-route the traffic flow routing_algorithm->route_flow(router_where_cluster_is_placed[curr_traffic_flow.source_router_cluster_id], router_where_cluster_is_placed[curr_traffic_flow.sink_router_cluster_id], - traffic_flow_id, - golden_traffic_flow_routes[traffic_flow_id], - noc_ctx.noc_model); + traffic_flow_id, golden_traffic_flow_routes[traffic_flow_id], noc_ctx.noc_model); // go through the current traffic flow and increase the bandwidths of the links for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { @@ -1088,13 +1197,16 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ } // update the costs now - golden_traffic_flow_bandwidth_costs[traffic_flow_id] = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; + golden_traffic_flow_bandwidth_costs[traffic_flow_id] + = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; golden_traffic_flow_bandwidth_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); + double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); golden_traffic_flow_latency_costs[traffic_flow_id] = curr_traffic_flow_latency; - golden_traffic_flow_latency_overrun_costs[traffic_flow_id] = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + golden_traffic_flow_latency_overrun_costs[traffic_flow_id] + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); golden_traffic_flow_latency_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; golden_traffic_flow_latency_overrun_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; } @@ -1134,24 +1246,40 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ blocks_affected.moved_blocks[0].block_num = swap_router_block_one; - blocks_affected.moved_blocks[0].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); - blocks_affected.moved_blocks[0].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); + blocks_affected.moved_blocks[0].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); + blocks_affected.moved_blocks[0].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); blocks_affected.moved_blocks[1].block_num = swap_router_block_two; - blocks_affected.moved_blocks[1].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); - blocks_affected.moved_blocks[1].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); + blocks_affected.moved_blocks[1].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); + blocks_affected.moved_blocks[1].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); // swap the hard router blocks where the two cluster blocks are placed on router_first_swap_cluster_location = router_where_cluster_is_placed[swap_router_block_one]; @@ -1188,7 +1316,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ NocLinkId current_link_id = (NocLinkId)link_number; const NocLink& current_link = noc_ctx.noc_model.get_single_noc_link(current_link_id); double golden_link_bandwidth = golden_link_bandwidths[current_link_id]; - double golden_link_congested_bandwidth = std::max(golden_link_bandwidths[current_link_id] - link_bandwidth, 0.0); + double golden_link_congested_bandwidth + = std::max(golden_link_bandwidths[current_link_id] - link_bandwidth, 0.0); double golden_link_congested_bandwidth_ratio = golden_link_congested_bandwidth / link_bandwidth; REQUIRE(golden_link_bandwidth == noc_cost_handler.get_link_used_bandwidth(current_link_id)); @@ -1208,7 +1337,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ golden_total_noc_latency_overrun_cost += golden_traffic_flow_latency_overrun_costs[traffic_flow_id]; } - golden_total_noc_congestion_cost = std::accumulate(golden_link_congestion_costs.begin(), golden_link_congestion_costs.end(), 0.0); + golden_total_noc_congestion_cost + = std::accumulate(golden_link_congestion_costs.begin(), golden_link_congestion_costs.end(), 0.0); // now check whether the expected noc costs that we manually calculated above match the noc costs found through the test function (we allow for a tolerance of difference) REQUIRE(vtr::isclose(golden_total_noc_aggr_bandwidth_cost, test_noc_costs.aggregate_bandwidth)); @@ -1239,7 +1369,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { // setup random number generation std::random_device device; std::mt19937 rand_num_gen(device()); - std::uniform_int_distribution dist(0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 3); + std::uniform_int_distribution dist( + 0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 3); // this sets the range of possible bandwidths for a traffic flow std::uniform_int_distribution dist_2(0, 1000); // this sets the range of possible priorities @@ -1297,11 +1428,7 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { router_grid_position_y = router_number / MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST; // add the router to the noc - noc_ctx.noc_model.add_router(curr_router_id, - router_grid_position_x, - router_grid_position_y, - 0, - router_latency); + noc_ctx.noc_model.add_router(curr_router_id, router_grid_position_x, router_grid_position_y, 0, router_latency); } noc_ctx.noc_model.make_room_for_noc_router_link_list(); @@ -1311,35 +1438,45 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { for (int j = 0; j < MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), + link_bandwidth, link_latency); } // add a link to the top of the router if there exists another router there if ((i + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + link_bandwidth, link_latency); } // add a link to the right of the router if there exists another router there if ((j + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), + link_bandwidth, link_latency); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + link_bandwidth, link_latency); } } } // now we need to create router cluster blocks and passing them to placed at a router hard block as an initial position - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; + cluster_block_number++) { // since the indexes for the hard router blocks start from 0, we will just place the router clusters on hard router blocks with the same id // // start by creating the placement grid location for the current router cluster by getting the grid location of the hard router block it will be placed on const NocRouter& hard_router_block = noc_ctx.noc_model.get_single_noc_router((NocRouterId)cluster_block_number); t_block_loc current_cluster_block_location; current_cluster_block_location.is_fixed = true; - current_cluster_block_location.loc = t_pl_loc(hard_router_block.get_router_grid_position_x(), - hard_router_block.get_router_grid_position_y(), - -1, - hard_router_block.get_router_layer_position()); + current_cluster_block_location.loc + = t_pl_loc(hard_router_block.get_router_grid_position_x(), hard_router_block.get_router_grid_position_y(), + -1, hard_router_block.get_router_layer_position()); router_where_cluster_is_placed.push_back((NocRouterId)cluster_block_number); @@ -1354,7 +1491,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { // now create a random number of traffic flows // now we want the last two router clusters to not have any traffic flows associated to them, so restrict this loop to all router clusters except the last two - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 2; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 2; + cluster_block_number++) { // the current cluster block number will act as the source router // and we will choose a random router to act as the sink router @@ -1374,9 +1512,10 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { int traffic_flow_priority = dist_1(rand_num_gen); // create and add the traffic flow - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(source_traffic_flow_name, sink_traffic_flow_name, - source_router_for_traffic_flow, sink_router_for_traffic_flow, - traffic_flow_bandwidth_usage, traffic_flow_latency_constraint, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow( + source_traffic_flow_name, sink_traffic_flow_name, source_router_for_traffic_flow, + sink_router_for_traffic_flow, traffic_flow_bandwidth_usage, traffic_flow_latency_constraint, + traffic_flow_priority); number_of_created_traffic_flows++; @@ -1413,17 +1552,16 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { // we need to route all the traffic flows based on their initial positions for (int traffic_flow_number = 0; traffic_flow_number < number_of_created_traffic_flows; traffic_flow_number++) { - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow((NocTrafficFlowId)traffic_flow_number); // get the source and sink routers of this traffic flow int source_hard_router_id = (size_t)curr_traffic_flow.source_router_cluster_id; int sink_hard_routed_id = (size_t)curr_traffic_flow.sink_router_cluster_id; // route it - routing_algorithm->route_flow((NocRouterId)source_hard_router_id, - (NocRouterId)sink_hard_routed_id, - (NocTrafficFlowId)traffic_flow_number, - golden_traffic_flow_routes[(NocTrafficFlowId)traffic_flow_number], - noc_ctx.noc_model); + routing_algorithm->route_flow( + (NocRouterId)source_hard_router_id, (NocRouterId)sink_hard_routed_id, (NocTrafficFlowId)traffic_flow_number, + golden_traffic_flow_routes[(NocTrafficFlowId)traffic_flow_number], noc_ctx.noc_model); } NocCostHandler noc_cost_handler(block_locs); @@ -1442,20 +1580,24 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { // and sum them up to calculate the total initial aggregate bandwidth and latency costs for the NoC for (int traffic_flow_number = 0; traffic_flow_number < number_of_created_traffic_flows; traffic_flow_number++) { const auto traffic_flow_id = (NocTrafficFlowId)traffic_flow_number; - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); for (auto& link : golden_traffic_flow_routes[traffic_flow_id]) { golden_link_bandwidths[link] += curr_traffic_flow.traffic_flow_bandwidth; } // calculate the bandwidth cost - golden_traffic_flow_bandwidth_costs[traffic_flow_id] = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; + golden_traffic_flow_bandwidth_costs[traffic_flow_id] + = golden_traffic_flow_routes[traffic_flow_id].size() * curr_traffic_flow.traffic_flow_bandwidth; golden_traffic_flow_bandwidth_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); + double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_routes[traffic_flow_id].size() + 1)) + + (link_latency * golden_traffic_flow_routes[traffic_flow_id].size()); golden_traffic_flow_latency_costs[traffic_flow_id] = curr_traffic_flow_latency; - golden_traffic_flow_latency_overrun_costs[traffic_flow_id] = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + golden_traffic_flow_latency_overrun_costs[traffic_flow_id] + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); golden_traffic_flow_latency_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; golden_traffic_flow_latency_overrun_costs[traffic_flow_id] *= curr_traffic_flow.traffic_flow_priority; @@ -1501,27 +1643,44 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { blocks_affected.moved_blocks.resize(2); blocks_affected.moved_blocks[0].block_num = swap_router_block_one; - blocks_affected.moved_blocks[0].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); - blocks_affected.moved_blocks[0].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); + blocks_affected.moved_blocks[0].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); + blocks_affected.moved_blocks[0].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); blocks_affected.moved_blocks[1].block_num = swap_router_block_two; - blocks_affected.moved_blocks[1].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); - blocks_affected.moved_blocks[1].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); + blocks_affected.moved_blocks[1].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); + blocks_affected.moved_blocks[1].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; @@ -1533,7 +1692,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { noc_cost_handler.find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].old_loc; @@ -1559,7 +1719,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { NocTrafficFlowId random_traffic_flow = (NocTrafficFlowId)dist(rand_num_gen); // get the current traffic flow - const t_noc_traffic_flow& chosen_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(random_traffic_flow); + const t_noc_traffic_flow& chosen_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(random_traffic_flow); // now swap the two blocks within this traffic flow ClusterBlockId swap_router_block_one = chosen_traffic_flow.sink_router_cluster_id; @@ -1571,27 +1732,44 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { blocks_affected.moved_blocks[0].block_num = swap_router_block_one; - blocks_affected.moved_blocks[0].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); - blocks_affected.moved_blocks[0].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); + blocks_affected.moved_blocks[0].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); + blocks_affected.moved_blocks[0].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); blocks_affected.moved_blocks[1].block_num = swap_router_block_two; - blocks_affected.moved_blocks[1].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); - blocks_affected.moved_blocks[1].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); + blocks_affected.moved_blocks[1].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); + blocks_affected.moved_blocks[1].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; @@ -1603,7 +1781,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { noc_cost_handler.find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].old_loc; @@ -1629,27 +1808,44 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { blocks_affected.moved_blocks[0].block_num = swap_router_block_one; - blocks_affected.moved_blocks[0].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); - blocks_affected.moved_blocks[0].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); + blocks_affected.moved_blocks[0].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); + blocks_affected.moved_blocks[0].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); blocks_affected.moved_blocks[1].block_num = swap_router_block_two; - blocks_affected.moved_blocks[1].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); - blocks_affected.moved_blocks[1].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); + blocks_affected.moved_blocks[1].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); + blocks_affected.moved_blocks[1].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; @@ -1662,7 +1858,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { noc_cost_handler.find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].old_loc; @@ -1691,27 +1888,44 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { blocks_affected.moved_blocks[0].block_num = swap_router_block_one; - blocks_affected.moved_blocks[0].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); - blocks_affected.moved_blocks[0].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); + blocks_affected.moved_blocks[0].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); + blocks_affected.moved_blocks[0].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); blocks_affected.moved_blocks[1].block_num = swap_router_block_two; - blocks_affected.moved_blocks[1].old_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]).get_router_layer_position()); - blocks_affected.moved_blocks[1].new_loc = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_x(), - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_grid_position_y(), - -1, - noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]).get_router_layer_position()); + blocks_affected.moved_blocks[1].old_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_two]) + .get_router_layer_position()); + blocks_affected.moved_blocks[1].new_loc + = t_pl_loc(noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_x(), + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_grid_position_y(), + -1, + noc_ctx.noc_model.get_single_noc_router(router_where_cluster_is_placed[swap_router_block_one]) + .get_router_layer_position()); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; @@ -1726,7 +1940,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { noc_cost_handler.find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost); // swap the hard router blocks where the two cluster blocks are placed on - std::swap(router_where_cluster_is_placed[swap_router_block_one], router_where_cluster_is_placed[swap_router_block_two]); + std::swap(router_where_cluster_is_placed[swap_router_block_one], + router_where_cluster_is_placed[swap_router_block_two]); // now move the blocks in the placement data structures block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].old_loc; @@ -1744,7 +1959,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { NocLinkId current_link_id = (NocLinkId)link_number; const NocLink& current_link = noc_ctx.noc_model.get_single_noc_link(current_link_id); double golden_link_bandwidth = golden_link_bandwidths[current_link_id]; - double golden_link_congested_bandwidth = std::max(golden_link_bandwidths[current_link_id] - link_bandwidth, 0.0); + double golden_link_congested_bandwidth + = std::max(golden_link_bandwidths[current_link_id] - link_bandwidth, 0.0); double golden_link_congested_bandwidth_ratio = golden_link_congested_bandwidth / link_bandwidth; REQUIRE(golden_link_bandwidth == noc_cost_handler.get_link_used_bandwidth(current_link_id)); @@ -1764,7 +1980,8 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { golden_total_noc_latency_overrun_cost += golden_traffic_flow_latency_overrun_costs[traffic_flow_id]; } - golden_total_noc_congestion_cost = std::accumulate(golden_link_congestion_costs.begin(), golden_link_congestion_costs.end(), 0.0); + golden_total_noc_congestion_cost + = std::accumulate(golden_link_congestion_costs.begin(), golden_link_congestion_costs.end(), 0.0); // now check whether the expected noc costs that we manually calculated above match the noc costs found through the test function (we allow for a tolerance of difference) REQUIRE(vtr::isclose(golden_total_noc_aggr_bandwidth_cost, test_noc_costs.aggregate_bandwidth)); @@ -1905,7 +2122,8 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { // setup random number generation std::random_device device; std::mt19937 rand_num_gen(device()); - std::uniform_int_distribution dist(0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 1); + std::uniform_int_distribution dist( + 0, NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST - 1); // this sets the range of possible bandwidths for a traffic flow std::uniform_int_distribution dist_2(0, 1000); // this sets the range of possible priorities @@ -1961,11 +2179,7 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { router_grid_position_y = router_number / MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST; // add the router to the noc - noc_ctx.noc_model.add_router(curr_router_id, - router_grid_position_x, - router_grid_position_y, - 0, - router_latency); + noc_ctx.noc_model.add_router(curr_router_id, router_grid_position_x, router_grid_position_y, 0, router_latency); } noc_ctx.noc_model.make_room_for_noc_router_link_list(); @@ -1975,35 +2189,45 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { for (int j = 0; j < MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - 1), + link_bandwidth, link_latency); } // add a link to the top of the router if there exists another router there if ((i + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + + MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + link_bandwidth, link_latency); } // add a link to the right of the router if there exists another router there if ((j + 1) <= MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST - 1) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + 1), + link_bandwidth, link_latency); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), link_bandwidth, link_latency); + noc_ctx.noc_model.add_link((NocRouterId)((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j), + (NocRouterId)(((i * MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST) + j) + - MESH_TOPOLOGY_SIZE_NOC_PLACE_UTILS_TEST), + link_bandwidth, link_latency); } } } // now we need to create router cluster blocks and passing them to placed at a router hard block as an initial position - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; + cluster_block_number++) { // since the indexes for the hard router blocks start from 0, we will just place the router clusters on hard router blocks with the same id // // start by creating the placement grid location for the current router cluster by getting the grid location of the hard router block it will be placed on const NocRouter& hard_router_block = noc_ctx.noc_model.get_single_noc_router((NocRouterId)cluster_block_number); t_block_loc current_cluster_block_location; current_cluster_block_location.is_fixed = true; - current_cluster_block_location.loc = t_pl_loc(hard_router_block.get_router_grid_position_x(), - hard_router_block.get_router_grid_position_y(), - -1, - hard_router_block.get_router_layer_position()); + current_cluster_block_location.loc + = t_pl_loc(hard_router_block.get_router_grid_position_x(), hard_router_block.get_router_grid_position_y(), + -1, hard_router_block.get_router_layer_position()); router_where_cluster_is_placed.push_back((NocRouterId)cluster_block_number); @@ -2017,7 +2241,8 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { int number_of_created_traffic_flows = 0; // now create a random number of traffic flows - for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; cluster_block_number++) { + for (int cluster_block_number = 0; cluster_block_number < NUM_OF_LOGICAL_ROUTER_BLOCKS_NOC_PLACE_UTILS_TEST; + cluster_block_number++) { // the current cluster block number will act as the source router // and we will choose a random router to act as the sink router @@ -2036,9 +2261,10 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { int traffic_flow_priority = dist_1(rand_num_gen); // create and add the traffic flow - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(source_traffic_flow_name, sink_traffic_flow_name, - source_router_for_traffic_flow, sink_router_for_traffic_flow, - traffic_flow_bandwidth_usage, traffic_flow_latency_constraint, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow( + source_traffic_flow_name, sink_traffic_flow_name, source_router_for_traffic_flow, + sink_router_for_traffic_flow, traffic_flow_bandwidth_usage, traffic_flow_latency_constraint, + traffic_flow_priority); number_of_created_traffic_flows++; @@ -2064,9 +2290,11 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { vtr::vector golden_link_bandwidth_usage(noc_ctx.noc_model.get_number_of_noc_links(), 0.); // we need to route all the traffic flows based on their initial positions - for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; traffic_flow_number++) { + for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; + traffic_flow_number++) { const auto traffic_flow_id = (NocTrafficFlowId)traffic_flow_number; - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); // get the source and sink routers of this traffic flow int source_hard_router_id = (size_t)curr_traffic_flow.source_router_cluster_id; @@ -2077,11 +2305,8 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { double traffic_flow_bandwidth = curr_traffic_flow.traffic_flow_bandwidth; // route it - routing_algorithm->route_flow((NocRouterId)source_hard_router_id, - (NocRouterId)sink_hard_routed_id, - (NocTrafficFlowId)traffic_flow_number, - traffic_flow_route, - noc_ctx.noc_model); + routing_algorithm->route_flow((NocRouterId)source_hard_router_id, (NocRouterId)sink_hard_routed_id, + (NocTrafficFlowId)traffic_flow_number, traffic_flow_route, noc_ctx.noc_model); // update link bandwidth utilization for (const NocLinkId link_id : traffic_flow_route) { @@ -2096,9 +2321,11 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { costs.noc_cost_terms.latency_overrun = 0.; costs.noc_cost_terms.congestion = 0.; - for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; traffic_flow_number++) { + for (int traffic_flow_number = 0; traffic_flow_number < NUM_OF_TRAFFIC_FLOWS_NOC_PLACE_UTILS_TEST; + traffic_flow_number++) { const auto traffic_flow_id = (NocTrafficFlowId)traffic_flow_number; - const t_noc_traffic_flow& curr_traffic_flow = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = noc_ctx.noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); double curr_bandwidth_cost = 0.; double curr_latency_cost = 0.; @@ -2111,11 +2338,13 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { curr_bandwidth_cost = golden_traffic_flow_route.size() * curr_traffic_flow.traffic_flow_bandwidth; curr_bandwidth_cost *= curr_traffic_flow.traffic_flow_priority; - double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_route.size() + 1)) + (link_latency * golden_traffic_flow_route.size()); + double curr_traffic_flow_latency = (router_latency * (golden_traffic_flow_route.size() + 1)) + + (link_latency * golden_traffic_flow_route.size()); // calculate the latency cost curr_latency_cost = curr_traffic_flow_latency; - curr_latency_overrun_cost = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); + curr_latency_overrun_cost + = std::max(curr_traffic_flow_latency - curr_traffic_flow.max_traffic_flow_latency, 0.); curr_latency_cost *= curr_traffic_flow.traffic_flow_priority; curr_latency_overrun_cost *= curr_traffic_flow.traffic_flow_priority; diff --git a/vpr/test/test_noc_storage.cpp b/vpr/test/test_noc_storage.cpp index 0320fa130dc..3a87014708c 100644 --- a/vpr/test/test_noc_storage.cpp +++ b/vpr/test/test_noc_storage.cpp @@ -63,9 +63,11 @@ TEST_CASE("test_adding_routers_to_noc_storage", "[vpr_noc]") { // compare all the router properties REQUIRE(golden_set[router_number].get_router_user_id() == router_to_verify.get_router_user_id()); - REQUIRE(golden_set[router_number].get_router_grid_position_x() == router_to_verify.get_router_grid_position_x()); + REQUIRE(golden_set[router_number].get_router_grid_position_x() + == router_to_verify.get_router_grid_position_x()); - REQUIRE(golden_set[router_number].get_router_grid_position_y() == router_to_verify.get_router_grid_position_y()); + REQUIRE(golden_set[router_number].get_router_grid_position_y() + == router_to_verify.get_router_grid_position_y()); } } TEST_CASE("test_router_id_conversion", "[vpr_noc]") { @@ -114,9 +116,11 @@ TEST_CASE("test_router_id_conversion", "[vpr_noc]") { // compare all the router properties REQUIRE(golden_set[router_number].get_router_user_id() == router_to_verify.get_router_user_id()); - REQUIRE(golden_set[router_number].get_router_grid_position_x() == router_to_verify.get_router_grid_position_x()); + REQUIRE(golden_set[router_number].get_router_grid_position_x() + == router_to_verify.get_router_grid_position_x()); - REQUIRE(golden_set[router_number].get_router_grid_position_y() == router_to_verify.get_router_grid_position_y()); + REQUIRE(golden_set[router_number].get_router_grid_position_y() + == router_to_verify.get_router_grid_position_y()); } } TEST_CASE("test_add_link", "[vpr_noc]") { @@ -150,11 +154,7 @@ TEST_CASE("test_add_link", "[vpr_noc]") { router_id = router_number; // add tje router to the noc - test_noc.add_router(router_id, - curr_router_x_pos, - curr_router_y_pos, - 0, - DUMMY_LATENCY); + test_noc.add_router(router_id, curr_router_x_pos, curr_router_y_pos, 0, DUMMY_LATENCY); } // allocate the size for outgoing link vector for each router @@ -193,12 +193,15 @@ TEST_CASE("test_add_link", "[vpr_noc]") { const NocLink& current_link_to_test = test_noc.get_single_noc_link(link_id); // now get the source and sink routers of the test link - const NocRouter& test_link_source_router = test_noc.get_single_noc_router(current_link_to_test.get_source_router()); + const NocRouter& test_link_source_router + = test_noc.get_single_noc_router(current_link_to_test.get_source_router()); const NocRouter& test_link_sink_router = test_noc.get_single_noc_router(current_link_to_test.get_sink_router()); // now get the source and sink routers of the golden link - const NocRouter& golden_link_source_router = test_noc.get_single_noc_router(golden_set[link_number].get_source_router()); - const NocRouter& golden_link_sink_router = test_noc.get_single_noc_router(golden_set[link_number].get_sink_router()); + const NocRouter& golden_link_source_router + = test_noc.get_single_noc_router(golden_set[link_number].get_source_router()); + const NocRouter& golden_link_sink_router + = test_noc.get_single_noc_router(golden_set[link_number].get_sink_router()); // verify the test link by checking that the source and sink routers match the golden reference link REQUIRE(golden_link_source_router.get_router_user_id() == test_link_source_router.get_router_user_id()); @@ -313,11 +316,7 @@ TEST_CASE("test_remove_link", "[vpr_noc]") { router_id = router_number; // add tje router to the noc - test_noc.add_router(router_id, - curr_router_x_pos, - curr_router_y_pos, - 0, - DUMMY_LATENCY); + test_noc.add_router(router_id, curr_router_x_pos, curr_router_y_pos, 0, DUMMY_LATENCY); } // now go through and add the links to the NoC @@ -362,7 +361,8 @@ TEST_CASE("test_remove_link", "[vpr_noc]") { // get the current outgoing link const NocLink& curr_outgoing_link = test_noc.get_single_noc_link(outgoing_link); - if ((curr_outgoing_link.get_source_router() == link_to_remove_src_router) && (curr_outgoing_link.get_sink_router() == link_to_remove_sink_router)) { + if ((curr_outgoing_link.get_source_router() == link_to_remove_src_router) + && (curr_outgoing_link.get_sink_router() == link_to_remove_sink_router)) { link_removed_from_outgoing_vector = false; break; } @@ -374,7 +374,8 @@ TEST_CASE("test_remove_link", "[vpr_noc]") { // that we removed. THe removed link should have the source and sink routers set to invalid values. for (auto single_link : links_in_noc) { // check whether the source and sink router of the current link matches the routers in the link to remove - if ((single_link.get_source_router() == link_to_remove_src_router) && (single_link.get_sink_router() == link_to_remove_sink_router)) { + if ((single_link.get_source_router() == link_to_remove_src_router) + && (single_link.get_sink_router() == link_to_remove_sink_router)) { // this indicates that the link was not set to an invalid state and not removed properly link_removed_from_outgoing_vector = false; break; @@ -433,11 +434,7 @@ TEST_CASE("test_generate_router_key_from_grid_location", "[vpr_noc]") { golden_set.emplace_back((NocRouterId)router_number); // add the router to the noc - test_noc.add_router(curr_router_id, - router_grid_position_x, - router_grid_position_y, - 0, - DUMMY_LATENCY); + test_noc.add_router(curr_router_id, router_grid_position_x, router_grid_position_y, 0, DUMMY_LATENCY); } // now verify the test function by identifying all the routers using their grid locations @@ -445,12 +442,10 @@ TEST_CASE("test_generate_router_key_from_grid_location", "[vpr_noc]") { for (int grid_location = 0; grid_location < NUM_OF_ROUTERS; grid_location++) { // contains the grid location of a router block seen during placement // we don't care about the subtile so give it an arbitrary value - t_pl_loc placement_router_grid_location = t_pl_loc(grid_location, - grid_location, - -1, - 0); + t_pl_loc placement_router_grid_location = t_pl_loc(grid_location, grid_location, -1, 0); - NocRouterId found_router_at_grid_location = test_noc.get_router_at_grid_location(placement_router_grid_location); + NocRouterId found_router_at_grid_location + = test_noc.get_router_at_grid_location(placement_router_grid_location); // verify that the found router matches the expected result REQUIRE(golden_set[grid_location] == found_router_at_grid_location); diff --git a/vpr/test/test_noc_traffic_flows.cpp b/vpr/test/test_noc_traffic_flows.cpp index 1afd37727e6..9d428ae75cb 100644 --- a/vpr/test/test_noc_traffic_flows.cpp +++ b/vpr/test/test_noc_traffic_flows.cpp @@ -49,7 +49,9 @@ TEST_CASE("test_adding_traffic_flows", "[vpr_noc_traffic_flows]") { sink_router_id = (ClusterBlockId)second_router; // need to match how the test function does it - golden_traffic_flow_list.emplace_back(source_router_name, sink_router_name, source_router_id, sink_router_id, traffic_flow_bandwidth, traffic_flow_latency, traffic_flow_priority); + golden_traffic_flow_list.emplace_back(source_router_name, sink_router_name, source_router_id, + sink_router_id, traffic_flow_bandwidth, traffic_flow_latency, + traffic_flow_priority); curr_flow_id = (NocTrafficFlowId)(golden_traffic_flow_list.size() - 1); @@ -73,7 +75,9 @@ TEST_CASE("test_adding_traffic_flows", "[vpr_noc_traffic_flows]") { sink_router_id = (ClusterBlockId)second_router; // create and add the traffic flow - traffic_flow_storage.create_noc_traffic_flow(source_router_name, sink_router_name, source_router_id, sink_router_id, traffic_flow_bandwidth, traffic_flow_latency, traffic_flow_priority); + traffic_flow_storage.create_noc_traffic_flow(source_router_name, sink_router_name, source_router_id, + sink_router_id, traffic_flow_bandwidth, + traffic_flow_latency, traffic_flow_priority); } } @@ -82,7 +86,8 @@ TEST_CASE("test_adding_traffic_flows", "[vpr_noc_traffic_flows]") { // check the set of routers first to see that they were all added properly for (int router = 0; router < size_of_router_block_list; router++) { // every router in the golden list needs to exist in the traffic flow data structure (this also tests cases where a router was added multiple times, this shouldn't affect it) - REQUIRE(traffic_flow_storage.check_if_cluster_block_has_traffic_flows(golden_router_blocks_list[router]) == true); + REQUIRE(traffic_flow_storage.check_if_cluster_block_has_traffic_flows(golden_router_blocks_list[router]) + == true); } int size_of_traffic_flow_list = golden_traffic_flow_list.size(); @@ -90,28 +95,36 @@ TEST_CASE("test_adding_traffic_flows", "[vpr_noc_traffic_flows]") { // check the traffic flows (make sure they are correct) for (int traffic_flow = 0; traffic_flow < size_of_traffic_flow_list; traffic_flow++) { curr_flow_id = (NocTrafficFlowId)traffic_flow; - const t_noc_traffic_flow& curr_traffic_flow = traffic_flow_storage.get_single_noc_traffic_flow(curr_flow_id); + const t_noc_traffic_flow& curr_traffic_flow + = traffic_flow_storage.get_single_noc_traffic_flow(curr_flow_id); // make sure that the source and destination routers match the golden set - REQUIRE(curr_traffic_flow.source_router_cluster_id == golden_traffic_flow_list[traffic_flow].source_router_cluster_id); - REQUIRE(curr_traffic_flow.sink_router_cluster_id == golden_traffic_flow_list[traffic_flow].sink_router_cluster_id); + REQUIRE(curr_traffic_flow.source_router_cluster_id + == golden_traffic_flow_list[traffic_flow].source_router_cluster_id); + REQUIRE(curr_traffic_flow.sink_router_cluster_id + == golden_traffic_flow_list[traffic_flow].sink_router_cluster_id); } // now check that the associated traffic flows for each router is also stored correctly for (int router_number = 0; router_number < NUM_OF_ROUTERS; router_number++) { ClusterBlockId router_id = (ClusterBlockId)router_number; - int number_of_traffic_flows_associated_with_current_router = golden_list_of_associated_traffic_flows_to_routers[router_id].size(); + int number_of_traffic_flows_associated_with_current_router + = golden_list_of_associated_traffic_flows_to_routers[router_id].size(); // get the traffic flows associated to the current router from the test data structure - const std::vector& associated_traffic_flows_to_router = traffic_flow_storage.get_traffic_flows_associated_to_router_block(router_id); + const std::vector& associated_traffic_flows_to_router + = traffic_flow_storage.get_traffic_flows_associated_to_router_block(router_id); // make sure that the number of traffic flows associated to each router within the NocTrafficFlows data structure matches the golden set - REQUIRE((int)associated_traffic_flows_to_router.size() == number_of_traffic_flows_associated_with_current_router); + REQUIRE((int)associated_traffic_flows_to_router.size() + == number_of_traffic_flows_associated_with_current_router); // now go through the associated traffic flows and make sure the correct ones were added to the current router - for (int router_traffic_flow = 0; router_traffic_flow < number_of_traffic_flows_associated_with_current_router; router_traffic_flow++) { - REQUIRE((size_t)golden_list_of_associated_traffic_flows_to_routers[router_id][router_traffic_flow] == (size_t)associated_traffic_flows_to_router[router_traffic_flow]); + for (int router_traffic_flow = 0; + router_traffic_flow < number_of_traffic_flows_associated_with_current_router; router_traffic_flow++) { + REQUIRE((size_t)golden_list_of_associated_traffic_flows_to_routers[router_id][router_traffic_flow] + == (size_t)associated_traffic_flows_to_router[router_traffic_flow]); } } @@ -125,7 +138,9 @@ TEST_CASE("test_adding_traffic_flows", "[vpr_noc_traffic_flows]") { // check that this block doesn't exist in the traffic flow data structure REQUIRE(traffic_flow_storage.check_if_cluster_block_has_traffic_flows(invalid_block) == false); } - SECTION("Checking that when a router has no traffic flows associated to it, then the associated traffic flows vector retrieved from the NocTrafficFlows class for this router should be null.") { + SECTION( + "Checking that when a router has no traffic flows associated to it, then the associated traffic flows vector " + "retrieved from the NocTrafficFlows class for this router should be null.") { // create an invalid block id (mimics the effect where a router has no traffic flows associated with it) ClusterBlockId invalid_block = (ClusterBlockId)(NUM_OF_ROUTERS + 1); diff --git a/vpr/test/test_odd_even_routing.cpp b/vpr/test/test_odd_even_routing.cpp index e642518076b..1f653808b48 100644 --- a/vpr/test/test_odd_even_routing.cpp +++ b/vpr/test/test_odd_even_routing.cpp @@ -37,11 +37,9 @@ void compare_routes(const std::vector& golden_path, } } - void check_turn_legality(const vtr::vector>& traffic_flow_routes, const NocStorage& noc_model, const TurnModelRouting& routing_algorithm) { - for (const auto& traffic_flow_route : traffic_flow_routes) { for (size_t i = 0; i < traffic_flow_route.size() - 1; i++) { const NocLink& noc_link1 = noc_model.get_single_noc_link(traffic_flow_route[i]); @@ -83,19 +81,23 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { for (int j = 0; j < 10; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_model.add_link((NocRouterId)((i * 10) + j), (NocRouterId)(((i * 10) + j) - 1), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 10) + j), (NocRouterId)(((i * 10) + j) - 1), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the top of the router if there exists another router there if ((i + 1) <= 9) { - noc_model.add_link((NocRouterId)((i * 10) + j), (NocRouterId)(((i * 10) + j) + 10), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 10) + j), (NocRouterId)(((i * 10) + j) + 10), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the right of the router if there exists another router there if ((j + 1) <= 9) { - noc_model.add_link((NocRouterId)((i * 10) + j), (NocRouterId)(((i * 10) + j) + 1), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 10) + j), (NocRouterId)(((i * 10) + j) + 1), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_model.add_link((NocRouterId)((i * 10) + j), (NocRouterId)(((i * 10) + j) - 10), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 10) + j), (NocRouterId)(((i * 10) + j) - 10), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } } } @@ -115,13 +117,16 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector found_path; // make sure that a legal route was found (no error should be thrown) - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // now make sure that the found route is empty, we shouldn't be moving anywhere as the start and end routers are the same REQUIRE(found_path.empty() == true); } - SECTION("Test case where the destination router and the starting routers are located on the same row, and the route is westward.") { + SECTION( + "Test case where the destination router and the starting routers are located on the same row, and the route is " + "westward.") { // choose start router as 19, and choose the destination router as 12 auto start_router_id = NocRouterId(19); auto sink_router_id = NocRouterId(12); @@ -132,7 +137,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector golden_path; for (int current_router = 19; current_router != 12; current_router--) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router - 1)); + NocLinkId link_id + = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router - 1)); const NocLink& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } @@ -141,13 +147,16 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector found_path; // now run the algorithm to find a route, once again we expect no errors and a legal path to be found - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // make sure that size of the found route and golden route match compare_routes(golden_path, found_path, noc_model); } - SECTION("Test case where the destination router and the starting routers are located on the same row, and the route is eastward.") { + SECTION( + "Test case where the destination router and the starting routers are located on the same row, and the route is " + "eastward.") { // choose start router as 19, and choose the destination router as 12 auto start_router_id = NocRouterId(41); auto sink_router_id = NocRouterId(47); @@ -158,7 +167,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector golden_path; for (int current_router = 41; current_router != 47; current_router++) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router + 1)); + NocLinkId link_id + = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router + 1)); const NocLink& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } @@ -167,13 +177,16 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector found_path; // now run the algorithm to find a route, once again we expect no errors and a legal path to be found - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // make sure that size of the found route and golden route match compare_routes(golden_path, found_path, noc_model); } - SECTION("Test case where the destination router and the starting routers are located on the same column within the FPGA device, and the route is northward") { + SECTION( + "Test case where the destination router and the starting routers are located on the same column within the " + "FPGA device, and the route is northward") { // choose start router as 15, and choose the destination router as 75 auto start_router_id = NocRouterId(15); auto sink_router_id = NocRouterId(75); @@ -184,7 +197,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector golden_path; for (int current_row = 1; current_row < 7; current_row++) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 10 + 5), NocRouterId((current_row + 1) * 10 + 5)); + NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 10 + 5), + NocRouterId((current_row + 1) * 10 + 5)); const NocLink& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } @@ -193,13 +207,16 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector found_path; // now run the algorithm to find a route, once again we expect no errors and a legal path to be found - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // make sure that size of the found route and golden route match compare_routes(golden_path, found_path, noc_model); } - SECTION("Test case where the destination router and the starting routers are located on the same column within the FPGA device, and the route is southward") { + SECTION( + "Test case where the destination router and the starting routers are located on the same column within the " + "FPGA device, and the route is southward") { // choose start router as 82, and choose the destination router as 22 auto start_router_id = NocRouterId(82); auto sink_router_id = NocRouterId(22); @@ -210,7 +227,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector golden_path; for (int current_row = 8; current_row > 2; current_row--) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 10 + 2), NocRouterId((current_row - 1) * 10 + 2)); + NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 10 + 2), + NocRouterId((current_row - 1) * 10 + 2)); const NocLink& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } @@ -219,16 +237,19 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { std::vector found_path; // now run the algorithm to find a route, once again we expect no errors and a legal path to be found - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // make sure that size of the found route and golden route match compare_routes(golden_path, found_path, noc_model); } - SECTION("Test case where multiple traffic flows are router, and routes are checked for turn legality and deadlock freedom.") { + SECTION( + "Test case where multiple traffic flows are router, and routes are checked for turn legality and deadlock " + "freedom.") { std::random_device device; std::mt19937 rand_num_gen(device()); - std::uniform_int_distribution dist(0, 99); + std::uniform_int_distribution dist(0, 99); NocTrafficFlows traffic_flow_storage; @@ -240,20 +261,23 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { dst_blk_id = (ClusterBlockId)dist(rand_num_gen); } while (src_blk_id == dst_blk_id); - traffic_flow_storage.create_noc_traffic_flow("dummy_name_1", "dummy_name_2", src_blk_id, dst_blk_id, 1, 1, 1); + traffic_flow_storage.create_noc_traffic_flow("dummy_name_1", "dummy_name_2", src_blk_id, dst_blk_id, 1, 1, + 1); } traffic_flow_storage.finished_noc_traffic_flows_setup(); - vtr::vector> traffic_flow_routes(traffic_flow_storage.get_number_of_traffic_flows()); + vtr::vector> traffic_flow_routes( + traffic_flow_storage.get_number_of_traffic_flows()); for (const auto& [id, traffic_flow] : traffic_flow_storage.get_all_traffic_flows().pairs()) { + NocRouterId src_router_id + = noc_model.get_router_at_grid_location(block_locs[traffic_flow.source_router_cluster_id].loc); + NocRouterId dst_router_id + = noc_model.get_router_at_grid_location(block_locs[traffic_flow.sink_router_cluster_id].loc); - NocRouterId src_router_id = noc_model.get_router_at_grid_location(block_locs[traffic_flow.source_router_cluster_id].loc); - NocRouterId dst_router_id = noc_model.get_router_at_grid_location(block_locs[traffic_flow.sink_router_cluster_id].loc); - - REQUIRE_NOTHROW(routing_algorithm.route_flow(src_router_id, dst_router_id, - id, traffic_flow_routes[id], noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(src_router_id, dst_router_id, id, traffic_flow_routes[id], noc_model)); } ChannelDependencyGraph cdg(noc_model, traffic_flow_storage, traffic_flow_routes, block_locs); @@ -264,4 +288,4 @@ TEST_CASE("test_route_flow", "[vpr_noc_odd_even_routing]") { } } -} \ No newline at end of file +} // namespace \ No newline at end of file diff --git a/vpr/test/test_place_delay_model_serdes.cpp b/vpr/test/test_place_delay_model_serdes.cpp index 988b3e255b4..cc895db73ec 100644 --- a/vpr/test/test_place_delay_model_serdes.cpp +++ b/vpr/test/test_place_delay_model_serdes.cpp @@ -25,15 +25,12 @@ TEST_CASE("round_trip_delta_delay_model", "[vpr]") { float min_cross_layer_delay = 0.; - DeltaDelayModel model(min_cross_layer_delay, - std::move(delays), - false); + DeltaDelayModel model(min_cross_layer_delay, std::move(delays), false); const auto& delays1 = model.delays(); model.write(kDeltaDelayBin); - DeltaDelayModel model2(min_cross_layer_delay, - false); + DeltaDelayModel model2(min_cross_layer_delay, false); model2.read(kDeltaDelayBin); const auto& delays2 = model2.delays(); @@ -68,17 +65,14 @@ TEST_CASE("round_trip_override_delay_model", "[vpr]") { } float min_cross_layer_delay = 0.; OverrideDelayModel model(min_cross_layer_delay, false); - auto base_model = std::make_unique(min_cross_layer_delay, - delays, - false); + auto base_model = std::make_unique(min_cross_layer_delay, delays, false); model.set_base_delay_model(std::move(base_model)); model.set_delay_override(1, 2, 3, 4, 5, 6, -1); model.set_delay_override(2, 2, 3, 4, 5, 6, -2); model.write(kOverrideDelayBin); - OverrideDelayModel model2(min_cross_layer_delay, - false); + OverrideDelayModel model2(min_cross_layer_delay, false); model2.read(kOverrideDelayBin); const auto& delays1 = model.base_delay_model()->delays(); diff --git a/vpr/test/test_post_verilog.cpp b/vpr/test/test_post_verilog.cpp index a8344fa79d4..28e49d700d4 100644 --- a/vpr/test/test_post_verilog.cpp +++ b/vpr/test/test_post_verilog.cpp @@ -18,17 +18,14 @@ void do_vpr_flow(const char* input_unc_opt, const char* output_unc_opt) { auto vpr_setup = t_vpr_setup(); // Command line arguments - const char* argv[] = { - "test_vpr", - kArchFile, - kCircuitFile, - "--route_chan_width", "100", - "--gen_post_synthesis_netlist", "on", - "--post_synth_netlist_unconn_inputs", input_unc_opt, - "--post_synth_netlist_unconn_outputs", output_unc_opt}; - - vpr_init(sizeof(argv) / sizeof(argv[0]), argv, - &options, &vpr_setup, &arch); + const char* argv[] = {"test_vpr", kArchFile, + kCircuitFile, "--route_chan_width", + "100", "--gen_post_synthesis_netlist", + "on", "--post_synth_netlist_unconn_inputs", + input_unc_opt, "--post_synth_netlist_unconn_outputs", + output_unc_opt}; + + vpr_init(sizeof(argv) / sizeof(argv[0]), argv, &options, &vpr_setup, &arch); bool flow_succeeded = vpr_flow(vpr_setup, arch); @@ -104,7 +101,8 @@ TEST_CASE("post_verilog", "[vpr]") { do_vpr_flow("nets", "unconnected"); copy_file("unconnected_post_synthesis.v", "test_post_verilog_i_nets_o_unconnected.out.v"); - compare_files("test_post_verilog_i_unconnected_o_unconnected.out.v", "test_post_verilog_i_unconnected_o_unconnected.golden.v"); + compare_files("test_post_verilog_i_unconnected_o_unconnected.out.v", + "test_post_verilog_i_unconnected_o_unconnected.golden.v"); compare_files("test_post_verilog_i_unconnected_o_nets.out.v", "test_post_verilog_i_unconnected_o_nets.golden.v"); compare_files("test_post_verilog_i_vcc_o_unconnected.out.v", "test_post_verilog_i_vcc_o_unconnected.golden.v"); compare_files("test_post_verilog_i_gnd_o_unconnected.out.v", "test_post_verilog_i_gnd_o_unconnected.golden.v"); diff --git a/vpr/test/test_read_xml_noc_traffic_flows_file.cpp b/vpr/test/test_read_xml_noc_traffic_flows_file.cpp index f16a5d9feff..8b6d01e6ae8 100644 --- a/vpr/test/test_read_xml_noc_traffic_flows_file.cpp +++ b/vpr/test/test_read_xml_noc_traffic_flows_file.cpp @@ -40,19 +40,22 @@ TEST_CASE("test_verify_traffic_flow_router_modules", "[vpr_noc_traffic_flows_par std::string src_router_name = ""; std::string dst_router_name = "test"; - REQUIRE_THROWS_WITH(verify_traffic_flow_router_modules(src_router_name, dst_router_name, test, test_location), "Invalid name for the source NoC router module."); + REQUIRE_THROWS_WITH(verify_traffic_flow_router_modules(src_router_name, dst_router_name, test, test_location), + "Invalid name for the source NoC router module."); } SECTION("Test case where input string for the sink router module name is empty") { std::string src_router_name = "test"; std::string dst_router_name = ""; - REQUIRE_THROWS_WITH(verify_traffic_flow_router_modules(src_router_name, dst_router_name, test, test_location), "Invalid name for the sink NoC router module."); + REQUIRE_THROWS_WITH(verify_traffic_flow_router_modules(src_router_name, dst_router_name, test, test_location), + "Invalid name for the sink NoC router module."); } SECTION("Test case where the router module names for both the source and destination routers are the same") { std::string src_router_name = "same_router"; std::string dst_router_name = "same_router"; - REQUIRE_THROWS_WITH(verify_traffic_flow_router_modules(src_router_name, dst_router_name, test, test_location), "Source and sink NoC routers cannot be the same modules."); + REQUIRE_THROWS_WITH(verify_traffic_flow_router_modules(src_router_name, dst_router_name, test, test_location), + "Source and sink NoC routers cannot be the same modules."); } SECTION("Test case where the source and destination router module names are legeal") { std::string src_router_name = "source_router"; @@ -74,7 +77,10 @@ TEST_CASE("test_verify_traffic_flow_properties", "[vpr_noc_traffic_flows_parser] double test_max_traffic_flow_latency = 0.000000000006; int test_traffic_flow_priority = 19; - REQUIRE_THROWS_WITH(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, test_traffic_flow_priority, test, test_location), "The traffic flow bandwidths are expected to be a non-zero positive floating point or integer values."); + REQUIRE_THROWS_WITH( + verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, + test_traffic_flow_priority, test, test_location), + "The traffic flow bandwidths are expected to be a non-zero positive floating point or integer values."); } SECTION("Test case where the noc traffic flow latency constraint is illegal") { // illegal value @@ -83,7 +89,9 @@ TEST_CASE("test_verify_traffic_flow_properties", "[vpr_noc_traffic_flows_parser] double test_traffic_flow_bandwidth = 1.5; int test_traffic_flow_priority = 2; - REQUIRE_THROWS_WITH(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, test_traffic_flow_priority, test, test_location), "The latency constraints need to be a non-zero positive floating point or integer values."); + REQUIRE_THROWS_WITH(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, + test_traffic_flow_priority, test, test_location), + "The latency constraints need to be a non-zero positive floating point or integer values."); } SECTION("Test case where the noc traffic flow priority is illegal") { // illegal value @@ -92,12 +100,16 @@ TEST_CASE("test_verify_traffic_flow_properties", "[vpr_noc_traffic_flows_parser] double test_max_traffic_flow_latency = 1.5; int test_traffic_flow_bandwidth = 45; - REQUIRE_THROWS_WITH(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, test_traffic_flow_priority, test, test_location), "The traffic flow priorities expected to be positive, non-zero integer values."); + REQUIRE_THROWS_WITH(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, + test_traffic_flow_priority, test, test_location), + "The traffic flow priorities expected to be positive, non-zero integer values."); // now check the case where the traffic flow priority is negative // illegal value test_traffic_flow_priority = -5; - REQUIRE_THROWS_WITH(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, test_traffic_flow_priority, test, test_location), "The traffic flow priorities expected to be positive, non-zero integer values."); + REQUIRE_THROWS_WITH(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, + test_traffic_flow_priority, test, test_location), + "The traffic flow priorities expected to be positive, non-zero integer values."); } SECTION("Test case where the traffic flow parameters are legal") { // legal values @@ -105,7 +117,8 @@ TEST_CASE("test_verify_traffic_flow_properties", "[vpr_noc_traffic_flows_parser] double test_max_traffic_flow_latency = 100; int test_traffic_flow_priority = 100; - REQUIRE_NOTHROW(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, test_traffic_flow_priority, test, test_location)); + REQUIRE_NOTHROW(verify_traffic_flow_properties(test_traffic_flow_bandwidth, test_max_traffic_flow_latency, + test_traffic_flow_priority, test, test_location)); } } TEST_CASE("test_get_router_module_cluster_id", "[vpr_noc_traffic_flows_parser]") { @@ -211,9 +224,12 @@ TEST_CASE("test_get_router_module_cluster_id", "[vpr_noc_traffic_flows_parser]") // now get the cluster id of the block with the test router name using the function we are testing ClusterBlockId test_router_block_id; - REQUIRE_NOTHROW(test_router_block_id = get_router_module_cluster_id(test_router_module_name, cluster_ctx, test, test_location, noc_router_logical_type_clusters)); + REQUIRE_NOTHROW(test_router_block_id + = get_router_module_cluster_id(test_router_module_name, cluster_ctx, test, test_location, + noc_router_logical_type_clusters)); - REQUIRE((size_t)(block_id_from_name.find("router:noc_router_five|flit_out_two[0]~reg0")->second) == (size_t)test_router_block_id); + REQUIRE((size_t)(block_id_from_name.find("router:noc_router_five|flit_out_two[0]~reg0")->second) + == (size_t)test_router_block_id); // clear the global netlist data structure so other unit tests that rely on dont use a corrupted netlist free_clustered_netlist(); @@ -253,7 +269,10 @@ TEST_CASE("test_get_router_module_cluster_id", "[vpr_noc_traffic_flows_parser]") // now get the cluster id of the block with the test router name using the function we are testing // This should fail, so check that it does - REQUIRE_THROWS_WITH(get_router_module_cluster_id(test_router_module_name, cluster_ctx, test, test_location, noc_router_logical_type_clusters), "The router module '^router:noc_router_seven|flit_out_two[0]~reg0$' does not exist in the design."); + REQUIRE_THROWS_WITH( + get_router_module_cluster_id(test_router_module_name, cluster_ctx, test, test_location, + noc_router_logical_type_clusters), + "The router module '^router:noc_router_seven|flit_out_two[0]~reg0$' does not exist in the design."); // clear the global netlist data structure so other unit tests that rely on dont use a corrupted netlist free_clustered_netlist(); @@ -314,7 +333,8 @@ TEST_CASE("test_check_traffic_flow_router_module_type", "[vpr_noc_traffic_flows_ // now run the test function to verify that the current router module has a logical type of a router // the function should not fail since the module is a router - REQUIRE_NOTHROW(check_traffic_flow_router_module_type(router_one, router_module_id, test, test_location, cluster_ctx, noc_router_ref)); + REQUIRE_NOTHROW(check_traffic_flow_router_module_type(router_one, router_module_id, test, test_location, + cluster_ctx, noc_router_ref)); // clear the global netlist data structure so other unit tests that rely on dont use a corrupted netlist free_clustered_netlist(); @@ -328,7 +348,9 @@ TEST_CASE("test_check_traffic_flow_router_module_type", "[vpr_noc_traffic_flows_ // now run the test function to verify that the current IO module doesnt have a logical type of a router // the function should faile since the module is of type IO - REQUIRE_THROWS_WITH(check_traffic_flow_router_module_type(io_block_one, io_module_id, test, test_location, cluster_ctx, noc_router_ref), "The supplied module name 'io_block_one' is not a NoC router."); + REQUIRE_THROWS_WITH(check_traffic_flow_router_module_type(io_block_one, io_module_id, test, test_location, + cluster_ctx, noc_router_ref), + "The supplied module name 'io_block_one' is not a NoC router."); // clear the global netlist data structure so other unit tests that rely on dont use a corrupted netlist free_clustered_netlist(); @@ -404,15 +426,23 @@ TEST_CASE("test_check_that_all_router_blocks_have_an_associated_traffic_flow", " SECTION("Test case when all router blocks in the design have an associated traffic flow") { // create a number of traffic flows that include all router blocks in the design - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_one, router_two, router_block_one_id, router_block_two_id, traffic_flow_bandwidth, traffic_flow_latency, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_one, router_two, router_block_one_id, + router_block_two_id, traffic_flow_bandwidth, + traffic_flow_latency, traffic_flow_priority); - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_two, router_three, router_block_two_id, router_block_three_id, traffic_flow_bandwidth, traffic_flow_latency, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_two, router_three, router_block_two_id, + router_block_three_id, traffic_flow_bandwidth, + traffic_flow_latency, traffic_flow_priority); - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_three, router_one, router_block_three_id, router_block_one_id, traffic_flow_bandwidth, traffic_flow_latency, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_three, router_one, router_block_three_id, + router_block_one_id, traffic_flow_bandwidth, + traffic_flow_latency, traffic_flow_priority); // now check to see whether all router blocks in the design have an associated traffic flow (this is the function tested here) // we expect this to pass - CHECK(check_that_all_router_blocks_have_an_associated_traffic_flow(noc_ctx, noc_router_ref, test_noc_traffic_flows_file_name) == true); + CHECK(check_that_all_router_blocks_have_an_associated_traffic_flow(noc_ctx, noc_router_ref, + test_noc_traffic_flows_file_name) + == true); // clear the global netlist data structure so other unit tests that rely on dont use a corrupted netlist free_clustered_netlist(); @@ -422,13 +452,19 @@ TEST_CASE("test_check_that_all_router_blocks_have_an_associated_traffic_flow", " } SECTION("Test case where some router blocks in the design do not have an associated traffic flow") { // create a number of traffic flows that includes router_one and router_twp but does not include router_three - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_one, router_two, router_block_one_id, router_block_two_id, traffic_flow_bandwidth, traffic_flow_latency, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_one, router_two, router_block_one_id, + router_block_two_id, traffic_flow_bandwidth, + traffic_flow_latency, traffic_flow_priority); - noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_two, router_one, router_block_two_id, router_block_one_id, traffic_flow_bandwidth, traffic_flow_latency, traffic_flow_priority); + noc_ctx.noc_traffic_flows_storage.create_noc_traffic_flow(router_two, router_one, router_block_two_id, + router_block_one_id, traffic_flow_bandwidth, + traffic_flow_latency, traffic_flow_priority); // now check to see whether all router blocks in the design have an associated traffic flow (this is the function tested here) // we expect this fail - CHECK(check_that_all_router_blocks_have_an_associated_traffic_flow(noc_ctx, noc_router_ref, test_noc_traffic_flows_file_name) == false); + CHECK(check_that_all_router_blocks_have_an_associated_traffic_flow(noc_ctx, noc_router_ref, + test_noc_traffic_flows_file_name) + == false); // clear the global netlist data structure so other unit tests that rely on dont use a corrupted netlist free_clustered_netlist(); @@ -505,22 +541,32 @@ TEST_CASE("test_get_cluster_blocks_compatible_with_noc_router_tiles", "[vpr_noc_ char router_four[] = "noc_router_four"; // add the router blocks - golden_set_of_router_cluster_blocks_in_netlist.emplace_back(test_netlist->create_block(router_one, nullptr, router_ref)); - golden_set_of_router_cluster_blocks_in_netlist.emplace_back(test_netlist->create_block(router_two, nullptr, router_ref)); - golden_set_of_router_cluster_blocks_in_netlist.emplace_back(test_netlist->create_block(router_three, nullptr, router_ref_two)); - golden_set_of_router_cluster_blocks_in_netlist.emplace_back(test_netlist->create_block(router_four, nullptr, router_ref_two)); + golden_set_of_router_cluster_blocks_in_netlist.emplace_back( + test_netlist->create_block(router_one, nullptr, router_ref)); + golden_set_of_router_cluster_blocks_in_netlist.emplace_back( + test_netlist->create_block(router_two, nullptr, router_ref)); + golden_set_of_router_cluster_blocks_in_netlist.emplace_back( + test_netlist->create_block(router_three, nullptr, router_ref_two)); + golden_set_of_router_cluster_blocks_in_netlist.emplace_back( + test_netlist->create_block(router_four, nullptr, router_ref_two)); // stores the found cluster blocks in the netlist that are router blocks which are compatible with a NoC router tile // executing the test function here - std::vector found_cluster_blocks_that_are_noc_router_compatible = get_cluster_blocks_compatible_with_noc_router_tiles(cluster_ctx, noc_router_ref); + std::vector found_cluster_blocks_that_are_noc_router_compatible + = get_cluster_blocks_compatible_with_noc_router_tiles(cluster_ctx, noc_router_ref); // check that the correct number of router blocks were found - REQUIRE(golden_set_of_router_cluster_blocks_in_netlist.size() == found_cluster_blocks_that_are_noc_router_compatible.size()); + REQUIRE(golden_set_of_router_cluster_blocks_in_netlist.size() + == found_cluster_blocks_that_are_noc_router_compatible.size()); // now go through the golden set and check that the router blocks in the golden set were correctly found by the test function - for (auto golden_set_router_block_id = golden_set_of_router_cluster_blocks_in_netlist.begin(); golden_set_router_block_id != golden_set_of_router_cluster_blocks_in_netlist.end(); golden_set_router_block_id++) { + for (auto golden_set_router_block_id = golden_set_of_router_cluster_blocks_in_netlist.begin(); + golden_set_router_block_id != golden_set_of_router_cluster_blocks_in_netlist.end(); + golden_set_router_block_id++) { // no check that the current router block in the golden set was also found by the test and recognized as being a router logical block - REQUIRE(std::find(found_cluster_blocks_that_are_noc_router_compatible.begin(), found_cluster_blocks_that_are_noc_router_compatible.end(), *golden_set_router_block_id) != found_cluster_blocks_that_are_noc_router_compatible.end()); + REQUIRE(std::find(found_cluster_blocks_that_are_noc_router_compatible.begin(), + found_cluster_blocks_that_are_noc_router_compatible.end(), *golden_set_router_block_id) + != found_cluster_blocks_that_are_noc_router_compatible.end()); } // clear the global netlist data structure so other unit tests that rely on dont use a corrupted netlist @@ -544,7 +590,8 @@ TEST_CASE("test_get_cluster_blocks_compatible_with_noc_router_tiles", "[vpr_noc_ // stores the found cluster blocks in the netlist that are router blocks which are compatible with a NoC router tile // execute the test function - std::vector found_cluster_blocks_that_are_noc_router_compatible = get_cluster_blocks_compatible_with_noc_router_tiles(cluster_ctx, noc_router_ref); + std::vector found_cluster_blocks_that_are_noc_router_compatible + = get_cluster_blocks_compatible_with_noc_router_tiles(cluster_ctx, noc_router_ref); // since there were no router blocks in this netlist, check that the test found function 0 blocks that were compatible with a noc router tile REQUIRE(found_cluster_blocks_that_are_noc_router_compatible.size() == 0); diff --git a/vpr/test/test_server_convertutils.cpp b/vpr/test/test_server_convertutils.cpp index d3f64b81816..2006170de46 100644 --- a/vpr/test/test_server_convertutils.cpp +++ b/vpr/test/test_server_convertutils.cpp @@ -5,8 +5,7 @@ #include "convertutils.h" -TEST_CASE("test_server_convert_utils_to_int", "[vpr]") -{ +TEST_CASE("test_server_convert_utils_to_int", "[vpr]") { REQUIRE(std::optional{-2} == try_convert_to_int("-2")); REQUIRE(std::optional{0} == try_convert_to_int("0")); REQUIRE(std::optional{2} == try_convert_to_int("2")); @@ -18,4 +17,3 @@ TEST_CASE("test_server_convert_utils_to_int", "[vpr]") } #endif /* NO_SERVER */ - diff --git a/vpr/test/test_server_taskresolver.cpp b/vpr/test/test_server_taskresolver.cpp index eda8d5ae82f..20d34b5524f 100644 --- a/vpr/test/test_server_taskresolver.cpp +++ b/vpr/test/test_server_taskresolver.cpp @@ -29,7 +29,7 @@ TEST_CASE("test_server_taskresolver_cmdSpamFilter", "[vpr]") { REQUIRE(finished.size() == 4); - for (const auto& task: finished) { + for (const auto& task : finished) { REQUIRE(task->is_finished()); REQUIRE(task->has_error()); REQUIRE(task->job_id() != 1); @@ -60,7 +60,7 @@ TEST_CASE("test_server_taskresolver_cmdOverrideFilter", "[vpr]") { REQUIRE(finished.size() == 2); - for (const server::TaskPtr& task: finished) { + for (const server::TaskPtr& task : finished) { REQUIRE(task->is_finished()); REQUIRE(task->has_error()); REQUIRE(task->job_id() != 3); diff --git a/vpr/test/test_server_telegrambuffer.cpp b/vpr/test/test_server_telegrambuffer.cpp index 6c5c793c3d2..54c46bbc4c6 100644 --- a/vpr/test/test_server_telegrambuffer.cpp +++ b/vpr/test/test_server_telegrambuffer.cpp @@ -47,8 +47,7 @@ TEST_CASE("test_server_telegrambuffer_oneOpened", "[vpr]") { REQUIRE(std::string_view{buff.data()} == "111222"); } -TEST_CASE("test_server_telegrambuffer_notFilledTelegramButWithPrependedRubish", "[vpr]") -{ +TEST_CASE("test_server_telegrambuffer_notFilledTelegramButWithPrependedRubish", "[vpr]") { comm::TelegramBuffer tBuff; const comm::ByteArray rubbish{"#@!"}; @@ -65,8 +64,7 @@ TEST_CASE("test_server_telegrambuffer_notFilledTelegramButWithPrependedRubish", REQUIRE(msgHeader.buffer() == tBuff.data()); // the rubbish prefix fragment will be absent here } -TEST_CASE("test_server_telegrambuffer__oneFinishedOneOpened", "[vpr]") -{ +TEST_CASE("test_server_telegrambuffer__oneFinishedOneOpened", "[vpr]") { comm::TelegramBuffer tBuff; const comm::ByteArray msgBody1{"message1"}; @@ -80,7 +78,7 @@ TEST_CASE("test_server_telegrambuffer__oneFinishedOneOpened", "[vpr]") comm::ByteArray t2(msgHeader2.buffer()); t2.append(msgBody2); - t2.resize(t2.size()-2); // drop 2 last elements + t2.resize(t2.size() - 2); // drop 2 last elements tBuff.append(t1); tBuff.append(t2); @@ -94,8 +92,7 @@ TEST_CASE("test_server_telegrambuffer__oneFinishedOneOpened", "[vpr]") REQUIRE(t2 == tBuff.data()); } -TEST_CASE("test_server_telegrambuffer_twoFinished", "[vpr]") -{ +TEST_CASE("test_server_telegrambuffer_twoFinished", "[vpr]") { comm::TelegramBuffer tBuff; const comm::ByteArray msgBody1{"message1"}; @@ -123,8 +120,7 @@ TEST_CASE("test_server_telegrambuffer_twoFinished", "[vpr]") REQUIRE(comm::ByteArray{} == tBuff.data()); } -TEST_CASE("test_server_telegrambuffer_clear", "[vpr]") -{ +TEST_CASE("test_server_telegrambuffer_clear", "[vpr]") { comm::TelegramBuffer tBuff; const comm::ByteArray msgBody1{"message1"}; diff --git a/vpr/test/test_server_telegramoptions.cpp b/vpr/test/test_server_telegramoptions.cpp index d7b3160a0d1..d8eac20be5d 100644 --- a/vpr/test/test_server_telegramoptions.cpp +++ b/vpr/test/test_server_telegramoptions.cpp @@ -6,7 +6,8 @@ #include "telegramoptions.h" TEST_CASE("test_server_telegramoptions", "[vpr]") { - server::TelegramOptions options{"int:path_num:11;string:path_type:debug;int:details_level:3;bool:is_flat_routing:0", {"path_num", "path_type", "details_level", "is_flat_routing"}}; + server::TelegramOptions options{"int:path_num:11;string:path_type:debug;int:details_level:3;bool:is_flat_routing:0", + {"path_num", "path_type", "details_level", "is_flat_routing"}}; REQUIRE(options.errors_str() == ""); @@ -17,7 +18,8 @@ TEST_CASE("test_server_telegramoptions", "[vpr]") { } TEST_CASE("test_server_telegramoptions_get_wrong_keys", "[vpr]") { - server::TelegramOptions options{"int:path_num:11;string:path_type:debug;int:details_level:3;bool:is_flat_routing:0", {"_path_num", "_path_type", "_details_level", "_is_flat_routing"}}; + server::TelegramOptions options{"int:path_num:11;string:path_type:debug;int:details_level:3;bool:is_flat_routing:0", + {"_path_num", "_path_type", "_details_level", "_is_flat_routing"}}; REQUIRE(!options.errors_str().empty()); diff --git a/vpr/test/test_server_telegramparser.cpp b/vpr/test/test_server_telegramparser.cpp index 0d7f0c2276c..ae07de1b54a 100644 --- a/vpr/test/test_server_telegramparser.cpp +++ b/vpr/test/test_server_telegramparser.cpp @@ -5,21 +5,22 @@ #include "catch2/catch_test_macros.hpp" #include "catch2/matchers/catch_matchers_all.hpp" -TEST_CASE("test_server_telegram_parser_base", "[vpr]") -{ - const std::string tdata{R"({"JOB_ID":"7","CMD":"2","OPTIONS":"type1:name1:value1;type2:name2:v a l u e 2;t3:n3:v3","DATA":"some_data...","STATUS":"1"})"}; +TEST_CASE("test_server_telegram_parser_base", "[vpr]") { + const std::string tdata{ + R"({"JOB_ID":"7","CMD":"2","OPTIONS":"type1:name1:value1;type2:name2:v a l u e 2;t3:n3:v3","DATA":"some_data...","STATUS":"1"})"}; REQUIRE(std::optional{7} == comm::TelegramParser::try_extract_field_job_id(tdata)); REQUIRE(std::optional{2} == comm::TelegramParser::try_extract_field_cmd(tdata)); - REQUIRE(std::optional{"type1:name1:value1;type2:name2:v a l u e 2;t3:n3:v3"} == comm::TelegramParser::try_extract_field_options(tdata)); + REQUIRE(std::optional{"type1:name1:value1;type2:name2:v a l u e 2;t3:n3:v3"} + == comm::TelegramParser::try_extract_field_options(tdata)); REQUIRE(std::optional{"some_data..."} == comm::TelegramParser::try_extract_field_data(tdata)); REQUIRE(std::optional{1} == comm::TelegramParser::try_extract_field_status(tdata)); } -TEST_CASE("test_server_telegram_parser_invalid_keys", "[vpr]") -{ - const std::string tBadData{R"({"_JOB_ID":"7","_CMD":"2","_OPTIONS":"type1:name1:value1;type2:name2:v a l u e 2;t3:n3:v3","_DATA":"some_data...","_STATUS":"1"})"}; - +TEST_CASE("test_server_telegram_parser_invalid_keys", "[vpr]") { + const std::string tBadData{ + R"({"_JOB_ID":"7","_CMD":"2","_OPTIONS":"type1:name1:value1;type2:name2:v a l u e 2;t3:n3:v3","_DATA":"some_data...","_STATUS":"1"})"}; + REQUIRE(std::nullopt == comm::TelegramParser::try_extract_field_job_id(tBadData)); REQUIRE(std::nullopt == comm::TelegramParser::try_extract_field_cmd(tBadData)); REQUIRE(std::nullopt == comm::TelegramParser::try_extract_field_options(tBadData)); @@ -27,10 +28,9 @@ TEST_CASE("test_server_telegram_parser_invalid_keys", "[vpr]") REQUIRE(std::nullopt == comm::TelegramParser::try_extract_field_status(tBadData)); } -TEST_CASE("test_server_telegram_parser_invalid_types", "[vpr]") -{ +TEST_CASE("test_server_telegram_parser_invalid_types", "[vpr]") { const std::string tBadData{R"({"JOB_ID":"x","CMD":"y","STATUS":"z"})"}; - + REQUIRE(std::nullopt == comm::TelegramParser::try_extract_field_job_id(tBadData)); REQUIRE(std::nullopt == comm::TelegramParser::try_extract_field_cmd(tBadData)); REQUIRE(std::nullopt == comm::TelegramParser::try_extract_field_status(tBadData)); diff --git a/vpr/test/test_server_zlibutils.cpp b/vpr/test/test_server_zlibutils.cpp index c8978ab999f..4b5ecf76c30 100644 --- a/vpr/test/test_server_zlibutils.cpp +++ b/vpr/test/test_server_zlibutils.cpp @@ -5,8 +5,7 @@ #include "catch2/catch_test_macros.hpp" #include "catch2/matchers/catch_matchers_all.hpp" -TEST_CASE("test_server_zlib_utils", "[vpr]") -{ +TEST_CASE("test_server_zlib_utils", "[vpr]") { const std::string orig{"This string is going to be compressed now"}; std::optional compressedOpt = try_compress(orig); @@ -20,8 +19,3 @@ TEST_CASE("test_server_zlib_utils", "[vpr]") } #endif /* NO_SERVER */ - - - - - diff --git a/vpr/test/test_setup_noc.cpp b/vpr/test/test_setup_noc.cpp index d1c14c211a8..8a3410bb358 100644 --- a/vpr/test/test_setup_noc.cpp +++ b/vpr/test/test_setup_noc.cpp @@ -438,7 +438,9 @@ TEST_CASE("test_create_noc_routers", "[vpr_setup_noc]") { const vtr::vector* noc_routers = nullptr; - SECTION("Test create routers when logical routers match to exactly one physical router. The number of routers is less than whats on the FPGA.") { + SECTION( + "Test create routers when logical routers match to exactly one physical router. The number of routers is less " + "than whats on the FPGA.") { // start by creating all the logical routers // this is similar to the user provided a config file temp_router = new t_router; @@ -480,7 +482,9 @@ TEST_CASE("test_create_noc_routers", "[vpr_setup_noc]") { REQUIRE(test_router.get_router_layer_position() == list_of_routers[router_id - 1].layer_position); } } - SECTION("Test create routers when logical routers match to exactly one physical router. The number of routers is exactly the same as on the FPGA.") { + SECTION( + "Test create routers when logical routers match to exactly one physical router. The number of routers is " + "exactly the same as on the FPGA.") { // start by creating all the logical routers // this is similar to the user provided a config file temp_router = new t_router; @@ -523,7 +527,9 @@ TEST_CASE("test_create_noc_routers", "[vpr_setup_noc]") { REQUIRE(test_router.get_router_layer_position() == list_of_routers[router_id - 1].layer_position); } } - SECTION("Test create routers when a logical router can be matched to two physical routers. The number of routers is exactly the same as on the FPGA.") { + SECTION( + "Test create routers when a logical router can be matched to two physical routers. The number of routers is " + "exactly the same as on the FPGA.") { // start by creating all the logical routers // this is similar to the user provided a config file temp_router = new t_router; @@ -550,9 +556,12 @@ TEST_CASE("test_create_noc_routers", "[vpr_setup_noc]") { // call the router creation REQUIRE_THROWS_WITH(create_noc_routers(noc_info, &noc_model, list_of_routers), - "Router with ID:'9' has the same distance to physical router tiles located at position (4,8) and (8,8). Therefore, no router assignment could be made."); + "Router with ID:'9' has the same distance to physical router tiles located at position " + "(4,8) and (8,8). Therefore, no router assignment could be made."); } - SECTION("Test create routers when a physical router can be matched to two logical routers. The number of routers is exactly the same as on the FPGA.") { + SECTION( + "Test create routers when a physical router can be matched to two logical routers. The number of routers is " + "exactly the same as on the FPGA.") { // start by creating all the logical routers // this is similar to the user provided a config file temp_router = new t_router; @@ -579,7 +588,8 @@ TEST_CASE("test_create_noc_routers", "[vpr_setup_noc]") { // call the router creation REQUIRE_THROWS_WITH(create_noc_routers(noc_info, &noc_model, list_of_routers), - "Routers with IDs:'9' and '5' are both closest to physical router tile located at (4,4) and the physical router could not be assigned multiple times."); + "Routers with IDs:'9' and '5' are both closest to physical router tile located at (4,4) " + "and the physical router could not be assigned multiple times."); } } TEST_CASE("test_create_noc_links", "[vpr_setup_noc]") { @@ -639,11 +649,9 @@ TEST_CASE("test_create_noc_links", "[vpr_setup_noc]") { noc_info.router_list.push_back(*temp_router); // add the router to the NoC - noc_model.add_router(router_id, - list_of_routers[router_id - 1].grid_width_position, + noc_model.add_router(router_id, list_of_routers[router_id - 1].grid_width_position, list_of_routers[router_id - 1].grid_height_position, - list_of_routers[router_id - 1].layer_position, - 1.0); + list_of_routers[router_id - 1].layer_position, 1.0); } delete temp_router; @@ -697,13 +705,15 @@ TEST_CASE("test_create_noc_links", "[vpr_setup_noc]") { router_connection = noc_info.router_list[router_id - 1].connection_list.begin(); - for (auto noc_link = noc_model.get_noc_router_outgoing_links(current_source_router_id).begin(); noc_link != noc_model.get_noc_router_outgoing_links(current_source_router_id).end(); noc_link++) { + for (auto noc_link = noc_model.get_noc_router_outgoing_links(current_source_router_id).begin(); + noc_link != noc_model.get_noc_router_outgoing_links(current_source_router_id).end(); noc_link++) { // get the connecting link const NocLink& connecting_link = noc_model.get_single_noc_link(*noc_link); // get the destination router current_destination_router_id = connecting_link.get_sink_router(); - const NocRouter& current_destination_router = noc_model.get_single_noc_router(current_destination_router_id); + const NocRouter& current_destination_router + = noc_model.get_single_noc_router(current_destination_router_id); REQUIRE((current_destination_router.get_router_user_id()) == (*router_connection)); @@ -815,7 +825,8 @@ TEST_CASE("test_setup_noc", "[vpr_setup_noc]") { noc_info.link_latency = 56.7; noc_info.router_latency = 2.3; - SECTION("Test setup_noc when the number of logical routers is more than the number of physical routers in the FPGA.") { + SECTION( + "Test setup_noc when the number of logical routers is more than the number of physical routers in the FPGA.") { // test device grid name std::string device_grid_name = "test"; @@ -930,7 +941,9 @@ TEST_CASE("test_setup_noc", "[vpr_setup_noc]") { device_ctx.grid = DeviceGrid(device_grid_name, test_grid); - REQUIRE_THROWS_WITH(setup_noc(arch), "The Provided NoC topology information in the architecture file has more number of routers than what is available in the FPGA device."); + REQUIRE_THROWS_WITH(setup_noc(arch), + "The Provided NoC topology information in the architecture file has more number of routers " + "than what is available in the FPGA device."); } SECTION("Test setup_noc when there are no physical NoC routers on the FPGA.") { // test device grid name @@ -981,7 +994,9 @@ TEST_CASE("test_setup_noc", "[vpr_setup_noc]") { device_ctx.grid = DeviceGrid(device_grid_name, test_grid); - REQUIRE_THROWS_WITH(setup_noc(arch), "No physical NoC routers were found on the FPGA device. Either the provided name for the physical router tile was incorrect or the FPGA device has no routers."); + REQUIRE_THROWS_WITH(setup_noc(arch), + "No physical NoC routers were found on the FPGA device. Either the provided name for the " + "physical router tile was incorrect or the FPGA device has no routers."); } SECTION("Test setup_noc when there are overrides for NoC-wide latency and bandwidth values.") { // test device grid name @@ -1201,8 +1216,10 @@ TEST_CASE("test_setup_noc", "[vpr_setup_noc]") { int noc_router_user_id = dist(rand_num_gen); size_t n_connections = noc_info.router_list[noc_router_user_id - 1].connection_list.size(); int selected_connection = dist(rand_num_gen) % n_connections; - int neighbor_router_user_id = noc_info.router_list[noc_router_user_id - 1].connection_list[selected_connection]; - noc_info.link_latency_overrides.insert({{noc_router_user_id, neighbor_router_user_id}, LINK_LATENCY_OVERRIDE}); + int neighbor_router_user_id + = noc_info.router_list[noc_router_user_id - 1].connection_list[selected_connection]; + noc_info.link_latency_overrides.insert( + {{noc_router_user_id, neighbor_router_user_id}, LINK_LATENCY_OVERRIDE}); } // add link bandwidth overrides @@ -1210,8 +1227,10 @@ TEST_CASE("test_setup_noc", "[vpr_setup_noc]") { int noc_router_user_id = dist(rand_num_gen); size_t n_connections = noc_info.router_list[noc_router_user_id - 1].connection_list.size(); int selected_connection = dist(rand_num_gen) % n_connections; - int neighbor_router_user_id = noc_info.router_list[noc_router_user_id - 1].connection_list[selected_connection]; - noc_info.link_bandwidth_overrides.insert({{noc_router_user_id, neighbor_router_user_id}, LINK_BANDWIDTH_OVERRIDE}); + int neighbor_router_user_id + = noc_info.router_list[noc_router_user_id - 1].connection_list[selected_connection]; + noc_info.link_bandwidth_overrides.insert( + {{noc_router_user_id, neighbor_router_user_id}, LINK_BANDWIDTH_OVERRIDE}); } device_ctx.grid = DeviceGrid(device_grid_name, test_grid); @@ -1224,7 +1243,8 @@ TEST_CASE("test_setup_noc", "[vpr_setup_noc]") { for (const auto& noc_router : noc_model.get_noc_routers()) { int router_user_id = noc_router.get_router_user_id(); auto it = noc_info.router_latency_overrides.find(router_user_id); - double expected_latency = (it != noc_info.router_latency_overrides.end()) ? it->second : noc_info.router_latency; + double expected_latency + = (it != noc_info.router_latency_overrides.end()) ? it->second : noc_info.router_latency; REQUIRE(expected_latency == noc_router.get_latency()); } @@ -1236,11 +1256,13 @@ TEST_CASE("test_setup_noc", "[vpr_setup_noc]") { int dst_user_id = noc_model.convert_router_id(dst_router_id); auto lat_it = noc_info.link_latency_overrides.find({src_user_id, dst_user_id}); - double expected_latency = (lat_it != noc_info.link_latency_overrides.end()) ? lat_it->second : noc_info.link_latency; + double expected_latency + = (lat_it != noc_info.link_latency_overrides.end()) ? lat_it->second : noc_info.link_latency; REQUIRE(expected_latency == noc_link.get_latency()); auto bw_it = noc_info.link_bandwidth_overrides.find({src_user_id, dst_user_id}); - double expected_bandwidth = (bw_it != noc_info.link_bandwidth_overrides.end()) ? bw_it->second : noc_info.link_bandwidth; + double expected_bandwidth + = (bw_it != noc_info.link_bandwidth_overrides.end()) ? bw_it->second : noc_info.link_bandwidth; REQUIRE(expected_bandwidth == noc_link.get_bandwidth()); } diff --git a/vpr/test/test_vpr.cpp b/vpr/test/test_vpr.cpp index 0e92311b5c2..3f68bc02cb6 100644 --- a/vpr/test/test_vpr.cpp +++ b/vpr/test/test_vpr.cpp @@ -22,8 +22,7 @@ TEST_CASE("read_arch_metadata", "[vpr]") { std::vector physical_tile_types; std::vector logical_block_types; - XmlReadArch(kArchFile, /*timing_enabled=*/false, - &arch, physical_tile_types, logical_block_types); + XmlReadArch(kArchFile, /*timing_enabled=*/false, &arch, physical_tile_types, logical_block_types); auto type_str = arch.strings.intern_string(vtr::string_view("type")); auto pb_type_type = arch.strings.intern_string(vtr::string_view("pb_type_type")); @@ -123,14 +122,8 @@ TEST_CASE("read_rr_graph_metadata", "[vpr]") { t_vpr_setup vpr_setup; t_arch arch; t_options options; - const char* argv[] = { - "test_vpr", - kArchFile, - "wire.eblif", - "--route_chan_width", - "100"}; - vpr_init(sizeof(argv) / sizeof(argv[0]), argv, - &options, &vpr_setup, &arch); + const char* argv[] = {"test_vpr", kArchFile, "wire.eblif", "--route_chan_width", "100"}; + vpr_init(sizeof(argv) / sizeof(argv[0]), argv, &options, &vpr_setup, &arch); vpr_setup.RouterOpts.read_rr_edge_metadata = true; vpr_create_device(vpr_setup, arch, false); @@ -142,7 +135,8 @@ TEST_CASE("read_rr_graph_metadata", "[vpr]") { const char* echo_file_name = getEchoFileName(E_ECHO_RR_GRAPH_INDEXED_DATA); for (const RRNodeId& inode : device_ctx.rr_graph.nodes()) { - if ((rr_graph.node_type(inode) == CHANX || rr_graph.node_type(inode) == CHANY) && rr_graph.num_edges(inode) > 0) { + if ((rr_graph.node_type(inode) == CHANX || rr_graph.node_type(inode) == CHANY) + && rr_graph.num_edges(inode) > 0) { src_inode = size_t(inode); break; } @@ -152,22 +146,15 @@ TEST_CASE("read_rr_graph_metadata", "[vpr]") { sink_inode = size_t(rr_graph.edge_sink_node(RRNodeId(src_inode), 0)); switch_id = rr_graph.edge_switch(RRNodeId(src_inode), 0); - vpr::add_rr_node_metadata(rr_graph_builder.rr_node_metadata(), src_inode, vtr::string_view("node"), vtr::string_view("test node"), device_ctx.arch); - vpr::add_rr_edge_metadata(rr_graph_builder.rr_edge_metadata(), src_inode, sink_inode, switch_id, vtr::string_view("edge"), vtr::string_view("test edge"), device_ctx.arch); - - write_rr_graph(&mutable_device_ctx.rr_graph_builder, - &mutable_device_ctx.rr_graph, - device_ctx.physical_tile_types, - &mutable_device_ctx.rr_indexed_data, - &mutable_device_ctx.rr_rc_data, - device_ctx.grid, - device_ctx.arch_switch_inf, - device_ctx.arch, - &mutable_device_ctx.chan_width, - kRrGraphFile, - echo_enabled, - echo_file_name, - false); + vpr::add_rr_node_metadata(rr_graph_builder.rr_node_metadata(), src_inode, vtr::string_view("node"), + vtr::string_view("test node"), device_ctx.arch); + vpr::add_rr_edge_metadata(rr_graph_builder.rr_edge_metadata(), src_inode, sink_inode, switch_id, + vtr::string_view("edge"), vtr::string_view("test edge"), device_ctx.arch); + + write_rr_graph(&mutable_device_ctx.rr_graph_builder, &mutable_device_ctx.rr_graph, + device_ctx.physical_tile_types, &mutable_device_ctx.rr_indexed_data, + &mutable_device_ctx.rr_rc_data, device_ctx.grid, device_ctx.arch_switch_inf, device_ctx.arch, + &mutable_device_ctx.chan_width, kRrGraphFile, echo_enabled, echo_file_name, false); vpr_free_all(arch, vpr_setup); } @@ -192,8 +179,7 @@ TEST_CASE("read_rr_graph_metadata", "[vpr]") { kRrGraphFile, }; - vpr_init(sizeof(argv) / sizeof(argv[0]), argv, - &options, &vpr_setup, &arch); + vpr_init(sizeof(argv) / sizeof(argv[0]), argv, &options, &vpr_setup, &arch); vpr_setup.RouterOpts.read_rr_edge_metadata = true; vpr_create_device(vpr_setup, arch, false); diff --git a/vpr/test/test_vpr_constraints.cpp b/vpr/test/test_vpr_constraints.cpp index d0b95e081e6..dc9b1e23f08 100644 --- a/vpr/test/test_vpr_constraints.cpp +++ b/vpr/test/test_vpr_constraints.cpp @@ -14,18 +14,17 @@ * UserPlaceConstraints, Region, PartitionRegions, and Partition. */ -namespace Catch -{ -template -struct StringMaker> -{ - static std::string convert(vtr::Rect const &value) { +namespace Catch { +template +struct StringMaker> { + static std::string convert(vtr::Rect const& value) { std::ostringstream oss; - oss << "Rectangle: (" << value.xmin() << ", " << value.ymin() << ") to (" << value.xmax() << ", " << value.ymax() << ")"; + oss << "Rectangle: (" << value.xmin() << ", " << value.ymin() << ") to (" << value.xmax() << ", " + << value.ymax() << ")"; return oss.str(); } }; -} +} // namespace Catch //Test Region class accessors and mutators TEST_CASE("Region", "[vpr]") { @@ -42,7 +41,6 @@ TEST_CASE("Region", "[vpr]") { REQUIRE(r1.get_layer_range() == std::make_pair(10, 11)); REQUIRE(r1.get_sub_tile() == 12); - //checking that default constructor creates an empty rectangle (999, 999,-1,-1) Region def_region; bool is_def_empty = def_region.empty(); @@ -73,7 +71,6 @@ TEST_CASE("PartitionRegion", "[vpr]") { REQUIRE(pr_regions[0].get_sub_tile() == 3); REQUIRE(pr_regions[1].get_sub_tile() == 2); - REQUIRE(pr_regions[0].get_rect() == vtr::Rect(2, 3, 6, 7)); REQUIRE(pr_regions[0].get_layer_range() == std::make_pair(0, 0)); @@ -97,7 +94,6 @@ TEST_CASE("Partition", "[vpr]") { r2 = Region(10, 10, 25, 30, 1, 2); r2.set_sub_tile(0); - PartitionRegion part_reg; part_reg.add_to_part_region(r1); part_reg.add_to_part_region(r2); @@ -200,7 +196,6 @@ TEST_CASE("RegionIntersect", "[vpr]") { REQUIRE(int_reg_2_ml.get_rect() == vtr::Rect(6, 3, 8, 6)); REQUIRE(int_reg_2_ml.get_layer_range() == std::make_pair(0, 2)); - //Test no intersection (rectangles don't overlap, intersect region will be returned empty) const Region int_reg_3 = intersection(region1, region3); REQUIRE(int_reg_3.empty() == TRUE); @@ -209,7 +204,6 @@ TEST_CASE("RegionIntersect", "[vpr]") { const Region int_reg_3_ml = intersection(region1, region2_ml); REQUIRE(int_reg_3_ml.empty() == TRUE); - //Test no intersection (rectangles overlap but different subtiles are specified, intersect region will be returned empty) region1.set_sub_tile(5); region2.set_sub_tile(3); @@ -253,7 +247,6 @@ TEST_CASE("PartRegionIntersect", "[vpr]") { pr1.add_to_part_region(r2); pr2.add_to_part_region(r3); - PartitionRegion int_pr = intersection(pr1, pr2); const std::vector& regions = int_pr.get_regions(); @@ -279,7 +272,6 @@ TEST_CASE("PartRegionIntersectMultiLayer", "[vpr]") { pr1.add_to_part_region(r2); pr2.add_to_part_region(r3); - PartitionRegion int_pr = intersection(pr1, pr2); const std::vector& regions = int_pr.get_regions(); @@ -310,7 +302,7 @@ TEST_CASE("PartRegionIntersect2", "[vpr]") { const std::vector& regions = int_pr.get_regions(); REQUIRE(regions.size() == 1); - REQUIRE(regions[0].get_rect() == vtr::Rect (0, 0, 2, 2)); + REQUIRE(regions[0].get_rect() == vtr::Rect(0, 0, 2, 2)); REQUIRE(regions[0].get_layer_range() == std::make_pair(0, 0)); } @@ -334,7 +326,7 @@ TEST_CASE("PartRegionIntersect2Multilayer", "[vpr]") { const std::vector& regions = int_pr.get_regions(); REQUIRE(regions.size() == 1); - REQUIRE(regions[0].get_rect() == vtr::Rect (0, 0, 2, 2)); + REQUIRE(regions[0].get_rect() == vtr::Rect(0, 0, 2, 2)); REQUIRE(regions[0].get_layer_range() == std::make_pair(1, 1)); } @@ -424,13 +416,12 @@ TEST_CASE("PartRegionIntersect4", "[vpr]") { pr2.add_to_part_region(r3); pr2.add_to_part_region(r4); - PartitionRegion int_pr = intersection(pr1, pr2); const std::vector& regions = int_pr.get_regions(); REQUIRE(regions.size() == 1); REQUIRE(regions[0].get_layer_range() == std::make_pair(0, 0)); - REQUIRE(regions[0].get_rect() == vtr::Rect (1, 2, 3, 4)); + REQUIRE(regions[0].get_rect() == vtr::Rect(1, 2, 3, 4)); REQUIRE(regions[0].get_sub_tile() == 2); } @@ -458,13 +449,12 @@ TEST_CASE("PartRegionIntersect4MultiLayer", "[vpr]") { pr2.add_to_part_region(r3); pr2.add_to_part_region(r4); - PartitionRegion int_pr = intersection(pr1, pr2); const std::vector& regions = int_pr.get_regions(); REQUIRE(regions.size() == 1); REQUIRE(regions[0].get_layer_range() == std::make_pair(1, 1)); - REQUIRE(regions[0].get_rect() == vtr::Rect (1, 2, 3, 4)); + REQUIRE(regions[0].get_rect() == vtr::Rect(1, 2, 3, 4)); REQUIRE(regions[0].get_sub_tile() == 2); } diff --git a/vpr/test/test_xy_routing.cpp b/vpr/test/test_xy_routing.cpp index 8b79960c4c8..7da7f24bcaf 100644 --- a/vpr/test/test_xy_routing.cpp +++ b/vpr/test/test_xy_routing.cpp @@ -14,7 +14,9 @@ constexpr double DUMMY_BANDWIDTH = 1e12; * verifies whether the two routers are the exact same or not. * */ -void compare_routes(const std::vector& golden_path, const std::vector& found_path, const NocStorage& noc_model) { +void compare_routes(const std::vector& golden_path, + const std::vector& found_path, + const NocStorage& noc_model) { // make sure that size of the found route and golden route match REQUIRE(found_path.size() == golden_path.size()); @@ -67,19 +69,23 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { for (int j = 0; j < 4; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 1), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 1), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the top of the router if there exists another router there if ((i + 1) <= 3) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 4), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 4), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the right of the router if there exists another router there if ((j + 1) <= 3) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 1), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 1), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 4), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 4), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } } } @@ -99,12 +105,15 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { std::vector found_path; // make sure that a legal route was found (no error should be thrown) - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // now make sure that the found route is empty, we shouldn't be moving anywhere as the start and end routers are the same REQUIRE(found_path.empty() == true); } - SECTION("Test case where the destination router and the starting routers are located on the same row within the FPGA device.") { + SECTION( + "Test case where the destination router and the starting routers are located on the same row within the FPGA " + "device.") { // choose start router as 7, and choose the destination router as 4 auto start_router_id = NocRouterId(7); auto sink_router_id = NocRouterId(4); @@ -115,7 +124,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { std::vector golden_path; for (int current_router = 7; current_router != 4; current_router--) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router - 1)); + NocLinkId link_id + = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router - 1)); const auto& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } @@ -124,12 +134,15 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { std::vector found_path; // now run the algorithm to find a route, once again we expect no errors and a legal path to be found - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // make sure that size of the found route and golden route match compare_routes(golden_path, found_path, noc_model); } - SECTION("Test case where the destination router and the starting routers are located on the same column within the FPGA device.") { + SECTION( + "Test case where the destination router and the starting routers are located on the same column within the " + "FPGA device.") { // choose start router as 2, and choose the destination router as 14 auto start_router_id = NocRouterId(2); auto sink_router_id = NocRouterId(14); @@ -140,7 +153,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { std::vector golden_path; for (int current_row = 0; current_row < 3; current_row++) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 4 + 2), NocRouterId((current_row + 1) * 4 + 2)); + NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 4 + 2), + NocRouterId((current_row + 1) * 4 + 2)); const auto& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } @@ -149,12 +163,15 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { std::vector found_path; // now run the algorithm to find a route, once again we expect no errors and a legal path to be found - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // make sure that size of the found route and golden route match compare_routes(golden_path, found_path, noc_model); } - SECTION("Test case where the destination router and the starting routers are located on different columns and rows within the FPGA device. In this test the path moves left and then up.") { + SECTION( + "Test case where the destination router and the starting routers are located on different columns and rows " + "within the FPGA device. In this test the path moves left and then up.") { // choose start router as 3, and choose the destination router as 14 auto start_router_id = NocRouterId(3); auto sink_router_id = NocRouterId(12); @@ -166,14 +183,16 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { // generate the horizontal path first for (int current_router = 3; current_router != 0; current_router--) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router - 1)); + NocLinkId link_id + = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router - 1)); const auto& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } // generate the vertical path next for (int current_row = 0; current_row < 3; current_row++) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 4), NocRouterId((current_row + 1) * 4)); + NocLinkId link_id + = noc_model.get_single_noc_link_id(NocRouterId(current_row * 4), NocRouterId((current_row + 1) * 4)); const auto& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } @@ -182,12 +201,15 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { std::vector found_path; // now run the algorithm to find a route, once again we expect no errors and a legal path to be found - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // make sure that size of the found route and golden route match compare_routes(golden_path, found_path, noc_model); } - SECTION("Test case where the destination router and the starting routers are located on different columns and rows within the FPGA device. In this test the path moves right and then down.") { + SECTION( + "Test case where the destination router and the starting routers are located on different columns and rows " + "within the FPGA device. In this test the path moves right and then down.") { // The main reason for this test is to verify that the XY routing algorithm correctly traverses in the directions going right and down. // These directions had not been tested yet. @@ -202,14 +224,16 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { // generate the horizontal path first for (int current_router = 12; current_router != 15; current_router++) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router + 1)); + NocLinkId link_id + = noc_model.get_single_noc_link_id(NocRouterId(current_router), NocRouterId(current_router + 1)); const auto& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } // generate the vertical path next for (int current_row = 3; current_row > 0; current_row--) { - NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 4 + 3), NocRouterId((current_row - 1) * 4 + 3)); + NocLinkId link_id = noc_model.get_single_noc_link_id(NocRouterId(current_row * 4 + 3), + NocRouterId((current_row - 1) * 4 + 3)); const auto& link = noc_model.get_single_noc_link(link_id); golden_path.push_back(link); } @@ -218,7 +242,8 @@ TEST_CASE("test_route_flow", "[vpr_noc_xy_routing]") { std::vector found_path; // now run the algorithm to find a route, once again we expect no errors and a legal path to be found - REQUIRE_NOTHROW(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); + REQUIRE_NOTHROW( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model)); // make sure that size of the found route and golden route match compare_routes(golden_path, found_path, noc_model); @@ -259,19 +284,23 @@ TEST_CASE("test_route_flow when it fails in a mesh topology.", "[vpr_noc_xy_rout for (int j = 0; j < 4; j++) { // add a link to the left of the router if there exists another router there if ((j - 1) >= 0) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 1), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 1), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the top of the router if there exists another router there if ((i + 1) <= 3) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 4), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 4), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the right of the router if there exists another router there if ((j + 1) <= 3) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 1), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) + 1), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } // add a link to the bottom of the router if there exists another router there if ((i - 1) >= 0) { - noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 4), DUMMY_BANDWIDTH, DUMMY_LATENCY); + noc_model.add_link((NocRouterId)((i * 4) + j), (NocRouterId)(((i * 4) + j) - 4), DUMMY_BANDWIDTH, + DUMMY_LATENCY); } } } @@ -304,8 +333,10 @@ TEST_CASE("test_route_flow when it fails in a mesh topology.", "[vpr_noc_xy_rout std::vector found_path; // now use the XY router to find a route, we expect it to fail - REQUIRE_THROWS_WITH(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model), - "No route could be found from starting router with ID:'3' and the destination router with ID:'0' using the XY-Routing algorithm."); + REQUIRE_THROWS_WITH( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model), + "No route could be found from starting router with ID:'3' and the destination router with ID:'0' using the " + "XY-Routing algorithm."); } SECTION("Test case where the xy routing algorithm fails to find a vertical link to traverse.") { /* @@ -330,8 +361,10 @@ TEST_CASE("test_route_flow when it fails in a mesh topology.", "[vpr_noc_xy_rout std::vector found_path; // now use the XY router to find a route, we expect it to fail - REQUIRE_THROWS_WITH(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model), - "No route could be found from starting router with ID:'3' and the destination router with ID:'15' using the XY-Routing algorithm."); + REQUIRE_THROWS_WITH( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model), + "No route could be found from starting router with ID:'3' and the destination router with ID:'15' using " + "the XY-Routing algorithm."); } } TEST_CASE("test_route_flow when it fails in a non mesh topology.", "[vpr_noc_xy_routing]") { @@ -386,7 +419,9 @@ TEST_CASE("test_route_flow when it fails in a non mesh topology.", "[vpr_noc_xy_ std::vector found_path; // now use the XY router to find a route. We expect this to fail to check that. - REQUIRE_THROWS_WITH(routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model), - "No route could be found from starting router with ID:'3' and the destination router with ID:'1' using the XY-Routing algorithm."); + REQUIRE_THROWS_WITH( + routing_algorithm.route_flow(start_router_id, sink_router_id, traffic_flow_id, found_path, noc_model), + "No route could be found from starting router with ID:'3' and the destination router with ID:'1' using the " + "XY-Routing algorithm."); } } // namespace \ No newline at end of file diff --git a/vtr_flow/scripts/download_noc_mlp.py b/vtr_flow/scripts/download_noc_mlp.py index c483da753df..c541c91c021 100755 --- a/vtr_flow/scripts/download_noc_mlp.py +++ b/vtr_flow/scripts/download_noc_mlp.py @@ -17,6 +17,7 @@ import shutil import errno + class ExtractionError(Exception): """ Raised when extracting the downlaoded file fails @@ -39,8 +40,9 @@ def parse_args(): does nothing (unless --force is specified). """ ) - parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter, - description=description) + parser = argparse.ArgumentParser( + formatter_class=argparse.ArgumentDefaultsHelpFormatter, description=description + ) parser.add_argument( "--vtr_flow_dir", @@ -132,7 +134,7 @@ def extract_to_vtr_flow_dir(args, tar_gz_filename): raise ExtractionError("{} should be a directory".format(directory)) # Create a temporary working directory - tmpdir = tempfile.mkdtemp(suffix="download_NoC_MLP", dir= os.path.abspath(".")) + tmpdir = tempfile.mkdtemp(suffix="download_NoC_MLP", dir=os.path.abspath(".")) try: # Extract the contents of the .tar.gz archive directly into the destination directory with tarfile.open(tar_gz_filename, "r:gz") as tar: diff --git a/vtr_flow/scripts/download_titan.py b/vtr_flow/scripts/download_titan.py index cf025dc38ab..483ba5c04d0 100755 --- a/vtr_flow/scripts/download_titan.py +++ b/vtr_flow/scripts/download_titan.py @@ -41,8 +41,9 @@ def parse_args(): does nothing (unless --force is specified). """ ) - parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter, - description=description) + parser = argparse.ArgumentParser( + formatter_class=argparse.ArgumentDefaultsHelpFormatter, description=description + ) parser.add_argument( "--titan_version", default="2.0.0", help="Titan release version to download" diff --git a/vtr_flow/scripts/python_libs/vtr/log_parse.py b/vtr_flow/scripts/python_libs/vtr/log_parse.py index 623c4545e22..74a1de7fe9d 100644 --- a/vtr_flow/scripts/python_libs/vtr/log_parse.py +++ b/vtr_flow/scripts/python_libs/vtr/log_parse.py @@ -25,7 +25,7 @@ def __init__(self, name, filename, regex_str, default_value=None): self._filename = filename # Look for the specified pattern somewhere in the line, but any characters # can occur before and after it. Detailed in GitHub Issue #2743. - self._regex = re.compile(f'^.*{regex_str}.*$') + self._regex = re.compile(f"^.*{regex_str}.*$") self._default_value = default_value def name(self): diff --git a/vtr_flow/scripts/python_libs/vtr/task.py b/vtr_flow/scripts/python_libs/vtr/task.py index fd6fd7640c4..e1e9650740b 100644 --- a/vtr_flow/scripts/python_libs/vtr/task.py +++ b/vtr_flow/scripts/python_libs/vtr/task.py @@ -55,7 +55,7 @@ def __init__( pad_file=None, additional_files=None, additional_files_list_add=None, - circuit_constraint_list_add=None + circuit_constraint_list_add=None, ): self.task_name = task_name self.config_dir = config_dir @@ -82,9 +82,9 @@ def __init__( self.pad_file = pad_file self.additional_files = additional_files self.additional_files_list_add = additional_files_list_add - self.circuit_constraints = parse_circuit_constraint_list(circuit_constraint_list_add, - self.circuits, - self.archs) + self.circuit_constraints = parse_circuit_constraint_list( + circuit_constraint_list_add, self.circuits, self.archs + ) # pylint: enable=too-few-public-methods @@ -306,9 +306,8 @@ def check_include_fields(config_file, key_values): ) ) -def parse_circuit_constraint_list( - circuit_constraint_list, circuits_list, arch_list -) -> dict: + +def parse_circuit_constraint_list(circuit_constraint_list, circuits_list, arch_list) -> dict: """ Parse the circuit constraints passed in via the config file. Circuit constraints are expected to have the following syntax: @@ -342,38 +341,39 @@ def parse_circuit_constraint_list( # Parse the circuit constraint list for circuit_constraint in circuit_constraint_list: # Remove the round brackets. - if circuit_constraint[0] != '(' or circuit_constraint[-1] != ')': - raise VtrError(f"Circuit constraint syntax error: \"{circuit_constraint}\"") + if circuit_constraint[0] != "(" or circuit_constraint[-1] != ")": + raise VtrError(f'Circuit constraint syntax error: "{circuit_constraint}"') circuit_constraint = circuit_constraint[1:-1] # Split the circuit and the constraint - split_constraint_line = circuit_constraint.split(',') + split_constraint_line = circuit_constraint.split(",") if len(split_constraint_line) != 2: - raise VtrError(f"Circuit constraint has too many arguments: \"{circuit_constraint}\"") + raise VtrError(f'Circuit constraint has too many arguments: "{circuit_constraint}"') circuit = split_constraint_line[0].strip() constraint = split_constraint_line[1].strip() # Check that the circuit actually exists. if circuit not in circuits_list: - raise VtrError(f"Cannot constrain circuit \"{circuit}\", circuit has not been added") + raise VtrError(f'Cannot constrain circuit "{circuit}", circuit has not been added') # Parse the constraint split_constraint = constraint.split("=") if len(split_constraint) != 2: - raise VtrError(f"Circuit constraint syntax error: \"{circuit_constraint}\"") + raise VtrError(f'Circuit constraint syntax error: "{circuit_constraint}"') constr_key = split_constraint[0].strip() constr_val = split_constraint[1].strip() # Check that the constr_key is valid. if constr_key not in circuit_constraint_keys: - raise VtrError(f"Invalid constraint \"{constr_key}\" used on circuit \"{circuit}\"") + raise VtrError(f'Invalid constraint "{constr_key}" used on circuit "{circuit}"') # In the case of arch constraints, make sure this arch exists. if constr_key == "arch" and constr_val not in arch_list: - raise VtrError(f"Cannot constrain arch \"{constr_key}\", arch has not been added") + raise VtrError(f'Cannot constrain arch "{constr_key}", arch has not been added') # Make sure this circuit is not already constrained with this constr_arg if res_circuit_constraints[circuit][constr_key] is not None: - raise VtrError(f"Circuit \"{circuit}\" cannot be constrained more than once") + raise VtrError(f'Circuit "{circuit}" cannot be constrained more than once') # Add the constraint for this circuit res_circuit_constraints[circuit][constr_key] = constr_val return res_circuit_constraints + def shorten_task_names(configs, common_task_prefix): """ Shorten the task names of the configs by remove the common task prefix. @@ -582,10 +582,7 @@ def create_jobs(args, configs, after_run=False) -> List[Job]: work_dir = get_work_dir_addr(arch, circuit, noc_traffic) run_dir = ( - str( - Path(get_latest_run_dir(find_task_dir(config, args.alt_tasks_dir))) - / work_dir - ) + str(Path(get_latest_run_dir(find_task_dir(config, args.alt_tasks_dir))) / work_dir) if after_run else str( Path(get_next_run_dir(find_task_dir(config, args.alt_tasks_dir))) / work_dir @@ -779,6 +776,7 @@ def ret_expected_vpr_status(arch, circuit, golden_results, script_params=None): return golden_metrics["vpr_status"] + def apply_cmd_line_circuit_constraints(cmd, circuit, config): """ Apply the circuit constraints to the command line. If the circuit is not @@ -793,6 +791,7 @@ def apply_cmd_line_circuit_constraints(cmd, circuit, config): if circuit_vpr_constraints is not None: cmd += ["--read_vpr_constraints", circuit_vpr_constraints] + def resolve_vtr_source_file(config, filename, base_dir=""): """ Resolves an filename with a base_dir diff --git a/vtr_flow/scripts/python_libs/vtr/util.py b/vtr_flow/scripts/python_libs/vtr/util.py index 61b52ee991b..7d1c7dbab11 100644 --- a/vtr_flow/scripts/python_libs/vtr/util.py +++ b/vtr_flow/scripts/python_libs/vtr/util.py @@ -154,7 +154,7 @@ def run_system_command( # or RR graph files to VPR. PWD environment variable is updated # manually to prevent capnproto from throwing exceptions. modified_environ = os.environ.copy() - modified_environ['PWD'] = str(temp_dir) + modified_environ["PWD"] = str(temp_dir) proc = subprocess.Popen( cmd, @@ -162,7 +162,7 @@ def run_system_command( stderr=stderr, # stderr redirected to stderr universal_newlines=True, # Lines always end in \n cwd=str(temp_dir), # Where to run the command - env=modified_environ + env=modified_environ, ) # Read the output line-by-line and log it diff --git a/vtr_flow/scripts/tuning_runs/control_runs.py b/vtr_flow/scripts/tuning_runs/control_runs.py index 825b3b7609c..c38e2cd7292 100755 --- a/vtr_flow/scripts/tuning_runs/control_runs.py +++ b/vtr_flow/scripts/tuning_runs/control_runs.py @@ -46,9 +46,7 @@ def parse_results(input_path): Parse the output results """ # Find the runXXX directory with the largest XXX - run_dirs = [ - d for d in os.listdir(input_path) if d.startswith("run") and d[3:].isdigit() - ] + run_dirs = [d for d in os.listdir(input_path) if d.startswith("run") and d[3:].isdigit()] if not run_dirs: print("No runXXX directories found in the specified input path.") sys.exit(1) @@ -63,9 +61,9 @@ def parse_results(input_path): sys.exit(1) # Read the parse_results.txt file and write to full_res.csv - with open( - os.path.join(largest_run_path, "parse_results.txt"), "r" - ) as txt_file, open(full_res_csv_path, "w", newline="") as csv_file: + with open(os.path.join(largest_run_path, "parse_results.txt"), "r") as txt_file, open( + full_res_csv_path, "w", newline="" + ) as csv_file: reader = csv.reader(txt_file, delimiter="\t") writer = csv.writer(csv_file) @@ -97,9 +95,7 @@ def parse_results(input_path): print("Generated average seed results") # Generate gmean_res.csv - generate_geomean_res_csv( - os.path.join(largest_run_path, "avg_seed.csv"), largest_run_path - ) + generate_geomean_res_csv(os.path.join(largest_run_path, "avg_seed.csv"), largest_run_path) print("Generated geometric average results over all the circuits") generate_xlsx(largest_run_path) @@ -147,8 +143,7 @@ def parse_script_params(script_params): j = i + key_length while j < len(parts) and not any( - parts[j : j + len(k.split("_"))] == k.split("_") - for k in PARAMS_DICT + parts[j : j + len(k.split("_"))] == k.split("_") for k in PARAMS_DICT ): value_parts.append(parts[j]) j += 1