diff --git a/doc/src/vtr/benchmarks.rst b/doc/src/vtr/benchmarks.rst
index bdd9062b919..e011657eed2 100644
--- a/doc/src/vtr/benchmarks.rst
+++ b/doc/src/vtr/benchmarks.rst
@@ -102,7 +102,7 @@ These designs use many precisions including binary, different fixed point types
     proxy               Proxy/synthetic benchmarks
     =================   ======================================
 
-The VTR benchmarks are provided as Verilog (enabling full flexibility to modify and change how the designs are implemented) under: ::
+The Koios benchmarks are provided as Verilog (enabling full flexibility to modify and change how the designs are implemented) under: ::
 
     $VTR_ROOT/vtr_flow/benchmarks/verilog/koios
 
@@ -207,4 +207,4 @@ real application domains. On the other hand, MLP benchmarks include modules that
 and move data. Pre-synthesized netlists for the synthetic benchmarks are added to VTR project, but MLP netlists should
 be downloaded separately.
 
-.. note:: The NoC MLP benchmarks are not included with the VTR release (due to their size). However they can be downloaded and extracted by running ``make get_noc_mlp_benchmarks`` from the root of the VTR tree.  They can also be `downloaded manually <https://www.eecg.utoronto.ca/~vaughn/titan/>`_.
\ No newline at end of file
+.. note:: The NoC MLP benchmarks are not included with the VTR release (due to their size). However they can be downloaded and extracted by running ``make get_noc_mlp_benchmarks`` from the root of the VTR tree.  They can also be `downloaded manually <https://www.eecg.utoronto.ca/~vaughn/titan/>`_.