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VPR cannot compute delay and power without place and route first #73

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kmurray opened this issue Jun 26, 2015 · 2 comments
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VPR cannot compute delay and power without place and route first #73

kmurray opened this issue Jun 26, 2015 · 2 comments
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enhancement Feature enhancement

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@kmurray
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kmurray commented Jun 26, 2015

Originally reported on Google Code with ID 80

Its more like a feature than a bug. I am experimenting with voltage scaling and trying
to find the corresponding delay and power of the same circuit at different voltages.
I can supply modified architecture files and tech files corresponding to different
voltages (for the same blif file input). But the VPR tool must place and route each
time.

Since the place and route for different voltages is different (and essentially the
whole circuit looks different) the delay and power are different. For example, I can
see that energy at a lower voltage is higher than the energy at higher voltage. This
is clearly undesired effect.

Is there a way I can specify a placement and routing (through files) to the tool? This
way I will place and route the circuit once and compute new delay and power without
placing and routing it again and again. This will ensure a correct trend as voltage
is scaled down.

Thanks
-Niranjan

Reported by nirankul2003 on 2014-04-10 18:45:00

@kmurray
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kmurray commented Jun 26, 2015

Such a feature is certainly useful even in traditional CAD.  It is in our future work
pipeline but we currently have nobody on it yet.

As a compromise, you can currently reuse the same placement by running routing only.
 That way, there will be much less variation in your runs.

Reported by JasonKaiLuu on 2014-04-10 19:09:28

@kmurray kmurray self-assigned this Jun 26, 2015
@kmurray kmurray added Type-Defect enhancement Feature enhancement and removed Type-Defect labels Jun 26, 2015
@kmurray
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kmurray commented Jul 20, 2016

Superseded by #154

@kmurray kmurray closed this as completed Jul 20, 2016
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