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Document Clock Network Modelling #514

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kmurray opened this issue Mar 25, 2019 · 2 comments
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Document Clock Network Modelling #514

kmurray opened this issue Mar 25, 2019 · 2 comments
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docs Documentation Stale VPR VPR FPGA Placement & Routing Tool

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kmurray commented Mar 25, 2019

Currently the VTR documentation does not describe the dedicated clock network modelling support added in #405.

The Architecture Reference Documentation (doc/src/arch/reference.rst) should document the various tags added to the architecture file and give some examples of how this feature should be used.
@kmurray kmurray added VPR VPR FPGA Placement & Routing Tool docs Documentation labels Mar 25, 2019
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This issue has been inactive for a year and has been marked as stale. It will be closed in 15 days if it continues to be stale. If you believe this is still an issue, please add a comment.

@github-actions github-actions bot added the Stale label Apr 29, 2025
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This issue has been marked stale for 15 days and has been automatically closed.

@github-actions github-actions bot closed this as not planned Won't fix, can't repro, duplicate, stale May 15, 2025
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