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No command line option to disable constant routing optimization #292

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breadgravy opened this issue Feb 14, 2018 · 1 comment
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No command line option to disable constant routing optimization #292

breadgravy opened this issue Feb 14, 2018 · 1 comment
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enhancement Feature enhancement VPR VPR FPGA Placement & Routing Tool

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@breadgravy
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breadgravy commented Feb 14, 2018

Problem

Constants generated in VTR/VPR (i.e. vcc and gnd in BLIF file) are currently NOT routed through the fabric. This is done because it is assumed pins can be arbitrarily tied high/low, and so there is no need to route these signals.

There are two related issues.

  1. gnd and vcc constants are packed into LUTs and placed even though by default they are not routed.
  2. Some FPGA architectures must generate and route constants from LUTs; there is no hardware to tie pins high low.

Solution

Add a command line option to allow for routing constants. All that this needs to do is toggle the execution of the loop at base/check_netlist.cpp:90

Ensure that constant generators are NOT packed and placed if they are not routed.

@kmurray kmurray added enhancement Feature enhancement VPR VPR FPGA Placement & Routing Tool labels Feb 14, 2018
@kmurray
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kmurray commented Feb 14, 2018

I've added a command-line argument in 29c66b1 to control how VPR handles constant nets.

Running with --constant_net_method route (instead of global) will cause all constant nets to be routed.

The longer term issue of describing/using tie-able pins is tracked in #163.

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Labels
enhancement Feature enhancement VPR VPR FPGA Placement & Routing Tool
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