VPR clustering - asserts with certain architecture

[kmurray]

Originally reported on Google Code with ID 23

What steps will reproduce the problem?
1. Run vpr with attached arch & circuit.

What is the expected output? What do you see instead?

The code asserts in cluster_legality.c:198:

        if (curr_ext_input > ext_output_rr_node_index
                || curr_ext_output > ext_clock_rr_node_index
                || curr_ext_clock > max_ext_index) {
            /* failed, not enough pins of proper type, overran index */
            assert(0);
        }


This could be an issue with the architecture file; however, it is fine as far as I
can tell.

Reported by jeffrey.goeders on 2012-05-08 19:15:08

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- _Attachment: [k6_N10_modes1_ff1.xml](https://storage.googleapis.com/google-code-attachments/vtr-verilog-to-routing/issue-23/comment-0/k6_N10_modes1_ff1.xml)_ - _Attachment: [boundtop.pre-vpr.blif](https://storage.googleapis.com/google-code-attachments/vtr-verilog-to-routing/issue-23/comment-0/boundtop.pre-vpr.blif)_

[kmurray]

Known problem from the latest change towards smarter packing.  Debugging it at high
priority.

Reported by JasonKaiLuu on 2012-05-09 20:27:15

[kmurray]

Reported by JasonKaiLuu on 2012-05-09 20:28:48

• Status changed: Accepted

[kmurray]

Reported by jeffrey.goeders on 2012-05-10 16:15:48

• Labels added: Priority-High

[kmurray]

Reported by JasonKaiLuu on 2012-05-10 20:24:49

• Status changed: Fixed