/usr/bin/env time -v /home/khalid88/Documents/vtr-verilog-to-routing/vpr/vpr k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3 --circuit_file stereovision3.pre-vpr.blif --route_chan_width 100 --max_router_iterations 150 VPR FPGA Placement and Routing. Version: 8.1.0-dev+2663cc8bf Revision: v8.0.0-2371-g2663cc8bf Compiled: 2020-08-13T11:53:58 Compiler: GNU 7.5.0 on Linux-4.15.0-60-generic x86_64 Build Info: release IPO VTR_ASSERT_LEVEL=2 sanitizers University of Toronto verilogtorouting.org vtr-users@googlegroups.com This is free open source code under MIT license. VPR was run with the following command-line: /home/khalid88/Documents/vtr-verilog-to-routing/vpr/vpr k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3 --circuit_file stereovision3.pre-vpr.blif --route_chan_width 100 --max_router_iterations 150 Using up to 1 parallel worker(s) Architecture file: k6_frac_N10_frac_chain_mem32K_40nm.xml Circuit name: stereovision3 # Loading Architecture Description # Loading Architecture Description took 0.05 seconds (max_rss 169.0 MiB, delta_rss +25.9 MiB) # Building complex block graph Warning 1: io[0].clock[0] unconnected pin in architecture. # Building complex block graph took 0.13 seconds (max_rss 264.8 MiB, delta_rss +95.9 MiB) # Load circuit Found constant-zero generator 'sv_chip3_hierarchy_no_mem^vidin_addr_reg~17' Found constant-zero generator 'sv_chip3_hierarchy_no_mem^vidin_addr_reg~18' Found constant-one generator 'vcc' Found constant-zero generator 'gnd' Found constant-zero generator 'unconn' # Load circuit took 0.01 seconds (max_rss 271.4 MiB, delta_rss +6.6 MiB) # Clean circuit Absorbed 51 LUT buffers Inferred 0 additional primitive pins as constant generators since they have no combinationally connected inputs Inferred 6 additional primitive pins as constant generators due to constant inputs Inferred 0 additional primitive pins as constant generators since they have no combinationally connected inputs Inferred 0 additional primitive pins as constant generators due to constant inputs Inferred 0 additional primitive pins as constant generators since they have no combinationally connected inputs Inferred 0 additional primitive pins as constant generators due to constant inputs Swept input(s) : 12 Swept output(s) : 0 (0 dangling, 0 constant) Swept net(s) : 18 Swept block(s) : 0 Constant Pins Marked: 6 # Clean circuit took 0.00 seconds (max_rss 272.0 MiB, delta_rss +0.6 MiB) # Compress circuit # Compress circuit took 0.01 seconds (max_rss 273.8 MiB, delta_rss +1.8 MiB) # Verify circuit # Verify circuit took 0.00 seconds (max_rss 273.8 MiB, delta_rss +0.0 MiB) Circuit Statistics: Blocks: 321 .input : 11 .latch : 100 .output: 30 0-LUT : 4 6-LUT : 148 adder : 28 Nets : 313 Avg Fanout: 2.8 Max Fanout: 82.0 Min Fanout: 1.0 Netlist Clocks: 2 # Build Timing Graph Timing Graph Nodes: 1191 Timing Graph Edges: 1792 Timing Graph Levels: 26 # Build Timing Graph took 0.01 seconds (max_rss 277.0 MiB, delta_rss +2.5 MiB) Netlist contains 2 clocks Netlist Clock 'sv_chip3_hierarchy_no_mem^tm3_clk_v0' Fanout: 82 pins (6.9%), 82 blocks (25.5%) Netlist Clock 'sv_chip3_hierarchy_no_mem^tm3_clk_v2' Fanout: 18 pins (1.5%), 18 blocks (5.6%) # Load Timing Constraints SDC file 'stereovision3.sdc' not found Setting default timing constraints: * constrain all primay inputs and primary outputs on a virtual external clock 'virtual_io_clock' * optimize all netlist and virtual clocks to run as fast as possible * ignore cross netlist clock domain timing paths Timing constraints created 3 clocks Constrained Clock 'virtual_io_clock' (Virtual Clock) Constrained Clock 'sv_chip3_hierarchy_no_mem^tm3_clk_v0' Source: 'sv_chip3_hierarchy_no_mem^tm3_clk_v0.inpad[0]' Constrained Clock 'sv_chip3_hierarchy_no_mem^tm3_clk_v2' Source: 'sv_chip3_hierarchy_no_mem^tm3_clk_v2.inpad[0]' # Load Timing Constraints took 0.00 seconds (max_rss 277.0 MiB, delta_rss +0.0 MiB) Timing analysis: ON Circuit netlist file: stereovision3.net Circuit placement file: stereovision3.place Circuit routing file: stereovision3.route Circuit SDC file: stereovision3.sdc Packer: ENABLED Placer: ENABLED Router: ENABLED Analysis: ENABLED NetlistOpts.abosrb_buffer_luts : true NetlistOpts.sweep_dangling_primary_ios : true NetlistOpts.sweep_dangling_nets : true NetlistOpts.sweep_dangling_blocks : true NetlistOpts.sweep_constant_primary_outputs: false NetlistOpts.netlist_verbosity : 1 NetlistOpts.const_gen_inference : COMB_SEQ PackerOpts.allow_unrelated_clustering: auto PackerOpts.alpha_clustering: 0.750000 PackerOpts.beta_clustering: 0.900000 PackerOpts.cluster_seed_type: BLEND2 PackerOpts.connection_driven: true PackerOpts.global_clocks: true PackerOpts.hill_climbing_flag: false PackerOpts.inter_cluster_net_delay: 1.000000 PackerOpts.timing_driven: true PackerOpts.target_external_pin_util: auto PlacerOpts.place_freq: PLACE_ONCE PlacerOpts.place_algorithm: PATH_TIMING_DRIVEN_PLACE PlacerOpts.pad_loc_type: FREE PlacerOpts.block_loc_type: NOT_LOCKED PlacerOpts.place_cost_exp: 1.000000 PlacerOpts.place_chan_width: 100 PlacerOpts.inner_loop_recompute_divider: 0 PlacerOpts.recompute_crit_iter: 1 PlacerOpts.timing_tradeoff: 0.500000 PlacerOpts.td_place_exp_first: 1.000000 PlacerOpts.td_place_exp_last: 8.000000 PlacerOpts.delay_offset: 0.000000 PlacerOpts.delay_ramp_delta_threshold: -1 PlacerOpts.delay_ramp_slope: 860141088 PlacerOpts.tsu_rel_margin: 1.000000 PlacerOpts.tsu_abs_margin: 0.000000 PlacerOpts.post_place_timing_report_file: PlacerOpts.allowed_tiles_for_delay_model: PlacerOpts.delay_model_reducer: MIN PlacerOpts.delay_model_type: DELTA PlacerOpts.rlim_escape_fraction: 0.000000 PlacerOpts.move_stats_file: PlacerOpts.placement_saves_per_temperature: 0 PlacerOpts.effort_scaling: CIRCUIT PlacerOpts.place_delta_delay_matrix_calculation_method: ASTAR_ROUTE PlaceOpts.seed: 1 AnnealSched.type: AUTO_SCHED AnnealSched.inner_num: 1.000000 RouterOpts.route_type: DETAILED RouterOpts.router_algorithm: TIMING_DRIVEN RouterOpts.base_cost_type: DELAY_NORMALIZED_LENGTH RouterOpts.fixed_channel_width: 100 RouterOpts.check_route: FULL RouterOpts.trim_empty_chan: false RouterOpts.trim_obs_chan: false RouterOpts.acc_fac: 1.000000 RouterOpts.bb_factor: 3 RouterOpts.bend_cost: 0.000000 RouterOpts.first_iter_pres_fac: 0.000000 RouterOpts.initial_pres_fac: 0.500000 RouterOpts.pres_fac_mult: 1.300000 RouterOpts.max_router_iterations: 150 RouterOpts.min_incremental_reroute_fanout: 16 RouterOpts.do_check_rr_graph: true RouterOpts.verify_binary_search: false RouterOpts.min_channel_width_hint: 0 RouterOpts.read_rr_edge_metadata: false RouterOpts.exit_after_first_routing_iteration: false RouterOpts.astar_fac: 1.200000 RouterOpts.criticality_exp: 1.000000 RouterOpts.max_criticality: 0.990000 RouterOpts.init_wirelength_abort_threshold: 0.850000 RouterOpts.save_routing_per_iteration: false RouterOpts.congested_routing_iteration_threshold_frac: 1.000000 RouterOpts.high_fanout_threshold: 64 RouterOpts.router_debug_net: -2 RouterOpts.router_debug_sink_rr: -2 RouterOpts.router_debug_iteration: -2 RouterOpts.max_convergence_count: 1 RouterOpts.reconvergence_cpd_threshold: 0.990000 RouterOpts.update_lower_bound_delays: true RouterOpts.first_iteration_timing_report_file: RouterOpts.incr_reroute_delay_ripup: AUTO RouterOpts.route_bb_update: DYNAMIC RouterOpts.lookahead_type: MAP RouterOpts.initial_timing: LOOKAHEAD RouterOpts.router_heap: BINARY_HEAP RouterOpts.routing_failure_predictor = SAFE RouterOpts.routing_budgets_algorithm = DISABLE AnalysisOpts.gen_post_synthesis_netlist: false AnalysisOpts.timing_report_npaths: 100 AnalysisOpts.timing_report_skew: false AnalysisOpts.echo_dot_timing_graph_node: -1 AnalysisOpts.timing_report_detail: NETLIST RoutingArch.directionality: UNI_DIRECTIONAL RoutingArch.switch_block_type: WILTON RoutingArch.Fs: 3 # Packing Begin packing 'stereovision3.pre-vpr.blif'. Warning 2: All 2 clocks will be treated as global. After removing unused inputs... total /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:760:37: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' blocks: 321, total nets: 313, total inputs: 11, total outputs: 30 Begin prepacking. There is one chain in this architecture called "chain" with the following starting points: clb[0]/fle[0]/lut5inter[0]/ble5[0]/arithmetic[0]/adder[0].cin[0] Finish prepacking. Using inter-cluster delay: 1.33777e-09 Packing with pin utilization targets: io:1,1 clb:0.8,1 mult_36:1,1 memory:1,1 Packing with high fanout thresholds: io:128 clb:32 mult_36:128 memory:128 Warning 3: Block type 'mult_36' grid location specification startx (6 = 6) falls outside device horizontal range [0,2] Warning 4: Block type 'EMPTY' grid location specification startx (6 = 6) falls outside device horizontal range [0,2] Not enough resources expand FPGA size to (3 x 3) Complex block 0: 'sv_chip3_hierarchy_no_mem^ADD~7-0[0]' (clb) .......... Warning 5: Block type 'mult_36' grid location specification startx (6 = 6) falls outside device horizontal range [0,3] Warning 6: Block type 'EMPTY' grid location specification startx (6 = 6) falls outside device horizontal range [0,3] Not enough resources expand FPGA size to (4 x 4) Complex block 1: 'sv_chip3_hierarchy_no_mem^ADD~16-0[0]' (clb) ......... Warning 7: Block type 'mult_36' grid location specification startx (6 = 6) falls outside device horizontal range [0,4] Warning 8: Block type 'EMPTY' grid location specification startx (6 = 6) falls outside device horizontal range [0,4] Not enough resources expand FPGA size to (5 x 5) Complex block 2: 'sv_chip3_hierarchy_no_mem^ADD~255-0[0]' (clb) ............ Complex block 3: '_li02' (clb) ............... Complex block 4: 'n236' (clb) ............. Complex block 5: '_li34' (clb) .................... Warning 9: Block type 'mult_36' grid location specification startx (6 = 6) falls outside device horizontal range [0,5] Warning 10: Block type 'EMPTY' grid location specification startx (6 = 6) falls outside device horizontal range [0,5] Not enough resources expand FPGA size to (6 x 6) Complex block 6: 'n231' (clb) .............. Complex block 7: '_n172' (clb) .................... Complex block 8: '_n202' (clb) ............... Complex block 9: 'n271' (clb) ............... Complex block 10: 'n291' (clb) ............... Complex block 11: 'n486' (clb) .. Complex block 12: 'out:sv_chip3_hierarchy_no_mem^tm3_vidin_sda' (io) . Complex block 13: 'out:sv_chip3_hierarchy_no_mem^tm3_vidin_scl' (io) . Complex block 14: 'out:sv_chip3_hierarchy_no_mem^vidin_new_data' (io) . Complex block 15: 'out:sv_chip3_hierarchy_no_mem^vidin_rgb_reg~0' (io) . Complex block 16: 'out:sv_chip3_hierarchy_no_mem^vidin_rgb_reg~1' (io) . Complex block 17: 'out:sv_chip3_hierarchy_no_mem^vidin_rgb_reg~2' (io) . Complex block 18: 'out:sv_chip3_hierarchy_no_mem^vidin_rgb_reg~3' (io) . Complex block 19: 'out:sv_chip3_hierarchy_no_mem^vidin_rgb_reg~4' (io) . Complex block 20: 'out:sv_chip3_hierarchy_no_mem^vidin_rgb_reg~5' (io) . Complex block 21: 'out:sv_chip3_hierarchy_no_mem^vidin_rgb_reg~6' (io) . Complex block 22: 'out:sv_chip3_hierarchy_no_mem^vidin_rgb_reg~7' (io) . Complex block 23: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~0' (io) . Complex block 24: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~1' (io) . Complex block 25: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~2' (io) . Complex block 26: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~3' (io) . Complex block 27: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~4' (io) . Complex block 28: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~5' (io) . Complex block 29: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~6' (io) . Complex block 30: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~7' (io) . Complex block 31: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~8' (io) . Complex block 32: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~9' (io) . Complex block 33: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~10' (io) . Complex block 34: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~11' (io) . Complex block 35: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~12' (io) . Complex block 36: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~13' (io) . Complex block 37: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~14' (io) . Complex block 38: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~15' (io) . Complex block 39: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~16' (io) . Not enough resources expand FPGA size to (7 x 7) Complex block 40: 'sv_chip3_hierarchy_no_mem^vidin_addr_reg~17' (clb) . Complex block 41: 'sv_chip3_hierarchy_no_mem^vidin_addr_reg~18' (clb) . Complex block 42: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~17' (io) . Complex block 43: 'out:sv_chip3_hierarchy_no_mem^vidin_addr_reg~18' (io) . Complex block 44: 'sv_chip3_hierarchy_no_mem^tm3_clk_v0' (io) . Complex block 45: 'sv_chip3_hierarchy_no_mem^tm3_clk_v2' (io) . Complex block 46: 'sv_chip3_hierarchy_no_mem^tm3_vidin_vs' (io) . Complex block 47: 'sv_chip3_hierarchy_no_mem^tm3_vidin_href' (io) . Complex block 48: 'sv_chip3_hierarchy_no_mem^tm3_vidin_cref' (io) . Complex block 49: 'sv_chip3_hierarchy_no_mem^tm3_vidin_rts0' (io) . Complex block 50: 'sv_chip3_hierarchy_no_mem^tm3_vidin_vpo~0' (io) . Complex block 51: 'sv_chip3_hierarchy_no_mem^tm3_vidin_vpo~1' (io) . Complex block 52: 'sv_chip3_hierarchy_no_mem^tm3_vidin_vpo~2' (io) . Complex block 53: 'sv_chip3_hierarchy_no_mem^tm3_vidin_vpo~3' (io) . Complex block 54: 'sv_chip3_hierarchy_no_mem^tm3_vidin_vpo~4' (io) . Logic Element (fle) detailed count: Total number of Logic Elements used : 112 LEs used for logic and registers : 63 LEs used for logic only : 49 LEs used for registers only : 0 EMPTY: # blocks: 0, average # input + clock pins used: 0, average # output pins used: 0 io: # blocks: 41, average # input + clock pins used: 0.731707, average # output pins used: 0.268293 clb: # blocks: 14, average # input + clock pins used: 11.2143, average # output pins used: 7.64286 mult_36: # blocks: 0, average # input + clock pins used: 0, average # output pins used: 0 memory: # blocks: 0, average # input + clock pins used: 0, average # output pins used: 0 Absorbed logical nets 195 out of 313 nets, 118 nets not absorbed. Incr Slack updates 1 in 0.000411807 sec Full Max Req/Worst Slack updates 1 in 0.000111355 sec Incr Max Req/Worst Slack updates 0 in 0 sec Incr Criticality updates 0 in 0 sec Full Criticality updates 1 in 0.000609134 sec FPGA sized to 7 x 7 (auto) Device Utilization: 0.39 (target 1.00) Block Utilization: 0.26 Type: io Block Utilization: 0.70 Type: clb Netlist conversion complete. # Packing took 1.31 seconds (max_rss 425.8 MiB, delta_rss +148.9 MiB) # Load Packing Begin loading packed FPGA netlist file. Netlist generated from file 'stereovision3.net'. Detected 4 constant generators (to see names run with higher pack verbosity) Finished loading packed FPGA netlist file (took 0.083044 seconds). Warning 11: Treated 4 constant nets as global which will not be routed (to see net names increase packer verbosity). # Load Packing took 0.09 seconds (max_rss 441.4 MiB, delta_rss +15.6 MiB) Warning 12: Netlist contains 8 global net to non-global architecture pin connections Warning 13: Logic block #40 (sv_chip3_hierarchy_no_mem^vidin_addr_reg~17) has only 1 output pin 'sv_chip3_hierarchy_no_mem^vidin_addr_reg~17.O[8]'. It may be a constant generator. Warning 14: Logic block #41 (sv_chip3_hierarchy_no_mem^vidin_addr_reg~18) has only 1 output pin 'sv_chip3_hierarchy_no_mem^vidin_addr_reg~18.O[8]'. It may be a constant generator. Netlist num_nets: 118 Netlist num_blocks: 55 Netlist EMPTY blocks: 0. Netlist io blocks: 41. Netlist clb blocks: 14. Netlist mult_36 blocks: 0. Netlist memory blocks: 0. Netlist inputs pins: 11 Netlist output pins: 30 Pb types usage... io : 41 inpad : 11 outpad : 30 clb : 14 fle : 112 lut5inter : 94 ble5 : 169 flut5 : 141 lut5 : 134 lut : 134 ff : 100 arithmetic : 28 adder : 28 ble6 : 18 lut6 : 18 lut : 18 # Create Device ## Build Device Grid FPGA sized to 7 x 7: 49 grid tiles (auto) Resource usage... Netlist 41 blocks of type: io Architecture 160 blocks of type: io Netlist 14 blocks of type: clb Architecture 20 blocks of type: clb Netlist 0 blocks of type: mult_36 Architecture 0 blocks of type: mult_36 Netlist 0 blocks of type: memory Architecture 0 blocks of type: memory Device Utilization: 0.39 (target 1.00) Physical Tile io: Block Utilization: 0.26 Logical Block: io Physical Tile clb: Block Utilization: 0.70 Logical Block: clb FPGA size limited by block type(s): clb ## Build Device Grid took 0.00 seconds (max_rss 452.5 MiB, delta_rss +0.0 MiB) ## Build routing resource graph Warning 15: in check_rr_node: RR node: 805 type: OPIN location: (1,1) pin: 61 pin_name: clb.cout[0] capacity: 1 has no out-going edges. Warning 16: in check_rr_node: RR node: 1720 type: OPIN location: (3,1) pin: 61 pin_name: clb.cout[0] capacity: 1 has no out-going edges. Warning 17: in check_rr_node: RR node: 2395 type: OPIN location: (4,1) pin: 61 pin_name: clb.cout[0] capacity: 1 has no out-going edges. Warning 18: in check_rr_node: RR node: 3070 type: OPIN location: (5,1) pin: 61 pin_name: clb.cout[0] capacity: 1 has no out-going edges. Warning 19: in check_rr_graph: fringe node 24 IPIN at (0,1) has no fanin. This is possible on a fringe node based on low Fc_out, N, and certain lengths. ## Build routing resource graph took 0.17 seconds (max_rss 459.1 MiB, delta_rss +6.6 MiB) RR Graph Nodes: 6540 RR Graph Edges: 33576 # Create Device took 0.18 seconds (max_rss 459.5 MiB, delta_rss +7.0 MiB) # Computing router lookahead map ## Computing wire lookahead ## Computing wire lookahead took 0.13 seconds (max_rss 460.1 MiB, delta_rss +0.6 MiB) ## Computing src/opin lookahead Warning 20: Found no reachable wires from SOURCE (clb[0].cout[0]) at (1,1) Warning 21: Found no reachable wires from OPIN (clb.cout[0]) at (1,1) Warning 22: Found no sample locations for SOURCE in mult_36 Warning 23: Found no sample locations for OPIN in mult_36 Warning 24: Found no sample locations for SOURCE in memory Warning 25: Found no sample locations for OPIN in memory ## Computing src/opin lookahead took 0.00 seconds (max_rss 460.4 MiB, delta_rss +0.3 MiB) # Computing router lookahead map took 0.13 seconds (max_rss 460.4 MiB, delta_rss +0.9 MiB) # Placement ## Computing placement delta delay look-up RR graph channel widths unchanged, skipping RR graph rebuild ### Computing delta delays ### Computing delta delays took 0.01 seconds (max_rss 462.4 MiB, delta_rss +1.3 MiB) ## Computing placement delta delay look-up took 0.01 seconds (max_rss 462.4 MiB, delta_rss +1.9 MiB) ## Initial Placement ## Initial Placement took 0.00 seconds (max_rss 463.4 MiB, delta_rss +0.5 MiB) There are 170 point to point connections in this circuit. BB estimate of min-dist (placement) wire length: 713 Completed placement consistency check successfully. Initial placement cost: 1 bb_cost: 7.12636 td_cost: 3.05715e-08 Initial placement estimated Critical Path Delay (CPD): 2.95946 ns Initial placement estimated setup Total Negative Slack (sTNS): -173.015 ns Initial placement estimated setup Worst Negative Slack (sWNS): -2.95946 ns Initial placement estimated setup slack histogram: [ -3e-09: -2.7e-09) 1 ( 0.6%) |* [ -2.7e-09: -2.4e-09) 0 ( 0.0%) | [ -2.4e-09: -2.2e-09) 0 ( 0.0%) | [ -2.2e-09: -1.9e-09) 5 ( 2.8%) |*** [ -1.9e-09: -1.7e-09) 19 ( 10.5%) |*********** [ -1.7e-09: -1.4e-09) 25 ( 13.8%) |*************** [ -1.4e-09: -1.1e-09) 14 ( 7.7%) |******** [ -1.1e-09: -8.9e-10) 3 ( 1.7%) |** [ -8.9e-10: -6.3e-10) 33 ( 18.2%) |******************** [ -6.3e-10: -3.7e-10) 81 ( 44.8%) |************************************************ Placement contains 0 placement macros involving 0 blocks (average macro size -nan) Moves per temperature: 209 ---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------ Tnum Time T Av Cost Av BB Cost Av TD Cost CPD sTNS sWNS Ac Rate Std Dev R lim Crit Exp Tot Moves Alpha (sec) (ns) (ns) (ns) ---- ------ ------- ------- ---------- ---------- ------- ---------- -------- ------- ------- ------ -------- --------- ------ 1 0.0 1.1e+00 1.085 7.23 3.1055e-08 2.619 -174 -2.619 0.995 0.0509 6.0 1.00 209 0.200 2 0.0 5.4e-01 0.942 7.28 3.0852e-08 2.660 -183 -2.660 0.995 0.0496 6.0 1.00 418 0.500 3 0.0 2.7e-01 0.988 6.94 3.0257e-08 2.647 -171 -2.647 0.986 0.0362 6.0 1.00 627 0.500 4 0.0 1.3e-01 0.950 6.94 3.1204e-08 2.504 -170 -2.504 0.971 0.0394 6.0 1.00 836 0.500 5 0.0 6.7e-02 0.992 6.65 2.9473e-08 2.617 -170 -2.617 0.919 0.0272 6.0 1.00 1045 0.500 6 0.0 6.0e-02 1.015 6.55 2.886e-08 2.639 -167 -2.639 0.947 0.0448 6.0 1.00 1254 0.900 7 0.0 5.4e-02 0.941 6.22 2.68e-08 2.690 -167 -2.690 0.904 0.0454 6.0 1.00 1463 0.900 8 0.0 4.9e-02 1.016 6.82 2.8915e-08 2.621 -171 -2.621 0.943 0.0286 6.0 1.00 1672 0.900 9 0.0 4.4e-02 0.986 6.60 2.9231e-08 2.641 -167 -2.641 0.933 0.0297 6.0 1.00 1881 0.900 10 0.0 4.0e-02 0.912 6.36 2.6724e-08 2.739 -174 -2.739 0.909 0.0582 6.0 1.00 2090 0.900 11 0.0 3.6e-02 1.063 6.27 2.8722e-08 2.403 -164 -2.403 0.871 0.0408 6.0 1.00 2299 0.900 12 0.0 3.2e-02 1.003 6.31 2.8439e-08 2.498 -171 -2.498 0.914 0.0296 6.0 1.00 2508 0.900 13 0.0 2.9e-02 1.016 5.99 2.6917e-08 2.496 -169 -2.496 0.885 0.0345 6.0 1.00 2717 0.900 14 0.0 2.6e-02 1.036 5.93 2.7399e-08 2.376 -165 -2.376 0.852 0.0224 6.0 1.00 2926 0.900 15 0.0 2.3e-02 1.023 6.51 2.8706e-08 2.713 -171 -2.713 0.837 0.0308 6.0 1.00 3135 0.900 16 0.0 2.1e-02 0.980 6.05 2.5916e-08 2.496 -175 -2.496 0.770 0.0217 6.0 1.00 3344 0.900 17 0.0 2.0e-02 0.932 5.95 2.6325e-08 2.404 -169 -2.404 0.856 0.0724 6.0 1.00 3553 0.950 18 0.0 1.8e-02 0.958 5.33 2.4665e-08 2.364 -165 -2.364 0.718 0.0196 6.0 1.00 3762 0.900 19 0.0 1.7e-02 0.984 5.52 2.529e-08 2.358 -166 -2.358 0.761 0.0199 6.0 1.00 3971 0.950 20 0.0 1.6e-02 0.968 5.59 2.553e-08 2.453 -173 -2.453 0.756 0.0249 6.0 1.00 4180 0.950 21 0.0 1.5e-02 0.975 5.32 2.5014e-08 2.405 -172 -2.405 0.732 0.0166 6.0 1.00 4389 0.950 22 0.0 1.5e-02 1.009 5.53 2.5301e-08 2.357 -167 -2.357 0.775 0.0201 6.0 1.00 4598 0.950 23 0.0 1.4e-02 0.966 5.54 2.5554e-08 2.317 -165 -2.317 0.766 0.0251 6.0 1.00 4807 0.950 24 0.0 1.3e-02 1.022 5.50 2.5142e-08 2.490 -163 -2.490 0.751 0.0185 6.0 1.00 5016 0.950 25 0.0 1.3e-02 0.991 5.28 2.481e-08 2.357 -167 -2.357 0.694 0.0118 6.0 1.00 5225 0.950 26 0.0 1.2e-02 1.015 5.32 2.4602e-08 2.363 -161 -2.363 0.708 0.0216 6.0 1.00 5434 0.950 27 0.0 1.1e-02 0.946 5.20 2.4328e-08 2.319 -164 -2.319 0.670 0.0280 6.0 1.00 5643 0.950 28 0.0 1.1e-02 1.003 5.23 2.4184e-08 2.382 -163 -2.382 0.708 0.0168 6.0 1.00 5852 0.950 29 0.0 1.0e-02 0.993 5.32 2.5054e-08 2.360 -167 -2.360 0.737 0.0204 6.0 1.00 6061 0.950 30 0.0 9.7e-03 0.985 4.97 2.385e-08 2.316 -161 -2.316 0.656 0.0081 6.0 1.00 6270 0.950 31 0.0 9.2e-03 1.036 5.08 2.4156e-08 2.363 -161 -2.363 0.646 0.0183 6.0 1.00 6479 0.950 32 0.0 8.8e-03 1.000 5.23 2.4663e-08 2.384 -162 -2.384 0.713 0.0165 6.0 1.00 6688 0.950 33 0.0 8.3e-03 0.991 5.03 2.4293e-08 2.319 -160 -2.319 0.684 0.0110 6.0 1.00 6897 0.950 34 0.0 7.9e-03 0.985 5.07 2.4425e-08 2.376 -166 -2.376 0.732 0.0183 6.0 1.00 7106 0.950 35 0.0 7.5e-03 0.988 5.27 2.4553e-08 2.404 -167 -2.404 0.722 0.0100 6.0 1.00 7315 0.950 36 0.0 7.1e-03 0.981 5.09 2.4935e-08 2.339 -163 -2.339 0.746 0.0162 6.0 1.00 7524 0.950 37 0.0 6.8e-03 0.999 5.03 2.4373e-08 2.316 -165 -2.316 0.560 0.0159 6.0 1.00 7733 0.950 38 0.0 6.4e-03 1.007 5.33 2.4671e-08 2.379 -161 -2.379 0.632 0.0095 6.0 1.00 7942 0.950 39 0.0 6.1e-03 0.960 5.09 2.3826e-08 2.425 -162 -2.425 0.574 0.0229 6.0 1.00 8151 0.950 40 0.0 5.8e-03 0.983 5.14 2.3531e-08 2.503 -162 -2.503 0.627 0.0159 6.0 1.00 8360 0.950 41 0.0 5.5e-03 0.987 5.14 2.4743e-08 2.363 -163 -2.363 0.636 0.0125 6.0 1.00 8569 0.950 42 0.0 5.2e-03 0.977 5.10 2.4706e-08 2.320 -168 -2.320 0.632 0.0102 6.0 1.00 8778 0.950 43 0.0 5.0e-03 0.972 4.98 2.4167e-08 2.363 -167 -2.363 0.651 0.0182 6.0 1.00 8987 0.950 44 0.0 4.7e-03 0.987 4.87 2.2697e-08 2.319 -163 -2.319 0.545 0.0125 6.0 1.00 9196 0.950 45 0.0 4.5e-03 0.974 4.71 2.3276e-08 2.363 -160 -2.363 0.450 0.0142 6.0 1.00 9405 0.950 46 0.0 4.3e-03 0.995 4.56 2.2692e-08 2.338 -160 -2.338 0.455 0.0112 6.0 1.00 9614 0.950 47 0.0 4.1e-03 1.003 4.56 2.2264e-08 2.338 -159 -2.338 0.426 0.0136 6.0 1.00 9823 0.950 48 0.0 3.9e-03 1.025 4.59 2.1518e-08 2.404 -157 -2.404 0.488 0.0256 5.9 1.12 10032 0.950 49 0.0 3.7e-03 1.004 4.71 2.3094e-08 2.319 -159 -2.319 0.474 0.0060 6.0 1.00 10241 0.950 50 0.0 3.5e-03 0.980 4.53 2.2201e-08 2.363 -159 -2.363 0.306 0.0125 6.0 1.00 10450 0.950 51 0.0 3.3e-03 0.995 4.54 1.663e-08 2.404 -158 -2.404 0.469 0.0118 5.2 2.12 10659 0.950 52 0.0 3.1e-03 1.001 4.66 1.8303e-08 2.404 -157 -2.404 0.550 0.0098 5.3 1.91 10868 0.950 53 0.0 3.0e-03 0.968 4.55 2.2153e-08 2.358 -168 -2.358 0.450 0.0099 5.9 1.09 11077 0.950 54 0.0 2.8e-03 0.973 4.36 2.1327e-08 2.335 -163 -2.335 0.411 0.0091 6.0 1.01 11286 0.950 55 0.0 2.7e-03 0.990 4.24 2.0227e-08 2.317 -158 -2.317 0.325 0.0053 5.8 1.25 11495 0.950 56 0.0 2.6e-03 0.999 4.31 1.6269e-08 2.335 -157 -2.335 0.397 0.0067 5.2 2.18 11704 0.950 57 0.0 2.4e-03 1.013 4.43 1.5678e-08 2.279 -157 -2.279 0.431 0.0068 4.9 2.49 11913 0.950 58 0.0 2.3e-03 0.990 4.41 1.585e-08 2.279 -158 -2.279 0.388 0.0087 4.9 2.56 12122 0.950 59 0.0 2.2e-03 0.985 4.31 1.4511e-08 2.279 -157 -2.279 0.469 0.0064 4.6 2.91 12331 0.950 60 0.0 2.1e-03 1.006 4.38 1.502e-08 2.279 -158 -2.279 0.455 0.0044 4.8 2.73 12540 0.950 61 0.0 2.0e-03 0.990 4.38 1.5084e-08 2.279 -159 -2.279 0.407 0.0066 4.8 2.63 12749 0.950 62 0.0 1.9e-03 0.984 4.27 1.4187e-08 2.279 -157 -2.279 0.301 0.0097 4.7 2.86 12958 0.950 63 0.0 1.8e-03 0.993 4.17 1.4006e-08 2.279 -158 -2.279 0.368 0.0109 4.0 3.76 13167 0.950 64 0.0 1.7e-03 1.003 4.09 1.3336e-08 2.279 -155 -2.279 0.349 0.0050 3.7 4.17 13376 0.950 65 0.0 1.6e-03 1.011 4.17 1.2003e-08 2.279 -156 -2.279 0.349 0.0053 3.4 4.64 13585 0.950 66 0.0 1.5e-03 0.995 4.09 1.2262e-08 2.279 -156 -2.279 0.368 0.0077 3.1 5.07 13794 0.950 67 0.0 1.5e-03 0.984 4.00 9.7156e-09 2.279 -155 -2.279 0.445 0.0053 2.9 5.38 14003 0.950 68 0.0 1.4e-03 1.003 4.09 1.0608e-08 2.279 -157 -2.279 0.349 0.0054 2.9 5.36 14212 0.950 69 0.0 1.3e-03 0.989 4.01 1.0143e-08 2.279 -156 -2.279 0.402 0.0037 2.6 5.73 14421 0.950 70 0.0 1.2e-03 0.988 3.97 1.114e-08 2.279 -155 -2.279 0.340 0.0059 2.5 5.87 14630 0.950 71 0.0 1.2e-03 0.998 3.96 1.0507e-08 2.279 -156 -2.279 0.349 0.0055 2.3 6.22 14839 0.950 72 0.0 1.1e-03 0.994 3.94 1.1247e-08 2.279 -155 -2.279 0.278 0.0030 2.1 6.51 15048 0.950 73 0.0 1.1e-03 0.992 3.91 1.0219e-08 2.335 -155 -2.335 0.402 0.0037 1.7 6.98 15257 0.950 74 0.0 1.0e-03 0.993 3.88 1.044e-08 2.279 -154 -2.279 0.388 0.0029 1.7 7.07 15466 0.950 75 0.0 9.7e-04 0.999 3.90 1.0369e-08 2.279 -155 -2.279 0.335 0.0025 1.6 7.19 15675 0.950 76 0.0 9.2e-04 0.994 3.88 1.0057e-08 2.279 -155 -2.279 0.254 0.0031 1.4 7.43 15884 0.950 77 0.0 8.7e-04 0.994 3.90 9.92e-09 2.279 -155 -2.279 0.321 0.0023 1.1 7.79 16093 0.950 78 0.0 8.3e-04 0.994 3.89 9.8343e-09 2.279 -160 -2.279 0.278 0.0026 1.0 7.99 16302 0.950 79 0.0 7.9e-04 0.998 3.88 9.097e-09 2.279 -155 -2.279 0.311 0.0032 1.0 8.00 16511 0.950 80 0.0 7.5e-04 0.998 3.87 8.9554e-09 2.279 -155 -2.279 0.287 0.0012 1.0 8.00 16720 0.950 81 0.0 7.1e-04 0.999 3.90 9.8676e-09 2.279 -155 -2.279 0.354 0.0020 1.0 8.00 16929 0.950 82 0.0 6.7e-04 0.990 3.88 9.3223e-09 2.279 -157 -2.279 0.316 0.0052 1.0 8.00 17138 0.950 83 0.0 6.4e-04 0.995 3.84 9.8364e-09 2.279 -157 -2.279 0.230 0.0029 1.0 8.00 17347 0.950 84 0.0 6.1e-04 0.998 3.82 9.6516e-09 2.279 -157 -2.279 0.239 0.0012 1.0 8.00 17556 0.950 85 0.0 5.8e-04 1.000 3.83 9.6672e-09 2.279 -157 -2.279 0.287 0.0014 1.0 8.00 17765 0.950 86 0.0 5.5e-04 0.998 3.83 9.6465e-09 2.279 -157 -2.279 0.268 0.0020 1.0 8.00 17974 0.950 87 0.0 5.2e-04 0.998 3.82 9.661e-09 2.279 -155 -2.279 0.278 0.0007 1.0 8.00 18183 0.950 88 0.0 5.0e-04 0.996 3.80 9.622e-09 2.279 -155 -2.279 0.254 0.0014 1.0 8.00 18392 0.950 89 0.0 4.7e-04 1.000 3.80 1.0486e-08 2.279 -157 -2.279 0.206 0.0007 1.0 8.00 18601 0.950 90 0.0 4.5e-04 0.999 3.81 9.543e-09 2.279 -157 -2.279 0.215 0.0009 1.0 8.00 18810 0.950 91 0.0 4.3e-04 1.001 3.83 1.0707e-08 2.279 -157 -2.279 0.239 0.0019 1.0 8.00 19019 0.950 92 0.0 4.0e-04 0.996 3.83 9.736e-09 2.279 -155 -2.279 0.239 0.0024 1.0 8.00 19228 0.950 93 0.0 3.8e-04 0.998 3.82 9.5771e-09 2.279 -155 -2.279 0.220 0.0005 1.0 8.00 19437 0.950 94 0.0 3.6e-04 0.998 3.82 9.5696e-09 2.279 -154 -2.279 0.287 0.0011 1.0 8.00 19646 0.950 95 0.0 3.5e-04 0.999 3.81 1.053e-08 2.279 -155 -2.279 0.254 0.0004 1.0 8.00 19855 0.950 96 0.0 3.3e-04 0.999 3.82 9.5329e-09 2.279 -154 -2.279 0.220 0.0005 1.0 8.00 20064 0.950 97 0.0 3.1e-04 0.997 3.81 1.0527e-08 2.279 -154 -2.279 0.220 0.0008 1.0 8.00 20273 0.950 98 0.0 3.0e-04 1.000 3.82 1.0531e-08 2.279 -155 -2.279 0.254 0.0003 1.0 8.00 20482 0.950 99 0.0 2.8e-04 0.998 3.82 9.5302e-09 2.279 -154 -2.279 0.239 0.0006 1.0 8.00 20691 0.950 100 0.0 2.7e-04 0.999 3.82 1.0537e-08 2.279 -155 -2.279 0.234 0.0006 1.0 8.00 20900 0.950 101 0.0 2.5e-04 0.999 3.82 1.0529e-08 2.279 -155 -2.279 0.206 0.0004 1.0 8.00 21109 0.950 102 0.0 2.4e-04 0.998 3.82 1.0535e-08 2.279 -155 -2.279 0.230 0.0010 1.0 8.00 21318 0.950 103 0.0 2.3e-04 0.999 3.81 1.0543e-08 2.279 -155 -2.279 0.187 0.0005 1.0 8.00 21527 0.950 104 0.0 2.2e-04 1.000 3.81 1.0549e-08 2.279 -155 -2.279 0.163 0.0002 1.0 8.00 21736 0.950 105 0.0 2.1e-04 0.999 3.81 9.5348e-09 2.279 -155 -2.279 0.196 0.0004 1.0 8.00 21945 0.950 106 0.0 2.0e-04 0.999 3.81 9.5349e-09 2.279 -154 -2.279 0.225 0.0005 1.0 8.00 22154 0.950 107 0.0 1.9e-04 0.999 3.81 1.0609e-08 2.279 -154 -2.279 0.278 0.0003 1.0 8.00 22363 0.950 108 0.0 1.8e-04 0.998 3.81 1.0663e-08 2.279 -155 -2.279 0.206 0.0011 1.0 8.00 22572 0.950 109 0.0 1.7e-04 0.998 3.81 9.5294e-09 2.279 -155 -2.279 0.177 0.0006 1.0 8.00 22781 0.950 110 0.0 1.6e-04 0.999 3.81 1.053e-08 2.279 -155 -2.279 0.211 0.0004 1.0 8.00 22990 0.950 111 0.0 1.5e-04 0.999 3.81 9.5327e-09 2.279 -154 -2.279 0.191 0.0007 1.0 8.00 23199 0.950 112 0.0 1.4e-04 0.999 3.81 1.0534e-08 2.279 -155 -2.279 0.177 0.0006 1.0 8.00 23408 0.950 113 0.0 1.4e-04 0.999 3.81 1.0538e-08 2.279 -155 -2.279 0.201 0.0002 1.0 8.00 23617 0.950 114 0.0 1.3e-04 0.999 3.81 9.5324e-09 2.279 -155 -2.279 0.206 0.0005 1.0 8.00 23826 0.950 115 0.0 1.2e-04 0.999 3.81 1.054e-08 2.279 -155 -2.279 0.177 0.0007 1.0 8.00 24035 0.950 116 0.0 1.2e-04 0.999 3.81 9.5369e-09 2.279 -155 -2.279 0.206 0.0004 1.0 8.00 24244 0.950 117 0.0 1.1e-04 0.999 3.81 1.053e-08 2.279 -154 -2.279 0.230 0.0005 1.0 8.00 24453 0.950 118 0.0 1.1e-04 0.999 3.81 9.5284e-09 2.279 -154 -2.279 0.177 0.0004 1.0 8.00 24662 0.950 119 0.0 1.0e-04 0.999 3.81 1.0527e-08 2.279 -154 -2.279 0.230 0.0005 1.0 8.00 24871 0.950 120 0.0 9.6e-05 0.999 3.81 1.0525e-08 2.279 -154 -2.279 0.187 0.0005 1.0 8.00 25080 0.950 121 0.0 9.1e-05 0.998 3.81 9.5532e-09 2.279 -154 -2.279 0.191 0.0011 1.0 8.00 25289 0.950 122 0.0 8.7e-05 0.998 3.81 9.5302e-09 2.279 -155 -2.279 0.177 0.0006 1.0 8.00 25498 0.950 123 0.0 8.2e-05 0.999 3.81 1.0528e-08 2.279 -154 -2.279 0.215 0.0005 1.0 8.00 25707 0.950 124 0.0 7.8e-05 0.999 3.81 9.5343e-09 2.279 -155 -2.279 0.134 0.0007 1.0 8.00 25916 0.950 125 0.0 6.3e-05 0.998 3.81 9.5503e-09 2.279 -154 -2.279 0.215 0.0009 1.0 8.00 26125 0.800 126 0.0 5.9e-05 0.999 3.81 1.0532e-08 2.279 -155 -2.279 0.201 0.0005 1.0 8.00 26334 0.950 127 0.0 5.6e-05 0.999 3.81 1.0529e-08 2.279 -154 -2.279 0.201 0.0005 1.0 8.00 26543 0.950 128 0.0 5.4e-05 0.999 3.81 1.0535e-08 2.279 -154 -2.279 0.172 0.0006 1.0 8.00 26752 0.950 129 0.0 5.1e-05 0.999 3.81 9.5786e-09 2.279 -155 -2.279 0.172 0.0006 1.0 8.00 26961 0.950 130 0.0 4.8e-05 0.999 3.81 1.0529e-08 2.279 -154 -2.279 0.177 0.0007 1.0 8.00 27170 0.950 131 0.0 4.6e-05 0.999 3.81 1.0535e-08 2.279 -155 -2.279 0.177 0.0004 1.0 8.00 27379 0.950 132 0.0 4.4e-05 0.998 3.81 9.5316e-09 2.279 -154 -2.279 0.172 0.0006 1.0 8.00 27588 0.950 133 0.0 0.0e+00 0.997 3.81 1.053e-08 2.279 -155 -2.279 0.144 0.0005 1.0 8.00 27797 0.950 /usr/include/tbb/task.h:749: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:760:37: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:749:49: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' /usr/include/tbb/task.h:989:28: runtime error: member call on address 0x7fdea403b200 which does not point to an object of type 'scheduler' 0x7fdea403b200: note: object is of type 'tbb::internal::custom_scheduler' 00 00 00 00 90 5a 32 b0 de 7f 00 00 00 00 00 00 00 00 00 00 60 b6 04 a4 de 7f 00 00 60 b6 04 a4 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for 'tbb::internal::custom_scheduler' ## Placement Quench took 0.01 seconds (max_rss 490.8 MiB) BB estimate of min-dist (placement) wire length: 381 Completed placement consistency check successfully. Swaps called: 27852 Aborted Move Reasons: No moves aborted Placement estimated critical path delay (least slack): 2.27922 ns Placement estimated setup Worst Negative Slack (sWNS): -2.27922 ns Placement estimated setup Total Negative Slack (sTNS): -154.321 ns Placement estimated setup slack histogram: [ -2.3e-09: -2.1e-09) 1 ( 0.6%) |* [ -2.1e-09: -1.9e-09) 0 ( 0.0%) | [ -1.9e-09: -1.7e-09) 8 ( 4.4%) |***** [ -1.7e-09: -1.5e-09) 16 ( 8.8%) |********** [ -1.5e-09: -1.3e-09) 4 ( 2.2%) |*** [ -1.3e-09: -1.1e-09) 23 ( 12.7%) |*************** [ -1.1e-09: -9.5e-10) 15 ( 8.3%) |********* [ -9.5e-10: -7.6e-10) 0 ( 0.0%) | [ -7.6e-10: -5.6e-10) 38 ( 21.0%) |************************ [ -5.6e-10: -3.7e-10) 76 ( 42.0%) |************************************************ Placement estimated intra-domain critical path delays (CPDs): sv_chip3_hierarchy_no_mem^tm3_clk_v0 to sv_chip3_hierarchy_no_mem^tm3_clk_v0 CPD: 1.83905 ns (543.759 MHz) sv_chip3_hierarchy_no_mem^tm3_clk_v2 to sv_chip3_hierarchy_no_mem^tm3_clk_v2 CPD: 2.27922 ns (438.747 MHz) Placement estimated inter-domain critical path delays (CPDs): virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v0 CPD: 1.11608 ns (895.996 MHz) virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v2 CPD: 0.58555 ns (1707.8 MHz) sv_chip3_hierarchy_no_mem^tm3_clk_v0 to virtual_io_clock CPD: 0.393584 ns (2540.75 MHz) sv_chip3_hierarchy_no_mem^tm3_clk_v2 to virtual_io_clock CPD: 0.374011 ns (2673.72 MHz) Placement estimated intra-domain worst setup slacks per constraint: sv_chip3_hierarchy_no_mem^tm3_clk_v0 to sv_chip3_hierarchy_no_mem^tm3_clk_v0 worst setup slack: -1.83905 ns sv_chip3_hierarchy_no_mem^tm3_clk_v2 to sv_chip3_hierarchy_no_mem^tm3_clk_v2 worst setup slack: -2.27922 ns Placement estimated inter-domain worst setup slacks per constraint: virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v0 worst setup slack: -1.11608 ns virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v2 worst setup slack: -0.58555 ns sv_chip3_hierarchy_no_mem^tm3_clk_v0 to virtual_io_clock worst setup slack: -0.393584 ns sv_chip3_hierarchy_no_mem^tm3_clk_v2 to virtual_io_clock worst setup slack: -0.374011 ns Placement estimated geomean non-virtual intra-domain period: 2.04734 ns (488.439 MHz) Placement estimated fanout-weighted geomean non-virtual intra-domain period: 0.741208 ns (1349.15 MHz) Placement cost: 0.996091, bb_cost: 3.81348, td_cost: 1.05543e-08, Placement resource usage: io implemented as io : 41 clb implemented as clb: 14 Placement number of temperatures: 133 Placement total # of swap attempts: 27852 Swaps accepted: 12449 (44.7 %) Swaps rejected: 15403 (55.3 %) Swaps aborted : 0 ( 0.0 %) Placement Quench timing analysis took 0.00446956 seconds (0.00373235 STA, 0.000737209 slack) (1 full updates: 1 setup, 0 hold, 0 combined). Placement Total timing analysis took 0.610413 seconds (0.507314 STA, 0.103099 slack) (135 full updates: 135 setup, 0 hold, 0 combined). update_td_costs: connections 0.00144701 nets 0 sum_nets 0.000292093 total 0.0018577 # Placement took 0.98 seconds (max_rss 491.6 MiB, delta_rss +31.2 MiB) # Routing RR graph channel widths unchanged, skipping RR graph rebuild Confirming router algorithm: TIMING_DRIVEN. ## Initializing router criticalities Initial Net Connection Criticality Histogram: [ 0: 0.1) 17 ( 9.1%) |***************** [ 0.1: 0.2) 0 ( 0.0%) | [ 0.2: 0.3) 1 ( 0.5%) |* [ 0.3: 0.4) 21 ( 11.2%) |********************* [ 0.4: 0.5) 10 ( 5.3%) |********** [ 0.5: 0.6) 14 ( 7.5%) |************** [ 0.6: 0.7) 8 ( 4.3%) |******** [ 0.7: 0.8) 29 ( 15.5%) |**************************** [ 0.8: 0.9) 38 ( 20.3%) |************************************* [ 0.9: 1) 49 ( 26.2%) |************************************************ ## Initializing router criticalities took 0.03 seconds (max_rss 493.2 MiB, delta_rss +0.5 MiB) ---- ------ ------- ---- ------- ------- ------- ----------------- --------------- -------- ---------- ---------- ---------- ---------- -------- Iter Time pres BBs Heap Re-Rtd Re-Rtd Overused RR Nodes Wirelength CPD sTNS sWNS hTNS hWNS Est Succ (sec) fac Updt push Nets Conns (ns) (ns) (ns) (ns) (ns) Iter ---- ------ ------- ---- ------- ------- ------- ----------------- --------------- -------- ---------- ---------- ---------- ---------- -------- 1 0.0 0.0 0 5728 112 170 58 ( 0.887%) 513 ( 8.6%) 2.593 -172.0 -2.593 0.000 0.000 N/A Incr Slack updates 135 in 0.0266625 sec Full Max Req/Worst Slack updates 129 in 0.0125187 sec Incr Max Req/Worst Slack updates 6 in 0.000757873 sec Incr Criticality updates 17 in 0.00691341 sec Full Criticality updates 118 in 0.0524239 sec 2 0.0 0.5 1 3047 62 113 21 ( 0.321%) 505 ( 8.4%) 2.598 -171.5 -2.598 0.000 0.000 N/A 3 0.0 0.6 0 2242 37 77 19 ( 0.291%) 517 ( 8.6%) 2.598 -172.2 -2.598 0.000 0.000 N/A 4 0.0 0.8 0 1929 30 68 14 ( 0.214%) 517 ( 8.6%) 2.574 -171.9 -2.574 0.000 0.000 N/A 5 0.0 1.1 0 882 20 42 10 ( 0.153%) 531 ( 8.9%) 2.574 -172.0 -2.574 0.000 0.000 N/A 6 0.0 1.4 0 670 16 34 8 ( 0.122%) 536 ( 8.9%) 2.574 -172.0 -2.574 0.000 0.000 N/A 7 0.0 1.9 0 521 13 25 6 ( 0.092%) 538 ( 9.0%) 2.574 -172.0 -2.574 0.000 0.000 N/A 8 0.0 2.4 0 333 8 15 4 ( 0.061%) 540 ( 9.0%) 2.574 -172.0 -2.574 0.000 0.000 N/A 9 0.0 3.1 0 324 6 12 2 ( 0.031%) 543 ( 9.0%) 2.574 -171.9 -2.574 0.000 0.000 N/A 10 0.0 4.1 0 221 4 9 2 ( 0.031%) 543 ( 9.0%) 2.574 -171.9 -2.574 0.000 0.000 11 11 0.0 5.3 0 147 2 5 1 ( 0.015%) 546 ( 9.1%) 2.574 -171.9 -2.574 0.000 0.000 11 12 0.0 6.9 0 61 2 3 0 ( 0.000%) 546 ( 9.1%) 2.574 -171.9 -2.574 0.000 0.000 11 Restoring best routing Critical path: 2.57358 ns Successfully routed after 12 routing iterations. Final Net Connection Criticality Histogram: [ 0: 0.1) 17 ( 9.1%) |****************** [ 0.1: 0.2) 0 ( 0.0%) | [ 0.2: 0.3) 0 ( 0.0%) | [ 0.3: 0.4) 12 ( 6.4%) |************* [ 0.4: 0.5) 22 ( 11.8%) |*********************** [ 0.5: 0.6) 19 ( 10.2%) |******************** [ 0.6: 0.7) 17 ( 9.1%) |****************** [ 0.7: 0.8) 27 ( 14.4%) |**************************** [ 0.8: 0.9) 27 ( 14.4%) |**************************** [ 0.9: 1) 46 ( 24.6%) |************************************************ Router Stats: total_nets_routed: 312 total_connections_routed: 573 total_heap_pushes: 16105 total_heap_pops: 4740 # Routing took 0.16 seconds (max_rss 495.6 MiB, delta_rss +3.4 MiB) Checking to ensure routing is legal... # Checking to ensure non-configurable edges are legal # Checking to ensure non-configurable edges are legal took 0.00 seconds (max_rss 496.0 MiB, delta_rss +0.2 MiB) Completed routing consistency check successfully. Serial number (magic cookie) for the routing is: -24544266 Circuit successfully routed with a channel width factor of 100. Average number of bends per net: 0.928571 Maximum # of bends: 4 Number of global nets: 6 Number of routed nets (nonglobal): 112 Wire length results (in units of 1 clb segments)... Total wirelength: 546, average net length: 4.87500 Maximum net length: 13 Wire length results in terms of physical segments... Total wiring segments used: 234, average wire segments per net: 2.08929 Maximum segments used by a net: 5 Total local nets with reserved CLB opins: 0 Routing channel utilization histogram: [ 1: inf) 0 ( 0.0%) | [ 0.9: 1) 0 ( 0.0%) | [ 0.8: 0.9) 0 ( 0.0%) | [ 0.7: 0.8) 0 ( 0.0%) | [ 0.5: 0.6) 0 ( 0.0%) | [ 0.4: 0.5) 0 ( 0.0%) | [ 0.3: 0.4) 0 ( 0.0%) | [ 0.2: 0.3) 10 ( 13.9%) |********** [ 0.1: 0.2) 16 ( 22.2%) |***************** [ 0: 0.1) 46 ( 63.9%) |************************************************ Maximum routing channel utilization: 0.27 at (4,1) X - Directed channels: j max occ ave occ capacity ---- ------- ------- -------- 0 23 13.857 100 1 27 12.857 100 2 14 6.857 100 3 9 3.571 100 4 19 8.714 100 5 8 4.286 100 Y - Directed channels: i max occ ave occ capacity ---- ------- ------- -------- 0 2 0.571 100 1 5 0.857 100 2 9 4.429 100 3 13 6.714 100 4 20 8.571 100 5 16 6.714 100 Total tracks in x-direction: 600, in y-direction: 600 Logic area (in minimum width transistor areas, excludes I/Os and empty grid tiles)... Total logic block area (Warning, need to add pitch of routing to blocks with height > 3): 1.07788e+06 Total used logic block area: 754516 Routing area (in minimum width transistor areas)... Total routing area: 219490., per logic tile: 4479.39 Segment usage by type (index): name type utilization ----------------- ---- ----------- unnamed_segment_0 0 0.0975 Segment usage by length: length utilization ------ ----------- 4 0.0975 Final hold Worst Negative Slack (hWNS): 0 ns Final hold Total Negative Slack (hTNS): 0 ns Final hold slack histogram: [ 2.9e-10: 3.8e-10) 104 ( 57.5%) |*********************************************** [ 3.8e-10: 4.7e-10) 33 ( 18.2%) |*************** [ 4.7e-10: 5.5e-10) 24 ( 13.3%) |*********** [ 5.5e-10: 6.4e-10) 8 ( 4.4%) |**** [ 6.4e-10: 7.3e-10) 9 ( 5.0%) |**** [ 7.3e-10: 8.2e-10) 1 ( 0.6%) | [ 8.2e-10: 9.1e-10) 1 ( 0.6%) | [ 9.1e-10: 1e-09) 0 ( 0.0%) | [ 1e-09: 1.1e-09) 0 ( 0.0%) | [ 1.1e-09: 1.2e-09) 1 ( 0.6%) | Final intra-domain worst hold slacks per constraint: sv_chip3_hierarchy_no_mem^tm3_clk_v0 to sv_chip3_hierarchy_no_mem^tm3_clk_v0 worst hold slack: 0.293 ns sv_chip3_hierarchy_no_mem^tm3_clk_v2 to sv_chip3_hierarchy_no_mem^tm3_clk_v2 worst hold slack: 0.293 ns Final inter-domain worst hold slacks per constraint: virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v0 worst hold slack: 0.357641 ns virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v2 worst hold slack: 0.516663 ns sv_chip3_hierarchy_no_mem^tm3_clk_v0 to virtual_io_clock worst hold slack: 0.289036 ns sv_chip3_hierarchy_no_mem^tm3_clk_v2 to virtual_io_clock worst hold slack: 0.429215 ns Final critical path delay (least slack): 2.57358 ns Final setup Worst Negative Slack (sWNS): -2.57358 ns Final setup Total Negative Slack (sTNS): -171.949 ns Final setup slack histogram: [ -2.6e-09: -2.4e-09) 1 ( 0.6%) |* [ -2.4e-09: -2.1e-09) 0 ( 0.0%) | [ -2.1e-09: -1.9e-09) 6 ( 3.3%) |***** [ -1.9e-09: -1.7e-09) 18 ( 9.9%) |************** [ -1.7e-09: -1.5e-09) 6 ( 3.3%) |***** [ -1.5e-09: -1.3e-09) 23 ( 12.7%) |****************** [ -1.3e-09: -1e-09) 10 ( 5.5%) |******** [ -1e-09: -8.1e-10) 9 ( 5.0%) |******* [ -8.1e-10: -5.9e-10) 48 ( 26.5%) |************************************** [ -5.9e-10: -3.7e-10) 60 ( 33.1%) |************************************************ Final intra-domain critical path delays (CPDs): sv_chip3_hierarchy_no_mem^tm3_clk_v0 to sv_chip3_hierarchy_no_mem^tm3_clk_v0 CPD: 2.13384 ns (468.639 MHz) sv_chip3_hierarchy_no_mem^tm3_clk_v2 to sv_chip3_hierarchy_no_mem^tm3_clk_v2 CPD: 2.57358 ns (388.564 MHz) Final inter-domain critical path delays (CPDs): virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v0 CPD: 1.23669 ns (808.612 MHz) virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v2 CPD: 0.703663 ns (1421.13 MHz) sv_chip3_hierarchy_no_mem^tm3_clk_v0 to virtual_io_clock CPD: 0.822834 ns (1215.31 MHz) sv_chip3_hierarchy_no_mem^tm3_clk_v2 to virtual_io_clock CPD: 0.625709 ns (1598.19 MHz) Final intra-domain worst setup slacks per constraint: sv_chip3_hierarchy_no_mem^tm3_clk_v0 to sv_chip3_hierarchy_no_mem^tm3_clk_v0 worst setup slack: -2.13384 ns sv_chip3_hierarchy_no_mem^tm3_clk_v2 to sv_chip3_hierarchy_no_mem^tm3_clk_v2 worst setup slack: -2.57358 ns Final inter-domain worst setup slacks per constraint: virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v0 worst setup slack: -1.23669 ns virtual_io_clock to sv_chip3_hierarchy_no_mem^tm3_clk_v2 worst setup slack: -0.703663 ns sv_chip3_hierarchy_no_mem^tm3_clk_v0 to virtual_io_clock worst setup slack: -0.822834 ns sv_chip3_hierarchy_no_mem^tm3_clk_v2 to virtual_io_clock worst setup slack: -0.625709 ns Final geomean non-virtual intra-domain period: 2.34341 ns (426.728 MHz) Final fanout-weighted geomean non-virtual intra-domain period: 0.848397 ns (1178.69 MHz) Incr Slack updates 1 in 0.0002749 sec Full Max Req/Worst Slack updates 1 in 0.000106591 sec Incr Max Req/Worst Slack updates 0 in 0 sec Incr Criticality updates 0 in 0 sec Full Criticality updates 1 in 0.000514186 sec Flow timing analysis took 0.765884 seconds (0.64629 STA, 0.119593 slack) (150 full updates: 136 setup, 0 hold, 14 combined). VPR suceeded The entire flow of VPR took 3.21 seconds (max_rss 499.3 MiB) Incr Slack updates 13 in 0.00247087 sec Full Max Req/Worst Slack updates 3 in 0.000310884 sec Incr Max Req/Worst Slack updates 10 in 0.00128805 sec Incr Criticality updates 8 in 0.0032257 sec Full Criticality updates 5 in 0.00236773 sec ================================================================= ==24265==ERROR: LeakSanitizer: detected memory leaks Direct leak of 7168 byte(s) in 56 object(s) allocated from: #0 0x7fdeb2185f30 in realloc (/usr/lib/x86_64-linux-gnu/libasan.so.4+0xdef30) #1 0x7fdeafdc2ae2 (/usr/lib/x86_64-linux-gnu/libstdc++.so.6+0xa7ae2) SUMMARY: AddressSanitizer: 7168 byte(s) leaked in 56 allocation(s). Command exited with non-zero status 1 Command being timed: "/home/khalid88/Documents/vtr-verilog-to-routing/vpr/vpr k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3 --circuit_file stereovision3.pre-vpr.blif --route_chan_width 100 --max_router_iterations 150" User time (seconds): 3.25 System time (seconds): 0.30 Percent of CPU this job got: 99% Elapsed (wall clock) time (h:mm:ss or m:ss): 0:03.57 Average shared text size (kbytes): 0 Average unshared data size (kbytes): 0 Average stack size (kbytes): 0 Average total size (kbytes): 0 Maximum resident set size (kbytes): 520000 Average resident set size (kbytes): 0 Major (requiring I/O) page faults: 0 Minor (reclaiming a frame) page faults: 182005 Voluntary context switches: 7 Involuntary context switches: 9 Swaps: 0 File system inputs: 3753 File system outputs: 2763 Socket messages sent: 0 Socket messages received: 0 Signals delivered: 0 Page size (bytes): 4096 Exit status: 1