We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent f818b57 commit f712d10Copy full SHA for f712d10
doc/src/tutorials/timing_analysis/index.rst
@@ -6,6 +6,8 @@ Post-Implementation Timing Analysis
6
This tutorial describes how to perform static timing analysis (STA) on a circuit which has
7
been implemented by :ref:`VPR` using OpenSTA, an external timing analysis tool.
8
9
+A video of this tutorial can be found here: https://youtu.be/yihFJc7WOfE
10
+
11
External timing analysis can be useful since VPR's timing analyzer (Tatum) does
12
not support all timing constraints and does not provide a TCL interface to allow
13
you to directly interrogate the timing graph. VPR also has limited support for
0 commit comments