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umariqbal-rsumariqbal-rs
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edge_sink_node api created and changes in respective functions
1 parent 8a3abba commit e76f49c

14 files changed

+45
-44
lines changed

‎utils/fasm/test/test_fasm.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -256,7 +256,7 @@ TEST_CASE("fasm_integration_test", "[fasm]") {
256256
const auto& rr_graph = device_ctx.rr_graph;
257257
for(size_t inode = 0; inode < device_ctx.rr_nodes.size(); ++inode) {
258258
for(t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[inode].num_edges(); ++iedge) {
259-
auto sink_inode = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
259+
auto sink_inode = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
260260
auto switch_id = rr_graph.edge_switch(RRNodeId(inode), iedge);
261261
auto value = vtr::string_fmt("%d_%d_%zu",
262262
inode, sink_inode, switch_id);

‎vpr/src/draw/draw.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1689,7 +1689,7 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
16891689
from_ptc_num = rr_graph.node_ptc_num(RRNodeId(inode));
16901690

16911691
for (t_edge_size iedge = 0, l = device_ctx.rr_nodes[inode].num_edges(); iedge < l; iedge++) {
1692-
to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
1692+
to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
16931693
to_type = rr_graph.node_type(RRNodeId(to_node));
16941694
to_ptc_num = rr_graph.node_ptc_num(RRNodeId(to_node));
16951695
bool edge_configurable = device_ctx.rr_nodes[inode].edge_is_configurable(iedge);
@@ -2697,12 +2697,12 @@ void highlight_nets(char* message, int hit_node) {
26972697
void draw_highlight_fan_in_fan_out(const std::set<int>& nodes) {
26982698
t_draw_state* draw_state = get_draw_state_vars();
26992699
auto& device_ctx = g_vpr_ctx.device();
2700-
2700+
const auto& rr_graph = device_ctx.rr_graph;
27012701
for (auto node : nodes) {
27022702
/* Highlight the fanout nodes in red. */
27032703
for (t_edge_size iedge = 0, l = device_ctx.rr_nodes[node].num_edges();
27042704
iedge < l; iedge++) {
2705-
int fanout_node = device_ctx.rr_nodes[node].edge_sink_node(iedge);
2705+
int fanout_node = size_t(rr_graph.edge_sink_node(RRNodeId(node), iedge));
27062706

27072707
if (draw_state->draw_rr_node[node].color == ezgl::MAGENTA
27082708
&& draw_state->draw_rr_node[fanout_node].color
@@ -2721,8 +2721,7 @@ void draw_highlight_fan_in_fan_out(const std::set<int>& nodes) {
27212721
for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
27222722
for (t_edge_size iedge = 0, l = device_ctx.rr_nodes[inode].num_edges(); iedge < l;
27232723
iedge++) {
2724-
int fanout_node = device_ctx.rr_nodes[inode].edge_sink_node(
2725-
iedge);
2724+
int fanout_node = size_t(rr_graph.edge_sink_node(RRNodeId(node), iedge));
27262725
if (fanout_node == node) {
27272726
if (draw_state->draw_rr_node[node].color == ezgl::MAGENTA
27282727
&& draw_state->draw_rr_node[inode].color
@@ -2823,13 +2822,13 @@ std::set<int> draw_expand_non_configurable_rr_nodes(int from_node) {
28232822
void draw_expand_non_configurable_rr_nodes_recurr(int from_node,
28242823
std::set<int>& expanded_nodes) {
28252824
auto& device_ctx = g_vpr_ctx.device();
2826-
2825+
const auto& rr_graph = device_ctx.rr_graph;
28272826
expanded_nodes.insert(from_node);
28282827

28292828
for (t_edge_size iedge = 0;
28302829
iedge < device_ctx.rr_nodes[from_node].num_edges(); ++iedge) {
28312830
bool edge_configurable = device_ctx.rr_nodes[from_node].edge_is_configurable(iedge);
2832-
int to_node = device_ctx.rr_nodes[from_node].edge_sink_node(iedge);
2831+
int to_node = size_t(rr_graph.edge_sink_node(RRNodeId(from_node), iedge));
28332832

28342833
if (!edge_configurable && !expanded_nodes.count(to_node)) {
28352834
draw_expand_non_configurable_rr_nodes_recurr(to_node,
@@ -3783,9 +3782,10 @@ bool trace_routed_connection_rr_nodes_recurr(const t_rt_node* rt_node,
37833782
//Find the edge between two rr nodes
37843783
static t_edge_size find_edge(int prev_inode, int inode) {
37853784
auto& device_ctx = g_vpr_ctx.device();
3785+
const auto& rr_graph = device_ctx.rr_graph;
37863786
for (t_edge_size iedge = 0;
37873787
iedge < device_ctx.rr_nodes[prev_inode].num_edges(); ++iedge) {
3788-
if (device_ctx.rr_nodes[prev_inode].edge_sink_node(iedge) == inode) {
3788+
if (size_t(rr_graph.edge_sink_node(RRNodeId(prev_inode), iedge)) == inode) {
37893789
return iedge;
37903790
}
37913791
}

‎vpr/src/place/timing_place_lookup.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1167,16 +1167,16 @@ bool directconnect_exists(int src_rr_node, int sink_rr_node) {
11671167

11681168
//TODO: This is a constant depth search, but still may be too slow
11691169
for (t_edge_size i_src_edge = 0; i_src_edge < rr_nodes[src_rr_node].num_edges(); ++i_src_edge) {
1170-
int opin_rr_node = rr_nodes[src_rr_node].edge_sink_node(i_src_edge);
1170+
int opin_rr_node = size_t(rr_graph.edge_sink_node(RRNodeId(src_rr_node), i_src_edge));
11711171

11721172
if (rr_graph.node_type(RRNodeId(opin_rr_node)) != OPIN) continue;
11731173

11741174
for (t_edge_size i_opin_edge = 0; i_opin_edge < rr_nodes[opin_rr_node].num_edges(); ++i_opin_edge) {
1175-
int ipin_rr_node = rr_nodes[opin_rr_node].edge_sink_node(i_opin_edge);
1175+
int ipin_rr_node = size_t(rr_graph.edge_sink_node(RRNodeId(opin_rr_node), i_opin_edge));
11761176
if (rr_graph.node_type(RRNodeId(ipin_rr_node)) != IPIN) continue;
11771177

11781178
for (t_edge_size i_ipin_edge = 0; i_ipin_edge < rr_nodes[ipin_rr_node].num_edges(); ++i_ipin_edge) {
1179-
if (sink_rr_node == rr_nodes[ipin_rr_node].edge_sink_node(i_ipin_edge)) {
1179+
if (sink_rr_node == size_t(rr_graph.edge_sink_node(RRNodeId(ipin_rr_node), i_ipin_edge))) {
11801180
return true;
11811181
}
11821182
}

‎vpr/src/power/power.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -822,7 +822,7 @@ static void power_usage_routing(t_power_usage* power_usage,
822822
}
823823

824824
for (t_edge_size edge_idx = 0; edge_idx < node.num_edges(); edge_idx++) {
825-
const auto& next_node_id = node.edge_sink_node(edge_idx);
825+
const auto& next_node_id = size_t(rr_graph.edge_sink_node(RRNodeId(trace->index), edge_idx));
826826
if (next_node_id != OPEN) {
827827
t_rr_node_power* next_node_power = &rr_node_power[next_node_id];
828828

@@ -1261,11 +1261,11 @@ void power_routing_init(const t_det_routing_arch* routing_arch) {
12611261
auto node = device_ctx.rr_nodes[rr_node_idx];
12621262

12631263
for (t_edge_size edge_idx = 0; edge_idx < node.num_edges(); edge_idx++) {
1264-
if (node.edge_sink_node(edge_idx) != OPEN) {
1265-
if (rr_node_power[node.edge_sink_node(edge_idx)].driver_switch_type == OPEN) {
1266-
rr_node_power[node.edge_sink_node(edge_idx)].driver_switch_type = rr_graph.edge_switch(RRNodeId(rr_node_idx), edge_idx);
1264+
if (size_t(rr_graph.edge_sink_node(RRNodeId(rr_node_idx), edge_idx)) != OPEN) {
1265+
if (rr_node_power[size_t(rr_graph.edge_sink_node(RRNodeId(rr_node_idx), edge_idx))].driver_switch_type == OPEN) {
1266+
rr_node_power[size_t(rr_graph.edge_sink_node(RRNodeId(rr_node_idx), edge_idx))].driver_switch_type = rr_graph.edge_switch(RRNodeId(rr_node_idx), edge_idx);
12671267
} else {
1268-
VTR_ASSERT(rr_node_power[node.edge_sink_node(edge_idx)].driver_switch_type == rr_graph.edge_switch(RRNodeId(rr_node_idx), edge_idx));
1268+
VTR_ASSERT(rr_node_power[size_t(rr_graph.edge_sink_node(RRNodeId(rr_node_idx), edge_idx))].driver_switch_type == rr_graph.edge_switch(RRNodeId(rr_node_idx), edge_idx));
12691269
}
12701270
}
12711271
}

‎vpr/src/route/check_route.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -310,7 +310,7 @@ static bool check_adjacent(int from_node, int to_node) {
310310
reached = false;
311311

312312
for (t_edge_size iconn = 0; iconn < device_ctx.rr_nodes[from_node].num_edges(); iconn++) {
313-
if (device_ctx.rr_nodes[from_node].edge_sink_node(iconn) == to_node) {
313+
if (size_t(rr_graph.edge_sink_node(RRNodeId(from_node), iconn)) == to_node) {
314314
reached = true;
315315
break;
316316
}

‎vpr/src/route/check_rr_graph.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ void check_rr_graph(const t_graph_type graph_type,
8080
edges.reserve(num_edges);
8181

8282
for (int iedge = 0; iedge < num_edges; iedge++) {
83-
int to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
83+
int to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
8484

8585
if (to_node < 0 || to_node >= (int)device_ctx.rr_nodes.size()) {
8686
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
@@ -110,7 +110,7 @@ void check_rr_graph(const t_graph_type graph_type,
110110

111111
//Check that multiple edges between the same from/to nodes make sense
112112
for (int iedge = 0; iedge < num_edges; iedge++) {
113-
int to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
113+
int to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
114114

115115
auto range = std::equal_range(edges.begin(), edges.end(),
116116
to_node, node_edge_sorter());
@@ -547,7 +547,7 @@ static void check_unbuffered_edges(int from_node) {
547547
from_num_edges = device_ctx.rr_nodes[from_node].num_edges();
548548

549549
for (from_edge = 0; from_edge < from_num_edges; from_edge++) {
550-
to_node = device_ctx.rr_nodes[from_node].edge_sink_node(from_edge);
550+
to_node = size_t(rr_graph.edge_sink_node(RRNodeId(from_node), from_edge));
551551
to_rr_type = rr_graph.node_type(RRNodeId(to_node));
552552

553553
if (to_rr_type != CHANX && to_rr_type != CHANY)
@@ -566,7 +566,7 @@ static void check_unbuffered_edges(int from_node) {
566566
trans_matched = false;
567567

568568
for (to_edge = 0; to_edge < to_num_edges; to_edge++) {
569-
if (device_ctx.rr_nodes[to_node].edge_sink_node(to_edge) == from_node
569+
if (size_t(rr_graph.edge_sink_node(RRNodeId(to_node), to_edge)) == from_node
570570
&& rr_graph.edge_switch(RRNodeId(to_node), to_edge) == from_switch_type) {
571571
trans_matched = true;
572572
break;

‎vpr/src/route/route_common.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -631,7 +631,7 @@ static std::pair<t_trace*, t_trace*> add_trace_non_configurable_recurr(int node,
631631
for (auto iedge : device_ctx.rr_nodes[node].non_configurable_edges()) {
632632
VTR_ASSERT_SAFE(!device_ctx.rr_nodes[node].edge_is_configurable(iedge));
633633

634-
int to_node = device_ctx.rr_nodes[node].edge_sink_node(iedge);
634+
int to_node = size_t(rr_graph.edge_sink_node(RRNodeId(node), iedge));
635635

636636
if (!trace_nodes.count(to_node)) {
637637
unvisited_non_configurable_edges.push_back(iedge);
@@ -654,7 +654,7 @@ static std::pair<t_trace*, t_trace*> add_trace_non_configurable_recurr(int node,
654654
} else {
655655
//Recursive case: intermediate node with non-configurable edges
656656
for (auto iedge : unvisited_non_configurable_edges) {
657-
int to_node = device_ctx.rr_nodes[node].edge_sink_node(iedge);
657+
int to_node = size_t(rr_graph.edge_sink_node(RRNodeId(node), iedge));
658658
int iswitch = rr_graph.edge_switch(RRNodeId(node), iedge);
659659

660660
VTR_ASSERT(!trace_nodes.count(to_node));
@@ -1427,7 +1427,7 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f
14271427
from_node = route_ctx.rr_blk_source[blk_id][iclass];
14281428
num_edges = device_ctx.rr_nodes[from_node].num_edges();
14291429
for (iconn = 0; iconn < num_edges; iconn++) {
1430-
to_node = device_ctx.rr_nodes[from_node].edge_sink_node(iconn);
1430+
to_node = size_t(rr_graph.edge_sink_node(RRNodeId(from_node), iconn));
14311431

14321432
VTR_ASSERT(rr_graph.node_type(RRNodeId(to_node)) == OPIN);
14331433

@@ -1565,7 +1565,7 @@ bool validate_traceback_recurr(t_trace* trace, std::set<int>& seen_rr_nodes) {
15651565
const auto& rr_graph = device_ctx.rr_graph;
15661566
bool found = false;
15671567
for (t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[trace->index].num_edges(); ++iedge) {
1568-
int to_node = device_ctx.rr_nodes[trace->index].edge_sink_node(iedge);
1568+
int to_node = size_t(rr_graph.edge_sink_node(RRNodeId(trace->index), iedge));
15691569

15701570
if (to_node == next->index) {
15711571
found = true;

‎vpr/src/route/router_lookahead_map_utils.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -265,7 +265,7 @@ void expand_dijkstra_neighbours(const t_rr_graph_storage& rr_nodes,
265265
auto& device_ctx = g_vpr_ctx.device();
266266
const auto& rr_graph = device_ctx.rr_graph;
267267
for (int iedge = 0; iedge < parent_node.num_edges(); iedge++) {
268-
int child_node_ind = parent_node.edge_sink_node(iedge);
268+
int child_node_ind = size_t(rr_graph.edge_sink_node(RRNodeId(parent), iedge));
269269
int switch_ind = rr_graph.edge_switch(parent, iedge);
270270

271271
/* skip this child if it has already been expanded from */

‎vpr/src/route/rr_graph_area.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -167,7 +167,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
167167
num_edges = device_ctx.rr_nodes[from_node].num_edges();
168168

169169
for (iedge = 0; iedge < num_edges; iedge++) {
170-
RRNodeId to_node = RRNodeId(device_ctx.rr_nodes[from_node].edge_sink_node(iedge));
170+
RRNodeId to_node = RRNodeId(size_t(rr_graph.edge_sink_node(RRNodeId(from_node), iedge)));
171171
to_rr_type = rr_graph.node_type(to_node);
172172

173173
/* Ignore any uninitialized rr_graph nodes */
@@ -365,7 +365,7 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
365365

366366
/* Increment number of inputs per cblock if IPIN */
367367
for (iedge = 0; iedge < num_edges; iedge++) {
368-
RRNodeId to_node = RRNodeId(device_ctx.rr_nodes[from_node].edge_sink_node(iedge));
368+
RRNodeId to_node = RRNodeId(size_t(rr_graph.edge_sink_node(RRNodeId(from_node), iedge)));
369369
to_rr_type = rr_graph.node_type(to_node);
370370

371371
/* Ignore any uninitialized rr_graph nodes */

‎vpr/src/route/rr_graph_timing_params.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) {
5555

5656
if (from_rr_type == CHANX || from_rr_type == CHANY) {
5757
for (t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[inode].num_edges(); iedge++) {
58-
to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
58+
to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
5959
to_rr_type = rr_graph.node_type(RRNodeId(to_node));
6060

6161
if (to_rr_type == CHANX || to_rr_type == CHANY) {
@@ -151,15 +151,15 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) {
151151
else if (from_rr_type == OPIN) {
152152
for (t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[inode].num_edges(); iedge++) {
153153
switch_index = rr_graph.edge_switch(RRNodeId(inode), iedge);
154-
to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
154+
to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
155155
to_rr_type = rr_graph.node_type(RRNodeId(to_node));
156156

157157
if (to_rr_type != CHANX && to_rr_type != CHANY)
158158
continue;
159159

160160
if (rr_graph.node_direction(RRNodeId(to_node)) == Direction::BIDIR) {
161161
Cout = device_ctx.rr_switch_inf[switch_index].Cout;
162-
to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge); /* Will be CHANX or CHANY */
162+
to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge)); /* Will be CHANX or CHANY */
163163
rr_node_C[to_node] += Cout;
164164
}
165165
}
@@ -175,7 +175,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) {
175175
for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
176176
for (t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[inode].num_edges(); iedge++) {
177177
switch_index = rr_graph.edge_switch(RRNodeId(inode), iedge);
178-
to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
178+
to_node = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
179179
to_rr_type = rr_graph.node_type(RRNodeId(to_node));
180180
if (to_rr_type == CHANX || to_rr_type == CHANY) {
181181
if (rr_graph.node_direction(RRNodeId(to_node)) != Direction::BIDIR) {

‎vpr/src/route/rr_graph_uxsdcxx_serializer.h

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -145,8 +145,9 @@ class t_metadata_dict_iterator {
145145

146146
class EdgeWalker {
147147
public:
148-
void initialize(const t_rr_graph_storage* nodes) {
148+
void initialize(const t_rr_graph_storage* nodes, const RRGraphView* rr_graph) {
149149
nodes_ = nodes;
150+
rr_graph_ = rr_graph;
150151
num_edges_ = 0;
151152
current_src_inode_ = 0;
152153
current_edge_ = 0;
@@ -166,12 +167,11 @@ class EdgeWalker {
166167
}
167168
int current_sink_node() const {
168169
VTR_ASSERT(current_src_inode_ < nodes_->size());
169-
return (*nodes_)[current_src_inode_].edge_sink_node(current_edge_);
170+
return size_t(rr_graph_->edge_sink_node(RRNodeId(current_src_inode_), current_edge_));
170171
}
171172
int current_switch_id_node() const {
172173
VTR_ASSERT(current_src_inode_ < nodes_->size());
173-
return nodes_->edge_switch(RRNodeId(current_src_inode_), current_edge_);
174-
;
174+
return rr_graph_->edge_switch(RRNodeId(current_src_inode_), current_edge_);
175175
}
176176

177177
size_t advance(int n) {
@@ -205,6 +205,7 @@ class EdgeWalker {
205205

206206
private:
207207
const t_rr_graph_storage* nodes_;
208+
const RRGraphView* rr_graph_;
208209
size_t num_edges_;
209210
size_t current_src_inode_;
210211
size_t current_edge_;
@@ -1000,7 +1001,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
10001001

10011002
inline EdgeWalker get_rr_graph_rr_edges(void*& /*ctx*/) final {
10021003
EdgeWalker walker;
1003-
walker.initialize(rr_nodes_);
1004+
walker.initialize(rr_nodes_, rr_graph_);
10041005
return walker;
10051006
}
10061007

‎vpr/src/route/rr_node_impl.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -94,9 +94,9 @@ inline t_edge_size t_rr_node::num_configurable_edges() const {
9494
return storage_->num_configurable_edges(id_);
9595
}
9696

97-
inline int t_rr_node::edge_sink_node(t_edge_size iedge) const {
98-
size_t inode = (size_t)storage_->edge_sink_node(id_, iedge);
99-
return inode;
100-
}
97+
//inline int t_rr_node::edge_sink_node(t_edge_size iedge) const {
98+
// size_t inode = (size_t)storage_->edge_sink_node(id_, iedge);
99+
//return inode;
100+
//}
101101

102102
#endif /* _RR_NODE_IMPL_H_ */

‎vpr/src/util/vpr_utils.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1805,7 +1805,7 @@ void print_switch_usage() {
18051805
int num_edges = from_node.num_edges();
18061806
for (int iedge = 0; iedge < num_edges; iedge++) {
18071807
int switch_index = rr_graph.edge_switch(RRNodeId(inode), iedge);
1808-
int to_node_index = from_node.edge_sink_node(iedge);
1808+
int to_node_index = size_t(rr_graph.edge_sink_node(RRNodeId(inode), iedge));
18091809
// Assumption: suppose for a L4 wire (bi-directional): ----+----+----+----, it can be driven from any point (0, 1, 2, 3).
18101810
// physically, the switch driving from point 1 & 3 should be the same. But we will assign then different switch
18111811
// index; or there is no way to differentiate them after abstracting a 2D wire into a 1D node

‎vpr/test/test_vpr.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -143,7 +143,7 @@ TEST_CASE("read_rr_graph_metadata", "[vpr]") {
143143
}
144144

145145
REQUIRE(src_inode >= 0);
146-
sink_inode = device_ctx.rr_nodes[src_inode].edge_sink_node(0);
146+
sink_inode = size_t(rr_graph.edge_sink_node(RRNodeId(src_inode), 0));
147147
switch_id = rr_graph.edge_switch(RRNodeId(src_inode), 0);
148148

149149
vpr::add_rr_node_metadata(src_inode, vtr::string_view("node"), vtr::string_view("test node"));

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