@@ -34,6 +34,16 @@ using namespace DeviceResources;
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using namespace LogicalNetlist ;
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using namespace capnp ;
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+ /* *
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+ * @brief The FPGA interchange timing model includes three different corners (min, typ and max) for each of the two
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+ * speed_models (slow and fast).
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+ *
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+ * Timing data can be found on PIPs, nodes, site pins and bel pins.
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+ * This function retrieves the timing value based on the wanted speed model and the wanted corner.
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+ *
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+ * More information on the FPGA Interchange timing model can be found here:
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+ * - https://github.com/chipsalliance/fpga-interchange-schema/blob/main/interchange/DeviceResources.capnp
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+ */
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static float get_corner_value (Device::CornerModel::Reader model, const char * speed_model, const char * value) {
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bool slow_model = std::string (speed_model) == std::string (" slow" );
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bool fast_model = std::string (speed_model) == std::string (" fast" );
@@ -287,6 +297,9 @@ struct ArchReader {
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*
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* As the interchange format develops further, with possibly more details, this function can
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* become dynamic, allowing for different parameters for the different architectures.
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+ *
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+ * FIXME: This will require to be dynamically assigned, and a suitable representation added
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+ * to the FPGA interchange device schema.
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*/
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arch_->R_minW_nmos = 6065.520020 ;
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arch_->R_minW_pmos = 18138.500000 ;
@@ -362,6 +375,7 @@ struct ArchReader {
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std::string mux_type_string = entry.first ? " mux_" : " passGate_" ;
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name << mux_type_string;
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+ // FIXME: allow to dynamically choose different speed models and corners
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R = get_corner_value (model.getOutputResistance (), " slow" , " min" );
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name << " R" << std::scientific << R;
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@@ -437,6 +451,10 @@ struct ArchReader {
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arch_->Segments [index ].Rmetal = 0 ;
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arch_->Segments [index ].Cmetal = 0 ;
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arch_->Segments [index ].parallel_axis = BOTH_AXIS;
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+
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+ // TODO: Only bi-directional segments are created, but it the interchange format
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+ // has directionality information on PIPs, which may be used to infer the
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+ // segments' directonality.
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arch_->Segments [index ].directionality = BI_DIRECTIONAL;
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arch_->Segments [index ].arch_wire_switch = 1 ;
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arch_->Segments [index ].arch_opin_switch = 1 ;
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