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fix compiler bugs
1 parent 4e9b249 commit e2b2993

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7 files changed

+17
-22
lines changed

7 files changed

+17
-22
lines changed

libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2051,7 +2051,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
20512051
return uxsd::enum_node_type::OPIN;
20522052
case e_rr_type::IPIN:
20532053
return uxsd::enum_node_type::IPIN;
2054-
case MEDIUM:
2054+
case e_rr_type::MEDIUM:
20552055
return uxsd::enum_node_type::MEDIUM;
20562056
default:
20572057
report_error(

libs/librrgraph/src/utils/describe_rr_node.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ std::string describe_rr_node(const RRGraphView& rr_graph,
3636
msg += vtr::string_fmt(" pin: %d pin_name: %s",
3737
rr_graph.node_pin_num(inode),
3838
pin_name.c_str());
39-
} else if (rr_graph.node_type(inode) == MEDIUM) {
39+
} else if (rr_graph.node_type(inode) == e_rr_type::MEDIUM) {
4040
auto index = rr_graph.node_ptc_num(inode);
4141

4242
msg += vtr::string_fmt(" medium index: %d",

vpr/src/base/read_blif.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
#include <ctime>
2020
#include <sstream>
2121
#include <cctype> //std::isdigit
22+
#include <regex> //std::regex
2223

2324
#include "blifparse.hpp"
2425
#include "atom_netlist.h"

vpr/src/base/read_route.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -616,7 +616,7 @@ void print_route(const Netlist<>& net_list,
616616
}
617617
break;
618618

619-
case MEDIUM:
619+
case e_rr_type::MEDIUM:
620620
fprintf(fp, " INDEX: ");
621621
break;
622622

vpr/src/route/router_lookahead_map.cpp

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -200,13 +200,7 @@ float MapLookahead::get_expected_cost_flat_router(RRNodeId current_node, RRNodeI
200200
t_physical_tile_type_ptr from_physical_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(current_node),
201201
rr_graph.node_ylow(current_node),
202202
rr_graph.node_layer(current_node)});
203-
const VibInf* vib;
204-
if (!device_ctx.arch->vib_infs.empty()) {
205-
vib = device_ctx.vib_grid.get_vib(rr_graph.node_layer(current_node), rr_graph.node_xlow(current_node), rr_graph.node_ylow(current_node));
206-
} else {
207-
vib = nullptr;
208-
}
209-
//const t_vib_inf* vib = device_ctx.vib_grid[rr_graph.node_layer(current_node)][rr_graph.node_xlow(current_node)][rr_graph.node_ylow(current_node)];
203+
210204
int from_node_ptc_num = rr_graph.node_ptc_num(current_node);
211205
t_physical_tile_type_ptr to_physical_type = device_ctx.grid.get_physical_type({rr_graph.node_xlow(target_node),
212206
rr_graph.node_ylow(target_node),

vpr/src/tileable_rr_graph/openfpga_rr_graph_utils.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -24,8 +24,8 @@
2424
vtr::Point<size_t> get_track_rr_node_start_coordinate(const RRGraphView& rr_graph,
2525
const RRNodeId& track_rr_node) {
2626
/* Make sure we have CHANX or CHANY */
27-
VTR_ASSERT((CHANX == rr_graph.node_type(track_rr_node))
28-
|| (CHANY == rr_graph.node_type(track_rr_node)));
27+
VTR_ASSERT((e_rr_type::CHANX == rr_graph.node_type(track_rr_node))
28+
|| (e_rr_type::CHANY == rr_graph.node_type(track_rr_node)));
2929

3030
vtr::Point<size_t> start_coordinator;
3131

@@ -50,8 +50,8 @@ vtr::Point<size_t> get_track_rr_node_start_coordinate(const RRGraphView& rr_grap
5050
vtr::Point<size_t> get_track_rr_node_end_coordinate(const RRGraphView& rr_graph,
5151
const RRNodeId& track_rr_node) {
5252
/* Make sure we have CHANX or CHANY */
53-
VTR_ASSERT((CHANX == rr_graph.node_type(track_rr_node))
54-
|| (CHANY == rr_graph.node_type(track_rr_node)));
53+
VTR_ASSERT((e_rr_type::CHANX == rr_graph.node_type(track_rr_node))
54+
|| (e_rr_type::CHANY == rr_graph.node_type(track_rr_node)));
5555

5656
vtr::Point<size_t> end_coordinator;
5757

@@ -141,7 +141,7 @@ std::vector<RRNodeId> get_rr_graph_non_configurable_driver_nodes(const RRGraphVi
141141
bool is_opin_direct_connected_ipin(const RRGraphView& rr_graph,
142142
const RRNodeId& node) {
143143
/* We only accept OPIN */
144-
VTR_ASSERT(OPIN == rr_graph.node_type(node));
144+
VTR_ASSERT(e_rr_type::OPIN == rr_graph.node_type(node));
145145

146146
if (1 != rr_graph.node_out_edges(node).size()) {
147147
return false;
@@ -150,7 +150,7 @@ bool is_opin_direct_connected_ipin(const RRGraphView& rr_graph,
150150
VTR_ASSERT(1 == rr_graph.node_out_edges(node).size());
151151
for (auto edge : rr_graph.node_out_edges(node)) {
152152
const RRNodeId& sink_node = rr_graph.edge_sink_node(node, edge);
153-
if (IPIN != rr_graph.node_type(sink_node)) {
153+
if (e_rr_type::IPIN != rr_graph.node_type(sink_node)) {
154154
return false;
155155
}
156156
}
@@ -167,7 +167,7 @@ bool is_opin_direct_connected_ipin(const RRGraphView& rr_graph,
167167
bool is_ipin_direct_connected_opin(const RRGraphView& rr_graph,
168168
const RRNodeId& node) {
169169
/* We only accept IPIN */
170-
VTR_ASSERT(IPIN == rr_graph.node_type(node));
170+
VTR_ASSERT(e_rr_type::IPIN == rr_graph.node_type(node));
171171

172172
if (1 != rr_graph.node_in_edges(node).size()) {
173173
return false;
@@ -176,7 +176,7 @@ bool is_ipin_direct_connected_opin(const RRGraphView& rr_graph,
176176
VTR_ASSERT(1 == rr_graph.node_in_edges(node).size());
177177
for (const RREdgeId& edge : rr_graph.node_in_edges(node)) {
178178
const RRNodeId& src_node = rr_graph.edge_src_node(edge);
179-
if (OPIN != rr_graph.node_type(src_node)) {
179+
if (e_rr_type::OPIN != rr_graph.node_type(src_node)) {
180180
return false;
181181
}
182182
}

vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@ void build_rr_graph_edges_for_source_nodes(const RRGraphView& rr_graph,
2828
size_t edge_count = 0;
2929
for (const RRNodeId& node : rr_graph.nodes()) {
3030
/* Bypass all the non OPIN nodes */
31-
if (OPIN != rr_graph.node_type(node)) {
31+
if (e_rr_type::OPIN != rr_graph.node_type(node)) {
3232
continue;
3333
}
3434
/* Now, we have an OPIN node, we get the source node index */
@@ -41,7 +41,7 @@ void build_rr_graph_edges_for_source_nodes(const RRGraphView& rr_graph,
4141
RRNodeId src_node = rr_graph.node_lookup().find_node(layer,
4242
xlow - grids.get_width_offset(tile_loc),
4343
ylow - grids.get_height_offset(tile_loc),
44-
SOURCE, src_node_class_num);
44+
e_rr_type::SOURCE, src_node_class_num);
4545
VTR_ASSERT(true == rr_graph.valid_node(src_node));
4646

4747
/* add edges to the src_node */
@@ -66,7 +66,7 @@ void build_rr_graph_edges_for_sink_nodes(const RRGraphView& rr_graph,
6666
size_t edge_count = 0;
6767
for (const RRNodeId& node : rr_graph.nodes()) {
6868
/* Bypass all the non IPIN nodes */
69-
if (IPIN != rr_graph.node_type(node)) {
69+
if (e_rr_type::IPIN != rr_graph.node_type(node)) {
7070
continue;
7171
}
7272
/* Now, we have an OPIN node, we get the source node index */
@@ -79,7 +79,7 @@ void build_rr_graph_edges_for_sink_nodes(const RRGraphView& rr_graph,
7979
const RRNodeId& sink_node = rr_graph.node_lookup().find_node(layer,
8080
xlow - grids.get_width_offset(tile_loc),
8181
ylow - grids.get_height_offset(tile_loc),
82-
SINK, sink_node_class_num, TOTAL_2D_SIDES[0]);
82+
e_rr_type::SINK, sink_node_class_num, TOTAL_2D_SIDES[0]);
8383
VTR_ASSERT(true == rr_graph.valid_node(sink_node));
8484

8585
/* add edges to connect the IPIN node to SINK nodes */

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