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update rr_switch_offset_inf when rr_switch is updated based on fanin data
1 parent dda0e33 commit df6062c

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7 files changed

+62
-22
lines changed

7 files changed

+62
-22
lines changed

libs/librrgraph/src/base/rr_graph_builder.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -336,7 +336,7 @@ class RRGraphBuilder {
336336
this->rr_switch_inf_.reserve(num_switches);
337337
}
338338
inline void reserve_switch_offse_info(size_t num_offsets) {
339-
this->rr_switch_offset_inf_.resize(num_offsets);
339+
this->rr_switch_offset_inf_.reserve(num_offsets);
340340
}
341341
/** @brief This function resize node storage to accomidate size RR nodes. */
342342
inline void resize_nodes(size_t size) {

libs/librrgraph/src/base/rr_graph_storage.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -873,6 +873,7 @@ void t_rr_graph_storage::reorder(const vtr::vector<RRNodeId, RRNodeId>& order,
873873
auto old_edge_src_node = edge_src_node_;
874874
auto old_edge_dest_node = edge_dest_node_;
875875
auto old_edge_switch = edge_switch_;
876+
auto old_edge_switch_offset_inf_ = edge_switch_offset_inf_;
876877
auto old_edge_remapped = edge_remapped_;
877878
RREdgeId cur_edge(0);
878879

@@ -886,6 +887,7 @@ void t_rr_graph_storage::reorder(const vtr::vector<RRNodeId, RRNodeId>& order,
886887
edge_src_node_[cur_edge] = order[old_edge_src_node[e]]; // == n?
887888
edge_dest_node_[cur_edge] = order[old_edge_dest_node[e]];
888889
edge_switch_[cur_edge] = old_edge_switch[e];
890+
edge_switch_offset_inf_[cur_edge] = old_edge_switch_offset_inf_[e];
889891
edge_remapped_[cur_edge] = old_edge_remapped[e];
890892
cur_edge = RREdgeId(size_t(cur_edge) + 1);
891893
}

libs/librrgraph/src/base/rr_graph_view.h

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -419,12 +419,20 @@ class RRGraphView {
419419
return node_storage_.edge_switch(id, iedge);
420420
}
421421

422-
inline float edge_delay(RRNodeId id, t_edge_size iedge) const {
423-
RREdgeId edge_id = node_storage_.edge_id(id, iedge);
422+
inline short edge_switch(RREdgeId edge_id) const {
423+
return node_storage_.edge_switch(edge_id);
424+
}
425+
426+
inline float edge_delay(RREdgeId edge_id) const {
424427
RRSwitchOffsetInfoId switch_offset_inf_id = node_storage_.edge_switch_offset_inf(edge_id);
425428
return rr_switch_offset_inf_[switch_offset_inf_id].Tdel;
426429
}
427430

431+
inline float edge_delay(RRNodeId id, t_edge_size iedge) const {
432+
RREdgeId edge_id = node_storage_.edge_id(id, iedge);
433+
return edge_delay(edge_id);
434+
}
435+
428436
/** @brief Return the source node for the specified edge.
429437
*/
430438
inline RRNodeId edge_src_node(const RREdgeId edge_id) const {

libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -630,7 +630,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase<RrGraphContextTypes> {
630630
rr_switch_offset_inf_->reserve(rr_switch_inf_->size());
631631
std::ranges::transform(*rr_switch_inf_,
632632
std::back_inserter(*rr_switch_offset_inf_),
633-
[](const t_rr_switch_inf& rr_sw) -> t_rr_switch_offset_inf {
633+
[](const t_rr_switch_inf& rr_sw) noexcept -> t_rr_switch_offset_inf {
634634
return t_rr_switch_offset_inf{rr_sw};
635635
});
636636
}

libs/librrgraph/src/io/rr_graph_writer.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,7 @@ void write_rr_graph(RRGraphBuilder* rr_graph_builder,
5757
rr_graph_builder,
5858
rr_graph_view,
5959
&rr_graph_builder->rr_switch(),
60+
&rr_graph_builder->rr_switch_offset_inf(),
6061
rr_indexed_data,
6162
rr_rc_data,
6263
arch_switch_inf,

vpr/src/route/router_lookahead_map.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -734,7 +734,8 @@ static void compute_tile_lookahead(std::unordered_map<int, util::t_ipin_primitiv
734734
g_vpr_ctx.device().rr_indexed_data,
735735
g_vpr_ctx.device().rr_rc_data,
736736
rr_graph_builder.rr_segments(),
737-
rr_graph_builder.rr_switch()};
737+
rr_graph_builder.rr_switch(),
738+
rr_graph_builder.rr_switch_offset_inf()};
738739

739740
util::t_ipin_primitive_sink_delays pin_delays = util::compute_intra_tile_dijkstra(rr_graph,
740741
physical_tile,

vpr/src/route/rr_graph.cpp

Lines changed: 45 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33
#include <algorithm>
44
#include <utility>
55
#include <vector>
6+
#include <fstream>
67
#include "vtr_assert.h"
78

89
#include "vtr_util.h"
@@ -890,6 +891,29 @@ void create_rr_graph(const t_graph_type graph_type,
890891
echo_file_name,
891892
is_flat);
892893
}
894+
{
895+
std::ofstream file1("switch_delay.txt");
896+
std::ofstream file2("exact_delay.txt");
897+
898+
if (!file1.is_open() || !file2.is_open()) {
899+
std::cerr << "Error opening files!" << std::endl;
900+
return;
901+
}
902+
903+
for (const RRNodeId driver_node : device_ctx.rr_graph.nodes()) {
904+
for (const RREdgeId edge_id : device_ctx.rr_graph.edge_range(driver_node)) {
905+
int i_switch = device_ctx.rr_graph.edge_switch(edge_id);
906+
float edge_switch_delay = device_ctx.rr_graph.rr_switch_inf(RRSwitchId(i_switch)).Tdel;
907+
float edge_exact_delay = device_ctx.rr_graph.edge_delay(edge_id);
908+
909+
file1 << size_t(edge_id) << " " << edge_switch_delay << "\n";
910+
file2 << size_t(edge_id) << " " << edge_exact_delay << "\n";
911+
}
912+
}
913+
914+
file1.close();
915+
file2.close();
916+
}
893917
}
894918

895919
static void add_intra_cluster_edges_rr_graph(RRGraphBuilder& rr_graph_builder,
@@ -1860,29 +1884,33 @@ void load_rr_switch_from_arch_switch(RRGraphBuilder& rr_graph_builder,
18601884
int fanin,
18611885
const float R_minW_nmos,
18621886
const float R_minW_pmos) {
1863-
/* figure out, by looking at the arch switch's Tdel map, what the delay of the new
1864-
* rr switch should be */
1865-
double rr_switch_Tdel = arch_sw_inf.at(arch_switch_idx).Tdel(fanin);
1887+
const t_arch_switch_inf& arch_switch = arch_sw_inf.at(arch_switch_idx);
1888+
t_rr_switch_inf& rr_switch_to_be_updated = rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)];
1889+
t_rr_switch_offset_inf& rr_switch_offset_to_be_updated = rr_graph_builder.rr_switch_offset_inf()[RRSwitchOffsetInfoId (rr_switch_idx)];
18661890

18671891
/* copy over the arch switch to rr_switch_inf[rr_switch_idx], but with the changed Tdel value */
1868-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].set_type(arch_sw_inf.at(arch_switch_idx).type());
1869-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].R = arch_sw_inf.at(arch_switch_idx).R;
1870-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].Cin = arch_sw_inf.at(arch_switch_idx).Cin;
1871-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].Cinternal = arch_sw_inf.at(arch_switch_idx).Cinternal;
1872-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].Cout = arch_sw_inf.at(arch_switch_idx).Cout;
1873-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].Tdel = rr_switch_Tdel;
1874-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].mux_trans_size = arch_sw_inf.at(arch_switch_idx).mux_trans_size;
1875-
if (arch_sw_inf.at(arch_switch_idx).buf_size_type == BufferSize::AUTO) {
1892+
rr_switch_to_be_updated.set_type(arch_switch.type());
1893+
rr_switch_to_be_updated.R = arch_switch.R;
1894+
rr_switch_to_be_updated.Cin = arch_switch.Cin;
1895+
rr_switch_to_be_updated.Cinternal = arch_switch.Cinternal;
1896+
rr_switch_to_be_updated.Cout = arch_switch.Cout;
1897+
/* figure out, by looking at the arch switch's Tdel map, what the delay of the new
1898+
* rr switch should be */
1899+
rr_switch_to_be_updated.Tdel = arch_switch.Tdel(fanin);
1900+
rr_switch_to_be_updated.mux_trans_size = arch_switch.mux_trans_size;
1901+
if (arch_switch.buf_size_type == BufferSize::AUTO) {
18761902
//Size based on resistance
1877-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].buf_size = trans_per_buf(arch_sw_inf.at(arch_switch_idx).R, R_minW_nmos, R_minW_pmos);
1903+
rr_switch_to_be_updated.buf_size = trans_per_buf(arch_switch.R, R_minW_nmos, R_minW_pmos);
18781904
} else {
1879-
VTR_ASSERT(arch_sw_inf.at(arch_switch_idx).buf_size_type == BufferSize::ABSOLUTE);
1905+
VTR_ASSERT(arch_switch.buf_size_type == BufferSize::ABSOLUTE);
18801906
//Use the specified size
1881-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].buf_size = arch_sw_inf.at(arch_switch_idx).buf_size;
1907+
rr_switch_to_be_updated.buf_size = arch_switch.buf_size;
18821908
}
1883-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].name = arch_sw_inf.at(arch_switch_idx).name;
1884-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].power_buffer_type = arch_sw_inf.at(arch_switch_idx).power_buffer_type;
1885-
rr_graph_builder.rr_switch()[RRSwitchId(rr_switch_idx)].power_buffer_size = arch_sw_inf.at(arch_switch_idx).power_buffer_size;
1909+
rr_switch_to_be_updated.name = arch_switch.name;
1910+
rr_switch_to_be_updated.power_buffer_type = arch_switch.power_buffer_type;
1911+
rr_switch_to_be_updated.power_buffer_size = arch_switch.power_buffer_size;
1912+
1913+
rr_switch_offset_to_be_updated.Tdel = rr_switch_to_be_updated.Tdel;
18861914
}
18871915

18881916
/* switch indices of each rr_node original point into the global device_ctx.arch_switch_inf array.

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