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amirarjmand93amirarjmand93
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vtr golden result updated
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‎.github/workflows/test.yml

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -64,9 +64,21 @@ jobs:
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- {test: "vtr_reg_strong", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_strong_odin", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_strong_odin", cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
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<<<<<<< HEAD
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- {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""}
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- {test: "odin_reg_strong", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
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- {test: "parmys_reg_strong", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""}
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=======
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<<<<<<< HEAD
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#- {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""}
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- {test: "odin_reg_strong", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
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#- {test: "parmys_reg_strong", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""}
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=======
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#- {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""}
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- {test: "odin_reg_strong", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""}
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- {test: "parmys_reg_strong", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=OFF", extra_pkgs: ""}
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>>>>>>> a23006e1e (vtr golden result updated)
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>>>>>>> f839aab8a (vtr golden result updated)
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env:
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DEBIAN_FRONTEND: "noninteractive"

‎parmys/regression_test/benchmark/suite/koios_weekly_suite/task_list.conf

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Original file line numberDiff line numberDiff line change
@@ -2,5 +2,5 @@ regression_test/benchmark/task/koios/koios_large
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regression_test/benchmark/task/koios/koios_large_no_hb
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regression_test/benchmark/task/koios/koios_proxy
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regression_test/benchmark/task/koios/koios_proxy_no_hb
5-
regression_test/benchmark/task/koios/koios_sv
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regression_test/benchmark/task/koios/koios_sv_no_hb
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#regression_test/benchmark/task/koios/koios_sv
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#regression_test/benchmark/task/koios/koios_sv_no_hb

‎parmys/regression_test/benchmark/task/freecores/synthesis_result.json

Lines changed: 19 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -479,20 +479,20 @@
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"Multiplier": 1,
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"Memory": 8,
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"generic logic size": 4,
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"Longest Path": 269,
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"Longest Path": 274,
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"Average Path": 3,
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"Estimated LUTs": 4797,
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"Estimated LUTs": 4777,
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"Total Node": 1957,
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"Wires": 5595,
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"Wire Bits": 10315,
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"Wires": 5591,
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"Wire Bits": 10025,
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"Public Wires": 240,
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"Public Wire Bits": 240,
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"Total Cells": 8221,
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"MUX": 2180,
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"Total Cells": 8185,
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"MUX": 2164,
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"XOR": 40,
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"OR": 2850,
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"AND": 1455,
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"NOT": 639,
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"OR": 2836,
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"AND": 1451,
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"NOT": 637,
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"DFFs": [
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"$_DFF_P_ 645"
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],
@@ -533,8 +533,8 @@
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"Average Path": 3,
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"Estimated LUTs": 41888,
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"Total Node": 5344,
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"Wires": 9772,
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"Wire Bits": 102222,
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"Wires": 9777,
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"Wire Bits": 102242,
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"Public Wires": 391,
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"Public Wire Bits": 391,
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"Total Cells": 31999,
@@ -585,8 +585,8 @@
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"Average Path": 3,
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"Estimated LUTs": 42386,
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"Total Node": 5593,
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"Wires": 10802,
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"Wire Bits": 103242,
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"Wires": 10796,
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"Wire Bits": 103210,
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"Public Wires": 648,
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"Public Wire Bits": 648,
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"Total Cells": 32995,
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"Average Path": 4,
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"Estimated LUTs": 4564,
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"Total Node": 2961,
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"Wires": 6943,
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"Wire Bits": 11526,
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"Wires": 6934,
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"Wire Bits": 11506,
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"Public Wires": 501,
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"Public Wire Bits": 501,
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"Total Cells": 8995,
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"Total Cells": 8955,
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"MUX": 2605,
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"XOR": 311,
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"OR": 1858,
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"AND": 1687,
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"NOT": 711,
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"OR": 1861,
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"AND": 1683,
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"NOT": 672,
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"DFFs": [
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"$_DFF_P_ 1312"
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],
@@ -861,9 +861,6 @@
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"test_name": "freecores/mips_16/k6_frac_N10_frac_chain_mem32K_40nm",
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"architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml",
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"warnings": [
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"mips_16.v:0 System task `$display' outside initial block is unsupported.",
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"mips_16.v:0 System task `$display' outside initial block is unsupported.",
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"mips_16.v:0 System task `$display' outside initial block is unsupported.",
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"Replacing memory \\reg_array with list of registers. See ../vtr_flow/benchmarks//freecores/mips_16.v:791",
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"Ignoring module EX_stage because it contains processes (run 'proc' command first).",
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"Ignoring module data_mem because it contains processes (run 'proc' command first).",

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