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[vpr] update gsb builder in tileable rr graph for changing the coordindate system of gsb
1 parent e9d5647 commit d338952

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2 files changed

+36
-15
lines changed

2 files changed

+36
-15
lines changed

vpr/src/tileable_rr_graph/tileable_rr_graph_edge_builder.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -125,10 +125,7 @@ void build_rr_graph_edges(const RRGraphView& rr_graph,
125125
build_rr_graph_edges_for_source_nodes(rr_graph, rr_graph_builder, rr_node_driver_switches, grids, layer, num_edges_to_create);
126126
build_rr_graph_edges_for_sink_nodes(rr_graph, rr_graph_builder, rr_node_driver_switches, grids, layer, num_edges_to_create);
127127

128-
vtr::Point<size_t> gsb_range(grids.width() - 2, grids.height() - 2);
129-
if (perimeter_cb) {
130-
gsb_range.set(grids.width() - 1, grids.height() - 1);
131-
}
128+
vtr::Point<size_t> gsb_range(grids.width() - 1, grids.height() - 1);
132129

133130
/* Go Switch Block by Switch Block */
134131
for (size_t ix = 0; ix <= gsb_range.x(); ++ix) {

vpr/src/tileable_rr_graph/tileable_rr_graph_gsb.cpp

Lines changed: 35 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -625,6 +625,30 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
625625
const size_t& layer,
626626
const vtr::Point<size_t>& gsb_coordinate,
627627
const bool& perimeter_cb) {
628+
/* Bounding box for GSB ranges on routing tracks.
629+
* Note that when perimeter connection blocks are not allowed,
630+
* - top side routing tracks for any GSB exist on y = [0, H-2)
631+
* - right side routing tracks for any GSB exist on x = [0, W-2)
632+
* - bottom side routing tracks for any GSB exist on y = [1, H-1)
633+
* - left side routing tracks for any GSB exist on x = [1, W-1)
634+
* Note that when perimeter connection blocks are allowed,
635+
* - top side routing tracks for any GSB exist on y = [0, H-1)
636+
* - right side routing tracks for any GSB exist on x = [0, W-1)
637+
* - bottom side routing tracks for any GSB exist on y = [0, H)
638+
* - left side routing tracks for any GSB exist on x = [0, W)
639+
*/
640+
size_t std::map<e_side, vtr:Point<size_t>> track_range;
641+
track_range[TOP] = vtr:Point<size_t>(0, grids.height() - 2);
642+
track_range[RIGHT] = vtr:Point<size_t>(0, grids.width() - 2);
643+
track_range[BOTTOM] = vtr:Point<size_t>(1, grids.height() - 2);
644+
track_range[LEFT] = vtr:Point<size_t>(1, grids.width() - 2);
645+
if (perimeter_cb) {
646+
track_range[TOP] = vtr:Point<size_t>(0, grids.height() - 1);
647+
track_range[RIGHT] = vtr:Point<size_t>(0, grids.width() - 1);
648+
track_range[BOTTOM] = vtr:Point<size_t>(0, grids.height());
649+
track_range[LEFT] = vtr:Point<size_t>(0, grids.width());
650+
}
651+
628652
/* Create an object to return */
629653
RRGSB rr_gsb;
630654

@@ -659,8 +683,8 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
659683

660684
switch (side) {
661685
case TOP: /* TOP = 0 */
662-
/* For the bording, we should take special care */
663-
if (gsb_coordinate.y() == grids.height() - 1) {
686+
/* For the border, we should take special care. The top column (H-1) does not have any top side routing channel. Any lower column may have (<= H-2) */
687+
if (track_range[side].x() > gsb_coordinate.y() || gsb_coordinate.y() >= track_range[side].y()) {
664688
rr_gsb.clear_one_side(side_manager.get_side());
665689
break;
666690
}
@@ -689,8 +713,8 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
689713

690714
break;
691715
case RIGHT: /* RIGHT = 1 */
692-
/* For the bording, we should take special care */
693-
if (gsb_coordinate.x() == grids.width() - 1) {
716+
/* For the border, we should take special care. The rightmost column (W-1) does not have any right side routing channel. If perimeter connection block is not enabled, even the last second rightmost column (W-2) does not have any right side routing channel */
717+
if (track_range[side].x() > gsb_coordinate.x() || gsb_coordinate.x() >= track_range[side].y()) {
694718
rr_gsb.clear_one_side(side_manager.get_side());
695719
break;
696720
}
@@ -719,8 +743,8 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
719743
OPIN, opin_grid_side[1]);
720744
break;
721745
case BOTTOM: /* BOTTOM = 2*/
722-
/* For the bording, we should take special care */
723-
if (!perimeter_cb && gsb_coordinate.y() == 0) {
746+
/* For the border, we should take special care */
747+
if (track_range[side].x() > gsb_coordinate.y() || gsb_coordinate.y() >= track_range[side].y()) {
724748
rr_gsb.clear_one_side(side_manager.get_side());
725749
break;
726750
}
@@ -749,8 +773,8 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
749773
OPIN, opin_grid_side[1]);
750774
break;
751775
case LEFT: /* LEFT = 3 */
752-
/* For the bording, we should take special care */
753-
if (!perimeter_cb && gsb_coordinate.x() == 0) {
776+
/* For the border, we should take special care */
777+
if (track_range[side].x() > gsb_coordinate.x() || gsb_coordinate.x() >= track_range[side].y()) {
754778
rr_gsb.clear_one_side(side_manager.get_side());
755779
break;
756780
}
@@ -846,7 +870,7 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
846870
* - The concept of top/bottom side of connection block in GSB domain:
847871
*
848872
* ---------------+ +---------------------- ... ---------------------+ +----------------
849-
* Grid[x][y+1] |->| Y- Connection Block Y- Connection Block |<-| Grid[x+1][y+1]
873+
* Grid[x][y] |->| Y- Connection Block Y- Connection Block |<-| Grid[x+1][y]
850874
* RIGHT side | | LEFT side ... RIGHT side | | LEFT side
851875
* --------------+ +---------------------- ... ---------------------+ +----------------
852876
*
@@ -873,7 +897,7 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
873897
chan_side = TOP;
874898
/* The input pins of the routing channel come from the left side of Grid[x+1][y+1] */
875899
ix = rr_gsb.get_sb_x() + 1;
876-
iy = rr_gsb.get_sb_y() + 1;
900+
iy = rr_gsb.get_sb_y();
877901
ipin_rr_node_grid_side = LEFT;
878902
break;
879903
case BOTTOM:
@@ -889,7 +913,7 @@ RRGSB build_one_tileable_rr_gsb(const DeviceGrid& grids,
889913
chan_side = TOP;
890914
/* The input pins of the routing channel come from the right side of Grid[x][y+1] */
891915
ix = rr_gsb.get_sb_x();
892-
iy = rr_gsb.get_sb_y() + 1;
916+
iy = rr_gsb.get_sb_y();
893917
ipin_rr_node_grid_side = RIGHT;
894918
break;
895919
default:

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