Merge pull request #1786 from byuccl/vtr_new_routing

vaughnbetz · web-flow · commit c4279ddec361 · 2021-07-30T12:26:56.000-04:00
Added the ability to perform detailed routing with different channel widths
diff --git a/doc/src/arch/reference.rst b/doc/src/arch/reference.rst
@@ -754,7 +754,7 @@ Global Routing Information
 If global routing is to be performed, channels in different directions and in different parts of the FPGA can be set to different relative widths.
 This is specified in the content within the ``<chan_width_distr>`` tag.
 
-.. note:: If detailed routing is to be performed, all the channels in the FPGA must have the same width.
+.. note:: If detailed routing is to be performed, only uniform distributions may be used
 
 .. arch:tag:: <x distr="{gaussian|uniform|pulse|delta}" peak="float" width=" float" xpeak=" float" dc=" float"/>
 
diff --git a/utils/route_diag/src/main.cpp b/utils/route_diag/src/main.cpp
@@ -215,12 +215,12 @@ static void profile_source(int source_rr_node,
     VTR_LOG("\n");
 }
 
-
 static t_chan_width setup_chan_width(t_router_opts router_opts,
         t_chan_width_dist chan_width_dist) {
     /*we give plenty of tracks, this increases routability for the */
     /*lookup table generation */
 
+    t_graph_type graph_directionality;
     int width_fac;
 
     if (router_opts.fixed_channel_width == NO_FIXED_CHANNEL_WIDTH) {
@@ -236,7 +236,13 @@ static t_chan_width setup_chan_width(t_router_opts router_opts,
         width_fac = router_opts.fixed_channel_width;
     }
 
-    return init_chan(width_fac, chan_width_dist);
+    if (router_opts.route_type == GLOBAL) {
+        graph_directionality = GRAPH_BIDIR;
+    } else {
+        graph_directionality = GRAPH_UNIDIR;
+    }
+
+    return init_chan(width_fac, chan_width_dist, graph_directionality);
 }
 
 t_route_util_options read_route_util_options(int argc, const char** argv) {
@@ -289,7 +295,6 @@ int main(int argc, const char **argv) {
 
         vpr_setup_clock_networks(vpr_setup, Arch);
 
-
         t_chan_width chan_width = setup_chan_width(
                 vpr_setup.RouterOpts,
                 Arch.Chans);
diff --git a/vpr/src/base/CheckSetup.cpp b/vpr/src/base/CheckSetup.cpp
@@ -63,10 +63,9 @@ void CheckSetup(const t_packer_opts& PackerOpts,
 
     if (DETAILED == RouterOpts.route_type) {
         if ((Chans.chan_x_dist.type != UNIFORM)
-            || (Chans.chan_y_dist.type != UNIFORM)
-            || (Chans.chan_x_dist.peak != Chans.chan_y_dist.peak)) {
+            || (Chans.chan_y_dist.type != UNIFORM)) {
             VPR_FATAL_ERROR(VPR_ERROR_OTHER,
-                            "Detailed routing currently only supported on FPGAs with all channels of equal width.\n");
+                            "Detailed routing currently only supported on FPGAs with uniform channel distributions.\n");
         }
     }
 
diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp
@@ -39,6 +39,7 @@
 
 /******************* Subroutines local to this module ************************/
 
+static int compute_chan_width(int cfactor, t_chan chan_dist, float distance, float separation, t_graph_type graph_directionality);
 static float comp_width(t_chan* chan, float x, float separation);
 
 /************************* Subroutine Definitions ****************************/
@@ -76,6 +77,7 @@ int binary_search_place_and_route(const t_placer_opts& placer_opts_ref,
     int warnings;
 
     t_graph_type graph_type;
+    t_graph_type graph_directionality;
 
     /* We have chosen to pass placer_opts_ref by reference because of its large size. *
      * However, since the value is mutated later in the function, we declare a        *
@@ -87,8 +89,10 @@ int binary_search_place_and_route(const t_placer_opts& placer_opts_ref,
 
     if (router_opts.route_type == GLOBAL) {
         graph_type = GRAPH_GLOBAL;
+        graph_directionality = GRAPH_BIDIR;
     } else {
         graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
+        graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
     }
 
     best_routing = alloc_saved_routing();
@@ -342,7 +346,7 @@ int binary_search_place_and_route(const t_placer_opts& placer_opts_ref,
     /* End binary search verification. */
     /* Restore the best placement (if necessary), the best routing, and  *
      * * the best channel widths for final drawing and statistics output.  */
-    t_chan_width chan_width = init_chan(final, arch->Chans);
+    t_chan_width chan_width = init_chan(final, arch->Chans, graph_directionality);
 
     free_rr_graph();
 
@@ -383,9 +387,11 @@ int binary_search_place_and_route(const t_placer_opts& placer_opts_ref,
  * @brief Assigns widths to channels (in tracks).
  *
  * Minimum one track per channel. The channel distributions read from
- * the architecture file are scaled by cfactor.
+ * the architecture file are scaled by cfactor. The graph directionality
+ * is used to determine if the channel width should be rounded to an
+ * even number.
  */
-t_chan_width init_chan(int cfactor, t_chan_width_dist chan_width_dist) {
+t_chan_width init_chan(int cfactor, t_chan_width_dist chan_width_dist, t_graph_type graph_directionality) {
     auto& device_ctx = g_vpr_ctx.mutable_device();
     auto& grid = device_ctx.grid;
 
@@ -403,7 +409,7 @@ t_chan_width init_chan(int cfactor, t_chan_width_dist chan_width_dist) {
 
         for (size_t i = 0; i < grid.height(); ++i) {
             float y = float(i) / num_channels;
-            chan_width.x_list[i] = (int)floor(cfactor * comp_width(&chan_x_dist, y, separation) + 0.5);
+            chan_width.x_list[i] = compute_chan_width(cfactor, chan_x_dist, y, separation, graph_directionality);
             chan_width.x_list[i] = std::max(chan_width.x_list[i], 1); //Minimum channel width 1
         }
     }
@@ -415,8 +421,7 @@ t_chan_width init_chan(int cfactor, t_chan_width_dist chan_width_dist) {
 
         for (size_t i = 0; i < grid.width(); ++i) { //-2 for no perim channels
             float x = float(i) / num_channels;
-
-            chan_width.y_list[i] = (int)floor(cfactor * comp_width(&chan_y_dist, x, separation) + 0.5);
+            chan_width.y_list[i] = compute_chan_width(cfactor, chan_y_dist, x, separation, graph_directionality);
             chan_width.y_list[i] = std::max(chan_width.y_list[i], 1); //Minimum channel width 1
         }
     }
@@ -452,6 +457,26 @@ t_chan_width init_chan(int cfactor, t_chan_width_dist chan_width_dist) {
     return chan_width;
 }
 
+/**
+ * @brief Computes the channel width and adjusts it to be an an even number if unidirectional 
+ *        since unidirectional graphs need to have paired wires.
+ * 
+ *   @param cfactor                 Channel width factor: multiplier on the channel width distribution (usually the number of tracks in the widest channel).
+ *   @param chan_dist               Channel width distribution.
+ *   @param x                       The distance (between 0 and 1) we are across the chip.
+ *   @param separation              The distance between two channels in the 0 to 1 coordinate system.
+ *   @param graph_directionality    The directionality of the graph (unidirectional or bidirectional).
+ */
+static int compute_chan_width(int cfactor, t_chan chan_dist, float distance, float separation, t_graph_type graph_directionality) {
+    int computed_width;
+    computed_width = (int)floor(cfactor * comp_width(&chan_dist, distance, separation) + 0.5);
+    if ((GRAPH_BIDIR == graph_directionality) || computed_width % 2 == 0) {
+        return computed_width;
+    } else {
+        return computed_width - 1;
+    }
+}
+
 /**
  * @brief Return the relative channel density.
  *
diff --git a/vpr/src/base/place_and_route.h b/vpr/src/base/place_and_route.h
@@ -11,6 +11,7 @@
 #include "vpr_types.h"
 #include "timing_info.h"
 #include "RoutingDelayCalculator.h"
+#include "rr_graph.h"
 
 struct t_fmap_cell {
     int fs;         ///<at this fs
@@ -35,7 +36,7 @@ int binary_search_place_and_route(const t_placer_opts& placer_opts_ref,
                                   std::shared_ptr<SetupHoldTimingInfo> timing_info,
                                   std::shared_ptr<RoutingDelayCalculator> delay_calc);
 
-t_chan_width init_chan(int cfactor, t_chan_width_dist chan_width_dist);
+t_chan_width init_chan(int cfactor, t_chan_width_dist chan_width_dist, t_graph_type graph_directionality);
 
 void post_place_sync();
 
diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp
@@ -306,8 +306,7 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a
     CheckSetup(vpr_setup->PackerOpts,
                vpr_setup->PlacerOpts,
                vpr_setup->RouterOpts,
-               vpr_setup->RoutingArch, vpr_setup->Segments, vpr_setup->Timing,
-               arch->Chans);
+               vpr_setup->RoutingArch, vpr_setup->Segments, vpr_setup->Timing, arch->Chans);
 
     /* flush any messages to user still in stdout that hasn't gotten displayed */
     fflush(stdout);
@@ -890,15 +889,18 @@ void vpr_create_rr_graph(t_vpr_setup& vpr_setup, const t_arch& arch, int chan_wi
     auto det_routing_arch = &vpr_setup.RoutingArch;
     auto& router_opts = vpr_setup.RouterOpts;
 
-    t_chan_width chan_width = init_chan(chan_width_fac, arch.Chans);
-
     t_graph_type graph_type;
+    t_graph_type graph_directionality;
     if (router_opts.route_type == GLOBAL) {
         graph_type = GRAPH_GLOBAL;
+        graph_directionality = GRAPH_BIDIR;
     } else {
         graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
+        graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
     }
 
+    t_chan_width chan_width = init_chan(chan_width_fac, arch.Chans, graph_directionality);
+
     int warnings = 0;
 
     //Clean-up any previous RR graph
diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp
@@ -442,6 +442,7 @@ void try_place(const t_placer_opts& placer_opts,
     t_placer_statistics stats;
 
     t_placement_checkpoint placement_checkpoint;
+    t_graph_type graph_directionality;
 
     std::shared_ptr<SetupTimingInfo> timing_info;
     std::shared_ptr<PlacementDelayCalculator> placement_delay_calc;
@@ -481,7 +482,13 @@ void try_place(const t_placer_opts& placer_opts,
 
     width_fac = placer_opts.place_chan_width;
 
-    init_chan(width_fac, chan_width_dist);
+    if (router_opts.route_type == GLOBAL) {
+        graph_directionality = GRAPH_BIDIR;
+    } else {
+        graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
+    }
+
+    init_chan(width_fac, chan_width_dist, graph_directionality);
 
     alloc_and_load_placement_structs(placer_opts.place_cost_exp, placer_opts,
                                      directs, num_directs);
diff --git a/vpr/src/place/timing_place_lookup.cpp b/vpr/src/place/timing_place_lookup.cpp
@@ -309,6 +309,7 @@ static t_chan_width setup_chan_width(const t_router_opts& router_opts,
     /*we give plenty of tracks, this increases routability for the */
     /*lookup table generation */
 
+    t_graph_type graph_directionality;
     int width_fac;
 
     if (router_opts.fixed_channel_width == NO_FIXED_CHANNEL_WIDTH) {
@@ -324,7 +325,13 @@ static t_chan_width setup_chan_width(const t_router_opts& router_opts,
         width_fac = router_opts.fixed_channel_width;
     }
 
-    return init_chan(width_fac, chan_width_dist);
+    if (router_opts.route_type == GLOBAL) {
+        graph_directionality = GRAPH_BIDIR;
+    } else {
+        graph_directionality = GRAPH_UNIDIR;
+    }
+
+    return init_chan(width_fac, chan_width_dist, graph_directionality);
 }
 
 static float route_connection_delay(
diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp
@@ -207,14 +207,17 @@ void try_graph(int width_fac, const t_router_opts& router_opts, t_det_routing_ar
     auto& device_ctx = g_vpr_ctx.mutable_device();
 
     t_graph_type graph_type;
+    t_graph_type graph_directionality;
     if (router_opts.route_type == GLOBAL) {
         graph_type = GRAPH_GLOBAL;
+        graph_directionality = GRAPH_BIDIR;
     } else {
         graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
+        graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
     }
 
     /* Set the channel widths */
-    t_chan_width chan_width = init_chan(width_fac, chan_width_dist);
+    t_chan_width chan_width = init_chan(width_fac, chan_width_dist, graph_directionality);
 
     /* Free any old routing graph, if one exists. */
     free_rr_graph();
@@ -256,14 +259,17 @@ bool try_route(int width_fac,
     auto& cluster_ctx = g_vpr_ctx.clustering();
 
     t_graph_type graph_type;
+    t_graph_type graph_directionality;
     if (router_opts.route_type == GLOBAL) {
         graph_type = GRAPH_GLOBAL;
+        graph_directionality = GRAPH_BIDIR;
     } else {
         graph_type = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
+        graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
     }
 
     /* Set the channel widths */
-    t_chan_width chan_width = init_chan(width_fac, chan_width_dist);
+    t_chan_width chan_width = init_chan(width_fac, chan_width_dist, graph_directionality);
 
     /* Set up the routing resource graph defined by this FPGA architecture. */
     int warning_count;
diff --git a/vpr/test/test_connection_router.cpp b/vpr/test/test_connection_router.cpp
@@ -127,7 +127,17 @@ TEST_CASE("connection_router", "[vpr]") {
 
     vpr_create_device_grid(vpr_setup, arch);
     vpr_setup_clock_networks(vpr_setup, arch);
-    auto chan_width = init_chan(vpr_setup.RouterOpts.fixed_channel_width, arch.Chans);
+    auto det_routing_arch = &vpr_setup.RoutingArch;
+    auto& router_opts = vpr_setup.RouterOpts;
+    t_graph_type graph_directionality;
+
+    if (router_opts.route_type == GLOBAL) {
+        graph_directionality = GRAPH_BIDIR;
+    } else {
+        graph_directionality = (det_routing_arch->directionality == BI_DIRECTIONAL ? GRAPH_BIDIR : GRAPH_UNIDIR);
+    }
+
+    auto chan_width = init_chan(vpr_setup.RouterOpts.fixed_channel_width, arch.Chans, graph_directionality);
 
     alloc_routing_structs(
         chan_width,

Original file line number	Diff line number	Diff line change
`@@ -63,10 +63,9 @@ void CheckSetup(const t_packer_opts& PackerOpts,`
`63`	`63`
`64`	`64`	`if (DETAILED == RouterOpts.route_type) {`
`65`	`65`	`if ((Chans.chan_x_dist.type != UNIFORM)`
`66`		`- \|\| (Chans.chan_y_dist.type != UNIFORM)`
`67`		`- \|\| (Chans.chan_x_dist.peak != Chans.chan_y_dist.peak)) {`
	`66`	`+ \|\| (Chans.chan_y_dist.type != UNIFORM)) {`
`68`	`67`	`VPR_FATAL_ERROR(VPR_ERROR_OTHER,`
`69`		`- "Detailed routing currently only supported on FPGAs with all channels of equal width.\n");`
	`68`	`+ "Detailed routing currently only supported on FPGAs with uniform channel distributions.\n");`
`70`	`69`	`}`
`71`	`70`	`}`
`72`	`71`