make is_io_type() a member function of t_physical_tile_type

Author: soheilshahrouz

libs/libarchfpga/src/physical_types.cpp

@@ -172,6 +172,10 @@ bool t_physical_tile_type::is_empty() const {
     return name == std::string(EMPTY_BLOCK_NAME);
 }
 
+bool t_physical_tile_type::is_io_type() const {
+    return is_input_type || is_output_type;
+}
+
 int t_physical_tile_type::find_pin(std::string_view port_name, int pin_index_in_port) const {
     int ipin = OPEN;
     int port_base_ipin = 0;

libs/libarchfpga/src/physical_types.h

@@ -725,6 +725,9 @@ struct t_physical_tile_type {
     ///@brief Is this t_physical_tile_type an empty type?
     bool is_empty() const;
 
+    ///@brief Returns true if the physical tile type can implement either a .input or .output block type
+    bool is_io_type() const;
+
     ///@brief Returns the relative pin index within a sub tile that corresponds to the pin within the given port and its index in the port
     int find_pin(std::string_view port_name, int pin_index_in_port) const;
 

libs/libarchfpga/src/physical_types_util.cpp

@@ -637,21 +637,6 @@ bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from
     return false;
 }
 
-// TODO: Remove is_input_type / is_output_type / is_io_type as part of
-// https://github.com/verilog-to-routing/vtr-verilog-to-routing/issues/1193
-bool is_input_type(t_physical_tile_type_ptr type) {
-    return type->is_input_type;
-}
-
-bool is_output_type(t_physical_tile_type_ptr type) {
-    return type->is_output_type;
-}
-
-bool is_io_type(t_physical_tile_type_ptr type) {
-    return is_input_type(type)
-           || is_output_type(type);
-}
-
 std::string block_type_pin_index_to_name(t_physical_tile_type_ptr type, int pin_physical_num, bool is_flat) {
     int max_ptc = get_tile_pin_max_ptc(type, is_flat);
     VTR_ASSERT(pin_physical_num < max_ptc);

libs/libarchfpga/src/physical_types_util.h

@@ -120,13 +120,6 @@ bool is_opin(int ipin, t_physical_tile_type_ptr type);
 ///@brief Returns true if the specified pin is located at "from_layer" and it is connected to "to_layer"
 bool is_pin_conencted_to_layer(t_physical_tile_type_ptr type, int ipin, int from_layer, int to_layer, int num_of_avail_layer);
 
-///@brief Returns true if the given physical tile type can implement a .input block type
-bool is_input_type(t_physical_tile_type_ptr type);
-///@brief Returns true if the given physical tile type can implement a .output block type
-bool is_output_type(t_physical_tile_type_ptr type);
-///@brief Returns true if the given physical tile type can implement either a .input or .output block type
-bool is_io_type(t_physical_tile_type_ptr type);
-
 /**
  * @brief Returns the corresponding physical pin based on the input parameters:
  *

vpr/src/util/vpr_utils.h

@@ -1,5 +1,4 @@
-#ifndef VPR_UTILS_H
-#define VPR_UTILS_H
+#pragma once
 
 #include "arch_util.h"
 #include "atom_netlist.h"
@@ -362,5 +361,3 @@ class PortPinToBlockPinConverter {
      */
     std::vector<std::vector<std::vector<std::vector<int>>>> blk_pin_from_port_pin_;
 };
-
-#endif