Odin: don't use glob for architecture in arch_sweep

Author: jeanlego

ODIN_II/regression_test/benchmark/task/arch_sweep/task.conf

@@ -8,14 +8,26 @@ regression_params=--disable_simulation
 # setup the architecture
 archs_dir=../vtr_flow/arch
 
-# bug in ram
+arch_list_add=timing/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml
+arch_list_add=timing/k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml
+arch_list_add=timing/k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml
+arch_list_add=timing/k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml
+arch_list_add=timing/k6_frac_N10_frac_chain_mem32K_40nm.xml
+arch_list_add=timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml
+arch_list_add=timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml
+arch_list_add=custom_pins/k6_frac_N10_mem32K_40nm_custom_pins.xml
+arch_list_add=timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml
 arch_list_add=timing/k6_N10_40nm.xml
-arch_list_add=*/*mem*.xml
+arch_list_add=timing/k6_frac_N10_mem32K_40nm.xml
+arch_list_add=timing/k6_N10_mem32K_40nm_fc_abs.xml
+arch_list_add=nonuniform_chan_width/k6_N10_mem32K_40nm_nonuniform.xml
+arch_list_add=nonuniform_chan_width/k6_N10_mem32K_40nm_pulse.xml
+arch_list_add=timing/k6_N10_mem32K_40nm.xml
 
 # setup the circuits
 circuits_dir=regression_test/benchmark/verilog/syntax
 
 circuit_list_add=both_ram.v
 
 synthesis_parse_file=regression_test/parse_result/conf/synth.toml
-simulation_parse_file=regression_test/parse_result/conf/sim.toml
+simulation_parse_file=regression_test/parse_result/conf/sim.toml