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| 1 | +############################################## |
| 2 | +# Configuration file for running experiments |
| 3 | +############################################## |
| 4 | + |
| 5 | +# Path to directory of circuits to use |
| 6 | +circuits_dir=benchmarks/titan_blif/titan23/stratixiv |
| 7 | + |
| 8 | +# Path to directory of SDCs to use |
| 9 | +sdc_dir=benchmarks/titan_blif/titan23/stratixiv |
| 10 | + |
| 11 | +# Path to directory of architectures to use |
| 12 | +archs_dir=arch/titan |
| 13 | + |
| 14 | +# Add circuits to list to sweep |
| 15 | +circuit_list_add=LU230_stratixiv_arch_timing.blif |
| 16 | +circuit_list_add=LU_Network_stratixiv_arch_timing.blif |
| 17 | +circuit_list_add=SLAM_spheric_stratixiv_arch_timing.blif |
| 18 | +circuit_list_add=bitcoin_miner_stratixiv_arch_timing.blif |
| 19 | +circuit_list_add=bitonic_mesh_stratixiv_arch_timing.blif |
| 20 | +circuit_list_add=cholesky_bdti_stratixiv_arch_timing.blif |
| 21 | +circuit_list_add=cholesky_mc_stratixiv_arch_timing.blif |
| 22 | +circuit_list_add=dart_stratixiv_arch_timing.blif |
| 23 | +circuit_list_add=denoise_stratixiv_arch_timing.blif |
| 24 | +circuit_list_add=des90_stratixiv_arch_timing.blif |
| 25 | +circuit_list_add=directrf_stratixiv_arch_timing.blif |
| 26 | +circuit_list_add=gsm_switch_stratixiv_arch_timing.blif |
| 27 | +circuit_list_add=mes_noc_stratixiv_arch_timing.blif |
| 28 | +circuit_list_add=minres_stratixiv_arch_timing.blif |
| 29 | +circuit_list_add=neuron_stratixiv_arch_timing.blif |
| 30 | +circuit_list_add=openCV_stratixiv_arch_timing.blif |
| 31 | +circuit_list_add=segmentation_stratixiv_arch_timing.blif |
| 32 | +circuit_list_add=sparcT1_chip2_stratixiv_arch_timing.blif |
| 33 | +circuit_list_add=sparcT1_core_stratixiv_arch_timing.blif |
| 34 | +circuit_list_add=sparcT2_core_stratixiv_arch_timing.blif |
| 35 | +circuit_list_add=stap_qrd_stratixiv_arch_timing.blif |
| 36 | +circuit_list_add=stereo_vision_stratixiv_arch_timing.blif |
| 37 | +# circuit_list_add=gaussianblur_stratixiv_arch_timing.blif |
| 38 | + |
| 39 | +# Constrain the circuits to their devices |
| 40 | +circuit_constraint_list_add=(sparcT1_core_stratixiv_arch_timing.blif, device=titan_extra_small) |
| 41 | +circuit_constraint_list_add=(SLAM_spheric_stratixiv_arch_timing.blif, device=titan_extra_small) |
| 42 | +circuit_constraint_list_add=(stereo_vision_stratixiv_arch_timing.blif, device=titan_small) |
| 43 | +circuit_constraint_list_add=(cholesky_mc_stratixiv_arch_timing.blif, device=titan_small) |
| 44 | +circuit_constraint_list_add=(neuron_stratixiv_arch_timing.blif, device=titan_small) |
| 45 | +circuit_constraint_list_add=(segmentation_stratixiv_arch_timing.blif, device=titan_small) |
| 46 | +circuit_constraint_list_add=(dart_stratixiv_arch_timing.blif, device=titan_small) |
| 47 | +circuit_constraint_list_add=(denoise_stratixiv_arch_timing.blif, device=titan_medium) |
| 48 | +circuit_constraint_list_add=(sparcT2_core_stratixiv_arch_timing.blif, device=titan_medium) |
| 49 | +circuit_constraint_list_add=(stap_qrd_stratixiv_arch_timing.blif, device=titan_medium) |
| 50 | +circuit_constraint_list_add=(cholesky_bdti_stratixiv_arch_timing.blif, device=titan_medium) |
| 51 | +circuit_constraint_list_add=(des90_stratixiv_arch_timing.blif, device=titan_medium) |
| 52 | +circuit_constraint_list_add=(mes_noc_stratixiv_arch_timing.blif, device=titan_medium) |
| 53 | +circuit_constraint_list_add=(openCV_stratixiv_arch_timing.blif, device=titan_medium) |
| 54 | +circuit_constraint_list_add=(LU_Network_stratixiv_arch_timing.blif, device=titan_large) |
| 55 | +circuit_constraint_list_add=(minres_stratixiv_arch_timing.blif, device=titan_large) |
| 56 | +circuit_constraint_list_add=(bitcoin_miner_stratixiv_arch_timing.blif, device=titan_large) |
| 57 | +circuit_constraint_list_add=(bitonic_mesh_stratixiv_arch_timing.blif, device=titan_large) |
| 58 | +circuit_constraint_list_add=(gsm_switch_stratixiv_arch_timing.blif, device=titan_large) |
| 59 | +circuit_constraint_list_add=(sparcT1_chip2_stratixiv_arch_timing.blif, device=titan_large) |
| 60 | +circuit_constraint_list_add=(directrf_stratixiv_arch_timing.blif, device=titan_extra_large) |
| 61 | +circuit_constraint_list_add=(LU230_stratixiv_arch_timing.blif, device=titan_extra_large) |
| 62 | +# circuit_constraint_list_add=(gaussianblur_stratixiv_arch_timing.blif, device=titan_extra_large) |
| 63 | + |
| 64 | +# Add architectures to list to sweep |
| 65 | +arch_list_add=stratixiv_arch.timing.xml |
| 66 | + |
| 67 | +# Parse info and how to parse |
| 68 | +parse_file=vpr_titan.txt |
| 69 | + |
| 70 | +# How to parse QoR info |
| 71 | +qor_parse_file=qor_vpr_titan.txt |
| 72 | + |
| 73 | +# Pass requirements |
| 74 | +pass_requirements_file=pass_requirements_vpr_titan.txt |
| 75 | + |
| 76 | +# Pass the script params while writing the vpr constraints. |
| 77 | +# WL DRIVEN |
| 78 | +script_params=-starting_stage vpr --analytical_place --route --route_chan_width 300 --max_router_iterations 400 --router_lookahead map -timeout 86400 --initial_pres_fac 1.0 --router_profiler_astar_fac 1.5 --seed 3 --timing_analysis off |
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