Conforming to formating standard for clock router

Author: mustafabbas

vpr/src/base/vpr_types.h

@@ -939,7 +939,7 @@ struct t_router_opts {
     float congested_routing_iteration_threshold_frac;
     e_route_bb_update route_bb_update;
     enum e_clock_modeling clock_modeling; //How clock pins and nets should be handled
-    bool two_stage_clock_routing; //How clock nets on dedicated networks should be routed
+    bool two_stage_clock_routing;         //How clock nets on dedicated networks should be routed
     int high_fanout_threshold;
     int router_debug_net;
     int router_debug_sink_rr;
@@ -1293,7 +1293,7 @@ struct t_vpr_setup {
     std::string device_layout;
     e_constant_net_method constant_net_method; //How constant nets should be handled
     e_clock_modeling clock_modeling;           //How clocks should be handled
-    bool two_stage_clock_routing;                    //How clocks should be routed in the presence of a dedicated clock network
+    bool two_stage_clock_routing;              //How clocks should be routed in the presence of a dedicated clock network
     bool exit_before_pack;                     //Exits early before starting packing (useful for collecting statistics without running/loading any stages)
 };
 

vpr/src/route/check_route.cpp

@@ -443,7 +443,7 @@ static bool check_adjacent(int from_node, int to_node) {
                 num_adj += chanx_chany_adjacent(from_node, to_node);
             } else {
                 VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
-                    "in check_adjacent: %d and %d are not adjacent", from_node, to_node);
+                                "in check_adjacent: %d and %d are not adjacent", from_node, to_node);
             }
             break;
 
@@ -475,7 +475,7 @@ static bool check_adjacent(int from_node, int to_node) {
                 num_adj += chanx_chany_adjacent(to_node, from_node);
             } else {
                 VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
-                    "in check_adjacent: %d and %d are not adjacent", from_node, to_node);
+                                "in check_adjacent: %d and %d are not adjacent", from_node, to_node);
             }
             break;
 

vpr/src/route/clock_connection_builders.cpp

@@ -49,8 +49,7 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_
     auto& rr_nodes = device_ctx.rr_nodes;
     auto& rr_node_indices = device_ctx.rr_node_indices;
 
-    int virtual_clock_network_root_idx =
-        create_virtual_clock_network_sink_node(switch_location.x, switch_location.y);
+    int virtual_clock_network_root_idx = create_virtual_clock_network_sink_node(switch_location.x, switch_location.y);
     device_ctx.virtual_clock_network_root_idx = virtual_clock_network_root_idx;
 
     // rr_node indices for x and y channel routing wires and clock wires to connect to
@@ -86,8 +85,7 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_
 
 int RoutingToClockConnection::create_virtual_clock_network_sink_node(
     int x,
-    int y)
-{
+    int y) {
     auto& device_ctx = g_vpr_ctx.mutable_device();
     auto& rr_nodes = device_ctx.rr_nodes;
     rr_nodes.emplace_back();
@@ -104,7 +102,6 @@ int RoutingToClockConnection::create_virtual_clock_network_sink_node(
     return node_index;
 }
 
-
 /*
  * ClockToClockConneciton (setters)
  */

vpr/src/route/route_common.cpp

@@ -801,17 +801,17 @@ void node_to_heap(int inode, float total_cost, int prev_node, int prev_edge, flo
 
 void drop_traceback_tail(ClusterNetId net_id) {
     /* Removes the tail node from the routing traceback and updates
-       it with the previous node from the traceback.
-       This funtion is primarily called to remove the virtual clock
-       sink from the routing traceback and replace it with the clock
-       network root. */
+     * it with the previous node from the traceback.
+     * This funtion is primarily called to remove the virtual clock
+     * sink from the routing traceback and replace it with the clock
+     * network root. */
     auto& route_ctx = g_vpr_ctx.mutable_routing();
 
     auto* tail_ptr = route_ctx.trace[net_id].tail;
     auto node = tail_ptr->index;
     route_ctx.trace_nodes[net_id].erase(node);
     auto* trace_ptr = route_ctx.trace[net_id].head;
-    while (trace_ptr!= nullptr) {
+    while (trace_ptr != nullptr) {
         t_trace* next_ptr = trace_ptr->next;
         if (next_ptr == tail_ptr) {
             trace_ptr->iswitch = tail_ptr->iswitch;

vpr/src/route/route_timing.cpp

@@ -147,15 +147,15 @@ static bool timing_driven_route_sink(ClusterNetId net_id,
                                      RouterStats& router_stats);
 
 static bool timing_driven_pre_route_to_clock_root(
-        ClusterNetId net_id,
-        int sink_node,
-        const t_conn_cost_params cost_params,
-        float pres_fac,
-        int high_fanout_threshold,
-        t_rt_node* rt_root,
-        const RouterLookahead& router_lookahead,
-        SpatialRouteTreeLookup& spatial_rt_lookup,
-        RouterStats& router_stats);
+    ClusterNetId net_id,
+    int sink_node,
+    const t_conn_cost_params cost_params,
+    float pres_fac,
+    int high_fanout_threshold,
+    t_rt_node* rt_root,
+    const RouterLookahead& router_lookahead,
+    SpatialRouteTreeLookup& spatial_rt_lookup,
+    RouterStats& router_stats);
 
 static t_heap* timing_driven_route_connection_from_route_tree_high_fanout(t_rt_node* rt_root,
                                                                           int sink_node,
@@ -1006,14 +1006,14 @@ bool timing_driven_route_net(ClusterNetId net_id,
     cost_params.delay_budget = ((budgeting_inf.if_set()) ? &conn_delay_budget : nullptr);
 
     // Pre-route to clock source for clock nets (marked as global nets)
-    if (cluster_ctx.clb_nlist.net_is_global(net_id) && router_opts.two_stage_clock_routing){
+    if (cluster_ctx.clb_nlist.net_is_global(net_id) && router_opts.two_stage_clock_routing) {
         VTR_ASSERT(router_opts.clock_modeling == DEDICATED_NETWORK);
         int sink_node = device_ctx.virtual_clock_network_root_idx;
         enable_router_debug(router_opts, net_id, sink_node);
         // Set to the max timing criticality which should intern minimize clock insertion
         // delay by selecting a direct route from the clock source to the virtual sink
         cost_params.criticality = router_opts.max_criticality;
-        if(!timing_driven_pre_route_to_clock_root(
+        if (!timing_driven_pre_route_to_clock_root(
                 net_id,
                 sink_node,
                 cost_params,
@@ -1083,16 +1083,15 @@ bool timing_driven_route_net(ClusterNetId net_id,
 }
 
 static bool timing_driven_pre_route_to_clock_root(
-        ClusterNetId net_id,
-        int sink_node,
-        const t_conn_cost_params cost_params,
-        float pres_fac,
-        int high_fanout_threshold,
-        t_rt_node* rt_root,
-        const RouterLookahead& router_lookahead,
-        SpatialRouteTreeLookup& spatial_rt_lookup,
-        RouterStats& router_stats) {
-
+    ClusterNetId net_id,
+    int sink_node,
+    const t_conn_cost_params cost_params,
+    float pres_fac,
+    int high_fanout_threshold,
+    t_rt_node* rt_root,
+    const RouterLookahead& router_lookahead,
+    SpatialRouteTreeLookup& spatial_rt_lookup,
+    RouterStats& router_stats) {
     auto& route_ctx = g_vpr_ctx.mutable_routing();
     auto& cluster_ctx = g_vpr_ctx.clustering();
     auto& m_route_ctx = g_vpr_ctx.mutable_routing();
@@ -1171,10 +1170,10 @@ static bool timing_driven_pre_route_to_clock_root(
     // - free up vitual sink occupancy
     disable_expansion_and_remove_sink_from_route_tree_nodes(rt_root);
     VTR_LOGV_DEBUG(f_router_debug, "Traceback tail before update %d \n",
-        route_ctx.trace[net_id].tail->index);
+                   route_ctx.trace[net_id].tail->index);
     drop_traceback_tail(net_id);
     VTR_LOGV_DEBUG(f_router_debug, "Updated traceback ptrs: %d %d \n",
-        route_ctx.trace[net_id].head->index, route_ctx.trace[net_id].tail->index);
+                   route_ctx.trace[net_id].head->index, route_ctx.trace[net_id].tail->index);
     m_route_ctx.rr_node_route_inf[sink_node].set_occ(0);
 
     // routed to a sink successfully
@@ -1765,7 +1764,7 @@ static t_rt_node* setup_routing_resources(int itry,
     return rt_root;
 }
 
-void disable_expansion_and_remove_sink_from_route_tree_nodes(t_rt_node* rt_node){
+void disable_expansion_and_remove_sink_from_route_tree_nodes(t_rt_node* rt_node) {
     /* Remove sink in route tree and mark all nodes
      * leading to the sink as unexpandable.
      */
@@ -1776,17 +1775,17 @@ void disable_expansion_and_remove_sink_from_route_tree_nodes(t_rt_node* rt_node)
 
     while (linked_rt_edge != nullptr) {
         child_node = linked_rt_edge->child;
-        if (device_ctx.rr_nodes[child_node->inode].type() == SINK){
+        if (device_ctx.rr_nodes[child_node->inode].type() == SINK) {
             VTR_LOGV_DEBUG(f_router_debug,
-                "Removing sink %d from route tree\n", child_node->inode);
+                           "Removing sink %d from route tree\n", child_node->inode);
             rt_node->u.child_list = nullptr;
             rt_node->u.next = nullptr;
             free(child_node);
             break;
         } else {
             rt_node->re_expand = false;
             VTR_LOGV_DEBUG(f_router_debug,
-                "unexpanding: %d in route tree\n", rt_node->inode);
+                           "unexpanding: %d in route tree\n", rt_node->inode);
         }
         disable_expansion_and_remove_sink_from_route_tree_nodes(child_node);
         linked_rt_edge = linked_rt_edge->next;