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vtr_flow/tasks/regression_tests/vtr_reg_strong
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lines changed Original file line number Diff line number Diff line change @@ -20,7 +20,7 @@ regression_tests/vtr_reg_strong/strong_dedicated_clock
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regression_tests/vtr_reg_strong/strong_default_fc_pinlocs
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regression_tests/vtr_reg_strong/strong_depop
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regression_tests/vtr_reg_strong/strong_detailed_timing
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- regression_tests/vtr_reg_strong_odin /strong_diff_mux_for_inc_dec_wires
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+ regression_tests/vtr_reg_strong /strong_diff_mux_for_inc_dec_wires
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regression_tests/vtr_reg_strong/strong_eblif_vpr
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regression_tests/vtr_reg_strong/strong_eblif_vpr_write
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regression_tests/vtr_reg_strong/strong_echo_files
@@ -85,4 +85,4 @@ regression_tests/vtr_reg_strong/strong_timing_fail
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regression_tests/vtr_reg_strong/strong_timing_no_fail
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regression_tests/vtr_reg_strong/strong_noc
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regression_tests/vtr_reg_strong/strong_flat_router
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- regression_tests/vtr_reg_strong/strong_routing_constraints
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+ regression_tests/vtr_reg_strong/strong_routing_constraints
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