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Update tasks and functions
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10 files changed

+93
-34
lines changed

10 files changed

+93
-34
lines changed

‎ODIN_II/SRC/ast_elaborate.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -527,6 +527,7 @@ ast_node_t *finalize_ast(ast_node_t *node, ast_node_t *parent, STRING_CACHE_LIST
527527
{
528528
break;
529529
}
530+
case STATEMENT: //fallthrough
530531
case ALWAYS: // fallthrough
531532
case INITIALS:
532533
{
@@ -1171,6 +1172,7 @@ ast_node_t *finalize_ast(ast_node_t *node, ast_node_t *parent, STRING_CACHE_LIST
11711172
if (node->num_children == 3) convert_2D_to_1D_array_ref(&node, local_string_cache_list);
11721173
break;
11731174
}
1175+
case STATEMENT: //fallthrough
11741176
case ALWAYS: // fallthrough
11751177
case INITIALS:
11761178
{

‎ODIN_II/SRC/enum_str.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -156,6 +156,7 @@ const char *ids_STR []=
156156
"SPECIFY_PAL_CONNECTION_STATEMENT",
157157
"SPECIFY_PAL_CONNECT_LIST",
158158
/* statements */
159+
"STATEMENT",
159160
"BLOCK",
160161
"NON_BLOCKING_STATEMENT",
161162
"BLOCKING_STATEMENT",

‎ODIN_II/SRC/include/odin_types.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -298,6 +298,7 @@ enum ids
298298
SPECIFY_PAL_CONNECTION_STATEMENT,
299299
SPECIFY_PAL_CONNECT_LIST,
300300
/* statements */
301+
STATEMENT,
301302
BLOCK,
302303
NON_BLOCKING_STATEMENT,
303304
BLOCKING_STATEMENT,

‎ODIN_II/SRC/include/parse_making_ast.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@ ast_node_t *newIf(ast_node_t *compare_expression, ast_node_t *true_expression, a
5151
ast_node_t *newIfQuestion(ast_node_t *compare_expression, ast_node_t *true_expression, ast_node_t *false_expression, int line_number);
5252
ast_node_t *newCase(ast_node_t *compare_expression, ast_node_t *case_list, int line_number);
5353
ast_node_t *newAlways(ast_node_t *delay_control, ast_node_t *statements, int line_number);
54+
ast_node_t *newStatement(ast_node_t *statement, int line_number);
5455
ast_node_t *newFor(ast_node_t *initial, ast_node_t *compare_expression, ast_node_t *terminal, ast_node_t *statement, int line_number);
5556
ast_node_t *newWhile(ast_node_t *compare_expression, ast_node_t *statement, int line_number);
5657

‎ODIN_II/SRC/netlist_create_from_ast.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -741,6 +741,9 @@ signal_list_t *netlist_expand_ast_of_module(ast_node_t** node_ref, char *instanc
741741
terminate_continuous_assignment(node, children_signal_list[i], instance_name_prefix);
742742
}
743743
break;
744+
case STATEMENT:
745+
terminate_continuous_assignment(node, children_signal_list[0], instance_name_prefix);
746+
break;
744747
case ALWAYS:
745748
/* attach the drivers to the driver nets */
746749
switch(circuit_edge)
@@ -824,6 +827,7 @@ signal_list_t *netlist_expand_ast_of_module(ast_node_t** node_ref, char *instanc
824827
&& node->type != VAR_DECLARE_LIST
825828
&& node->type != ASSIGN
826829
&& node->type != ALWAYS
830+
&& node->type != STATEMENT
827831
&& node->type != CONCATENATE)
828832
{
829833
free_signal_list(children_signal_list[i]);

‎ODIN_II/SRC/parse_making_ast.cpp

Lines changed: 13 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -63,15 +63,11 @@ ast_node_t **function_instantiations_instance;
6363
int size_function_instantiations;
6464
ast_node_t **function_instantiations_instance_by_module;
6565
int size_function_instantiations_by_module;
66-
ast_node_t **function_instantiations_instance_by_task;
67-
int size_function_instantiations_by_task;
6866

6967
ast_node_t **task_instantiations_instance;
7068
int size_task_instantiations;
7169
ast_node_t **task_instantiations_instance_by_module;
7270
int size_task_instantiations_by_module;
73-
ast_node_t **task_instantiations_instance_by_task;
74-
int size_task_instantiations_by_task;
7571

7672
long num_modules;
7773
ast_node_t **ast_modules;
@@ -154,10 +150,9 @@ void init_parser()
154150
size_function_instantiations = 0;
155151
function_instantiations_instance_by_module = NULL;
156152
size_function_instantiations_by_module = 0;
157-
size_function_instantiations_by_task = 0;
158153
size_task_instantiations = 0;
159154
size_task_instantiations_by_module = 0;
160-
size_task_instantiations_by_task = 0;
155+
161156

162157
/* keeps track of all the ast roots */
163158
all_file_items_list = NULL;
@@ -1235,6 +1230,17 @@ ast_node_t *newAlways(ast_node_t *delay_control, ast_node_t *statement, int line
12351230

12361231
return new_node;
12371232
}
1233+
1234+
ast_node_t *newStatement(ast_node_t *statement, int line_number)
1235+
{
1236+
/* create a node for this array reference */
1237+
ast_node_t* new_node = create_node_w_type(STATEMENT, line_number, current_parse_file);
1238+
/* allocate child nodes to this node */
1239+
allocate_children_to_node(new_node, { statement });
1240+
1241+
return new_node;
1242+
}
1243+
12381244
/*---------------------------------------------------------------------------------------------
12391245
* (function: newModuleConnection)
12401246
*-------------------------------------------------------------------------------------------*/
@@ -1323,7 +1329,7 @@ ast_node_t *newFunctionNamedInstance(ast_node_t *module_connect_list, ast_node_t
13231329
ast_node_t *newTaskNamedInstance(ast_node_t *module_connect_list, int line_number)
13241330
{
13251331
std::string buffer("task_instance_");
1326-
buffer += std::to_string(size_task_instantiations_by_module + size_task_instantiations_by_task);
1332+
buffer += std::to_string(size_task_instantiations_by_module);
13271333

13281334
char *unique_name = vtr::strdup(buffer.c_str());
13291335

@@ -1355,10 +1361,6 @@ ast_node_t *newTaskInstance(char *task_name, ast_node_t *task_named_instace, ast
13551361
task_instantiations_instance_by_module[size_task_instantiations_by_module] = new_node;
13561362
size_task_instantiations_by_module++;
13571363

1358-
// task_instantiations_instance_by_task = (ast_node_t **)vtr::realloc(task_instantiations_instance_by_task, sizeof(ast_node_t*)*(size_task_instantiations_by_task+1));
1359-
// task_instantiations_instance_by_task[size_task_instantiations_by_task] = new_node;
1360-
// size_task_instantiations_by_task++;
1361-
13621364
return new_node;
13631365
}
13641366

‎ODIN_II/SRC/verilog_bison.y

Lines changed: 59 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -105,14 +105,14 @@ int yylex(void);
105105
%type <node> io_declaration variable_list function_output_variable function_id_and_output_variable
106106
%type <node> integer_type_variable_list variable integer_type_variable
107107
%type <node> net_declaration integer_declaration function_instantiation task_instantiation genvar_declaration
108-
%type <node> continuous_assign multiple_inputs_gate_instance list_of_single_input_gate_declaration_instance
108+
%type <node> continuous_assign procedural_continuous_assignment multiple_inputs_gate_instance list_of_single_input_gate_declaration_instance
109109
%type <node> list_of_multiple_inputs_gate_declaration_instance list_of_module_instance
110110
%type <node> gate_declaration single_input_gate_instance
111111
%type <node> module_instantiation module_instance function_instance task_instance list_of_module_connections list_of_function_connections list_of_task_connections
112112
%type <node> list_of_multiple_inputs_gate_connections
113-
%type <node> module_connection always statement function_statement task_statement blocking_assignment
114-
%type <node> non_blocking_assignment conditional_statement case_statement case_item_list case_items seq_block
115-
%type <node> stmt_list delay_control event_expression_list event_expression loop_statement
113+
%type <node> module_connection always statement function_statement function_statement_items task_statement blocking_assignment
114+
%type <node> non_blocking_assignment conditional_statement function_conditional_statement case_statement function_case_statement case_item_list function_case_item_list case_items function_case_items seq_block function_seq_block
115+
%type <node> stmt_list function_stmt_list delay_control event_expression_list event_expression loop_statement function_loop_statement
116116
%type <node> expression primary expression_list module_parameter
117117
%type <node> list_of_module_parameters localparam_declaration
118118
%type <node> specify_block list_of_specify_items
@@ -209,7 +209,6 @@ generate_item:
209209
| function_declaration {$$ = $1;}
210210
| task_declaration {$$ = $1;}
211211
| initial_block {$$ = $1;}
212-
| task_instantiation {$$ = $1;}
213212
| always {$$ = $1;}
214213
| defparam_declaration {$$ = $1;}
215214
| c_function ';' {$$ = $1;}
@@ -285,9 +284,8 @@ function_item:
285284
| function_input_declaration {$$ = $1;}
286285
| net_declaration {$$ = $1;}
287286
| integer_declaration {$$ = $1;}
288-
| continuous_assign {$$ = $1;}
289287
| defparam_declaration {$$ = $1;}
290-
| function_statement {$$ = $1;} //TODO It`s temporary
288+
| function_statement {$$ = $1;}
291289
| error ';' {$$ = NULL;}
292290
;
293291

@@ -298,9 +296,8 @@ task_item:
298296
| task_inout_declaration {$$ = $1;}
299297
| net_declaration {$$ = $1;}
300298
| integer_declaration {$$ = $1;}
301-
| continuous_assign {$$ = $1;}
302299
| defparam_declaration {$$ = $1;}
303-
| task_statement {$$ = $1;} //TODO It`s temporary
300+
| task_statement {$$ = $1;}
304301
;
305302

306303
function_input_declaration:
@@ -386,6 +383,10 @@ continuous_assign:
386383
vASSIGN list_of_blocking_assignment ';' {$$ = $2;}
387384
;
388385

386+
procedural_continuous_assignment:
387+
vASSIGN blocking_assignment ';' {$$ = $2;}
388+
;
389+
389390
list_of_blocking_assignment:
390391
list_of_blocking_assignment ',' blocking_assignment {$$ = newList_entry($1, $3);}
391392
| blocking_assignment {$$ = newList(ASSIGN, $1, my_yylineno);}
@@ -533,11 +534,11 @@ generate_block:
533534
;
534535

535536
function_statement:
536-
statement {$$ = newAlways(NULL, $1, my_yylineno);}
537+
function_statement_items {$$ = newStatement($1, my_yylineno);}
537538
;
538539

539540
task_statement:
540-
statement {$$ = newAlways(NULL, $1, my_yylineno);}
541+
statement {$$ = newStatement($1, my_yylineno);}
541542
;
542543

543544
statement:
@@ -546,12 +547,38 @@ statement:
546547
| c_function ';' {$$ = $1;}
547548
| blocking_assignment ';' {$$ = $1;}
548549
| non_blocking_assignment ';' {$$ = $1;}
550+
| procedural_continuous_assignment {$$ = $1;}
549551
| conditional_statement {$$ = $1;}
550552
| case_statement {$$ = $1;}
551-
| loop_statement {$$ = newList(BLOCK, $1, my_yylineno);}
553+
| loop_statement {$$ = $1;}
552554
| ';' {$$ = NULL;}
553555
;
554556

557+
function_statement_items:
558+
function_seq_block {$$ = $1;}
559+
| c_function ';' {$$ = $1;}
560+
| blocking_assignment ';' {$$ = $1;}
561+
| function_conditional_statement {$$ = $1;}
562+
| function_case_statement {$$ = $1;}
563+
| function_loop_statement {$$ = $1;}
564+
| ';' {$$ = NULL;}
565+
;
566+
567+
function_seq_block:
568+
vBEGIN function_stmt_list vEND {$$ = $2;}
569+
| vBEGIN ':' vSYMBOL_ID function_stmt_list vEND {free($3); $$ = $4;}
570+
;
571+
572+
function_stmt_list:
573+
function_stmt_list function_statement_items {$$ = newList_entry($1, $2);}
574+
| function_statement_items {$$ = newList(BLOCK, $1, my_yylineno);}
575+
;
576+
577+
function_loop_statement:
578+
vFOR '(' blocking_assignment ';' expression ';' blocking_assignment ')' function_statement_items {$$ = newFor($3, $5, $7, $9, my_yylineno);}
579+
| vWHILE '(' expression ')' function_statement_items {$$ = newWhile($3, $5, my_yylineno);}
580+
;
581+
555582
loop_statement:
556583
vFOR '(' blocking_assignment ';' expression ';' blocking_assignment ')' statement {$$ = newFor($3, $5, $7, $9, my_yylineno);}
557584
| vWHILE '(' expression ')' statement {$$ = newWhile($3, $5, my_yylineno);}
@@ -561,6 +588,15 @@ case_statement:
561588
vCASE '(' expression ')' case_item_list vENDCASE {$$ = newCase($3, $5, my_yylineno);}
562589
;
563590

591+
function_case_statement:
592+
vCASE '(' expression ')' function_case_item_list vENDCASE {$$ = newCase($3, $5, my_yylineno);}
593+
;
594+
595+
function_conditional_statement:
596+
vIF '(' expression ')' function_statement_items %prec LOWER_THAN_ELSE {$$ = newIf($3, $5, NULL, my_yylineno);}
597+
| vIF '(' expression ')' function_statement_items vELSE function_statement_items {$$ = newIf($3, $5, $7, my_yylineno);}
598+
;
599+
564600
conditional_statement:
565601
vIF '(' expression ')' statement %prec LOWER_THAN_ELSE {$$ = newIf($3, $5, NULL, my_yylineno);}
566602
| vIF '(' expression ')' statement vELSE statement {$$ = newIf($3, $5, $7, my_yylineno);}
@@ -582,11 +618,21 @@ case_item_list:
582618
| case_items {$$ = newList(CASE_LIST, $1, my_yylineno);}
583619
;
584620

621+
function_case_item_list:
622+
function_case_item_list function_case_items {$$ = newList_entry($1, $2);}
623+
| function_case_items {$$ = newList(CASE_LIST, $1, my_yylineno);}
624+
;
625+
626+
function_case_items:
627+
expression ':' function_statement_items {$$ = newCaseItem($1, $3, my_yylineno);}
628+
| vDEFAULT ':' function_statement_items {$$ = newDefaultCase($3, my_yylineno);}
629+
;
630+
585631
case_items:
586632
expression ':' statement {$$ = newCaseItem($1, $3, my_yylineno);}
587633
| vDEFAULT ':' statement {$$ = newDefaultCase($3, my_yylineno);}
588634
;
589-
635+
590636
seq_block:
591637
vBEGIN stmt_list vEND {$$ = $2;}
592638
| vBEGIN ':' vSYMBOL_ID stmt_list vEND {free($3); $$ = $4;}

‎ODIN_II/regression_test/benchmark/verilog/syntax/function_automatic.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,8 @@ input [1:0] x, y;
2626
input rst;
2727

2828
case(rst)
29-
1'b0: func_out <= x + y;
30-
default: func_out <= 1'b0;
29+
1'b0: func_out = x + y;
30+
default: func_out = 1'b0;
3131
endcase
3232

3333
endfunction

‎ODIN_II/regression_test/benchmark/verilog/syntax/simple_function.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,8 +26,8 @@ input [1:0] x, y;
2626
input rst;
2727

2828
case(rst)
29-
1'b0: func_out <= x + y;
30-
default: func_out <= 1'b0;
29+
1'b0: func_out = x + y;
30+
default: func_out = 1'b0;
3131
endcase
3232

3333
endfunction

‎ODIN_II/regression_test/benchmark/verilog/syntax/simple_task.v

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -25,13 +25,15 @@ task my_task;
2525
input [1:0] x,y;
2626
input rst;
2727
output [2:0] z;
28-
29-
case(rst)
30-
1'b0: z <= x + y;
31-
default: z <= 1'b0;
32-
endcase
33-
28+
29+
begin
30+
case(rst)
31+
1'b0: z <= x + y;
32+
default: z <= 1'b0;
33+
endcase
34+
end
3435
endtask
3536

37+
3638
endmodule
3739

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