libs: arch: interchange: add logical blocks and physical tile parsing

Signed-off-by: Alessandro Comodi <[email protected]>

Author: acomodi

libs/libarchfpga/src/physical_types.h

@@ -1738,6 +1738,20 @@ struct t_lut_cell {
     std::vector<std::string> inputs;
 };
 
+struct t_lut_bel {
+    std::string name;
+
+    std::vector<std::string> input_pins;
+    std::string output_pin;
+};
+
+struct t_package_pin {
+    std::string name;
+
+    std::string site_name;
+    std::string bel_name;
+};
+
 /*   Detailed routing architecture */
 struct t_arch {
     mutable vtr::string_internment strings;
@@ -1787,6 +1801,11 @@ struct t_arch {
 
     // Luts
     std::vector<t_lut_cell> lut_cells;
+    std::vector<t_lut_bel> lut_bels;
+
+    // Package pins
+    // TODO: add possibility to have multiple packages
+    std::vector<t_package_pin> pad_bels;
 
     //The name of the switch used for the input connection block (i.e. to
     //connect routing tracks to block pins).