We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 745e230 commit a72a5f4Copy full SHA for a72a5f4
vpr/src/draw/draw_basic.cpp
@@ -249,7 +249,7 @@ void drawnets(ezgl::renderer* g) {
249
continue; /* Don't draw */
250
}
251
252
- if ((int)cluster_ctx.clb_nlist.net_pins(net_id).size() > draw_state->draw_net_max_fanout) {
+ if ((int)cluster_ctx.clb_nlist.net_pins(net_id).size() - 1 > draw_state->draw_net_max_fanout) {
253
continue;
254
255
vpr/src/draw/intra_logic_block.cpp
@@ -570,7 +570,7 @@ void draw_logical_connections(ezgl::renderer* g) {
570
571
// iterate over all the atom nets
572
for (auto net_id : atom_ctx.nlist.nets()) {
573
- if ((int)atom_ctx.nlist.net_pins(net_id).size() > draw_state->draw_net_max_fanout) {
+ if ((int)atom_ctx.nlist.net_pins(net_id).size() - 1 > draw_state->draw_net_max_fanout) {
574
575
576
0 commit comments