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amin1377amin1377
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[cli] set place delay model to delta if router lookahead is not of the type map
1 parent dc6cef2 commit a6afa55

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4 files changed

+38
-31
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4 files changed

+38
-31
lines changed

‎vpr/src/base/read_options.cpp

Lines changed: 7 additions & 0 deletions
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@@ -3034,6 +3034,13 @@ void set_conditional_defaults(t_options& args) {
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}
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}
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// If MAP Router lookahead is not used, we cannot use simple place delay lookup
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if (args.place_delay_model.provenance() != Provenance::SPECIFIED) {
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if (args.router_lookahead_type != e_router_lookahead::MAP) {
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args.place_delay_model.set(PlaceDelayModelType::DELTA, Provenance::INFERRED);
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}
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}
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// Check for correct options combinations
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// If you are running WLdriven placement, the RL reward function should be
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// either basic or nonPenalizing basic

‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_nonuniform/config/golden_results.txt

Lines changed: 7 additions & 7 deletions
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@@ -1,7 +1,7 @@
1-
arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time
2-
x_gaussian_y_uniform.xml stereovision3.v common 1.77 vpr 62.94 MiB -1 -1 0.46 25676 5 0.13 -1 -1 36052 -1 -1 7 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64448 10 2 181 183 1 37 19 6 6 36 clb auto 24.6 MiB 0.05 109 62.9 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000102879 7.9633e-05 0.00257204 0.00230861 8 76 4 646728 377258 -1 -1 0.07 0.0214726 0.0186074 75 4 76 104 3035 1007 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00576803 0.00553158
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x_uniform_y_gaussian.xml stereovision3.v common 1.32 vpr 63.02 MiB -1 -1 0.42 25560 5 0.14 -1 -1 36300 -1 -1 7 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64532 10 2 181 183 1 37 19 6 6 36 clb auto 24.5 MiB 0.05 126 63.0 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000114416 9.0701e-05 0.00203559 0.00193177 6 103 6 646728 377258 -1 -1 0.09 0.0224092 0.019728 95 3 64 85 2875 913 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00595241 0.00573186
4-
x_gaussian_y_gaussian.xml stereovision3.v common 1.32 vpr 62.66 MiB -1 -1 0.42 25676 5 0.12 -1 -1 35972 -1 -1 7 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64160 10 2 181 183 1 37 19 6 6 36 clb auto 24.2 MiB 0.05 107 62.7 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000102607 7.9423e-05 0.0034339 0.00303463 8 81 4 646728 377258 -1 -1 0.08 0.0230411 0.0201133 76 3 59 84 2312 792 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00572338 0.00552253
5-
x_delta_y_uniform.xml stereovision3.v common 1.39 vpr 62.82 MiB -1 -1 0.43 25304 5 0.12 -1 -1 35884 -1 -1 7 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64328 10 2 181 183 1 37 19 6 6 36 clb auto 24.5 MiB 0.05 109 62.8 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000102377 7.9533e-05 0.00376268 0.00339913 28 78 3 646728 377258 -1 -1 0.09 0.025245 0.0220817 78 3 61 82 2230 773 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00586619 0.00565321
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x_delta_y_delta.xml stereovision3.v common 1.42 vpr 62.87 MiB -1 -1 0.43 25184 5 0.15 -1 -1 35864 -1 -1 7 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64376 10 2 181 183 1 37 19 6 6 36 clb auto 24.4 MiB 0.05 108 62.9 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000104033 7.9424e-05 0.00373781 0.00320879 28 78 8 646728 377258 -1 -1 0.10 0.0330236 0.0280414 79 3 67 96 2662 904 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00726031 0.00702942
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x_uniform_y_delta.xml stereovision3.v common 1.54 vpr 62.84 MiB -1 -1 0.44 25532 5 0.11 -1 -1 35696 -1 -1 7 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64352 10 2 181 183 1 37 19 6 6 36 clb auto 24.4 MiB 0.05 126 62.8 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000106716 8.3021e-05 0.00193419 0.00183187 8 112 5 646728 377258 -1 -1 0.10 0.0222386 0.0194024 94 4 70 97 3214 1013 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00676207 0.00649623
1+
arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time
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x_gaussian_y_uniform.xml stereovision3.v common 1.73 vpr 64.92 MiB -1 -1 0.63 25276 5 0.16 -1 -1 37176 -1 -1 7 10 0 0 success b93114b release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-05-16T13:37:54 gh-actions-runner-vtr-auto-spawned30 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66480 10 2 181 183 1 37 19 6 6 36 clb auto 26.3 MiB 0.06 110 594 150 401 43 64.9 MiB 0.02 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000294971 0.000262303 0.00999083 0.0090646 8 79 3 646728 377258 -1 -1 0.08 0.0453834 0.0395279 1804 2280 -1 77 3 61 85 2669 843 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.00974423 0.00923886
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x_uniform_y_gaussian.xml stereovision3.v common 1.77 vpr 64.76 MiB -1 -1 0.62 25316 5 0.16 -1 -1 36908 -1 -1 7 10 0 0 success b93114b release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-05-16T13:37:54 gh-actions-runner-vtr-auto-spawned30 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66312 10 2 181 183 1 37 19 6 6 36 clb auto 26.1 MiB 0.06 109 544 174 318 52 64.8 MiB 0.02 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000339962 0.000303899 0.0100167 0.00911542 6 109 21 646728 377258 -1 -1 0.12 0.0580255 0.0502964 1804 2280 -1 77 3 66 90 2561 887 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.010375 0.00976898
4+
x_gaussian_y_gaussian.xml stereovision3.v common 1.62 vpr 64.61 MiB -1 -1 0.57 25276 5 0.16 -1 -1 37220 -1 -1 7 10 0 0 success b93114b release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-05-16T13:37:54 gh-actions-runner-vtr-auto-spawned30 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66164 10 2 181 183 1 37 19 6 6 36 clb auto 26.1 MiB 0.06 110 694 176 468 50 64.6 MiB 0.02 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000302965 0.000269217 0.0115316 0.0104852 8 78 3 646728 377258 -1 -1 0.08 0.0481134 0.0420436 1804 2280 -1 80 3 56 77 2444 765 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.00991256 0.00939908
5+
x_delta_y_uniform.xml stereovision3.v common 1.86 vpr 64.89 MiB -1 -1 0.61 25392 5 0.17 -1 -1 37056 -1 -1 7 10 0 0 success b93114b release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-05-16T13:37:54 gh-actions-runner-vtr-auto-spawned30 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66452 10 2 181 183 1 37 19 6 6 36 clb auto 26.4 MiB 0.06 122 194 64 115 15 64.9 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000358492 0.000315992 0.0053859 0.00499525 18 90 3 646728 377258 -1 -1 0.18 0.0804512 0.0683474 1804 2280 -1 90 3 58 74 2193 794 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.00992565 0.00940704
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x_delta_y_delta.xml stereovision3.v common 1.72 vpr 64.73 MiB -1 -1 0.60 25256 5 0.16 -1 -1 37136 -1 -1 7 10 0 0 success b93114b release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-05-16T13:37:54 gh-actions-runner-vtr-auto-spawned30 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66280 10 2 181 183 1 37 19 6 6 36 clb auto 26.2 MiB 0.06 113 669 200 418 51 64.7 MiB 0.02 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000358653 0.000319961 0.0120938 0.0109347 28 78 3 646728 377258 -1 -1 0.08 0.0507173 0.0441205 1804 2280 -1 78 3 60 82 2619 842 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.0127115 0.0122068
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x_uniform_y_delta.xml stereovision3.v common 1.66 vpr 64.96 MiB -1 -1 0.58 25516 5 0.16 -1 -1 37200 -1 -1 7 10 0 0 success b93114b release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-05-16T13:37:54 gh-actions-runner-vtr-auto-spawned30 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66516 10 2 181 183 1 37 19 6 6 36 clb auto 26.4 MiB 0.06 115 569 114 397 58 65.0 MiB 0.02 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000323685 0.000288401 0.00998254 0.00910662 8 93 5 646728 377258 -1 -1 0.10 0.0484561 0.0422523 1804 2280 -1 83 3 59 80 2528 826 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.00999757 0.00947752

‎vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/golden_results.txt

Lines changed: 3 additions & 3 deletions
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@@ -1,3 +1,3 @@
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arch circuit script_params crit_path_delay_mcw clk_to_clk_cpd clk_to_clk2_cpd clk_to_input_cpd clk_to_output_cpd clk2_to_clk2_cpd clk2_to_clk_cpd clk2_to_input_cpd clk2_to_output_cpd input_to_input_cpd input_to_clk_cpd input_to_clk2_cpd input_to_output_cpd output_to_output_cpd output_to_clk_cpd output_to_clk2_cpd output_to_input_cpd clk_to_clk_setup_slack clk_to_clk2_setup_slack clk_to_input_setup_slack clk_to_output_setup_slack clk2_to_clk2_setup_slack clk2_to_clk_setup_slack clk2_to_input_setup_slack clk2_to_output_setup_slack input_to_input_setup_slack input_to_clk_setup_slack input_to_clk2_setup_slack input_to_output_setup_slack output_to_output_setup_slack output_to_clk_setup_slack output_to_clk2_setup_slack output_to_input_setup_slack clk_to_clk_hold_slack clk_to_clk2_hold_slack clk_to_input_hold_slack clk_to_output_hold_slack clk2_to_clk2_hold_slack clk2_to_clk_hold_slack clk2_to_input_hold_slack clk2_to_output_hold_slack input_to_input_hold_slack input_to_clk_hold_slack input_to_clk2_hold_slack input_to_output_hold_slack output_to_output_hold_slack output_to_clk_hold_slack output_to_clk2_hold_slack output_to_input_hold_slack
2-
k6_frac_N10_mem32K_40nm.xml multiclock.blif common 1.44 0.595 0.841581 -1 -1 0.57 0.814813 -1 1.44 -1 1.07053 -1 1.37 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.243 1.71958 -1 -1 0.268 3.24281 -1 1.5 -1 3.30853 -1 -1.85 -1 -1 -1 -1
3-
k6_frac_N10_mem32K_40nm.xml multiclock.blif common_--router_algorithm_parallel_--num_workers_4 1.44 0.595 0.841581 -1 -1 0.57 0.814813 -1 1.44 -1 1.07053 -1 1.37 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.243 1.71958 -1 -1 0.268 3.24281 -1 1.5 -1 3.30853 -1 -1.85 -1 -1 -1 -1
1+
arch circuit script_params crit_path_delay_mcw clk_to_clk_cpd clk_to_clk2_cpd clk_to_input_cpd clk_to_output_cpd clk2_to_clk2_cpd clk2_to_clk_cpd clk2_to_input_cpd clk2_to_output_cpd input_to_input_cpd input_to_clk_cpd input_to_clk2_cpd input_to_output_cpd output_to_output_cpd output_to_clk_cpd output_to_clk2_cpd output_to_input_cpd clk_to_clk_setup_slack clk_to_clk2_setup_slack clk_to_input_setup_slack clk_to_output_setup_slack clk2_to_clk2_setup_slack clk2_to_clk_setup_slack clk2_to_input_setup_slack clk2_to_output_setup_slack input_to_input_setup_slack input_to_clk_setup_slack input_to_clk2_setup_slack input_to_output_setup_slack output_to_output_setup_slack output_to_clk_setup_slack output_to_clk2_setup_slack output_to_input_setup_slack clk_to_clk_hold_slack clk_to_clk2_hold_slack clk_to_input_hold_slack clk_to_output_hold_slack clk2_to_clk2_hold_slack clk2_to_clk_hold_slack clk2_to_input_hold_slack clk2_to_output_hold_slack input_to_input_hold_slack input_to_clk_hold_slack input_to_clk2_hold_slack input_to_output_hold_slack output_to_output_hold_slack output_to_clk_hold_slack output_to_clk2_hold_slack output_to_input_hold_slack
2+
k6_frac_N10_mem32K_40nm.xml multiclock.blif common 1.31564 0.595 0.841581 -1 -1 0.57 0.814813 -1 1.31564 -1 1.07053 -1 1.76203 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.243 1.71958 -1 -1 0.268 3.24281 -1 1.16427 -1 3.30853 -1 -1.48434 -1 -1 -1 -1
3+
k6_frac_N10_mem32K_40nm.xml multiclock.blif common_--router_algorithm_parallel_--num_workers_4 1.31564 0.595 0.841581 -1 -1 0.57 0.814813 -1 1.31564 -1 1.07053 -1 1.76203 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.243 1.71958 -1 -1 0.268 3.24281 -1 1.16427 -1 3.30853 -1 -1.48434 -1 -1 -1 -1

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