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umariqbal-rsumariqbal-rs
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edge_switch api created and removed from node_impl.h
1 parent f92cfeb commit 975e37d

16 files changed

+50
-40
lines changed

‎utils/fasm/test/test_fasm.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -257,7 +257,7 @@ TEST_CASE("fasm_integration_test", "[fasm]") {
257257
for(size_t inode = 0; inode < device_ctx.rr_nodes.size(); ++inode) {
258258
for(t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[inode].num_edges(); ++iedge) {
259259
auto sink_inode = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
260-
auto switch_id = device_ctx.rr_nodes[inode].edge_switch(iedge);
260+
auto switch_id = rr_graph.edge_switch(RRNodeId(inode), iedge);
261261
auto value = vtr::string_fmt("%d_%d_%zu",
262262
inode, sink_inode, switch_id);
263263

‎vpr/src/device/rr_graph_view.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -248,6 +248,13 @@ class RRGraphView {
248248
inline const char* node_side_string(RRNodeId node) const {
249249
return node_storage_.node_side_string(node);
250250
}
251+
/*@brief Get the switch used for the iedge'th edge from specified RRNodeId.*/
252+
inline short edge_switch(RRNodeId id, t_edge_size iedge) const {
253+
return node_storage_.edge_switch(id, iedge);
254+
}
255+
inline short edge_switch(const RREdgeId& edge) const {
256+
return node_storage_.edge_switch(edge);
257+
}
251258

252259
/** @brief The ptc_num carries different meanings for different node types
253260
* (true in VPR RRG that is currently supported, may not be true in customized RRG)

‎vpr/src/draw/draw.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1772,7 +1772,7 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
17721772
} else {
17731773
g->set_color(blk_DARKGREEN);
17741774
}
1775-
switch_type = device_ctx.rr_nodes[inode].edge_switch(iedge);
1775+
switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
17761776
draw_chanx_to_chanx_edge(RRNodeId(inode), RRNodeId(to_node),
17771777
to_ptc_num, switch_type, g);
17781778
break;
@@ -1789,7 +1789,7 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
17891789
} else {
17901790
g->set_color(blk_DARKGREEN);
17911791
}
1792-
switch_type = device_ctx.rr_nodes[inode].edge_switch(iedge);
1792+
switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
17931793
draw_chanx_to_chany_edge(inode, from_ptc_num, to_node,
17941794
to_ptc_num, FROM_X_TO_Y, switch_type, g);
17951795
break;
@@ -1842,7 +1842,7 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
18421842
} else {
18431843
g->set_color(blk_DARKGREEN);
18441844
}
1845-
switch_type = device_ctx.rr_nodes[inode].edge_switch(iedge);
1845+
switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
18461846
draw_chanx_to_chany_edge(to_node, to_ptc_num, inode,
18471847
from_ptc_num, FROM_Y_TO_X, switch_type, g);
18481848
break;
@@ -1860,7 +1860,7 @@ static void draw_rr_edges(int inode, ezgl::renderer* g) {
18601860
} else {
18611861
g->set_color(blk_DARKGREEN);
18621862
}
1863-
switch_type = device_ctx.rr_nodes[inode].edge_switch(iedge);
1863+
switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);;
18641864
draw_chany_to_chany_edge(RRNodeId(inode), RRNodeId(to_node),
18651865
to_ptc_num, switch_type, g);
18661866
break;
@@ -2519,7 +2519,7 @@ void draw_partial_route(const std::vector<int>& rr_nodes_to_draw, ezgl::renderer
25192519
auto prev_type = rr_graph.node_type(RRNodeId(prev_node));
25202520

25212521
auto iedge = find_edge(prev_node, inode);
2522-
auto switch_type = device_ctx.rr_nodes[prev_node].edge_switch(iedge);
2522+
auto switch_type = rr_graph.edge_switch(RRNodeId(prev_node), iedge);
25232523

25242524
switch (rr_type) {
25252525
case OPIN: {

‎vpr/src/power/power.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -982,9 +982,9 @@ static void power_usage_routing(t_power_usage* power_usage,
982982
connectionbox_fanout = 0;
983983
switchbox_fanout = 0;
984984
for (t_edge_size iedge = 0; iedge < node.num_edges(); iedge++) {
985-
if (node.edge_switch(iedge) == routing_arch->wire_to_rr_ipin_switch) {
985+
if (rr_graph.edge_switch(RREdgeId(iedge)) == routing_arch->wire_to_rr_ipin_switch) {
986986
connectionbox_fanout++;
987-
} else if (node.edge_switch(iedge) == routing_arch->delayless_switch) {
987+
} else if (rr_graph.edge_switch(RREdgeId(iedge)) == routing_arch->delayless_switch) {
988988
/* Do nothing */
989989
} else {
990990
switchbox_fanout++;
@@ -1226,9 +1226,9 @@ void power_routing_init(const t_det_routing_arch* routing_arch) {
12261226
case CHANX:
12271227
case CHANY:
12281228
for (t_edge_size iedge = 0; iedge < node.num_edges(); iedge++) {
1229-
if (node.edge_switch(iedge) == routing_arch->wire_to_rr_ipin_switch) {
1229+
if (rr_graph.edge_switch(RREdgeId(iedge)) == routing_arch->wire_to_rr_ipin_switch) {
12301230
fanout_to_IPIN++;
1231-
} else if (node.edge_switch(iedge) != routing_arch->delayless_switch) {
1231+
} else if (rr_graph.edge_switch(RREdgeId(iedge)) != routing_arch->delayless_switch) {
12321232
fanout_to_seg++;
12331233
}
12341234
}
@@ -1263,9 +1263,9 @@ void power_routing_init(const t_det_routing_arch* routing_arch) {
12631263
for (t_edge_size edge_idx = 0; edge_idx < node.num_edges(); edge_idx++) {
12641264
if (node.edge_sink_node(edge_idx) != OPEN) {
12651265
if (rr_node_power[node.edge_sink_node(edge_idx)].driver_switch_type == OPEN) {
1266-
rr_node_power[node.edge_sink_node(edge_idx)].driver_switch_type = node.edge_switch(edge_idx);
1266+
rr_node_power[node.edge_sink_node(edge_idx)].driver_switch_type = rr_graph.edge_switch(RREdgeId(edge_idx));
12671267
} else {
1268-
VTR_ASSERT(rr_node_power[node.edge_sink_node(edge_idx)].driver_switch_type == node.edge_switch(edge_idx));
1268+
VTR_ASSERT(rr_node_power[node.edge_sink_node(edge_idx)].driver_switch_type == rr_graph.edge_switch(RREdgeId(edge_idx)));
12691269
}
12701270
}
12711271
}

‎vpr/src/route/check_rr_graph.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@ void check_rr_graph(const t_graph_type graph_type,
9494
edges.emplace_back(to_node, iedge);
9595
total_edges_to_node[to_node]++;
9696

97-
auto switch_type = device_ctx.rr_nodes[inode].edge_switch(iedge);
97+
auto switch_type = rr_graph.edge_switch(RRNodeId(inode), iedge);
9898

9999
if (switch_type < 0 || switch_type >= num_rr_switches) {
100100
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
@@ -158,7 +158,7 @@ void check_rr_graph(const t_graph_type graph_type,
158158
std::map<short, int> switch_counts;
159159
for (const auto& to_edge : vtr::Range<decltype(edges)::const_iterator>(range.first, range.second)) {
160160
auto edge = to_edge.second;
161-
auto edge_switch = device_ctx.rr_nodes[inode].edge_switch(edge);
161+
auto edge_switch = rr_graph.edge_switch(RRNodeId(inode), edge);
162162

163163
switch_counts[edge_switch]++;
164164
}
@@ -553,7 +553,7 @@ static void check_unbuffered_edges(int from_node) {
553553
if (to_rr_type != CHANX && to_rr_type != CHANY)
554554
continue;
555555

556-
from_switch_type = device_ctx.rr_nodes[from_node].edge_switch(from_edge);
556+
from_switch_type = rr_graph.edge_switch(RRNodeId(from_node), from_edge);
557557

558558
if (device_ctx.rr_switch_inf[from_switch_type].buffered())
559559
continue;
@@ -567,7 +567,7 @@ static void check_unbuffered_edges(int from_node) {
567567

568568
for (to_edge = 0; to_edge < to_num_edges; to_edge++) {
569569
if (device_ctx.rr_nodes[to_node].edge_sink_node(to_edge) == from_node
570-
&& device_ctx.rr_nodes[to_node].edge_switch(to_edge) == from_switch_type) {
570+
&& rr_graph.edge_switch(RRNodeId(to_node), to_edge) == from_switch_type) {
571571
trans_matched = true;
572572
break;
573573
}
@@ -606,7 +606,7 @@ static void check_rr_edge(int from_node, int iedge, int to_node) {
606606
const auto& rr_graph = device_ctx.rr_graph;
607607

608608
//Check that to to_node's fan-in is correct, given the switch type
609-
int iswitch = device_ctx.rr_nodes[from_node].edge_switch(iedge);
609+
int iswitch = rr_graph.edge_switch(RRNodeId(from_node), iedge);
610610
auto switch_type = device_ctx.rr_switch_inf[iswitch].type();
611611

612612
int to_fanin = rr_graph.node_fan_in(RRNodeId(to_node));

‎vpr/src/route/route_common.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -627,6 +627,7 @@ static std::pair<t_trace*, t_trace*> add_trace_non_configurable_recurr(int node,
627627
//Record the non-configurable out-going edges
628628
std::vector<t_edge_size> unvisited_non_configurable_edges;
629629
auto& device_ctx = g_vpr_ctx.device();
630+
const auto& rr_graph = device_ctx.rr_graph;
630631
for (auto iedge : device_ctx.rr_nodes[node].non_configurable_edges()) {
631632
VTR_ASSERT_SAFE(!device_ctx.rr_nodes[node].edge_is_configurable(iedge));
632633

@@ -654,7 +655,7 @@ static std::pair<t_trace*, t_trace*> add_trace_non_configurable_recurr(int node,
654655
//Recursive case: intermediate node with non-configurable edges
655656
for (auto iedge : unvisited_non_configurable_edges) {
656657
int to_node = device_ctx.rr_nodes[node].edge_sink_node(iedge);
657-
int iswitch = device_ctx.rr_nodes[node].edge_switch(iedge);
658+
int iswitch = rr_graph.edge_switch(RRNodeId(node), iedge);
658659

659660
VTR_ASSERT(!trace_nodes.count(to_node));
660661
trace_nodes.insert(node);
@@ -1561,7 +1562,7 @@ bool validate_traceback_recurr(t_trace* trace, std::set<int>& seen_rr_nodes) {
15611562
//Check there is an edge connecting trace and next
15621563

15631564
auto& device_ctx = g_vpr_ctx.device();
1564-
1565+
const auto& rr_graph = device_ctx.rr_graph;
15651566
bool found = false;
15661567
for (t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[trace->index].num_edges(); ++iedge) {
15671568
int to_node = device_ctx.rr_nodes[trace->index].edge_sink_node(iedge);
@@ -1570,7 +1571,7 @@ bool validate_traceback_recurr(t_trace* trace, std::set<int>& seen_rr_nodes) {
15701571
found = true;
15711572

15721573
//Verify that the switch matches
1573-
int rr_iswitch = device_ctx.rr_nodes[trace->index].edge_switch(iedge);
1574+
int rr_iswitch = rr_graph.edge_switch(RRNodeId(trace->index), iedge);
15741575
if (trace->iswitch != rr_iswitch) {
15751576
VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "Traceback mismatched switch type: traceback %d rr_graph %d (RR nodes %d -> %d)\n",
15761577
trace->iswitch, rr_iswitch,

‎vpr/src/route/route_tree_timing.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -428,7 +428,7 @@ static t_rt_node* add_non_configurable_to_route_tree(const int rr_node, const bo
428428
t_rt_node* child_rt_node = add_non_configurable_to_route_tree(to_rr_node, true, visited);
429429

430430
if (!child_rt_node) continue;
431-
int iswitch = device_ctx.rr_nodes[rr_node].edge_switch(iedge);
431+
int iswitch = rr_graph.edge_switch(RRNodeId(rr_node), iedge);
432432

433433
//Create the edge
434434
t_linked_rt_edge* linked_rt_edge = alloc_linked_rt_edge();

‎vpr/src/route/router_lookahead_extended_map.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -312,7 +312,7 @@ bool ExtendedMapLookahead::add_paths(RRNodeId start_node,
312312

313313
if (size_t(this_node) != size_t(start_node)) {
314314
auto& parent_node = device_ctx.rr_nodes[size_t(parent)];
315-
start_to_here = Entry(this_node, parent_node.edge_switch(paths[*it].edge), &start_to_here);
315+
start_to_here = Entry(this_node, rr_graph.edge_switch(RREdgeId(paths[*it].edge)), &start_to_here);
316316
parent = this_node;
317317
}
318318

‎vpr/src/route/router_lookahead_map_utils.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -262,10 +262,11 @@ void expand_dijkstra_neighbours(const t_rr_graph_storage& rr_nodes,
262262
RRNodeId parent = parent_entry.rr_node;
263263

264264
auto& parent_node = rr_nodes[size_t(parent)];
265-
265+
auto& device_ctx = g_vpr_ctx.device();
266+
const auto& rr_graph = device_ctx.rr_graph;
266267
for (int iedge = 0; iedge < parent_node.num_edges(); iedge++) {
267268
int child_node_ind = parent_node.edge_sink_node(iedge);
268-
int switch_ind = parent_node.edge_switch(iedge);
269+
int switch_ind = rr_graph.edge_switch(RREdgeId(iedge));
269270

270271
/* skip this child if it has already been expanded from */
271272
if ((*node_expanded)[child_node_ind]) {

‎vpr/src/route/rr_graph_area.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -178,7 +178,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
178178
switch (to_rr_type) {
179179
case CHANX:
180180
case CHANY:
181-
iswitch = device_ctx.rr_nodes[from_node].edge_switch(iedge);
181+
iswitch = rr_graph.edge_switch(RRNodeId(from_node), iedge);
182182

183183
if (device_ctx.rr_switch_inf[iswitch].buffered()) {
184184
iseg = seg_index_of_sblock(from_node, size_t(to_node));
@@ -253,7 +253,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
253253
shared_opin_buffer_trans = 0.;
254254

255255
for (iedge = 0; iedge < num_edges; iedge++) {
256-
iswitch = device_ctx.rr_nodes[from_node].edge_switch(iedge);
256+
iswitch = rr_graph.edge_switch(RRNodeId(from_node), iedge);
257257
ntrans_no_sharing += unsharable_switch_trans[iswitch]
258258
+ sharable_switch_trans[iswitch];
259259
ntrans_sharing += unsharable_switch_trans[iswitch];
@@ -377,7 +377,7 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
377377
case CHANX:
378378
case CHANY:
379379
if (!chan_node_switch_done[size_t(to_node)]) {
380-
int switch_index = device_ctx.rr_nodes[from_node].edge_switch(iedge);
380+
int switch_index = rr_graph.edge_switch(RRNodeId(from_node), iedge);
381381
auto switch_type = device_ctx.rr_switch_inf[switch_index].type();
382382

383383
int fan_in = rr_graph.node_fan_in(to_node);

‎vpr/src/route/rr_graph_timing_params.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,8 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) {
5959
to_rr_type = rr_graph.node_type(RRNodeId(to_node));
6060

6161
if (to_rr_type == CHANX || to_rr_type == CHANY) {
62-
switch_index = device_ctx.rr_nodes[inode].edge_switch(iedge);
62+
switch_index = rr_graph.edge_switch(RRNodeId(inode), iedge);
63+
;
6364
Cin = device_ctx.rr_switch_inf[switch_index].Cin;
6465
Cout = device_ctx.rr_switch_inf[switch_index].Cout;
6566
buffered = device_ctx.rr_switch_inf[switch_index].buffered();
@@ -150,7 +151,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) {
150151
/* End node is CHANX or CHANY */
151152
else if (from_rr_type == OPIN) {
152153
for (t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[inode].num_edges(); iedge++) {
153-
switch_index = device_ctx.rr_nodes[inode].edge_switch(iedge);
154+
switch_index = rr_graph.edge_switch(RRNodeId(inode), iedge);
154155
to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
155156
to_rr_type = rr_graph.node_type(RRNodeId(to_node));
156157

@@ -174,7 +175,7 @@ void add_rr_graph_C_from_switches(float C_ipin_cblock) {
174175
Couts_to_add = (float*)vtr::calloc(device_ctx.rr_nodes.size(), sizeof(float));
175176
for (size_t inode = 0; inode < device_ctx.rr_nodes.size(); inode++) {
176177
for (t_edge_size iedge = 0; iedge < device_ctx.rr_nodes[inode].num_edges(); iedge++) {
177-
switch_index = device_ctx.rr_nodes[inode].edge_switch(iedge);
178+
switch_index = rr_graph.edge_switch(RRNodeId(inode), iedge);
178179
to_node = device_ctx.rr_nodes[inode].edge_sink_node(iedge);
179180
to_rr_type = rr_graph.node_type(RRNodeId(to_node));
180181
if (to_rr_type == CHANX || to_rr_type == CHANY) {

‎vpr/src/route/rr_graph_uxsdcxx_serializer.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -170,7 +170,8 @@ class EdgeWalker {
170170
}
171171
int current_switch_id_node() const {
172172
VTR_ASSERT(current_src_inode_ < nodes_->size());
173-
return (*nodes_)[current_src_inode_].edge_switch(current_edge_);
173+
return nodes_->edge_switch(RRNodeId(current_src_inode_), current_edge_);
174+
;
174175
}
175176

176177
size_t advance(int n) {

‎vpr/src/route/rr_node.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,10 +11,9 @@ short t_rr_node::length() const {
1111
}
1212

1313
bool t_rr_node::edge_is_configurable(t_edge_size iedge) const {
14-
auto iswitch = edge_switch(iedge);
15-
1614
auto& device_ctx = g_vpr_ctx.device();
17-
15+
const auto& rr_graph = device_ctx.rr_graph;
16+
auto iswitch = rr_graph.edge_switch(RREdgeId(iedge));
1817
return device_ctx.rr_switch_inf[iswitch].configurable();
1918
}
2019

‎vpr/src/route/rr_node_impl.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -98,8 +98,8 @@ inline int t_rr_node::edge_sink_node(t_edge_size iedge) const {
9898
size_t inode = (size_t)storage_->edge_sink_node(id_, iedge);
9999
return inode;
100100
}
101-
inline short t_rr_node::edge_switch(t_edge_size iedge) const {
102-
return storage_->edge_switch(id_, iedge);
103-
}
101+
//inline short t_rr_node::edge_switch(t_edge_size iedge) const {
102+
// return storage_->edge_switch(id_, iedge);
103+
//}
104104

105105
#endif /* _RR_NODE_IMPL_H_ */

‎vpr/src/util/vpr_utils.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1788,7 +1788,7 @@ static int convert_switch_index(int* switch_index, int* fanin) {
17881788
*/
17891789
void print_switch_usage() {
17901790
auto& device_ctx = g_vpr_ctx.device();
1791-
1791+
const auto& rr_graph = device_ctx.rr_graph;
17921792
if (device_ctx.switch_fanin_remap.empty()) {
17931793
VTR_LOG_WARN("Cannot print switch usage stats: device_ctx.switch_fanin_remap is empty\n");
17941794
return;
@@ -1804,7 +1804,7 @@ void print_switch_usage() {
18041804
const t_rr_node& from_node = device_ctx.rr_nodes[inode];
18051805
int num_edges = from_node.num_edges();
18061806
for (int iedge = 0; iedge < num_edges; iedge++) {
1807-
int switch_index = from_node.edge_switch(iedge);
1807+
int switch_index = rr_graph.edge_switch(RREdgeId(iedge));
18081808
int to_node_index = from_node.edge_sink_node(iedge);
18091809
// Assumption: suppose for a L4 wire (bi-directional): ----+----+----+----, it can be driven from any point (0, 1, 2, 3).
18101810
// physically, the switch driving from point 1 & 3 should be the same. But we will assign then different switch

‎vpr/test/test_vpr.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -144,7 +144,7 @@ TEST_CASE("read_rr_graph_metadata", "[vpr]") {
144144

145145
REQUIRE(src_inode >= 0);
146146
sink_inode = device_ctx.rr_nodes[src_inode].edge_sink_node(0);
147-
switch_id = device_ctx.rr_nodes[src_inode].edge_switch(0);
147+
switch_id = rr_graph.edge_switch(RRNodeId(src_inode), 0);
148148

149149
vpr::add_rr_node_metadata(src_inode, vtr::string_view("node"), vtr::string_view("test node"));
150150
vpr::add_rr_edge_metadata(src_inode, sink_inode, switch_id, vtr::string_view("edge"), vtr::string_view("test edge"));

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