update golden results

Author: soheilshahrouz

vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/multless_consts/config/golden_results.txt

@@ -1,2 +1,2 @@
- arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  crit_path_total_internal_heap_pushes	  crit_path_total_internal_heap_pops	  crit_path_total_external_heap_pushes	  crit_path_total_external_heap_pops	  crit_path_total_external_SOURCE_pushes	  crit_path_total_external_SOURCE_pops	  crit_path_total_internal_SOURCE_pushes	  crit_path_total_internal_SOURCE_pops	  crit_path_total_external_SINK_pushes	  crit_path_total_external_SINK_pops	  crit_path_total_internal_SINK_pushes	  crit_path_total_internal_SINK_pops	  crit_path_total_external_IPIN_pushes	  crit_path_total_external_IPIN_pops	  crit_path_total_internal_IPIN_pushes	  crit_path_total_internal_IPIN_pops	  crit_path_total_external_OPIN_pushes	  crit_path_total_external_OPIN_pops	  crit_path_total_internal_OPIN_pushes	  crit_path_total_internal_OPIN_pops	  crit_path_total_external_CHANX_pushes	  crit_path_total_external_CHANX_pops	  crit_path_total_internal_CHANX_pushes	  crit_path_total_internal_CHANX_pops	  crit_path_total_external_CHANY_pushes	  crit_path_total_external_CHANY_pops	  crit_path_total_internal_CHANY_pushes	  crit_path_total_internal_CHANY_pops	  crit_path_rt_node_SOURCE_pushes	  crit_path_rt_node_SINK_pushes	  crit_path_rt_node_IPIN_pushes	  crit_path_rt_node_OPIN_pushes	  crit_path_rt_node_CHANX_pushes	  crit_path_rt_node_CHANY_pushes	  crit_path_adding_all_rt	  crit_path_adding_high_fanout_rt	  crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	 
- k6_frac_N10_frac_chain_mem32K_40nm.xml	  button_controller.sv	  common	  1.91	  vpr	  65.81 MiB	  	  -1	  -1	  0.90	  56460	  3	  0.05	  -1	  -1	  35436	  -1	  -1	  13	  3	  0	  0	  success	  222546b-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.5.0 on Linux-5.10.35-v8 x86_64	  2023-08-14T20:40:44	  gh-actions-runner-vtr-auto-spawned20	  /root/vtr-verilog-to-routing/vtr-verilog-to-routing	  67392	  3	  12	  252	  216	  1	  125	  28	  7	  7	  49	  clb	  auto	  27.2 MiB	  0.09	  409	  65.8 MiB	  0.02	  0.00	  1.9464	  -118.797	  -1.9464	  1.9464	  0.05	  9.4184e-05	  7.2011e-05	  0.00579816	  0.0049021	  40	  685	  17	  1.07788e+06	  700622	  95414.1	  1947.23	  0.26	  0.0439795	  0.036483	  3948	  17640	  -1	  588	  12	  358	  524	  12860	  4074	  0	  0	  12860	  4074	  524	  432	  0	  0	  745	  603	  0	  0	  847	  745	  0	  0	  559	  475	  0	  0	  4900	  981	  0	  0	  5285	  838	  0	  0	  524	  0	  0	  166	  188	  128	  1608	  0	  0	  2.28597	  2.28597	  -135.833	  -2.28597	  0	  0	  120731.	  2463.90	  0.02	  0.01	  0.01	  -1	  -1	  0.02	  0.00890339	  0.00832405	 
+ arch	  circuit	  script_params	  vtr_flow_elapsed_time	  vtr_max_mem_stage	  vtr_max_mem	  error	  odin_synth_time	  max_odin_mem	  parmys_synth_time	  max_parmys_mem	  abc_depth	  abc_synth_time	  abc_cec_time	  abc_sec_time	  max_abc_mem	  ace_time	  max_ace_mem	  num_clb	  num_io	  num_memories	  num_mult	  vpr_status	  vpr_revision	  vpr_build_info	  vpr_compiler	  vpr_compiled	  hostname	  rundir	  max_vpr_mem	  num_primary_inputs	  num_primary_outputs	  num_pre_packed_nets	  num_pre_packed_blocks	  num_netlist_clocks	  num_post_packed_nets	  num_post_packed_blocks	  device_width	  device_height	  device_grid_tiles	  device_limiting_resources	  device_name	  pack_mem	  pack_time	  placed_wirelength_est	  total_swap	  accepted_swap	  rejected_swap	  aborted_swap	  place_mem	  place_time	  place_quench_time	  placed_CPD_est	  placed_setup_TNS_est	  placed_setup_WNS_est	  placed_geomean_nonvirtual_intradomain_critical_path_delay_est	  place_delay_matrix_lookup_time	  place_quench_timing_analysis_time	  place_quench_sta_time	  place_total_timing_analysis_time	  place_total_sta_time	  min_chan_width	  routed_wirelength	  min_chan_width_route_success_iteration	  logic_block_area_total	  logic_block_area_used	  min_chan_width_routing_area_total	  min_chan_width_routing_area_per_tile	  min_chan_width_route_time	  min_chan_width_total_timing_analysis_time	  min_chan_width_total_sta_time	  crit_path_num_rr_graph_nodes	  crit_path_num_rr_graph_edges	  crit_path_collapsed_nodes	  crit_path_routed_wirelength	  crit_path_route_success_iteration	  crit_path_total_nets_routed	  crit_path_total_connections_routed	  crit_path_total_heap_pushes	  crit_path_total_heap_pops	  critical_path_delay	  geomean_nonvirtual_intradomain_critical_path_delay	  setup_TNS	  setup_WNS	  hold_TNS	  hold_WNS	  crit_path_routing_area_total	  crit_path_routing_area_per_tile	  router_lookahead_computation_time	  crit_path_route_time	  crit_path_create_rr_graph_time	  crit_path_create_intra_cluster_rr_graph_time	  crit_path_tile_lookahead_computation_time	  crit_path_router_lookahead_computation_time	  crit_path_total_timing_analysis_time	  crit_path_total_sta_time	 
+ k6_frac_N10_frac_chain_mem32K_40nm.xml	  button_controller.sv	  common	  1.72	  vpr	  66.80 MiB	  	  -1	  -1	  0.75	  56388	  3	  0.06	  -1	  -1	  36472	  -1	  -1	  13	  3	  0	  0	  success	  82df625-dirty	  release IPO VTR_ASSERT_LEVEL=2	  GNU 9.5.0 on Linux-5.10.35-v8 x86_64	  2024-06-06T17:24:10	  gh-actions-runner-vtr-auto-spawned192	  /root/vtr-verilog-to-routing/vtr-verilog-to-routing	  68408	  3	  12	  252	  216	  1	  125	  28	  7	  7	  49	  clb	  auto	  28.2 MiB	  0.09	  443	  1414	  320	  1039	  55	  66.8 MiB	  0.02	  0.00	  1.98834	  -120.696	  -1.98834	  1.98834	  0.05	  0.000235021	  0.000213123	  0.0105204	  0.00962842	  28	  1161	  41	  1.07788e+06	  700622	  72669.7	  1483.05	  0.28	  0.0866479	  0.0736936	  3564	  12808	  -1	  735	  22	  806	  1202	  35397	  11901	  2.47441	  2.47441	  -144.322	  -2.47441	  0	  0	  87745.0	  1790.71	  0.01	  0.02	  0.01	  -1	  -1	  0.01	  0.0155522	  0.0139728