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acomodi
authored and
kmurray
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refactor num_block_types to vector.size()
Signed-off-by: Alessandro Comodi <[email protected]>
1 parent 101aa3e commit 841c718

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41 files changed

+417
-458
lines changed

‎ODIN_II/SRC/odin_ii.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,6 @@ global_args_t global_args;
7070
std::vector<t_physical_tile_type> physical_tile_types;
7171
std::vector<t_logical_block_type> logical_block_types;
7272
int block_tag = -1;
73-
int num_types = 0;
7473
ids default_net_type = WIRE;
7574

7675
enum ODIN_ERROR_CODE
@@ -259,7 +258,7 @@ netlist_t *start_odin_ii(int argc,char **argv)
259258
printf("Reading FPGA Architecture file\n");
260259
try
261260
{
262-
XmlReadArch(global_args.arch_file.value().c_str(), false, &Arch, physical_tile_types, logical_block_types, &num_types);
261+
XmlReadArch(global_args.arch_file.value().c_str(), false, &Arch, physical_tile_types, logical_block_types);
263262
}
264263
catch(vtr::VtrError& vtr_error)
265264
{
@@ -330,8 +329,8 @@ int terminate_odin_ii(netlist_t *odin_netlist)
330329

331330
//Clean-up
332331
free_arch(&Arch);
333-
free_type_descriptors(logical_block_types, num_types);
334-
free_type_descriptors(physical_tile_types, num_types);
332+
free_type_descriptors(logical_block_types);
333+
free_type_descriptors(physical_tile_types);
335334

336335
return 0;
337336
}

‎libs/libarchfpga/src/arch_util.cpp

Lines changed: 44 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@
1212
#include "read_xml_arch_file.h"
1313
#include "read_xml_util.h"
1414

15-
static void free_all_pb_graph_nodes(std::vector<t_logical_block_type>& type_descriptors, int num_type_descriptors);
15+
static void free_all_pb_graph_nodes(std::vector<t_logical_block_type>& type_descriptors);
1616
static void free_pb_graph(t_pb_graph_node* pb_graph_node);
1717
static void free_pb_type(t_pb_type* pb_type);
1818

@@ -215,67 +215,67 @@ void free_arch(t_arch* arch) {
215215
}
216216
}
217217

218-
void free_type_descriptors(std::vector<t_physical_tile_type>& type_descriptors, int num_type_descriptors) {
219-
for (int i = 0; i < num_type_descriptors; ++i) {
220-
vtr::free(type_descriptors[i].name);
221-
if (i == EMPTY_TYPE_INDEX) {
218+
void free_type_descriptors(std::vector<t_physical_tile_type>& type_descriptors) {
219+
for (auto &type : type_descriptors) {
220+
vtr::free(type.name);
221+
if (type.index == EMPTY_TYPE_INDEX) {
222222
continue;
223223
}
224224

225-
for (int width = 0; width < type_descriptors[i].width; ++width) {
226-
for (int height = 0; height < type_descriptors[i].height; ++height) {
225+
for (int width = 0; width < type.width; ++width) {
226+
for (int height = 0; height < type.height; ++height) {
227227
for (int side = 0; side < 4; ++side) {
228-
for (int pin = 0; pin < type_descriptors[i].num_pin_loc_assignments[width][height][side]; ++pin) {
229-
if (type_descriptors[i].pin_loc_assignments[width][height][side][pin])
230-
vtr::free(type_descriptors[i].pin_loc_assignments[width][height][side][pin]);
228+
for (int pin = 0; pin < type.num_pin_loc_assignments[width][height][side]; ++pin) {
229+
if (type.pin_loc_assignments[width][height][side][pin])
230+
vtr::free(type.pin_loc_assignments[width][height][side][pin]);
231231
}
232-
vtr::free(type_descriptors[i].pinloc[width][height][side]);
233-
vtr::free(type_descriptors[i].pin_loc_assignments[width][height][side]);
232+
vtr::free(type.pinloc[width][height][side]);
233+
vtr::free(type.pin_loc_assignments[width][height][side]);
234234
}
235-
vtr::free(type_descriptors[i].pinloc[width][height]);
236-
vtr::free(type_descriptors[i].pin_loc_assignments[width][height]);
237-
vtr::free(type_descriptors[i].num_pin_loc_assignments[width][height]);
235+
vtr::free(type.pinloc[width][height]);
236+
vtr::free(type.pin_loc_assignments[width][height]);
237+
vtr::free(type.num_pin_loc_assignments[width][height]);
238238
}
239-
vtr::free(type_descriptors[i].pinloc[width]);
240-
vtr::free(type_descriptors[i].pin_loc_assignments[width]);
241-
vtr::free(type_descriptors[i].num_pin_loc_assignments[width]);
239+
vtr::free(type.pinloc[width]);
240+
vtr::free(type.pin_loc_assignments[width]);
241+
vtr::free(type.num_pin_loc_assignments[width]);
242242
}
243-
vtr::free(type_descriptors[i].pinloc);
244-
vtr::free(type_descriptors[i].pin_loc_assignments);
245-
vtr::free(type_descriptors[i].num_pin_loc_assignments);
243+
vtr::free(type.pinloc);
244+
vtr::free(type.pin_loc_assignments);
245+
vtr::free(type.num_pin_loc_assignments);
246246

247-
for (int j = 0; j < type_descriptors[i].num_class; ++j) {
248-
vtr::free(type_descriptors[i].class_inf[j].pinlist);
247+
for (int j = 0; j < type.num_class; ++j) {
248+
vtr::free(type.class_inf[j].pinlist);
249249
}
250-
vtr::free(type_descriptors[i].class_inf);
251-
vtr::free(type_descriptors[i].is_ignored_pin);
252-
vtr::free(type_descriptors[i].is_pin_global);
253-
vtr::free(type_descriptors[i].pin_class);
250+
vtr::free(type.class_inf);
251+
vtr::free(type.is_ignored_pin);
252+
vtr::free(type.is_pin_global);
253+
vtr::free(type.pin_class);
254254
}
255255
type_descriptors.clear();
256256
}
257257

258-
void free_type_descriptors(std::vector<t_logical_block_type>& type_descriptors, int num_type_descriptors) {
259-
free_all_pb_graph_nodes(type_descriptors, num_type_descriptors);
258+
void free_type_descriptors(std::vector<t_logical_block_type>& type_descriptors) {
259+
free_all_pb_graph_nodes(type_descriptors);
260260

261-
for (int i = 0; i < num_type_descriptors; ++i) {
262-
vtr::free(type_descriptors[i].name);
263-
if (i == EMPTY_TYPE_INDEX) {
261+
for (auto &type : type_descriptors) {
262+
vtr::free(type.name);
263+
if (type.index == EMPTY_TYPE_INDEX) {
264264
continue;
265265
}
266266

267-
free_pb_type(type_descriptors[i].pb_type);
268-
delete type_descriptors[i].pb_type;
267+
free_pb_type(type.pb_type);
268+
delete type.pb_type;
269269
}
270270
type_descriptors.clear();
271271
}
272272

273-
static void free_all_pb_graph_nodes(std::vector<t_logical_block_type>& type_descriptors, int num_type_descriptors) {
274-
for (int i = 0; i < num_type_descriptors; i++) {
275-
if (type_descriptors[i].pb_type) {
276-
if (type_descriptors[i].pb_graph_head) {
277-
free_pb_graph(type_descriptors[i].pb_graph_head);
278-
vtr::free(type_descriptors[i].pb_graph_head);
273+
static void free_all_pb_graph_nodes(std::vector<t_logical_block_type>& type_descriptors) {
274+
for (auto &type : type_descriptors) {
275+
if (type.pb_type) {
276+
if (type.pb_graph_head) {
277+
free_pb_graph(type.pb_graph_head);
278+
vtr::free(type.pb_graph_head);
279279
}
280280
}
281281
}
@@ -1096,12 +1096,10 @@ void CreateModelLibrary(t_arch* arch) {
10961096
}
10971097

10981098
void SyncModelsPbTypes(t_arch* arch,
1099-
const std::vector<t_logical_block_type>& Types,
1100-
const int NumTypes) {
1101-
int i;
1102-
for (i = 0; i < NumTypes; i++) {
1103-
if (Types[i].pb_type != nullptr) {
1104-
SyncModelsPbTypes_rec(arch, Types[i].pb_type);
1099+
const std::vector<t_logical_block_type>& Types) {
1100+
for (auto &Type : Types) {
1101+
if (Type.pb_type != nullptr) {
1102+
SyncModelsPbTypes_rec(arch, Type.pb_type);
11051103
}
11061104
}
11071105
}

‎libs/libarchfpga/src/arch_util.h

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -39,8 +39,8 @@ class InstPort {
3939

4040
void free_arch(t_arch* arch);
4141

42-
void free_type_descriptors(std::vector<t_logical_block_type>& type_descriptors, int num_type_descriptors);
43-
void free_type_descriptors(std::vector<t_physical_tile_type>& type_descriptors, int num_type_descriptors);
42+
void free_type_descriptors(std::vector<t_logical_block_type>& type_descriptors);
43+
void free_type_descriptors(std::vector<t_physical_tile_type>& type_descriptors);
4444

4545
t_port* findPortByName(const char* name, t_pb_type* pb_type, int* high_index, int* low_index);
4646

@@ -60,8 +60,7 @@ e_power_estimation_method power_method_inherited(e_power_estimation_method paren
6060
void CreateModelLibrary(t_arch* arch);
6161

6262
void SyncModelsPbTypes(t_arch* arch,
63-
const std::vector<t_logical_block_type>& Types,
64-
const int NumTypes);
63+
const std::vector<t_logical_block_type>& Types);
6564

6665
void SyncModelsPbTypes_rec(t_arch* arch,
6766
t_pb_type* pb_type);

‎libs/libarchfpga/src/echo_arch.cpp

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,6 @@ static void PrintPb_types_recPower(FILE* Echo,
2222
void EchoArch(const char* EchoFile,
2323
const std::vector<t_physical_tile_type>& PhysicalTileTypes,
2424
const std::vector<t_logical_block_type>& LogicalBlockTypes,
25-
const int NumTypes,
2625
const t_arch* arch) {
2726
int i, j;
2827
FILE* Echo;
@@ -76,12 +75,12 @@ void EchoArch(const char* EchoFile,
7675
}
7776
fprintf(Echo, "*************************************************\n\n");
7877
fprintf(Echo, "*************************************************\n");
79-
for (i = 0; i < NumTypes; ++i) {
80-
fprintf(Echo, "Type: \"%s\"\n", PhysicalTileTypes[i].name);
81-
fprintf(Echo, "\tcapacity: %d\n", PhysicalTileTypes[i].capacity);
82-
fprintf(Echo, "\twidth: %d\n", PhysicalTileTypes[i].width);
83-
fprintf(Echo, "\theight: %d\n", PhysicalTileTypes[i].height);
84-
for (const t_fc_specification& fc_spec : PhysicalTileTypes[i].fc_specs) {
78+
for (auto &Type : PhysicalTileTypes) {
79+
fprintf(Echo, "Type: \"%s\"\n", Type.name);
80+
fprintf(Echo, "\tcapacity: %d\n", Type.capacity);
81+
fprintf(Echo, "\twidth: %d\n", Type.width);
82+
fprintf(Echo, "\theight: %d\n", Type.height);
83+
for (const t_fc_specification& fc_spec : Type.fc_specs) {
8584
fprintf(Echo, "fc_value_type: ");
8685
if (fc_spec.fc_value_type == e_fc_value_type::ABSOLUTE) {
8786
fprintf(Echo, "ABSOLUTE");
@@ -98,13 +97,13 @@ void EchoArch(const char* EchoFile,
9897
}
9998
fprintf(Echo, "\n");
10099
}
101-
fprintf(Echo, "\tnum_drivers: %d\n", PhysicalTileTypes[i].num_drivers);
102-
fprintf(Echo, "\tnum_receivers: %d\n", PhysicalTileTypes[i].num_receivers);
100+
fprintf(Echo, "\tnum_drivers: %d\n", Type.num_drivers);
101+
fprintf(Echo, "\tnum_receivers: %d\n", Type.num_receivers);
103102

104-
int index = PhysicalTileTypes[i].index;
103+
int index = Type.index;
105104
fprintf(Echo, "\tindex: %d\n", index);
106-
if (LogicalBlockTypes[index].pb_type) {
107-
PrintPb_types_rec(Echo, LogicalBlockTypes[index].pb_type, 2);
105+
if (LogicalBlockTypes[Type.index].pb_type) {
106+
PrintPb_types_rec(Echo, LogicalBlockTypes[Type.index].pb_type, 2);
108107
}
109108
fprintf(Echo, "\n");
110109
}

‎libs/libarchfpga/src/echo_arch.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,6 @@
66
void EchoArch(const char* EchoFile,
77
const std::vector<t_physical_tile_type>& PhysicalTileTypes,
88
const std::vector<t_logical_block_type>& LogicalBlockTypes,
9-
const int NumTypes,
109
const t_arch* arch);
1110

1211
#endif

‎libs/libarchfpga/src/main.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,6 @@ int main(int argc, char** argv) {
2222
t_arch* arch = (t_arch*)vtr::calloc(1, sizeof(t_arch));
2323
std::vector<t_physical_tile_type> physical_tile_types;
2424
std::vector<t_logical_block_type> logical_block_types;
25-
int numTypes;
2625

2726
if (argc - 1 != 3) {
2827
printf("Error: Unexpected # of arguments. Expected 3 found %d arguments\n",
@@ -44,11 +43,11 @@ int main(int argc, char** argv) {
4443
printf("Reading in architecture\n");
4544

4645
/* function declarations */
47-
XmlReadArch(argv[1], atoi(argv[2]), arch, physical_tile_types, logical_block_types, &numTypes);
46+
XmlReadArch(argv[1], atoi(argv[2]), arch, physical_tile_types, logical_block_types);
4847

4948
printf("Printing Results\n");
5049

51-
EchoArch(argv[3], physical_tile_types, logical_block_types, numTypes, arch);
50+
EchoArch(argv[3], physical_tile_types, logical_block_types, arch);
5251
free(arch);
5352
} catch (vtr::VtrError& vtr_error) {
5453
printf("Failed to process architecture %s: %s\n", argv[1], vtr_error.what());

‎libs/libarchfpga/src/read_xml_arch_file.cpp

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,6 @@ static void ProcessDevice(pugi::xml_node Node, t_arch* arch, t_default_fc_spec&
120120
static void ProcessComplexBlocks(pugi::xml_node Node,
121121
std::vector<t_physical_tile_type>& PhysicalTileTypes,
122122
std::vector<t_logical_block_type>& LogicalBlockTypes,
123-
int* NumTypes,
124123
t_arch& arch,
125124
const bool timing_enabled,
126125
const t_default_fc_spec& arch_def_fc,
@@ -196,8 +195,7 @@ void XmlReadArch(const char* ArchFile,
196195
const bool timing_enabled,
197196
t_arch* arch,
198197
std::vector<t_physical_tile_type>& PhysicalTileTypes,
199-
std::vector<t_logical_block_type>& LogicalBlockTypes,
200-
int* NumTypes) {
198+
std::vector<t_logical_block_type>& LogicalBlockTypes) {
201199
pugi::xml_node Next;
202200
ReqOpt POWER_REQD, SWITCHBLOCKLIST_REQD;
203201

@@ -268,7 +266,7 @@ void XmlReadArch(const char* ArchFile,
268266

269267
/* Process types */
270268
Next = get_single_child(architecture, "complexblocklist", loc_data);
271-
ProcessComplexBlocks(Next, PhysicalTileTypes, LogicalBlockTypes, NumTypes, *arch, timing_enabled, arch_def_fc, loc_data);
269+
ProcessComplexBlocks(Next, PhysicalTileTypes, LogicalBlockTypes, *arch, timing_enabled, arch_def_fc, loc_data);
272270

273271
/* Process directs */
274272
Next = get_single_child(architecture, "directlist", loc_data, OPTIONAL);
@@ -339,7 +337,7 @@ void XmlReadArch(const char* ArchFile,
339337
free(clocks_fake);
340338
}
341339
}
342-
SyncModelsPbTypes(arch, LogicalBlockTypes, *NumTypes);
340+
SyncModelsPbTypes(arch, LogicalBlockTypes);
343341
UpdateAndCheckModels(arch);
344342

345343
} catch (XmlError& e) {
@@ -2650,7 +2648,6 @@ static void ProcessChanWidthDistrDir(pugi::xml_node Node, t_chan* chan, const pu
26502648
static void ProcessComplexBlocks(pugi::xml_node Node,
26512649
std::vector<t_physical_tile_type>& PhysicalTileTypes,
26522650
std::vector<t_logical_block_type>& LogicalBlockTypes,
2653-
int* NumTypes,
26542651
t_arch& arch,
26552652
const bool timing_enabled,
26562653
const t_default_fc_spec& arch_def_fc,
@@ -2659,11 +2656,10 @@ static void ProcessComplexBlocks(pugi::xml_node Node,
26592656
pugi::xml_node Cur;
26602657
map<string, int> pb_type_descriptors;
26612658
pair<map<string, int>::iterator, bool> ret_pb_type_descriptors;
2659+
26622660
/* Alloc the type list. Need one additional t_type_desctiptors:
26632661
* 1: empty psuedo-type
26642662
*/
2665-
*NumTypes = count_children(Node, "pb_type", loc_data) + 1;
2666-
26672663
t_physical_tile_type EMPTY_PHYSICAL_TILE_TYPE = SetupEmptyPhysicalType();
26682664
t_logical_block_type EMPTY_LOGICAL_BLOCK_TYPE = SetupEmptyLogicalType();
26692665
EMPTY_PHYSICAL_TILE_TYPE.index = 0;

‎libs/libarchfpga/src/read_xml_arch_file.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,7 @@ void XmlReadArch(const char* ArchFile,
1818
const bool timing_enabled,
1919
t_arch* arch,
2020
std::vector<t_physical_tile_type>& PhysicalTileTypes,
21-
std::vector<t_logical_block_type>& LogicalBlockTypes,
22-
int* NumTypes);
21+
std::vector<t_logical_block_type>& LogicalBlockTypes);
2322

2423
const char* get_arch_file_name();
2524

‎utils/fasm/src/fasm.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,8 @@ FasmWriterVisitor::FasmWriterVisitor(std::ostream& f) : os_(f) {}
3333
void FasmWriterVisitor::visit_top_impl(const char* top_level_name) {
3434
(void)top_level_name;
3535
auto& device_ctx = g_vpr_ctx.device();
36-
pb_graph_pin_lookup_from_index_by_type_.resize(device_ctx.num_block_types);
37-
for(int itype = 0; itype < device_ctx.num_block_types; itype++) {
36+
pb_graph_pin_lookup_from_index_by_type_.resize(device_ctx.logical_block_types.size());
37+
for(unsigned int itype = 0; itype < device_ctx.logical_block_types.size(); itype++) {
3838
pb_graph_pin_lookup_from_index_by_type_.at(itype) = alloc_and_load_pb_graph_pin_lookup_from_index(&device_ctx.logical_block_types[itype]);
3939
}
4040
}
@@ -612,7 +612,7 @@ void FasmWriterVisitor::walk_routing() {
612612

613613
void FasmWriterVisitor::finish_impl() {
614614
auto& device_ctx = g_vpr_ctx.device();
615-
for(int itype = 0; itype < device_ctx.num_block_types; itype++) {
615+
for(unsigned int itype = 0; itype < device_ctx.logical_block_types.size(); itype++) {
616616
free_pb_graph_pin_lookup_from_index (pb_graph_pin_lookup_from_index_by_type_.at(itype));
617617
}
618618

‎vpr/src/base/SetupGrid.cpp

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -278,7 +278,7 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt
278278
auto grid = vtr::Matrix<t_grid_tile>({grid_width, grid_height});
279279

280280
//Initialize the device to all empty blocks
281-
auto empty_type = find_block_type_by_name(EMPTY_BLOCK_NAME, device_ctx.physical_tile_types, device_ctx.num_block_types);
281+
auto empty_type = find_block_type_by_name(EMPTY_BLOCK_NAME, device_ctx.physical_tile_types);
282282
VTR_ASSERT(empty_type != nullptr);
283283
for (size_t x = 0; x < grid_width; ++x) {
284284
for (size_t y = 0; y < grid_height; ++y) {
@@ -291,7 +291,7 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt
291291
for (const auto& grid_loc_def : grid_def.loc_defs) {
292292
//Fill in the block types according to the specification
293293

294-
auto type = find_block_type_by_name(grid_loc_def.block_type, device_ctx.physical_tile_types, device_ctx.num_block_types);
294+
auto type = find_block_type_by_name(grid_loc_def.block_type, device_ctx.physical_tile_types);
295295

296296
if (!type) {
297297
VPR_FATAL_ERROR(VPR_ERROR_ARCH,
@@ -442,14 +442,12 @@ static DeviceGrid build_device_grid(const t_grid_def& grid_def, size_t grid_widt
442442
}
443443

444444
//Warn if any types were not specified in the grid layout
445-
for (int itype = 0; itype < device_ctx.num_block_types; ++itype) {
446-
t_physical_tile_type_ptr type = &device_ctx.physical_tile_types[itype];
445+
for (auto const &type : device_ctx.physical_tile_types) {
446+
if (&type == empty_type) continue; //Don't worry if empty hasn't been specified
447447

448-
if (type == empty_type) continue; //Don't worry if empty hasn't been specified
449-
450-
if (!seen_types.count(type)) {
448+
if (!seen_types.count(&type)) {
451449
VTR_LOG_WARN("Block type '%s' was not specified in device grid layout\n",
452-
type->name);
450+
type.name);
453451
}
454452
}
455453

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