@@ -420,7 +420,14 @@ struct t_clock_network {
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float dens; /* Switching density of net assigned to this clock */
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float period; /* Period of clock */
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- t_clock_network () = default ;
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+ t_clock_network (){
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+ autosize_buffer = false ;
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+ buffer_size = 0 .0f ;
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+ C_wire = 0 .0f ;
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+ prob = 0 .0f ;
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+ dens = 0 .0f ;
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+ period = 0 .0f ;
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+ }
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};
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/* Power-related architecture information */
@@ -433,12 +440,26 @@ struct t_power_arch {
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float mux_transistor_size;
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float FF_size;
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float LUT_transistor_size;
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+
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+ t_power_arch () {
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+ C_wire_local = 0 .0f ;
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+ logical_effort_factor = 0 .0f ;
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+ local_interc_factor = 0 .0f ;
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+ transistors_per_SRAM_bit = 0 .0f ;
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+ mux_transistor_size = 0 .0f ;
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+ FF_size = 0 .0f ;
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+ LUT_transistor_size = 0 .0f ;
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+ }
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};
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/* Power usage for an entity */
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struct t_power_usage {
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float dynamic;
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float leakage;
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+ t_power_usage (){
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+ dynamic = 0 .0f ;
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+ leakage = 0 .0f ;
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+ }
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};
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/* ************************************************************************************************/
@@ -466,14 +487,17 @@ struct t_class {
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/* Struct to hold the class ranges for specific sub tiles */
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struct t_class_range {
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- int low = 0 ;
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- int high = 0 ;
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+ int low;
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+ int high;
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// Returns the total number of classes
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int total_num () const {
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return high - low + 1 ;
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}
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- t_class_range () = default ;
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+ t_class_range (){
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+ low = 0 ;
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+ high = 0 ;
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+ }
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t_class_range (int low_class_num, int high_class_num)
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: low(low_class_num)
@@ -482,14 +506,17 @@ struct t_class_range {
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// Struct to hold the pin ranges for a specific sub block
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struct t_pin_range {
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- int low = 0 ;
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- int high = 0 ;
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+ int low;
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+ int high;
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// Returns the total number of pins
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int total_num () const {
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return high - low + 1 ;
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}
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- t_pin_range () = default ;
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+ t_pin_range (){
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+ low = 0 ;
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+ high = 0 ;
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+ }
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t_pin_range (int low_class_num, int high_class_num)
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: low(low_class_num)
@@ -533,6 +560,18 @@ struct t_port_power {
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t_port* scaled_by_port;
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int scaled_by_port_pin_idx;
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bool reverse_scaled; /* Scale by (1-prob) */
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+
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+ t_port_power (){
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+ wire_type = (e_power_wire_type) 0 ;
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+ wire = {0 .0f }; // Default to C = 0.0f
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+ buffer_type = (e_power_buffer_type) 0 ;
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+ buffer_size = 0 .0f ;
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+ pin_toggle_initialized = false ;
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+ energy_per_toggle = 0 .0f ;
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+ scaled_by_port = nullptr ;
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+ scaled_by_port_pin_idx = 0 ;
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+ reverse_scaled = false ;
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+ }
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};
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/* *
@@ -864,11 +903,15 @@ struct t_physical_pin {
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* above the base die, the layer_num is 1 and so on.
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*/
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struct t_physical_tile_loc {
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- int x = OPEN;
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- int y = OPEN;
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- int layer_num = OPEN;
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-
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- t_physical_tile_loc () = default ;
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+ int x;
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+ int y;
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+ int layer_num;
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+
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+ t_physical_tile_loc (){
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+ x = OPEN;
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+ y = OPEN;
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+ layer_num = OPEN;
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+ }
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t_physical_tile_loc (int x_val, int y_val, int layer_num_val)
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: x(x_val)
@@ -1140,26 +1183,39 @@ struct t_mode {
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*/
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struct t_interconnect {
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enum e_interconnect type;
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- char * name = nullptr ;
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+ char * name;
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- char * input_string = nullptr ;
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- char * output_string = nullptr ;
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+ char * input_string;
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+ char * output_string;
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- t_pin_to_pin_annotation* annotations = nullptr ; /* [0..num_annotations-1] */
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- int num_annotations = 0 ;
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- bool infer_annotations = false ;
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+ t_pin_to_pin_annotation* annotations; /* [0..num_annotations-1] */
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+ int num_annotations;
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+ bool infer_annotations;
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- int line_num = 0 ; /* Interconnect is processed later, need to know what line number it messed up on to give proper error message */
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+ int line_num; /* Interconnect is processed later, need to know what line number it messed up on to give proper error message */
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- int parent_mode_index = 0 ;
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+ int parent_mode_index;
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/* Power related members */
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- t_mode* parent_mode = nullptr ;
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+ t_mode* parent_mode;
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- t_interconnect_power* interconnect_power = nullptr ;
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+ t_interconnect_power* interconnect_power;
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t_metadata_dict meta;
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- t_interconnect () = default ;
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+ t_interconnect (){
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+ type = (e_interconnect) 0 ;
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+ name = nullptr ;
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+ input_string = nullptr ;
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+ output_string = nullptr ;
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+ annotations = nullptr ;
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+ num_annotations = 0 ;
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+ infer_annotations = false ;
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+ line_num = 0 ;
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+ parent_mode_index = 0 ;
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+ parent_mode = nullptr ;
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+ interconnect_power = nullptr ;
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+ meta = t_metadata_dict ();
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+ }
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};
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/* * Describes I/O and clock ports
@@ -1197,6 +1253,22 @@ struct t_port {
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int absolute_first_pin_index;
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t_port_power* port_power;
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+
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+ t_port (){
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+ name = nullptr ;
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+ model_port = nullptr ;
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+ type = (PORTS) 0 ;
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+ is_clock = false ;
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+ is_non_clock_global = false ;
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+ num_pins = 0 ;
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+ equivalent = (PortEquivalence) 0 ;
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+ parent_pb_type = nullptr ;
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+ port_class = nullptr ;
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+ index = 0 ;
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+ port_index_by_type = 0 ;
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+ absolute_first_pin_index = 0 ;
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+ port_power = nullptr ;
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+ }
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};
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struct t_pb_type_power {
@@ -1223,6 +1295,15 @@ struct t_interconnect_power {
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int num_output_ports;
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int num_pins_per_port;
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float transistor_cnt;
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+
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+ t_interconnect_power () {
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+ power_usage = t_power_usage ();
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+ port_info_initialized = false ;
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+ num_input_ports = 0 ;
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+ num_output_ports = 0 ;
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+ num_pins_per_port = 0 ;
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+ transistor_cnt = 0 .0f ;
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+ }
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};
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struct t_interconnect_pins {
@@ -2044,15 +2125,18 @@ struct t_wireconn_inf {
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class SB_Side_Connection {
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public:
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/* specify the two SB sides that form a connection */
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- enum e_side from_side = TOP ;
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- enum e_side to_side = TOP ;
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+ enum e_side from_side;
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+ enum e_side to_side;
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void set_sides (enum e_side from, enum e_side to) {
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from_side = from;
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to_side = to;
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}
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- SB_Side_Connection () = default ;
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+ SB_Side_Connection (){
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+ from_side = TOP;
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+ to_side = TOP;
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+ }
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SB_Side_Connection (enum e_side from, enum e_side to)
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: from_side(from)
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