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/* ******************* Subroutines local to this module **********************/
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static void check_node_and_range (int inode, enum e_route_type route_type);
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static void check_source (int inode, ClusterNetId net_id);
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- static void check_sink (int inode, ClusterNetId net_id, std::set<vtr::StrongId<cluster_pin_id_tag>>& pin_done);
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+ static void check_sink (int inode, int net_pin_index, ClusterNetId net_id, bool * pin_done);
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static void check_switch (t_trace* tptr, int num_switch);
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static bool check_adjacent (int from_node, int to_node);
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static int chanx_chany_adjacent (int chanx_node, int chany_node);
@@ -46,7 +46,8 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
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return ;
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}
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- int max_pins, inode, prev_node;
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+ int max_pins, inode, net_pin_index, prev_node;
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+ unsigned int ipin;
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bool valid, connects;
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t_trace* tptr;
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@@ -79,13 +80,15 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
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for (auto net_id : cluster_ctx.clb_nlist .nets ())
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max_pins = std::max (max_pins, (int )cluster_ctx.clb_nlist .net_pins (net_id).size ());
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- std::set<vtr::StrongId<cluster_pin_id_tag>> pin_done ;
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+ auto pin_done = std::make_unique< bool []>(max_pins) ;
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/* Now check that all nets are indeed connected. */
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for (auto net_id : cluster_ctx.clb_nlist .nets ()) {
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if (cluster_ctx.clb_nlist .net_is_ignored (net_id) || cluster_ctx.clb_nlist .net_sinks (net_id).size () == 0 ) /* Skip ignored nets. */
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continue ;
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+ std::fill_n (pin_done.get (), cluster_ctx.clb_nlist .net_pins (net_id).size (), false );
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+
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/* Check the SOURCE of the net. */
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tptr = route_ctx.trace [net_id].head ;
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if (tptr == nullptr ) {
@@ -99,8 +102,7 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
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connected_to_route[inode] = true ; /* Mark as in path. */
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check_source (inode, net_id);
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- auto first_net_id = cluster_ctx.clb_nlist .net_pins (net_id).begin ();
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- pin_done.insert (*first_net_id); /* Insert the source */
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+ pin_done[0 ] = true ;
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prev_node = inode;
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int prev_switch = tptr->iswitch ;
@@ -110,6 +112,7 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
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size_t num_sinks = 0 ;
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while (tptr != nullptr ) {
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inode = tptr->index ;
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+ net_pin_index = tptr->net_pin_index ;
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check_node_and_range (inode, route_type);
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check_switch (tptr, num_switches);
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@@ -133,7 +136,7 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
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connected_to_route[inode] = true ; /* Mark as in path. */
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if (device_ctx.rr_nodes [inode].type () == SINK) {
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- check_sink (inode, net_id, pin_done);
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+ check_sink (inode, net_pin_index, net_id, pin_done. get () );
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num_sinks += 1 ;
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}
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@@ -150,11 +153,10 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
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num_sinks, cluster_ctx.clb_nlist .net_sinks (net_id).size ());
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}
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- for (auto pin_id : cluster_ctx.clb_nlist .net_pins (net_id)) {
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- if (pin_done.find (pin_id) == pin_done.end ()) {
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- int net_pin_index = tile_pin_index (pin_id);
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+ for (ipin = 0 ; ipin < cluster_ctx.clb_nlist .net_pins (net_id).size (); ipin++) {
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+ if (pin_done[ipin] == false ) {
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VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
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- " in check_route: net %zu does not connect to pin %d.\n " , size_t (net_id), net_pin_index );
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+ " in check_route: net %zu does not connect to pin %d.\n " , size_t (net_id), ipin );
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}
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}
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@@ -176,46 +178,22 @@ void check_route(enum e_route_type route_type, e_check_route_option check_route_
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/* Checks that this SINK node is one of the terminals of inet, and marks *
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* the appropriate pin as being reached. */
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- static void check_sink (int inode, ClusterNetId net_id, std::set<vtr::StrongId<cluster_pin_id_tag>>& pin_done) {
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+ static void check_sink (int inode, int net_pin_index, ClusterNetId net_id, bool * pin_done) {
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auto & device_ctx = g_vpr_ctx.device ();
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auto & cluster_ctx = g_vpr_ctx.clustering ();
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- auto & place_ctx = g_vpr_ctx.placement ();
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VTR_ASSERT (device_ctx.rr_nodes [inode].type () == SINK);
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- int i = device_ctx.rr_nodes [inode].xlow ();
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- int j = device_ctx.rr_nodes [inode].ylow ();
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- auto type = device_ctx.grid [i][j].type ;
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- /* For sinks, ptc_num is the class */
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- int ptc_num = device_ctx.rr_nodes [inode].ptc_num ();
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- int ifound = 0 ;
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-
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- for (auto bnum : place_ctx.grid_blocks [i][j].blocks ) {
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- for (auto pin_id : cluster_ctx.clb_nlist .net_sinks (net_id)) {
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- if (cluster_ctx.clb_nlist .pin_block (pin_id) == bnum) {
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- int pin_index = tile_pin_index (pin_id);
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- int iclass = type->pin_class [pin_index];
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- if (iclass == ptc_num) {
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- /* Could connect to same pin class on the same clb more than once. Only *
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- * update pin_done for a pin that hasn't been reached yet. */
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- if (pin_done.find (pin_id) == pin_done.end ()) {
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- ifound++;
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- pin_done.insert (pin_id);
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- break ;
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- }
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- }
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- }
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- }
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- }
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-
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- VTR_ASSERT (ifound <= 1 );
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- if (ifound < 1 ) {
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+ if (net_pin_index == OPEN ) { /* If there is no legal net pin index associated with this sink node */
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VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
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" in check_sink: node %d does not connect to any terminal of net %s #%lu.\n "
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" This error is usually caused by incorrectly specified logical equivalence in your architecture file.\n "
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" You should try to respecify what pins are equivalent or turn logical equivalence off.\n " ,
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inode, cluster_ctx.clb_nlist .net_name (net_id).c_str (), size_t (net_id));
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}
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+
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+ VTR_ASSERT (!pin_done[net_pin_index]); /* Should not have found a routed cnnection to it before */
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+ pin_done[net_pin_index] = true ;
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}
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/* Checks that the node passed in is a valid source for this net. */
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