more fixes for bitstream generation with flat router

Author: fkosar-ql

vpr/src/base/netlist_writer.cpp

@@ -1245,7 +1245,9 @@ class NetlistWriterVisitor : public NetlistVisitor {
 
         //Add the single output connection
         {
-            auto atom_net_id = top_pb_route[sink_cluster_pin_idx].atom_net_id; //Connected net in atom netlist
+            AtomNetId atom_net_id = AtomNetId::INVALID();
+            if (top_pb_route.count(sink_cluster_pin_idx))
+                atom_net_id = top_pb_route[sink_cluster_pin_idx].atom_net_id; //Connected net in atom netlist
 
             std::string net;
             if (!atom_net_id) {

vpr/src/base/vpr_api.cpp

@@ -17,6 +17,7 @@
 
 #include "FlatPlacementInfo.h"
 #include "cluster_util.h"
+#include "physical_types.h"
 #include "verify_placement.h"
 #include "vpr_context.h"
 #include "vtr_assert.h"
@@ -115,6 +116,9 @@ static void get_intercluster_switch_fanin_estimates(const t_vpr_setup& vpr_setup
                                                     int* opin_switch_fanin,
                                                     int* wire_switch_fanin,
                                                     int* ipin_switch_fanin);
+
+static void unset_port_equivalences(DeviceContext& device_ctx);
+
 /* Local subroutines end */
 
 ///@brief Display general VPR information
@@ -369,6 +373,25 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a
     device_ctx.pad_loc_type = vpr_setup->PlacerOpts.pad_loc_type;
 }
 
+/** Port equivalence does not make sense during flat routing.
+ * Remove port equivalence from all ports in the architecture */
+static void unset_port_equivalences(DeviceContext& device_ctx){
+    for(auto& physical_type: device_ctx.physical_tile_types){
+        for(auto& sub_tile: physical_type.sub_tiles){
+            for(auto& port: sub_tile.ports){
+                port.equivalent = PortEquivalence::NONE;
+            }
+        }
+    }
+    for(auto& logical_type: device_ctx.logical_block_types){
+        if(!logical_type.pb_type)
+            continue;
+        for(int i=0; i<logical_type.pb_type->num_ports; i++){
+            logical_type.pb_type->ports[i].equivalent = PortEquivalence::NONE;
+        }
+    }
+}
+
 bool vpr_flow(t_vpr_setup& vpr_setup, t_arch& arch) {
     if (vpr_setup.exit_before_pack) {
         VTR_LOG_WARN("Exiting before packing as requested.\n");
@@ -425,6 +448,8 @@ bool vpr_flow(t_vpr_setup& vpr_setup, t_arch& arch) {
 
     bool is_flat = vpr_setup.RouterOpts.flat_routing;
     const Netlist<>& router_net_list = is_flat ? (const Netlist<>&)g_vpr_ctx.atom().nlist : (const Netlist<>&)g_vpr_ctx.clustering().clb_nlist;
+    if (is_flat)
+        unset_port_equivalences(g_vpr_ctx.mutable_device());
     RouteStatus route_status;
     { //Route
         route_status = vpr_route_flow(router_net_list, vpr_setup, arch, is_flat);

vpr/src/pack/post_routing_pb_pin_fixup.cpp

@@ -1034,6 +1034,7 @@ void sync_netlists_to_routing(const Netlist<>& net_list,
     /* Create net-to-rr_node mapping */
     vtr::vector<RRNodeId, ClusterNetId> rr_node_nets = annotate_rr_node_nets(clustering_ctx,
                                                                             device_ctx,
+                                                                            atom_ctx,
                                                                             verbose);
 
     IntraLbPbPinLookup intra_lb_pb_pin_lookup(device_ctx.logical_block_types);

vpr/src/pack/sync_netlists_to_routing_flat.cpp

@@ -47,23 +47,6 @@ static void fixup_atom_pb_graph_pin_mapping(void);
 
 /* Function definitions */
 
-/** Is the clock net found in the routing results?
- * (If not, clock_modeling is probably ideal and we should preserve clock routing while rebuilding.) */
-inline bool is_clock_net_routed(void){
-    auto& atom_ctx = g_vpr_ctx.atom();
-    auto& route_ctx = g_vpr_ctx.routing();
-
-    for(auto net_id: atom_ctx.nlist.nets()){
-        auto& tree = route_ctx.route_trees[net_id];
-        if(!tree)
-            continue;
-        if(route_ctx.is_clock_net[net_id]) /* Clock net has routing */
-            return true;
-    }
-
-    return false;
-}
-
 /** Get the ClusterBlockId for a given RRNodeId. */
 inline ClusterBlockId get_cluster_block_from_rr_node(RRNodeId inode){
     auto& device_ctx = g_vpr_ctx.device();
@@ -190,21 +173,19 @@ static void sync_pb_routes_to_routing(void){
     auto& device_ctx = g_vpr_ctx.device();
     auto& atom_ctx = g_vpr_ctx.atom();
     auto& cluster_ctx = g_vpr_ctx.mutable_clustering();
+    auto& place_ctx = g_vpr_ctx.placement();
     auto& route_ctx = g_vpr_ctx.routing();
     auto& rr_graph = device_ctx.rr_graph;
 
-    /* Was the clock net routed? */
-    bool clock_net_is_routed = is_clock_net_routed();
-
     /* Clear out existing pb_routes: they were made by the intra cluster router and are invalid now */
     for (ClusterBlockId clb_blk_id : cluster_ctx.clb_nlist.blocks()) {
-        /* If we don't have routing for the clock net, don't erase entries associated with a clock net.
-         * Otherwise we won't have data to rebuild them */
+        /* Don't erase entries for nets without routing in place (clocks, globals...) */
         std::vector<int> pins_to_erase;
         auto& pb_routes = cluster_ctx.clb_nlist.block_pb(clb_blk_id)->pb_route;
         for(auto& [pin, pb_route]: pb_routes){
-            if(clock_net_is_routed || !route_ctx.is_clock_net[pb_route.atom_net_id])
-                pins_to_erase.push_back(pin);
+            if(!route_ctx.route_trees[ParentNetId(int(pb_route.atom_net_id))])
+                continue;
+            pins_to_erase.push_back(pin);
         }
 
         for(int pin: pins_to_erase){
@@ -286,8 +267,6 @@ static void sync_clustered_netlist_to_routing(void){
     auto& atom_ctx = g_vpr_ctx.mutable_atom();
     auto& atom_lookup = atom_ctx.lookup;
 
-    bool clock_net_is_routed = is_clock_net_routed();
-
     /* 1. Remove all nets, pins and ports from the clustered netlist.
      * If the clock net is not routed, don't remove entries for the clock net
      * otherwise we won't have data to rebuild them. */
@@ -297,26 +276,26 @@ static void sync_clustered_netlist_to_routing(void){
 
     for(auto net_id: clb_netlist.nets()){
         auto atom_net_id = atom_lookup.atom_net(net_id);
-        if(!clock_net_is_routed && route_ctx.is_clock_net[atom_net_id])
+        if(!route_ctx.route_trees[ParentNetId(int(atom_net_id))])
             continue;
 
         nets_to_remove.push_back(net_id);
     }
-    for(auto pin_id: clb_netlist.pins()){
-        ClusterNetId clb_net_id = clb_netlist.pin_net(pin_id);
-        auto atom_net_id = atom_lookup.atom_net(clb_net_id);
-        if(!clock_net_is_routed && atom_net_id && route_ctx.is_clock_net[atom_net_id])
-            continue;
-
-        pins_to_remove.push_back(pin_id);
-    }
     for(auto port_id: clb_netlist.ports()){
-        ClusterNetId clb_net_id = clb_netlist.port_net(port_id, 0);
-        auto atom_net_id = atom_lookup.atom_net(clb_net_id);
-        if(!clock_net_is_routed && atom_net_id && route_ctx.is_clock_net[atom_net_id])
-            continue;
+        size_t skipped_pins = 0;
+
+        for(auto pin_id: clb_netlist.port_pins(port_id)){
+            ClusterNetId clb_net_id = clb_netlist.pin_net(pin_id);
+            auto atom_net_id = atom_lookup.atom_net(clb_net_id);
+            if(atom_net_id && !route_ctx.route_trees[ParentNetId(int(atom_net_id))]){
+                skipped_pins++;
+            }else{
+                pins_to_remove.push_back(pin_id);
+            }
+        }
 
-        ports_to_remove.push_back(port_id);
+        if(!skipped_pins)  // All pins have been removed, remove port
+            ports_to_remove.push_back(port_id);
     }
 
     /* ClusteredNetlist's iterators rely on internal lookups, so we mark for removal
@@ -357,7 +336,14 @@ static void sync_clustered_netlist_to_routing(void){
 
             int pin_index = rr_graph.node_pin_num(rt_node.inode);
 
-            ClusterBlockId clb = get_cluster_block_from_rr_node(rt_node.inode);
+            auto [_, subtile] = get_sub_tile_from_pin_physical_num(physical_tile, pin_index);
+
+            ClusterBlockId clb = place_ctx.grid_blocks().block_at_location({
+                rr_graph.node_xlow(rt_node.inode),
+                rr_graph.node_ylow(rt_node.inode),
+                subtile,
+                rr_graph.node_layer(rt_node.inode)
+            });
 
             if(!is_pin_on_tile(physical_tile, pin_index))
                 continue;
@@ -366,15 +352,15 @@ static void sync_clustered_netlist_to_routing(void){
              * Due to how the route tree is traversed, all nodes until the next OPIN on the tile will
              * be under this OPIN, so this is valid (we don't need to get the branch explicitly) */
             if(node_type == OPIN){
-                std::string net_name;
-                net_name = atom_ctx.nlist.net_name(parent_net_id) + "_" + std::to_string(clb_nets_so_far);
+                std::string net_name = atom_ctx.nlist.net_name(parent_net_id) + "_" + std::to_string(clb_nets_so_far);
                 clb_net_id = clb_netlist.create_net(net_name);
                 atom_lookup.add_atom_clb_net(atom_net_id, clb_net_id);
                 clb_nets_so_far++;
             }
 
             t_pb_graph_pin* pb_graph_pin = get_pb_graph_node_pin_from_block_pin(clb, pin_index);
 
+            /* Get or create port */
             ClusterPortId port_id = clb_netlist.find_port(clb, pb_graph_pin->port->name);
             if(!port_id){
                 PortType port_type;
@@ -431,6 +417,12 @@ static void fixup_atom_pb_graph_pin_mapping(void){
 
             /* Find atom port from pbg pin's model port */
             AtomPortId atom_port = atom_ctx.nlist.find_atom_port(atb, atom_pbg_pin->port->model_port);
+
+            /* Not an equivalent port, so no need to do fixup */
+            if (atom_pbg_pin->port->equivalent != PortEquivalence::FULL) {
+                continue;
+            }
+
             for(AtomPinId atom_pin: atom_ctx.nlist.port_pins(atom_port)){
                 /* Match net IDs from pb_route and atom netlist and connect in lookup */
                 if(pb_route.atom_net_id == atom_ctx.nlist.pin_net(atom_pin)){

vpr/src/route/annotate_routing.cpp

@@ -15,11 +15,13 @@
 
 vtr::vector<RRNodeId, ClusterNetId> annotate_rr_node_nets(const ClusteringContext& cluster_ctx,
                                                          const DeviceContext& device_ctx,
+                                                         const AtomContext& atom_ctx,
                                                          const bool& verbose) {
     size_t counter = 0;
     vtr::ScopedStartFinishTimer timer("Annotating rr_node with routed nets");
 
     const auto& rr_graph = device_ctx.rr_graph;
+    auto& atom_lookup = atom_ctx.lookup;
 
     auto& netlist = cluster_ctx.clb_nlist;
     vtr::vector<RRNodeId, ClusterNetId> rr_node_nets;
@@ -47,11 +49,18 @@ vtr::vector<RRNodeId, ClusterNetId> annotate_rr_node_nets(const ClusteringContex
                  * In some routing architectures, node capacity is more than 1
                  * which allows a node to be mapped by multiple nets
                  * Therefore, the sanity check should focus on the nodes
-                 * whose capacity is 1
+                 * whose capacity is 1.
+                 * Flat routing may create two clustered nets from a single
+                 * atom net, which will point to the same atom net routing.
+                 * Ignore clashes if the clustered nets are mapped to the
+                 * same atom net
                  */
+                AtomNetId my_atom = atom_lookup.atom_net(net_id);
+                AtomNetId existing_atom = atom_lookup.atom_net(rr_node_nets[rr_node]);
                 if ((rr_node_nets[rr_node])
                     && (1 == rr_graph.node_capacity(rr_node))
-                    && (net_id != rr_node_nets[rr_node])) {
+                    && (net_id != rr_node_nets[rr_node])
+                    && (my_atom != existing_atom)) {
                     VPR_FATAL_ERROR(VPR_ERROR_ANALYSIS,
                                     "Detect two nets '%s' and '%s' that are mapped to the same rr_node '%ld'!\n%s\n",
                                     netlist.net_name(net_id).c_str(),

vpr/src/route/annotate_routing.h

@@ -12,6 +12,7 @@
  *******************************************************************/
 vtr::vector<RRNodeId, ClusterNetId> annotate_rr_node_nets(const ClusteringContext& cluster_ctx,
                                                          const DeviceContext& device_ctx,
+                                                         const AtomContext& atom_ctx,
                                                          const bool& verbose);
 
 #endif