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debug ci failure
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‎.github/workflows/test.yml

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -26,19 +26,19 @@ jobs:
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fail-fast: false
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matrix:
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include:
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- {test: "vtr_reg_nightly_test1", cores: "8", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test2", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test3", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test4", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test5", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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- {test: "vtr_reg_nightly_test6", cores: "16", options: "", cmake: "-DODIN_USE_YOSYS=ON", extra_pkgs: ""}
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- {test: "vtr_reg_strong", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_strong", cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON", extra_pkgs: "libeigen3-dev"}
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- {test: "vtr_reg_yosys", cores: "16", options: "", cmake: "-DWITH_YOSYS=ON -DYOSYS_SV_UHDM_PLUGIN=ON", extra_pkgs: ""}
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- {test: "vtr_reg_yosys_parmys", cores: "16", options: "", cmake: "-DWITH_YOSYS=ON -DYOSYS_PARMYS_PLUGIN=ON -DYOSYS_SV_UHDM_PLUGIN=ON", extra_pkgs: ""}
39-
- {test: "vtr_reg_yosys_odin", cores: "16", options: "", cmake: "-DODIN_USE_YOSYS=ON -DYOSYS_SV_UHDM_PLUGIN=ON", extra_pkgs: ""}
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- {test: "odin_tech_strong", cores: "16", options: "", cmake: "-DODIN_USE_YOSYS=ON", extra_pkgs: ""}
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- {test: "odin_reg_strong", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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# - {test: "vtr_reg_nightly_test1", cores: "8", options: "", cmake: "", extra_pkgs: ""}
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# - {test: "vtr_reg_nightly_test2", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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# - {test: "vtr_reg_nightly_test3", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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# - {test: "vtr_reg_nightly_test4", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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# - {test: "vtr_reg_nightly_test5", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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# - {test: "vtr_reg_nightly_test6", cores: "16", options: "", cmake: "-DODIN_USE_YOSYS=ON", extra_pkgs: ""}
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# - {test: "vtr_reg_strong", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3", extra_pkgs: "libeigen3-dev"}
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# - {test: "vtr_reg_strong", cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON", extra_pkgs: "libeigen3-dev"}
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# - {test: "vtr_reg_yosys", cores: "16", options: "", cmake: "-DWITH_YOSYS=ON -DYOSYS_SV_UHDM_PLUGIN=ON", extra_pkgs: ""}
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- {test: "vtr_reg_yosys_parmys", cores: "16", options: "", cmake: "-DWITH_YOSYS=ON -DYOSYS_PARMYS_PLUGIN=ON", extra_pkgs: ""}
39+
# - {test: "vtr_reg_yosys_odin", cores: "16", options: "", cmake: "-DODIN_USE_YOSYS=ON -DYOSYS_SV_UHDM_PLUGIN=ON", extra_pkgs: ""}
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# - {test: "odin_tech_strong", cores: "16", options: "", cmake: "-DODIN_USE_YOSYS=ON", extra_pkgs: ""}
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# - {test: "odin_reg_strong", cores: "16", options: "", cmake: "", extra_pkgs: ""}
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env:
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DEBIAN_FRONTEND: "noninteractive"

‎vtr_flow/tasks/regression_tests/vtr_reg_yosys_parmys/koios/config/config.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ includes_dir=benchmarks/verilog/koios
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# Add circuits to list to sweep
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circuit_list_add=tpu_like.small.os.v
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circuit_list_add=tpu_like.small.ws.v
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circuit_list_add=dla_like.small.v
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#circuit_list_add=dla_like.small.v
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circuit_list_add=bnn.v
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circuit_list_add=attention_layer.v
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circuit_list_add=conv_layer_hls.v

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