Assigning pin criticality to virtual clock sink + Renaming and refactoring for two stage routing

Author: mustafabbas

vpr/src/base/SetupVPR.cpp

@@ -340,7 +340,7 @@ static void SetupRouterOpts(const t_options& Options, t_router_opts* RouterOpts)
     RouterOpts->congested_routing_iteration_threshold_frac = Options.congested_routing_iteration_threshold_frac;
     RouterOpts->route_bb_update = Options.route_bb_update;
     RouterOpts->clock_modeling = Options.clock_modeling;
-    RouterOpts->two_stage_routing = Options.two_stage_routing;
+    RouterOpts->two_stage_clock_routing = Options.two_stage_clock_routing;
     RouterOpts->high_fanout_threshold = Options.router_high_fanout_threshold;
     RouterOpts->router_debug_net = Options.router_debug_net;
     RouterOpts->router_debug_sink_rr = Options.router_debug_sink_rr;

vpr/src/base/read_options.cpp

@@ -915,7 +915,7 @@ argparse::ArgumentParser create_arg_parser(std::string prog_name, t_options& arg
         .default_value("ideal")
         .show_in(argparse::ShowIn::HELP_ONLY);
 
-    gen_grp.add_argument<bool, ParseOnOff>(args.two_stage_routing, "--two_stage_routing")
+    gen_grp.add_argument<bool, ParseOnOff>(args.two_stage_clock_routing, "--two_stage_clock_routing")
         .help(
             "Routes clock nets in two stages if using a dedicated clock network.\n"
             " * First stage: From the Net source to a dedicated clock network source\n"

vpr/src/base/read_options.h

@@ -49,7 +49,7 @@ struct t_options {
     argparse::ArgValue<float> target_device_utilization;
     argparse::ArgValue<e_constant_net_method> constant_net_method;
     argparse::ArgValue<e_clock_modeling> clock_modeling;
-    argparse::ArgValue<bool> two_stage_routing;
+    argparse::ArgValue<bool> two_stage_clock_routing;
     argparse::ArgValue<bool> exit_before_pack;
     argparse::ArgValue<bool> strict_checks;
     argparse::ArgValue<std::string> disable_errors;

vpr/src/base/vpr_api.cpp

@@ -217,7 +217,7 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a
     vpr_setup->device_layout = options->device_layout;
     vpr_setup->constant_net_method = options->constant_net_method;
     vpr_setup->clock_modeling = options->clock_modeling;
-    vpr_setup->two_stage_routing = options->two_stage_routing;
+    vpr_setup->two_stage_clock_routing = options->two_stage_clock_routing;
     vpr_setup->exit_before_pack = options->exit_before_pack;
 
     VTR_LOG("\n");

vpr/src/base/vpr_context.h

@@ -165,7 +165,7 @@ struct DeviceContext : public Context {
     // Useful for two stage clock routing
     // XXX: currently only one place to source the clock networks so only storing
     //      a single value
-    int virtual_clock_network_sink_idx;
+    int virtual_clock_network_root_idx;
 
     /** Attributes for each rr_node.
      * key:     rr_node index

vpr/src/base/vpr_types.h

@@ -944,7 +944,7 @@ struct t_router_opts {
     float congested_routing_iteration_threshold_frac;
     e_route_bb_update route_bb_update;
     enum e_clock_modeling clock_modeling; //How clock pins and nets should be handled
-    bool two_stage_routing; //How clock nets on dedicated networks should be routed
+    bool two_stage_clock_routing; //How clock nets on dedicated networks should be routed
     int high_fanout_threshold;
     int router_debug_net;
     int router_debug_sink_rr;
@@ -1299,7 +1299,7 @@ struct t_vpr_setup {
     std::string device_layout;
     e_constant_net_method constant_net_method; //How constant nets should be handled
     e_clock_modeling clock_modeling;           //How clocks should be handled
-    bool two_stage_routing;                    //How clocks should be routed in the presence of a dedicated clock network
+    bool two_stage_clock_routing;                    //How clocks should be routed in the presence of a dedicated clock network
     bool exit_before_pack;                     //Exits early before starting packing (useful for collecting statistics without running/loading any stages)
 };
 

vpr/src/route/clock_connection_builders.cpp

@@ -49,9 +49,9 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_
     auto& rr_nodes = device_ctx.rr_nodes;
     auto& rr_node_indices = device_ctx.rr_node_indices;
 
-    int virtual_clock_network_sink_idx =
+    int virtual_clock_network_root_idx =
         create_virtual_clock_network_sink_node(switch_location.x, switch_location.y);
-    device_ctx.virtual_clock_network_sink_idx = virtual_clock_network_sink_idx;
+    device_ctx.virtual_clock_network_root_idx = virtual_clock_network_root_idx;
 
     // rr_node indices for x and y channel routing wires and clock wires to connect to
     auto x_wire_indices = get_rr_node_chan_wires_at_location(
@@ -80,7 +80,7 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_
 
         // Connect to virtual clock sink node
         // used by the two stage router
-        rr_nodes[clock_index].add_edge(virtual_clock_network_sink_idx, rr_switch_idx);
+        rr_nodes[clock_index].add_edge(virtual_clock_network_root_idx, rr_switch_idx);
     }
 }
 

vpr/src/route/route_common.cpp

@@ -802,6 +802,11 @@ void node_to_heap(int inode, float total_cost, int prev_node, int prev_edge, flo
 }
 
 void drop_traceback_tail(ClusterNetId net_id) {
+    /* Removes the tail node from the routing traceback and updates
+       it with the previous node from the traceback.
+       This funtion is primarily called to remove the virtual clock
+       sink from the routing traceback and replace it with the clock
+       network root. */
     auto& route_ctx = g_vpr_ctx.mutable_routing();
 
     auto* tail_ptr = route_ctx.trace[net_id].tail;